Markus Fröschle
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4bb0527539
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fifo_mw never got a value assigned - fixed for testbench, but still open for toplevel
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2014-12-22 08:31:07 +00:00 |
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Markus Fröschle
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5b64c3d6cf
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fixed CLOCK_TICK generic
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2014-12-22 06:09:10 +00:00 |
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Markus Fröschle
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1aab3c25d2
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further extended testbench.
Need to fix difference between clock ticks and TIME in original code
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2014-12-21 20:40:51 +00:00 |
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Markus Fröschle
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9d7858a144
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fixed missing data_in
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2014-12-21 11:13:58 +00:00 |
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Markus Fröschle
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ff7faf4395
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more formatting and corrections of testbench code
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2014-12-21 10:55:49 +00:00 |
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Markus Fröschle
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db93ec6026
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updated testbench (not functional yet)
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2014-12-21 08:32:20 +00:00 |
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Markus Fröschle
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dd3a3e9da4
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started simulator for DDR RAM
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2014-06-16 14:35:54 +00:00 |
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Markus Fröschle
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90bc4c409e
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more testbench code
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2014-06-15 06:05:23 +00:00 |
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Markus Fröschle
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55889b9e7b
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started memory write state machine in testbench
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2014-06-13 21:23:35 +00:00 |
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Markus Fröschle
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40e6a71e47
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started testbench bus transaction implementation
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2014-06-13 06:26:42 +00:00 |
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Markus Fröschle
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05a13bdf16
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added clock signals
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2014-06-11 17:52:44 +00:00 |
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Markus Fröschle
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8d0ede14c8
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worked on testbench
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2014-06-11 16:41:25 +00:00 |
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Markus Fröschle
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727aa5bce9
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initial import after removal of FPGA_quartus
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2014-06-09 20:35:29 +00:00 |
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