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169 Commits
R_0_8_7
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R_0_9_3@16
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4
.gdbinit
4
.gdbinit
@@ -3,12 +3,12 @@ define tr
|
||||
#!killall m68k-bdm-gdbserver
|
||||
target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
|
||||
#target remote localhost:1234
|
||||
#target remote | m68k-bdm-gdbserver pipe /dev/tblcf1
|
||||
#target remote | m68k-bdm-gdbserver pipe /dev/tblcf2
|
||||
#target dbug /dev/ttyS0
|
||||
#monitor bdm-reset
|
||||
end
|
||||
define tbtr
|
||||
target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
|
||||
target remote | m68k-bdm-gdbserver pipe /dev/tblcf2
|
||||
end
|
||||
source mcf5474.gdb
|
||||
set breakpoint auto-hw
|
||||
|
||||
@@ -1 +1,3 @@
|
||||
// ADD PREDEFINED MACROS HERE!
|
||||
//#define MACHINE_FIREBEE
|
||||
#define MACHINE_M5484LITE
|
||||
|
||||
1097
BaS_gcc.files
1097
BaS_gcc.files
File diff suppressed because it is too large
Load Diff
@@ -1,2 +1,55 @@
|
||||
include
|
||||
tos/jtagwait/include
|
||||
include
|
||||
tos/jtagwait/include
|
||||
tos/pci_test/include
|
||||
/usr/m68k-atari-mint/include
|
||||
/opt/cross-mint/m68k-atari-mint/include
|
||||
/opt/gygwin/opt/cross-mint/m68k-atari-mint/include
|
||||
/opt/m68k-elf/include
|
||||
/opt/cygwin/opt/m68k-elf/include
|
||||
/opt/cygwin/opt/m68k-elf/lib/gcc/m68k-elf/4.6.4/include
|
||||
dma
|
||||
m54455
|
||||
sys
|
||||
pci
|
||||
tos/pci_test
|
||||
tos/jtagwait/m5475/mshort
|
||||
m5484lite
|
||||
tos/pci_test/include
|
||||
tos/bascook
|
||||
tos/vmem_test/m5475/mshort
|
||||
i2c
|
||||
fs
|
||||
tos/vmem_test/m5475
|
||||
tos/pci_test/m5475
|
||||
spi
|
||||
if
|
||||
tos/jtagwait/m5475
|
||||
util
|
||||
kbd
|
||||
flash_scripts
|
||||
video
|
||||
usb
|
||||
exe
|
||||
tos/vmem_test/sources
|
||||
tos
|
||||
nutil
|
||||
tos/jtagwait/sources
|
||||
x86emu
|
||||
flash
|
||||
tos/vmem_test/include
|
||||
tos/bascook/sources
|
||||
tos/pci_test/m5475/mshort
|
||||
.
|
||||
radeon
|
||||
net
|
||||
xhdi
|
||||
tos/vmem_test
|
||||
tos/pci_test/sources
|
||||
firebee
|
||||
tos/jtagwait
|
||||
tos/fpga_test/include
|
||||
tos/fpga_test
|
||||
tos/fpga_test/sources
|
||||
tos/pci_mem
|
||||
tos/pci_mem/include
|
||||
tos/pci_mem/sources
|
||||
|
||||
167
Makefile
167
Makefile
@@ -3,10 +3,19 @@
|
||||
# This Makefile is meant for cross compiling the BaS with Vincent Riviere's cross compilers.
|
||||
# If you want to compile native on an Atari (you will need at least GCC 4.6.3), set
|
||||
# TCPREFIX to be empty.
|
||||
#
|
||||
# If you want to compile with the m68k-elf- toolchain, set TCPREFIX accordingly. Requires an extra
|
||||
# installation, but allows source level debugging over BDM with a recent gdb (tested with 7.5),
|
||||
# the m68k BDM tools from sourceforge (http://bdm.sourceforge.net) and a BDM pod (TBLCF and P&E tested).
|
||||
|
||||
VERBOSE=N
|
||||
|
||||
ifneq (Y,$(VERBOSE))
|
||||
Q=@
|
||||
else
|
||||
Q=
|
||||
endif
|
||||
|
||||
# can be either "Y" or "N" (without quotes). "Y" for using the m68k-elf-, "N" for using the m68k-atari-mint
|
||||
# toolchain
|
||||
COMPILE_ELF=Y
|
||||
@@ -29,26 +38,32 @@ AR=$(TCPREFIX)ar
|
||||
RANLIB=$(TCPREFIX)ranlib
|
||||
NATIVECC=gcc
|
||||
|
||||
ifeq (Y,$(COMPILE_ELF))
|
||||
LDLIBS=-lgcc
|
||||
else
|
||||
LDLIBS=-lgcc
|
||||
endif
|
||||
|
||||
INCLUDE=-Iinclude
|
||||
CFLAGS=-mcpu=5474 \
|
||||
-g \
|
||||
-Wall \
|
||||
-fomit-frame-pointer \
|
||||
-ffreestanding \
|
||||
-fleading-underscore \
|
||||
-mno-strict-align \
|
||||
-Wa,--register-prefix-optional
|
||||
CFLAGS= -Wall \
|
||||
-O2 \
|
||||
-fomit-frame-pointer \
|
||||
-ffreestanding \
|
||||
-fno-strict-aliasing \
|
||||
-fleading-underscore \
|
||||
-Winline \
|
||||
-Wa,--register-prefix-optional
|
||||
|
||||
CFLAGS_OPTIMIZED = -mcpu=5474 \
|
||||
-Wall \
|
||||
-O2 \
|
||||
-g \
|
||||
-fomit-frame-pointer \
|
||||
-ffreestanding \
|
||||
-fleading-underscore \
|
||||
-Wa,--register-prefix-optional
|
||||
LDFLAGS=-g
|
||||
LDFLAGS=
|
||||
|
||||
TRGTDIRS= ./firebee ./m5484lite ./m54455
|
||||
TRGTDIRS= ./firebee ./m54455 ./m5484lite
|
||||
OBJDIRS=$(patsubst %, %/objs,$(TRGTDIRS))
|
||||
TOOLDIR=util
|
||||
|
||||
@@ -59,7 +74,7 @@ LDCFILE=bas.lk
|
||||
LDRFILE=ram.lk
|
||||
LDCSRC=bas.lk.in
|
||||
LDCBSRC=basflash.lk.in
|
||||
LDCBFS=bashflash.lk
|
||||
LDCBFS=basflash.lk
|
||||
|
||||
# this Makefile can create the BaS to flash or an arbitrary ram address (for BDM debugging). See
|
||||
# below for the definition of TARGET_ADDRESS
|
||||
@@ -72,8 +87,11 @@ CSRCS= \
|
||||
init_fpga.c \
|
||||
fault_vectors.c \
|
||||
interrupts.c \
|
||||
\
|
||||
bas_printf.c \
|
||||
bas_string.c \
|
||||
conout.c \
|
||||
\
|
||||
BaS.c \
|
||||
cache.c \
|
||||
mmu.c \
|
||||
@@ -85,16 +103,19 @@ CSRCS= \
|
||||
s19reader.c \
|
||||
flash.c \
|
||||
dma.c \
|
||||
i2c.c \
|
||||
i2c.c \
|
||||
xhdi_sd.c \
|
||||
xhdi_interface.c \
|
||||
pci.c \
|
||||
pci_errata.c \
|
||||
dspi.c \
|
||||
driver_vec.c \
|
||||
driver_mem.c \
|
||||
\
|
||||
MCD_dmaApi.c \
|
||||
MCD_tasks.c \
|
||||
MCD_tasksInit.c \
|
||||
\
|
||||
usb.c \
|
||||
ohci-hcd.c \
|
||||
ehci-hcd.c \
|
||||
@@ -125,21 +146,19 @@ CSRCS= \
|
||||
videl.c \
|
||||
video.c \
|
||||
\
|
||||
i2c-algo-bit.c \
|
||||
\
|
||||
radeon_base.c \
|
||||
radeon_accel.c \
|
||||
radeon_cursor.c \
|
||||
radeon_monitor.c \
|
||||
radeon_i2c.c \
|
||||
fnt_st_8x16.c \
|
||||
\
|
||||
x86decode.c \
|
||||
x86sys.c \
|
||||
x86debug.c \
|
||||
x86prim_ops.c \
|
||||
x86ops.c \
|
||||
x86ops2.c \
|
||||
x86fpu.c \
|
||||
x86biosemu.c \
|
||||
x86emu.c \
|
||||
x86pcibios.c \
|
||||
x86biosemu.c \
|
||||
x86emu_util.c \
|
||||
\
|
||||
basflash.c \
|
||||
basflash_start.c
|
||||
@@ -147,11 +166,15 @@ CSRCS= \
|
||||
|
||||
ASRCS= \
|
||||
startcf.S \
|
||||
printf_helper.S \
|
||||
exceptions.S \
|
||||
setjmp.S \
|
||||
xhdi_vec.S \
|
||||
pci_wrappers.S
|
||||
|
||||
ifeq (Y,$(COMPILE_ELF)) # needed for __ vs ___ kludge
|
||||
ASRCS += libgcc_helper.S
|
||||
endif
|
||||
|
||||
SRCS=$(ASRCS) $(CSRCS)
|
||||
COBJS=$(patsubst %.c,%.o,$(CSRCS))
|
||||
AOBJS=$(patsubst %.S,%.o,$(ASRCS))
|
||||
@@ -170,55 +193,57 @@ lib: $(LIBS)
|
||||
.PHONY: ver
|
||||
ver:
|
||||
touch include/version.h
|
||||
|
||||
.PHONY: tos
|
||||
tos:
|
||||
(cd tos; make)
|
||||
$(Q)(cd tos; $(MAKE) -s)
|
||||
|
||||
.PHONY: clean
|
||||
clean:
|
||||
for d in $(TRGTDIRS);\
|
||||
$(Q)for d in $(TRGTDIRS);\
|
||||
do rm -f $$d/*.map $$d/*.s19 $$d/*.elf $$d/*.lk $$d/*.a $$d/objs/* $$d/depend;\
|
||||
done
|
||||
rm -f tags
|
||||
$(Q)rm -f tags
|
||||
$(Q)(cd tos; make -s clean)
|
||||
|
||||
|
||||
|
||||
# flags for targets
|
||||
m5484lite/bas.$(EXE): MACHINE=MACHINE_M5484LITE
|
||||
m54455/bas.$(EXE): MACHINE=MACHINE_M54455
|
||||
firebee/bas.$(EXE): MACHINE=MACHINE_FIREBEE
|
||||
|
||||
m5484lite/ram.$(EXE): MACHINE=MACHINE_M5484LITE
|
||||
m54455/ram.$(EXE): MACHINE=MACHINE_M54455
|
||||
firebee/ram.$(EXE): MACHINE=MACHINE_FIREBEE
|
||||
|
||||
m5484lite/basflash.$(EXE): MACHINE=MACHINE_M5484LITE
|
||||
m54455/basflash.$(EXE): MACHINE=MACHINE_M54455
|
||||
firebee/basflash.$(EXE): MACHINE=MACHINE_FIREBEE
|
||||
|
||||
m5484lite/bas.$(EXE): CFLAGS += -mcpu=5484
|
||||
m54455/bas.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
|
||||
firebee/bas.$(EXE): CFLAGS += -mcpu=5474
|
||||
|
||||
m5484lite/ram.$(EXE): CFLAGS += -mcpu=5484
|
||||
m54455/ram.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
|
||||
firebee/ram.$(EXE): CFLAGS += -mcpu=5474
|
||||
|
||||
m5484lite/basflash.$(EXE): CFLAGS += -mcpu=5484
|
||||
m54455/basflash.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
|
||||
firebee/basflash.$(EXE): CFLAGS += -mcpu=5474
|
||||
|
||||
#
|
||||
# generate pattern rules for different object files
|
||||
#
|
||||
define CC_TEMPLATE
|
||||
#ifeq (firebee,$(1))
|
||||
#MACHINE=MACHINE_FIREBEE
|
||||
#else
|
||||
#MACHINE=MACHINE_M5484LITE
|
||||
#endif
|
||||
|
||||
# always optimize x86 emulator objects
|
||||
#$(1)/objs/x86decode.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86sys.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86debug.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86prim_ops.o:CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86ops.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86ops2.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86fpu.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86biosemu.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86pcibios.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
|
||||
$(1)/objs/%.o:%.c
|
||||
$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
|
||||
$(Q)echo CC $$<
|
||||
$(Q)$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
|
||||
|
||||
$(1)/objs/%.o:%.S
|
||||
$(CC) $$(CFLAGS) -Wa,--bitwise-or -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
|
||||
$(Q)echo CC $$<
|
||||
$(Q)$(CC) $$(CFLAGS) -Wa,--bitwise-or -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
|
||||
endef
|
||||
$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR))))
|
||||
|
||||
@@ -234,7 +259,8 @@ else
|
||||
MACHINE=MACHINE_M5484LITE
|
||||
endif
|
||||
$(1)/depend:$(SRCS)
|
||||
$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -M $$^ | sed -e "s#^\(.*\).o:#"$(1)"/objs/\1.o:#" > $$@
|
||||
$(Q)echo DEPEND
|
||||
$(Q)$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -M $$^ | sed -e "s#^\(.*\).o:#"$(1)"/objs/\1.o:#" > $$@
|
||||
endef
|
||||
$(foreach DIR,$(TRGTDIRS),$(eval $(call DEP_TEMPLATE,$(DIR))))
|
||||
|
||||
@@ -245,8 +271,9 @@ $(foreach DIR,$(TRGTDIRS),$(eval $(call DEP_TEMPLATE,$(DIR))))
|
||||
define AR_TEMPLATE
|
||||
$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS))
|
||||
$(1)/$(LIBBAS): $$($(1)_OBJS)
|
||||
$(AR) rv $$@ $$?
|
||||
$(RANLIB) $$@
|
||||
$(Q)echo AR $$@
|
||||
$(Q)$(AR) r $$@ $$?
|
||||
$(Q)$(RANLIB) $$@
|
||||
endef
|
||||
$(foreach DIR,$(TRGTDIRS),$(eval $(call AR_TEMPLATE,$(DIR))))
|
||||
|
||||
@@ -255,41 +282,59 @@ ifeq ($(COMPILE_ELF),Y)
|
||||
else
|
||||
FORMAT_ELF=0
|
||||
endif
|
||||
|
||||
define LK_TEMPLATE
|
||||
$(1)/$$(LDCFILE): $(LDCSRC)
|
||||
$(Q)echo CPP $$<
|
||||
$(Q)$(CPP) $(INCLUDE) -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $$< -o $$@
|
||||
endef
|
||||
$(foreach DIR,$(TRGTDIRS),$(eval $(call LK_TEMPLATE,$(DIR))))
|
||||
|
||||
#
|
||||
# define pattern rules for binaries
|
||||
#
|
||||
define EX_TEMPLATE
|
||||
# pattern rule for flash
|
||||
$(1)_MAPFILE=$(1)/$$(basename $$(FLASH_EXEC)).map
|
||||
$(1)/$$(FLASH_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
|
||||
$(CPP) $(INCLUDE) -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDCFILE)
|
||||
$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE) --cref -T $(1)/$$(LDCFILE) -o $$@
|
||||
$(1)/$$(FLASH_EXEC): $(1)/$(LIBBAS) $(1)/$$(LDCFILE)
|
||||
$(Q)echo CC $$@
|
||||
$(Q)$(CC) $$(CFLAGS) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDCFILE) $(LDLIBS) -o $$@
|
||||
ifeq ($(COMPILE_ELF),Y)
|
||||
$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
$(Q)echo OBJCOPY $$@
|
||||
$(Q)$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
else
|
||||
objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
$(Q)echo OBJCOPY $$@
|
||||
$(Q)objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
endif
|
||||
|
||||
# pattern rule for RAM
|
||||
$(1)_MAPFILE_RAM=$(1)/$$(basename $$(RAM_EXEC)).map
|
||||
$(1)/$$(RAM_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
|
||||
$(CPP) $(INCLUDE) -DCOMPILE_RAM -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDRFILE)
|
||||
$(LD) $(LDFLAGS) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) -o $$@
|
||||
$(1)/$$(RAM_EXEC): $(1)/$(LIBBAS) $(1)/$$(LDCFILE)
|
||||
$(Q)echo CPP $$@
|
||||
$(Q)$(CPP) $(INCLUDE) -DCOMPILE_RAM -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDRFILE)
|
||||
$(Q)echo CC $$@
|
||||
$(Q)$(CC) $$(CFLAGS) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE_RAM) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDRFILE) $(LDLIBS) -o $$@
|
||||
ifeq ($(COMPILE_ELF),Y)
|
||||
$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
$(Q)echo OBJCOPY $$@
|
||||
$(Q)$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
else
|
||||
objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
$(Q)echo OBJCOPY $$<
|
||||
$(Q)objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
endif
|
||||
|
||||
# pattern rule for basflash
|
||||
$(1)_MAPFILE_BFL=$(1)/$$(basename $$(BASFLASH_EXEC)).map
|
||||
$(1)/$$(BASFLASH_EXEC): $(1)/objs/basflash.o $(1)/objs/basflash_start.o $(1)/$(LIBBAS) $(LDCBFL)
|
||||
$(Q)echo CPP $$<
|
||||
$(CPP) $(INCLUDE) -P -DOBJDIR=$(1)/objs -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCBSRC) -o $(1)/$$(LDCBFS)
|
||||
$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_BFL) --cref -T $(1)/$$(LDCFILE) -L$(1) -lbas -o $$@
|
||||
$(Q)echo CC $$<
|
||||
$(Q)$(CC) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE_BFL) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDCBFS) -L$(1) -lbas $(LDLIBS) -o $$@
|
||||
ifeq ($(COMPILE_ELF),Y)
|
||||
$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
$(Q)echo OBJCOPY $$<
|
||||
$(Q)$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
else
|
||||
objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
$(Q)echo OBJCOPY $$<
|
||||
$(Q)objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
endif
|
||||
endef
|
||||
$(foreach DIR,$(TRGTDIRS),$(eval $(call EX_TEMPLATE,$(DIR))))
|
||||
@@ -304,7 +349,7 @@ tags:
|
||||
|
||||
.PHONY: printvars
|
||||
printvars:
|
||||
@$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
|
||||
$(Q)$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
|
||||
ifeq (MACHINE_M5484LITE,$$(MACHINE))
|
||||
MNAME=m5484lite
|
||||
else ifeq (MACHINE_FIREBEE,$(MACHINE))
|
||||
|
||||
85
bas.lk.in
85
bas.lk.in
@@ -1,7 +1,7 @@
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
# include "m5484l.h"
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
@@ -42,12 +42,15 @@ SECTIONS
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
OBJDIR/wait.o(.text)
|
||||
OBJDIR/exceptions.o(.text)
|
||||
OBJDIR/setjmp.o(.text)
|
||||
OBJDIR/driver_vec.o(.text)
|
||||
OBJDIR/interrupts.o(.text)
|
||||
OBJDIR/mmu.o(.text)
|
||||
|
||||
OBJDIR/BaS.o(.text)
|
||||
OBJDIR/pci.o(.text)
|
||||
. = ALIGN(16);
|
||||
OBJDIR/pci_errata.o(.text)
|
||||
OBJDIR/pci_wrappers.o(.text)
|
||||
OBJDIR/usb.o(.text)
|
||||
OBJDIR/driver_mem.o(.text)
|
||||
@@ -79,7 +82,10 @@ SECTIONS
|
||||
OBJDIR/s19reader.o(.text)
|
||||
OBJDIR/bas_printf.o(.text)
|
||||
OBJDIR/bas_string.o(.text)
|
||||
OBJDIR/printf_helper.o(.text)
|
||||
OBJDIR/conout.o(.text)
|
||||
#if (FORMAT_ELF == 1)
|
||||
OBJDIR/libgcc_helper.o(.text)
|
||||
#endif
|
||||
OBJDIR/cache.o(.text)
|
||||
OBJDIR/dma.o(.text)
|
||||
OBJDIR/MCD_dmaApi.o(.text)
|
||||
@@ -91,22 +97,21 @@ SECTIONS
|
||||
OBJDIR/fbmem.o(.text)
|
||||
OBJDIR/fbmon.o(.text)
|
||||
OBJDIR/fbmodedb.o(.text)
|
||||
OBJDIR/fnt_st_8x16.o(.text)
|
||||
OBJDIR/offscreen.o(.text)
|
||||
|
||||
OBJDIR/x86decode.o(.text)
|
||||
OBJDIR/x86ops.o(.text)
|
||||
OBJDIR/x86ops2.o(.text)
|
||||
OBJDIR/x86fpu.o(.text)
|
||||
OBJDIR/x86sys.o(.text)
|
||||
OBJDIR/x86biosemu.o(.text)
|
||||
OBJDIR/x86debug.o(.text)
|
||||
OBJDIR/x86prim_ops.o(.text)
|
||||
OBJDIR/x86emu.o(.text)
|
||||
OBJDIR/x86emu_util.o(.text)
|
||||
OBJDIR/x86pcibios.o(.text)
|
||||
OBJDIR/x86biosemu.o(.text)
|
||||
|
||||
OBJDIR/i2c-algo-bit.o(.text)
|
||||
|
||||
OBJDIR/radeon_base.o(.text)
|
||||
OBJDIR/radeon_accel.o(.text)
|
||||
OBJDIR/radeon_cursor.o(.text)
|
||||
OBJDIR/radeon_monitor.o(.text)
|
||||
OBJDIR/radeon_i2c.o(.text)
|
||||
|
||||
OBJDIR/xhdi_sd.o(.text)
|
||||
OBJDIR/xhdi_interface.o(.text)
|
||||
@@ -126,11 +131,13 @@ SECTIONS
|
||||
#endif /* COMPILE_RAM */
|
||||
|
||||
#if (FORMAT_ELF == 1)
|
||||
*(.eh_frame)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
#endif
|
||||
} > bas_rom
|
||||
|
||||
|
||||
#if (TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS)
|
||||
/*
|
||||
* put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
|
||||
@@ -222,6 +229,7 @@ SECTIONS
|
||||
/* MMU memory mapped registers */
|
||||
__MMUBAR = 0xFF040000;
|
||||
|
||||
#if !defined(MACHINE_M54455) /* MCF54455 does not have RAMBAR0 and RAMBAR1 registers */
|
||||
/*
|
||||
* 4KB on-chip Core SRAM0: -> exception table
|
||||
*/
|
||||
@@ -232,34 +240,43 @@ SECTIONS
|
||||
__RAMBAR1 = 0xFF101000;
|
||||
__RAMBAR1_SIZE = 0x00001000;
|
||||
__SUP_SP = __RAMBAR1 + __RAMBAR1_SIZE - 4;
|
||||
#else
|
||||
__RAMBAR0 = 0x80000000; /* RAMBAR must be between 0x80000000 on MCF54455 */
|
||||
__RAMBAR0_SIZE = 0x1000;
|
||||
__SUP_SP = __RAMBAR0 + __RAMBAR0_SIZE + 0x1000 - 4;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* this flag (if 1) indicates that FPGA configuration has been loaded through JTAG
|
||||
* and shouldn't be overwritten on boot
|
||||
* FPGA_JTAG_LOADED (if 1) indicates that FPGA configuration has been loaded through JTAG
|
||||
* and shouldn't be overwritten on boot. For this to work (and not let us be faked
|
||||
* by a random uninitialised value), __FPGA_JTAG_VALID is used as a "magic value" and must be
|
||||
* 0xaffeaffe to make this work.
|
||||
*/
|
||||
#if !defined(MACHINE_M54455) /* MCF54455 does not have RAMBAR0 and RAMBAR1 */
|
||||
__FPGA_JTAG_LOADED = __RAMBAR1;
|
||||
__FPGA_JTAG_VALID = __RAMBAR1 + 4;
|
||||
#else
|
||||
__FPGA_JTAG_LOADED = __RAMBAR0 + 0x1000;
|
||||
__FPGA_JTAG_VALID = __RAMBAR0 + 0x1000 + 4;
|
||||
#endif
|
||||
|
||||
/* system variables */
|
||||
|
||||
/* system variables */
|
||||
|
||||
/* RAMBAR0 0 to 0x7FF -> exception vectors */
|
||||
_rt_mod = __RAMBAR0 + 0x800;
|
||||
_rt_ssp = __RAMBAR0 + 0x804;
|
||||
_rt_usp = __RAMBAR0 + 0x808;
|
||||
_rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */
|
||||
_rt_cacr = __RAMBAR0 + 0x810; /* 002 */
|
||||
_rt_asid = __RAMBAR0 + 0x814; /* 003 */
|
||||
_rt_acr0 = __RAMBAR0 + 0x818; /* 004 */
|
||||
_rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */
|
||||
_rt_acr2 = __RAMBAR0 + 0x820; /* 006 */
|
||||
_rt_acr3 = __RAMBAR0 + 0x824; /* 007 */
|
||||
_rt_mmubar = __RAMBAR0 + 0x828; /* 008 */
|
||||
_rt_sr = __RAMBAR0 + 0x82c;
|
||||
_d0_save = __RAMBAR0 + 0x830;
|
||||
_a7_save = __RAMBAR0 + 0x834;
|
||||
_video_tlb = __RAMBAR0 + 0x838;
|
||||
_video_sbt = __RAMBAR0 + 0x83C;
|
||||
_rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */
|
||||
|
||||
/* RAMBAR0 0 to 0x7FF -> exception vectors */
|
||||
_rt_mod = __RAMBAR0 + 0x800;
|
||||
_rt_ssp = __RAMBAR0 + 0x804;
|
||||
_rt_usp = __RAMBAR0 + 0x808;
|
||||
_rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */
|
||||
_rt_cacr = __RAMBAR0 + 0x810; /* 002 */
|
||||
_rt_asid = __RAMBAR0 + 0x814; /* 003 */
|
||||
_rt_acr0 = __RAMBAR0 + 0x818; /* 004 */
|
||||
_rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */
|
||||
_rt_acr2 = __RAMBAR0 + 0x820; /* 006 */
|
||||
_rt_acr3 = __RAMBAR0 + 0x824; /* 007 */
|
||||
_rt_mmubar = __RAMBAR0 + 0x828; /* 008 */
|
||||
_rt_sr = __RAMBAR0 + 0x82c;
|
||||
_d0_save = __RAMBAR0 + 0x830;
|
||||
_a7_save = __RAMBAR0 + 0x834;
|
||||
_video_tlb = __RAMBAR0 + 0x838;
|
||||
_video_sbt = __RAMBAR0 + 0x83C;
|
||||
_rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */
|
||||
}
|
||||
|
||||
@@ -1,14 +1,16 @@
|
||||
#ifdef MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
#ifdef MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#endif /* MACHINE_M5484LITE */
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
#error unknown machine
|
||||
#endif
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flasher (WX) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000 /* target to load basflash */
|
||||
flasher (WX) : ORIGIN = BFL_TARGET_ADDRESS, LENGTH = 0x00100000 /* target to load basflash */
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
|
||||
@@ -164,11 +164,10 @@ int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags)
|
||||
int taskTableSize, varTabsSize, funcDescTabsSize, contextSavesSize;
|
||||
int taskDescTabSize;
|
||||
|
||||
int i;
|
||||
|
||||
/* check if physical address is aligned on 512 byte boundary */
|
||||
if (((u32)taskTableDest & 0x000001ff) != 0)
|
||||
return(MCD_TABLE_UNALIGNED);
|
||||
if (((u32) taskTableDest & 0x000001ff) != 0)
|
||||
return MCD_TABLE_UNALIGNED;
|
||||
|
||||
MCD_taskTable = taskTableDest; /* set up local pointer to task Table */
|
||||
|
||||
@@ -246,9 +245,9 @@ int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags)
|
||||
entryPtr[i].TDTend = (u32)taskDescTabsOffset - 4;
|
||||
}
|
||||
#ifdef MCD_INCLUDE_EU /* Tack single DMA BDs onto end of code so API controls
|
||||
where they are since DMA might write to them */
|
||||
where they are since DMA might write to them */
|
||||
MCD_relocBuffDesc = (MCD_bufDesc*)(entryPtr[NUMOFVARIANTS - 1].TDTend + 4);
|
||||
#else /* DMA does not touch them so they can be wherever and we don't need to
|
||||
#else /* DMA does not touch them so they can be wherever and we don't need to
|
||||
waste SRAM on them */
|
||||
MCD_relocBuffDesc = MCD_singleBufDescs;
|
||||
#endif
|
||||
@@ -300,7 +299,7 @@ int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags)
|
||||
else
|
||||
MCD_dmaBar->ptdControl |= PTD_CTL_COMM_PREFETCH;
|
||||
|
||||
return(MCD_OK);
|
||||
return MCD_OK;
|
||||
}
|
||||
/*********************** End of MCD_initDma() ***********************/
|
||||
|
||||
@@ -379,14 +378,14 @@ int MCD_startDma (
|
||||
|
||||
if((channel < 0) || (channel >= NCHANNELS))
|
||||
return(MCD_CHANNEL_INVALID);
|
||||
|
||||
/* tbd - need to determine the proper response to a bad funcDesc when not
|
||||
|
||||
/* tbd - need to determine the proper response to a bad funcDesc when not
|
||||
including EU functions, for now, assign a benign funcDesc, but maybe
|
||||
should return an error */
|
||||
#ifndef MCD_INCLUDE_EU
|
||||
funcDesc = MCD_FUNC_NOEU1;
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef MCD_DEBUG
|
||||
printf("startDma:Setting up params\n");
|
||||
#endif
|
||||
@@ -547,7 +546,7 @@ printf("startDma:Setting up params\n");
|
||||
}
|
||||
}
|
||||
MCD_chStatus[channel] = MCD_IDLE;
|
||||
return(MCD_OK);
|
||||
return MCD_OK;
|
||||
}
|
||||
|
||||
/************************ End of MCD_startDma() *********************/
|
||||
@@ -562,7 +561,7 @@ printf("startDma:Setting up params\n");
|
||||
* Notes:
|
||||
* MCD_XferProgrQuery() upon completing or after aborting a DMA, or
|
||||
* while the DMA is in progress, this function returns the first
|
||||
* DMA-destination address not (or not yet) used in the DMA. When
|
||||
* DMA-destination address not (or not yet) used in the DMA. When
|
||||
* encountering a non-ready buffer descriptor, the information for
|
||||
* the last completed descriptor is returned.
|
||||
*
|
||||
@@ -694,7 +693,7 @@ int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep)
|
||||
default: break;
|
||||
}
|
||||
|
||||
return(MCD_OK);
|
||||
return MCD_OK;
|
||||
}
|
||||
/******************* End of MCD_XferProgrQuery() ********************/
|
||||
|
||||
@@ -753,7 +752,7 @@ int MCD_killDma (int channel)
|
||||
* MCD_XferProgrQuery (channel, &progRep);
|
||||
* progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr;
|
||||
*/
|
||||
return(MCD_OK);
|
||||
return MCD_OK;
|
||||
}
|
||||
/************************ End of MCD_killDma() **********************/
|
||||
|
||||
@@ -776,7 +775,7 @@ int MCD_continDma (int channel)
|
||||
MCD_dmaBar->taskControl[channel] |= TASK_CTL_EN;
|
||||
MCD_chStatus[channel] = MCD_RUNNING;
|
||||
|
||||
return(MCD_OK);
|
||||
return MCD_OK;
|
||||
}
|
||||
/********************** End of MCD_continDma() **********************/
|
||||
|
||||
@@ -808,7 +807,7 @@ int MCD_continDma (int channel)
|
||||
* this means that bits 14 and 0 must enable debug functions before
|
||||
* bits 1 and 2, respectively, have any effect.
|
||||
*
|
||||
* NOTE: It's extremely important to not pause more than one DMA channel
|
||||
* NOTE: It's extremely important to not pause more than one DMA channel
|
||||
* at a time.
|
||||
********************************************************************/
|
||||
|
||||
@@ -839,7 +838,7 @@ int MCD_pauseDma (int channel)
|
||||
* progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr;
|
||||
*/
|
||||
}
|
||||
return(MCD_OK);
|
||||
return MCD_OK;
|
||||
}
|
||||
/************************* End of MCD_pauseDma() ********************/
|
||||
|
||||
@@ -858,7 +857,7 @@ int MCD_resumeDma (int channel)
|
||||
if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN)
|
||||
MCD_resmActions (channel);
|
||||
|
||||
return(MCD_OK);
|
||||
return MCD_OK;
|
||||
}
|
||||
/************************ End of MCD_resumeDma() ********************/
|
||||
|
||||
@@ -881,7 +880,7 @@ int MCD_csumQuery (int channel, u32 *csum)
|
||||
*csum = MCD_relocBuffDesc[channel].csumResult;
|
||||
return(MCD_OK);
|
||||
#else
|
||||
return(MCD_ERROR);
|
||||
return MCD_ERROR;
|
||||
#endif
|
||||
}
|
||||
/*********************** End of MCD_resumeDma() *********************/
|
||||
|
||||
14
dma/dma.c
14
dma/dma.c
@@ -39,13 +39,8 @@
|
||||
#error "unknown machine!"
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
//#define DBG_DMA
|
||||
#ifdef DBG_DMA
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_DMA */
|
||||
#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
//// #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
extern char _SYS_SRAM[];
|
||||
#define SYS_SRAM &_SYS_SRAM[0]
|
||||
@@ -646,8 +641,8 @@ void *dma_memcpy(void *dst, void *src, size_t n)
|
||||
#ifdef DBG_DMA
|
||||
end = MCF_SLT0_SCNT;
|
||||
time = (start - end) / (SYSCLK / 1000) / 1000;
|
||||
#endif /* DBG_DMA */
|
||||
dbg("took %d ms (%f Mbytes/second)\r\n", time, n / (float) time / 1000.0);
|
||||
#endif /* DBG_DMA */
|
||||
|
||||
return dst;
|
||||
}
|
||||
@@ -674,9 +669,6 @@ int dma_init(void)
|
||||
dma_channel[i].handler = NULL;
|
||||
}
|
||||
|
||||
// test
|
||||
dma_memcpy((void *) 0x10000, (void *) 0x03e00000, 0x00100000); /* copy one megabyte of flash to RAM */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
1018
exe/basflash.c
1018
exe/basflash.c
File diff suppressed because it is too large
Load Diff
@@ -23,20 +23,21 @@
|
||||
|
||||
#include <bas_types.h>
|
||||
|
||||
static uint32_t ownstack[4096];
|
||||
static uint32_t *stackptr = &ownstack[4095];
|
||||
#define STACKSIZE 16384
|
||||
static uint32_t ownstack[STACKSIZE];
|
||||
static uint32_t *stackptr = &ownstack[STACKSIZE - 1];
|
||||
|
||||
/*
|
||||
* setup our own stack in SDRAM to prevent clashing BaS's in SRAM (size limited).
|
||||
*/
|
||||
void startup(void)
|
||||
{
|
||||
static uint32_t oldstack;
|
||||
static uint32_t oldstack;
|
||||
|
||||
void basflash(void);
|
||||
__asm__ __volatile__("move.l sp,%0\n\t" : "=g"(oldstack) : :);
|
||||
__asm__ __volatile__("move.l %0,sp\n\t" : : "g"(stackptr) : );
|
||||
basflash();
|
||||
__asm__ __volatile__("move.l %0,sp\n\t" : : "g"(oldstack) : "sp");
|
||||
(void) stackptr; /* make compiler happy about unused variables */
|
||||
void basflash(void);
|
||||
__asm__ __volatile__("move.l sp,%0\n\t" : "=g"(oldstack) : :);
|
||||
__asm__ __volatile__("move.l %0,sp\n\t" : : "g"(stackptr) : );
|
||||
basflash();
|
||||
__asm__ __volatile__("move.l %0,sp\n\t" : : "g"(oldstack) : "sp");
|
||||
(void) stackptr; /* make compiler happy about unused variables */
|
||||
}
|
||||
|
||||
580
flash/flash.c
580
flash/flash.c
@@ -1,9 +1,9 @@
|
||||
#include <stddef.h>
|
||||
#include "bas_types.h"
|
||||
|
||||
#if MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#elif MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
@@ -15,8 +15,8 @@
|
||||
|
||||
struct amd_flash_sector_info
|
||||
{
|
||||
uint32_t size; /* sector size in bytes */
|
||||
uint32_t offset; /* offset from base of device */
|
||||
uint32_t size; /* sector size in bytes */
|
||||
uint32_t offset; /* offset from base of device */
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -24,134 +24,134 @@ struct amd_flash_sector_info
|
||||
*/
|
||||
static struct amd_flash_sector_info sector[] =
|
||||
{
|
||||
{ 8 * 1024, 0x00000000 }, /* SA0 */
|
||||
{ 8 * 1024, 0x00008000 }, /* SA1 */
|
||||
{ 8 * 1024, 0x00010000 }, /* SA2 */
|
||||
{ 8 * 1024, 0x00018000 }, /* SA3 */
|
||||
{ 8 * 1024, 0x00020000 }, /* SA4 */
|
||||
{ 8 * 1024, 0x00028000 }, /* SA5 */
|
||||
{ 8 * 1024, 0x00030000 }, /* SA6 */
|
||||
{ 8 * 1024, 0x00038000 }, /* SA7 */
|
||||
{ 8 * 1024, 0x00040000 }, /* SA8 */
|
||||
{ 64 * 1024, 0x00048000 }, /* SA9 */
|
||||
{ 64 * 1024, 0x00050000 }, /* SA10 */
|
||||
{ 64 * 1024, 0x00058000 }, /* SA11 */
|
||||
{ 64 * 1024, 0x00060000 }, /* SA12 */
|
||||
{ 64 * 1024, 0x00068000 }, /* SA13 */
|
||||
{ 64 * 1024, 0x00070000 }, /* SA14 */
|
||||
{ 64 * 1024, 0x00078000 }, /* SA15 */
|
||||
{ 64 * 1024, 0x00080000 }, /* SA16 */
|
||||
{ 64 * 1024, 0x00088000 }, /* SA17 */
|
||||
{ 64 * 1024, 0x00090000 }, /* SA18 */
|
||||
{ 64 * 1024, 0x00098000 }, /* SA19 */
|
||||
{ 64 * 1024, 0x000a0000 }, /* SA20 */
|
||||
{ 64 * 1024, 0x000a8000 }, /* SA21 */
|
||||
{ 64 * 1024, 0x000b0000 }, /* SA22 */
|
||||
{ 64 * 1024, 0x000b8000 }, /* SA23 */
|
||||
{ 64 * 1024, 0x000c0000 }, /* SA24 */
|
||||
{ 64 * 1024, 0x000c8000 }, /* SA25 */
|
||||
{ 64 * 1024, 0x000d0000 }, /* SA26 */
|
||||
{ 64 * 1024, 0x000d8000 }, /* SA27 */
|
||||
{ 64 * 1024, 0x000e0000 }, /* SA28 */
|
||||
{ 64 * 1024, 0x000e8000 }, /* SA29 */
|
||||
{ 64 * 1024, 0x000f0000 }, /* SA30 */
|
||||
{ 64 * 1024, 0x000f8000 }, /* SA31 */
|
||||
{ 64 * 1024, 0x00100000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00108000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00110000 }, /* SA34 */
|
||||
{ 64 * 1024, 0x00118000 }, /* SA35 */
|
||||
{ 64 * 1024, 0x00120000 }, /* SA36 */
|
||||
{ 64 * 1024, 0x00128000 }, /* SA37 */
|
||||
{ 64 * 1024, 0x00130000 }, /* SA38 */
|
||||
{ 64 * 1024, 0x00138000 }, /* SA39 */
|
||||
{ 64 * 1024, 0x00140000 }, /* SA40 */
|
||||
{ 64 * 1024, 0x00148000 }, /* SA41 */
|
||||
{ 64 * 1024, 0x00150000 }, /* SA42 */
|
||||
{ 64 * 1024, 0x00158000 }, /* SA43 */
|
||||
{ 64 * 1024, 0x00160000 }, /* SA44 */
|
||||
{ 64 * 1024, 0x00168000 }, /* SA45 */
|
||||
{ 64 * 1024, 0x00170000 }, /* SA46 */
|
||||
{ 64 * 1024, 0x00178000 }, /* SA47 */
|
||||
{ 64 * 1024, 0x00180000 }, /* SA48 */
|
||||
{ 64 * 1024, 0x00188000 }, /* SA49 */
|
||||
{ 64 * 1024, 0x00190000 }, /* SA50 */
|
||||
{ 64 * 1024, 0x00198000 }, /* SA51 */
|
||||
{ 64 * 1024, 0x001a0000 }, /* SA52 */
|
||||
{ 64 * 1024, 0x001a8000 }, /* SA53 */
|
||||
{ 64 * 1024, 0x001b0000 }, /* SA54 */
|
||||
{ 64 * 1024, 0x001b8000 }, /* SA55 */
|
||||
{ 64 * 1024, 0x001c0000 }, /* SA56 */
|
||||
{ 64 * 1024, 0x001c8000 }, /* SA57 */
|
||||
{ 64 * 1024, 0x001d0000 }, /* SA58 */
|
||||
{ 64 * 1024, 0x001d8000 }, /* SA59 */
|
||||
{ 64 * 1024, 0x001e0000 }, /* SA60 */
|
||||
{ 64 * 1024, 0x001e8000 }, /* SA61 */
|
||||
{ 64 * 1024, 0x001f0000 }, /* SA62 */
|
||||
{ 64 * 1024, 0x001f8000 }, /* SA63 */
|
||||
{ 64 * 1024, 0x00200000 }, /* SA64 */
|
||||
{ 64 * 1024, 0x00208000 }, /* SA65 */
|
||||
{ 64 * 1024, 0x00210000 }, /* SA66 */
|
||||
{ 64 * 1024, 0x00218000 }, /* SA67 */
|
||||
{ 64 * 1024, 0x00220000 }, /* SA68 */
|
||||
{ 64 * 1024, 0x00228000 }, /* SA69 */
|
||||
{ 64 * 1024, 0x00230000 }, /* SA70 */
|
||||
{ 64 * 1024, 0x00238000 }, /* SA71 */
|
||||
{ 64 * 1024, 0x00240000 }, /* SA72 */
|
||||
{ 64 * 1024, 0x00248000 }, /* SA73 */
|
||||
{ 64 * 1024, 0x00250000 }, /* SA74 */
|
||||
{ 64 * 1024, 0x00258000 }, /* SA75 */
|
||||
{ 64 * 1024, 0x00260000 }, /* SA76 */
|
||||
{ 64 * 1024, 0x00268000 }, /* SA77 */
|
||||
{ 64 * 1024, 0x00270000 }, /* SA78 */
|
||||
{ 64 * 1024, 0x00278000 }, /* SA79 */
|
||||
{ 64 * 1024, 0x00280000 }, /* SA80 */
|
||||
{ 64 * 1024, 0x00288000 }, /* SA81 */
|
||||
{ 64 * 1024, 0x00290000 }, /* SA82 */
|
||||
{ 64 * 1024, 0x00298000 }, /* SA83 */
|
||||
{ 64 * 1024, 0x002a0000 }, /* SA84 */
|
||||
{ 64 * 1024, 0x002a8000 }, /* SA85 */
|
||||
{ 64 * 1024, 0x002b0000 }, /* SA86 */
|
||||
{ 64 * 1024, 0x002b8000 }, /* SA87 */
|
||||
{ 64 * 1024, 0x002c0000 }, /* SA88 */
|
||||
{ 64 * 1024, 0x002c8000 }, /* SA89 */
|
||||
{ 64 * 1024, 0x002d0000 }, /* SA90 */
|
||||
{ 64 * 1024, 0x002d8000 }, /* SA91 */
|
||||
{ 64 * 1024, 0x002e0000 }, /* SA92 */
|
||||
{ 64 * 1024, 0x002e8000 }, /* SA93 */
|
||||
{ 64 * 1024, 0x002f0000 }, /* SA94 */
|
||||
{ 64 * 1024, 0x002f8000 }, /* SA95 */
|
||||
{ 64 * 1024, 0x00300000 }, /* SA96 */
|
||||
{ 64 * 1024, 0x00308000 }, /* SA97 */
|
||||
{ 64 * 1024, 0x00310000 }, /* SA98 */
|
||||
{ 64 * 1024, 0x00318000 }, /* SA99 */
|
||||
{ 64 * 1024, 0x00320000 }, /* SA100 */
|
||||
{ 64 * 1024, 0x00328000 }, /* SA101 */
|
||||
{ 64 * 1024, 0x00330000 }, /* SA102 */
|
||||
{ 64 * 1024, 0x00338000 }, /* SA103 */
|
||||
{ 64 * 1024, 0x00340000 }, /* SA104 */
|
||||
{ 64 * 1024, 0x00348000 }, /* SA105 */
|
||||
{ 64 * 1024, 0x00350000 }, /* SA106 */
|
||||
{ 64 * 1024, 0x00358000 }, /* SA107 */
|
||||
{ 64 * 1024, 0x00360000 }, /* SA108 */
|
||||
{ 64 * 1024, 0x00368000 }, /* SA109 */
|
||||
{ 64 * 1024, 0x00370000 }, /* SA110 */
|
||||
{ 64 * 1024, 0x00378000 }, /* SA111 */
|
||||
{ 64 * 1024, 0x00380000 }, /* SA112 */
|
||||
{ 64 * 1024, 0x00388000 }, /* SA113 */
|
||||
{ 64 * 1024, 0x00390000 }, /* SA114 */
|
||||
{ 64 * 1024, 0x00398000 }, /* SA115 */
|
||||
{ 64 * 1024, 0x003a0000 }, /* SA116 */
|
||||
{ 64 * 1024, 0x003a8000 }, /* SA117 */
|
||||
{ 64 * 1024, 0x003b0000 }, /* SA118 */
|
||||
{ 64 * 1024, 0x003b8000 }, /* SA119 */
|
||||
{ 64 * 1024, 0x003c0000 }, /* SA120 */
|
||||
{ 64 * 1024, 0x003c8000 }, /* SA121 */
|
||||
{ 64 * 1024, 0x003d0000 }, /* SA122 */
|
||||
{ 64 * 1024, 0x003d8000 }, /* SA123 */
|
||||
{ 64 * 1024, 0x003e0000 }, /* SA124 */
|
||||
{ 64 * 1024, 0x003e8000 }, /* SA125 */
|
||||
{ 64 * 1024, 0x003f0000 }, /* SA126 */
|
||||
{ 64 * 1024, 0x003f8000 }, /* SA127 */
|
||||
{ 8 * 1024, 0x00000000 }, /* SA0 */
|
||||
{ 8 * 1024, 0x00008000 }, /* SA1 */
|
||||
{ 8 * 1024, 0x00010000 }, /* SA2 */
|
||||
{ 8 * 1024, 0x00018000 }, /* SA3 */
|
||||
{ 8 * 1024, 0x00020000 }, /* SA4 */
|
||||
{ 8 * 1024, 0x00028000 }, /* SA5 */
|
||||
{ 8 * 1024, 0x00030000 }, /* SA6 */
|
||||
{ 8 * 1024, 0x00038000 }, /* SA7 */
|
||||
{ 8 * 1024, 0x00040000 }, /* SA8 */
|
||||
{ 64 * 1024, 0x00048000 }, /* SA9 */
|
||||
{ 64 * 1024, 0x00050000 }, /* SA10 */
|
||||
{ 64 * 1024, 0x00058000 }, /* SA11 */
|
||||
{ 64 * 1024, 0x00060000 }, /* SA12 */
|
||||
{ 64 * 1024, 0x00068000 }, /* SA13 */
|
||||
{ 64 * 1024, 0x00070000 }, /* SA14 */
|
||||
{ 64 * 1024, 0x00078000 }, /* SA15 */
|
||||
{ 64 * 1024, 0x00080000 }, /* SA16 */
|
||||
{ 64 * 1024, 0x00088000 }, /* SA17 */
|
||||
{ 64 * 1024, 0x00090000 }, /* SA18 */
|
||||
{ 64 * 1024, 0x00098000 }, /* SA19 */
|
||||
{ 64 * 1024, 0x000a0000 }, /* SA20 */
|
||||
{ 64 * 1024, 0x000a8000 }, /* SA21 */
|
||||
{ 64 * 1024, 0x000b0000 }, /* SA22 */
|
||||
{ 64 * 1024, 0x000b8000 }, /* SA23 */
|
||||
{ 64 * 1024, 0x000c0000 }, /* SA24 */
|
||||
{ 64 * 1024, 0x000c8000 }, /* SA25 */
|
||||
{ 64 * 1024, 0x000d0000 }, /* SA26 */
|
||||
{ 64 * 1024, 0x000d8000 }, /* SA27 */
|
||||
{ 64 * 1024, 0x000e0000 }, /* SA28 */
|
||||
{ 64 * 1024, 0x000e8000 }, /* SA29 */
|
||||
{ 64 * 1024, 0x000f0000 }, /* SA30 */
|
||||
{ 64 * 1024, 0x000f8000 }, /* SA31 */
|
||||
{ 64 * 1024, 0x00100000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00108000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00110000 }, /* SA34 */
|
||||
{ 64 * 1024, 0x00118000 }, /* SA35 */
|
||||
{ 64 * 1024, 0x00120000 }, /* SA36 */
|
||||
{ 64 * 1024, 0x00128000 }, /* SA37 */
|
||||
{ 64 * 1024, 0x00130000 }, /* SA38 */
|
||||
{ 64 * 1024, 0x00138000 }, /* SA39 */
|
||||
{ 64 * 1024, 0x00140000 }, /* SA40 */
|
||||
{ 64 * 1024, 0x00148000 }, /* SA41 */
|
||||
{ 64 * 1024, 0x00150000 }, /* SA42 */
|
||||
{ 64 * 1024, 0x00158000 }, /* SA43 */
|
||||
{ 64 * 1024, 0x00160000 }, /* SA44 */
|
||||
{ 64 * 1024, 0x00168000 }, /* SA45 */
|
||||
{ 64 * 1024, 0x00170000 }, /* SA46 */
|
||||
{ 64 * 1024, 0x00178000 }, /* SA47 */
|
||||
{ 64 * 1024, 0x00180000 }, /* SA48 */
|
||||
{ 64 * 1024, 0x00188000 }, /* SA49 */
|
||||
{ 64 * 1024, 0x00190000 }, /* SA50 */
|
||||
{ 64 * 1024, 0x00198000 }, /* SA51 */
|
||||
{ 64 * 1024, 0x001a0000 }, /* SA52 */
|
||||
{ 64 * 1024, 0x001a8000 }, /* SA53 */
|
||||
{ 64 * 1024, 0x001b0000 }, /* SA54 */
|
||||
{ 64 * 1024, 0x001b8000 }, /* SA55 */
|
||||
{ 64 * 1024, 0x001c0000 }, /* SA56 */
|
||||
{ 64 * 1024, 0x001c8000 }, /* SA57 */
|
||||
{ 64 * 1024, 0x001d0000 }, /* SA58 */
|
||||
{ 64 * 1024, 0x001d8000 }, /* SA59 */
|
||||
{ 64 * 1024, 0x001e0000 }, /* SA60 */
|
||||
{ 64 * 1024, 0x001e8000 }, /* SA61 */
|
||||
{ 64 * 1024, 0x001f0000 }, /* SA62 */
|
||||
{ 64 * 1024, 0x001f8000 }, /* SA63 */
|
||||
{ 64 * 1024, 0x00200000 }, /* SA64 */
|
||||
{ 64 * 1024, 0x00208000 }, /* SA65 */
|
||||
{ 64 * 1024, 0x00210000 }, /* SA66 */
|
||||
{ 64 * 1024, 0x00218000 }, /* SA67 */
|
||||
{ 64 * 1024, 0x00220000 }, /* SA68 */
|
||||
{ 64 * 1024, 0x00228000 }, /* SA69 */
|
||||
{ 64 * 1024, 0x00230000 }, /* SA70 */
|
||||
{ 64 * 1024, 0x00238000 }, /* SA71 */
|
||||
{ 64 * 1024, 0x00240000 }, /* SA72 */
|
||||
{ 64 * 1024, 0x00248000 }, /* SA73 */
|
||||
{ 64 * 1024, 0x00250000 }, /* SA74 */
|
||||
{ 64 * 1024, 0x00258000 }, /* SA75 */
|
||||
{ 64 * 1024, 0x00260000 }, /* SA76 */
|
||||
{ 64 * 1024, 0x00268000 }, /* SA77 */
|
||||
{ 64 * 1024, 0x00270000 }, /* SA78 */
|
||||
{ 64 * 1024, 0x00278000 }, /* SA79 */
|
||||
{ 64 * 1024, 0x00280000 }, /* SA80 */
|
||||
{ 64 * 1024, 0x00288000 }, /* SA81 */
|
||||
{ 64 * 1024, 0x00290000 }, /* SA82 */
|
||||
{ 64 * 1024, 0x00298000 }, /* SA83 */
|
||||
{ 64 * 1024, 0x002a0000 }, /* SA84 */
|
||||
{ 64 * 1024, 0x002a8000 }, /* SA85 */
|
||||
{ 64 * 1024, 0x002b0000 }, /* SA86 */
|
||||
{ 64 * 1024, 0x002b8000 }, /* SA87 */
|
||||
{ 64 * 1024, 0x002c0000 }, /* SA88 */
|
||||
{ 64 * 1024, 0x002c8000 }, /* SA89 */
|
||||
{ 64 * 1024, 0x002d0000 }, /* SA90 */
|
||||
{ 64 * 1024, 0x002d8000 }, /* SA91 */
|
||||
{ 64 * 1024, 0x002e0000 }, /* SA92 */
|
||||
{ 64 * 1024, 0x002e8000 }, /* SA93 */
|
||||
{ 64 * 1024, 0x002f0000 }, /* SA94 */
|
||||
{ 64 * 1024, 0x002f8000 }, /* SA95 */
|
||||
{ 64 * 1024, 0x00300000 }, /* SA96 */
|
||||
{ 64 * 1024, 0x00308000 }, /* SA97 */
|
||||
{ 64 * 1024, 0x00310000 }, /* SA98 */
|
||||
{ 64 * 1024, 0x00318000 }, /* SA99 */
|
||||
{ 64 * 1024, 0x00320000 }, /* SA100 */
|
||||
{ 64 * 1024, 0x00328000 }, /* SA101 */
|
||||
{ 64 * 1024, 0x00330000 }, /* SA102 */
|
||||
{ 64 * 1024, 0x00338000 }, /* SA103 */
|
||||
{ 64 * 1024, 0x00340000 }, /* SA104 */
|
||||
{ 64 * 1024, 0x00348000 }, /* SA105 */
|
||||
{ 64 * 1024, 0x00350000 }, /* SA106 */
|
||||
{ 64 * 1024, 0x00358000 }, /* SA107 */
|
||||
{ 64 * 1024, 0x00360000 }, /* SA108 */
|
||||
{ 64 * 1024, 0x00368000 }, /* SA109 */
|
||||
{ 64 * 1024, 0x00370000 }, /* SA110 */
|
||||
{ 64 * 1024, 0x00378000 }, /* SA111 */
|
||||
{ 64 * 1024, 0x00380000 }, /* SA112 */
|
||||
{ 64 * 1024, 0x00388000 }, /* SA113 */
|
||||
{ 64 * 1024, 0x00390000 }, /* SA114 */
|
||||
{ 64 * 1024, 0x00398000 }, /* SA115 */
|
||||
{ 64 * 1024, 0x003a0000 }, /* SA116 */
|
||||
{ 64 * 1024, 0x003a8000 }, /* SA117 */
|
||||
{ 64 * 1024, 0x003b0000 }, /* SA118 */
|
||||
{ 64 * 1024, 0x003b8000 }, /* SA119 */
|
||||
{ 64 * 1024, 0x003c0000 }, /* SA120 */
|
||||
{ 64 * 1024, 0x003c8000 }, /* SA121 */
|
||||
{ 64 * 1024, 0x003d0000 }, /* SA122 */
|
||||
{ 64 * 1024, 0x003d8000 }, /* SA123 */
|
||||
{ 64 * 1024, 0x003e0000 }, /* SA124 */
|
||||
{ 64 * 1024, 0x003e8000 }, /* SA125 */
|
||||
{ 64 * 1024, 0x003f0000 }, /* SA126 */
|
||||
{ 64 * 1024, 0x003f8000 }, /* SA127 */
|
||||
};
|
||||
|
||||
static const int AMD_FLASH_SECTORS = sizeof(sector) / sizeof(struct amd_flash_sector_info);
|
||||
@@ -166,17 +166,17 @@ static AMD_FLASH_CELL *pFlash;
|
||||
|
||||
typedef struct romram
|
||||
{
|
||||
uint32_t flash_address;
|
||||
uint32_t ram_address;
|
||||
char *name;
|
||||
uint32_t flash_address;
|
||||
uint32_t ram_address;
|
||||
char *name;
|
||||
} ROMRAM;
|
||||
|
||||
static const struct romram flash_areas[] =
|
||||
{
|
||||
{ 0xe0000000, 0x00e00000, "BaS" }, /* BaS */
|
||||
{ 0xe0600000, 0x00e00000, "EmuTOS" }, /* EmuTOS */
|
||||
{ 0xe0400000, 0x00e00000, "FireTOS" }, /* FireTOS */
|
||||
{ 0xe0700000, 0x00e00000, "FPGA" }, /* FPGA config */
|
||||
{ 0xe0000000, 0x00e00000, "BaS" }, /* BaS */
|
||||
{ 0xe0600000, 0x00e00000, "EmuTOS" }, /* EmuTOS */
|
||||
{ 0xe0400000, 0x00e00000, "FireTOS" }, /* FireTOS */
|
||||
{ 0xe0700000, 0x00e00000, "FPGA" }, /* FPGA config */
|
||||
};
|
||||
static const int num_flash_areas = sizeof(flash_areas) / sizeof(struct romram);
|
||||
|
||||
@@ -191,191 +191,193 @@ static const int num_flash_areas = sizeof(flash_areas) / sizeof(struct romram);
|
||||
*/
|
||||
void amd_flash_sector_erase(int n)
|
||||
{
|
||||
volatile AMD_FLASH_CELL status;
|
||||
volatile AMD_FLASH_CELL status;
|
||||
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[SADDR(n)] = AMD_FLASH_CMD_DATA(0x30);
|
||||
(void) num_flash_areas; /* to make compiler happy */
|
||||
|
||||
do
|
||||
status = pFlash[SADDR(n)];
|
||||
while ((status & AMD_FLASH_CMD_DATA(0x80)) != AMD_FLASH_CMD_DATA(0x80));
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[SADDR(n)] = AMD_FLASH_CMD_DATA(0x30);
|
||||
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
do
|
||||
status = pFlash[SADDR(n)];
|
||||
while ((status & AMD_FLASH_CMD_DATA(0x80)) != AMD_FLASH_CMD_DATA(0x80));
|
||||
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
}
|
||||
|
||||
int amd_flash_erase(void *start, int bytes, void (*putchar)(int))
|
||||
{
|
||||
int i, ebytes = 0;
|
||||
int i, ebytes = 0;
|
||||
|
||||
if (bytes == 0)
|
||||
return 0;
|
||||
if (bytes == 0)
|
||||
return 0;
|
||||
|
||||
for (i = 0; i < AMD_FLASH_SECTORS; i++)
|
||||
{
|
||||
if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
|
||||
start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
for (i = 0; i < AMD_FLASH_SECTORS; i++)
|
||||
{
|
||||
if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
|
||||
start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
while (ebytes < bytes)
|
||||
{
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar('.');
|
||||
}
|
||||
amd_flash_sector_erase(i);
|
||||
ebytes += SSIZE(i);
|
||||
i++;
|
||||
}
|
||||
while (ebytes < bytes)
|
||||
{
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar('.');
|
||||
}
|
||||
amd_flash_sector_erase(i);
|
||||
ebytes += SSIZE(i);
|
||||
i++;
|
||||
}
|
||||
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar(10); /* LF */
|
||||
putchar(13); /* CR */
|
||||
}
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar(10); /* LF */
|
||||
putchar(13); /* CR */
|
||||
}
|
||||
|
||||
return ebytes;
|
||||
return ebytes;
|
||||
}
|
||||
|
||||
void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
|
||||
{
|
||||
volatile AMD_FLASH_CELL status;
|
||||
int retry;
|
||||
volatile AMD_FLASH_CELL status;
|
||||
int retry;
|
||||
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xA0);
|
||||
*dst = data;
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xA0);
|
||||
*dst = data;
|
||||
|
||||
/*
|
||||
* Wait for program operation to finish
|
||||
* (Data# Polling Algorithm)
|
||||
*/
|
||||
retry = 0;
|
||||
while (1)
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
if (status & AMD_FLASH_CMD_DATA(0x20))
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
if (++retry > 1024)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Wait for program operation to finish
|
||||
* (Data# Polling Algorithm)
|
||||
*/
|
||||
retry = 0;
|
||||
while (1)
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
if (status & AMD_FLASH_CMD_DATA(0x20))
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
if (++retry > 1024)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int amd_flash_program(void *dest, void *source, int bytes, int erase, void (*func)(void), void (*putchar)(int))
|
||||
{
|
||||
AMD_FLASH_CELL *src;
|
||||
AMD_FLASH_CELL *dst;
|
||||
int hashi = 1;
|
||||
int hashj = 0;
|
||||
char hash[5];
|
||||
AMD_FLASH_CELL *src;
|
||||
AMD_FLASH_CELL *dst;
|
||||
int hashi = 1;
|
||||
int hashj = 0;
|
||||
char hash[5];
|
||||
|
||||
hash[0] = 8; /* Backspace */
|
||||
hash[1] = 124;/* "|" */
|
||||
hash[2] = 47; /* "/" */
|
||||
hash[3] = 45; /* "-" */
|
||||
hash[4] = 92; /* "\" */
|
||||
hash[0] = 8; /* Backspace */
|
||||
hash[1] = 124;/* "|" */
|
||||
hash[2] = 47; /* "/" */
|
||||
hash[3] = 45; /* "-" */
|
||||
hash[4] = 92; /* "\" */
|
||||
|
||||
src = (AMD_FLASH_CELL *)source;
|
||||
dst = (AMD_FLASH_CELL *)dest;
|
||||
src = (AMD_FLASH_CELL *)source;
|
||||
dst = (AMD_FLASH_CELL *)dest;
|
||||
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
|
||||
/*
|
||||
* Erase device if necessary
|
||||
*/
|
||||
if (erase)
|
||||
{
|
||||
amd_flash_erase(dest, bytes, putchar);
|
||||
}
|
||||
/*
|
||||
* Erase device if necessary
|
||||
*/
|
||||
if (erase)
|
||||
{
|
||||
amd_flash_erase(dest, bytes, putchar);
|
||||
}
|
||||
|
||||
/*
|
||||
* Program device
|
||||
*/
|
||||
while (bytes > 0)
|
||||
{
|
||||
amd_flash_program_cell(dst, *src);
|
||||
/*
|
||||
* Program device
|
||||
*/
|
||||
while (bytes > 0)
|
||||
{
|
||||
amd_flash_program_cell(dst, *src);
|
||||
|
||||
/* Verify Write */
|
||||
if (*dst == *src)
|
||||
{
|
||||
bytes -= AMD_FLASH_CELL_BYTES;
|
||||
*dst++, *src++;
|
||||
/* Verify Write */
|
||||
if (*dst == *src)
|
||||
{
|
||||
bytes -= AMD_FLASH_CELL_BYTES;
|
||||
*dst++, *src++;
|
||||
|
||||
if ((putchar != NULL))
|
||||
{
|
||||
/* Hash marks to indicate progress */
|
||||
if (hashj == 0x1000)
|
||||
{
|
||||
hashj = -1;
|
||||
putchar(hash[0]);
|
||||
putchar(hash[hashi]);
|
||||
if ((putchar != NULL))
|
||||
{
|
||||
/* Hash marks to indicate progress */
|
||||
if (hashj == 0x1000)
|
||||
{
|
||||
hashj = -1;
|
||||
putchar(hash[0]);
|
||||
putchar(hash[hashi]);
|
||||
|
||||
hashi++;
|
||||
if (hashi == 5)
|
||||
{
|
||||
hashi = 1;
|
||||
}
|
||||
hashi++;
|
||||
if (hashi == 5)
|
||||
{
|
||||
hashi = 1;
|
||||
}
|
||||
|
||||
}
|
||||
hashj++;
|
||||
}
|
||||
}
|
||||
else
|
||||
break;
|
||||
}
|
||||
}
|
||||
hashj++;
|
||||
}
|
||||
}
|
||||
else
|
||||
break;
|
||||
}
|
||||
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar(hash[0]);
|
||||
}
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar(hash[0]);
|
||||
}
|
||||
|
||||
/*
|
||||
* If a function was passed in, call it now
|
||||
*/
|
||||
if ((func != NULL))
|
||||
{
|
||||
func();
|
||||
}
|
||||
/*
|
||||
* If a function was passed in, call it now
|
||||
*/
|
||||
if ((func != NULL))
|
||||
{
|
||||
func();
|
||||
}
|
||||
|
||||
return ((int)src - (int)source);
|
||||
return ((int)src - (int)source);
|
||||
}
|
||||
|
||||
|
||||
@@ -31,8 +31,12 @@
|
||||
#include "diskio.h"
|
||||
#include "ff.h"
|
||||
#include "s19reader.h"
|
||||
#include "dma.h"
|
||||
#include "cache.h"
|
||||
|
||||
// #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
/*
|
||||
* Yes, I know. The following doesn't really look like code should look like...
|
||||
*
|
||||
@@ -40,33 +44,33 @@
|
||||
* and finally ended up with this. Not nice, put paid (and working).
|
||||
*
|
||||
*/
|
||||
#define SREC_TYPE(a) (a)[0] /* type of record */
|
||||
#define SREC_COUNT(a) (a)[1] /* length of valid bytes to follow */
|
||||
#define SREC_ADDR16(a) (256 * (a)[2] + (a)[3]) /* 2 byte address field */
|
||||
#define SREC_ADDR24(a) (0x10000 * (a)[2] + 0x100 * \
|
||||
(a)[3] + (a)[4]) /* 3 byte address field */
|
||||
#define SREC_TYPE(a) (a)[0] /* type of record */
|
||||
#define SREC_COUNT(a) (a)[1] /* length of valid bytes to follow */
|
||||
#define SREC_ADDR16(a) (256 * (a)[2] + (a)[3]) /* 2 byte address field */
|
||||
#define SREC_ADDR24(a) (0x10000 * (a)[2] + 0x100 * \
|
||||
(a)[3] + (a)[4]) /* 3 byte address field */
|
||||
#define SREC_ADDR32(a) (0x1000000 * a[2] + 0x10000 * \
|
||||
a[3] + 0x100 * (a)[4] + (a)[5]) /* 4 byte address field */
|
||||
#define SREC_DATA16(a) ((uint8_t *)&((a)[4])) /* address of first byte of data in a record */
|
||||
#define SREC_DATA24(a) ((uint8_t *)&((a)[5])) /* address of first data byte in 24 bit record */
|
||||
#define SREC_DATA32(a) ((uint8_t *)&((a)[6])) /* adress of first byte of a record with 32 bit address field */
|
||||
#define SREC_DATA16_SIZE(a) (SREC_COUNT((a)) - 3) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA24_SIZE(a) (SREC_COUNT((a)) - 4) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA32_SIZE(a) (SREC_COUNT((a)) - 5) /* length of the data[] array without the checksum field */
|
||||
#define SREC_CHECKSUM(a) (a)[SREC_COUNT(a) + 2 - 1] /* record's checksum (two's complement of the sum of all bytes) */
|
||||
(a)[3] + 0x100 * (a)[4] + (a)[5]) /* 4 byte address field */
|
||||
#define SREC_DATA16(a) ((uint8_t *)&((a)[4])) /* address of first byte of data in a record */
|
||||
#define SREC_DATA24(a) ((uint8_t *)&((a)[5])) /* address of first data byte in 24 bit record */
|
||||
#define SREC_DATA32(a) ((uint8_t *)&((a)[6])) /* adress of first byte of a record with 32 bit address field */
|
||||
#define SREC_DATA16_SIZE(a) (SREC_COUNT((a)) - 3) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA24_SIZE(a) (SREC_COUNT((a)) - 4) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA32_SIZE(a) (SREC_COUNT((a)) - 5) /* length of the data[] array without the checksum field */
|
||||
#define SREC_CHECKSUM(a) (a)[SREC_COUNT(a) + 2 - 1] /* record's checksum (two's complement of the sum of all bytes) */
|
||||
|
||||
/*
|
||||
* convert a single hex character into byte
|
||||
*/
|
||||
static uint8_t nibble_to_byte(uint8_t nibble)
|
||||
{
|
||||
if ((nibble >= '0') && (nibble <= '9'))
|
||||
return nibble - '0';
|
||||
else if ((nibble >= 'A' && nibble <= 'F'))
|
||||
return 10 + nibble - 'A';
|
||||
else if ((nibble >= 'a' && nibble <= 'f'))
|
||||
return 10 + nibble - 'a';
|
||||
return 0;
|
||||
if ((nibble >= '0') && (nibble <= '9'))
|
||||
return nibble - '0';
|
||||
else if ((nibble >= 'A' && nibble <= 'F'))
|
||||
return 10 + nibble - 'A';
|
||||
else if ((nibble >= 'a' && nibble <= 'f'))
|
||||
return 10 + nibble - 'a';
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -74,7 +78,7 @@ static uint8_t nibble_to_byte(uint8_t nibble)
|
||||
*/
|
||||
static uint8_t hex_to_byte(uint8_t hex[2])
|
||||
{
|
||||
return 16 * (nibble_to_byte(hex[0])) + (nibble_to_byte(hex[1]));
|
||||
return 16 * (nibble_to_byte(hex[0])) + (nibble_to_byte(hex[1]));
|
||||
}
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
@@ -83,7 +87,7 @@ static uint8_t hex_to_byte(uint8_t hex[2])
|
||||
*/
|
||||
static uint16_t hex_to_word(uint8_t hex[4])
|
||||
{
|
||||
return 256 * hex_to_byte(&hex[0]) + hex_to_byte(&hex[2]);
|
||||
return 256 * hex_to_byte(&hex[0]) + hex_to_byte(&hex[2]);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -91,7 +95,7 @@ static uint16_t hex_to_word(uint8_t hex[4])
|
||||
*/
|
||||
static uint32_t hex_to_long(uint8_t hex[8])
|
||||
{
|
||||
return 65536 * hex_to_word(&hex[0]) + hex_to_word(&hex[4]);
|
||||
return 65536 * hex_to_word(&hex[0]) + hex_to_word(&hex[4]);
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
@@ -102,47 +106,47 @@ static uint32_t hex_to_long(uint8_t hex[8])
|
||||
*/
|
||||
static uint8_t checksum(uint8_t arr[])
|
||||
{
|
||||
int i;
|
||||
uint8_t checksum = SREC_COUNT(arr);
|
||||
int i;
|
||||
uint8_t cs = SREC_COUNT(arr);
|
||||
|
||||
for (i = 0; i < SREC_COUNT(arr) - 1; i++)
|
||||
{
|
||||
checksum += arr[i + 2];
|
||||
}
|
||||
return ~checksum;
|
||||
for (i = 0; i < SREC_COUNT(arr) - 1; i++)
|
||||
{
|
||||
cs += arr[i + 2];
|
||||
}
|
||||
return ~cs;
|
||||
}
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
void print_record(uint8_t *arr)
|
||||
{
|
||||
switch (SREC_TYPE(arr))
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR16(arr));
|
||||
xprintf("module %11.11s ", SREC_DATA16(arr));
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
switch (SREC_TYPE(arr))
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR16(arr));
|
||||
xprintf("module %11.11s ", SREC_DATA16(arr));
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
|
||||
case 3:
|
||||
case 7:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR32(arr));
|
||||
xprintf("data %02x,%02x,%02x,%02x,... ",
|
||||
SREC_DATA32(arr)[0], SREC_DATA32(arr)[1], SREC_DATA32(arr)[3], SREC_DATA32(arr)[4]);
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
case 3:
|
||||
case 7:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR32(arr));
|
||||
xprintf("data %02x,%02x,%02x,%02x,... ",
|
||||
SREC_DATA32(arr)[0], SREC_DATA32(arr)[1], SREC_DATA32(arr)[3], SREC_DATA32(arr)[4]);
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
xprintf("unsupported report type %d in print_record\r\n", arr[0]);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
xprintf("unsupported report type %d in print_record\r\n", arr[0]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
@@ -151,21 +155,21 @@ void print_record(uint8_t *arr)
|
||||
*/
|
||||
static void line_to_vector(uint8_t *buff, uint8_t *vector)
|
||||
{
|
||||
int i;
|
||||
int length;
|
||||
uint8_t *vp = vector;
|
||||
int i;
|
||||
int length;
|
||||
uint8_t *vp = vector;
|
||||
|
||||
length = hex_to_byte(buff + 2);
|
||||
length = hex_to_byte(buff + 2);
|
||||
|
||||
buff++;
|
||||
*vp++ = nibble_to_byte(*buff); /* record type. Only one single nibble */
|
||||
buff++;
|
||||
buff++;
|
||||
*vp++ = nibble_to_byte(*buff); /* record type. Only one single nibble */
|
||||
buff++;
|
||||
|
||||
for (i = 0; i <= length; i++)
|
||||
{
|
||||
*vp++ = hex_to_byte(buff);
|
||||
buff += 2;
|
||||
}
|
||||
for (i = 0; i <= length; i++)
|
||||
{
|
||||
*vp++ = hex_to_byte(buff);
|
||||
buff += 2;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -189,114 +193,122 @@ static void line_to_vector(uint8_t *buff, uint8_t *vector)
|
||||
*/
|
||||
err_t read_srecords(char *filename, void **start_address, uint32_t *actual_length, memcpy_callback_t callback)
|
||||
{
|
||||
FRESULT fres;
|
||||
FIL file;
|
||||
err_t ret = OK;
|
||||
FRESULT fres;
|
||||
FIL file;
|
||||
err_t ret = OK;
|
||||
uint32_t length = 0;
|
||||
|
||||
if ((fres = f_open(&file, filename, FA_READ) == FR_OK))
|
||||
{
|
||||
uint8_t line[80];
|
||||
int lineno = 0;
|
||||
int data_records = 0;
|
||||
bool found_block_header = false;
|
||||
bool found_block_end = false;
|
||||
bool found_block_data = false;
|
||||
if ((fres = f_open(&file, filename, FA_READ) == FR_OK))
|
||||
{
|
||||
uint8_t line[255];
|
||||
int lineno = 0;
|
||||
int data_records = 0;
|
||||
bool found_block_header = false;
|
||||
bool found_block_end = false;
|
||||
bool found_block_data = false;
|
||||
|
||||
while (ret == OK && (uint8_t *) f_gets((char *) line, sizeof(line), &file) != NULL)
|
||||
{
|
||||
lineno++;
|
||||
uint8_t vector[80];
|
||||
*actual_length = 0;
|
||||
|
||||
line_to_vector(line, vector); /* vector now contains the decoded contents of line, from line[1] on */
|
||||
while (ret == OK && (uint8_t *) f_gets((char *) line, sizeof(line), &file) != NULL)
|
||||
{
|
||||
lineno++;
|
||||
uint8_t vector[80];
|
||||
|
||||
if (line[0] == 'S')
|
||||
{
|
||||
if (SREC_CHECKSUM(vector) != checksum(vector))
|
||||
{
|
||||
xprintf("invalid checksum 0x%x (should be 0x%x) in line %d\r\n",
|
||||
SREC_CHECKSUM(vector), checksum(vector), lineno);
|
||||
ret = FAIL;
|
||||
}
|
||||
memset(vector, 0, sizeof(vector));
|
||||
line_to_vector(line, vector); /* vector now contains the decoded contents of line, from line[1] on */
|
||||
|
||||
switch (vector[0])
|
||||
{
|
||||
case 0: /* block header */
|
||||
found_block_header = true;
|
||||
if (found_block_data || found_block_end)
|
||||
{
|
||||
xprintf("S7 or S3 record found before S0: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
if (line[0] == 'S')
|
||||
{
|
||||
if (SREC_CHECKSUM(vector) != checksum(vector))
|
||||
{
|
||||
xprintf("invalid checksum 0x%x (should be 0x%x) in line %d\r\n",
|
||||
SREC_CHECKSUM(vector), checksum(vector), lineno);
|
||||
ret = FAIL;
|
||||
}
|
||||
|
||||
break;
|
||||
switch (vector[0])
|
||||
{
|
||||
case 0: /* block header */
|
||||
found_block_header = true;
|
||||
if (found_block_data || found_block_end)
|
||||
{
|
||||
xprintf("S7 or S3 record found before S0: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
|
||||
case 2: /* three byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
ret = callback((uint8_t *) SREC_ADDR24(vector), SREC_DATA24(vector), SREC_DATA24_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
break;
|
||||
|
||||
case 3: /* four byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
ret = callback((uint8_t *) SREC_ADDR32(vector), SREC_DATA32(vector), SREC_DATA32_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
case 2: /* three byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S2 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
ret = callback((uint8_t *) SREC_ADDR24(vector), SREC_DATA24(vector), SREC_DATA24_SIZE(vector));
|
||||
length += SREC_DATA24_SIZE(vector);
|
||||
data_records++;
|
||||
break;
|
||||
|
||||
case 7: /* four byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S7 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR32(vector);
|
||||
}
|
||||
break;
|
||||
case 3: /* four byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
length += SREC_DATA32_SIZE(vector);
|
||||
ret = callback((uint8_t *) SREC_ADDR32(vector), SREC_DATA32(vector), SREC_DATA32_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
|
||||
case 8: /* three byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S8 record found before S0 or after S8: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR24(vector);
|
||||
}
|
||||
break;
|
||||
case 7: /* four byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S7 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR32(vector);
|
||||
xprintf("%d blocks read. Found start address %p\r\n", data_records, *start_address);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
xprintf("unsupported record type (%d) found in line %d\r\n", vector[0], lineno);
|
||||
xprintf("offending line: \r\n");
|
||||
xprintf("%s\r\n", line);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("illegal character ('%c') found on line %d: S-records corrupt?\r\n", line[0], lineno);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
f_close(&file);
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("could not open file %s\r\n", filename);
|
||||
ret = FILE_OPEN;
|
||||
}
|
||||
return ret;
|
||||
case 8: /* three byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S8 record found before S0 or after S8: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S8 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR24(vector);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
xprintf("unsupported record type (%d) found in line %d\r\n", vector[0], lineno);
|
||||
xprintf("offending line: \r\n");
|
||||
xprintf("%s\r\n", line);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("illegal character ('%c') found on line %d: S-records corrupt?\r\n", line[0], lineno);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
f_close(&file);
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("could not open file %s\r\n", filename);
|
||||
ret = FILE_OPEN;
|
||||
}
|
||||
*actual_length = length;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -304,21 +316,21 @@ err_t read_srecords(char *filename, void **start_address, uint32_t *actual_lengt
|
||||
*/
|
||||
static err_t simulate()
|
||||
{
|
||||
err_t ret = OK;
|
||||
err_t ret = OK;
|
||||
|
||||
return ret;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
{
|
||||
err_t ret = OK;
|
||||
err_t ret = OK;
|
||||
|
||||
/* TODO: do the actual flash */
|
||||
amd_flash_program(dst, src, length, false, NULL, xputchar);
|
||||
/* TODO: do the actual flash */
|
||||
amd_flash_program(dst, src, length, false, NULL, xputchar);
|
||||
|
||||
return ret;
|
||||
return ret;
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
@@ -326,104 +338,112 @@ static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
/*
|
||||
* this callback verifies the data against the S-record file contents after a write to destination
|
||||
*/
|
||||
static err_t verify(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
static err_t verify(uint8_t *dst, uint8_t *src, size_t length)
|
||||
{
|
||||
uint8_t *end = src + length;
|
||||
uint8_t *end = src + length;
|
||||
|
||||
do
|
||||
{
|
||||
if (*src++ != *dst++)
|
||||
return FAIL;
|
||||
} while (src < end);
|
||||
do
|
||||
{
|
||||
if (*src++ != *dst++)
|
||||
{
|
||||
xprintf("data differs at %p (expected 0x%02x, got 0x%02x)\r\n",
|
||||
*(src - 1), *(dst - 1));
|
||||
return FAIL;
|
||||
}
|
||||
} while (src < end);
|
||||
|
||||
return OK;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/*
|
||||
* needed to avoid missing type cast warning below
|
||||
*/
|
||||
static inline err_t srec_memcpy(uint8_t *dst, uint8_t *src, size_t n)
|
||||
err_t srec_memcpy(uint8_t *dst, uint8_t *src, size_t n)
|
||||
{
|
||||
err_t e = OK;
|
||||
err_t e = OK;
|
||||
|
||||
memcpy((void *) dst, (void *) src, n);
|
||||
return e;
|
||||
xprintf(".");
|
||||
dbg("\r\ncopy from %p to %p, length %d", src, dst, n);
|
||||
// dma_memcpy((void *) dst, (void *) src, n);
|
||||
memcpy((void *) dst, (void *) src, n);
|
||||
return e;
|
||||
}
|
||||
|
||||
void srec_execute(char *flasher_filename)
|
||||
{
|
||||
DRESULT res;
|
||||
FRESULT fres;
|
||||
FATFS fs;
|
||||
FIL file;
|
||||
err_t err;
|
||||
void *start_address;
|
||||
uint32_t length;
|
||||
DRESULT res;
|
||||
FRESULT fres;
|
||||
FATFS fs;
|
||||
FIL file;
|
||||
err_t err;
|
||||
void *start_address;
|
||||
uint32_t length;
|
||||
|
||||
disk_initialize(0);
|
||||
res = disk_status(0);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
if ((fres = f_open(&file, flasher_filename, FA_READ) != FR_OK))
|
||||
{
|
||||
xprintf("flasher file %s not present on disk\r\n", flasher_filename);
|
||||
}
|
||||
else
|
||||
{
|
||||
f_close(&file);
|
||||
disk_initialize(0);
|
||||
res = disk_status(0);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
if ((fres = f_open(&file, flasher_filename, FA_READ) != FR_OK))
|
||||
{
|
||||
xprintf("flasher file %s not present on disk\r\n", flasher_filename);
|
||||
}
|
||||
else
|
||||
{
|
||||
f_close(&file);
|
||||
|
||||
/* first pass: parse and check for inconsistencies */
|
||||
xprintf("check file integrity: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, simulate);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: copy data to destination */
|
||||
xprintf("OK.\r\ncopy/flash data: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, srec_memcpy);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: verify data */
|
||||
xprintf("OK.\r\nverify data: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, verify);
|
||||
if (err == OK)
|
||||
{
|
||||
xprintf("OK.\r\n");
|
||||
typedef void void_func(void);
|
||||
void_func *func;
|
||||
xprintf("target successfully written and verified. Start address: %p\r\n", start_address);
|
||||
/* first pass: parse and check for inconsistencies */
|
||||
xprintf("check file integrity: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, simulate);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: copy data to destination */
|
||||
xprintf("OK (start address=%p, length = %ld).\r\ncopy data: ", start_address, length);
|
||||
err = read_srecords(flasher_filename, &start_address, &length, srec_memcpy);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: verify data */
|
||||
xprintf("OK.\r\nverify data: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, verify);
|
||||
if (err == OK)
|
||||
{
|
||||
xprintf("OK.\r\n");
|
||||
|
||||
func = start_address;
|
||||
flush_and_invalidate_caches();
|
||||
(*func)();
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not mount FAT FS\r\n");
|
||||
}
|
||||
f_mount(0, NULL);
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not initialize SD card\r\n");
|
||||
}
|
||||
typedef void void_func(void);
|
||||
void_func *func;
|
||||
xprintf("target successfully written and verified. Start address: %p\r\n", start_address);
|
||||
|
||||
func = start_address;
|
||||
flush_and_invalidate_caches();
|
||||
(*func)();
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not mount FAT FS\r\n");
|
||||
}
|
||||
f_mount(0, NULL);
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not initialize SD card\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -11,7 +11,7 @@ wait
|
||||
# use system sdram as flashlib scratch area.
|
||||
# TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
|
||||
# This seems to be related to large flash buffers and PC-relative adressing of the plugin
|
||||
#flash-plugin 0x1000 0xf000 flash29-5475.plugin
|
||||
flash-plugin 0x1000 0xf000 flash29.plugin
|
||||
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
|
||||
flash 0xe0000000
|
||||
|
||||
|
||||
@@ -54,7 +54,7 @@ sleep 10
|
||||
#flash-plugin 0x1000 0xf000 flash29.plugin
|
||||
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
|
||||
flash 0xE0000000
|
||||
flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
#flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
|
||||
# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for bas)
|
||||
#
|
||||
|
||||
@@ -10,20 +10,20 @@ wait
|
||||
write-ctrl 0x0801 0x00000000
|
||||
dump-register VBR
|
||||
|
||||
# Turn on MBAR at 0xFF00_0000
|
||||
write-ctrl 0x0C0F 0xFF000000
|
||||
# Turn on MBAR at 0x1000_0000
|
||||
write-ctrl 0x0C0F 0x10000000
|
||||
dump-register MBAR
|
||||
|
||||
# Turn on RAMBAR0 at address FF10_0000
|
||||
write-ctrl 0x0C04 0xFF100007
|
||||
# Turn on RAMBAR0 at address 2000_0000
|
||||
write-ctrl 0x0C04 0x20000007
|
||||
|
||||
# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently)
|
||||
write-ctrl 0x0C05 0xFF101001
|
||||
write-ctrl 0x0C05 0x20001001
|
||||
|
||||
#
|
||||
# Init CS0 (BootFLASH @ E000_0000 - E03F_FFFF 4Mbytes)
|
||||
write 0xFF000500 0xE0000000 4
|
||||
write 0xFF000508 0x00041180 4
|
||||
# Init CS0 (BootFLASH @ FF80_0000 - FFBF_FFFF 4Mbytes)
|
||||
write 0xFF000500 0xFF800000 4
|
||||
write 0xFF000508 0x00100D80 4
|
||||
write 0xFF000504 0x003F0001 4
|
||||
|
||||
# SDRAM Initialization @ 0000_0000 - 03FF_FFFF 64 Mbytes
|
||||
@@ -52,27 +52,26 @@ sleep 10
|
||||
# This seems to be related to large flash buffers and PC-relative adressing of the plugin
|
||||
#flash-plugin 0x1000 0xf000 flash29.plugin
|
||||
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
|
||||
flash 0xE0000000
|
||||
flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
flash 0xFF800000
|
||||
#flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
|
||||
# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for bas)
|
||||
#
|
||||
# Caution: sector offset numbers need to be the ones from the x16 address range
|
||||
# column and they vary in size - needs to be exactly as in the data sheet (p. 9)
|
||||
# Erase flash from 0xFF800000 to 0xFFBFFFFF (reserved space for bas)
|
||||
#
|
||||
# contrary to documentation, it seems we need to erase-wait after each sector
|
||||
|
||||
#erase 0xE0000000 0x0
|
||||
#erase 0xE0002000 0x0
|
||||
#erase 0xE0000000 0x00004000
|
||||
#erase 0xE0000000 0x00005000
|
||||
#erase 0xE0000000 0x00006000
|
||||
#erase 0xE0000000 0x00007000
|
||||
#erase 0xE0000000 0x00008000
|
||||
#erase 0xE0000000 0x00009000
|
||||
#erase 0xE0000000 0x0000a000
|
||||
#erase 0xE0000000 0x0000b000
|
||||
#erase-wait 0xe0000000
|
||||
#blank-chk 0xE0000000 0x0
|
||||
load -v m5484lite_dbug_flash.elf
|
||||
erase 0xFF800000 0
|
||||
erase 0xFF800000 1
|
||||
erase 0xFF800000 2
|
||||
erase 0xFF800000 3
|
||||
erase 0xFF800000 4
|
||||
erase 0xFF800000 5
|
||||
erase 0xFF800000 6
|
||||
erase 0xFF800000 7
|
||||
erase 0xFF800000 8
|
||||
erase 0xFF800000 9
|
||||
erase 0xFF800000 10
|
||||
erase 0xFF800000 11
|
||||
erase 0xFF800000 12
|
||||
erase 0xFF800000 13
|
||||
load -v m548xlite_dbug_flash.elf
|
||||
wait
|
||||
|
||||
@@ -63,4 +63,4 @@ erase 0xe0000000 37
|
||||
erase 0xe0000000 38
|
||||
erase 0xe0000000 39
|
||||
|
||||
load ../../emutos/emutos-m548x-bas_gcc.elf
|
||||
load ../../emutos/emutos-m548x-bas.elf
|
||||
|
||||
BIN
flash_scripts/m548xlite_dbug_ram.elf
Normal file
BIN
flash_scripts/m548xlite_dbug_ram.elf
Normal file
Binary file not shown.
5922
flash_scripts/m548xlite_dbug_ram.s19
Normal file
5922
flash_scripts/m548xlite_dbug_ram.s19
Normal file
File diff suppressed because it is too large
Load Diff
55
flash_scripts/run_m548x_dbug.bdm
Executable file
55
flash_scripts/run_m548x_dbug.bdm
Executable file
@@ -0,0 +1,55 @@
|
||||
#!/usr/local/bin/bdmctrl -D2 -v9 -d9
|
||||
#
|
||||
# firebee board initialization for bdmctrl
|
||||
#
|
||||
open $1
|
||||
reset
|
||||
sleep 1
|
||||
|
||||
wait
|
||||
|
||||
# set VBR
|
||||
write-ctrl 0x0801 0x00000000
|
||||
dump-register VBR
|
||||
|
||||
# Turn on MBAR at 0x1000_0000
|
||||
write-ctrl 0x0C0F 0x10000000
|
||||
dump-register MBAR
|
||||
|
||||
# Turn on RAMBAR0 at address 20000000
|
||||
write-ctrl 0x0C04 0x20000021
|
||||
|
||||
# Turn on RAMBAR1 at address 20001000
|
||||
write-ctrl 0x0C05 0x20001021
|
||||
|
||||
# Init CS0 (BootFLASH @ ff80_0000 - ff8F_FFFF 8Mbytes)
|
||||
write 0x10000500 0xff800000 4
|
||||
write 0x10000508 0x00041180 4
|
||||
write 0x10000504 0x003F0001 4
|
||||
wait
|
||||
|
||||
# SDRAM Initialization @ 0000_0000 - 03FF_FFFF 64 MBytes
|
||||
write 0x10000004 0x000002AA 4 # SDRAMDS configuration
|
||||
write 0x10000020 0x00000019 4 # SDRAM CS0 configuration (64Mbytes 0000_0000 - 03FF_FFFF)
|
||||
write 0x10000024 0x00000000 4 # SDRAM CS1 configuration
|
||||
write 0x10000028 0x00000000 4 # SDRAM CS2 configuration
|
||||
write 0x1000002C 0x00000000 4 # SDRAM CS3 configuration
|
||||
|
||||
write 0x10000108 0x73711630 4 # SDCFG1
|
||||
write 0x1000010C 0x46370000 4 # SDCFG2
|
||||
|
||||
write 0x10000104 0xE10B0002 4 # SDCR + IPALL
|
||||
write 0x10000100 0x40010000 4 # SDMR (write to LEMR)
|
||||
write 0x10000100 0x058D0000 4 # SDMR (write to LMR)
|
||||
sleep 100
|
||||
write 0x10000104 0xE10D0002 4 # SDCR + IPALL
|
||||
write 0x10000104 0xE10D0004 4 # SDCR + IREF (first refresh)
|
||||
write 0x10000104 0xE10D0004 4 # SDCR + IREF (first refresh)
|
||||
write 0x10000100 0x018D0000 4 # SDMR (write to LMR)
|
||||
write 0x10000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
|
||||
sleep 100
|
||||
|
||||
load m548xlite_dbug_ram.elf
|
||||
|
||||
execute
|
||||
wait
|
||||
7506
fs/cc932.c
7506
fs/cc932.c
File diff suppressed because it is too large
Load Diff
21870
fs/cc936.c
21870
fs/cc936.c
File diff suppressed because it is too large
Load Diff
17126
fs/cc949.c
17126
fs/cc949.c
File diff suppressed because it is too large
Load Diff
13578
fs/cc950.c
13578
fs/cc950.c
File diff suppressed because it is too large
Load Diff
841
fs/ccsbcs.c
841
fs/ccsbcs.c
@@ -31,463 +31,505 @@
|
||||
#if _CODE_PAGE == 437
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP437(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 720
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */
|
||||
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
|
||||
0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642,
|
||||
0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
|
||||
0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP720(0x80-0xFF) to Unicode conversion table */
|
||||
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
|
||||
0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642,
|
||||
0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
|
||||
0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 737
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */
|
||||
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
|
||||
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
|
||||
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
|
||||
0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
|
||||
0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0,
|
||||
0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD,
|
||||
0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
|
||||
0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP737(0x80-0xFF) to Unicode conversion table */
|
||||
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
|
||||
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
|
||||
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
|
||||
0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
|
||||
0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0,
|
||||
0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD,
|
||||
0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
|
||||
0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 775
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */
|
||||
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
|
||||
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
|
||||
0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6,
|
||||
0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118,
|
||||
0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
|
||||
0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B,
|
||||
0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144,
|
||||
0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
|
||||
0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP775(0x80-0xFF) to Unicode conversion table */
|
||||
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
|
||||
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
|
||||
0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6,
|
||||
0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118,
|
||||
0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
|
||||
0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B,
|
||||
0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144,
|
||||
0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
|
||||
0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 850
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP850(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 852
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
|
||||
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
|
||||
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E,
|
||||
0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A,
|
||||
0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE,
|
||||
0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161,
|
||||
0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
|
||||
0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP852(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
|
||||
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
|
||||
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E,
|
||||
0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A,
|
||||
0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE,
|
||||
0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161,
|
||||
0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
|
||||
0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 855
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */
|
||||
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
|
||||
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
|
||||
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
|
||||
0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
|
||||
0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414,
|
||||
0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438,
|
||||
0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E,
|
||||
0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
|
||||
0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443,
|
||||
0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
|
||||
0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D,
|
||||
0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP855(0x80-0xFF) to Unicode conversion table */
|
||||
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
|
||||
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
|
||||
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
|
||||
0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
|
||||
0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414,
|
||||
0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438,
|
||||
0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E,
|
||||
0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
|
||||
0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443,
|
||||
0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
|
||||
0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D,
|
||||
0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 857
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000,
|
||||
0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP857(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000,
|
||||
0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 858
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP858(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 862
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP862(0x80-0xFF) to Unicode conversion table */
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 866
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
|
||||
0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP866(0x80-0xFF) to Unicode conversion table */
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
|
||||
0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 874
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07,
|
||||
0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F,
|
||||
0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17,
|
||||
0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F,
|
||||
0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27,
|
||||
0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F,
|
||||
0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37,
|
||||
0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F,
|
||||
0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47,
|
||||
0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F,
|
||||
0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57,
|
||||
0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP874(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07,
|
||||
0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F,
|
||||
0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17,
|
||||
0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F,
|
||||
0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27,
|
||||
0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F,
|
||||
0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37,
|
||||
0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F,
|
||||
0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47,
|
||||
0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F,
|
||||
0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57,
|
||||
0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1250
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A,
|
||||
0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B,
|
||||
0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C,
|
||||
0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7,
|
||||
0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E,
|
||||
0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7,
|
||||
0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF,
|
||||
0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7,
|
||||
0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F,
|
||||
0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7,
|
||||
0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1250(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A,
|
||||
0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B,
|
||||
0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C,
|
||||
0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7,
|
||||
0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E,
|
||||
0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7,
|
||||
0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF,
|
||||
0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7,
|
||||
0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F,
|
||||
0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7,
|
||||
0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1251
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */
|
||||
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
|
||||
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F,
|
||||
0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7,
|
||||
0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407,
|
||||
0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457,
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1251(0x80-0xFF) to Unicode conversion table */
|
||||
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
|
||||
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F,
|
||||
0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7,
|
||||
0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407,
|
||||
0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457,
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1252
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x00DD, 0x00DE, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1252(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x00DD, 0x00DE, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1253
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F,
|
||||
0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397,
|
||||
0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F,
|
||||
0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7,
|
||||
0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF,
|
||||
0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7,
|
||||
0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF,
|
||||
0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7,
|
||||
0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1253(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F,
|
||||
0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397,
|
||||
0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F,
|
||||
0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7,
|
||||
0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF,
|
||||
0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7,
|
||||
0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF,
|
||||
0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7,
|
||||
0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1254
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1254(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1255
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7,
|
||||
0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF,
|
||||
0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3,
|
||||
0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1255(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7,
|
||||
0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF,
|
||||
0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3,
|
||||
0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1256
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
|
||||
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA,
|
||||
0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F,
|
||||
0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7,
|
||||
0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643,
|
||||
0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF,
|
||||
0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7,
|
||||
0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1256(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
|
||||
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA,
|
||||
0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F,
|
||||
0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7,
|
||||
0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643,
|
||||
0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF,
|
||||
0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7,
|
||||
0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2
|
||||
}
|
||||
|
||||
#elif _CODE_PAGE == 1257
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000,
|
||||
0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7,
|
||||
0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6,
|
||||
0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112,
|
||||
0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B,
|
||||
0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF,
|
||||
0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113,
|
||||
0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C,
|
||||
0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1257(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000,
|
||||
0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7,
|
||||
0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6,
|
||||
0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112,
|
||||
0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B,
|
||||
0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF,
|
||||
0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113,
|
||||
0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C,
|
||||
0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1258
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -499,42 +541,79 @@ const uint16_t Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||
|
||||
|
||||
uint16_t ff_convert ( /* Converted character, Returns zero on error */
|
||||
uint16_t src, /* Character code to be converted */
|
||||
uint32_t dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
|
||||
)
|
||||
uint16_t src, /* Character code to be converted */
|
||||
uint32_t dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
|
||||
)
|
||||
{
|
||||
uint16_t c;
|
||||
uint16_t c;
|
||||
|
||||
|
||||
if (src < 0x80) { /* ASCII */
|
||||
c = src;
|
||||
if (src < 0x80) { /* ASCII */
|
||||
c = src;
|
||||
|
||||
} else {
|
||||
if (dir) { /* OEMCP to Unicode */
|
||||
c = (src >= 0x100) ? 0 : Tbl[src - 0x80];
|
||||
} else {
|
||||
if (dir) { /* OEMCP to Unicode */
|
||||
c = (src >= 0x100) ? 0 : Tbl[src - 0x80];
|
||||
|
||||
} else { /* Unicode to OEMCP */
|
||||
for (c = 0; c < 0x80; c++) {
|
||||
if (src == Tbl[c]) break;
|
||||
}
|
||||
c = (c + 0x80) & 0xFF;
|
||||
}
|
||||
}
|
||||
} else { /* Unicode to OEMCP */
|
||||
for (c = 0; c < 0x80; c++) {
|
||||
if (src == Tbl[c]) break;
|
||||
}
|
||||
c = (c + 0x80) & 0xFF;
|
||||
}
|
||||
}
|
||||
|
||||
return c;
|
||||
return c;
|
||||
}
|
||||
|
||||
|
||||
uint16_t ff_wtoupper ( /* Upper converted character */
|
||||
uint16_t chr /* Input character */
|
||||
)
|
||||
uint16_t chr /* Input character */
|
||||
)
|
||||
{
|
||||
static const uint16_t tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 };
|
||||
static const uint16_t tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
|
||||
int i;
|
||||
static const uint16_t tbl_lower[] =
|
||||
{
|
||||
0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
|
||||
0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70,
|
||||
0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78,
|
||||
0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7,
|
||||
0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8,
|
||||
0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101,
|
||||
0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F,
|
||||
0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D,
|
||||
0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B,
|
||||
0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A,
|
||||
0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148,
|
||||
0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157,
|
||||
0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165,
|
||||
0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173,
|
||||
0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1,
|
||||
0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8,
|
||||
0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF,
|
||||
0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7,
|
||||
0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433,
|
||||
0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A,
|
||||
0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441,
|
||||
0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448,
|
||||
0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F,
|
||||
0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457,
|
||||
0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F,
|
||||
0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177,
|
||||
0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F,
|
||||
0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48,
|
||||
0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50,
|
||||
0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58,
|
||||
0xFF59, 0xFF5A, 0
|
||||
};
|
||||
static const uint16_t tbl_upper[] =
|
||||
{
|
||||
0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
|
||||
int i;
|
||||
|
||||
|
||||
for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ;
|
||||
for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ;
|
||||
|
||||
return tbl_lower[i] ? tbl_upper[i] : chr;
|
||||
return tbl_lower[i] ? tbl_upper[i] : chr;
|
||||
}
|
||||
|
||||
@@ -124,6 +124,33 @@ static struct pci_bios_interface pci_interface =
|
||||
.phys_to_virt = wrapper_phys_to_virt,
|
||||
};
|
||||
|
||||
static struct pci_native_driver_interface_0_1 pci_native_interface_0_1 =
|
||||
{
|
||||
.pci_read_config_longword = pci_read_config_longword,
|
||||
.pci_read_config_word = pci_read_config_word,
|
||||
.pci_read_config_byte = pci_read_config_byte,
|
||||
.pci_write_config_longword = pci_write_config_longword,
|
||||
.pci_write_config_word = pci_write_config_word,
|
||||
.pci_write_config_byte = pci_write_config_byte,
|
||||
.pci_hook_interrupt = pci_hook_interrupt,
|
||||
.pci_unhook_interrupt = pci_unhook_interrupt,
|
||||
.pci_get_resource = pci_get_resource,
|
||||
};
|
||||
|
||||
static struct pci_native_driver_interface pci_native_interface =
|
||||
{
|
||||
.pci_read_config_longword = pci_read_config_longword,
|
||||
.pci_read_config_word = pci_read_config_word,
|
||||
.pci_read_config_byte = pci_read_config_byte,
|
||||
.pci_write_config_longword = pci_write_config_longword,
|
||||
.pci_write_config_word = pci_write_config_word,
|
||||
.pci_write_config_byte = pci_write_config_byte,
|
||||
.pci_hook_interrupt = pci_hook_interrupt,
|
||||
.pci_unhook_interrupt = pci_unhook_interrupt,
|
||||
.pci_find_device = pci_find_device,
|
||||
.pci_find_classcode = pci_find_classcode,
|
||||
.pci_get_resource = pci_get_resource,
|
||||
};
|
||||
/*
|
||||
* driver interface struct for the BaS framebuffer video driver
|
||||
*/
|
||||
@@ -187,6 +214,23 @@ static struct generic_interface interfaces[] =
|
||||
.revision = 1,
|
||||
.interface.mmu = &mmu_interface,
|
||||
},
|
||||
{
|
||||
.type = PCI_NATIVE_DRIVER,
|
||||
.name = "PCI_N",
|
||||
.description = "BaS PCI native",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.pci_native = (struct pci_native_driver_interface *) &pci_native_interface_0_1,
|
||||
},
|
||||
{
|
||||
.type = PCI_NATIVE_DRIVER,
|
||||
.name = "PCI_N",
|
||||
.description = "BaS PCI native",
|
||||
.version = 0,
|
||||
.revision = 2,
|
||||
.interface.pci_native = &pci_native_interface,
|
||||
},
|
||||
|
||||
/* insert new drivers here */
|
||||
|
||||
{
|
||||
@@ -215,36 +259,41 @@ void remove_handler(void)
|
||||
*trap_0_vector = (uint32_t) std_exc_vec;
|
||||
}
|
||||
|
||||
/*
|
||||
* trap #0 entry point
|
||||
*
|
||||
* this is used to retrieve the driver table that gets exposed to the OS by BaS
|
||||
*/
|
||||
void __attribute__((interrupt)) get_bas_drivers(void)
|
||||
{
|
||||
__asm__ __volatile(
|
||||
/*
|
||||
* sp should now point to the next instruction after the trap
|
||||
* (sp) should now point to the next instruction after the trap
|
||||
* The trap itself is 2 bytes, the four bytes before that must
|
||||
* read '_BAS' or we are not meant by this call
|
||||
* read '_BAS', otherwise we are not meant by this call
|
||||
*/
|
||||
" move.l a0,-(sp) \n\t" // save registers
|
||||
" move.l a0,-(sp) \n\t" // save registers
|
||||
" move.l d0,-(sp) \n\t"
|
||||
" move.l 12(sp),a0 \n\t" // get return address
|
||||
" move.l 12(sp),a0 \n\t" // get return address
|
||||
" move.l -6(a0),d0 \n\t" //
|
||||
" cmp.l #0x5f424153,d0 \n\t" // is it '_BAS'?
|
||||
" beq fetch_drivers \n\t" // yes
|
||||
" cmp.l #0x5f424153,d0 \n\t" // is it '_BAS'?
|
||||
" beq fetch_drivers \n\t" // yes
|
||||
/*
|
||||
* This seems indeed a "normal" trap #0. Better pass control to "normal" trap #0 processing
|
||||
* If trap #0 isn't set to something sensible, we'll probably crash here, but this must be
|
||||
* prevented on the caller side.
|
||||
*/
|
||||
" move.l (sp)+,d0 \n\t" // restore registers
|
||||
" move.l (sp)+,a0 \n\t"
|
||||
" move.l 0x80,-(sp) \n\t" // fetch vector
|
||||
" rts \n\t" // and jump through it
|
||||
" move.l (sp)+,d0 \n\t" // restore registers
|
||||
" move.l (sp)+,a0 \n\t"
|
||||
" move.l 0x80,-(sp) \n\t" // fetch vector
|
||||
" rts \n\t" // and jump through it
|
||||
|
||||
"fetch_drivers: \n\t"
|
||||
" move.l #%[drivers],d0 \n\t" // return driver struct in d0
|
||||
" addq.l #4,sp \n\t" // adjust stack
|
||||
"fetch_drivers: \n\t"
|
||||
" move.l #%[drivers],d0 \n\t" // return driver struct in d0
|
||||
" addq.l #4,sp \n\t" // adjust stack
|
||||
" move.l (sp)+,a0 \n\t" // restore register
|
||||
: /* no output */
|
||||
: [drivers] "o" (bas_drivers) /* input */
|
||||
: /* clobber */
|
||||
: /* no output */
|
||||
: [drivers] "o" (bas_drivers) /* input */
|
||||
: /* clobber */
|
||||
);
|
||||
}
|
||||
|
||||
@@ -21,15 +21,24 @@
|
||||
#define _BAS_PRINTF_H_
|
||||
#include <stdarg.h>
|
||||
#include <stddef.h>
|
||||
#include "MCF5475.h"
|
||||
|
||||
extern void xvsnprintf(char *str, size_t size, const char *fmt, va_list va);
|
||||
extern void xvprintf(const char *fmt, va_list va);
|
||||
extern void xprintf(const char *fmt, ...);
|
||||
extern void xsnprintf(char *str, size_t size, const char *fmt, ...);
|
||||
extern void xputchar(int c);
|
||||
extern int sprintf(char *str, const char *format, ...);
|
||||
|
||||
|
||||
extern void display_progress(void);
|
||||
extern void hexdump(uint8_t buffer[], int size);
|
||||
|
||||
static inline void xputchar(int c)
|
||||
{
|
||||
while (!(MCF_PSC0_PSCSR & MCF_PSC_PSCSR_TXRDY))
|
||||
;
|
||||
|
||||
MCF_PSC0_PSCTB_8BIT = (uint8_t) c;
|
||||
}
|
||||
|
||||
#endif /* _BAS_PRINTF_H_ */
|
||||
|
||||
@@ -34,6 +34,7 @@ extern char *strcat(char *dst, const char *src);
|
||||
extern char *strncat(char *dst, const char *src, size_t max);
|
||||
extern int atoi(const char *c);
|
||||
extern void *memcpy(void *dst, const void *src, size_t n);
|
||||
extern void *memmove(void *dst, const void *src, size_t n);
|
||||
extern void *memset(void *s, int c, size_t n);
|
||||
extern int memcmp(const void *s1, const void *s2, size_t max);
|
||||
extern void bzero(void *s, size_t n);
|
||||
|
||||
@@ -26,4 +26,7 @@
|
||||
#define CLEAR_BIT(p,bit) p &= ~(bit)
|
||||
#define CLEAR_BIT_NO(p,nr) CLEAR_BIT(p, (1 << (nr)))
|
||||
|
||||
extern void write_pic_byte(uint8_t value);
|
||||
extern uint8_t read_pic_byte(void);
|
||||
|
||||
#endif /* _BAS_UTILS_H_ */
|
||||
|
||||
63
include/conout.h
Executable file
63
include/conout.h
Executable file
@@ -0,0 +1,63 @@
|
||||
#ifndef __CONOUT_H__
|
||||
#define __CONOUT_H__
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
/*
|
||||
* conout.h - lowlevel color model dependent screen handling routines
|
||||
*
|
||||
*
|
||||
* Copyright (C) 2004-2016 by Authors:
|
||||
*
|
||||
* Authors:
|
||||
* MAD Martin Doering
|
||||
*
|
||||
* This file is distributed under the GPL, version 2 or at your
|
||||
* option any later version. See doc/license.txt for details.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/* Defines for cursor */
|
||||
#define M_CFLASH 0x0001 /* cursor flash 0:disabled 1:enabled */
|
||||
#define M_CSTATE 0x0002 /* cursor flash state 0:off 1:on */
|
||||
#define M_CVIS 0x0004 /* cursor visibility 0:invisible 1:visible */
|
||||
|
||||
/*
|
||||
* The visibility flag is also used as a semaphore to prevent
|
||||
* the interrupt-driven cursor blink logic from colliding with
|
||||
* escape function/sequence cursor drawing activity.
|
||||
*/
|
||||
|
||||
#define M_CEOL 0x0008 /* end of line handling 0:overwrite 1:wrap */
|
||||
#define M_REVID 0x0010 /* reverse video 0:on 1:off */
|
||||
#define M_SVPOS 0x0020 /* position saved flag. 0:false, 1:true */
|
||||
#define M_CRIT 0x0040 /* reverse video 0:on 1:off */
|
||||
|
||||
/* Color related linea variables */
|
||||
|
||||
extern int16_t v_col_bg; /* current background color */
|
||||
extern int16_t v_col_fg; /* current foreground color */
|
||||
|
||||
/* Cursor related linea variables */
|
||||
|
||||
extern uint8_t *v_cur_ad; /* current cursor address */
|
||||
extern int16_t v_cur_of; /* cursor offset */
|
||||
extern int8_t v_cur_tim; /* cursor blink timer */
|
||||
|
||||
extern int8_t v_period;
|
||||
extern int16_t disab_cnt; /* disable depth count. (>0 means disabled) */
|
||||
extern int8_t v_stat_0; /* video cell system status */
|
||||
extern int16_t sav_cur_x; /* saved cursor cell x */
|
||||
extern int16_t sav_cur_y; /* saved cursor cell y */
|
||||
|
||||
/* Prototypes */
|
||||
|
||||
extern void ascii_out(int);
|
||||
extern void move_cursor(int, int);
|
||||
extern void blank_out (int, int, int, int);
|
||||
extern void invert_cell(int, int);
|
||||
extern void scroll_up(int);
|
||||
extern void scroll_down(int);
|
||||
|
||||
#endif /* __CONOUT_H__ */
|
||||
16
include/debug.h
Normal file
16
include/debug.h
Normal file
@@ -0,0 +1,16 @@
|
||||
#ifndef DEBUG_H
|
||||
// #define DEBUG_H
|
||||
|
||||
#ifdef DEBUG
|
||||
#include "bas_types.h"
|
||||
#include "bas_printf.h"
|
||||
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG (%s()): " format, __FUNCTION__, ##arg);} while(0)
|
||||
#else
|
||||
#define dbg(format, arg...) do {;} while (0)
|
||||
#endif /* DEBUG */
|
||||
#define err(format, arg...) do { xprintf("ERROR (%s()): " format, __FUNCTION__, ##arg); } while(0)
|
||||
#define inf(format, arg...) do { xprintf("" format, ##arg); } while(0)
|
||||
|
||||
#endif // DEBUG_H
|
||||
|
||||
@@ -38,7 +38,8 @@ enum driver_type
|
||||
VIDEO_DRIVER,
|
||||
PCI_DRIVER,
|
||||
MMU_DRIVER,
|
||||
END_OF_DRIVERS = 0xffffffff, /* marks end of driver list */
|
||||
PCI_NATIVE_DRIVER,
|
||||
END_OF_DRIVERS = 0xffffffffL, /* marks end of driver list */
|
||||
};
|
||||
|
||||
struct generic_driver_interface
|
||||
@@ -80,128 +81,7 @@ struct xhdi_driver_interface
|
||||
uint32_t (*xhdivec)();
|
||||
};
|
||||
|
||||
/*
|
||||
* Interpretation of offset for color fields: All offsets are from the right,
|
||||
* inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
|
||||
* can use the offset as right argument to <<). A pixel afterwards is a bit
|
||||
* stream and is written to video memory as that unmodified. This implies
|
||||
* big-endian byte order if bits_per_pixel is greater than 8.
|
||||
*/
|
||||
struct fb_bitfield
|
||||
{
|
||||
unsigned long offset; /* beginning of bitfield */
|
||||
unsigned long length; /* length of bitfield */
|
||||
unsigned long msb_right; /* != 0 : Most significant bit is */
|
||||
/* right */
|
||||
};
|
||||
|
||||
/*
|
||||
* the following structures define the interface to the BaS-builtin-framebuffer video driver
|
||||
*/
|
||||
struct fb_var_screeninfo
|
||||
{
|
||||
unsigned long xres; /* visible resolution */
|
||||
unsigned long yres;
|
||||
unsigned long xres_virtual; /* virtual resolution */
|
||||
unsigned long yres_virtual;
|
||||
unsigned long xoffset; /* offset from virtual to visible */
|
||||
unsigned long yoffset; /* resolution */
|
||||
|
||||
unsigned long bits_per_pixel; /* guess what */
|
||||
unsigned long grayscale; /* != 0 Graylevels instead of colors */
|
||||
|
||||
struct fb_bitfield red; /* bitfield in fb mem if true color, */
|
||||
struct fb_bitfield green; /* else only length is significant */
|
||||
struct fb_bitfield blue;
|
||||
struct fb_bitfield transp; /* transparency */
|
||||
|
||||
unsigned long nonstd; /* != 0 Non standard pixel format */
|
||||
|
||||
unsigned long activate; /* see FB_ACTIVATE_* */
|
||||
|
||||
unsigned long height; /* height of picture in mm */
|
||||
unsigned long width; /* width of picture in mm */
|
||||
|
||||
unsigned long accel_flags; /* (OBSOLETE) see fb_info.flags */
|
||||
|
||||
/* Timing: All values in pixclocks, except pixclock (of course) */
|
||||
unsigned long pixclock; /* pixel clock in ps (pico seconds) */
|
||||
unsigned long left_margin; /* time from sync to picture */
|
||||
unsigned long right_margin; /* time from picture to sync */
|
||||
unsigned long upper_margin; /* time from sync to picture */
|
||||
unsigned long lower_margin;
|
||||
unsigned long hsync_len; /* length of horizontal sync */
|
||||
unsigned long vsync_len; /* length of vertical sync */
|
||||
unsigned long sync; /* see FB_SYNC_* */
|
||||
unsigned long vmode; /* see FB_VMODE_* */
|
||||
unsigned long rotate; /* angle we rotate counter clockwise */
|
||||
unsigned long refresh;
|
||||
unsigned long reserved[4]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
struct fb_fix_screeninfo
|
||||
{
|
||||
char id[16]; /* identification string eg "TT Builtin" */
|
||||
unsigned long smem_start; /* Start of frame buffer mem */
|
||||
/* (physical address) */
|
||||
unsigned long smem_len; /* Length of frame buffer mem */
|
||||
unsigned long type; /* see FB_TYPE_* */
|
||||
unsigned long type_aux; /* Interleave for interleaved Planes */
|
||||
unsigned long visual; /* see FB_VISUAL_* */
|
||||
unsigned short xpanstep; /* zero if no hardware panning */
|
||||
unsigned short ypanstep; /* zero if no hardware panning */
|
||||
unsigned short ywrapstep; /* zero if no hardware ywrap */
|
||||
unsigned long line_length; /* length of a line in bytes */
|
||||
unsigned long mmio_start; /* Start of Memory Mapped I/O */
|
||||
/* (physical address) */
|
||||
unsigned long mmio_len; /* Length of Memory Mapped I/O */
|
||||
unsigned long accel; /* Indicate to driver which */
|
||||
/* specific chip/card we have */
|
||||
unsigned short reserved[3]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
struct fb_chroma
|
||||
{
|
||||
unsigned long redx; /* in fraction of 1024 */
|
||||
unsigned long greenx;
|
||||
unsigned long bluex;
|
||||
unsigned long whitex;
|
||||
unsigned long redy;
|
||||
unsigned long greeny;
|
||||
unsigned long bluey;
|
||||
unsigned long whitey;
|
||||
};
|
||||
|
||||
struct fb_monspecs
|
||||
{
|
||||
struct fb_chroma chroma;
|
||||
struct fb_videomode *modedb; /* mode database */
|
||||
unsigned char manufacturer[4]; /* Manufacturer */
|
||||
unsigned char monitor[14]; /* Monitor String */
|
||||
unsigned char serial_no[14]; /* Serial Number */
|
||||
unsigned char ascii[14]; /* ? */
|
||||
unsigned long modedb_len; /* mode database length */
|
||||
unsigned long model; /* Monitor Model */
|
||||
unsigned long serial; /* Serial Number - Integer */
|
||||
unsigned long year; /* Year manufactured */
|
||||
unsigned long week; /* Week Manufactured */
|
||||
unsigned long hfmin; /* hfreq lower limit (Hz) */
|
||||
unsigned long hfmax; /* hfreq upper limit (Hz) */
|
||||
unsigned long dclkmin; /* pixelclock lower limit (Hz) */
|
||||
unsigned long dclkmax; /* pixelclock upper limit (Hz) */
|
||||
unsigned short input; /* display type - see FB_DISP_* */
|
||||
unsigned short dpms; /* DPMS support - see FB_DPMS_ */
|
||||
unsigned short signal; /* Signal Type - see FB_SIGNAL_* */
|
||||
unsigned short vfmin; /* vfreq lower limit (Hz) */
|
||||
unsigned short vfmax; /* vfreq upper limit (Hz) */
|
||||
unsigned short gamma; /* Gamma - in fractions of 100 */
|
||||
unsigned short gtf : 1; /* supports GTF */
|
||||
unsigned short misc; /* Misc flags - see FB_MISC_* */
|
||||
unsigned char version; /* EDID version... */
|
||||
unsigned char revision; /* ...and revision */
|
||||
unsigned char max_x; /* Maximum horizontal size (cm) */
|
||||
unsigned char max_y; /* Maximum vertical size (cm) */
|
||||
};
|
||||
#include "fb.h"
|
||||
|
||||
struct framebuffer_driver_interface
|
||||
{
|
||||
@@ -264,12 +144,43 @@ struct pci_bios_interface
|
||||
|
||||
struct mmu_driver_interface
|
||||
{
|
||||
int32_t (*map_page_locked)(uint32_t address, uint32_t length, int asid);
|
||||
int32_t (*unlock_page)(uint32_t address, uint32_t length, int asid);
|
||||
int32_t (*report_locked_pages)(uint32_t *num_itlb, uint32_t *num_dtlb);
|
||||
uint32_t (*map_page_locked)(uint32_t address, uint32_t length, int asid);
|
||||
uint32_t (*unlock_page)(uint32_t address, uint32_t length, int asid);
|
||||
uint32_t (*report_locked_pages)(uint32_t *num_itlb, uint32_t *num_dtlb);
|
||||
uint32_t (*report_pagesize)(void);
|
||||
};
|
||||
|
||||
struct pci_native_driver_interface_0_1
|
||||
{
|
||||
uint32_t (*pci_read_config_longword)(int32_t handle, int offset);
|
||||
uint16_t (*pci_read_config_word)(int32_t handle, int offset);
|
||||
uint8_t (*pci_read_config_byte)(int32_t handle, int offset);
|
||||
|
||||
int32_t (*pci_write_config_longword)(int32_t handle, int offset, uint32_t value);
|
||||
int32_t (*pci_write_config_word)(int32_t handle, int offset, uint16_t value);
|
||||
int32_t (*pci_write_config_byte)(int32_t handle, int offset, uint8_t value);
|
||||
int32_t (*pci_hook_interrupt)(int32_t handle, void *handler, void *parameter);
|
||||
int32_t (*pci_unhook_interrupt)(int32_t handle);
|
||||
|
||||
struct pci_rd * (*pci_get_resource)(int32_t handle);
|
||||
};
|
||||
|
||||
struct pci_native_driver_interface
|
||||
{
|
||||
uint32_t (*pci_read_config_longword)(int32_t handle, int offset);
|
||||
uint16_t (*pci_read_config_word)(int32_t handle, int offset);
|
||||
uint8_t (*pci_read_config_byte)(int32_t handle, int offset);
|
||||
|
||||
int32_t (*pci_write_config_longword)(int32_t handle, int offset, uint32_t value);
|
||||
int32_t (*pci_write_config_word)(int32_t handle, int offset, uint16_t value);
|
||||
int32_t (*pci_write_config_byte)(int32_t handle, int offset, uint8_t value);
|
||||
int32_t (*pci_hook_interrupt)(int32_t handle, void *handler, void *parameter);
|
||||
int32_t (*pci_unhook_interrupt)(int32_t handle);
|
||||
int32_t (*pci_find_device)(uint16_t device_id, uint16_t vendor_id, int index);
|
||||
int32_t (*pci_find_classcode)(uint32_t classcode, int index);
|
||||
struct pci_rd * (*pci_get_resource)(int32_t handle);
|
||||
};
|
||||
|
||||
union interface
|
||||
{
|
||||
struct generic_driver_interface *gdi;
|
||||
@@ -278,6 +189,8 @@ union interface
|
||||
struct framebuffer_driver_interface *fb;
|
||||
struct pci_bios_interface *pci;
|
||||
struct mmu_driver_interface *mmu;
|
||||
struct pci_native_driver_interface_0_1 *pci_native_0_1;
|
||||
struct pci_native_driver_interface *pci_native;
|
||||
};
|
||||
|
||||
struct generic_interface
|
||||
|
||||
@@ -3,26 +3,6 @@
|
||||
|
||||
#include <bas_types.h>
|
||||
|
||||
static inline uint32_t set_ipl(uint32_t ipl)
|
||||
{
|
||||
uint32_t ret;
|
||||
|
||||
__asm__ __volatile__(
|
||||
" move.w sr,%[ret]\r\n" /* retrieve status register */
|
||||
" andi.l #0x07,%[ipl]\n\t" /* mask out ipl bits on new value */
|
||||
" lsl.l #8,%[ipl]\n\t" /* shift them to position */
|
||||
" move.l %[ret],d0\n\t" /* retrieve original value */
|
||||
" andi.l #0x0000f8ff,d0\n\t" /* clear ipl part */
|
||||
" or.l %[ipl],d0\n\t" /* or in new value */
|
||||
" move.w d0,sr\n\t" /* put it in place */
|
||||
" andi.l #0x0700,%[ret]\r\n" /* mask out ipl bits */
|
||||
" lsr.l #8,%[ret]\r\n" /* shift them to position */
|
||||
: [ret] "=&d" (ret) /* output */
|
||||
: [ipl] "d" (ipl) /* input */
|
||||
: "cc", "d0" /* clobber */
|
||||
);
|
||||
|
||||
return ret;
|
||||
}
|
||||
extern uint32_t set_ipl(uint32_t ipl);
|
||||
|
||||
#endif /* _EXCEPTIONS_H_ */
|
||||
|
||||
844
include/fb.h
844
include/fb.h
@@ -1,196 +1,206 @@
|
||||
#ifndef _FB_H
|
||||
#define _FB_H
|
||||
|
||||
/* Definitions of frame buffers */
|
||||
#include "bas_types.h"
|
||||
|
||||
#define FB_MAJOR 29
|
||||
#define FB_MAX 32 /* sufficient for now */
|
||||
/* Definitions of frame buffers */
|
||||
|
||||
/* ioctls
|
||||
0x46 is 'F' */
|
||||
#define FBIOGET_VSCREENINFO 0x4600
|
||||
#define FBIOPUT_VSCREENINFO 0x4601
|
||||
#define FBIOGET_FSCREENINFO 0x4602
|
||||
#define FBIOPAN_DISPLAY 0x4606
|
||||
#define FBIOBLANK 0x4611 /* arg: 0 or vesa level + 1 */
|
||||
#define FBIO_ALLOC 0x4613
|
||||
#define FBIO_FREE 0x4614
|
||||
#define FB_MAJOR 29
|
||||
#define FB_MAX 32 /* sufficient for now */
|
||||
|
||||
/* ioctls 0x46 is 'F' */
|
||||
#define FBIOGET_VSCREENINFO 0x4600
|
||||
#define FBIOPUT_VSCREENINFO 0x4601
|
||||
#define FBIOGET_FSCREENINFO 0x4602
|
||||
#define FBIOPAN_DISPLAY 0x4606
|
||||
#define FBIOBLANK 0x4611 /* arg: 0 or vesa level + 1 */
|
||||
#define FBIO_ALLOC 0x4613
|
||||
#define FBIO_FREE 0x4614
|
||||
|
||||
/* picture format */
|
||||
#define PICT_FORMAT(bpp,type,a,r,g,b) (((bpp) << 24) | ((type) << 16) | ((a) << 12) | ((r) << 8) | ((g) << 4) | ((b)))
|
||||
#define PICT_FORMAT(bpp, type, a, r, g, b) (((bpp) << 24) | ((type) << 16) | ((a) << 12) | ((r) << 8) | ((g) << 4) | ((b)))
|
||||
|
||||
/* gray/color formats use a visual index instead of argb */
|
||||
#define PICT_VISFORMAT(bpp,type,vi) (((bpp) << 24) | ((type) << 16) | ((vi)))
|
||||
#define PICT_FORMAT_BPP(f) (((f) >> 24) )
|
||||
#define PICT_FORMAT_TYPE(f) (((f) >> 16) & 0xff)
|
||||
#define PICT_FORMAT_A(f) (((f) >> 12) & 0x0f)
|
||||
#define PICT_FORMAT_R(f) (((f) >> 8) & 0x0f)
|
||||
#define PICT_FORMAT_G(f) (((f) >> 4) & 0x0f)
|
||||
#define PICT_FORMAT_B(f) (((f) ) & 0x0f)
|
||||
#define PICT_FORMAT_RGB(f) (((f) ) & 0xfff)
|
||||
#define PICT_FORMAT_VIS(f) (((f) ) & 0xffff)
|
||||
#define PICT_TYPE_OTHER 0
|
||||
#define PICT_TYPE_A 1
|
||||
#define PICT_TYPE_ARGB 2
|
||||
#define PICT_TYPE_ABGR 3
|
||||
#define PICT_TYPE_COLOR 4
|
||||
#define PICT_TYPE_GRAY 5
|
||||
#define PICT_FORMAT_COLOR(f) (PICT_FORMAT_TYPE(f) & 2)
|
||||
#define PICT_VISFORMAT(bpp, type, vi) (((bpp) << 24) | ((type) << 16) | ((vi)))
|
||||
#define PICT_FORMAT_BPP(f) (((f) >> 24) )
|
||||
#define PICT_FORMAT_TYPE(f) (((f) >> 16) & 0xff)
|
||||
#define PICT_FORMAT_A(f) (((f) >> 12) & 0x0f)
|
||||
#define PICT_FORMAT_R(f) (((f) >> 8) & 0x0f)
|
||||
#define PICT_FORMAT_G(f) (((f) >> 4) & 0x0f)
|
||||
#define PICT_FORMAT_B(f) (((f) ) & 0x0f)
|
||||
#define PICT_FORMAT_RGB(f) (((f) ) & 0xfff)
|
||||
#define PICT_FORMAT_VIS(f) (((f) ) & 0xffff)
|
||||
|
||||
#define PICT_TYPE_OTHER 0
|
||||
#define PICT_TYPE_A 1
|
||||
#define PICT_TYPE_ARGB 2
|
||||
#define PICT_TYPE_ABGR 3
|
||||
#define PICT_TYPE_COLOR 4
|
||||
#define PICT_TYPE_GRAY 5
|
||||
#define PICT_FORMAT_COLOR(f) (PICT_FORMAT_TYPE(f) & 2)
|
||||
|
||||
/* 32bpp formats */
|
||||
#define PICT_a8r8g8b8 PICT_FORMAT(32,PICT_TYPE_ARGB,8,8,8,8)
|
||||
#define PICT_x8r8g8b8 PICT_FORMAT(32,PICT_TYPE_ARGB,0,8,8,8)
|
||||
#define PICT_a8b8g8r8 PICT_FORMAT(32,PICT_TYPE_ABGR,8,8,8,8)
|
||||
#define PICT_x8b8g8r8 PICT_FORMAT(32,PICT_TYPE_ABGR,0,8,8,8)
|
||||
#define PICT_a8r8g8b8 PICT_FORMAT(32, PICT_TYPE_ARGB, 8, 8, 8, 8)
|
||||
#define PICT_x8r8g8b8 PICT_FORMAT(32, PICT_TYPE_ARGB, 0, 8, 8, 8)
|
||||
#define PICT_a8b8g8r8 PICT_FORMAT(32, PICT_TYPE_ABGR, 8, 8, 8, 8)
|
||||
#define PICT_x8b8g8r8 PICT_FORMAT(32, PICT_TYPE_ABGR, 0, 8, 8, 8)
|
||||
|
||||
/* 24bpp formats */
|
||||
#define PICT_r8g8b8 PICT_FORMAT(24,PICT_TYPE_ARGB,0,8,8,8)
|
||||
#define PICT_b8g8r8 PICT_FORMAT(24,PICT_TYPE_ABGR,0,8,8,8)
|
||||
#define PICT_r8g8b8 PICT_FORMAT(24, PICT_TYPE_ARGB, 0, 8, 8, 8)
|
||||
#define PICT_b8g8r8 PICT_FORMAT(24, PICT_TYPE_ABGR, 0, 8, 8, 8)
|
||||
|
||||
/* 16bpp formats */
|
||||
#define PICT_r5g6b5 PICT_FORMAT(16,PICT_TYPE_ARGB,0,5,6,5)
|
||||
#define PICT_b5g6r5 PICT_FORMAT(16,PICT_TYPE_ABGR,0,5,6,5)
|
||||
#define PICT_a1r5g5b5 PICT_FORMAT(16,PICT_TYPE_ARGB,1,5,5,5)
|
||||
#define PICT_x1r5g5b5 PICT_FORMAT(16,PICT_TYPE_ARGB,0,5,5,5)
|
||||
#define PICT_a1b5g5r5 PICT_FORMAT(16,PICT_TYPE_ABGR,1,5,5,5)
|
||||
#define PICT_x1b5g5r5 PICT_FORMAT(16,PICT_TYPE_ABGR,0,5,5,5)
|
||||
#define PICT_a4r4g4b4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4)
|
||||
#define PICT_x4r4g4b4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4)
|
||||
#define PICT_a4b4g4r4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4)
|
||||
#define PICT_x4b4g4r4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4)
|
||||
#define PICT_r5g6b5 PICT_FORMAT(16, PICT_TYPE_ARGB, 0, 5, 6, 5)
|
||||
#define PICT_b5g6r5 PICT_FORMAT(16, PICT_TYPE_ABGR, 0, 5, 6, 5)
|
||||
#define PICT_a1r5g5b5 PICT_FORMAT(16, PICT_TYPE_ARGB, 1, 5, 5, 5)
|
||||
#define PICT_x1r5g5b5 PICT_FORMAT(16, PICT_TYPE_ARGB, 0, 5, 5, 5)
|
||||
#define PICT_a1b5g5r5 PICT_FORMAT(16, PICT_TYPE_ABGR, 1, 5, 5, 5)
|
||||
#define PICT_x1b5g5r5 PICT_FORMAT(16, PICT_TYPE_ABGR, 0, 5, 5, 5)
|
||||
#define PICT_a4r4g4b4 PICT_FORMAT(16, PICT_TYPE_ARGB, 4, 4, 4, 4)
|
||||
#define PICT_x4r4g4b4 PICT_FORMAT(16, PICT_TYPE_ARGB, 4, 4, 4, 4)
|
||||
#define PICT_a4b4g4r4 PICT_FORMAT(16, PICT_TYPE_ARGB, 4, 4, 4, 4)
|
||||
#define PICT_x4b4g4r4 PICT_FORMAT(16, PICT_TYPE_ARGB, 4, 4, 4, 4)
|
||||
|
||||
/* 8bpp formats */
|
||||
#define PICT_a8 PICT_FORMAT(8,PICT_TYPE_A,8,0,0,0)
|
||||
#define PICT_r3g3b2 PICT_FORMAT(8,PICT_TYPE_ARGB,0,3,3,2)
|
||||
#define PICT_b2g3r3 PICT_FORMAT(8,PICT_TYPE_ABGR,0,3,3,2)
|
||||
#define PICT_a2r2g2b2 PICT_FORMAT(8,PICT_TYPE_ARGB,2,2,2,2)
|
||||
#define PICT_a2b2g2r2 PICT_FORMAT(8,PICT_TYPE_ABGR,2,2,2,2)
|
||||
#define PICT_c8 PICT_FORMAT(8,PICT_TYPE_COLOR,0,0,0,0)
|
||||
#define PICT_g8 PICT_FORMAT(8,PICT_TYPE_GRAY,0,0,0,0)
|
||||
#define PICT_a8 PICT_FORMAT(8, PICT_TYPE_A, 8, 0, 0, 0)
|
||||
#define PICT_r3g3b2 PICT_FORMAT(8, PICT_TYPE_ARGB, 0, 3, 3, 2)
|
||||
#define PICT_b2g3r3 PICT_FORMAT(8, PICT_TYPE_ABGR, 0, 3, 3, 2)
|
||||
#define PICT_a2r2g2b2 PICT_FORMAT(8, PICT_TYPE_ARGB, 2, 2, 2, 2)
|
||||
#define PICT_a2b2g2r2 PICT_FORMAT(8, PICT_TYPE_ABGR, 2, 2, 2, 2)
|
||||
#define PICT_c8 PICT_FORMAT(8, PICT_TYPE_COLOR, 0, 0, 0, 0)
|
||||
#define PICT_g8 PICT_FORMAT(8, PICT_TYPE_GRAY, 0, 0, 0, 0)
|
||||
|
||||
/* fVDI */
|
||||
#define MODE_EMUL_MONO_FLAG 1
|
||||
#define MODE_VESA_FLAG 2 /* for modedb.c */
|
||||
struct mode_option {
|
||||
short used; /* Whether the mode option was used or not. */
|
||||
short width;
|
||||
short height;
|
||||
short bpp;
|
||||
short freq;
|
||||
short flags;
|
||||
#define MODE_EMUL_MONO_FLAG 1
|
||||
#define MODE_VESA_FLAG 2 /* for modedb.c */
|
||||
|
||||
struct mode_option
|
||||
{
|
||||
short used; /* Whether the mode option was used or not. */
|
||||
short width;
|
||||
short height;
|
||||
short bpp;
|
||||
short freq;
|
||||
short flags;
|
||||
};
|
||||
|
||||
extern struct mode_option resolution; /* fVDI */
|
||||
|
||||
#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
|
||||
#define FB_TYPE_PLANES 1 /* Non interleaved planes */
|
||||
#define FB_TYPE_INTERLEAVED_PLANES 2 /* Interleaved planes */
|
||||
#define FB_TYPE_TEXT 3 /* Text/attributes */
|
||||
#define FB_TYPE_VGA_PLANES 4 /* EGA/VGA planes */
|
||||
#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
|
||||
#define FB_TYPE_PLANES 1 /* Non interleaved planes */
|
||||
#define FB_TYPE_INTERLEAVED_PLANES 2 /* Interleaved planes */
|
||||
#define FB_TYPE_TEXT 3 /* Text/attributes */
|
||||
#define FB_TYPE_VGA_PLANES 4 /* EGA/VGA planes */
|
||||
|
||||
#define FB_AUX_TEXT_MDA 0 /* Monochrome text */
|
||||
#define FB_AUX_TEXT_CGA 1 /* CGA/EGA/VGA Color text */
|
||||
#define FB_AUX_TEXT_S3_MMIO 2 /* S3 MMIO fasttext */
|
||||
#define FB_AUX_TEXT_MGA_STEP16 3 /* MGA Millenium I: text, attr, 14 reserved bytes */
|
||||
#define FB_AUX_TEXT_MGA_STEP8 4 /* other MGAs: text, attr, 6 reserved bytes */
|
||||
#define FB_AUX_TEXT_MDA 0 /* Monochrome text */
|
||||
#define FB_AUX_TEXT_CGA 1 /* CGA/EGA/VGA Color text */
|
||||
#define FB_AUX_TEXT_S3_MMIO 2 /* S3 MMIO fasttext */
|
||||
#define FB_AUX_TEXT_MGA_STEP16 3 /* MGA Millenium I: text, attr, 14 reserved bytes */
|
||||
#define FB_AUX_TEXT_MGA_STEP8 4 /* other MGAs: text, attr, 6 reserved bytes */
|
||||
|
||||
#define FB_AUX_VGA_PLANES_VGA4 0 /* 16 color planes (EGA/VGA) */
|
||||
#define FB_AUX_VGA_PLANES_CFB4 1 /* CFB4 in planes (VGA) */
|
||||
#define FB_AUX_VGA_PLANES_CFB8 2 /* CFB8 in planes (VGA) */
|
||||
#define FB_AUX_VGA_PLANES_VGA4 0 /* 16 color planes (EGA/VGA) */
|
||||
#define FB_AUX_VGA_PLANES_CFB4 1 /* CFB4 in planes (VGA) */
|
||||
#define FB_AUX_VGA_PLANES_CFB8 2 /* CFB8 in planes (VGA) */
|
||||
|
||||
#define FB_VISUAL_MONO01 0 /* Monochr. 1=Black 0=White */
|
||||
#define FB_VISUAL_MONO10 1 /* Monochr. 1=White 0=Black */
|
||||
#define FB_VISUAL_TRUECOLOR 2 /* True color */
|
||||
#define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */
|
||||
#define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */
|
||||
#define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */
|
||||
#define FB_VISUAL_MONO01 0 /* Monochr. 1=Black 0=White */
|
||||
#define FB_VISUAL_MONO10 1 /* Monochr. 1=White 0=Black */
|
||||
#define FB_VISUAL_TRUECOLOR 2 /* True color */
|
||||
#define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */
|
||||
#define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */
|
||||
#define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */
|
||||
|
||||
#define FB_ACCEL_NONE 0 /* no hardware accelerator */
|
||||
#define FB_ACCEL_ATARIBLITT 1 /* Atari Blitter */
|
||||
#define FB_ACCEL_AMIGABLITT 2 /* Amiga Blitter */
|
||||
#define FB_ACCEL_S3_TRIO64 3 /* Cybervision64 (S3 Trio64) */
|
||||
#define FB_ACCEL_NCR_77C32BLT 4 /* RetinaZ3 (NCR 77C32BLT) */
|
||||
#define FB_ACCEL_S3_VIRGE 5 /* Cybervision64/3D (S3 ViRGE) */
|
||||
#define FB_ACCEL_ATI_MACH64GX 6 /* ATI Mach 64GX family */
|
||||
#define FB_ACCEL_DEC_TGA 7 /* DEC 21030 TGA */
|
||||
#define FB_ACCEL_ATI_MACH64CT 8 /* ATI Mach 64CT family */
|
||||
#define FB_ACCEL_ATI_MACH64VT 9 /* ATI Mach 64CT family VT class */
|
||||
#define FB_ACCEL_ATI_MACH64GT 10 /* ATI Mach 64CT family GT class */
|
||||
#define FB_ACCEL_SUN_CREATOR 11 /* Sun Creator/Creator3D */
|
||||
#define FB_ACCEL_SUN_CGSIX 12 /* Sun cg6 */
|
||||
#define FB_ACCEL_SUN_LEO 13 /* Sun leo/zx */
|
||||
#define FB_ACCEL_IMS_TWINTURBO 14 /* IMS Twin Turbo */
|
||||
#define FB_ACCEL_3DLABS_PERMEDIA2 15 /* 3Dlabs Permedia 2 */
|
||||
#define FB_ACCEL_MATROX_MGA2064W 16 /* Matrox MGA2064W (Millenium) */
|
||||
#define FB_ACCEL_MATROX_MGA1064SG 17 /* Matrox MGA1064SG (Mystique) */
|
||||
#define FB_ACCEL_MATROX_MGA2164W 18 /* Matrox MGA2164W (Millenium II) */
|
||||
#define FB_ACCEL_MATROX_MGA2164W_AGP 19 /* Matrox MGA2164W (Millenium II) */
|
||||
#define FB_ACCEL_MATROX_MGAG100 20 /* Matrox G100 (Productiva G100) */
|
||||
#define FB_ACCEL_MATROX_MGAG200 21 /* Matrox G200 (Myst, Mill, ...) */
|
||||
#define FB_ACCEL_SUN_CG14 22 /* Sun cgfourteen */
|
||||
#define FB_ACCEL_SUN_BWTWO 23 /* Sun bwtwo */
|
||||
#define FB_ACCEL_SUN_CGTHREE 24 /* Sun cgthree */
|
||||
#define FB_ACCEL_SUN_TCX 25 /* Sun tcx */
|
||||
#define FB_ACCEL_MATROX_MGAG400 26 /* Matrox G400 */
|
||||
#define FB_ACCEL_NV3 27 /* nVidia RIVA 128 */
|
||||
#define FB_ACCEL_NV4 28 /* nVidia RIVA TNT */
|
||||
#define FB_ACCEL_NV5 29 /* nVidia RIVA TNT2 */
|
||||
#define FB_ACCEL_CT_6555x 30 /* C&T 6555x */
|
||||
#define FB_ACCEL_3DFX_BANSHEE 31 /* 3Dfx Banshee */
|
||||
#define FB_ACCEL_ATI_RAGE128 32 /* ATI Rage128 family */
|
||||
#define FB_ACCEL_IGS_CYBER2000 33 /* CyberPro 2000 */
|
||||
#define FB_ACCEL_IGS_CYBER2010 34 /* CyberPro 2010 */
|
||||
#define FB_ACCEL_IGS_CYBER5000 35 /* CyberPro 5000 */
|
||||
#define FB_ACCEL_SIS_GLAMOUR 36 /* SiS 300/630/540 */
|
||||
#define FB_ACCEL_3DLABS_PERMEDIA3 37 /* 3Dlabs Permedia 3 */
|
||||
#define FB_ACCEL_ATI_RADEON 38 /* ATI Radeon family */
|
||||
#define FB_ACCEL_I810 39 /* Intel 810/815 */
|
||||
#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */
|
||||
#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */
|
||||
#define FB_ACCEL_I830 42 /* Intel 830M/845G/85x/865G */
|
||||
#define FB_ACCEL_NV_10 43 /* nVidia Arch 10 */
|
||||
#define FB_ACCEL_NV_20 44 /* nVidia Arch 20 */
|
||||
#define FB_ACCEL_NV_30 45 /* nVidia Arch 30 */
|
||||
#define FB_ACCEL_NV_40 46 /* nVidia Arch 40 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2097 93 /* NeoMagic NM2097 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2160 94 /* NeoMagic NM2160 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2200 95 /* NeoMagic NM2200 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */
|
||||
#define FB_ACCEL_NONE 0 /* no hardware accelerator */
|
||||
#define FB_ACCEL_ATARIBLITT 1 /* Atari Blitter */
|
||||
#define FB_ACCEL_AMIGABLITT 2 /* Amiga Blitter */
|
||||
#define FB_ACCEL_S3_TRIO64 3 /* Cybervision64 (S3 Trio64) */
|
||||
#define FB_ACCEL_NCR_77C32BLT 4 /* RetinaZ3 (NCR 77C32BLT) */
|
||||
#define FB_ACCEL_S3_VIRGE 5 /* Cybervision64/3D (S3 ViRGE) */
|
||||
#define FB_ACCEL_ATI_MACH64GX 6 /* ATI Mach 64GX family */
|
||||
#define FB_ACCEL_DEC_TGA 7 /* DEC 21030 TGA */
|
||||
#define FB_ACCEL_ATI_MACH64CT 8 /* ATI Mach 64CT family */
|
||||
#define FB_ACCEL_ATI_MACH64VT 9 /* ATI Mach 64CT family VT class */
|
||||
#define FB_ACCEL_ATI_MACH64GT 10 /* ATI Mach 64CT family GT class */
|
||||
#define FB_ACCEL_SUN_CREATOR 11 /* Sun Creator/Creator3D */
|
||||
#define FB_ACCEL_SUN_CGSIX 12 /* Sun cg6 */
|
||||
#define FB_ACCEL_SUN_LEO 13 /* Sun leo/zx */
|
||||
#define FB_ACCEL_IMS_TWINTURBO 14 /* IMS Twin Turbo */
|
||||
#define FB_ACCEL_3DLABS_PERMEDIA2 15 /* 3Dlabs Permedia 2 */
|
||||
#define FB_ACCEL_MATROX_MGA2064W 16 /* Matrox MGA2064W (Millenium) */
|
||||
#define FB_ACCEL_MATROX_MGA1064SG 17 /* Matrox MGA1064SG (Mystique) */
|
||||
#define FB_ACCEL_MATROX_MGA2164W 18 /* Matrox MGA2164W (Millenium II) */
|
||||
#define FB_ACCEL_MATROX_MGA2164W_AGP 19 /* Matrox MGA2164W (Millenium II) */
|
||||
#define FB_ACCEL_MATROX_MGAG100 20 /* Matrox G100 (Productiva G100) */
|
||||
#define FB_ACCEL_MATROX_MGAG200 21 /* Matrox G200 (Myst, Mill, ...) */
|
||||
#define FB_ACCEL_SUN_CG14 22 /* Sun cgfourteen */
|
||||
#define FB_ACCEL_SUN_BWTWO 23 /* Sun bwtwo */
|
||||
#define FB_ACCEL_SUN_CGTHREE 24 /* Sun cgthree */
|
||||
#define FB_ACCEL_SUN_TCX 25 /* Sun tcx */
|
||||
#define FB_ACCEL_MATROX_MGAG400 26 /* Matrox G400 */
|
||||
#define FB_ACCEL_NV3 27 /* nVidia RIVA 128 */
|
||||
#define FB_ACCEL_NV4 28 /* nVidia RIVA TNT */
|
||||
#define FB_ACCEL_NV5 29 /* nVidia RIVA TNT2 */
|
||||
#define FB_ACCEL_CT_6555x 30 /* C&T 6555x */
|
||||
#define FB_ACCEL_3DFX_BANSHEE 31 /* 3Dfx Banshee */
|
||||
#define FB_ACCEL_ATI_RAGE128 32 /* ATI Rage128 family */
|
||||
#define FB_ACCEL_IGS_CYBER2000 33 /* CyberPro 2000 */
|
||||
#define FB_ACCEL_IGS_CYBER2010 34 /* CyberPro 2010 */
|
||||
#define FB_ACCEL_IGS_CYBER5000 35 /* CyberPro 5000 */
|
||||
#define FB_ACCEL_SIS_GLAMOUR 36 /* SiS 300/630/540 */
|
||||
#define FB_ACCEL_3DLABS_PERMEDIA3 37 /* 3Dlabs Permedia 3 */
|
||||
#define FB_ACCEL_ATI_RADEON 38 /* ATI Radeon family */
|
||||
#define FB_ACCEL_I810 39 /* Intel 810/815 */
|
||||
#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */
|
||||
#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */
|
||||
#define FB_ACCEL_I830 42 /* Intel 830M/845G/85x/865G */
|
||||
#define FB_ACCEL_NV_10 43 /* nVidia Arch 10 */
|
||||
#define FB_ACCEL_NV_20 44 /* nVidia Arch 20 */
|
||||
#define FB_ACCEL_NV_30 45 /* nVidia Arch 30 */
|
||||
#define FB_ACCEL_NV_40 46 /* nVidia Arch 40 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2097 93 /* NeoMagic NM2097 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2160 94 /* NeoMagic NM2160 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2200 95 /* NeoMagic NM2200 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */
|
||||
|
||||
#define FB_ACCEL_SAVAGE4 0x80 /* S3 Savage4 */
|
||||
#define FB_ACCEL_SAVAGE3D 0x81 /* S3 Savage3D */
|
||||
#define FB_ACCEL_SAVAGE3D_MV 0x82 /* S3 Savage3D-MV */
|
||||
#define FB_ACCEL_SAVAGE2000 0x83 /* S3 Savage2000 */
|
||||
#define FB_ACCEL_SAVAGE_MX_MV 0x84 /* S3 Savage/MX-MV */
|
||||
#define FB_ACCEL_SAVAGE_MX 0x85 /* S3 Savage/MX */
|
||||
#define FB_ACCEL_SAVAGE_IX_MV 0x86 /* S3 Savage/IX-MV */
|
||||
#define FB_ACCEL_SAVAGE_IX 0x87 /* S3 Savage/IX */
|
||||
#define FB_ACCEL_PROSAVAGE_PM 0x88 /* S3 ProSavage PM133 */
|
||||
#define FB_ACCEL_PROSAVAGE_KM 0x89 /* S3 ProSavage KM133 */
|
||||
#define FB_ACCEL_S3TWISTER_P 0x8a /* S3 Twister */
|
||||
#define FB_ACCEL_S3TWISTER_K 0x8b /* S3 TwisterK */
|
||||
#define FB_ACCEL_SUPERSAVAGE 0x8c /* S3 Supersavage */
|
||||
#define FB_ACCEL_PROSAVAGE_DDR 0x8d /* S3 ProSavage DDR */
|
||||
#define FB_ACCEL_PROSAVAGE_DDRK 0x8e /* S3 ProSavage DDR-K */
|
||||
#define FB_ACCEL_SAVAGE4 0x80 /* S3 Savage4 */
|
||||
#define FB_ACCEL_SAVAGE3D 0x81 /* S3 Savage3D */
|
||||
#define FB_ACCEL_SAVAGE3D_MV 0x82 /* S3 Savage3D-MV */
|
||||
#define FB_ACCEL_SAVAGE2000 0x83 /* S3 Savage2000 */
|
||||
#define FB_ACCEL_SAVAGE_MX_MV 0x84 /* S3 Savage/MX-MV */
|
||||
#define FB_ACCEL_SAVAGE_MX 0x85 /* S3 Savage/MX */
|
||||
#define FB_ACCEL_SAVAGE_IX_MV 0x86 /* S3 Savage/IX-MV */
|
||||
#define FB_ACCEL_SAVAGE_IX 0x87 /* S3 Savage/IX */
|
||||
#define FB_ACCEL_PROSAVAGE_PM 0x88 /* S3 ProSavage PM133 */
|
||||
#define FB_ACCEL_PROSAVAGE_KM 0x89 /* S3 ProSavage KM133 */
|
||||
#define FB_ACCEL_S3TWISTER_P 0x8a /* S3 Twister */
|
||||
#define FB_ACCEL_S3TWISTER_K 0x8b /* S3 TwisterK */
|
||||
#define FB_ACCEL_SUPERSAVAGE 0x8c /* S3 Supersavage */
|
||||
#define FB_ACCEL_PROSAVAGE_DDR 0x8d /* S3 ProSavage DDR */
|
||||
#define FB_ACCEL_PROSAVAGE_DDRK 0x8e /* S3 ProSavage DDR-K */
|
||||
|
||||
struct fb_fix_screeninfo {
|
||||
char id[16]; /* identification string eg "TT Builtin" */
|
||||
unsigned long smem_start; /* Start of frame buffer mem */
|
||||
/* (physical address) */
|
||||
unsigned long smem_len; /* Length of frame buffer mem */
|
||||
unsigned long type; /* see FB_TYPE_* */
|
||||
unsigned long type_aux; /* Interleave for interleaved Planes */
|
||||
unsigned long visual; /* see FB_VISUAL_* */
|
||||
unsigned short xpanstep; /* zero if no hardware panning */
|
||||
unsigned short ypanstep; /* zero if no hardware panning */
|
||||
unsigned short ywrapstep; /* zero if no hardware ywrap */
|
||||
unsigned long line_length; /* length of a line in bytes */
|
||||
unsigned long mmio_start; /* Start of Memory Mapped I/O */
|
||||
/* (physical address) */
|
||||
unsigned long mmio_len; /* Length of Memory Mapped I/O */
|
||||
unsigned long accel; /* Indicate to driver which */
|
||||
/* specific chip/card we have */
|
||||
unsigned short reserved[3]; /* Reserved for future compatibility */
|
||||
struct fb_fix_screeninfo
|
||||
{
|
||||
char id[16]; /* identification string eg "TT Builtin" */
|
||||
uint32_t smem_start; /* Start of frame buffer mem */
|
||||
/* (physical address) */
|
||||
uint32_t smem_len; /* Length of frame buffer mem */
|
||||
uint32_t type; /* see FB_TYPE_* */
|
||||
uint32_t type_aux; /* Interleave for interleaved Planes */
|
||||
uint32_t visual; /* see FB_VISUAL_* */
|
||||
uint16_t xpanstep; /* zero if no hardware panning */
|
||||
uint16_t ypanstep; /* zero if no hardware panning */
|
||||
uint16_t ywrapstep; /* zero if no hardware ywrap */
|
||||
uint32_t line_length; /* length of a line in bytes */
|
||||
uint32_t mmio_start; /* Start of Memory Mapped I/O */
|
||||
/* (physical address) */
|
||||
uint32_t mmio_len; /* Length of Memory Mapped I/O */
|
||||
uint32_t accel; /* Indicate to driver which */
|
||||
/* specific chip/card we have */
|
||||
uint16_t reserved[3]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
/* Interpretation of offset for color fields: All offsets are from the right,
|
||||
@@ -199,87 +209,89 @@ struct fb_fix_screeninfo {
|
||||
* stream and is written to video memory as that unmodified. This implies
|
||||
* big-endian byte order if bits_per_pixel is greater than 8.
|
||||
*/
|
||||
struct fb_bitfield {
|
||||
unsigned long offset; /* beginning of bitfield */
|
||||
unsigned long length; /* length of bitfield */
|
||||
unsigned long msb_right; /* != 0 : Most significant bit is */
|
||||
/* right */
|
||||
struct fb_bitfield
|
||||
{
|
||||
uint32_t offset; /* beginning of bitfield */
|
||||
uint32_t length; /* length of bitfield */
|
||||
uint32_t msb_right; /* != 0 : Most significant bit is */
|
||||
/* right */
|
||||
};
|
||||
|
||||
#define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
|
||||
#define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
|
||||
|
||||
#define FB_ACTIVATE_NOW 0 /* set values immediately (or vbl)*/
|
||||
#define FB_ACTIVATE_NXTOPEN 1 /* activate on next open */
|
||||
#define FB_ACTIVATE_TEST 2 /* don't set, round up impossible */
|
||||
#define FB_ACTIVATE_NOW 0 /* set values immediately (or vbl)*/
|
||||
#define FB_ACTIVATE_NXTOPEN 1 /* activate on next open */
|
||||
#define FB_ACTIVATE_TEST 2 /* don't set, round up impossible */
|
||||
#define FB_ACTIVATE_MASK 15
|
||||
/* values */
|
||||
#define FB_ACTIVATE_VBL 16 /* activate values on next vbl */
|
||||
#define FB_CHANGE_CMAP_VBL 32 /* change colormap on vbl */
|
||||
#define FB_ACTIVATE_ALL 64 /* change all VCs on this fb */
|
||||
#define FB_ACTIVATE_FORCE 128 /* force apply even when no change*/
|
||||
#define FB_ACTIVATE_INV_MODE 256 /* invalidate videomode */
|
||||
/* values */
|
||||
#define FB_ACTIVATE_VBL 16 /* activate values on next vbl */
|
||||
#define FB_CHANGE_CMAP_VBL 32 /* change colormap on vbl */
|
||||
#define FB_ACTIVATE_ALL 64 /* change all VCs on this fb */
|
||||
#define FB_ACTIVATE_FORCE 128 /* force apply even when no change*/
|
||||
#define FB_ACTIVATE_INV_MODE 256 /* invalidate videomode */
|
||||
|
||||
#define FB_ACCELF_TEXT 1 /* (OBSOLETE) see fb_info.flags and vc_mode */
|
||||
#define FB_ACCELF_TEXT 1 /* (OBSOLETE) see fb_info.flags and vc_mode */
|
||||
|
||||
#define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */
|
||||
#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
|
||||
#define FB_SYNC_EXT 4 /* external sync */
|
||||
#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
|
||||
#define FB_SYNC_BROADCAST 16 /* broadcast video timings */
|
||||
/* vtotal = 144d/288n/576i => PAL */
|
||||
/* vtotal = 121d/242n/484i => NTSC */
|
||||
#define FB_SYNC_ON_GREEN 32 /* sync on green */
|
||||
#define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */
|
||||
#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
|
||||
#define FB_SYNC_EXT 4 /* external sync */
|
||||
#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
|
||||
#define FB_SYNC_BROADCAST 16 /* broadcast video timings */
|
||||
/* vtotal = 144d/288n/576i => PAL */
|
||||
/* vtotal = 121d/242n/484i => NTSC */
|
||||
#define FB_SYNC_ON_GREEN 32 /* sync on green */
|
||||
|
||||
#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
|
||||
#define FB_VMODE_INTERLACED 1 /* interlaced */
|
||||
#define FB_VMODE_DOUBLE 2 /* double scan */
|
||||
#define FB_VMODE_MASK 255
|
||||
#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
|
||||
#define FB_VMODE_INTERLACED 1 /* interlaced */
|
||||
#define FB_VMODE_DOUBLE 2 /* double scan */
|
||||
#define FB_VMODE_MASK 255
|
||||
|
||||
#define FB_VMODE_YWRAP 256 /* ywrap instead of panning */
|
||||
#define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */
|
||||
#define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */
|
||||
#define FB_VMODE_YWRAP 256 /* ywrap instead of panning */
|
||||
#define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */
|
||||
#define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */
|
||||
|
||||
#define PICOS2KHZ(a) (1000000000UL/(a))
|
||||
#define KHZ2PICOS(a) (1000000000UL/(a))
|
||||
#define PICOS2KHZ(a) (1000000000UL / (a))
|
||||
#define KHZ2PICOS(a) (1000000000UL / (a))
|
||||
|
||||
struct fb_var_screeninfo {
|
||||
unsigned long xres; /* visible resolution */
|
||||
unsigned long yres;
|
||||
unsigned long xres_virtual; /* virtual resolution */
|
||||
unsigned long yres_virtual;
|
||||
unsigned long xoffset; /* offset from virtual to visible */
|
||||
unsigned long yoffset; /* resolution */
|
||||
struct fb_var_screeninfo
|
||||
{
|
||||
uint32_t xres; /* visible resolution */
|
||||
uint32_t yres;
|
||||
uint32_t xres_virtual; /* virtual resolution */
|
||||
uint32_t yres_virtual;
|
||||
uint32_t xoffset; /* offset from virtual to visible */
|
||||
uint32_t yoffset; /* resolution */
|
||||
|
||||
unsigned long bits_per_pixel; /* guess what */
|
||||
unsigned long grayscale; /* != 0 Graylevels instead of colors */
|
||||
uint32_t bits_per_pixel; /* guess what */
|
||||
uint32_t grayscale; /* != 0 Graylevels instead of colors */
|
||||
|
||||
struct fb_bitfield red; /* bitfield in fb mem if true color, */
|
||||
struct fb_bitfield green; /* else only length is significant */
|
||||
struct fb_bitfield blue;
|
||||
struct fb_bitfield transp; /* transparency */
|
||||
struct fb_bitfield red; /* bitfield in fb mem if true color, */
|
||||
struct fb_bitfield green; /* else only length is significant */
|
||||
struct fb_bitfield blue;
|
||||
struct fb_bitfield transp; /* transparency */
|
||||
|
||||
unsigned long nonstd; /* != 0 Non standard pixel format */
|
||||
uint32_t nonstd; /* != 0 Non standard pixel format */
|
||||
|
||||
unsigned long activate; /* see FB_ACTIVATE_* */
|
||||
uint32_t activate; /* see FB_ACTIVATE_* */
|
||||
|
||||
unsigned long height; /* height of picture in mm */
|
||||
unsigned long width; /* width of picture in mm */
|
||||
uint32_t height; /* height of picture in mm */
|
||||
uint32_t width; /* width of picture in mm */
|
||||
|
||||
unsigned long accel_flags; /* (OBSOLETE) see fb_info.flags */
|
||||
uint32_t accel_flags; /* (OBSOLETE) see fb_info.flags */
|
||||
|
||||
/* Timing: All values in pixclocks, except pixclock (of course) */
|
||||
unsigned long pixclock; /* pixel clock in ps (pico seconds) */
|
||||
unsigned long left_margin; /* time from sync to picture */
|
||||
unsigned long right_margin; /* time from picture to sync */
|
||||
unsigned long upper_margin; /* time from sync to picture */
|
||||
unsigned long lower_margin;
|
||||
unsigned long hsync_len; /* length of horizontal sync */
|
||||
unsigned long vsync_len; /* length of vertical sync */
|
||||
unsigned long sync; /* see FB_SYNC_* */
|
||||
unsigned long vmode; /* see FB_VMODE_* */
|
||||
unsigned long rotate; /* angle we rotate counter clockwise */
|
||||
unsigned long refresh;
|
||||
unsigned long reserved[4]; /* Reserved for future compatibility */
|
||||
/* Timing: All values in pixclocks, except pixclock (of course) */
|
||||
uint32_t pixclock; /* pixel clock in ps (pico seconds) */
|
||||
uint32_t left_margin; /* time from sync to picture */
|
||||
uint32_t right_margin; /* time from picture to sync */
|
||||
uint32_t upper_margin; /* time from sync to picture */
|
||||
uint32_t lower_margin;
|
||||
uint32_t hsync_len; /* length of horizontal sync */
|
||||
uint32_t vsync_len; /* length of vertical sync */
|
||||
uint32_t sync; /* see FB_SYNC_* */
|
||||
uint32_t vmode; /* see FB_VMODE_* */
|
||||
uint32_t rotate; /* angle we rotate counter clockwise */
|
||||
uint32_t refresh;
|
||||
uint32_t reserved[4]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
/* VESA Blanking Levels */
|
||||
@@ -288,35 +300,37 @@ struct fb_var_screeninfo {
|
||||
#define VESA_HSYNC_SUSPEND 2
|
||||
#define VESA_POWERDOWN 3
|
||||
|
||||
enum {
|
||||
/* screen: unblanked, hsync: on, vsync: on */
|
||||
FB_BLANK_UNBLANK = VESA_NO_BLANKING,
|
||||
/* screen: blanked, hsync: on, vsync: on */
|
||||
FB_BLANK_NORMAL = VESA_NO_BLANKING + 1,
|
||||
/* screen: blanked, hsync: on, vsync: off */
|
||||
FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1,
|
||||
/* screen: blanked, hsync: off, vsync: on */
|
||||
FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1,
|
||||
/* screen: blanked, hsync: off, vsync: off */
|
||||
FB_BLANK_POWERDOWN = VESA_POWERDOWN + 1
|
||||
enum
|
||||
{
|
||||
/* screen: unblanked, hsync: on, vsync: on */
|
||||
FB_BLANK_UNBLANK = VESA_NO_BLANKING,
|
||||
/* screen: blanked, hsync: on, vsync: on */
|
||||
FB_BLANK_NORMAL = VESA_NO_BLANKING + 1,
|
||||
/* screen: blanked, hsync: on, vsync: off */
|
||||
FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1,
|
||||
/* screen: blanked, hsync: off, vsync: on */
|
||||
FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1,
|
||||
/* screen: blanked, hsync: off, vsync: off */
|
||||
FB_BLANK_POWERDOWN = VESA_POWERDOWN + 1
|
||||
};
|
||||
|
||||
#define FB_VBLANK_VBLANKING 0x001 /* currently in a vertical blank */
|
||||
#define FB_VBLANK_HBLANKING 0x002 /* currently in a horizontal blank */
|
||||
#define FB_VBLANK_VBLANKING 0x001 /* currently in a vertical blank */
|
||||
#define FB_VBLANK_HBLANKING 0x002 /* currently in a horizontal blank */
|
||||
#define FB_VBLANK_HAVE_VBLANK 0x004 /* vertical blanks can be detected */
|
||||
#define FB_VBLANK_HAVE_HBLANK 0x008 /* horizontal blanks can be detected */
|
||||
#define FB_VBLANK_HAVE_COUNT 0x010 /* global retrace counter is available */
|
||||
#define FB_VBLANK_HAVE_VCOUNT 0x020 /* the vcount field is valid */
|
||||
#define FB_VBLANK_HAVE_HCOUNT 0x040 /* the hcount field is valid */
|
||||
#define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */
|
||||
#define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */
|
||||
#define FB_VBLANK_HAVE_VSYNC 0x100 /* verical syncs can be detected */
|
||||
|
||||
struct fb_vblank {
|
||||
unsigned long flags; /* FB_VBLANK flags */
|
||||
unsigned long count; /* counter of retraces since boot */
|
||||
unsigned long vcount; /* current scanline position */
|
||||
unsigned long hcount; /* current scandot position */
|
||||
unsigned long reserved[4]; /* reserved for future compatibility */
|
||||
struct fb_vblank
|
||||
{
|
||||
uint32_t flags; /* FB_VBLANK flags */
|
||||
uint32_t count; /* counter of retraces since boot */
|
||||
uint32_t vcount; /* current scanline position */
|
||||
uint32_t hcount; /* current scandot position */
|
||||
uint32_t reserved[4]; /* reserved for future compatibility */
|
||||
};
|
||||
|
||||
struct vm_area_struct;
|
||||
@@ -325,155 +339,160 @@ struct device;
|
||||
struct file;
|
||||
|
||||
/* Definitions below are used in the parsed monitor specs */
|
||||
#define FB_DPMS_ACTIVE_OFF 1
|
||||
#define FB_DPMS_SUSPEND 2
|
||||
#define FB_DPMS_STANDBY 4
|
||||
#define FB_DPMS_ACTIVE_OFF 1
|
||||
#define FB_DPMS_SUSPEND 2
|
||||
#define FB_DPMS_STANDBY 4
|
||||
|
||||
#define FB_DISP_DDI 1
|
||||
#define FB_DISP_ANA_700_300 2
|
||||
#define FB_DISP_ANA_714_286 4
|
||||
#define FB_DISP_ANA_1000_400 8
|
||||
#define FB_DISP_ANA_700_000 16
|
||||
#define FB_DISP_DDI 1
|
||||
#define FB_DISP_ANA_700_300 2
|
||||
#define FB_DISP_ANA_714_286 4
|
||||
#define FB_DISP_ANA_1000_400 8
|
||||
#define FB_DISP_ANA_700_000 16
|
||||
|
||||
#define FB_DISP_MONO 32
|
||||
#define FB_DISP_RGB 64
|
||||
#define FB_DISP_MULTI 128
|
||||
#define FB_DISP_UNKNOWN 256
|
||||
#define FB_DISP_MONO 32
|
||||
#define FB_DISP_RGB 64
|
||||
#define FB_DISP_MULTI 128
|
||||
#define FB_DISP_UNKNOWN 256
|
||||
|
||||
#define FB_SIGNAL_NONE 0
|
||||
#define FB_SIGNAL_BLANK_BLANK 1
|
||||
#define FB_SIGNAL_SEPARATE 2
|
||||
#define FB_SIGNAL_COMPOSITE 4
|
||||
#define FB_SIGNAL_NONE 0
|
||||
#define FB_SIGNAL_BLANK_BLANK 1
|
||||
#define FB_SIGNAL_SEPARATE 2
|
||||
#define FB_SIGNAL_COMPOSITE 4
|
||||
#define FB_SIGNAL_SYNC_ON_GREEN 8
|
||||
#define FB_SIGNAL_SERRATION_ON 16
|
||||
#define FB_SIGNAL_SERRATION_ON 16
|
||||
|
||||
#define FB_MISC_PRIM_COLOR 1
|
||||
#define FB_MISC_1ST_DETAIL 2 /* First Detailed Timing is preferred */
|
||||
struct fb_chroma {
|
||||
unsigned long redx; /* in fraction of 1024 */
|
||||
unsigned long greenx;
|
||||
unsigned long bluex;
|
||||
unsigned long whitex;
|
||||
unsigned long redy;
|
||||
unsigned long greeny;
|
||||
unsigned long bluey;
|
||||
unsigned long whitey;
|
||||
#define FB_MISC_PRIM_COLOR 1
|
||||
#define FB_MISC_1ST_DETAIL 2 /* First Detailed Timing is preferred */
|
||||
|
||||
struct fb_chroma
|
||||
{
|
||||
uint32_t redx; /* in fraction of 1024 */
|
||||
uint32_t greenx;
|
||||
uint32_t bluex;
|
||||
uint32_t whitex;
|
||||
uint32_t redy;
|
||||
uint32_t greeny;
|
||||
uint32_t bluey;
|
||||
uint32_t whitey;
|
||||
};
|
||||
|
||||
struct fb_monspecs {
|
||||
struct fb_chroma chroma;
|
||||
struct fb_videomode *modedb; /* mode database */
|
||||
unsigned char manufacturer[4]; /* Manufacturer */
|
||||
unsigned char monitor[14]; /* Monitor String */
|
||||
unsigned char serial_no[14]; /* Serial Number */
|
||||
unsigned char ascii[14]; /* ? */
|
||||
unsigned long modedb_len; /* mode database length */
|
||||
unsigned long model; /* Monitor Model */
|
||||
unsigned long serial; /* Serial Number - Integer */
|
||||
unsigned long year; /* Year manufactured */
|
||||
unsigned long week; /* Week Manufactured */
|
||||
unsigned long hfmin; /* hfreq lower limit (Hz) */
|
||||
unsigned long hfmax; /* hfreq upper limit (Hz) */
|
||||
unsigned long dclkmin; /* pixelclock lower limit (Hz) */
|
||||
unsigned long dclkmax; /* pixelclock upper limit (Hz) */
|
||||
unsigned short input; /* display type - see FB_DISP_* */
|
||||
unsigned short dpms; /* DPMS support - see FB_DPMS_ */
|
||||
unsigned short signal; /* Signal Type - see FB_SIGNAL_* */
|
||||
unsigned short vfmin; /* vfreq lower limit (Hz) */
|
||||
unsigned short vfmax; /* vfreq upper limit (Hz) */
|
||||
unsigned short gamma; /* Gamma - in fractions of 100 */
|
||||
unsigned short gtf : 1; /* supports GTF */
|
||||
unsigned short misc; /* Misc flags - see FB_MISC_* */
|
||||
unsigned char version; /* EDID version... */
|
||||
unsigned char revision; /* ...and revision */
|
||||
unsigned char max_x; /* Maximum horizontal size (cm) */
|
||||
unsigned char max_y; /* Maximum vertical size (cm) */
|
||||
struct fb_monspecs
|
||||
{
|
||||
struct fb_chroma chroma;
|
||||
struct fb_videomode *modedb; /* mode database */
|
||||
uint8_t manufacturer[4]; /* Manufacturer */
|
||||
uint8_t monitor[14]; /* Monitor String */
|
||||
uint8_t serial_no[14]; /* Serial Number */
|
||||
uint8_t ascii[14]; /* ? */
|
||||
uint32_t modedb_len; /* mode database length */
|
||||
uint32_t model; /* Monitor Model */
|
||||
uint32_t serial; /* Serial Number - Integer */
|
||||
uint32_t year; /* Year manufactured */
|
||||
uint32_t week; /* Week Manufactured */
|
||||
uint32_t hfmin; /* hfreq lower limit (Hz) */
|
||||
uint32_t hfmax; /* hfreq upper limit (Hz) */
|
||||
uint32_t dclkmin; /* pixelclock lower limit (Hz) */
|
||||
uint32_t dclkmax; /* pixelclock upper limit (Hz) */
|
||||
uint16_t input; /* display type - see FB_DISP_* */
|
||||
uint16_t dpms; /* DPMS support - see FB_DPMS_ */
|
||||
uint16_t signal; /* Signal Type - see FB_SIGNAL_* */
|
||||
uint16_t vfmin; /* vfreq lower limit (Hz) */
|
||||
uint16_t vfmax; /* vfreq upper limit (Hz) */
|
||||
uint16_t gamma; /* Gamma - in fractions of 100 */
|
||||
uint16_t gtf : 1; /* supports GTF */
|
||||
uint16_t misc; /* Misc flags - see FB_MISC_* */
|
||||
uint8_t version; /* EDID version... */
|
||||
uint8_t revision; /* ...and revision */
|
||||
uint8_t max_x; /* Maximum horizontal size (cm) */
|
||||
uint8_t max_y; /* Maximum vertical size (cm) */
|
||||
};
|
||||
|
||||
struct fb_ops {
|
||||
/* checks var and eventually tweaks if to soomething supported,
|
||||
* DO NOT MODIFY PAR */
|
||||
int (*fb_check_var)(struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
/* set the video mode according to info->var */
|
||||
int (*fb_set_par)(struct fb_info *info);
|
||||
/* set color register */
|
||||
int (*fb_setcolreg)(unsigned regno, unsigned red, unsigned green,
|
||||
unsigned blue, unsigned transp, struct fb_info *info);
|
||||
/* pan display */
|
||||
int (*fb_pan_display)(struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
/* blank display */
|
||||
int (*fb_blank)(int blank, struct fb_info *info);
|
||||
/* wait for blit idle */
|
||||
int (*fb_sync)(struct fb_info *info);
|
||||
/* perform fb specific ioctl */
|
||||
int (*fb_ioctl)(unsigned int cmd, unsigned long arg, struct fb_info *info);
|
||||
/* Buildthe modedb for head 1 (head 2 will come later), check panel infos
|
||||
* from either BIOS or EDID, and pick up the default mode */
|
||||
void (*fb_check_modes)(struct fb_info *info, struct mode_option *resolution);
|
||||
/* Accel functions */
|
||||
struct fb_ops
|
||||
{
|
||||
/* checks var and eventually tweaks if to something supported,
|
||||
* DO NOT MODIFY PAR */
|
||||
int32_t (*fb_check_var)(struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
/* set the video mode according to info->var */
|
||||
int32_t (*fb_set_par)(struct fb_info *info);
|
||||
/* set color register */
|
||||
int32_t (*fb_setcolreg)(uint32_t regno, uint32_t red, uint32_t green,
|
||||
uint32_t blue, uint32_t transp, struct fb_info *info);
|
||||
/* pan display */
|
||||
int32_t (*fb_pan_display)(struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
/* blank display */
|
||||
int32_t (*fb_blank)(int32_t blank, struct fb_info *info);
|
||||
/* wait for blit idle */
|
||||
int32_t (*fb_sync)(struct fb_info *info);
|
||||
/* perform fb specific ioctl */
|
||||
int32_t (*fb_ioctl)(uint32_t cmd, uint32_t arg, struct fb_info *info);
|
||||
/* Buildthe modedb for head 1 (head 2 will come later), check panel infos
|
||||
* from either BIOS or EDID, and pick up the default mode */
|
||||
void (*fb_check_modes)(struct fb_info *info, struct mode_option *resolution);
|
||||
/* Accel functions */
|
||||
#define DEGREES_0 0
|
||||
#define DEGREES_90 1
|
||||
#define DEGREES_180 2
|
||||
#define DEGREES_270 3
|
||||
#define OMIT_LAST 1
|
||||
void (*SetupForSolidFill)(struct fb_info *info, int color, int rop, unsigned int planemask);
|
||||
void (*SubsequentSolidFillRect)(struct fb_info *info, int x, int y, int w, int h);
|
||||
void (*SetupForSolidLine)(struct fb_info *info, int color, int rop, unsigned int planemask);
|
||||
void (*SubsequentSolidHorVertLine)(struct fb_info *info, int x, int y, int len, int dir);
|
||||
void (*SubsequentSolidTwoPointLine)(struct fb_info *info, int xa, int ya, int xb, int yb, int flags);
|
||||
void (*SetupForDashedLine)(struct fb_info *info, int fg, int bg, int rop, unsigned int planemask, int length, unsigned char *pattern);
|
||||
void (*SubsequentDashedTwoPointLine)(struct fb_info *info, int xa, int ya, int xb, int yb, int flags, int phase);
|
||||
void (*SetupForScreenToScreenCopy)(struct fb_info *info, int xdir, int ydir, int rop, unsigned int planemask, int trans_color);
|
||||
void (*SubsequentScreenToScreenCopy)(struct fb_info *info, int xa, int ya, int xb, int yb, int w, int h);
|
||||
void (*ScreenToScreenCopy)(struct fb_info *info, int xa, int ya, int xb, int yb, int w, int h, int rop);
|
||||
void (*SetupForMono8x8PatternFill)(struct fb_info *info, int patternx, int patterny, int fg, int bg, int rop, unsigned int planemask);
|
||||
void (*SubsequentMono8x8PatternFillRect)(struct fb_info *info, int patternx, int patterny, int x, int y, int w, int h);
|
||||
void (*SetupForScanlineCPUToScreenColorExpandFill)(struct fb_info *info, int fg, int bg, int rop, unsigned int planemask);
|
||||
void (*SubsequentScanlineCPUToScreenColorExpandFill)(struct fb_info *info, int x, int y, int w, int h, int skipleft);
|
||||
void (*SubsequentScanline)(struct fb_info *info, unsigned long *buf);
|
||||
void (*SetupForScanlineImageWrite)(struct fb_info *info, int rop, unsigned int planemask, int trans_color, int bpp);
|
||||
void (*SubsequentScanlineImageWriteRect)(struct fb_info *info, int x, int y, int w, int h, int skipleft);
|
||||
void (*SetClippingRectangle)(struct fb_info *info, int xa, int ya, int xb, int yb);
|
||||
void (*DisableClipping)(struct fb_info *info);
|
||||
int (*SetupForCPUToScreenAlphaTexture)(struct fb_info *info,
|
||||
int op, unsigned short red, unsigned short green, unsigned short blue, unsigned short alpha, unsigned long maskFormat, unsigned long dstFormat, unsigned char *alphaPtr, int alphaPitch, int width, int height, int flags);
|
||||
int (*SetupForCPUToScreenTexture)(struct fb_info *info, int op, unsigned long srcFormat, unsigned long dstFormat, unsigned char *texPtr, int texPitch, int width, int height, int flags);
|
||||
void (*SubsequentCPUToScreenTexture)(struct fb_info *info, int dstx, int dsty, int srcx, int srcy, int width, int height);
|
||||
/* Cursor functions */
|
||||
void (*SetCursorColors)(struct fb_info *info, int bg, int fg);
|
||||
void (*SetCursorPosition)(struct fb_info *info, int x, int y);
|
||||
void (*LoadCursorImage)(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom);
|
||||
void (*HideCursor)(struct fb_info *info);
|
||||
void (*ShowCursor)(struct fb_info *info);
|
||||
long (*CursorInit)(struct fb_info *info);
|
||||
void (*WaitVbl)(struct fb_info *info);
|
||||
void (*SetupForSolidFill)(struct fb_info *info, int32_t color, int32_t rop, uint32_t planemask);
|
||||
void (*SubsequentSolidFillRect)(struct fb_info *info, int32_t x, int32_t y, int32_t w, int32_t h);
|
||||
void (*SetupForSolidLine)(struct fb_info *info, int32_t color, int32_t rop, uint32_t planemask);
|
||||
void (*SubsequentSolidHorVertLine)(struct fb_info *info, int32_t x, int32_t y, int32_t len, int32_t dir);
|
||||
void (*SubsequentSolidTwoPointLine)(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t flags);
|
||||
void (*SetupForDashedLine)(struct fb_info *info, int32_t fg, int32_t bg, int32_t rop, uint32_t planemask, int32_t length, uint8_t *pattern);
|
||||
void (*SubsequentDashedTwoPointLine)(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t flags, int32_t phase);
|
||||
void (*SetupForScreenToScreenCopy)(struct fb_info *info, int32_t xdir, int32_t ydir, int32_t rop, uint32_t planemask, int32_t trans_color);
|
||||
void (*SubsequentScreenToScreenCopy)(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t w, int32_t h);
|
||||
void (*ScreenToScreenCopy)(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t w, int32_t h, int32_t rop);
|
||||
void (*SetupForMono8x8PatternFill)(struct fb_info *info, int32_t patternx, int32_t patterny, int32_t fg, int32_t bg, int32_t rop, uint32_t planemask);
|
||||
void (*SubsequentMono8x8PatternFillRect)(struct fb_info *info, int32_t patternx, int32_t patterny, int32_t x, int32_t y, int32_t w, int32_t h);
|
||||
void (*SetupForScanlineCPUToScreenColorExpandFill)(struct fb_info *info, int32_t fg, int32_t bg, int32_t rop, uint32_t planemask);
|
||||
void (*SubsequentScanlineCPUToScreenColorExpandFill)(struct fb_info *info, int32_t x, int32_t y, int32_t w, int32_t h, int32_t skipleft);
|
||||
void (*SubsequentScanline)(struct fb_info *info, uint32_t *buf);
|
||||
void (*SetupForScanlineImageWrite)(struct fb_info *info, int32_t rop, uint32_t planemask, int32_t trans_color, int32_t bpp);
|
||||
void (*SubsequentScanlineImageWriteRect)(struct fb_info *info, int32_t x, int32_t y, int32_t w, int32_t h, int32_t skipleft);
|
||||
void (*SetClippingRectangle)(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb, int32_t yb);
|
||||
void (*DisableClipping)(struct fb_info *info);
|
||||
int32_t (*SetupForCPUToScreenAlphaTexture)(struct fb_info *info,
|
||||
int32_t op, uint16_t red, uint16_t green, uint16_t blue, uint16_t alpha, uint32_t maskFormat, uint32_t dstFormat, uint8_t *alphaPtr, int32_t alphaPitch, int32_t width, int32_t height, int32_t flags);
|
||||
int32_t (*SetupForCPUToScreenTexture)(struct fb_info *info, int32_t op, uint32_t srcFormat, uint32_t dstFormat, uint8_t *texPtr, int32_t texPitch, int32_t width, int32_t height, int32_t flags);
|
||||
void (*SubsequentCPUToScreenTexture)(struct fb_info *info, int32_t dstx, int32_t dsty, int32_t srcx, int32_t srcy, int32_t width, int32_t height);
|
||||
/* Cursor functions */
|
||||
void (*SetCursorColors)(struct fb_info *info, int32_t bg, int32_t fg);
|
||||
void (*SetCursorPosition)(struct fb_info *info, int32_t x, int32_t y);
|
||||
void (*LoadCursorImage)(struct fb_info *info, uint16_t *mask, uint16_t *data, int32_t zoom);
|
||||
void (*HideCursor)(struct fb_info *info);
|
||||
void (*ShowCursor)(struct fb_info *info);
|
||||
long (*CursorInit)(struct fb_info *info);
|
||||
void (*WaitVbl)(struct fb_info *info);
|
||||
};
|
||||
|
||||
struct fb_info {
|
||||
struct fb_var_screeninfo var; /* Current var */
|
||||
struct fb_fix_screeninfo fix; /* Current fix */
|
||||
struct fb_monspecs monspecs; /* Current Monitor specs */
|
||||
struct fb_videomode *mode; /* current mode */
|
||||
char *screen_base; /* Virtual address */
|
||||
unsigned long screen_size;
|
||||
char *ram_base; /* base vram */
|
||||
unsigned long ram_size; /* vram size */
|
||||
char *screen_mono;
|
||||
long update_mono;
|
||||
struct fb_ops *fbops;
|
||||
void *par; /* device dependent */
|
||||
struct fb_info
|
||||
{
|
||||
struct fb_var_screeninfo var; /* Current var */
|
||||
struct fb_fix_screeninfo fix; /* Current fix */
|
||||
struct fb_monspecs monspecs; /* Current Monitor specs */
|
||||
struct fb_videomode *mode; /* current mode */
|
||||
char *screen_base; /* Virtual address */
|
||||
uint32_t screen_size;
|
||||
char *ram_base; /* base vram */
|
||||
uint32_t ram_size; /* vram size */
|
||||
char *screen_mono;
|
||||
long update_mono;
|
||||
struct fb_ops *fbops;
|
||||
void *par; /* device dependent */
|
||||
};
|
||||
|
||||
/* fbmem.c */
|
||||
extern int fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var);
|
||||
extern int fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var);
|
||||
extern int fb_blank(struct fb_info *info, int blank);
|
||||
extern int fb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg);
|
||||
extern struct fb_info *framebuffer_alloc(unsigned long size);
|
||||
extern int32_t fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var);
|
||||
extern int32_t fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var);
|
||||
extern int32_t fb_blank(struct fb_info *info, int32_t blank);
|
||||
extern int32_t fb_ioctl(struct fb_info *info, uint32_t cmd, uint32_t arg);
|
||||
extern struct fb_info *framebuffer_alloc(uint32_t size);
|
||||
extern void framebuffer_release(struct fb_info *info);
|
||||
|
||||
/* offscreen.c */
|
||||
extern long offscreen_free(struct fb_info *info, long addr);
|
||||
extern long offscreen_free(struct fb_info *info, void *addr);
|
||||
extern long offscreen_alloc(struct fb_info *info, long amount);
|
||||
extern long offscren_reserved(struct fb_info *info);
|
||||
extern void offscreen_init(struct fb_info *info);
|
||||
@@ -494,57 +513,44 @@ extern void offscreen_init(struct fb_info *info);
|
||||
#define FB_MODE_IS_FROM_VAR 32
|
||||
|
||||
extern void fb_destroy_modedb(struct fb_videomode *modedb);
|
||||
extern int fb_parse_edid(unsigned char *edid, struct fb_var_screeninfo *var);
|
||||
extern void fb_edid_to_monspecs(unsigned char *edid, struct fb_monspecs *specs);
|
||||
extern int fb_get_mode(int flags, unsigned long val, struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
extern int fb_validate_mode(const struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
extern int32_t fb_parse_edid(uint8_t *edid, struct fb_var_screeninfo *var);
|
||||
extern void fb_edid_to_monspecs(uint8_t *edid, struct fb_monspecs *specs);
|
||||
extern int32_t fb_get_mode(int32_t flags, uint32_t val, struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
extern int32_t fb_validate_mode(const struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
|
||||
/* modedb.c */
|
||||
#define VESA_MODEDB_SIZE 34
|
||||
extern int fb_find_mode(struct fb_var_screeninfo *var,
|
||||
struct fb_info *info, struct mode_option *resolution ,
|
||||
const struct fb_videomode *db, unsigned int dbsize,
|
||||
const struct fb_videomode *default_mode, unsigned int default_bpp);
|
||||
extern int32_t fb_find_mode(struct fb_var_screeninfo *var,
|
||||
struct fb_info *info, struct mode_option *resolution ,
|
||||
const struct fb_videomode *db, uint32_t dbsize,
|
||||
const struct fb_videomode *default_mode, uint32_t default_bpp);
|
||||
extern void fb_var_to_videomode(struct fb_videomode *mode, struct fb_var_screeninfo *var);
|
||||
extern void fb_videomode_to_var(struct fb_var_screeninfo *var, struct fb_videomode *mode);
|
||||
extern int fb_mode_is_equal(struct fb_videomode *mode1, struct fb_videomode *mode2);
|
||||
extern int32_t fb_mode_is_equal(struct fb_videomode *mode1, struct fb_videomode *mode2);
|
||||
|
||||
struct fb_videomode {
|
||||
unsigned short refresh; /* optional */
|
||||
unsigned short xres;
|
||||
unsigned short yres;
|
||||
unsigned long pixclock;
|
||||
unsigned short left_margin;
|
||||
unsigned short right_margin;
|
||||
unsigned short upper_margin;
|
||||
unsigned short lower_margin;
|
||||
unsigned short hsync_len;
|
||||
unsigned short vsync_len;
|
||||
unsigned short sync;
|
||||
unsigned short vmode;
|
||||
unsigned short flag;
|
||||
struct fb_videomode
|
||||
{
|
||||
uint16_t refresh; /* optional */
|
||||
uint16_t xres;
|
||||
uint16_t yres;
|
||||
uint32_t pixclock;
|
||||
uint16_t left_margin;
|
||||
uint16_t right_margin;
|
||||
uint16_t upper_margin;
|
||||
uint16_t lower_margin;
|
||||
uint16_t hsync_len;
|
||||
uint16_t vsync_len;
|
||||
uint16_t sync;
|
||||
uint16_t vmode;
|
||||
uint16_t flag;
|
||||
};
|
||||
|
||||
extern const struct fb_videomode vesa_modes[];
|
||||
|
||||
/* timer */
|
||||
#ifdef COLDFIRE
|
||||
#ifdef MCF5445X
|
||||
#define US_TO_TIMER(a) (a)
|
||||
#define TIMER_TO_US(a) (a)
|
||||
#else /* MCF548X */
|
||||
#define US_TO_TIMER(a) ((a)*100)
|
||||
#define TIMER_TO_US(a) ((a)/100)
|
||||
#endif
|
||||
#else
|
||||
#define US_TO_TIMER(a) (((a)*256)/5000)
|
||||
#define TIMER_TO_US(a) (((a)*5000)/256)
|
||||
#endif
|
||||
|
||||
extern void start_timeout(void);
|
||||
extern int end_timeout(long msec);
|
||||
extern int32_t end_timeout(long msec);
|
||||
extern void mdelay(long msec);
|
||||
extern void install_vbl_timer(void *func, int remove);
|
||||
extern void install_vbl_timer(void *func, int32_t remove);
|
||||
extern void uninstall_vbl_timer(void *func);
|
||||
|
||||
extern struct fb_info *info_fvdi;
|
||||
|
||||
@@ -30,7 +30,7 @@
|
||||
#define SYSCLK 132000 /* NOTE: 132 _is_ correct. 133 _is_ wrong. Do not change! */
|
||||
|
||||
#define BOOTFLASH_BASE_ADDRESS 0xE0000000
|
||||
#define BOOTFLASH_SIZE 0x800000 /* FireBee has 8 MByte Flash */
|
||||
#define BOOTFLASH_SIZE 0x800000 /* FireBee has 8 MByte Flash */
|
||||
#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1)
|
||||
|
||||
#define SDRAM_START 0x00000000 /* start at address 0 */
|
||||
@@ -40,6 +40,7 @@
|
||||
#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000)
|
||||
#else
|
||||
#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
|
||||
#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
|
||||
|
||||
#endif /* COMPILE_RAM */
|
||||
|
||||
|
||||
@@ -95,4 +95,6 @@ struct font_head {
|
||||
void font_init(void); /* initialize BIOS font ring */
|
||||
void font_set_default(void); /* choose the default font */
|
||||
|
||||
extern struct font_head *fnt;
|
||||
|
||||
#endif /* FONT_H */
|
||||
|
||||
@@ -84,6 +84,7 @@ struct i2c_msg
|
||||
unsigned char *buf; /* pointer to msg data */
|
||||
};
|
||||
|
||||
/*
|
||||
extern void i2c_init(void);
|
||||
extern void i2c_set_frequency(int hz);
|
||||
extern int i2c_read(int address, char *data, int lengt, bool repeated);
|
||||
@@ -92,5 +93,5 @@ extern int i2c_write(int address, const char *data, int length, bool repeated);
|
||||
extern int i2c_write_byte(int data);
|
||||
extern void i2c_start(void);
|
||||
extern void i2c_stop(void);
|
||||
|
||||
*/
|
||||
#endif /* _I2C_H */
|
||||
|
||||
@@ -144,6 +144,7 @@ extern bool isr_execute_handler(int vector);
|
||||
extern bool pic_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool xlbpci_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool pciarb_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool xlbarb_interrupt_handler(void *arg1, void *arg2, ...);
|
||||
extern bool gpt0_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool irq5_handler(void *arg1, void *arg2);
|
||||
#endif /* _INTERRUPTS_H_ */
|
||||
|
||||
@@ -41,6 +41,7 @@
|
||||
#else
|
||||
#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
|
||||
#endif /* COMPILE_RAM */
|
||||
#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
|
||||
|
||||
#define DRIVER_MEM_BUFFER_SIZE 0x100000
|
||||
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#define SYSCLK 100000
|
||||
#define SYSCLK 100000UL
|
||||
|
||||
#define BOOTFLASH_BASE_ADDRESS 0xe0000000
|
||||
#define BOOTFLASH_SIZE 0x400000 /* LITEKIT has 4MB flash */
|
||||
@@ -41,6 +41,7 @@
|
||||
#else
|
||||
#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
|
||||
#endif /* COMPILE_RAM */
|
||||
#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
|
||||
|
||||
#define DRIVER_MEM_BUFFER_SIZE 0x100000
|
||||
|
||||
|
||||
@@ -30,8 +30,8 @@
|
||||
/*
|
||||
* ACR register handling macros
|
||||
*/
|
||||
#define ACR_BA(x) ((x) & 0xffff0000)
|
||||
#define ACR_ADMSK(x) (((x) & 0xffff) << 16)
|
||||
#define ACR_BA(x) ((x) & 0xff000000)
|
||||
#define ACR_ADMSK(x) (((x) & 0xff) << 16)
|
||||
#define ACR_E(x) (((x) & 1) << 15)
|
||||
|
||||
#define ACR_S(x) (((x) & 3) << 13)
|
||||
@@ -45,6 +45,17 @@
|
||||
#define ACR_SUPERVISOR_PROTECT(x) (((x) & 1) << 3)
|
||||
#define ACR_WRITE_PROTECT(x) (((x) & 1) << 2)
|
||||
|
||||
#define ACR_AMM(x) (((x) & 1) << 10)
|
||||
|
||||
#define ACR_CM(x) (((x) & 3) << 5)
|
||||
#define ACR_CM_CACHEABLE_WT 0x0
|
||||
#define ACR_CM_CACHEABLE_CB 0x1
|
||||
#define ACR_CM_CACHE_INH_PRECISE 0x2
|
||||
#define ACR_CM_CACHE_INH_IMPRECISE 0x3
|
||||
|
||||
#define ACR_SP(x) (((x) & 1) << 3)
|
||||
#define ACR_W(x) (((x) & 1) << 2)
|
||||
|
||||
|
||||
/*
|
||||
* MMU register handling macros
|
||||
@@ -64,13 +75,14 @@ enum mmu_page_size
|
||||
MMU_PAGE_SIZE_1K = 3
|
||||
};
|
||||
|
||||
#define MMU_PAGE_SIZE_DEFAULT MMU_PAGE_SIZE_1M /* note: if this changes, SIZE_DEFAULT below _must_ also change */
|
||||
|
||||
#define SIZE_1M 0x100000 /* 1 Megabyte */
|
||||
#define SIZE_4K 0x1000 /* 4 KB */
|
||||
#define SIZE_8K 0x2000 /* 8 KB */
|
||||
#define SIZE_1K 0x400 /* 1 KB */
|
||||
|
||||
#define DEFAULT_PAGE_SIZE 0x00100000 /* 1M pagesize */
|
||||
|
||||
#define SIZE_DEFAULT SIZE_1M
|
||||
/*
|
||||
* cache modes
|
||||
*/
|
||||
@@ -97,16 +109,25 @@ enum mmu_page_size
|
||||
extern long video_tlb;
|
||||
extern long video_sbt;
|
||||
|
||||
struct mmu_page_descriptor;
|
||||
struct mmu_page_descriptor_ram
|
||||
{
|
||||
uint8_t cache_mode : 2;
|
||||
uint8_t supervisor_protect : 1;
|
||||
uint8_t read : 1;
|
||||
uint8_t write : 1;
|
||||
uint8_t execute : 1;
|
||||
uint8_t global : 1;
|
||||
uint8_t locked : 1;
|
||||
};
|
||||
|
||||
extern void mmu_init(void);
|
||||
extern int mmu_map_page(int32_t virt, int32_t phys, enum mmu_page_size sz, uint8_t page_id, const struct mmu_page_descriptor *flags);
|
||||
extern uint32_t mmu_map_page(uint32_t virt, uint32_t phys, enum mmu_page_size sz, uint8_t page_id, const struct mmu_page_descriptor_ram *flags);
|
||||
|
||||
/*
|
||||
* API functions for the BaS driver interface
|
||||
*/
|
||||
extern int32_t mmu_map_data_page_locked(uint32_t address, uint32_t length, int asid);
|
||||
extern int32_t mmu_unlock_data_page(uint32_t address, uint32_t length, int asid);
|
||||
extern int32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb);
|
||||
extern uint32_t mmu_map_data_page_locked(uint32_t address, uint32_t length, int asid);
|
||||
extern uint32_t mmu_unlock_data_page(uint32_t address, uint32_t length, int asid);
|
||||
extern uint32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb);
|
||||
extern uint32_t mmu_report_pagesize(void);
|
||||
#endif /* _MMU_H_ */
|
||||
|
||||
169
include/pci.h
169
include/pci.h
@@ -22,27 +22,32 @@
|
||||
*/
|
||||
|
||||
#include <bas_types.h>
|
||||
#include "util.h" /* for swpX() */
|
||||
#include "util.h" /* for swpX() */
|
||||
|
||||
#define PCI_MEMORY_OFFSET (0x80000000)
|
||||
#define PCI_MEMORY_SIZE (0x40000000) /* 1 GByte PCI memory window */
|
||||
#define PCI_IO_OFFSET (0xD0000000)
|
||||
#define PCI_IO_SIZE (0x10000000) /* 128 MByte PCI I/O window */
|
||||
#define PCI_MEMORY_OFFSET 0x80000000
|
||||
#define PCI_MEMORY_SIZE 0x40000000 /* 1 GByte PCI memory window */
|
||||
#define PCI_IO_OFFSET 0xD0000000
|
||||
#define PCI_IO_SIZE 0x10000000 /* 256 MByte PCI I/O window */
|
||||
|
||||
#define PCI_LANESWAP_B(x) (x ^ 3)
|
||||
#define PCI_LANESWAP_W(x) (x ^ 2)
|
||||
#define PCI_LANESWAP_L(x) (x) /* for completeness only */
|
||||
/*
|
||||
* Note: the byte offsets are in little endian format, so you can't use them
|
||||
* on byteswapped (Motorola format) values!
|
||||
* Note: the byte offsets are in little endian format, so for pci_xxx_config_byte()
|
||||
* accesses to hit the right offset, you'll need to wrap them into PCI_LANESWAP_B()
|
||||
* and for pci_xxx_config_word() into PCI_LANESWAP_W()
|
||||
*/
|
||||
#define PCIIDR 0x00 /* PCI Configuration ID Register */
|
||||
#define PCICSR 0x04 /* PCI Command/Status Register */
|
||||
#define PCICR 0x04 /* PCI Command Register */
|
||||
#define PCISR 0x06 /* PCI Status Register */
|
||||
#define PCIREV 0x08 /* PCI Revision ID Register */
|
||||
#define PCICCR 0x0B /* PCI Class Code Register */
|
||||
#define PCICLSR 0x0C /* PCI Cache Line Size Register */
|
||||
#define PCILTR 0x0D /* PCI Latency Timer Register */
|
||||
#define PCIHTR 0x0E /* PCI Header Type Register */
|
||||
#define PCIBISTR 0x0F /* PCI Build-In Self Test Register */
|
||||
#define PCICR 0x06 /* PCI Command Register */
|
||||
#define PCISR 0x04 /* PCI Status Register */
|
||||
#define PCIREV 0x0B /* PCI Revision ID Register */
|
||||
#define PCICCR 0x08 /* PCI Class Code Register */
|
||||
#define PCICLSR 0x0F /* PCI Cache Line Size Register */
|
||||
#define PCILTR 0x0E /* PCI Latency Timer Register */
|
||||
#define PCIHTR 0x0D /* PCI Header Type Register */
|
||||
#define PCIBISTR 0x0C /* PCI Build-In Self Test Register */
|
||||
|
||||
#define PCIBAR0 0x10 /* PCI Base Address Register for Memory
|
||||
Accesses to Local, Runtime, and DMA */
|
||||
#define PCIBAR1 0x14 /* PCI Base Address Register for I/O
|
||||
@@ -55,13 +60,13 @@
|
||||
#define PCIBAR5 0x24 /* PCI Base Address Register, reserved */
|
||||
#define PCICIS 0x28 /* PCI Cardbus CIS Pointer, not support*/
|
||||
#define PCISVID 0x2E /* PCI Subsystem Vendor ID */
|
||||
#define PCISID 0x2E /* PCI Subsystem ID */
|
||||
#define PCISID 0x2D /* PCI Subsystem ID */
|
||||
#define PCIERBAR 0x30 /* PCI Expansion ROM Base Register */
|
||||
#define CAP_PTR 0x34 /* New Capability Pointer */
|
||||
#define PCIILR 0x3C /* PCI Interrupt Line Register */
|
||||
#define PCIIPR 0x3D /* PCI Interrupt Pin Register */
|
||||
#define PCIMGR 0x3E /* PCI Min_Gnt Register */
|
||||
#define PCIMLR 0x3F /* PCI Max_Lat Register */
|
||||
#define PCIILR 0x3F /* PCI Interrupt Line Register */
|
||||
#define PCIIPR 0x3E /* PCI Interrupt Pin Register */
|
||||
#define PCIMGR 0x3D /* PCI Min_Gnt Register */
|
||||
#define PCIMLR 0x3C /* PCI Max_Lat Register */
|
||||
#define PMCAPID 0x40 /* Power Management Capability ID */
|
||||
#define PMNEXT 0x41 /* Power Management Next Capability
|
||||
Pointer */
|
||||
@@ -81,41 +86,41 @@
|
||||
/*
|
||||
* bit definitions for PCICSR lower half (Command Register)
|
||||
*/
|
||||
#define PCICSR_IO (1 << 0) /* if set: device responds to I/O space accesses */
|
||||
#define PCICSR_MEMORY (1 << 1) /* if set: device responds to memory space accesses */
|
||||
#define PCICSR_MASTER (1 << 2) /* if set: device is master */
|
||||
#define PCICSR_SPECIAL (1 << 3) /* if set: device reacts on special cycles */
|
||||
#define PCICSR_MEMWI (1 << 4) /* if set: device deals with memory write and invalidate */
|
||||
#define PCICSR_VGA_SNOOP (1 << 5) /* if set: capable of palette snoop */
|
||||
#define PCICSR_PERR (1 << 6) /* if set: reacts to parity errors */
|
||||
#define PCICSR_STEPPING (1 << 7) /* if set: stepping enabled */
|
||||
#define PCICSR_SERR (1 << 8) /* if set: SERR pin enabled */
|
||||
#define PCICSR_FAST_BTOB_E (1 << 9) /* if set: fast back-to-back enabled */
|
||||
#define PCICSR_INT_DISABLE (1 << 10) /* if set: disable interrupts from this device */
|
||||
#define PCICR_IO (1 << 0) /* if set: device responds to I/O space accesses */
|
||||
#define PCICR_MEMORY (1 << 1) /* if set: device responds to memory space accesses */
|
||||
#define PCICR_MASTER (1 << 2) /* if set: device is master */
|
||||
#define PCICR_SPECIAL (1 << 3) /* if set: device reacts on special cycles */
|
||||
#define PCICR_MEMWI (1 << 4) /* if set: device deals with memory write and invalidate */
|
||||
#define PCICR_VGA_SNOOP (1 << 5) /* if set: capable of palette snoop */
|
||||
#define PCICR_PERR (1 << 6) /* if set: reacts to parity errors */
|
||||
#define PCICR_STEPPING (1 << 7) /* if set: stepping enabled */
|
||||
#define PCICR_SERR (1 << 8) /* if set: SERR pin enabled */
|
||||
#define PCICR_FAST_BTOB_E (1 << 9) /* if set: fast back-to-back enabled */
|
||||
#define PCICR_INT_DISABLE (1 << 10) /* if set: disable interrupts from this device */
|
||||
/*
|
||||
* bit definitions for PCICSR upper half (Status Register)
|
||||
*/
|
||||
#define PCICSR_INTERRUPT (1 << 3) /* device requested interrupt */
|
||||
#define PCICSR_CAPABILITIES (1 << 4) /* if set, capabilities pointer is valid */
|
||||
#define PCICSR_66MHZ (1 << 5) /* 66 MHz capable */
|
||||
#define PCICSR_UDF (1 << 6) /* UDF supported */
|
||||
#define PCICSR_FAST_BTOB (1 << 7) /* Fast back-to-back enabled */
|
||||
#define PCICSR_DPARITY_ERROR (1 << 8) /* data parity error detected */
|
||||
#define PCISR_INTERRUPT (1 << 3) /* device requested interrupt */
|
||||
#define PCISR_CAPABILITIES (1 << 4) /* if set, capabilities pointer is valid */
|
||||
#define PCISR_66MHZ (1 << 5) /* 66 MHz capable */
|
||||
#define PCISR_UDF (1 << 6) /* UDF supported */
|
||||
#define PCISR_FAST_BTOB (1 << 7) /* Fast back-to-back enabled */
|
||||
#define PCISR_DPARITY_ERROR (1 << 8) /* data parity error detected */
|
||||
|
||||
#define PCICSR_T_ABORT_S (1 << 11) /* target abort signaled */
|
||||
#define PCICSR_T_ABORT_R (1 << 12) /* target abort received */
|
||||
#define PCICSR_M_ABORT_R (1 << 13) /* master abort received */
|
||||
#define PCICSR_S_ERROR_S (1 << 14) /* system error signaled */
|
||||
#define PCICSR_PARITY_ERR (1 << 15) /* data parity error */
|
||||
#define PCISR_T_ABORT_S (1 << 11) /* target abort signaled */
|
||||
#define PCISR_T_ABORT_R (1 << 12) /* target abort received */
|
||||
#define PCISR_M_ABORT_R (1 << 13) /* master abort received */
|
||||
#define PCISR_S_ERROR_S (1 << 14) /* system error signaled */
|
||||
#define PCISR_PARITY_ERR (1 << 15) /* data parity error */
|
||||
|
||||
/* Header type 1 (PCI-to-PCI bridges) */
|
||||
#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */
|
||||
#define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */
|
||||
#define PCI_SUBORDINATE_BUS 0x1A /* Highest bus number behind the bridge */
|
||||
#define PCI_SEC_LATENCY_TIMER 0x1B /* Latency timer for secondary interface */
|
||||
#define PCI_PRIMARY_BUS 0x1B /* Primary bus number */
|
||||
#define PCI_SECONDARY_BUS 0x1A /* Secondary bus number */
|
||||
#define PCI_SUBORDINATE_BUS 0x19 /* Highest bus number behind the bridge */
|
||||
#define PCI_SEC_LATENCY_TIMER 0x18 /* Latency timer for secondary interface */
|
||||
#define PCI_IO_BASE 0x1C /* I/O range behind the bridge */
|
||||
#define PCI_IO_LIMIT 0x1D
|
||||
#define PCI_SEC_STATUS 0x1E /* Secondary status register, only bit 14 used */
|
||||
#define PCI_SEC_STATUS 0x1C /* Secondary status register, only bit 14 used */
|
||||
#define PCI_MEMORY_BASE 0x20 /* Memory range behind */
|
||||
#define PCI_MEMORY_LIMIT 0x22
|
||||
#define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */
|
||||
@@ -134,7 +139,7 @@ struct pci_rd /* structure of resource descriptor */
|
||||
unsigned long length; /* length of resource */
|
||||
unsigned long offset; /* offset PCI to phys. CPU Address */
|
||||
unsigned long dmaoffset; /* offset for DMA-transfers */
|
||||
} __attribute__ ((packed));
|
||||
};
|
||||
|
||||
typedef struct /* structure of address conversion */
|
||||
{
|
||||
@@ -186,43 +191,43 @@ typedef struct /* structure of address conversion */
|
||||
/* PCI configuration space macros */
|
||||
|
||||
/* register 0x00 macros */
|
||||
#define PCI_VENDOR_ID(i) swpw((uint16_t)(((i) & 0xffff0000) >> 16))
|
||||
#define PCI_DEVICE_ID(i) swpw((uint16_t) ((i) & 0xffff))
|
||||
#define PCI_DEVICE_ID(i) (uint16_t)(((i) & 0xffff0000) >> 16)
|
||||
#define PCI_VENDOR_ID(i) (uint16_t) ((i) & 0xffff)
|
||||
|
||||
/* register 0x04 macros */
|
||||
#define PCI_STATUS(i) ((i) & 0xffff)
|
||||
#define PCI_COMMAND(i) (((i) >> 16) & 0xffff)
|
||||
#define PCI_STATUS(i) ((i) & 0xffff)
|
||||
#define PCI_COMMAND(i) (((i) >> 16) & 0xffff)
|
||||
|
||||
/* register 0x08 macros */
|
||||
#define PCI_CLASS_CODE(i) ((swpl((i)) & 0xffff0000) >> 16)
|
||||
#define PCI_SUBCLASS(i) ((swpl((i)) & 0xffffff00) >> 8)
|
||||
#define PCI_PROG_IF(i) ((swpl((i)) & 0x0000ff00) >> 8)
|
||||
#define PCI_REVISION_ID(i) ((swpl((i)) & 0x000000ff))
|
||||
/* register 0x08 macros (use on little endian value!) */
|
||||
#define PCI_CLASS_CODE(i) (((i) & 0x00ff0000) >> 16)
|
||||
#define PCI_SUBCLASS(i) (((i) & 0x0000ff00) >> 8)
|
||||
#define PCI_PROG_IF(i) (((i) & 0x000000ff) >> 0)
|
||||
#define PCI_REVISION_ID(i) (((i) & 0xff000000) >> 24)
|
||||
|
||||
/* register 0x0c macros */
|
||||
#define PCI_BIST(i) ((swpl((i)) & 0xff000000) >> 24)
|
||||
#define PCI_HEADER_TYPE(i) ((swpl((i)) & 0x00ff0000) >> 16)
|
||||
#define PCI_LAT_TIMER(i) ((swpl((i)) & 0x0000ff00) >> 8)
|
||||
#define PCI_CACHELINE_SIZE(i) ((swpl((i)) & 0x000000ff))
|
||||
#define PCI_BIST(i) (((i) & 0xff000000) >> 24)
|
||||
#define PCI_HEADER_TYPE(i) (((i) & 0x00ff0000) >> 16)
|
||||
#define PCI_LAT_TIMER(i) (((i) & 0x0000ff00) >> 8)
|
||||
#define PCI_CACHELINE_SIZE(i) (((i) & 0x000000ff))
|
||||
|
||||
/* register 0x2c macros */
|
||||
#define PCI_SUBSYS_ID(i) (((i) & 0xffff0000) >> 16)
|
||||
#define PCI_SUBSYS_VID(i) (((i) & 0xffff))
|
||||
#define PCI_SUBSYS_ID(i) ((i) & 0xffff0000) >> 16)
|
||||
#define PCI_SUBSYS_VID(i) ((i) & 0xffff))
|
||||
|
||||
/* register 0x34 macros */
|
||||
#define PCI_CAPABILITIES(i) ((i) & 0xff)
|
||||
#define PCI_CAPABILITIES(i) ((i) & 0xff)
|
||||
|
||||
/* register 0x3c macros */
|
||||
#define PCI_MAX_LATENCY(i) (((i) & 0xff000000) >> 24)
|
||||
#define PCI_MIN_GRANT(i) (((i) & 0xff0000) >> 16)
|
||||
#define PCI_INTERRUPT_PIN(i) (((i) & 0xff00) >> 8)
|
||||
#define PCI_INTERRUPT_LINE(i) (((i)) & 0xff)
|
||||
#define PCI_MAX_LATENCY(i) (((i) & 0xff000000) >> 24)
|
||||
#define PCI_MIN_GRANT(i) (((i) & 0xff0000) >> 16)
|
||||
#define PCI_INTERRUPT_PIN(i) (((i) & 0xff00) >> 8)
|
||||
#define PCI_INTERRUPT_LINE(i) (((i)) & 0xff)
|
||||
|
||||
#define IS_PCI_MEM_BAR(i) ((i) & 1) == 0
|
||||
#define IS_PCI_IO_BAR(i) ((i) & 1) == 1
|
||||
#define PCI_MEMBAR_TYPE(i) (((i) & 0x6) >> 1)
|
||||
#define PCI_IOBAR_ADR(i) (((i) & 0xfffffffc))
|
||||
#define PCI_MEMBAR_ADR(i) (((i) & 0xfffffff0))
|
||||
#define IS_PCI_MEM_BAR(i) ((i) & 1) == 0
|
||||
#define IS_PCI_IO_BAR(i) ((i) & 1) == 1
|
||||
#define PCI_MEMBAR_TYPE(i) (((i) & 0x6) >> 1)
|
||||
#define PCI_IOBAR_ADR(i) (((i) & 0xfffffffc))
|
||||
#define PCI_MEMBAR_ADR(i) (((i) & 0xfffffff0))
|
||||
|
||||
extern void init_eport(void);
|
||||
extern void init_xlbus_arbiter(void);
|
||||
@@ -238,9 +243,9 @@ extern int32_t pci_call_interrupt_chain(int32_t handle, int32_t data);
|
||||
/*
|
||||
* match bits for pci_find_classcode()
|
||||
*/
|
||||
#define PCI_FIND_BASE_CLASS (1 << 26)
|
||||
#define PCI_FIND_SUB_CLASS (1 << 25)
|
||||
#define PCI_FIND_PROG_IF (1 << 24)
|
||||
#define PCI_FIND_BASE_CLASS (1 << 26)
|
||||
#define PCI_FIND_SUB_CLASS (1 << 25)
|
||||
#define PCI_FIND_PROG_IF (1 << 24)
|
||||
|
||||
extern uint32_t pci_read_config_longword(int32_t handle, int offset);
|
||||
extern uint16_t pci_read_config_word(int32_t handle, int offset);
|
||||
@@ -340,14 +345,16 @@ extern int32_t wrapper_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_AD
|
||||
extern int32_t wrapper_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
extern int32_t wrapper_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
|
||||
#define PCI_MK_CONF_ADDR(bus, device, function) (MCF_PCI_PCICAR_E | \
|
||||
#define PCI_MK_CONF_ADDR(bus, device, function) (MCF_PCI_PCICAR_E | \
|
||||
((bus) << 16) | \
|
||||
((device << 8) | \
|
||||
(function))
|
||||
|
||||
#define PCI_HANDLE(bus, slot, function) (0 | ((bus & 0xff) << 10 | (slot & 0x1f) << 3 | (function & 7)))
|
||||
#define PCI_BUS_FROM_HANDLE(h) (((h) & 0xff00) >> 10)
|
||||
#define PCI_DEVICE_FROM_HANDLE(h) (((h) & 0xf8) >> 3)
|
||||
#define PCI_FUNCTION_FROM_HANDLE(h) (((h) & 0x7))
|
||||
#define PCI_HANDLE(bus, slot, function) (0 | ((bus & 0xff) << 10 | (slot & 0x1f) << 3 | (function & 7)))
|
||||
#define PCI_BUS_FROM_HANDLE(h) (((h) & 0xff00) >> 10)
|
||||
#define PCI_DEVICE_FROM_HANDLE(h) (((h) & 0xf8) >> 3)
|
||||
#define PCI_FUNCTION_FROM_HANDLE(h) (((h) & 0x7))
|
||||
|
||||
extern void pci_dump_registers(int32_t handle);
|
||||
|
||||
#endif /* _PCI_H_ */
|
||||
|
||||
11
include/pci_errata.h
Executable file
11
include/pci_errata.h
Executable file
@@ -0,0 +1,11 @@
|
||||
#ifndef PCI_ERRATA_H
|
||||
#define PCI_ERRATA_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
extern void chip_errata_135(void);
|
||||
extern void chip_errata_055(int32_t handle);
|
||||
|
||||
#endif // PCI_ERRATA_H
|
||||
|
||||
@@ -45,7 +45,7 @@
|
||||
#define PCI_CLASS_BRIDGE_HOST 0x0600
|
||||
#define PCI_CLASS_BRIDGE_ISA 0x0601
|
||||
#define PCI_CLASS_BRIDGE_EISA 0x0602
|
||||
#define PCI_CLASS_BRIDGE_MC 0x0603
|
||||
#define PCI_CLASS_BRIDGE_MC 0x0603
|
||||
#define PCI_CLASS_BRIDGE_PCI 0x0604
|
||||
#define PCI_CLASS_BRIDGE_PCMCIA 0x0605
|
||||
#define PCI_CLASS_BRIDGE_NUBUS 0x0606
|
||||
|
||||
@@ -10,6 +10,9 @@
|
||||
#include "i2c-algo-bit.h"
|
||||
#include "util.h" /* for swpX() */
|
||||
#include "wait.h"
|
||||
#include "video.h"
|
||||
|
||||
// #define RADEON_TILING
|
||||
|
||||
//#include "radeon_theatre.h"
|
||||
|
||||
@@ -23,7 +26,7 @@
|
||||
#define RADEON_MMIOSIZE 0x80000
|
||||
|
||||
#define RADEON_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))
|
||||
|
||||
|
||||
#define ATY_RADEON_LCD_ON 0x00000001
|
||||
#define ATY_RADEON_CRT_ON 0x00000002
|
||||
|
||||
@@ -39,50 +42,50 @@
|
||||
*/
|
||||
enum radeon_family
|
||||
{
|
||||
CHIP_FAMILY_UNKNOW,
|
||||
CHIP_FAMILY_LEGACY,
|
||||
CHIP_FAMILY_RADEON,
|
||||
CHIP_FAMILY_RV100,
|
||||
CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/
|
||||
CHIP_FAMILY_RV200,
|
||||
CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */
|
||||
CHIP_FAMILY_R200,
|
||||
CHIP_FAMILY_RV250,
|
||||
CHIP_FAMILY_RS300, /* Radeon 9000 IGP */
|
||||
CHIP_FAMILY_RV280,
|
||||
CHIP_FAMILY_R300,
|
||||
CHIP_FAMILY_R350,
|
||||
CHIP_FAMILY_RV350,
|
||||
CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */
|
||||
CHIP_FAMILY_R420, /* R420/R423/M18 */
|
||||
CHIP_FAMILY_LAST,
|
||||
CHIP_FAMILY_UNKNOW,
|
||||
CHIP_FAMILY_LEGACY,
|
||||
CHIP_FAMILY_RADEON,
|
||||
CHIP_FAMILY_RV100,
|
||||
CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/
|
||||
CHIP_FAMILY_RV200,
|
||||
CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */
|
||||
CHIP_FAMILY_R200,
|
||||
CHIP_FAMILY_RV250,
|
||||
CHIP_FAMILY_RS300, /* Radeon 9000 IGP */
|
||||
CHIP_FAMILY_RV280,
|
||||
CHIP_FAMILY_R300,
|
||||
CHIP_FAMILY_R350,
|
||||
CHIP_FAMILY_RV350,
|
||||
CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */
|
||||
CHIP_FAMILY_R420, /* R420/R423/M18 */
|
||||
CHIP_FAMILY_LAST,
|
||||
};
|
||||
|
||||
#define IS_RV100_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_RV100) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV200) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS100) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS200) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV250) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV280) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS300))
|
||||
((rinfo)->family == CHIP_FAMILY_RV200) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS100) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS200) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV250) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV280) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS300))
|
||||
|
||||
|
||||
#define IS_R300_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_R300) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV350) || \
|
||||
((rinfo)->family == CHIP_FAMILY_R350) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV380) || \
|
||||
((rinfo)->family == CHIP_FAMILY_R420))
|
||||
((rinfo)->family == CHIP_FAMILY_RV350) || \
|
||||
((rinfo)->family == CHIP_FAMILY_R350) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV380) || \
|
||||
((rinfo)->family == CHIP_FAMILY_R420))
|
||||
|
||||
/*
|
||||
* Chip flags
|
||||
*/
|
||||
enum radeon_chip_flags
|
||||
{
|
||||
CHIP_FAMILY_MASK = 0x0000ffffUL,
|
||||
CHIP_FLAGS_MASK = 0xffff0000UL,
|
||||
CHIP_IS_MOBILITY = 0x00010000UL,
|
||||
CHIP_IS_IGP = 0x00020000UL,
|
||||
CHIP_HAS_CRTC2 = 0x00040000UL,
|
||||
CHIP_FAMILY_MASK = 0x0000ffffUL,
|
||||
CHIP_FLAGS_MASK = 0xffff0000UL,
|
||||
CHIP_IS_MOBILITY = 0x00010000UL,
|
||||
CHIP_IS_IGP = 0x00020000UL,
|
||||
CHIP_HAS_CRTC2 = 0x00040000UL,
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -90,9 +93,9 @@ enum radeon_chip_flags
|
||||
*/
|
||||
enum radeon_errata
|
||||
{
|
||||
CHIP_ERRATA_R300_CG = 0x00000001,
|
||||
CHIP_ERRATA_PLL_DUMMYREADS = 0x00000002,
|
||||
CHIP_ERRATA_PLL_DELAY = 0x00000004,
|
||||
CHIP_ERRATA_R300_CG = 0x00000001,
|
||||
CHIP_ERRATA_PLL_DUMMYREADS = 0x00000002,
|
||||
CHIP_ERRATA_PLL_DELAY = 0x00000004,
|
||||
};
|
||||
|
||||
|
||||
@@ -101,12 +104,12 @@ enum radeon_errata
|
||||
*/
|
||||
enum radeon_montype
|
||||
{
|
||||
MT_NONE = 0,
|
||||
MT_CRT, /* CRT */
|
||||
MT_LCD, /* LCD */
|
||||
MT_DFP, /* DVI */
|
||||
MT_CTV, /* composite TV */
|
||||
MT_STV /* S-Video out */
|
||||
MT_NONE = 0,
|
||||
MT_CRT, /* CRT */
|
||||
MT_LCD, /* LCD */
|
||||
MT_DFP, /* DVI */
|
||||
MT_CTV, /* composite TV */
|
||||
MT_STV /* S-Video out */
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -114,11 +117,11 @@ enum radeon_montype
|
||||
*/
|
||||
enum ddc_type
|
||||
{
|
||||
ddc_none,
|
||||
ddc_monid,
|
||||
ddc_dvi,
|
||||
ddc_vga,
|
||||
ddc_crt2,
|
||||
ddc_none,
|
||||
ddc_monid,
|
||||
ddc_dvi,
|
||||
ddc_vga,
|
||||
ddc_crt2,
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -126,11 +129,11 @@ enum ddc_type
|
||||
*/
|
||||
enum conn_type
|
||||
{
|
||||
conn_none,
|
||||
conn_proprietary,
|
||||
conn_crt,
|
||||
conn_DVI_I,
|
||||
conn_DVI_D,
|
||||
conn_none,
|
||||
conn_proprietary,
|
||||
conn_crt,
|
||||
conn_DVI_I,
|
||||
conn_DVI_D,
|
||||
};
|
||||
|
||||
|
||||
@@ -139,11 +142,11 @@ enum conn_type
|
||||
*/
|
||||
struct pll_info
|
||||
{
|
||||
int32_t ppll_max;
|
||||
int32_t ppll_min;
|
||||
int32_t sclk, mclk;
|
||||
int32_t ref_div;
|
||||
int32_t ref_clk;
|
||||
int32_t ppll_max;
|
||||
int32_t ppll_min;
|
||||
int32_t sclk, mclk;
|
||||
int32_t ref_div;
|
||||
int32_t ref_clk;
|
||||
};
|
||||
|
||||
|
||||
@@ -155,120 +158,120 @@ struct pll_info
|
||||
*/
|
||||
struct radeon_regs
|
||||
{
|
||||
/* Common registers */
|
||||
uint32_t ovr_clr;
|
||||
uint32_t ovr_wid_left_right;
|
||||
uint32_t ovr_wid_top_bottom;
|
||||
uint32_t ov0_scale_cntl;
|
||||
uint32_t mpp_tb_config;
|
||||
uint32_t mpp_gp_config;
|
||||
uint32_t subpic_cntl;
|
||||
uint32_t viph_control;
|
||||
uint32_t i2c_cntl_1;
|
||||
uint32_t gen_int32_t_cntl;
|
||||
uint32_t cap0_trig_cntl;
|
||||
uint32_t cap1_trig_cntl;
|
||||
uint32_t bus_cntl;
|
||||
uint32_t surface_cntl;
|
||||
uint32_t bios_5_scratch;
|
||||
/* Common registers */
|
||||
uint32_t ovr_clr;
|
||||
uint32_t ovr_wid_left_right;
|
||||
uint32_t ovr_wid_top_bottom;
|
||||
uint32_t ov0_scale_cntl;
|
||||
uint32_t mpp_tb_config;
|
||||
uint32_t mpp_gp_config;
|
||||
uint32_t subpic_cntl;
|
||||
uint32_t viph_control;
|
||||
uint32_t i2c_cntl_1;
|
||||
uint32_t gen_int32_t_cntl;
|
||||
uint32_t cap0_trig_cntl;
|
||||
uint32_t cap1_trig_cntl;
|
||||
uint32_t bus_cntl;
|
||||
uint32_t surface_cntl;
|
||||
uint32_t bios_5_scratch;
|
||||
|
||||
/* Other registers to save for VT switches or driver load/unload */
|
||||
uint32_t dp_datatype;
|
||||
uint32_t rbbm_soft_reset;
|
||||
uint32_t clock_cntl_index;
|
||||
uint32_t amcgpio_en_reg;
|
||||
uint32_t amcgpio_mask;
|
||||
/* Other registers to save for VT switches or driver load/unload */
|
||||
uint32_t dp_datatype;
|
||||
uint32_t rbbm_soft_reset;
|
||||
uint32_t clock_cntl_index;
|
||||
uint32_t amcgpio_en_reg;
|
||||
uint32_t amcgpio_mask;
|
||||
|
||||
/* Surface/tiling registers */
|
||||
uint32_t surf_lower_bound[8];
|
||||
uint32_t surf_upper_bound[8];
|
||||
uint32_t surf_info[8];
|
||||
/* Surface/tiling registers */
|
||||
uint32_t surf_lower_bound[8];
|
||||
uint32_t surf_upper_bound[8];
|
||||
uint32_t surf_info[8];
|
||||
|
||||
/* CRTC registers */
|
||||
uint32_t crtc_gen_cntl;
|
||||
uint32_t crtc_ext_cntl;
|
||||
uint32_t dac_cntl;
|
||||
uint32_t crtc_h_total_disp;
|
||||
uint32_t crtc_h_sync_strt_wid;
|
||||
uint32_t crtc_v_total_disp;
|
||||
uint32_t crtc_v_sync_strt_wid;
|
||||
uint32_t crtc_offset;
|
||||
uint32_t crtc_offset_cntl;
|
||||
uint32_t crtc_pitch;
|
||||
uint32_t disp_merge_cntl;
|
||||
uint32_t grph_buffer_cntl;
|
||||
uint32_t crtc_more_cntl;
|
||||
/* CRTC registers */
|
||||
uint32_t crtc_gen_cntl;
|
||||
uint32_t crtc_ext_cntl;
|
||||
uint32_t dac_cntl;
|
||||
uint32_t crtc_h_total_disp;
|
||||
uint32_t crtc_h_sync_strt_wid;
|
||||
uint32_t crtc_v_total_disp;
|
||||
uint32_t crtc_v_sync_strt_wid;
|
||||
uint32_t crtc_offset;
|
||||
uint32_t crtc_offset_cntl;
|
||||
uint32_t crtc_pitch;
|
||||
uint32_t disp_merge_cntl;
|
||||
uint32_t grph_buffer_cntl;
|
||||
uint32_t crtc_more_cntl;
|
||||
|
||||
/* CRTC2 registers */
|
||||
uint32_t crtc2_gen_cntl;
|
||||
uint32_t dac2_cntl;
|
||||
uint32_t disp_output_cntl;
|
||||
uint32_t disp_hw_debug;
|
||||
uint32_t disp2_merge_cntl;
|
||||
uint32_t grph2_buffer_cntl;
|
||||
uint32_t crtc2_h_total_disp;
|
||||
uint32_t crtc2_h_sync_strt_wid;
|
||||
uint32_t crtc2_v_total_disp;
|
||||
uint32_t crtc2_v_sync_strt_wid;
|
||||
uint32_t crtc2_offset;
|
||||
uint32_t crtc2_offset_cntl;
|
||||
uint32_t crtc2_pitch;
|
||||
/* CRTC2 registers */
|
||||
uint32_t crtc2_gen_cntl;
|
||||
uint32_t dac2_cntl;
|
||||
uint32_t disp_output_cntl;
|
||||
uint32_t disp_hw_debug;
|
||||
uint32_t disp2_merge_cntl;
|
||||
uint32_t grph2_buffer_cntl;
|
||||
uint32_t crtc2_h_total_disp;
|
||||
uint32_t crtc2_h_sync_strt_wid;
|
||||
uint32_t crtc2_v_total_disp;
|
||||
uint32_t crtc2_v_sync_strt_wid;
|
||||
uint32_t crtc2_offset;
|
||||
uint32_t crtc2_offset_cntl;
|
||||
uint32_t crtc2_pitch;
|
||||
|
||||
/* Flat panel regs */
|
||||
uint32_t fp_crtc_h_total_disp;
|
||||
uint32_t fp_crtc_v_total_disp;
|
||||
uint32_t fp_gen_cntl;
|
||||
uint32_t fp2_gen_cntl;
|
||||
uint32_t fp_h_sync_strt_wid;
|
||||
uint32_t fp2_h_sync_strt_wid;
|
||||
uint32_t fp_horz_stretch;
|
||||
uint32_t fp_panel_cntl;
|
||||
uint32_t fp_v_sync_strt_wid;
|
||||
uint32_t fp2_v_sync_strt_wid;
|
||||
uint32_t fp_vert_stretch;
|
||||
uint32_t lvds_gen_cntl;
|
||||
uint32_t lvds_pll_cntl;
|
||||
uint32_t tmds_crc;
|
||||
uint32_t tmds_transmitter_cntl;
|
||||
/* Flat panel regs */
|
||||
uint32_t fp_crtc_h_total_disp;
|
||||
uint32_t fp_crtc_v_total_disp;
|
||||
uint32_t fp_gen_cntl;
|
||||
uint32_t fp2_gen_cntl;
|
||||
uint32_t fp_h_sync_strt_wid;
|
||||
uint32_t fp2_h_sync_strt_wid;
|
||||
uint32_t fp_horz_stretch;
|
||||
uint32_t fp_panel_cntl;
|
||||
uint32_t fp_v_sync_strt_wid;
|
||||
uint32_t fp2_v_sync_strt_wid;
|
||||
uint32_t fp_vert_stretch;
|
||||
uint32_t lvds_gen_cntl;
|
||||
uint32_t lvds_pll_cntl;
|
||||
uint32_t tmds_crc;
|
||||
uint32_t tmds_transmitter_cntl;
|
||||
|
||||
/* Computed values for PLL */
|
||||
uint32_t dot_clock_freq;
|
||||
uint32_t pll_output_freq;
|
||||
int32_t feedback_div;
|
||||
int32_t post_div;
|
||||
/* Computed values for PLL */
|
||||
uint32_t dot_clock_freq;
|
||||
uint32_t pll_output_freq;
|
||||
int32_t feedback_div;
|
||||
int32_t post_div;
|
||||
|
||||
/* PLL registers */
|
||||
uint32_t ppll_div_3;
|
||||
uint32_t ppll_ref_div;
|
||||
uint32_t vclk_ecp_cntl;
|
||||
uint32_t clk_cntl_index;
|
||||
uint32_t htotal_cntl;
|
||||
/* PLL registers */
|
||||
uint32_t ppll_div_3;
|
||||
uint32_t ppll_ref_div;
|
||||
uint32_t vclk_ecp_cntl;
|
||||
uint32_t clk_cntl_index;
|
||||
uint32_t htotal_cntl;
|
||||
|
||||
/* Computed values for PLL2 */
|
||||
uint32_t dot_clock_freq_2;
|
||||
uint32_t pll_output_freq_2;
|
||||
int32_t feedback_div_2;
|
||||
int32_t post_div_2;
|
||||
/* Computed values for PLL2 */
|
||||
uint32_t dot_clock_freq_2;
|
||||
uint32_t pll_output_freq_2;
|
||||
int32_t feedback_div_2;
|
||||
int32_t post_div_2;
|
||||
|
||||
/* PLL2 registers */
|
||||
uint32_t p2pll_ref_div;
|
||||
uint32_t p2pll_div_0;
|
||||
uint32_t htotal_cntl2;
|
||||
/* PLL2 registers */
|
||||
uint32_t p2pll_ref_div;
|
||||
uint32_t p2pll_div_0;
|
||||
uint32_t htotal_cntl2;
|
||||
};
|
||||
|
||||
struct panel_info
|
||||
{
|
||||
int32_t xres, yres;
|
||||
int32_t valid;
|
||||
int32_t clock;
|
||||
int32_t hOver_plus, hSync_width, hblank;
|
||||
int32_t vOver_plus, vSync_width, vblank;
|
||||
int32_t hAct_high, vAct_high, int32_terlaced;
|
||||
int32_t pwr_delay;
|
||||
int32_t use_bios_dividers;
|
||||
int32_t ref_divider;
|
||||
int32_t post_divider;
|
||||
int32_t fbk_divider;
|
||||
int32_t xres, yres;
|
||||
int32_t valid;
|
||||
int32_t clock;
|
||||
int32_t hOver_plus, hSync_width, hblank;
|
||||
int32_t vOver_plus, vSync_width, vblank;
|
||||
int32_t hAct_high, vAct_high, int32_terlaced;
|
||||
int32_t pwr_delay;
|
||||
int32_t use_bios_dividers;
|
||||
int32_t ref_divider;
|
||||
int32_t post_divider;
|
||||
int32_t fbk_divider;
|
||||
};
|
||||
|
||||
struct radeonfb_info;
|
||||
@@ -276,186 +279,186 @@ struct radeonfb_info;
|
||||
#ifdef CONFIG_FB_RADEON_I2C
|
||||
struct radeon_i2c_chan
|
||||
{
|
||||
struct radeonfb_info *rinfo;
|
||||
uint32_t ddc_reg;
|
||||
struct i2c_adapter adapter;
|
||||
struct i2c_algo_bit_data algo;
|
||||
struct radeonfb_info *rinfo;
|
||||
uint32_t ddc_reg;
|
||||
struct i2c_adapter adapter;
|
||||
struct i2c_algo_bit_data algo;
|
||||
};
|
||||
#endif
|
||||
|
||||
enum radeon_pm_mode
|
||||
{
|
||||
radeon_pm_none = 0, /* Nothing supported */
|
||||
radeon_pm_d2 = 0x00000001, /* Can do D2 state */
|
||||
radeon_pm_off = 0x00000002, /* Can resume from D3 cold */
|
||||
radeon_pm_none = 0, /* Nothing supported */
|
||||
radeon_pm_d2 = 0x00000001, /* Can do D2 state */
|
||||
radeon_pm_off = 0x00000002, /* Can resume from D3 cold */
|
||||
};
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t table_revision;
|
||||
uint8_t table_size;
|
||||
uint8_t tuner_type;
|
||||
uint8_t audio_chip;
|
||||
uint8_t product_id;
|
||||
uint8_t tuner_voltage_teletext_fm;
|
||||
uint8_t i2s_config; /* configuration of the sound chip */
|
||||
uint8_t video_decoder_type;
|
||||
uint8_t video_decoder_host_config;
|
||||
uint8_t input[5];
|
||||
uint8_t table_revision;
|
||||
uint8_t table_size;
|
||||
uint8_t tuner_type;
|
||||
uint8_t audio_chip;
|
||||
uint8_t product_id;
|
||||
uint8_t tuner_voltage_teletext_fm;
|
||||
uint8_t i2s_config; /* configuration of the sound chip */
|
||||
uint8_t video_decoder_type;
|
||||
uint8_t video_decoder_host_config;
|
||||
uint8_t input[5];
|
||||
} _MM_TABLE;
|
||||
|
||||
struct radeonfb_info
|
||||
{
|
||||
int32_t handle; /* PCI BIOS, must be 1st place */
|
||||
int32_t big_endian; /* PCI BIOS */
|
||||
|
||||
uint32_t cursor_x;
|
||||
uint32_t cursor_y;
|
||||
int32_t cursor_show;
|
||||
uint32_t cursor_start;
|
||||
uint32_t cursor_end;
|
||||
int32_t cursor_fg;
|
||||
int32_t cursor_bg;
|
||||
int32_t handle; /* PCI BIOS, must be 1st place */
|
||||
int32_t big_endian; /* PCI BIOS */
|
||||
|
||||
int32_t fifo_slots; /* Free slots in the FIFO (64 max) */
|
||||
uint32_t cursor_x;
|
||||
uint32_t cursor_y;
|
||||
int32_t cursor_show;
|
||||
uint32_t cursor_start;
|
||||
uint32_t cursor_end;
|
||||
int32_t cursor_fg;
|
||||
int32_t cursor_bg;
|
||||
|
||||
/* Computed values for Radeon */
|
||||
uint32_t dp_gui_master_cntl_clip;
|
||||
uint32_t trans_color;
|
||||
int32_t fifo_slots; /* Free slots in the FIFO (64 max) */
|
||||
|
||||
/* Saved values for ScreenToScreenCopy */
|
||||
int32_t xdir;
|
||||
int32_t ydir;
|
||||
/* Computed values for Radeon */
|
||||
uint32_t dp_gui_master_cntl_clip;
|
||||
uint32_t trans_color;
|
||||
|
||||
/* ScanlineScreenToScreenColorExpand support */
|
||||
int32_t scanline_h;
|
||||
int32_t scanline_words;
|
||||
int32_t scanline_bpp; /* Only used for ImageWrite */
|
||||
/* Saved values for ScreenToScreenCopy */
|
||||
int32_t xdir;
|
||||
int32_t ydir;
|
||||
|
||||
/* Saved values for DashedTwoPoint32_tLine */
|
||||
int32_t dashLen;
|
||||
uint32_t dashPattern;
|
||||
int32_t dash_fg;
|
||||
int32_t dash_bg;
|
||||
/* ScanlineScreenToScreenColorExpand support */
|
||||
int32_t scanline_h;
|
||||
int32_t scanline_words;
|
||||
int32_t scanline_bpp; /* Only used for ImageWrite */
|
||||
|
||||
struct fb_info *info;
|
||||
/* Saved values for DashedTwoPoint32_tLine */
|
||||
int32_t dashLen;
|
||||
uint32_t dashPattern;
|
||||
int32_t dash_fg;
|
||||
int32_t dash_bg;
|
||||
|
||||
struct radeon_regs state;
|
||||
struct radeon_regs init_state;
|
||||
struct fb_info *info;
|
||||
|
||||
uint8_t name[50];
|
||||
struct radeon_regs state;
|
||||
struct radeon_regs init_state;
|
||||
|
||||
uint32_t io_base_phys;
|
||||
uint32_t mmio_base_phys;
|
||||
uint32_t fb_base_phys;
|
||||
uint8_t name[50];
|
||||
|
||||
void *io_base;
|
||||
void *mmio_base;
|
||||
void *fb_base;
|
||||
|
||||
uint32_t fb_local_base;
|
||||
uint32_t fb_offset;
|
||||
|
||||
uint32_t bios_seg_phys;
|
||||
void *bios_seg;
|
||||
int32_t fp_bios_start;
|
||||
uint32_t io_base_phys;
|
||||
uint32_t mmio_base_phys;
|
||||
uint32_t fb_base_phys;
|
||||
|
||||
struct
|
||||
{
|
||||
uint8_t red;
|
||||
uint8_t green;
|
||||
uint8_t blue;
|
||||
uint8_t pad;
|
||||
} palette[256];
|
||||
void *io_base;
|
||||
void *mmio_base;
|
||||
void *fb_base;
|
||||
|
||||
int32_t chipset;
|
||||
uint8_t family;
|
||||
uint8_t rev;
|
||||
int32_t errata;
|
||||
uint32_t video_ram;
|
||||
uint32_t mapped_vram;
|
||||
int32_t vram_width;
|
||||
int32_t vram_ddr;
|
||||
uint32_t fb_local_base;
|
||||
uint32_t fb_offset;
|
||||
|
||||
int32_t pitch, bpp, depth;
|
||||
uint32_t bios_seg_phys;
|
||||
void *bios_seg;
|
||||
int32_t fp_bios_start;
|
||||
|
||||
int32_t has_CRTC2;
|
||||
int32_t is_mobility;
|
||||
int32_t is_IGP;
|
||||
int32_t reversed_DAC;
|
||||
int32_t reversed_TMDS;
|
||||
struct panel_info panel_info;
|
||||
int32_t mon1_type;
|
||||
uint8_t *mon1_EDID;
|
||||
struct fb_videomode *mon1_modedb;
|
||||
int32_t mon1_dbsize;
|
||||
int32_t mon2_type;
|
||||
uint8_t *mon2_EDID;
|
||||
struct
|
||||
{
|
||||
uint8_t red;
|
||||
uint8_t green;
|
||||
uint8_t blue;
|
||||
uint8_t pad;
|
||||
} palette[256];
|
||||
|
||||
uint32_t dp_gui_master_cntl;
|
||||
int32_t chipset;
|
||||
uint8_t family;
|
||||
uint8_t rev;
|
||||
int32_t errata;
|
||||
uint32_t video_ram;
|
||||
uint32_t mapped_vram;
|
||||
int32_t vram_width;
|
||||
int32_t vram_ddr;
|
||||
|
||||
struct pll_info bios_pll;
|
||||
struct pll_info pll;
|
||||
int32_t pitch, bpp, depth;
|
||||
|
||||
uint32_t save_regs[100];
|
||||
int32_t asleep;
|
||||
int32_t lock_blank;
|
||||
int32_t dynclk;
|
||||
int32_t no_schedule;
|
||||
enum radeon_pm_mode pm_mode;
|
||||
int32_t has_CRTC2;
|
||||
int32_t is_mobility;
|
||||
int32_t is_IGP;
|
||||
int32_t reversed_DAC;
|
||||
int32_t reversed_TMDS;
|
||||
struct panel_info panel_info;
|
||||
int32_t mon1_type;
|
||||
uint8_t *mon1_EDID;
|
||||
struct fb_videomode *mon1_modedb;
|
||||
int32_t mon1_dbsize;
|
||||
int32_t mon2_type;
|
||||
uint8_t *mon2_EDID;
|
||||
|
||||
/* Timer used for delayed LVDS operations */
|
||||
int32_t lvds_timer;
|
||||
uint32_t pending_lvds_gen_cntl;
|
||||
uint32_t dp_gui_master_cntl;
|
||||
|
||||
struct pll_info bios_pll;
|
||||
struct pll_info pll;
|
||||
|
||||
uint32_t save_regs[100];
|
||||
int32_t asleep;
|
||||
int32_t lock_blank;
|
||||
int32_t dynclk;
|
||||
int32_t no_schedule;
|
||||
enum radeon_pm_mode pm_mode;
|
||||
|
||||
/* Timer used for delayed LVDS operations */
|
||||
int32_t lvds_timer;
|
||||
uint32_t pending_lvds_gen_cntl;
|
||||
|
||||
#ifdef CONFIG_FB_RADEON_I2C
|
||||
struct radeon_i2c_chan i2c[4];
|
||||
struct radeon_i2c_chan i2c[4];
|
||||
#endif
|
||||
|
||||
/* Texture */
|
||||
|
||||
int32_t RenderInited3D;
|
||||
int32_t tilingEnabled;
|
||||
void *RenderTex;
|
||||
uint32_t RenderTexOffset;
|
||||
int32_t RenderTexSize;
|
||||
void (*RenderCallback)(struct radeonfb_info *rinfo);
|
||||
uint32_t RenderTimeout;
|
||||
uint32_t dst_pitch_offset;
|
||||
/* Texture */
|
||||
|
||||
int32_t RenderInited3D;
|
||||
int32_t tilingEnabled;
|
||||
void *RenderTex;
|
||||
uint32_t RenderTexOffset;
|
||||
int32_t RenderTexSize;
|
||||
void (*RenderCallback)(struct radeonfb_info *rinfo);
|
||||
uint32_t RenderTimeout;
|
||||
uint32_t dst_pitch_offset;
|
||||
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
/* Video & theatre */
|
||||
/* Video & theatre */
|
||||
|
||||
TheatrePtr theatre;
|
||||
TheatrePtr theatre;
|
||||
|
||||
int32_t MM_TABLE_valid;
|
||||
_MM_TABLE MM_TABLE;
|
||||
int32_t MM_TABLE_valid;
|
||||
_MM_TABLE MM_TABLE;
|
||||
|
||||
int32_t RageTheatreCrystal;
|
||||
int32_t RageTheatreTunerPort;
|
||||
int32_t RageTheatreCompositePort;
|
||||
int32_t RageTheatreSVideoPort;
|
||||
int32_t tunerType;
|
||||
|
||||
int32_t videoStatus;
|
||||
int32_t encoding;
|
||||
int32_t overlay_deint32_terlacing_method;
|
||||
int32_t video_stream_active;
|
||||
int32_t capture_vbi_data;
|
||||
int32_t v;
|
||||
void *videoLinear;
|
||||
int32_t videoLinearSize;
|
||||
struct
|
||||
{
|
||||
uint32_t y,u,v;
|
||||
} videoLinearOffset;
|
||||
int32_t RageTheatreCrystal;
|
||||
int32_t RageTheatreTunerPort;
|
||||
int32_t RageTheatreCompositePort;
|
||||
int32_t RageTheatreSVideoPort;
|
||||
int32_t tunerType;
|
||||
|
||||
int32_t videoStatus;
|
||||
int32_t encoding;
|
||||
int32_t overlay_deint32_terlacing_method;
|
||||
int32_t video_stream_active;
|
||||
int32_t capture_vbi_data;
|
||||
int32_t v;
|
||||
void *videoLinear;
|
||||
int32_t videoLinearSize;
|
||||
struct
|
||||
{
|
||||
uint32_t y,u,v;
|
||||
} videoLinearOffset;
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
int32_t dec_hue;
|
||||
int32_t dec_saturation;
|
||||
int32_t dec_contrast;
|
||||
int32_t dec_brightness;
|
||||
|
||||
int32_t dec_hue;
|
||||
int32_t dec_saturation;
|
||||
int32_t dec_contrast;
|
||||
int32_t dec_brightness;
|
||||
};
|
||||
|
||||
#define PRIMARY_MONITOR(rinfo) (rinfo->mon1_type)
|
||||
@@ -473,7 +476,7 @@ struct radeonfb_info
|
||||
*/
|
||||
static inline void _radeon_msleep(struct radeonfb_info *rinfo, uint32_t ms)
|
||||
{
|
||||
wait_ms(ms);
|
||||
wait_ms(ms);
|
||||
}
|
||||
|
||||
#define radeon_msleep(ms) _radeon_msleep(rinfo,ms)
|
||||
@@ -485,17 +488,17 @@ extern uint32_t __INPLL(struct radeonfb_info *rinfo, uint32_t addr);
|
||||
extern void __OUTPLL(struct radeonfb_info *rinfo, uint32_t index, uint32_t val);
|
||||
extern void __OUTPLLP(struct radeonfb_info *rinfo, uint32_t index, uint32_t val, uint32_t mask);
|
||||
|
||||
#define INREG8(addr) *((uint8_t *)(rinfo->mmio_base + addr))
|
||||
#define INREG16(addr) swpw(*(uint16_t *)(rinfo->mmio_base + addr))
|
||||
#define INREG(addr) swpl(*(uint32_t *)(rinfo->mmio_base + addr))
|
||||
#define OUTREG8(addr, val) (*((uint8_t *)(rinfo->mmio_base + addr)) = val)
|
||||
#define OUTREG16(addr, val) (*((uint16_t *)(rinfo->mmio_base + addr)) = swpw(val))
|
||||
#define OUTREG(addr, val) (*((uint32_t *)(rinfo->mmio_base + addr)) = swpl(val))
|
||||
#define INREG8(addr) *((volatile uint8_t *)(rinfo->mmio_base + addr))
|
||||
#define INREG16(addr) swpw(*(volatile uint16_t *)(rinfo->mmio_base + addr))
|
||||
#define INREG(addr) swpl(*(volatile uint32_t *)(rinfo->mmio_base + addr))
|
||||
#define OUTREG8(addr, val) (*((volatile uint8_t *)(rinfo->mmio_base + addr)) = val)
|
||||
#define OUTREG16(addr, val) (*((volatile uint16_t *)(rinfo->mmio_base + addr)) = swpw((uint32_t) val))
|
||||
#define OUTREG(addr, val) (*((volatile uint32_t *)(rinfo->mmio_base + addr)) = swpl((uint32_t) val))
|
||||
|
||||
extern int32_t *tab_funcs_pci;
|
||||
#define BIOS_IN8(v) (* ((uint8_t *) rinfo->bios_seg_phys + v))
|
||||
#define BIOS_IN16(v) (swpw(*(uint16_t *) ((uint8_t *) rinfo->bios_seg_phys + v)))
|
||||
#define BIOS_IN32(v) (swpl(*(uint32_t *) ((uint8_t *) rinfo->bios_seg_phys + v)))
|
||||
#define BIOS_IN8(v) (* ((volatile uint8_t *) rinfo->bios_seg_phys + v))
|
||||
#define BIOS_IN16(v) (swpw(*(volatile uint16_t *) ((uint8_t *) rinfo->bios_seg_phys + v)))
|
||||
#define BIOS_IN32(v) (swpl(*(volatile uint32_t *) ((uint8_t *) rinfo->bios_seg_phys + v)))
|
||||
|
||||
#define ADDRREG(addr) ((volatile uint32_t *)(rinfo->mmio_base + (addr)))
|
||||
#define OUTREGP(addr, val, mask) _OUTREGP(rinfo, addr, val, mask)
|
||||
@@ -509,14 +512,14 @@ extern int32_t *tab_funcs_pci;
|
||||
|
||||
static inline uint32_t radeon_get_dstbpp(uint16_t depth)
|
||||
{
|
||||
switch(depth)
|
||||
{
|
||||
case 8: return DST_8BPP;
|
||||
case 15: return DST_15BPP;
|
||||
case 16: return DST_16BPP;
|
||||
case 32: return DST_32BPP;
|
||||
default: return 0;
|
||||
}
|
||||
switch(depth)
|
||||
{
|
||||
case 8: return DST_8BPP;
|
||||
case 15: return DST_15BPP;
|
||||
case 16: return DST_16BPP;
|
||||
case 32: return DST_32BPP;
|
||||
default: return 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* I2C Functions */
|
||||
@@ -532,11 +535,11 @@ extern void radeonfb_pm_exit(struct radeonfb_info *rinfo);
|
||||
|
||||
/* Monitor probe functions */
|
||||
extern void radeon_probe_screens(struct radeonfb_info *rinfo,
|
||||
const char *monitor_layout, int ignore_edid);
|
||||
const char *monitor_layout, int32_t ignore_edid);
|
||||
extern void radeon_check_modes(struct radeonfb_info *rinfo, struct mode_option *resolution);
|
||||
extern int radeon_match_mode(struct radeonfb_info *rinfo,
|
||||
struct fb_var_screeninfo *dest,
|
||||
const struct fb_var_screeninfo *src);
|
||||
extern int32_t radeon_match_mode(struct radeonfb_info *rinfo,
|
||||
struct fb_var_screeninfo *dest,
|
||||
const struct fb_var_screeninfo *src);
|
||||
|
||||
/* Video functions */
|
||||
void RADEONResetVideo(struct radeonfb_info *rinfo);
|
||||
@@ -549,7 +552,7 @@ void RADEONVIP_reset(struct radeonfb_info *rinfo);
|
||||
void RADEONInitVideo(struct radeonfb_info *rinfo);
|
||||
void RADEONShutdownVideo(struct radeonfb_info *rinfo);
|
||||
int32_t RADEONPutVideo(struct radeonfb_info *rinfo, int32_t src_x, int32_t src_y, int32_t src_w, int32_t src_h,
|
||||
int32_t drw_x, int32_t drw_y, int32_t drw_w, int32_t drw_h);
|
||||
int32_t drw_x, int32_t drw_y, int32_t drw_w, int32_t drw_h);
|
||||
void RADEONStopVideo(struct radeonfb_info *rinfo, int32_t cleanup);
|
||||
|
||||
/* Theatre functions */
|
||||
@@ -572,7 +575,7 @@ extern void RADEONVIP_reset(struct radeonfb_info *rinfo);
|
||||
|
||||
/* Accel functions */
|
||||
|
||||
extern void radeon_wait_for_fifo_function(struct radeonfb_info *rinfo, int entries);
|
||||
extern void radeon_wait_for_fifo_function(struct radeonfb_info *rinfo, int32_t entries);
|
||||
extern void radeon_engine_flush(struct radeonfb_info *rinfo);
|
||||
extern void radeon_engine_reset(struct radeonfb_info *rinfo);
|
||||
extern void radeon_engine_restore(struct radeonfb_info *rinfo);
|
||||
@@ -582,71 +585,71 @@ extern void radeon_wait_for_idle_mmio(struct radeonfb_info *rinfo);
|
||||
#define radeon_engine_idle() radeon_wait_for_idle_mmio(rinfo)
|
||||
|
||||
#define radeon_wait_for_fifo(rinfo, entries) \
|
||||
do \
|
||||
{ \
|
||||
if (rinfo->fifo_slots < entries) \
|
||||
radeon_wait_for_fifo_function(rinfo, entries); \
|
||||
rinfo->fifo_slots -= entries; \
|
||||
} while (0)
|
||||
do \
|
||||
{ \
|
||||
if (rinfo->fifo_slots < entries) \
|
||||
radeon_wait_for_fifo_function(rinfo, entries); \
|
||||
rinfo->fifo_slots -= entries; \
|
||||
} while (0)
|
||||
|
||||
static inline int radeonfb_sync(struct fb_info *info)
|
||||
static inline int32_t radeonfb_sync(struct fb_info *info)
|
||||
{
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
radeon_engine_idle();
|
||||
return 0;
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
radeon_engine_idle();
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern void radeon_restore_accel_state_mmio(struct fb_info *info);
|
||||
extern void radeon_setup_for_solid_fill(struct fb_info *info, int color, int rop, unsigned int planemask);
|
||||
extern void radeon_subsequent_solid_fill_rect_mmio(struct fb_info *info, int x, int y, int w, int h);
|
||||
extern void radeon_setup_for_solid_line_mmio(struct fb_info *info, int color, int rop, unsigned int planemask);
|
||||
extern void radeon_subsequent_solid_hor_vert_line_mmio(struct fb_info *info, int x, int y, int len, int dir);
|
||||
extern void radeon_subsequent_solid_two_point_line_mmio(struct fb_info *info, int xa, int ya, int xb,
|
||||
int yb, int flags);
|
||||
extern void radeon_setup_for_dashed_line_mmio(struct fb_info *info, int fg, int bg,
|
||||
int rop, unsigned int planemask, int length, unsigned char *pattern);
|
||||
extern void radeon_setup_for_solid_fill(struct fb_info *info, int32_t color, int32_t rop, uint32_t planemask);
|
||||
extern void radeon_subsequent_solid_fill_rect_mmio(struct fb_info *info, int32_t x, int32_t y, int32_t w, int32_t h);
|
||||
extern void radeon_setup_for_solid_line_mmio(struct fb_info *info, int32_t color, int32_t rop, uint32_t planemask);
|
||||
extern void radeon_subsequent_solid_hor_vert_line_mmio(struct fb_info *info, int32_t x, int32_t y, int32_t len, int32_t dir);
|
||||
extern void radeon_subsequent_solid_two_point_line_mmio(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb,
|
||||
int32_t yb, int32_t flags);
|
||||
extern void radeon_setup_for_dashed_line_mmio(struct fb_info *info, int32_t fg, int32_t bg,
|
||||
int32_t rop, uint32_t planemask, int32_t length, unsigned char *pattern);
|
||||
extern void radeon_subsequent_dashed_two_point_line_mmio(struct fb_info *info,
|
||||
int xa, int ya, int xb, int yb, int flags, int phase);
|
||||
int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t flags, int32_t phase);
|
||||
extern void radeon_setup_for_screen_to_screen_copy_mmio(struct fb_info *info,
|
||||
int xdir, int ydir, int rop, unsigned int planemask, int trans_color);
|
||||
int32_t xdir, int32_t ydir, int32_t rop, uint32_t planemask, int32_t trans_color);
|
||||
extern void radeon_subsequent_screen_to_screen_copy_mmio(struct fb_info *info,
|
||||
int xa, int ya, int xb, int yb, int w, int h);
|
||||
int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t w, int32_t h);
|
||||
extern void radeon_screen_to_screen_copy_mmio(struct fb_info *info,
|
||||
int xa, int ya, int xb, int yb, int w, int h, int rop);
|
||||
int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t w, int32_t h, int32_t rop);
|
||||
extern void radeon_setup_for_mono_8x8_pattern_fill_mmio(struct fb_info *info,
|
||||
int patternx, int patterny, int fg, int bg, int rop, unsigned int planemask);
|
||||
int32_t patternx, int32_t patterny, int32_t fg, int32_t bg, int32_t rop, uint32_t planemask);
|
||||
extern void radeon_subsequent_mono_8x8_pattern_fill_rect_mmio(struct fb_info *info,
|
||||
int patternx, int patterny, int x, int y, int w, int h);
|
||||
extern void radeon_setup_for_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info,
|
||||
int fg, int bg, int rop, unsigned int planemask);
|
||||
int32_t patternx, int32_t patterny, int32_t x, int32_t y, int32_t w, int32_t h);
|
||||
extern void radeon_setup_for_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info,
|
||||
int32_t fg, int32_t bg, int32_t rop, uint32_t planemask);
|
||||
extern void radeon_subsequent_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info,
|
||||
int x, int y, int w, int h, int skipleft);
|
||||
extern void radeon_subsequent_scanline_mmio(struct fb_info *info, unsigned long *buf);
|
||||
int32_t x, int32_t y, int32_t w, int32_t h, int32_t skipleft);
|
||||
extern void radeon_subsequent_scanline_mmio(struct fb_info *info, uint32_t *buf);
|
||||
extern void radeon_setup_for_scanline_image_write_mmio(struct fb_info *info,
|
||||
int rop, unsigned int planemask, int trans_color, int bpp);
|
||||
int32_t rop, uint32_t planemask, int32_t trans_color, int32_t bpp);
|
||||
extern void radeon_subsequent_scanline_image_write_rect_mmio(struct fb_info *info,
|
||||
int x, int y, int w, int h, int skipleft);
|
||||
int32_t x, int32_t y, int32_t w, int32_t h, int32_t skipleft);
|
||||
extern void radeon_set_clipping_rectangle_mmio(struct fb_info *info,
|
||||
int xa, int ya, int xb, int yb);
|
||||
int32_t xa, int32_t ya, int32_t xb, int32_t yb);
|
||||
extern void radeon_disable_clipping_mmio(struct fb_info *info);
|
||||
|
||||
extern int32_t radeon_setup_for_cpu_to_screen_alpha_texture_mmio(struct fb_info *info,
|
||||
int op, int red, int green, int blue,
|
||||
int alpha, int maskFormat, int dstFormat,
|
||||
uint8_t *alphaPtr, int alphaPitch,
|
||||
int width, int height, int32_t flags);
|
||||
extern int32_t radeon_setup_for_cpu_to_screen_alpha_texture_mmio(struct fb_info *info,
|
||||
int32_t op, int32_t red, int32_t green, int32_t blue,
|
||||
int32_t alpha, int32_t maskFormat, int32_t dstFormat,
|
||||
uint8_t *alphaPtr, int32_t alphaPitch,
|
||||
int32_t width, int32_t height, int32_t flags);
|
||||
extern int32_t radeon_setup_for_cpu_to_screen_texture_mmio(struct fb_info *info, int32_t op,
|
||||
uint32_t srcFormat, uint32_t dstFormat,
|
||||
uint8_t *texPtr, int32_t texPitch,
|
||||
int32_t width, int32_t height, int32_t flags);
|
||||
uint32_t srcFormat, uint32_t dstFormat,
|
||||
uint8_t *texPtr, int32_t texPitch,
|
||||
int32_t width, int32_t height, int32_t flags);
|
||||
extern void radeon_subsequent_cpu_to_screen_texture_mmio(struct fb_info *info,
|
||||
int32_t dstx, int32_t dsty,
|
||||
int32_t srcx, int32_t srcy,
|
||||
int32_t width, int32_t height);
|
||||
int32_t dstx, int32_t dsty,
|
||||
int32_t srcx, int32_t srcy,
|
||||
int32_t width, int32_t height);
|
||||
/* Cursor functions */
|
||||
extern void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg);
|
||||
extern void radeon_set_cursor_position(struct fb_info *info, int x, int y);
|
||||
extern void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom);
|
||||
extern void radeon_set_cursor_colors(struct fb_info *info, int32_t bg, int32_t fg);
|
||||
extern void radeon_set_cursor_position(struct fb_info *info, int32_t x, int32_t y);
|
||||
extern void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int32_t zoom);
|
||||
extern void radeon_hide_cursor(struct fb_info *info);
|
||||
extern void radeon_show_cursor(struct fb_info *info);
|
||||
extern long radeon_cursor_init(struct fb_info *info);
|
||||
@@ -654,8 +657,8 @@ extern long radeon_cursor_init(struct fb_info *info);
|
||||
/* Other functions */
|
||||
extern int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t mode_switch);
|
||||
extern void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, int32_t reg_only);
|
||||
int radeonfb_setcolreg(unsigned regno, unsigned red, unsigned green,
|
||||
unsigned blue, unsigned transp, struct fb_info *info);
|
||||
int32_t radeonfb_setcolreg(uint32_t regno, uint32_t red, uint32_t green,
|
||||
uint32_t blue, uint32_t transp, struct fb_info *info);
|
||||
extern int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent);
|
||||
extern void radeonfb_pci_unregister(void);
|
||||
|
||||
|
||||
@@ -43,5 +43,6 @@ typedef err_t (*memcpy_callback_t)(uint8_t *dst, uint8_t *src, size_t length);
|
||||
|
||||
extern void srec_execute(char *filename);
|
||||
extern err_t read_srecords(char *filename, void **start_address, uint32_t *actual_length, memcpy_callback_t callback);
|
||||
extern err_t srec_memcpy(uint8_t *dst, uint8_t *src, size_t n);
|
||||
|
||||
#endif /* _S19READER_H_ */
|
||||
|
||||
11
include/setjmp.h
Normal file
11
include/setjmp.h
Normal file
@@ -0,0 +1,11 @@
|
||||
#ifndef _SETJMP_H_
|
||||
#define _SETJMP_H_
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
typedef uint32_t jmp_buf[18];
|
||||
|
||||
extern int setjmp(jmp_buf env);
|
||||
extern void longjmp(jmp_buf env, int val);
|
||||
|
||||
#endif /* _SETJMP_H_ */
|
||||
@@ -22,8 +22,8 @@
|
||||
* Author: mfro
|
||||
*/
|
||||
|
||||
#ifndef UTIL_H_
|
||||
#define UTIL_H_
|
||||
#ifndef _UTIL_H_
|
||||
#define _UTIL_H_
|
||||
|
||||
#include <bas_types.h>
|
||||
|
||||
@@ -35,18 +35,7 @@
|
||||
*/
|
||||
static inline uint16_t swpw(uint16_t w)
|
||||
{
|
||||
register uint32_t result asm("d0");
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"lea %[input],a0\n\t" \
|
||||
"mvz.b 1(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b (a0),%[output]\n\t" \
|
||||
: [output] "=d" (result) /* output */
|
||||
: [input] "o" (w) /* input */
|
||||
: "cc", "a0", "memory" /* clobbered */
|
||||
);
|
||||
return result;
|
||||
return (w << 8) | (w >> 8);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -56,23 +45,8 @@ static inline uint16_t swpw(uint16_t w)
|
||||
*/
|
||||
static inline uint32_t swpl(uint32_t l)
|
||||
{
|
||||
register uint32_t result asm("d0");
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"lea %[input],a0\n\t" \
|
||||
"mvz.b 3(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b 2(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b 1(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b (a0),%[output]\n\t" \
|
||||
: [output] "=d" (result) /* output */
|
||||
: [input] "o" (l) /* input */
|
||||
: "cc", "a0", "memory" /* clobbered */
|
||||
);
|
||||
return result;
|
||||
return ((l & 0xff000000) >> 24) | ((l & 0x00ff0000) >> 8) |
|
||||
((l & 0x0000ff00) << 8) | (l << 24);
|
||||
}
|
||||
|
||||
|
||||
@@ -144,10 +118,10 @@ __extension__ \
|
||||
#define regsafe_call(addr) \
|
||||
__extension__ \
|
||||
({__asm__ volatile ("lea -60(sp),sp\n\t" \
|
||||
"movem.l d0-d7/a0-a6,(sp)"); \
|
||||
"movem.l d0-d7/a0-a6,(sp)"); \
|
||||
((void (*) (void)) addr)(); \
|
||||
__asm__ volatile ("movem.l (sp),d0-d7/a0-a6\n\t" \
|
||||
"lea 60(sp),sp"); \
|
||||
"lea 60(sp),sp"); \
|
||||
})
|
||||
|
||||
|
||||
|
||||
@@ -28,8 +28,8 @@
|
||||
* increment version number for release
|
||||
*/
|
||||
|
||||
#define MAJOR_VERSION 0
|
||||
#define MINOR_VERSION 87
|
||||
#define MAJOR_VERSION 0
|
||||
#define MINOR_VERSION 93
|
||||
|
||||
|
||||
#endif /* VERSION_H_ */
|
||||
|
||||
@@ -83,8 +83,8 @@ extern int16_t vsetmode(int16_t mode);
|
||||
extern int16_t vmontype(void);
|
||||
extern int16_t vsetsync(int16_t external);
|
||||
extern int32_t vgetsize(int16_t mode);
|
||||
extern int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb);
|
||||
extern int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb);
|
||||
extern int16_t vsetrgb(int16_t index,int16_t count, uint32_t *rgb);
|
||||
extern int16_t vgetrgb(int16_t index,int16_t count, uint32_t *rgb);
|
||||
|
||||
/* misc routines */
|
||||
extern int16_t get_videl_mode(void);
|
||||
|
||||
@@ -3,6 +3,7 @@
|
||||
|
||||
#include <bas_types.h>
|
||||
#include "bas_printf.h"
|
||||
#define CONFIG_FB_RADEON_I2C
|
||||
|
||||
extern void video_init(void);
|
||||
|
||||
|
||||
@@ -55,4 +55,7 @@ extern bool waitfor(uint32_t us, checker_func condition);
|
||||
extern uint32_t get_timer(void);
|
||||
extern void wait_ms(uint32_t ms);
|
||||
|
||||
#define US_TO_TIMER(a) ((a) * SYSCLK) / 1000000UL
|
||||
#define TIMER_TO_US(a) ((a) * 1000000UL) / SYSCLK)
|
||||
|
||||
#endif /* _WAIT_H_ */
|
||||
|
||||
@@ -1,241 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for debug definitions.
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/debug.h,v 1.4 2000/11/21 23:10:27 tsi Exp $ */
|
||||
|
||||
#include <bas_types.h>
|
||||
#include "bas_printf.h"
|
||||
|
||||
/*
|
||||
* for the X86 emulator, debug cannot be enabled and disabled on a per-file mode
|
||||
* as with all the other modules. It must be centrally enabled here.
|
||||
*/
|
||||
|
||||
#define DBG_X86EMU
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_X86EMU */
|
||||
|
||||
#ifndef __X86EMU_DEBUG_H
|
||||
#define __X86EMU_DEBUG_H
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
/* checks to be enabled for "runtime" */
|
||||
|
||||
#define CHECK_IP_FETCH_F 0x1
|
||||
#define CHECK_SP_ACCESS_F 0x2
|
||||
#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
|
||||
#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
|
||||
# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
|
||||
# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
|
||||
# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F)
|
||||
#else
|
||||
# define CHECK_IP_FETCH()
|
||||
# define CHECK_SP_ACCESS()
|
||||
# define CHECK_MEM_ACCESS()
|
||||
# define CHECK_DATA_ACCESS()
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
|
||||
# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
|
||||
# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
|
||||
# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
|
||||
# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
|
||||
# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
|
||||
# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
|
||||
# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_IP_CS_F)
|
||||
|
||||
# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
|
||||
# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
|
||||
# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
|
||||
# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F)
|
||||
# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F)
|
||||
# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
|
||||
# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F)
|
||||
# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F)
|
||||
# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
|
||||
#else
|
||||
# define DEBUG_INSTRUMENT() 0
|
||||
# define DEBUG_DECODE() 0
|
||||
# define DEBUG_TRACE() 0
|
||||
# define DEBUG_STEP() 0
|
||||
# define DEBUG_DISASSEMBLE() 0
|
||||
# define DEBUG_BREAK() 0
|
||||
# define DEBUG_SVC() 0
|
||||
# define DEBUG_SAVE_IP_CS() 0
|
||||
# define DEBUG_FS() 0
|
||||
# define DEBUG_PROC() 0
|
||||
# define DEBUG_SYSINT() 0
|
||||
# define DEBUG_TRACECALL() 0
|
||||
# define DEBUG_TRACECALLREGS() 0
|
||||
# define DEBUG_SYS() 0
|
||||
# define DEBUG_MEM_TRACE() 0
|
||||
# define DEBUG_IO_TRACE() 0
|
||||
# define DEBUG_DECODE_NOPRINT() 0
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
|
||||
# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
|
||||
x86emu_decode_printf(x)
|
||||
# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \
|
||||
x86emu_decode_printf2(x,y)
|
||||
|
||||
/*
|
||||
* The following allow us to look at the bytes of an instruction. The
|
||||
* first INCR_INSTRN_LEN, is called everytime bytes are consumed in
|
||||
* the decoding process. The SAVE_IP_CS is called initially when the
|
||||
* major opcode of the instruction is accessed.
|
||||
*/
|
||||
#define INC_DECODED_INST_LEN(x) \
|
||||
if (DEBUG_DECODE()) \
|
||||
x86emu_inc_decoded_inst_len(x)
|
||||
|
||||
#define SAVE_IP_CS(x,y) \
|
||||
if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \
|
||||
| DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
|
||||
M.x86.saved_cs = x; \
|
||||
M.x86.saved_ip = y; \
|
||||
}
|
||||
#else
|
||||
# define INC_DECODED_INST_LEN(x)
|
||||
# define DECODE_PRINTF(x)
|
||||
# define DECODE_PRINTF2(x,y)
|
||||
# define SAVE_IP_CS(x,y)
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define TRACE_REGS() \
|
||||
if (DEBUG_DISASSEMBLE()) { \
|
||||
x86emu_just_disassemble(); \
|
||||
goto EndOfTheInstructionProcedure; \
|
||||
} \
|
||||
if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs()
|
||||
#else
|
||||
# define TRACE_REGS()
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
|
||||
#else
|
||||
# define SINGLE_STEP()
|
||||
#endif
|
||||
|
||||
#define TRACE_AND_STEP() \
|
||||
TRACE_REGS(); \
|
||||
SINGLE_STEP()
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define START_OF_INSTR()
|
||||
# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
|
||||
# define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
|
||||
#else
|
||||
# define START_OF_INSTR()
|
||||
# define END_OF_INSTR()
|
||||
# define END_OF_INSTR_NO_TRACE()
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define CALL_TRACE(u,v,w,x,s) \
|
||||
if (DEBUG_TRACECALLREGS()) \
|
||||
x86emu_dump_regs(); \
|
||||
if (DEBUG_TRACECALL()) { \
|
||||
xprintf("%x", u); \
|
||||
xprintf(":%x", v); \
|
||||
xprintf(": CALL "); \
|
||||
xprintf("%x", s); \
|
||||
xprintf(" %x", w); \
|
||||
xprintf(":%x", x); \
|
||||
xprintf("%s", "\r\n"); \
|
||||
}
|
||||
|
||||
# define RETURN_TRACE(n,u,v) \
|
||||
if (DEBUG_TRACECALLREGS()) \
|
||||
x86emu_dump_regs(); \
|
||||
if (DEBUG_TRACECALL()) \
|
||||
{ \
|
||||
xprintf("%x", (unsigned long)u); \
|
||||
xprintf(":%x", (unsigned long)v); \
|
||||
xprintf(": CALL "); \
|
||||
xprintf("%x", n); \
|
||||
xprintf("\r\n"); \
|
||||
}
|
||||
#else
|
||||
# define CALL_TRACE(u,v,w,x,s)
|
||||
# define RETURN_TRACE(n,u,v)
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define DB(x) x
|
||||
#else
|
||||
#define DB(x)
|
||||
#endif
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
extern void x86emu_inc_decoded_inst_len (int x);
|
||||
extern void x86emu_decode_printf (char *x);
|
||||
extern void x86emu_decode_printf2 (char *x, int y);
|
||||
extern void x86emu_just_disassemble (void);
|
||||
extern void x86emu_single_step (void);
|
||||
extern void x86emu_end_instr (void);
|
||||
extern void x86emu_dump_regs (void);
|
||||
extern void x86emu_dump_xregs (void);
|
||||
extern void x86emu_print_int_vect (uint16_t iv);
|
||||
extern void x86emu_instrument_instruction (void);
|
||||
extern void x86emu_check_ip_access (void);
|
||||
extern void x86emu_check_sp_access (void);
|
||||
extern void x86emu_check_mem_access (uint32_t p);
|
||||
extern void x86emu_check_data_access (unsigned int s, unsigned int o);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_DEBUG_H */
|
||||
@@ -1,89 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for instruction decoding logic.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_DECODE_H
|
||||
#define __X86EMU_DECODE_H
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
/* Instruction Decoding Stuff */
|
||||
|
||||
#define FETCH_DECODE_MODRM(mod,rh,rl) fetch_decode_modrm(&mod,&rh,&rl)
|
||||
#define DECODE_RM_BYTE_REGISTER(r) decode_rm_byte_register(r)
|
||||
#define DECODE_RM_WORD_REGISTER(r) decode_rm_word_register(r)
|
||||
#define DECODE_RM_LONG_REGISTER(r) decode_rm_long_register(r)
|
||||
#define DECODE_CLEAR_SEGOVR() M.x86.mode &= ~SYSMODE_CLRMASK
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
void x86emu_intr_raise(uint8_t type);
|
||||
void fetch_decode_modrm(int *mod, int *regh, int *regl);
|
||||
uint8_t fetch_byte_imm(void);
|
||||
uint16_t fetch_word_imm(void);
|
||||
uint32_t fetch_long_imm(void);
|
||||
uint8_t fetch_data_byte(unsigned int offset);
|
||||
uint8_t fetch_data_byte_abs(unsigned int segment, unsigned int offset);
|
||||
uint16_t fetch_data_word(unsigned int offset);
|
||||
uint16_t fetch_data_word_abs(unsigned int segment, unsigned int offset);
|
||||
uint32_t fetch_data_long(unsigned int offset);
|
||||
uint32_t fetch_data_long_abs(unsigned int segment, unsigned int offset);
|
||||
void store_data_byte(unsigned int offset, uint8_t val);
|
||||
void store_data_byte_abs(unsigned int segment, unsigned int offset, uint8_t val);
|
||||
void store_data_word(unsigned int offset, uint16_t val);
|
||||
void store_data_word_abs(unsigned int segment, unsigned int offset, uint16_t val);
|
||||
void store_data_long(unsigned int offset, uint32_t val);
|
||||
void store_data_long_abs(unsigned int segment, unsigned int offset, uint32_t val);
|
||||
uint8_t *decode_rm_byte_register(int reg);
|
||||
uint16_t *decode_rm_word_register(int reg);
|
||||
uint32_t *decode_rm_long_register(int reg);
|
||||
uint16_t *decode_rm_seg_register(int reg);
|
||||
unsigned decode_rm00_address(int rm);
|
||||
unsigned decode_rm01_address(int rm);
|
||||
unsigned decode_rm10_address(int rm);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_DECODE_H */
|
||||
298
include/x86emu.h
298
include/x86emu.h
@@ -1,192 +1,158 @@
|
||||
/* $NetBSD: x86emu.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */
|
||||
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for public specific functions.
|
||||
* Any application linking against us should only
|
||||
* include this header
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/include/x86emu.h,v 1.2 2000/11/21 23:10:25 tsi Exp $ */
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
* Copyright (C) 2007 Joerg Sonnenberger
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_X86EMU_H
|
||||
#define __X86EMU_X86EMU_H
|
||||
|
||||
#include "bas_types.h"
|
||||
#define X86API
|
||||
#define X86APIP *
|
||||
#include "x86regs.h"
|
||||
#include "setjmp.h"
|
||||
|
||||
typedef uint16_t X86EMU_pioAddr;
|
||||
/*
|
||||
* General EAX, EBX, ECX, EDX type registers. Note that for
|
||||
* portability, and speed, the issue of byte swapping is not addressed
|
||||
* in the registers. All registers are stored in the default format
|
||||
* available on the host machine. The only critical issue is that the
|
||||
* registers should line up EXACTLY in the same manner as they do in
|
||||
* the 386. That is:
|
||||
*
|
||||
* EAX & 0xff === AL
|
||||
* EAX & 0xffff == AX
|
||||
*
|
||||
* etc. The result is that alot of the calculations can then be
|
||||
* done using the native instruction set fully.
|
||||
*/
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
//#pragma pack(1)
|
||||
struct X86EMU_register32 {
|
||||
uint32_t e_reg;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
REMARKS:
|
||||
Data structure containing ponters to programmed I/O functions used by the
|
||||
emulator. This is used so that the user program can hook all programmed
|
||||
I/O for the emulator to handled as necessary by the user program. By
|
||||
default the emulator contains simple functions that do not do access the
|
||||
hardware in any way. To allow the emualtor access the hardware, you will
|
||||
need to override the programmed I/O functions using the X86EMU_setupPioFuncs
|
||||
function.
|
||||
struct X86EMU_register16 {
|
||||
uint16_t filler0;
|
||||
uint16_t x_reg;
|
||||
};
|
||||
|
||||
HEADER:
|
||||
x86emu.h
|
||||
struct X86EMU_register8 {
|
||||
uint8_t filler0, filler1;
|
||||
uint8_t h_reg, l_reg;
|
||||
};
|
||||
|
||||
MEMBERS:
|
||||
inb - Function to read a byte from an I/O port
|
||||
inw - Function to read a word from an I/O port
|
||||
inl - Function to read a dword from an I/O port
|
||||
outb - Function to write a byte to an I/O port
|
||||
outw - Function to write a word to an I/O port
|
||||
outl - Function to write a dword to an I/O port
|
||||
****************************************************************************/
|
||||
typedef struct
|
||||
|
||||
union X86EMU_register {
|
||||
struct X86EMU_register32 I32_reg;
|
||||
struct X86EMU_register16 I16_reg;
|
||||
struct X86EMU_register8 I8_reg;
|
||||
};
|
||||
|
||||
struct X86EMU_regs {
|
||||
uint16_t register_cs;
|
||||
uint16_t register_ds;
|
||||
uint16_t register_es;
|
||||
uint16_t register_fs;
|
||||
uint16_t register_gs;
|
||||
uint16_t register_ss;
|
||||
uint32_t register_flags;
|
||||
union X86EMU_register register_a;
|
||||
union X86EMU_register register_b;
|
||||
union X86EMU_register register_c;
|
||||
union X86EMU_register register_d;
|
||||
|
||||
union X86EMU_register register_sp;
|
||||
union X86EMU_register register_bp;
|
||||
union X86EMU_register register_si;
|
||||
union X86EMU_register register_di;
|
||||
union X86EMU_register register_ip;
|
||||
|
||||
/*
|
||||
* MODE contains information on:
|
||||
* REPE prefix 2 bits repe,repne
|
||||
* SEGMENT overrides 5 bits normal,DS,SS,CS,ES
|
||||
* Delayed flag set 3 bits (zero, signed, parity)
|
||||
* reserved 6 bits
|
||||
* interrupt # 8 bits instruction raised interrupt
|
||||
* BIOS video segregs 4 bits
|
||||
* Interrupt Pending 1 bits
|
||||
* Extern interrupt 1 bits
|
||||
* Halted 1 bits
|
||||
*/
|
||||
uint32_t mode;
|
||||
volatile int intr; /* mask of pending interrupts */
|
||||
uint8_t intno;
|
||||
uint8_t __pad[3];
|
||||
};
|
||||
|
||||
struct X86EMU
|
||||
{
|
||||
uint8_t (X86APIP inb)(X86EMU_pioAddr addr);
|
||||
uint16_t (X86APIP inw)(X86EMU_pioAddr addr);
|
||||
uint32_t (X86APIP inl)(X86EMU_pioAddr addr);
|
||||
void (X86APIP outb)(X86EMU_pioAddr addr, uint8_t val);
|
||||
void (X86APIP outw)(X86EMU_pioAddr addr, uint16_t val);
|
||||
void (X86APIP outl)(X86EMU_pioAddr addr, uint32_t val);
|
||||
} X86EMU_pioFuncs;
|
||||
char *mem_base;
|
||||
size_t mem_size;
|
||||
void *sys_private;
|
||||
struct X86EMU_regs x86;
|
||||
|
||||
/****************************************************************************
|
||||
REMARKS:
|
||||
Data structure containing ponters to memory access functions used by the
|
||||
emulator. This is used so that the user program can hook all memory
|
||||
access functions as necessary for the emulator. By default the emulator
|
||||
contains simple functions that only access the internal memory of the
|
||||
emulator. If you need specialised functions to handle access to different
|
||||
types of memory (ie: hardware framebuffer accesses and BIOS memory access
|
||||
etc), you will need to override this using the X86EMU_setupMemFuncs
|
||||
function.
|
||||
jmp_buf exec_state;
|
||||
|
||||
HEADER:
|
||||
x86emu.h
|
||||
uint64_t cur_cycles;
|
||||
|
||||
MEMBERS:
|
||||
rdb - Function to read a byte from an address
|
||||
rdw - Function to read a word from an address
|
||||
rdl - Function to read a dword from an address
|
||||
wrb - Function to write a byte to an address
|
||||
wrw - Function to write a word to an address
|
||||
wrl - Function to write a dword to an address
|
||||
****************************************************************************/
|
||||
typedef struct {
|
||||
uint8_t (X86APIP rdb)(uint32_t addr);
|
||||
uint16_t (X86APIP rdw)(uint32_t addr);
|
||||
uint32_t (X86APIP rdl)(uint32_t addr);
|
||||
void (X86APIP wrb)(uint32_t addr, uint8_t val);
|
||||
void (X86APIP wrw)(uint32_t addr, uint16_t val);
|
||||
void (X86APIP wrl)(uint32_t addr, uint32_t val);
|
||||
} X86EMU_memFuncs;
|
||||
unsigned int cur_mod:2;
|
||||
unsigned int cur_rl:3;
|
||||
unsigned int cur_rh:3;
|
||||
uint32_t cur_offset;
|
||||
|
||||
/****************************************************************************
|
||||
Here are the default memory read and write
|
||||
function in case they are needed as fallbacks.
|
||||
***************************************************************************/
|
||||
extern uint8_t X86API rdb(uint32_t addr);
|
||||
extern uint16_t X86API rdw(uint32_t addr);
|
||||
extern uint32_t X86API rdl(uint32_t addr);
|
||||
extern void X86API wrb(uint32_t addr, uint8_t val);
|
||||
extern void X86API wrw(uint32_t addr, uint16_t val);
|
||||
extern void X86API wrl(uint32_t addr, uint32_t val);
|
||||
uint8_t (*emu_rdb)(struct X86EMU *, uint32_t addr);
|
||||
uint16_t (*emu_rdw)(struct X86EMU *, uint32_t addr);
|
||||
uint32_t (*emu_rdl)(struct X86EMU *, uint32_t addr);
|
||||
void (*emu_wrb)(struct X86EMU *, uint32_t addr,uint8_t val);
|
||||
void (*emu_wrw)(struct X86EMU *, uint32_t addr, uint16_t val);
|
||||
void (*emu_wrl)(struct X86EMU *, uint32_t addr, uint32_t val);
|
||||
|
||||
//#pragma pack()
|
||||
uint8_t (*emu_inb)(struct X86EMU *, uint16_t addr);
|
||||
uint16_t (*emu_inw)(struct X86EMU *, uint16_t addr);
|
||||
uint32_t (*emu_inl)(struct X86EMU *, uint16_t addr);
|
||||
void (*emu_outb)(struct X86EMU *, uint16_t addr, uint8_t val);
|
||||
void (*emu_outw)(struct X86EMU *, uint16_t addr, uint16_t val);
|
||||
void (*emu_outl)(struct X86EMU *, uint16_t addr, uint32_t val);
|
||||
|
||||
/*--------------------- type definitions -----------------------------------*/
|
||||
void (*_X86EMU_intrTab[256])(struct X86EMU *, int);
|
||||
};
|
||||
|
||||
typedef void (X86APIP X86EMU_intrFuncs)(int num);
|
||||
extern X86EMU_intrFuncs _X86EMU_intrTab[256];
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
void X86EMU_init_default(struct X86EMU *);
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
/* decode.c */
|
||||
|
||||
void X86EMU_setupMemFuncs(X86EMU_memFuncs *funcs);
|
||||
void X86EMU_setupPioFuncs(X86EMU_pioFuncs *funcs);
|
||||
void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
|
||||
void X86EMU_prepareForInt(int num);
|
||||
void X86EMU_exec(struct X86EMU *);
|
||||
void X86EMU_exec_call(struct X86EMU *, uint16_t, uint16_t);
|
||||
void X86EMU_exec_intr(struct X86EMU *, uint8_t);
|
||||
void X86EMU_halt_sys(struct X86EMU *);
|
||||
|
||||
/* decode.c */
|
||||
|
||||
void X86EMU_exec(void);
|
||||
void X86EMU_halt_sys(void);
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define HALT_SYS() \
|
||||
dbg("%s: halt_sys: file %s line %d\r\n", __FUNCTION__, __FILE__, __LINE__);\
|
||||
X86EMU_halt_sys();
|
||||
#else
|
||||
#define HALT_SYS() X86EMU_halt_sys()
|
||||
#endif
|
||||
|
||||
/* Debug options */
|
||||
|
||||
#define DEBUG_DECODE_F 0x000001 /* print decoded instruction */
|
||||
#define DEBUG_TRACE_F 0x000002 /* dump regs before/after execution */
|
||||
#define DEBUG_STEP_F 0x000004
|
||||
#define DEBUG_DISASSEMBLE_F 0x000008
|
||||
#define DEBUG_BREAK_F 0x000010
|
||||
#define DEBUG_SVC_F 0x000020
|
||||
#define DEBUG_FS_F 0x000080
|
||||
#define DEBUG_PROC_F 0x000100
|
||||
#define DEBUG_SYSINT_F 0x000200 /* bios system interrupts. */
|
||||
#define DEBUG_TRACECALL_F 0x000400
|
||||
#define DEBUG_INSTRUMENT_F 0x000800
|
||||
#define DEBUG_MEM_TRACE_F 0x001000
|
||||
#define DEBUG_IO_TRACE_F 0x002000
|
||||
#define DEBUG_TRACECALL_REGS_F 0x004000
|
||||
#define DEBUG_DECODE_NOPRINT_F 0x008000
|
||||
#define DEBUG_SAVE_IP_CS_F 0x010000
|
||||
#define DEBUG_SYS_F (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
|
||||
|
||||
void X86EMU_trace_regs(void);
|
||||
void X86EMU_trace_xregs(void);
|
||||
void X86EMU_dump_memory(uint16_t seg, uint16_t off, uint32_t amt);
|
||||
int X86EMU_trace_on(void);
|
||||
int X86EMU_trace_off(void);
|
||||
int X86EMU_set_debug(int debug);
|
||||
void X86EMU_setMemBase(void *base, unsigned long size);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_X86EMU_H */
|
||||
|
||||
169
include/x86emu_regs.h
Normal file
169
include/x86emu_regs.h
Normal file
@@ -0,0 +1,169 @@
|
||||
/* $NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */
|
||||
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
* Copyright (C) 2007 Joerg Sonnenberger
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_REGS_H
|
||||
#define __X86EMU_REGS_H
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
/* 8 bit registers */
|
||||
#define R_AH register_a.I8_reg.h_reg
|
||||
#define R_AL register_a.I8_reg.l_reg
|
||||
#define R_BH register_b.I8_reg.h_reg
|
||||
#define R_BL register_b.I8_reg.l_reg
|
||||
#define R_CH register_c.I8_reg.h_reg
|
||||
#define R_CL register_c.I8_reg.l_reg
|
||||
#define R_DH register_d.I8_reg.h_reg
|
||||
#define R_DL register_d.I8_reg.l_reg
|
||||
|
||||
/* 16 bit registers */
|
||||
#define R_AX register_a.I16_reg.x_reg
|
||||
#define R_BX register_b.I16_reg.x_reg
|
||||
#define R_CX register_c.I16_reg.x_reg
|
||||
#define R_DX register_d.I16_reg.x_reg
|
||||
|
||||
/* 32 bit extended registers */
|
||||
#define R_EAX register_a.I32_reg.e_reg
|
||||
#define R_EBX register_b.I32_reg.e_reg
|
||||
#define R_ECX register_c.I32_reg.e_reg
|
||||
#define R_EDX register_d.I32_reg.e_reg
|
||||
|
||||
/* special registers */
|
||||
#define R_SP register_sp.I16_reg.x_reg
|
||||
#define R_BP register_bp.I16_reg.x_reg
|
||||
#define R_SI register_si.I16_reg.x_reg
|
||||
#define R_DI register_di.I16_reg.x_reg
|
||||
#define R_IP register_ip.I16_reg.x_reg
|
||||
#define R_FLG register_flags
|
||||
|
||||
/* special registers */
|
||||
#define R_ESP register_sp.I32_reg.e_reg
|
||||
#define R_EBP register_bp.I32_reg.e_reg
|
||||
#define R_ESI register_si.I32_reg.e_reg
|
||||
#define R_EDI register_di.I32_reg.e_reg
|
||||
#define R_EIP register_ip.I32_reg.e_reg
|
||||
#define R_EFLG register_flags
|
||||
|
||||
/* segment registers */
|
||||
#define R_CS register_cs
|
||||
#define R_DS register_ds
|
||||
#define R_SS register_ss
|
||||
#define R_ES register_es
|
||||
#define R_FS register_fs
|
||||
#define R_GS register_gs
|
||||
|
||||
/* flag conditions */
|
||||
#define FB_CF 0x0001 /* CARRY flag */
|
||||
#define FB_PF 0x0004 /* PARITY flag */
|
||||
#define FB_AF 0x0010 /* AUX flag */
|
||||
#define FB_ZF 0x0040 /* ZERO flag */
|
||||
#define FB_SF 0x0080 /* SIGN flag */
|
||||
#define FB_TF 0x0100 /* TRAP flag */
|
||||
#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define FB_DF 0x0400 /* DIR flag */
|
||||
#define FB_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
/* 80286 and above always have bit#1 set */
|
||||
#define F_ALWAYS_ON (0x0002) /* flag bits always on */
|
||||
|
||||
/*
|
||||
* Define a mask for only those flag bits we will ever pass back
|
||||
* (via PUSHF)
|
||||
*/
|
||||
#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
|
||||
|
||||
/* following bits masked in to a 16bit quantity */
|
||||
|
||||
#define F_CF 0x0001 /* CARRY flag */
|
||||
#define F_PF 0x0004 /* PARITY flag */
|
||||
#define F_AF 0x0010 /* AUX flag */
|
||||
#define F_ZF 0x0040 /* ZERO flag */
|
||||
#define F_SF 0x0080 /* SIGN flag */
|
||||
#define F_TF 0x0100 /* TRAP flag */
|
||||
#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define F_DF 0x0400 /* DIR flag */
|
||||
#define F_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
#define SET_FLAG(flag) (emu->x86.R_FLG |= (flag))
|
||||
#define CLEAR_FLAG(flag) (emu->x86.R_FLG &= ~(flag))
|
||||
#define ACCESS_FLAG(flag) (emu->x86.R_FLG & (flag))
|
||||
#define CLEARALL_FLAG(m) (emu->x86.R_FLG = 0)
|
||||
|
||||
#define CONDITIONAL_SET_FLAG(COND,FLAG) \
|
||||
if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
|
||||
|
||||
#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
|
||||
#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
|
||||
#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
|
||||
|
||||
#define F_ALL_CALC 0xff0000 /* All have been calced */
|
||||
|
||||
/*
|
||||
* Emulator machine state.
|
||||
* Segment usage control.
|
||||
*/
|
||||
#define SYSMODE_SEG_DS_SS 0x00000001
|
||||
#define SYSMODE_SEGOVR_CS 0x00000002
|
||||
#define SYSMODE_SEGOVR_DS 0x00000004
|
||||
#define SYSMODE_SEGOVR_ES 0x00000008
|
||||
#define SYSMODE_SEGOVR_FS 0x00000010
|
||||
#define SYSMODE_SEGOVR_GS 0x00000020
|
||||
#define SYSMODE_SEGOVR_SS 0x00000040
|
||||
#define SYSMODE_PREFIX_REPE 0x00000080
|
||||
#define SYSMODE_PREFIX_REPNE 0x00000100
|
||||
#define SYSMODE_PREFIX_DATA 0x00000200
|
||||
#define SYSMODE_PREFIX_ADDR 0x00000400
|
||||
#define SYSMODE_INTR_PENDING 0x10000000
|
||||
#define SYSMODE_EXTRN_INTR 0x20000000
|
||||
#define SYSMODE_HALTED 0x40000000
|
||||
|
||||
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS)
|
||||
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS | \
|
||||
SYSMODE_PREFIX_DATA | \
|
||||
SYSMODE_PREFIX_ADDR)
|
||||
|
||||
#define INTR_SYNCH 0x1
|
||||
|
||||
#endif /* __X86EMU_REGS_H */
|
||||
@@ -1,99 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for system specific functions. These functions
|
||||
* are always compiled and linked in the OS depedent libraries,
|
||||
* and never in a binary portable driver.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/x86emui.h,v 1.4 2001/04/01 13:59:58 tsi Exp $ */
|
||||
|
||||
#ifndef __X86EMU_X86EMUI_H
|
||||
#define __X86EMU_X86EMUI_H
|
||||
|
||||
/*
|
||||
* If we are compiling in C++ mode, we can compile some functions as
|
||||
* inline to increase performance (however the code size increases quite
|
||||
* dramatically in this case).
|
||||
*/
|
||||
|
||||
#if defined(__cplusplus) && !defined(_NO_INLINE)
|
||||
#define _INLINE inline
|
||||
#else
|
||||
#define _INLINE static
|
||||
#endif
|
||||
|
||||
/* Get rid of unused parameters in C++ compilation mode */
|
||||
|
||||
#ifdef __cplusplus
|
||||
#define X86EMU_UNUSED(v)
|
||||
#else
|
||||
#define X86EMU_UNUSED(v) v
|
||||
#endif
|
||||
|
||||
#include "radeonfb.h"
|
||||
|
||||
#include "x86emu.h"
|
||||
#include "x86regs.h"
|
||||
#include "x86decode.h"
|
||||
#include "x86ops.h"
|
||||
#include "x86prim_ops.h"
|
||||
#include "x86fpu.h"
|
||||
|
||||
/*--------------------------- Inline Functions ----------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
extern uint8_t (X86APIP sys_rdb)(uint32_t addr);
|
||||
extern uint16_t (X86APIP sys_rdw)(uint32_t addr);
|
||||
extern uint32_t (X86APIP sys_rdl)(uint32_t addr);
|
||||
extern void (X86APIP sys_wrb)(uint32_t addr,uint8_t val);
|
||||
extern void (X86APIP sys_wrw)(uint32_t addr,uint16_t val);
|
||||
extern void (X86APIP sys_wrl)(uint32_t addr,uint32_t val);
|
||||
|
||||
extern uint8_t (X86APIP sys_inb)(X86EMU_pioAddr addr);
|
||||
extern uint16_t (X86APIP sys_inw)(X86EMU_pioAddr addr);
|
||||
extern uint32_t (X86APIP sys_inl)(X86EMU_pioAddr addr);
|
||||
extern void (X86APIP sys_outb)(X86EMU_pioAddr addr,uint8_t val);
|
||||
extern void (X86APIP sys_outw)(X86EMU_pioAddr addr,uint16_t val);
|
||||
extern void (X86APIP sys_outl)(X86EMU_pioAddr addr,uint32_t val);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_X86EMUI_H */
|
||||
@@ -1,61 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for FPU instruction decoding.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_FPU_H
|
||||
#define __X86EMU_FPU_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
/* these have to be defined, whether 8087 support compiled in or not. */
|
||||
|
||||
extern void x86emuOp_esc_coprocess_d8 (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_d9 (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_da (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_db (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_dc (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_dd (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_de (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_df (uint8_t op1);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_FPU_H */
|
||||
@@ -1,116 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for FPU register definitions.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_FPU_REGS_H
|
||||
#define __X86EMU_FPU_REGS_H
|
||||
|
||||
#ifdef X86_FPU_SUPPORT
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* Basic 8087 register can hold any of the following values: */
|
||||
|
||||
union x86_fpu_reg_u {
|
||||
s8 tenbytes[10];
|
||||
double dval;
|
||||
float fval;
|
||||
s16 sval;
|
||||
s32 lval;
|
||||
};
|
||||
|
||||
struct x86_fpu_reg {
|
||||
union x86_fpu_reg_u reg;
|
||||
char tag;
|
||||
};
|
||||
|
||||
/*
|
||||
* Since we are not going to worry about the problems of aliasing
|
||||
* registers, every time a register is modified, its result type is
|
||||
* set in the tag fields for that register. If some operation
|
||||
* attempts to access the type in a way inconsistent with its current
|
||||
* storage format, then we flag the operation. If common, we'll
|
||||
* attempt the conversion.
|
||||
*/
|
||||
|
||||
#define X86_FPU_VALID 0x80
|
||||
#define X86_FPU_REGTYP(r) ((r) & 0x7F)
|
||||
|
||||
#define X86_FPU_WORD 0x0
|
||||
#define X86_FPU_SHORT 0x1
|
||||
#define X86_FPU_LONG 0x2
|
||||
#define X86_FPU_FLOAT 0x3
|
||||
#define X86_FPU_DOUBLE 0x4
|
||||
#define X86_FPU_LDBL 0x5
|
||||
#define X86_FPU_BSD 0x6
|
||||
|
||||
#define X86_FPU_STKTOP 0
|
||||
|
||||
struct x86_fpu_registers
|
||||
{
|
||||
struct x86_fpu_reg x86_fpu_stack[8];
|
||||
int x86_fpu_flags;
|
||||
int x86_fpu_config; /* rounding modes, etc. */
|
||||
short x86_fpu_tos, x86_fpu_bos;
|
||||
};
|
||||
|
||||
#pragma pack()
|
||||
|
||||
/*
|
||||
* There are two versions of the following macro.
|
||||
*
|
||||
* One version is for opcode D9, for which there are more than 32
|
||||
* instructions encoded in the second byte of the opcode.
|
||||
*
|
||||
* The other version, deals with all the other 7 i87 opcodes, for
|
||||
* which there are only 32 strings needed to describe the
|
||||
* instructions.
|
||||
*/
|
||||
|
||||
#endif /* X86_FPU_SUPPORT */
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define DECODE_PRINTINSTR32(t, mod, rh, rl) \
|
||||
DECODE_PRINTF(t[(mod << 3) + (rh)]);
|
||||
#define DECODE_PRINTINSTR256(t, mod, rh, rl) \
|
||||
DECODE_PRINTF(t[(mod << 6) + (rh << 3) + (rl)]);
|
||||
#else
|
||||
#define DECODE_PRINTINSTR32(t,mod,rh,rl)
|
||||
#define DECODE_PRINTINSTR256(t,mod,rh,rl)
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_FPU_REGS_H */
|
||||
@@ -1,45 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for operand decoding functions.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_OPS_H
|
||||
#define __X86EMU_OPS_H
|
||||
|
||||
extern void (*x86emu_optab[0x100])(uint8_t op1);
|
||||
extern void (*x86emu_optab2[0x100])(uint8_t op2);
|
||||
|
||||
#endif /* __X86EMU_OPS_H */
|
||||
@@ -2,28 +2,50 @@
|
||||
#define PCI_BIOS_H
|
||||
|
||||
enum {
|
||||
PCI_BIOS_PRESENT = 0xB101,
|
||||
FIND_PCI_DEVICE = 0xB102,
|
||||
FIND_PCI_CLASS_CODE = 0xB103,
|
||||
PCI_BIOS_PRESENT = 0xB101,
|
||||
FIND_PCI_DEVICE = 0xB102,
|
||||
FIND_PCI_CLASS_CODE = 0xB103,
|
||||
GENERATE_SPECIAL_CYCLE = 0xB106,
|
||||
READ_CONFIG_BYTE = 0xB108,
|
||||
READ_CONFIG_WORD = 0xB109,
|
||||
READ_CONFIG_DWORD = 0xB10A,
|
||||
WRITE_CONFIG_BYTE = 0xB10B,
|
||||
WRITE_CONFIG_WORD = 0xB10C,
|
||||
WRITE_CONFIG_DWORD = 0xB10D,
|
||||
READ_CONFIG_BYTE = 0xB108,
|
||||
READ_CONFIG_WORD = 0xB109,
|
||||
READ_CONFIG_DWORD = 0xB10A,
|
||||
WRITE_CONFIG_BYTE = 0xB10B,
|
||||
WRITE_CONFIG_WORD = 0xB10C,
|
||||
WRITE_CONFIG_DWORD = 0xB10D,
|
||||
GET_IRQ_ROUTING_OPTIONS = 0xB10E,
|
||||
SET_PCI_IRQ = 0xB10F
|
||||
SET_PCI_IRQ = 0xB10F
|
||||
};
|
||||
|
||||
enum {
|
||||
SUCCESSFUL = 0x00,
|
||||
SUCCESSFUL = 0x00,
|
||||
FUNC_NOT_SUPPORTED = 0x81,
|
||||
BAD_VENDOR_ID = 0x83,
|
||||
DEVICE_NOT_FOUND = 0x86,
|
||||
BAD_REGISTER_NUMBER = 0x87,
|
||||
SET_FAILED = 0x88,
|
||||
SET_FAILED = 0x88,
|
||||
BUFFER_TOO_SMALL = 0x89
|
||||
};
|
||||
|
||||
extern int x86_pcibios_handler(struct X86EMU *emu);
|
||||
|
||||
|
||||
#define USE_SDRAM
|
||||
#define DIRECT_ACCESS
|
||||
|
||||
#define MEM_WB(where, what) emu->emu_wrb(emu, where, what)
|
||||
#define MEM_WW(where, what) emu->emu_wrw(emu, where, what)
|
||||
#define MEM_WL(where, what) emu->emu_wrl(emu, where, what)
|
||||
|
||||
#define MEM_RB(where) emu->emu_rdb(emu, where)
|
||||
#define MEM_RW(where) emu->emu_rdw(emu, where)
|
||||
#define MEM_RL(where) emu->emu_rdl(emu, where)
|
||||
|
||||
#define PCI_VGA_RAM_IMAGE_START 0xC0000
|
||||
#define PCI_RAM_IMAGE_START 0xD0000
|
||||
#define SYS_BIOS 0xF0000
|
||||
#define SIZE_EMU 0x100000
|
||||
#define BIOS_MEM 0x0UL
|
||||
|
||||
|
||||
#endif /* PCI_BIOS_H */
|
||||
|
||||
|
||||
@@ -1,971 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: Watcom C++ 10.6 or later
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Inline assembler versions of the primitive operand
|
||||
* functions for faster performance. At the moment this is
|
||||
* x86 inline assembler, but these functions could be replaced
|
||||
* with native inline assembler for each supported processor
|
||||
* platform.
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/prim_asm.h,v 1.3 2000/04/19 15:48:15 tsi Exp $ */
|
||||
|
||||
#ifndef __X86EMU_PRIM_ASM_H
|
||||
#define __X86EMU_PRIM_ASM_H
|
||||
|
||||
#ifdef __WATCOMC__
|
||||
|
||||
#ifndef VALIDATE
|
||||
#define __HAVE_INLINE_ASSEMBLER__
|
||||
#endif
|
||||
|
||||
u32 get_flags_asm(void);
|
||||
#pragma aux get_flags_asm = \
|
||||
"pushf" \
|
||||
"pop eax" \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u16 aaa_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux aaa_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aaa" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u16 aas_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux aas_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aas" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u16 aad_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux aad_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aad" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u16 aam_word_asm(u32 *flags,u8 d);
|
||||
#pragma aux aam_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aam" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u8 adc_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux adc_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"adc al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 adc_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux adc_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"adc ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 adc_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux adc_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"adc eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 add_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux add_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"add al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 add_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux add_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"add ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 add_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux add_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"add eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 and_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux and_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"and al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 and_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux and_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"and ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 and_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux and_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"and eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 cmp_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux cmp_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"cmp al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 cmp_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux cmp_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"cmp ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 cmp_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux cmp_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"cmp eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 daa_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux daa_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"daa" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u8 das_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux das_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"das" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u8 dec_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux dec_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"dec al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 dec_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux dec_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"dec ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 dec_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux dec_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"dec eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 inc_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux inc_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"inc al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 inc_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux inc_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"inc ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 inc_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux inc_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"inc eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 or_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux or_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"or al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 or_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux or_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"or ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 or_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux or_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"or eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 neg_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux neg_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"neg al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 neg_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux neg_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"neg ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 neg_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux neg_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"neg eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 not_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux not_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"not al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 not_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux not_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"not ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 not_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux not_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"not eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 rcl_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux rcl_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcl al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 rcl_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux rcl_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcl ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 rcl_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux rcl_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcl eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 rcr_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux rcr_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcr al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 rcr_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux rcr_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcr ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 rcr_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux rcr_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcr eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 rol_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux rol_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rol al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 rol_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux rol_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rol ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 rol_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux rol_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rol eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 ror_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux ror_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"ror al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 ror_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux ror_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"ror ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 ror_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux ror_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"ror eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 shl_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux shl_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shl al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 shl_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux shl_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shl ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 shl_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux shl_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shl eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 shr_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux shr_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shr al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 shr_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux shr_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shr ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 shr_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux shr_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shr eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 sar_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux sar_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sar al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 sar_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux sar_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sar ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 sar_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux sar_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sar eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u16 shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
|
||||
#pragma aux shld_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shld ax,dx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [dx] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax dx cl];
|
||||
|
||||
u32 shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
|
||||
#pragma aux shld_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shld eax,edx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [edx] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax edx cl];
|
||||
|
||||
u16 shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
|
||||
#pragma aux shrd_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shrd ax,dx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [dx] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax dx cl];
|
||||
|
||||
u32 shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
|
||||
#pragma aux shrd_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shrd eax,edx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [edx] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax edx cl];
|
||||
|
||||
u8 sbb_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux sbb_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sbb al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 sbb_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux sbb_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sbb ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 sbb_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux sbb_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sbb eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 sub_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux sub_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sub al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 sub_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux sub_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sub ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 sub_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux sub_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sub eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
void test_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux test_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"test al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
modify exact [al bl];
|
||||
|
||||
void test_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux test_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"test ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
modify exact [ax bx];
|
||||
|
||||
void test_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux test_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"test eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 xor_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux xor_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"xor al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 xor_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux xor_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"xor ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 xor_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux xor_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"xor eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
void imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
|
||||
#pragma aux imul_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"imul bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
parm [edi] [esi] [al] [bl] \
|
||||
modify exact [esi ax bl];
|
||||
|
||||
void imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
|
||||
#pragma aux imul_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"imul bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [bx]\
|
||||
modify exact [esi edi ax bx dx];
|
||||
|
||||
void imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
|
||||
#pragma aux imul_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"imul ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [ebx] \
|
||||
modify exact [esi edi eax ebx edx];
|
||||
|
||||
void mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
|
||||
#pragma aux mul_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"mul bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
parm [edi] [esi] [al] [bl] \
|
||||
modify exact [esi ax bl];
|
||||
|
||||
void mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
|
||||
#pragma aux mul_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"mul bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [bx]\
|
||||
modify exact [esi edi ax bx dx];
|
||||
|
||||
void mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
|
||||
#pragma aux mul_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"mul ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [ebx] \
|
||||
modify exact [esi edi eax ebx edx];
|
||||
|
||||
void idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
|
||||
#pragma aux idiv_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"idiv bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],al" \
|
||||
"mov [ecx],ah" \
|
||||
parm [edi] [esi] [ecx] [ax] [bl]\
|
||||
modify exact [esi edi ax bl];
|
||||
|
||||
void idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
|
||||
#pragma aux idiv_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"idiv bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [dx] [bx]\
|
||||
modify exact [esi edi ax dx bx];
|
||||
|
||||
void idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
|
||||
#pragma aux idiv_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"idiv ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
|
||||
modify exact [esi edi eax edx ebx];
|
||||
|
||||
void div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
|
||||
#pragma aux div_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"div bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],al" \
|
||||
"mov [ecx],ah" \
|
||||
parm [edi] [esi] [ecx] [ax] [bl]\
|
||||
modify exact [esi edi ax bl];
|
||||
|
||||
void div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
|
||||
#pragma aux div_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"div bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [dx] [bx]\
|
||||
modify exact [esi edi ax dx bx];
|
||||
|
||||
void div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
|
||||
#pragma aux div_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"div ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
|
||||
modify exact [esi edi eax edx ebx];
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_PRIM_ASM_H */
|
||||
@@ -1,232 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for primitive operation functions.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_PRIM_OPS_H
|
||||
#define __X86EMU_PRIM_OPS_H
|
||||
|
||||
#include "x86prim_asm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
uint16_t aaa_word (uint16_t d);
|
||||
uint16_t aas_word (uint16_t d);
|
||||
uint16_t aad_word (uint16_t d);
|
||||
uint16_t aam_word (uint8_t d);
|
||||
uint8_t adc_byte (uint8_t d, uint8_t s);
|
||||
uint16_t adc_word (uint16_t d, uint16_t s);
|
||||
uint32_t adc_long (uint32_t d, uint32_t s);
|
||||
uint8_t add_byte (uint8_t d, uint8_t s);
|
||||
uint16_t add_word (uint16_t d, uint16_t s);
|
||||
uint32_t add_long (uint32_t d, uint32_t s);
|
||||
uint8_t and_byte (uint8_t d, uint8_t s);
|
||||
uint16_t and_word (uint16_t d, uint16_t s);
|
||||
uint32_t and_long (uint32_t d, uint32_t s);
|
||||
uint8_t cmp_byte (uint8_t d, uint8_t s);
|
||||
uint16_t cmp_word (uint16_t d, uint16_t s);
|
||||
uint32_t cmp_long (uint32_t d, uint32_t s);
|
||||
uint8_t daa_byte (uint8_t d);
|
||||
uint8_t das_byte (uint8_t d);
|
||||
uint8_t dec_byte (uint8_t d);
|
||||
uint16_t dec_word (uint16_t d);
|
||||
uint32_t dec_long (uint32_t d);
|
||||
uint8_t inc_byte (uint8_t d);
|
||||
uint16_t inc_word (uint16_t d);
|
||||
uint32_t inc_long (uint32_t d);
|
||||
uint8_t or_byte (uint8_t d, uint8_t s);
|
||||
uint16_t or_word (uint16_t d, uint16_t s);
|
||||
uint32_t or_long (uint32_t d, uint32_t s);
|
||||
uint8_t neg_byte (uint8_t s);
|
||||
uint16_t neg_word (uint16_t s);
|
||||
uint32_t neg_long (uint32_t s);
|
||||
uint8_t not_byte (uint8_t s);
|
||||
uint16_t not_word (uint16_t s);
|
||||
uint32_t not_long (uint32_t s);
|
||||
uint8_t rcl_byte (uint8_t d, uint8_t s);
|
||||
uint16_t rcl_word (uint16_t d, uint8_t s);
|
||||
uint32_t rcl_long (uint32_t d, uint8_t s);
|
||||
uint8_t rcr_byte (uint8_t d, uint8_t s);
|
||||
uint16_t rcr_word (uint16_t d, uint8_t s);
|
||||
uint32_t rcr_long (uint32_t d, uint8_t s);
|
||||
uint8_t rol_byte (uint8_t d, uint8_t s);
|
||||
uint16_t rol_word (uint16_t d, uint8_t s);
|
||||
uint32_t rol_long (uint32_t d, uint8_t s);
|
||||
uint8_t ror_byte (uint8_t d, uint8_t s);
|
||||
uint16_t ror_word (uint16_t d, uint8_t s);
|
||||
uint32_t ror_long (uint32_t d, uint8_t s);
|
||||
uint8_t shl_byte (uint8_t d, uint8_t s);
|
||||
uint16_t shl_word (uint16_t d, uint8_t s);
|
||||
uint32_t shl_long (uint32_t d, uint8_t s);
|
||||
uint8_t shr_byte (uint8_t d, uint8_t s);
|
||||
uint16_t shr_word (uint16_t d, uint8_t s);
|
||||
uint32_t shr_long (uint32_t d, uint8_t s);
|
||||
uint8_t sar_byte (uint8_t d, uint8_t s);
|
||||
uint16_t sar_word (uint16_t d, uint8_t s);
|
||||
uint32_t sar_long (uint32_t d, uint8_t s);
|
||||
uint16_t shld_word (uint16_t d, uint16_t fill, uint8_t s);
|
||||
uint32_t shld_long (uint32_t d, uint32_t fill, uint8_t s);
|
||||
uint16_t shrd_word (uint16_t d, uint16_t fill, uint8_t s);
|
||||
uint32_t shrd_long (uint32_t d, uint32_t fill, uint8_t s);
|
||||
uint8_t sbb_byte (uint8_t d, uint8_t s);
|
||||
uint16_t sbb_word (uint16_t d, uint16_t s);
|
||||
uint32_t sbb_long (uint32_t d, uint32_t s);
|
||||
uint8_t sub_byte (uint8_t d, uint8_t s);
|
||||
uint16_t sub_word (uint16_t d, uint16_t s);
|
||||
uint32_t sub_long (uint32_t d, uint32_t s);
|
||||
void test_byte (uint8_t d, uint8_t s);
|
||||
void test_word (uint16_t d, uint16_t s);
|
||||
void test_long (uint32_t d, uint32_t s);
|
||||
uint8_t xor_byte (uint8_t d, uint8_t s);
|
||||
uint16_t xor_word (uint16_t d, uint16_t s);
|
||||
uint32_t xor_long (uint32_t d, uint32_t s);
|
||||
void imul_byte (uint8_t s);
|
||||
void imul_word (uint16_t s);
|
||||
void imul_long (uint32_t s);
|
||||
void imul_long_direct(uint32_t *res_lo, uint32_t* res_hi,uint32_t d, uint32_t s);
|
||||
void mul_byte (uint8_t s);
|
||||
void mul_word (uint16_t s);
|
||||
void mul_long (uint32_t s);
|
||||
void idiv_byte (uint8_t s);
|
||||
void idiv_word (uint16_t s);
|
||||
void idiv_long (uint32_t s);
|
||||
void div_byte (uint8_t s);
|
||||
void div_word (uint16_t s);
|
||||
void div_long (uint32_t s);
|
||||
void ins (int size);
|
||||
void outs (int size);
|
||||
uint16_t mem_access_word (int addr);
|
||||
void push_word (uint16_t w);
|
||||
void push_long (uint32_t w);
|
||||
uint16_t pop_word (void);
|
||||
uint32_t pop_long (void);
|
||||
|
||||
|
||||
#if defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM)
|
||||
|
||||
#define aaa_word(d) aaa_word_asm(&M.x86.R_EFLG,d)
|
||||
#define aas_word(d) aas_word_asm(&M.x86.R_EFLG,d)
|
||||
#define aad_word(d) aad_word_asm(&M.x86.R_EFLG,d)
|
||||
#define aam_word(d) aam_word_asm(&M.x86.R_EFLG,d)
|
||||
#define adc_byte(d,s) adc_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define adc_word(d,s) adc_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define adc_long(d,s) adc_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define add_byte(d,s) add_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define add_word(d,s) add_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define add_long(d,s) add_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define and_byte(d,s) and_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define and_word(d,s) and_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define and_long(d,s) and_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define cmp_byte(d,s) cmp_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define cmp_word(d,s) cmp_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define cmp_long(d,s) cmp_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define daa_byte(d) daa_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define das_byte(d) das_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define dec_byte(d) dec_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define dec_word(d) dec_word_asm(&M.x86.R_EFLG,d)
|
||||
#define dec_long(d) dec_long_asm(&M.x86.R_EFLG,d)
|
||||
#define inc_byte(d) inc_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define inc_word(d) inc_word_asm(&M.x86.R_EFLG,d)
|
||||
#define inc_long(d) inc_long_asm(&M.x86.R_EFLG,d)
|
||||
#define or_byte(d,s) or_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define or_word(d,s) or_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define or_long(d,s) or_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define neg_byte(s) neg_byte_asm(&M.x86.R_EFLG,s)
|
||||
#define neg_word(s) neg_word_asm(&M.x86.R_EFLG,s)
|
||||
#define neg_long(s) neg_long_asm(&M.x86.R_EFLG,s)
|
||||
#define not_byte(s) not_byte_asm(&M.x86.R_EFLG,s)
|
||||
#define not_word(s) not_word_asm(&M.x86.R_EFLG,s)
|
||||
#define not_long(s) not_long_asm(&M.x86.R_EFLG,s)
|
||||
#define rcl_byte(d,s) rcl_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcl_word(d,s) rcl_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcl_long(d,s) rcl_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcr_byte(d,s) rcr_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcr_word(d,s) rcr_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcr_long(d,s) rcr_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rol_byte(d,s) rol_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rol_word(d,s) rol_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rol_long(d,s) rol_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define ror_byte(d,s) ror_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define ror_word(d,s) ror_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define ror_long(d,s) ror_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shl_byte(d,s) shl_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shl_word(d,s) shl_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shl_long(d,s) shl_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shr_byte(d,s) shr_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shr_word(d,s) shr_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shr_long(d,s) shr_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sar_byte(d,s) sar_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sar_word(d,s) sar_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sar_long(d,s) sar_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shld_word(d,fill,s) shld_word_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define shld_long(d,fill,s) shld_long_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define shrd_word(d,fill,s) shrd_word_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define shrd_long(d,fill,s) shrd_long_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define sbb_byte(d,s) sbb_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sbb_word(d,s) sbb_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sbb_long(d,s) sbb_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sub_byte(d,s) sub_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sub_word(d,s) sub_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sub_long(d,s) sub_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define test_byte(d,s) test_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define test_word(d,s) test_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define test_long(d,s) test_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define xor_byte(d,s) xor_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define xor_word(d,s) xor_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define xor_long(d,s) xor_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define imul_byte(s) imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
|
||||
#define imul_word(s) imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
|
||||
#define imul_long(s) imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
|
||||
#define imul_long_direct(res_lo,res_hi,d,s) imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s)
|
||||
#define mul_byte(s) mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
|
||||
#define mul_word(s) mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
|
||||
#define mul_long(s) mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
|
||||
#define idiv_byte(s) idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
|
||||
#define idiv_word(s) idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
|
||||
#define idiv_long(s) idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
|
||||
#define div_byte(s) div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
|
||||
#define div_word(s) div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
|
||||
#define div_long(s) div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_PRIM_OPS_H */
|
||||
@@ -1,358 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for x86 register definitions.
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/include/x86emu/regs.h,v 1.3 2001/10/28 03:32:25 tsi Exp $ */
|
||||
|
||||
#ifndef __X86EMU_REGS_H
|
||||
#define __X86EMU_REGS_H
|
||||
#include "x86debug.h"
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
//#pragma pack(1)
|
||||
|
||||
/*
|
||||
* General EAX, EBX, ECX, EDX type registers. Note that for
|
||||
* portability, and speed, the issue of byte swapping is not addressed
|
||||
* in the registers. All registers are stored in the default format
|
||||
* available on the host machine. The only critical issue is that the
|
||||
* registers should line up EXACTLY in the same manner as they do in
|
||||
* the 386. That is:
|
||||
*
|
||||
* EAX & 0xff === AL
|
||||
* EAX & 0xffff == AX
|
||||
*
|
||||
* etc. The result is that alot of the calculations can then be
|
||||
* done using the native instruction set fully.
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
uint32_t e_reg;
|
||||
} I32_reg_t;
|
||||
|
||||
typedef struct {
|
||||
uint16_t filler0, x_reg;
|
||||
} I16_reg_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t filler0, filler1, h_reg, l_reg;
|
||||
} I8_reg_t;
|
||||
|
||||
typedef union {
|
||||
I32_reg_t I32_reg;
|
||||
I16_reg_t I16_reg;
|
||||
I8_reg_t I8_reg;
|
||||
} i386_general_register;
|
||||
|
||||
struct i386_general_regs {
|
||||
i386_general_register A, B, C, D;
|
||||
};
|
||||
|
||||
typedef struct i386_general_regs Gen_reg_t;
|
||||
|
||||
struct i386_special_regs {
|
||||
i386_general_register SP, BP, SI, DI, IP;
|
||||
uint32_t FLAGS;
|
||||
};
|
||||
|
||||
/*
|
||||
* Segment registers here represent the 16 bit quantities
|
||||
* CS, DS, ES, SS.
|
||||
*/
|
||||
|
||||
struct i386_segment_regs {
|
||||
uint16_t CS, DS, SS, ES, FS, GS;
|
||||
};
|
||||
|
||||
/* 8 bit registers */
|
||||
#define R_AH gen.A.I8_reg.h_reg
|
||||
#define R_AL gen.A.I8_reg.l_reg
|
||||
#define R_BH gen.B.I8_reg.h_reg
|
||||
#define R_BL gen.B.I8_reg.l_reg
|
||||
#define R_CH gen.C.I8_reg.h_reg
|
||||
#define R_CL gen.C.I8_reg.l_reg
|
||||
#define R_DH gen.D.I8_reg.h_reg
|
||||
#define R_DL gen.D.I8_reg.l_reg
|
||||
|
||||
/* 16 bit registers */
|
||||
#define R_AX gen.A.I16_reg.x_reg
|
||||
#define R_BX gen.B.I16_reg.x_reg
|
||||
#define R_CX gen.C.I16_reg.x_reg
|
||||
#define R_DX gen.D.I16_reg.x_reg
|
||||
|
||||
/* 32 bit extended registers */
|
||||
#define R_EAX gen.A.I32_reg.e_reg
|
||||
#define R_EBX gen.B.I32_reg.e_reg
|
||||
#define R_ECX gen.C.I32_reg.e_reg
|
||||
#define R_EDX gen.D.I32_reg.e_reg
|
||||
|
||||
/* special registers */
|
||||
#define R_SP spc.SP.I16_reg.x_reg
|
||||
#define R_BP spc.BP.I16_reg.x_reg
|
||||
#define R_SI spc.SI.I16_reg.x_reg
|
||||
#define R_DI spc.DI.I16_reg.x_reg
|
||||
#define R_IP spc.IP.I16_reg.x_reg
|
||||
#define R_FLG spc.FLAGS
|
||||
|
||||
/* special registers */
|
||||
#define R_SP spc.SP.I16_reg.x_reg
|
||||
#define R_BP spc.BP.I16_reg.x_reg
|
||||
#define R_SI spc.SI.I16_reg.x_reg
|
||||
#define R_DI spc.DI.I16_reg.x_reg
|
||||
#define R_IP spc.IP.I16_reg.x_reg
|
||||
#define R_FLG spc.FLAGS
|
||||
|
||||
/* special registers */
|
||||
#define R_ESP spc.SP.I32_reg.e_reg
|
||||
#define R_EBP spc.BP.I32_reg.e_reg
|
||||
#define R_ESI spc.SI.I32_reg.e_reg
|
||||
#define R_EDI spc.DI.I32_reg.e_reg
|
||||
#define R_EIP spc.IP.I32_reg.e_reg
|
||||
#define R_EFLG spc.FLAGS
|
||||
|
||||
/* segment registers */
|
||||
#define R_CS seg.CS
|
||||
#define R_DS seg.DS
|
||||
#define R_SS seg.SS
|
||||
#define R_ES seg.ES
|
||||
#define R_FS seg.FS
|
||||
#define R_GS seg.GS
|
||||
|
||||
/* flag conditions */
|
||||
#define FB_CF 0x0001 /* CARRY flag */
|
||||
#define FB_PF 0x0004 /* PARITY flag */
|
||||
#define FB_AF 0x0010 /* AUX flag */
|
||||
#define FB_ZF 0x0040 /* ZERO flag */
|
||||
#define FB_SF 0x0080 /* SIGN flag */
|
||||
#define FB_TF 0x0100 /* TRAP flag */
|
||||
#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define FB_DF 0x0400 /* DIR flag */
|
||||
#define FB_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
/* 80286 and above always have bit#1 set */
|
||||
#define F_ALWAYS_ON (0x0002) /* flag bits always on */
|
||||
|
||||
/*
|
||||
* Define a mask for only those flag bits we will ever pass back
|
||||
* (via PUSHF)
|
||||
*/
|
||||
#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
|
||||
|
||||
/* following bits masked in to a 16bit quantity */
|
||||
|
||||
#define F_CF 0x0001 /* CARRY flag */
|
||||
#define F_PF 0x0004 /* PARITY flag */
|
||||
#define F_AF 0x0010 /* AUX flag */
|
||||
#define F_ZF 0x0040 /* ZERO flag */
|
||||
#define F_SF 0x0080 /* SIGN flag */
|
||||
#define F_TF 0x0100 /* TRAP flag */
|
||||
#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define F_DF 0x0400 /* DIR flag */
|
||||
#define F_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
|
||||
#define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
|
||||
#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
|
||||
#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
|
||||
#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
|
||||
|
||||
#define CONDITIONAL_SET_FLAG(COND,FLAG) \
|
||||
if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
|
||||
|
||||
#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
|
||||
#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
|
||||
#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
|
||||
|
||||
#define F_ALL_CALC 0xff0000 /* All have been calced */
|
||||
|
||||
/*
|
||||
* Emulator machine state.
|
||||
* Segment usage control.
|
||||
*/
|
||||
#define SYSMODE_SEG_DS_SS 0x00000001
|
||||
#define SYSMODE_SEGOVR_CS 0x00000002
|
||||
#define SYSMODE_SEGOVR_DS 0x00000004
|
||||
#define SYSMODE_SEGOVR_ES 0x00000008
|
||||
#define SYSMODE_SEGOVR_FS 0x00000010
|
||||
#define SYSMODE_SEGOVR_GS 0x00000020
|
||||
#define SYSMODE_SEGOVR_SS 0x00000040
|
||||
#define SYSMODE_PREFIX_REPE 0x00000080
|
||||
#define SYSMODE_PREFIX_REPNE 0x00000100
|
||||
#define SYSMODE_PREFIX_DATA 0x00000200
|
||||
#define SYSMODE_PREFIX_ADDR 0x00000400
|
||||
#define SYSMODE_INTR_PENDING 0x10000000
|
||||
#define SYSMODE_EXTRN_INTR 0x20000000
|
||||
#define SYSMODE_HALTED 0x40000000
|
||||
|
||||
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS)
|
||||
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS | \
|
||||
SYSMODE_PREFIX_DATA | \
|
||||
SYSMODE_PREFIX_ADDR)
|
||||
|
||||
#define INTR_SYNCH 0x1
|
||||
#define INTR_ASYNCH 0x2
|
||||
#define INTR_HALTED 0x4
|
||||
|
||||
typedef struct {
|
||||
struct i386_general_regs gen;
|
||||
struct i386_special_regs spc;
|
||||
struct i386_segment_regs seg;
|
||||
/*
|
||||
* MODE contains information on:
|
||||
* REPE prefix 2 bits repe,repne
|
||||
* SEGMENT overrides 5 bits normal,DS,SS,CS,ES
|
||||
* Delayed flag set 3 bits (zero, signed, parity)
|
||||
* reserved 6 bits
|
||||
* interrupt # 8 bits instruction raised interrupt
|
||||
* BIOS video segregs 4 bits
|
||||
* Interrupt Pending 1 bits
|
||||
* Extern interrupt 1 bits
|
||||
* Halted 1 bits
|
||||
*/
|
||||
uint32_t mode;
|
||||
volatile int intr; /* mask of pending interrupts */
|
||||
int debug;
|
||||
#ifdef DBG_X86EMU
|
||||
int check;
|
||||
uint16_t saved_ip;
|
||||
uint16_t saved_cs;
|
||||
int enc_pos;
|
||||
int enc_str_pos;
|
||||
// char decode_buf[32]; /* encoded byte stream */
|
||||
char decoded_buf[256]; /* disassembled strings */
|
||||
#endif
|
||||
uint8_t intno;
|
||||
uint8_t __pad[3];
|
||||
} X86EMU_regs;
|
||||
|
||||
/****************************************************************************
|
||||
REMARKS:
|
||||
Structure maintaining the emulator machine state.
|
||||
|
||||
MEMBERS:
|
||||
mem_base - Base real mode memory for the emulator
|
||||
abseg - Base for the absegment
|
||||
mem_size - Size of the real mode memory block for the emulator
|
||||
private - private data pointer
|
||||
x86 - X86 registers
|
||||
****************************************************************************/
|
||||
typedef struct
|
||||
{
|
||||
unsigned long mem_base;
|
||||
unsigned long mem_size;
|
||||
unsigned long abseg;
|
||||
void* private;
|
||||
X86EMU_regs x86;
|
||||
} X86EMU_sysEnv;
|
||||
|
||||
//#pragma pack()
|
||||
|
||||
/*----------------------------- Global Variables --------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
/* Global emulator machine state.
|
||||
*
|
||||
* We keep it global to avoid pointer dereferences in the code for speed.
|
||||
*/
|
||||
|
||||
extern X86EMU_sysEnv _X86EMU_env;
|
||||
|
||||
#define M _X86EMU_env
|
||||
|
||||
#define X86_EAX M.x86.R_EAX
|
||||
#define X86_EBX M.x86.R_EBX
|
||||
#define X86_ECX M.x86.R_ECX
|
||||
#define X86_EDX M.x86.R_EDX
|
||||
#define X86_ESI M.x86.R_ESI
|
||||
#define X86_EDI M.x86.R_EDI
|
||||
#define X86_EBP M.x86.R_EBP
|
||||
#define X86_EIP M.x86.R_EIP
|
||||
#define X86_ESP M.x86.R_ESP
|
||||
#define X86_EFLAGS M.x86.R_EFLG
|
||||
|
||||
#define X86_FLAGS M.x86.R_FLG
|
||||
#define X86_AX M.x86.R_AX
|
||||
#define X86_BX M.x86.R_BX
|
||||
#define X86_CX M.x86.R_CX
|
||||
#define X86_DX M.x86.R_DX
|
||||
#define X86_SI M.x86.R_SI
|
||||
#define X86_DI M.x86.R_DI
|
||||
#define X86_BP M.x86.R_BP
|
||||
#define X86_IP M.x86.R_IP
|
||||
#define X86_SP M.x86.R_SP
|
||||
#define X86_CS M.x86.R_CS
|
||||
#define X86_DS M.x86.R_DS
|
||||
#define X86_ES M.x86.R_ES
|
||||
#define X86_SS M.x86.R_SS
|
||||
#define X86_FS M.x86.R_FS
|
||||
#define X86_GS M.x86.R_GS
|
||||
|
||||
#define X86_AL M.x86.R_AL
|
||||
#define X86_BL M.x86.R_BL
|
||||
#define X86_CL M.x86.R_CL
|
||||
#define X86_DL M.x86.R_DL
|
||||
|
||||
#define X86_AH M.x86.R_AH
|
||||
#define X86_BH M.x86.R_BH
|
||||
#define X86_CH M.x86.R_CH
|
||||
#define X86_DH M.x86.R_DH
|
||||
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
|
||||
/* Function to log information at runtime */
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_REGS_H */
|
||||
431
kbd/ikbd.c
431
kbd/ikbd.c
@@ -26,6 +26,8 @@
|
||||
//#include "hardware.h"
|
||||
#include "ikbd.h"
|
||||
|
||||
#include "debug.h"
|
||||
|
||||
// atari ikbd stuff
|
||||
#define IKBD_STATE_JOYSTICK_EVENT_REPORTING 0x01
|
||||
#define IKBD_STATE_MOUSE_Y_BOTTOM 0x02
|
||||
@@ -35,305 +37,316 @@
|
||||
|
||||
#define IKBD_DEFAULT IKBD_STATE_JOYSTICK_EVENT_REPORTING
|
||||
|
||||
#define QUEUE_LEN 16 // power of 2!
|
||||
#define QUEUE_LEN 16 // power of 2!
|
||||
static unsigned char tx_queue[QUEUE_LEN];
|
||||
static unsigned char wptr = 0, rptr = 0;
|
||||
|
||||
// structure to keep track of ikbd state
|
||||
static struct
|
||||
{
|
||||
unsigned char cmd;
|
||||
unsigned char state;
|
||||
unsigned char expect;
|
||||
unsigned char cmd;
|
||||
unsigned char state;
|
||||
unsigned char expect;
|
||||
|
||||
// joystick state
|
||||
unsigned char joystick[2];
|
||||
// joystick state
|
||||
unsigned char joystick[2];
|
||||
|
||||
// mouse state
|
||||
unsigned short mouse_pos_x, mouse_pos_y;
|
||||
unsigned char mouse_buttons;
|
||||
// mouse state
|
||||
unsigned short mouse_pos_x, mouse_pos_y;
|
||||
unsigned char mouse_buttons;
|
||||
} ikbd;
|
||||
|
||||
// #define IKBD_DEBUG
|
||||
|
||||
void ikbd_init()
|
||||
{
|
||||
// reset ikbd state
|
||||
memset(&ikbd, 0, sizeof(ikbd));
|
||||
ikbd.state = IKBD_DEFAULT;
|
||||
// reset ikbd state
|
||||
memset(&ikbd, 0, sizeof(ikbd));
|
||||
ikbd.state = IKBD_DEFAULT;
|
||||
}
|
||||
|
||||
static void enqueue(unsigned char b)
|
||||
{
|
||||
if (((wptr + 1)&(QUEUE_LEN-1)) == rptr)
|
||||
{
|
||||
xprintf("IKBD: !!!!!!! tx queue overflow !!!!!!!!!\n");
|
||||
return;
|
||||
}
|
||||
if (((wptr + 1)&(QUEUE_LEN-1)) == rptr)
|
||||
{
|
||||
xprintf("IKBD: !!!!!!! tx queue overflow !!!!!!!!!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
tx_queue[wptr] = b;
|
||||
wptr = (wptr + 1) & (QUEUE_LEN - 1);
|
||||
tx_queue[wptr] = b;
|
||||
wptr = (wptr + 1) & (QUEUE_LEN - 1);
|
||||
}
|
||||
|
||||
// convert internal joystick format into atari ikbd format
|
||||
static unsigned char joystick_map2ikbd(unsigned in)
|
||||
{
|
||||
unsigned char out = 0;
|
||||
unsigned char out = 0;
|
||||
|
||||
if (in & JOY_UP) out |= 0x01;
|
||||
if (in & JOY_DOWN) out |= 0x02;
|
||||
if (in & JOY_LEFT) out |= 0x04;
|
||||
if (in & JOY_RIGHT) out |= 0x08;
|
||||
if (in & JOY_BTN1) out |= 0x80;
|
||||
if (in & JOY_UP) out |= 0x01;
|
||||
if (in & JOY_DOWN) out |= 0x02;
|
||||
if (in & JOY_LEFT) out |= 0x04;
|
||||
if (in & JOY_RIGHT) out |= 0x08;
|
||||
if (in & JOY_BTN1) out |= 0x80;
|
||||
|
||||
return out;
|
||||
return out;
|
||||
}
|
||||
|
||||
// process inout from atari core into ikbd
|
||||
void ikbd_handle_input(unsigned char cmd)
|
||||
{
|
||||
// expecting a second byte for command
|
||||
if (ikbd.expect)
|
||||
{
|
||||
ikbd.expect--;
|
||||
// expecting a second byte for command
|
||||
if (ikbd.expect)
|
||||
{
|
||||
ikbd.expect--;
|
||||
|
||||
// last byte of command received
|
||||
if (!ikbd.expect)
|
||||
{
|
||||
switch(ikbd.cmd)
|
||||
{
|
||||
case 0x07: // set mouse button action
|
||||
xprintf("IKBD: mouse button action = %x\n", cmd);
|
||||
// last byte of command received
|
||||
if (!ikbd.expect)
|
||||
{
|
||||
switch(ikbd.cmd)
|
||||
{
|
||||
case 0x07: // set mouse button action
|
||||
xprintf("IKBD: mouse button action = %x\n", cmd);
|
||||
|
||||
// bit 2: Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
|
||||
if(cmd & 0x04) ikbd.state |= IKBD_STATE_MOUSE_BUTTON_AS_KEY;
|
||||
else ikbd.state &= ~IKBD_STATE_MOUSE_BUTTON_AS_KEY;
|
||||
// bit 2: Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
|
||||
if(cmd & 0x04) ikbd.state |= IKBD_STATE_MOUSE_BUTTON_AS_KEY;
|
||||
else ikbd.state &= ~IKBD_STATE_MOUSE_BUTTON_AS_KEY;
|
||||
|
||||
break;
|
||||
break;
|
||||
|
||||
case 0x80: // ibkd reset
|
||||
// reply "everything is ok"
|
||||
enqueue(0xf0);
|
||||
break;
|
||||
case 0x80: // ibkd reset
|
||||
// reply "everything is ok"
|
||||
enqueue(0xf0);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
ikbd.cmd = cmd;
|
||||
ikbd.cmd = cmd;
|
||||
|
||||
switch(cmd)
|
||||
{
|
||||
case 0x07:
|
||||
xprintf("IKBD: Set mouse button action");
|
||||
ikbd.expect = 1;
|
||||
break;
|
||||
switch(cmd)
|
||||
{
|
||||
case 0x07:
|
||||
xprintf("IKBD: Set mouse button action");
|
||||
ikbd.expect = 1;
|
||||
break;
|
||||
|
||||
case 0x08:
|
||||
xprintf("IKBD: Set relative mouse positioning");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_ABSOLUTE;
|
||||
break;
|
||||
case 0x08:
|
||||
xprintf("IKBD: Set relative mouse positioning");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_ABSOLUTE;
|
||||
break;
|
||||
|
||||
case 0x09:
|
||||
xprintf("IKBD: Set absolute mouse positioning");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
|
||||
ikbd.state |= IKBD_STATE_MOUSE_ABSOLUTE;
|
||||
ikbd.expect = 4;
|
||||
break;
|
||||
case 0x09:
|
||||
xprintf("IKBD: Set absolute mouse positioning");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
|
||||
ikbd.state |= IKBD_STATE_MOUSE_ABSOLUTE;
|
||||
ikbd.expect = 4;
|
||||
break;
|
||||
|
||||
case 0x0b:
|
||||
xprintf("IKBD: Set Mouse threshold");
|
||||
ikbd.expect = 2;
|
||||
break;
|
||||
case 0x0b:
|
||||
xprintf("IKBD: Set Mouse threshold");
|
||||
ikbd.expect = 2;
|
||||
break;
|
||||
|
||||
case 0x0f:
|
||||
xprintf("IKBD: Set Y at bottom");
|
||||
ikbd.state |= IKBD_STATE_MOUSE_Y_BOTTOM;
|
||||
break;
|
||||
case 0x0f:
|
||||
xprintf("IKBD: Set Y at bottom");
|
||||
ikbd.state |= IKBD_STATE_MOUSE_Y_BOTTOM;
|
||||
break;
|
||||
|
||||
case 0x10:
|
||||
xprintf("IKBD: Set Y at top");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_Y_BOTTOM;
|
||||
break;
|
||||
case 0x10:
|
||||
xprintf("IKBD: Set Y at top");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_Y_BOTTOM;
|
||||
break;
|
||||
|
||||
case 0x12:
|
||||
xprintf("IKBD: Disable mouse");
|
||||
ikbd.state |= IKBD_STATE_MOUSE_DISABLED;
|
||||
break;
|
||||
case 0x12:
|
||||
xprintf("IKBD: Disable mouse");
|
||||
ikbd.state |= IKBD_STATE_MOUSE_DISABLED;
|
||||
break;
|
||||
|
||||
case 0x14:
|
||||
xprintf("IKBD: Set Joystick event reporting");
|
||||
ikbd.state |= IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
case 0x14:
|
||||
xprintf("IKBD: Set Joystick event reporting");
|
||||
ikbd.state |= IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
|
||||
case 0x15:
|
||||
xprintf("IKBD: Set Joystick interrogation mode");
|
||||
ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
case 0x15:
|
||||
xprintf("IKBD: Set Joystick interrogation mode");
|
||||
ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
|
||||
case 0x16: // interrogate joystick
|
||||
// send reply
|
||||
enqueue(0xfd);
|
||||
enqueue(joystick_map2ikbd(ikbd.joystick[0]));
|
||||
enqueue(joystick_map2ikbd(ikbd.joystick[1]));
|
||||
break;
|
||||
case 0x16: // interrogate joystick
|
||||
// send reply
|
||||
enqueue(0xfd);
|
||||
enqueue(joystick_map2ikbd(ikbd.joystick[0]));
|
||||
enqueue(joystick_map2ikbd(ikbd.joystick[1]));
|
||||
break;
|
||||
|
||||
case 0x1a:
|
||||
xprintf("IKBD: Disable joysticks");
|
||||
ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
case 0x1a:
|
||||
xprintf("IKBD: Disable joysticks");
|
||||
ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
|
||||
case 0x1c:
|
||||
xprintf("IKBD: Interrogate time of day");
|
||||
case 0x1c:
|
||||
xprintf("IKBD: Interrogate time of day");
|
||||
|
||||
enqueue(0xfc);
|
||||
enqueue(0x13); // year bcd
|
||||
enqueue(0x03); // month bcd
|
||||
enqueue(0x07); // day bcd
|
||||
enqueue(0x20); // hour bcd
|
||||
enqueue(0x58); // minute bcd
|
||||
enqueue(0x00); // second bcd
|
||||
break;
|
||||
enqueue(0xfc);
|
||||
enqueue(0x13); // year bcd
|
||||
enqueue(0x03); // month bcd
|
||||
enqueue(0x07); // day bcd
|
||||
enqueue(0x20); // hour bcd
|
||||
enqueue(0x58); // minute bcd
|
||||
enqueue(0x00); // second bcd
|
||||
break;
|
||||
|
||||
|
||||
case 0x80:
|
||||
xprintf("IKBD: Reset");
|
||||
ikbd.expect = 1;
|
||||
ikbd.state = IKBD_DEFAULT;
|
||||
break;
|
||||
case 0x80:
|
||||
xprintf("IKBD: Reset");
|
||||
ikbd.expect = 1;
|
||||
ikbd.state = IKBD_DEFAULT;
|
||||
break;
|
||||
|
||||
default:
|
||||
xprintf("IKBD: unknown command: %x\n", cmd);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
xprintf("IKBD: unknown command: %x\n", cmd);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void ikbd_poll(void) {
|
||||
static int mtimer = 0;
|
||||
if (CheckTimer(mtimer))
|
||||
{
|
||||
mtimer = GetTimer(10);
|
||||
/*
|
||||
* FIXME: temporarily provide function prototypes for unimplemented functions here to make compiler happy
|
||||
*/
|
||||
|
||||
// check for incoming ikbd data
|
||||
EnableIO();
|
||||
SPI(UIO_IKBD_IN);
|
||||
extern int GetTimer(int);
|
||||
extern int CheckTimer(int);
|
||||
extern void EnableIO(void);
|
||||
extern void DisableIO(void);
|
||||
extern int SPI(int);
|
||||
|
||||
while(SPI(0))
|
||||
ikbd_handle_input(SPI(0));
|
||||
void ikbd_poll(void)
|
||||
{
|
||||
static int mtimer = 0;
|
||||
if (CheckTimer(mtimer))
|
||||
{
|
||||
mtimer = GetTimer(10);
|
||||
|
||||
DisableIO();
|
||||
}
|
||||
// check for incoming ikbd data
|
||||
EnableIO();
|
||||
SPI(UIO_IKBD_IN);
|
||||
|
||||
// send data from queue if present
|
||||
if(rptr == wptr) return;
|
||||
while(SPI(0))
|
||||
ikbd_handle_input(SPI(0));
|
||||
|
||||
// transmit data from queue
|
||||
EnableIO();
|
||||
SPI(UIO_IKBD_OUT);
|
||||
SPI(tx_queue[rptr]);
|
||||
DisableIO();
|
||||
DisableIO();
|
||||
}
|
||||
|
||||
rptr = (rptr + 1) & (QUEUE_LEN - 1);
|
||||
// send data from queue if present
|
||||
if(rptr == wptr) return;
|
||||
|
||||
// transmit data from queue
|
||||
EnableIO();
|
||||
SPI(UIO_IKBD_OUT);
|
||||
SPI(tx_queue[rptr]);
|
||||
DisableIO();
|
||||
|
||||
rptr = (rptr + 1) & (QUEUE_LEN - 1);
|
||||
}
|
||||
|
||||
void ikbd_joystick(unsigned char joystick, unsigned char map)
|
||||
{
|
||||
// todo: suppress events for joystick 0 as long as mouse
|
||||
// is enabled?
|
||||
// todo: suppress events for joystick 0 as long as mouse
|
||||
// is enabled?
|
||||
|
||||
if (ikbd.state & IKBD_STATE_JOYSTICK_EVENT_REPORTING)
|
||||
{
|
||||
if (ikbd.state & IKBD_STATE_JOYSTICK_EVENT_REPORTING)
|
||||
{
|
||||
#ifdef IKBD_DEBUG
|
||||
xprintf("IKBD: joy %d %x\n", joystick, map);
|
||||
xprintf("IKBD: joy %d %x\n", joystick, map);
|
||||
#endif
|
||||
|
||||
// only report joystick data for joystick 0 if the mouse is disabled
|
||||
if ((ikbd.state & IKBD_STATE_MOUSE_DISABLED) || (joystick == 1))
|
||||
{
|
||||
enqueue(0xfe + joystick);
|
||||
enqueue(joystick_map2ikbd(map));
|
||||
}
|
||||
// only report joystick data for joystick 0 if the mouse is disabled
|
||||
if ((ikbd.state & IKBD_STATE_MOUSE_DISABLED) || (joystick == 1))
|
||||
{
|
||||
enqueue(0xfe + joystick);
|
||||
enqueue(joystick_map2ikbd(map));
|
||||
}
|
||||
|
||||
if (!(ikbd.state & IKBD_STATE_MOUSE_DISABLED))
|
||||
{
|
||||
// the fire button also generates a mouse event if
|
||||
// mouse reporting is enabled
|
||||
if ((map & JOY_BTN1) != (ikbd.joystick[joystick] & JOY_BTN1))
|
||||
{
|
||||
// generate mouse event (ikbd_joystick_buttons is evaluated inside
|
||||
// user_io_mouse)
|
||||
ikbd.joystick[joystick] = map;
|
||||
ikbd_mouse(0, 0, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
if (!(ikbd.state & IKBD_STATE_MOUSE_DISABLED))
|
||||
{
|
||||
// the fire button also generates a mouse event if
|
||||
// mouse reporting is enabled
|
||||
if ((map & JOY_BTN1) != (ikbd.joystick[joystick] & JOY_BTN1))
|
||||
{
|
||||
// generate mouse event (ikbd_joystick_buttons is evaluated inside
|
||||
// user_io_mouse)
|
||||
ikbd.joystick[joystick] = map;
|
||||
ikbd_mouse(0, 0, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
#ifdef IKBD_DEBUG
|
||||
else
|
||||
xprintf("IKBD: no monitor, drop joy %d %x\n", joystick, map);
|
||||
else
|
||||
xprintf("IKBD: no monitor, drop joy %d %x\n", joystick, map);
|
||||
#endif
|
||||
|
||||
// save state of joystick for interrogation mode
|
||||
ikbd.joystick[joystick] = map;
|
||||
// save state of joystick for interrogation mode
|
||||
ikbd.joystick[joystick] = map;
|
||||
}
|
||||
|
||||
void ikbd_keyboard(unsigned char code)
|
||||
{
|
||||
#ifdef IKBD_DEBUG
|
||||
xprintf("IKBD: send keycode %x%s\n", code&0x7f, (code&0x80)?" BREAK":"");
|
||||
xprintf("IKBD: send keycode %x%s\n", code&0x7f, (code&0x80)?" BREAK":"");
|
||||
#endif
|
||||
enqueue(code);
|
||||
enqueue(code);
|
||||
}
|
||||
|
||||
void ikbd_mouse(uint8_t b, int8_t x, int8_t y)
|
||||
{
|
||||
if (ikbd.state & IKBD_STATE_MOUSE_DISABLED)
|
||||
return;
|
||||
if (ikbd.state & IKBD_STATE_MOUSE_DISABLED)
|
||||
return;
|
||||
|
||||
// joystick and mouse buttons are wired together in
|
||||
// atari st
|
||||
b |= (ikbd.joystick[0] & JOY_BTN1)?1:0;
|
||||
b |= (ikbd.joystick[1] & JOY_BTN1)?2:0;
|
||||
// joystick and mouse buttons are wired together in
|
||||
// atari st
|
||||
b |= (ikbd.joystick[0] & JOY_BTN1)?1:0;
|
||||
b |= (ikbd.joystick[1] & JOY_BTN1)?2:0;
|
||||
|
||||
static unsigned char b_old = 0;
|
||||
// monitor state of two mouse buttons
|
||||
if (b != b_old)
|
||||
{
|
||||
// check if mouse buttons are supposed to be treated like keys
|
||||
if (ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY)
|
||||
{
|
||||
// Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
|
||||
static unsigned char b_old = 0;
|
||||
// monitor state of two mouse buttons
|
||||
if (b != b_old)
|
||||
{
|
||||
// check if mouse buttons are supposed to be treated like keys
|
||||
if (ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY)
|
||||
{
|
||||
// Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
|
||||
|
||||
// handle left mouse button
|
||||
if((b ^ b_old) & 1) ikbd_keyboard(0x74 | ((b&1)?0x00:0x80));
|
||||
// handle right mouse button
|
||||
if((b ^ b_old) & 2) ikbd_keyboard(0x75 | ((b&2)?0x00:0x80));
|
||||
}
|
||||
b_old = b;
|
||||
}
|
||||
// handle left mouse button
|
||||
if((b ^ b_old) & 1) ikbd_keyboard(0x74 | ((b&1)?0x00:0x80));
|
||||
// handle right mouse button
|
||||
if((b ^ b_old) & 2) ikbd_keyboard(0x75 | ((b&2)?0x00:0x80));
|
||||
}
|
||||
b_old = b;
|
||||
}
|
||||
|
||||
#if 0
|
||||
if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY)
|
||||
{
|
||||
b = 0;
|
||||
// if mouse position is 0/0 quit here
|
||||
if(!x && !y) return;
|
||||
}
|
||||
if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY)
|
||||
{
|
||||
b = 0;
|
||||
// if mouse position is 0/0 quit here
|
||||
if(!x && !y) return;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (ikbd.state & IKBD_STATE_MOUSE_ABSOLUTE)
|
||||
{
|
||||
}
|
||||
else
|
||||
{
|
||||
// atari has mouse button bits swapped
|
||||
enqueue(0xf8|((b&1)?2:0)|((b&2)?1:0));
|
||||
enqueue(x);
|
||||
enqueue((ikbd.state & IKBD_STATE_MOUSE_Y_BOTTOM)?-y:y);
|
||||
}
|
||||
if (ikbd.state & IKBD_STATE_MOUSE_ABSOLUTE)
|
||||
{
|
||||
}
|
||||
else
|
||||
{
|
||||
// atari has mouse button bits swapped
|
||||
enqueue(0xf8|((b&1)?2:0)|((b&2)?1:0));
|
||||
enqueue(x);
|
||||
enqueue((ikbd.state & IKBD_STATE_MOUSE_Y_BOTTOM)?-y:y);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -67,5 +67,5 @@ end
|
||||
|
||||
tr
|
||||
ib
|
||||
add-symbol-file ../emutos/emutos2.img 0xe00000
|
||||
load firebee/ram.elf
|
||||
#add-symbol-file ../emutos/emutos2.img 0xe00000
|
||||
#load firebee/ram.elf
|
||||
|
||||
8
memory_map.txt
Normal file
8
memory_map.txt
Normal file
@@ -0,0 +1,8 @@
|
||||
Firebee memory map
|
||||
==================
|
||||
|
||||
Virt. Start Virt. End Phys. Start Phys. End
|
||||
ST-RAM 0x00000000 0x00dfffff 0x60000000 0x60dfffff
|
||||
TOS 0x00e00000 0x00efffff 0x00e00000 0x00efffff
|
||||
ST I/O area 0x00f00000 0x01000000 0xfff00000 0xffffffff
|
||||
TT-RAM 0x01000000 0x20ffffff 0x00000000 0x1fffffff
|
||||
126
net/am79c874.c
126
net/am79c874.c
@@ -32,7 +32,7 @@
|
||||
* This function sets up the Auto-Negotiate Advertisement register
|
||||
* within the PHY and then forces the PHY to auto-negotiate for
|
||||
* it's settings.
|
||||
*
|
||||
*
|
||||
* Params:
|
||||
* fec_ch FEC channel
|
||||
* phy_addr Address of the PHY.
|
||||
@@ -45,80 +45,80 @@
|
||||
*/
|
||||
int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex)
|
||||
{
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
if (speed); /* to do */
|
||||
if (duplex); /* to do */
|
||||
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
dbg("%s: PHY reset\r\n", __FUNCTION__);
|
||||
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_RESET))
|
||||
return 0;
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
if (speed); /* to do */
|
||||
if (duplex); /* to do */
|
||||
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_CR, &settings);
|
||||
if (!(settings & MII_AM79C874_CR_RESET))
|
||||
break;
|
||||
}
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
dbg("%s: PHY reset\r\n", __FUNCTION__);
|
||||
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: PHY reset failed\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
};
|
||||
dbg("%s: PHY reset OK\r\n", __FUNCTION__);
|
||||
dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_RESET))
|
||||
return 0;
|
||||
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_AUTON | MII_AM79C874_CR_RST_NEG))
|
||||
return 0;
|
||||
|
||||
dbg("%s:PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_CR, &settings);
|
||||
if (!(settings & MII_AM79C874_CR_RESET))
|
||||
break;
|
||||
}
|
||||
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
settings = 0;
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_SR, &settings);
|
||||
if ((settings & AUTONEGLINK) == AUTONEGLINK)
|
||||
break;
|
||||
}
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: PHY reset failed\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
};
|
||||
dbg("%s: PHY reset OK\r\n", __FUNCTION__);
|
||||
dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
|
||||
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: Auto-negotiation failed (timeout). Set default mode (100Mbps, full duplex)\r\n", __FUNCTION__);
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_AUTON | MII_AM79C874_CR_RST_NEG))
|
||||
return 0;
|
||||
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX))
|
||||
{
|
||||
dbg("%s: forced setting 100Mbps/full failed.\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
dbg("%s:PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
|
||||
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
settings = 0;
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_SR, &settings);
|
||||
if ((settings & AUTONEGLINK) == AUTONEGLINK)
|
||||
break;
|
||||
}
|
||||
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: Auto-negotiation failed (timeout). Set default mode (100Mbps, full duplex)\r\n", __FUNCTION__);
|
||||
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX))
|
||||
{
|
||||
dbg("%s: forced setting 100Mbps/full failed.\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DBG_AM79
|
||||
settings = 0;
|
||||
settings = 0;
|
||||
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_DR, &settings);
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_DR, &settings);
|
||||
|
||||
dbg("%s: PHY Mode:\r\n", __FUNCTION__);
|
||||
if (settings & MII_AM79C874_DR_DATA_RATE)
|
||||
dbg("%s: 100Mbps", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: 10Mbps ", __FUNCTION__);
|
||||
dbg("%s: PHY Mode:\r\n", __FUNCTION__);
|
||||
if (settings & MII_AM79C874_DR_DATA_RATE)
|
||||
dbg("%s: 100Mbps", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: 10Mbps ", __FUNCTION__);
|
||||
|
||||
if (settings & MII_AM79C874_DR_DPLX)
|
||||
dbg("%s: Full-duplex\r\n", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: Half-duplex\r\n", __FUNCTION__);
|
||||
if (settings & MII_AM79C874_DR_DPLX)
|
||||
dbg("%s: Full-duplex\r\n", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: Half-duplex\r\n", __FUNCTION__);
|
||||
|
||||
dbg("%s:PHY auto-negotiation complete\r\n", __FUNCTION__);
|
||||
dbg("%s:PHY auto-negotiation complete\r\n", __FUNCTION__);
|
||||
#endif /* DBG_AM79 */
|
||||
|
||||
return 1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
190
net/bcm5222.c
190
net/bcm5222.c
@@ -37,7 +37,7 @@
|
||||
* This function sets up the Auto-Negotiate Advertisement register
|
||||
* within the PHY and then forces the PHY to auto-negotiate for
|
||||
* it's settings.
|
||||
*
|
||||
*
|
||||
* Params:
|
||||
* fec_ch FEC channel
|
||||
* phy_addr Address of the PHY.
|
||||
@@ -50,133 +50,133 @@
|
||||
*/
|
||||
int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex)
|
||||
{
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
dbg("PHY reset\r\n");
|
||||
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, BCM5222_CTRL_RESET | BCM5222_CTRL_ANE))
|
||||
return 0;
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, BCM5222_CTRL_RESET | BCM5222_CTRL_ANE))
|
||||
return 0;
|
||||
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, BCM5222_CTRL, &settings);
|
||||
if (!(settings & BCM5222_CTRL_RESET))
|
||||
break;
|
||||
}
|
||||
if(timeout >= FEC_MII_TIMEOUT)
|
||||
return 0;
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, BCM5222_CTRL, &settings);
|
||||
if (!(settings & BCM5222_CTRL_RESET))
|
||||
break;
|
||||
}
|
||||
if(timeout >= FEC_MII_TIMEOUT)
|
||||
return 0;
|
||||
|
||||
dbg("PHY reset OK\r\n");
|
||||
|
||||
settings = (BCM5222_AN_ADV_NEXT_PAGE | BCM5222_AN_ADV_PAUSE);
|
||||
settings = (BCM5222_AN_ADV_NEXT_PAGE | BCM5222_AN_ADV_PAUSE);
|
||||
|
||||
if (speed == FEC_MII_10BASE_T)
|
||||
settings |= (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: BCM5222_AN_ADV_10BT);
|
||||
else /* (speed == FEC_MII_100BASE_TX) */
|
||||
settings = (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_100BTX_FDX | BCM5222_AN_ADV_100BTX
|
||||
| BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: (BCM5222_AN_ADV_100BTX | BCM5222_AN_ADV_10BT));
|
||||
if (speed == FEC_MII_10BASE_T)
|
||||
settings |= (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: BCM5222_AN_ADV_10BT);
|
||||
else /* (speed == FEC_MII_100BASE_TX) */
|
||||
settings = (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_100BTX_FDX | BCM5222_AN_ADV_100BTX
|
||||
| BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: (BCM5222_AN_ADV_100BTX | BCM5222_AN_ADV_10BT));
|
||||
|
||||
/* Set the Auto-Negotiation Advertisement Register */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_AN_ADV, settings))
|
||||
return 0;
|
||||
/* Set the Auto-Negotiation Advertisement Register */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_AN_ADV, settings))
|
||||
return 0;
|
||||
|
||||
dbg("PHY Enable Auto-Negotiation\r\n");
|
||||
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, (BCM5222_CTRL_ANE | BCM5222_CTRL_RESTART_AN)))
|
||||
return 0;
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, (BCM5222_CTRL_ANE | BCM5222_CTRL_RESTART_AN)))
|
||||
return 0;
|
||||
|
||||
dbg("PHY Wait for auto-negotiation to complete\r\n");
|
||||
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_STAT, &settings))
|
||||
return 0;
|
||||
if (settings & BCM5222_STAT_AN_COMPLETE)
|
||||
break;
|
||||
}
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_STAT, &settings))
|
||||
return 0;
|
||||
if (settings & BCM5222_STAT_AN_COMPLETE)
|
||||
break;
|
||||
}
|
||||
|
||||
if (timeout < FEC_MII_TIMEOUT)
|
||||
{
|
||||
if (timeout < FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("PHY auto-negociation complete\r\n");
|
||||
|
||||
/* Read Auxiliary Control/Status Register */
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_ACSR, &settings))
|
||||
return 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Read Auxiliary Control/Status Register */
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_ACSR, &settings))
|
||||
return 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("auto negotiation failed, PHY Set the default mode\r\n");
|
||||
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_ACSR, settings = (BCM5222_ACSR_100BTX | BCM5222_ACSR_FDX)))
|
||||
return 0;
|
||||
}
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_ACSR, settings = (BCM5222_ACSR_100BTX | BCM5222_ACSR_FDX)))
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Set the proper duplex in the FEC now that we have auto-negotiated */
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
fec_duplex(fec_ch, FEC_MII_FULL_DUPLEX);
|
||||
else
|
||||
fec_duplex(fec_ch, FEC_MII_HALF_DUPLEX);
|
||||
/* Set the proper duplex in the FEC now that we have auto-negotiated */
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
fec_duplex(fec_ch, FEC_MII_FULL_DUPLEX);
|
||||
else
|
||||
fec_duplex(fec_ch, FEC_MII_HALF_DUPLEX);
|
||||
|
||||
dbg("PHY Mode: ");
|
||||
|
||||
if (settings & BCM5222_ACSR_100BTX)
|
||||
if (settings & BCM5222_ACSR_100BTX)
|
||||
dbg("100Mbps\r\n");
|
||||
else
|
||||
else
|
||||
dbg("10Mbps\r\n");
|
||||
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
dbg("Full-duplex\r\n");
|
||||
else
|
||||
else
|
||||
dbg("Half-duplex\r\n");
|
||||
|
||||
return 1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
void bcm5222_get_reg(uint16_t* status0, uint16_t* status1)
|
||||
{
|
||||
fec_mii_read(0, 0x00, 0x00000000, &status0[0]);
|
||||
fec_mii_read(0, 0x00, 0x00000001, &status0[1]);
|
||||
fec_mii_read(0, 0x00, 0x00000004, &status0[4]);
|
||||
fec_mii_read(0, 0x00, 0x00000005, &status0[5]);
|
||||
fec_mii_read(0, 0x00, 0x00000006, &status0[6]);
|
||||
fec_mii_read(0, 0x00, 0x00000007, &status0[7]);
|
||||
fec_mii_read(0, 0x00, 0x00000008, &status0[8]);
|
||||
fec_mii_read(0, 0x00, 0x00000010, &status0[16]);
|
||||
fec_mii_read(0, 0x00, 0x00000011, &status0[17]);
|
||||
fec_mii_read(0, 0x00, 0x00000012, &status0[18]);
|
||||
fec_mii_read(0, 0x00, 0x00000013, &status0[19]);
|
||||
fec_mii_read(0, 0x00, 0x00000018, &status0[24]);
|
||||
fec_mii_read(0, 0x00, 0x00000019, &status0[25]);
|
||||
fec_mii_read(0, 0x00, 0x0000001B, &status0[27]);
|
||||
fec_mii_read(0, 0x00, 0x0000001C, &status0[28]);
|
||||
fec_mii_read(0, 0x00, 0x0000001E, &status0[30]);
|
||||
fec_mii_read(0, 0x01, 0x00000000, &status1[0]);
|
||||
fec_mii_read(0, 0x01, 0x00000001, &status1[1]);
|
||||
fec_mii_read(0, 0x01, 0x00000004, &status1[4]);
|
||||
fec_mii_read(0, 0x01, 0x00000005, &status1[5]);
|
||||
fec_mii_read(0, 0x01, 0x00000006, &status1[6]);
|
||||
fec_mii_read(0, 0x01, 0x00000007, &status1[7]);
|
||||
fec_mii_read(0, 0x01, 0x00000008, &status1[8]);
|
||||
fec_mii_read(0, 0x01, 0x00000010, &status1[16]);
|
||||
fec_mii_read(0, 0x01, 0x00000011, &status1[17]);
|
||||
fec_mii_read(0, 0x01, 0x00000012, &status1[18]);
|
||||
fec_mii_read(0, 0x01, 0x00000013, &status1[19]);
|
||||
fec_mii_read(0, 0x01, 0x00000018, &status1[24]);
|
||||
fec_mii_read(0, 0x01, 0x00000019, &status1[25]);
|
||||
fec_mii_read(0, 0x01, 0x0000001B, &status1[27]);
|
||||
fec_mii_read(0, 0x01, 0x0000001C, &status1[28]);
|
||||
fec_mii_read(0, 0x01, 0x0000001E, &status1[30]);
|
||||
fec_mii_read(0, 0x00, 0x00000000, &status0[0]);
|
||||
fec_mii_read(0, 0x00, 0x00000001, &status0[1]);
|
||||
fec_mii_read(0, 0x00, 0x00000004, &status0[4]);
|
||||
fec_mii_read(0, 0x00, 0x00000005, &status0[5]);
|
||||
fec_mii_read(0, 0x00, 0x00000006, &status0[6]);
|
||||
fec_mii_read(0, 0x00, 0x00000007, &status0[7]);
|
||||
fec_mii_read(0, 0x00, 0x00000008, &status0[8]);
|
||||
fec_mii_read(0, 0x00, 0x00000010, &status0[16]);
|
||||
fec_mii_read(0, 0x00, 0x00000011, &status0[17]);
|
||||
fec_mii_read(0, 0x00, 0x00000012, &status0[18]);
|
||||
fec_mii_read(0, 0x00, 0x00000013, &status0[19]);
|
||||
fec_mii_read(0, 0x00, 0x00000018, &status0[24]);
|
||||
fec_mii_read(0, 0x00, 0x00000019, &status0[25]);
|
||||
fec_mii_read(0, 0x00, 0x0000001B, &status0[27]);
|
||||
fec_mii_read(0, 0x00, 0x0000001C, &status0[28]);
|
||||
fec_mii_read(0, 0x00, 0x0000001E, &status0[30]);
|
||||
fec_mii_read(0, 0x01, 0x00000000, &status1[0]);
|
||||
fec_mii_read(0, 0x01, 0x00000001, &status1[1]);
|
||||
fec_mii_read(0, 0x01, 0x00000004, &status1[4]);
|
||||
fec_mii_read(0, 0x01, 0x00000005, &status1[5]);
|
||||
fec_mii_read(0, 0x01, 0x00000006, &status1[6]);
|
||||
fec_mii_read(0, 0x01, 0x00000007, &status1[7]);
|
||||
fec_mii_read(0, 0x01, 0x00000008, &status1[8]);
|
||||
fec_mii_read(0, 0x01, 0x00000010, &status1[16]);
|
||||
fec_mii_read(0, 0x01, 0x00000011, &status1[17]);
|
||||
fec_mii_read(0, 0x01, 0x00000012, &status1[18]);
|
||||
fec_mii_read(0, 0x01, 0x00000013, &status1[19]);
|
||||
fec_mii_read(0, 0x01, 0x00000018, &status1[24]);
|
||||
fec_mii_read(0, 0x01, 0x00000019, &status1[25]);
|
||||
fec_mii_read(0, 0x01, 0x0000001B, &status1[27]);
|
||||
fec_mii_read(0, 0x01, 0x0000001C, &status1[28]);
|
||||
fec_mii_read(0, 0x01, 0x0000001E, &status1[30]);
|
||||
}
|
||||
|
||||
|
||||
138
net/bootp.c
138
net/bootp.c
@@ -18,101 +18,101 @@
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_BOOTP */
|
||||
|
||||
#define TIMER_NETWORK 3 /* defines GPT3 as timer for this function */
|
||||
#define TIMER_NETWORK 3 /* defines GPT3 as timer for this function */
|
||||
|
||||
static struct bootp_connection connection;
|
||||
#define XID 0x1234 /* this is arbitrary */
|
||||
#define MAX_TRIES 5 /* since UDP can fail */
|
||||
#define XID 0x1234 /* this is arbitrary */
|
||||
#define MAX_TRIES 5 /* since UDP can fail */
|
||||
|
||||
void bootp_request(NIF *nif, uint8_t *pa)
|
||||
{
|
||||
/*
|
||||
* This function broadcasts a BOOTP request for the protocol
|
||||
* address "pa"
|
||||
*/
|
||||
uint8_t *addr;
|
||||
IP_ADDR broadcast = {255, 255, 255, 255};
|
||||
NBUF *nbuf;
|
||||
struct bootp_packet *p;
|
||||
int i, result;
|
||||
/*
|
||||
* This function broadcasts a BOOTP request for the protocol
|
||||
* address "pa"
|
||||
*/
|
||||
uint8_t *addr;
|
||||
IP_ADDR broadcast = {255, 255, 255, 255};
|
||||
NBUF *nbuf;
|
||||
struct bootp_packet *p;
|
||||
int i, result;
|
||||
|
||||
nbuf = nbuf_alloc();
|
||||
if (nbuf == NULL)
|
||||
{
|
||||
xprintf("%s: couldn't allocate Tx buffer\r\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
nbuf = nbuf_alloc();
|
||||
if (nbuf == NULL)
|
||||
{
|
||||
xprintf("%s: couldn't allocate Tx buffer\r\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
|
||||
p = (struct bootp_packet *) &nbuf->data[BOOTP_HDR_OFFSET];
|
||||
p = (struct bootp_packet *) &nbuf->data[BOOTP_HDR_OFFSET];
|
||||
|
||||
/* Build the BOOTP request packet */
|
||||
p->type = BOOTP_TYPE_BOOTREQUEST;
|
||||
p->htype = BOOTP_HTYPE_ETHERNET;
|
||||
p->hlen = BOOTP_HLEN_ETHERNET;
|
||||
p->hops = 0;
|
||||
p->xid = XID;
|
||||
p->secs = 1;
|
||||
p->flags = BOOTP_FLAGS_BROADCAST;
|
||||
p->cl_addr = 0x0;
|
||||
p->yi_addr = 0x0;
|
||||
p->gi_addr = 0x0;
|
||||
/* Build the BOOTP request packet */
|
||||
p->type = BOOTP_TYPE_BOOTREQUEST;
|
||||
p->htype = BOOTP_HTYPE_ETHERNET;
|
||||
p->hlen = BOOTP_HLEN_ETHERNET;
|
||||
p->hops = 0;
|
||||
p->xid = XID;
|
||||
p->secs = 1;
|
||||
p->flags = BOOTP_FLAGS_BROADCAST;
|
||||
p->cl_addr = 0x0;
|
||||
p->yi_addr = 0x0;
|
||||
p->gi_addr = 0x0;
|
||||
|
||||
connection.nif = nif;
|
||||
addr = &nif->hwa[0];
|
||||
connection.nif = nif;
|
||||
addr = &nif->hwa[0];
|
||||
|
||||
for (i = 0; i < 6; i++)
|
||||
p->ch_addr[i] = addr[i];
|
||||
for (i = 0; i < 6; i++)
|
||||
p->ch_addr[i] = addr[i];
|
||||
|
||||
nbuf->length = BOOTP_PACKET_LEN;
|
||||
nbuf->length = BOOTP_PACKET_LEN;
|
||||
|
||||
/* setup reply handler */
|
||||
udp_bind_port(BOOTP_CLIENT_PORT, bootp_handler);
|
||||
/* setup reply handler */
|
||||
udp_bind_port(BOOTP_CLIENT_PORT, bootp_handler);
|
||||
|
||||
for (i = 0; i < MAX_TRIES; i++)
|
||||
{
|
||||
/* Send the BOOTP request */
|
||||
result = udp_send(connection.nif, broadcast, BOOTP_CLIENT_PORT,
|
||||
BOOTP_SERVER_PORT, nbuf);
|
||||
dbg("sent bootp request\r\n");
|
||||
if (result == true)
|
||||
break;
|
||||
}
|
||||
for (i = 0; i < MAX_TRIES; i++)
|
||||
{
|
||||
/* Send the BOOTP request */
|
||||
result = udp_send(connection.nif, broadcast, BOOTP_CLIENT_PORT,
|
||||
BOOTP_SERVER_PORT, nbuf);
|
||||
dbg("sent bootp request\r\n");
|
||||
if (result == true)
|
||||
break;
|
||||
}
|
||||
|
||||
/* release handler */
|
||||
udp_free_port(BOOTP_CLIENT_PORT);
|
||||
/* release handler */
|
||||
udp_free_port(BOOTP_CLIENT_PORT);
|
||||
|
||||
if (result == 0)
|
||||
nbuf_free(nbuf);
|
||||
if (result == 0)
|
||||
nbuf_free(nbuf);
|
||||
}
|
||||
|
||||
void bootp_handler(NIF *nif, NBUF *nbuf)
|
||||
{
|
||||
/*
|
||||
* BOOTP protocol handler
|
||||
*/
|
||||
uint8_t *addr;
|
||||
struct bootp_packet *rx_p;
|
||||
udp_frame_hdr *udpframe;
|
||||
/*
|
||||
* BOOTP protocol handler
|
||||
*/
|
||||
struct bootp_packet *rx_p;
|
||||
udp_frame_hdr *udpframe;
|
||||
|
||||
(void) udpframe; /* FIXME: just to avoid compiler warning */
|
||||
dbg("\r\n");
|
||||
|
||||
rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
|
||||
udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];
|
||||
rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
|
||||
udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];
|
||||
|
||||
/*
|
||||
* check packet if it is valid and if it is really intended for us
|
||||
*/
|
||||
|
||||
if (rx_p->type == BOOTP_TYPE_BOOTREPLY && rx_p->xid == XID)
|
||||
{
|
||||
dbg("received bootp reply\r\n");
|
||||
/* seems to be valid */
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
if (rx_p->type == BOOTP_TYPE_BOOTREPLY && rx_p->xid == XID)
|
||||
{
|
||||
dbg("received bootp reply\r\n");
|
||||
/* seems to be valid */
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("received invalid bootp reply\r\n");
|
||||
/* not valid */
|
||||
return;
|
||||
}
|
||||
/* not valid */
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
192
net/nbuf.c
192
net/nbuf.c
@@ -39,46 +39,46 @@ uint8_t *unaligned_buffers[NBUF_MAX];
|
||||
*/
|
||||
int nbuf_init(void)
|
||||
{
|
||||
int i;
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
NBUF *nbuf;
|
||||
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
/* Initialize all the queues */
|
||||
queue_init(&nbuf_queue[i]);
|
||||
}
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
/* Initialize all the queues */
|
||||
queue_init(&nbuf_queue[i]);
|
||||
}
|
||||
|
||||
dbg("Creating %d net buffers of %d bytes\r\n", NBUF_MAX, NBUF_SZ);
|
||||
dbg("Creating %d net buffers of %d bytes\r\n", NBUF_MAX, NBUF_SZ);
|
||||
|
||||
for (i = 0; i < NBUF_MAX; ++i)
|
||||
{
|
||||
/* Allocate memory for the network buffer structure */
|
||||
nbuf = (NBUF *) driver_mem_alloc(sizeof(NBUF));
|
||||
if (!nbuf)
|
||||
{
|
||||
xprintf("failed to allocate nbuf\r\n");
|
||||
return 1;
|
||||
}
|
||||
for (i = 0; i < NBUF_MAX; ++i)
|
||||
{
|
||||
/* Allocate memory for the network buffer structure */
|
||||
nbuf = (NBUF *) driver_mem_alloc(sizeof(NBUF));
|
||||
if (!nbuf)
|
||||
{
|
||||
xprintf("failed to allocate nbuf\r\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Allocate memory for the actual data */
|
||||
unaligned_buffers[i] = driver_mem_alloc(NBUF_SZ + 16);
|
||||
nbuf->data = (uint8_t *)((uint32_t)(unaligned_buffers[i] + 15) & 0xFFFFFFF0);
|
||||
if (!nbuf->data)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
/* Allocate memory for the actual data */
|
||||
unaligned_buffers[i] = driver_mem_alloc(NBUF_SZ + 16);
|
||||
nbuf->data = (uint8_t *)((uint32_t)(unaligned_buffers[i] + 15) & 0xFFFFFFF0);
|
||||
if (!nbuf->data)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Initialize the network buffer */
|
||||
nbuf->offset = 0;
|
||||
nbuf->length = 0;
|
||||
/* Initialize the network buffer */
|
||||
nbuf->offset = 0;
|
||||
nbuf->length = 0;
|
||||
|
||||
/* Add the network buffer to the free list */
|
||||
queue_add(&nbuf_queue[NBUF_FREE], (QNODE *)nbuf);
|
||||
}
|
||||
/* Add the network buffer to the free list */
|
||||
queue_add(&nbuf_queue[NBUF_FREE], (QNODE *)nbuf);
|
||||
}
|
||||
|
||||
dbg("NBUF allocation complete\r\n");
|
||||
dbg("NBUF allocation complete\r\n");
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -86,23 +86,23 @@ int nbuf_init(void)
|
||||
*/
|
||||
void nbuf_flush(void)
|
||||
{
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
int level = set_ipl(7);
|
||||
int n = 0;
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
int level = set_ipl(7);
|
||||
int n = 0;
|
||||
|
||||
for (i = 0; i < NBUF_MAX; ++i)
|
||||
driver_mem_free((uint8_t *) unaligned_buffers[i]);
|
||||
for (i = 0; i < NBUF_MAX; ++i)
|
||||
driver_mem_free((uint8_t *) unaligned_buffers[i]);
|
||||
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
while ((nbuf = (NBUF *) queue_remove(&nbuf_queue[i])) != NULL)
|
||||
{
|
||||
driver_mem_free(nbuf);
|
||||
++n;
|
||||
}
|
||||
}
|
||||
set_ipl(level);
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
while ((nbuf = (NBUF *) queue_remove(&nbuf_queue[i])) != NULL)
|
||||
{
|
||||
driver_mem_free(nbuf);
|
||||
++n;
|
||||
}
|
||||
}
|
||||
set_ipl(level);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -114,13 +114,13 @@ void nbuf_flush(void)
|
||||
*/
|
||||
NBUF *nbuf_alloc(void)
|
||||
{
|
||||
NBUF *nbuf;
|
||||
int level = set_ipl(7);
|
||||
NBUF *nbuf;
|
||||
int level = set_ipl(7);
|
||||
|
||||
nbuf = (NBUF *) queue_remove(&nbuf_queue[NBUF_FREE]);
|
||||
set_ipl(level);
|
||||
nbuf = (NBUF *) queue_remove(&nbuf_queue[NBUF_FREE]);
|
||||
set_ipl(level);
|
||||
|
||||
return nbuf;
|
||||
return nbuf;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -131,13 +131,13 @@ NBUF *nbuf_alloc(void)
|
||||
*/
|
||||
void nbuf_free(NBUF *nbuf)
|
||||
{
|
||||
int level = set_ipl(7);
|
||||
int level = set_ipl(7);
|
||||
|
||||
nbuf->offset = 0;
|
||||
nbuf->length = NBUF_SZ;
|
||||
queue_add(&nbuf_queue[NBUF_FREE],(QNODE *) nbuf);
|
||||
nbuf->offset = 0;
|
||||
nbuf->length = NBUF_SZ;
|
||||
queue_add(&nbuf_queue[NBUF_FREE],(QNODE *) nbuf);
|
||||
|
||||
set_ipl(level);
|
||||
set_ipl(level);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -148,13 +148,13 @@ void nbuf_free(NBUF *nbuf)
|
||||
*/
|
||||
NBUF *nbuf_remove(int q)
|
||||
{
|
||||
NBUF *nbuf;
|
||||
int level = set_ipl(7);
|
||||
NBUF *nbuf;
|
||||
int level = set_ipl(7);
|
||||
|
||||
nbuf = (NBUF *) queue_remove(&nbuf_queue[q]);
|
||||
set_ipl(level);
|
||||
nbuf = (NBUF *) queue_remove(&nbuf_queue[q]);
|
||||
set_ipl(level);
|
||||
|
||||
return nbuf;
|
||||
return nbuf;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -165,10 +165,10 @@ NBUF *nbuf_remove(int q)
|
||||
*/
|
||||
void nbuf_add(int q, NBUF *nbuf)
|
||||
{
|
||||
int level = set_ipl(7);
|
||||
int level = set_ipl(7);
|
||||
|
||||
queue_add(&nbuf_queue[q], (QNODE *) nbuf);
|
||||
set_ipl(level);
|
||||
queue_add(&nbuf_queue[q], (QNODE *) nbuf);
|
||||
set_ipl(level);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -176,16 +176,16 @@ void nbuf_add(int q, NBUF *nbuf)
|
||||
*/
|
||||
void nbuf_reset(void)
|
||||
{
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
int level = set_ipl(7);
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
int level = set_ipl(7);
|
||||
|
||||
for (i = 1; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
while ((nbuf = nbuf_remove(i)) != NULL)
|
||||
nbuf_free(nbuf);
|
||||
}
|
||||
set_ipl(level);
|
||||
for (i = 1; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
while ((nbuf = nbuf_remove(i)) != NULL)
|
||||
nbuf_free(nbuf);
|
||||
}
|
||||
set_ipl(level);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -194,31 +194,31 @@ void nbuf_reset(void)
|
||||
void nbuf_debug_dump(void)
|
||||
{
|
||||
#ifdef DBG_NBUF
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
int j;
|
||||
int level;
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
int j;
|
||||
int level;
|
||||
|
||||
level = set_ipl(7);
|
||||
level = set_ipl(7);
|
||||
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
dbg("\r\n\r\nQueue #%d\r\n\r\n", i);
|
||||
dbg("\tBuffer Location\tOffset\tLength\r\n");
|
||||
dbg("--------------------------------------\r\n");
|
||||
j = 0;
|
||||
nbuf = (NBUF *) queue_peek(&nbuf_queue[i]);
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
dbg("\r\n\r\nQueue #%d\r\n\r\n", i);
|
||||
dbg("\tBuffer Location\tOffset\tLength\r\n");
|
||||
dbg("--------------------------------------\r\n");
|
||||
j = 0;
|
||||
nbuf = (NBUF *) queue_peek(&nbuf_queue[i]);
|
||||
|
||||
while (nbuf != NULL)
|
||||
{
|
||||
dbg("%d\t0x%08x\t0x%04x\t0x%04x\r\n", j++, nbuf->data,
|
||||
nbuf->offset,
|
||||
nbuf->length);
|
||||
nbuf = (NBUF *) nbuf->node.next;
|
||||
}
|
||||
}
|
||||
dbg("\r\n");
|
||||
while (nbuf != NULL)
|
||||
{
|
||||
dbg("%d\t0x%08x\t0x%04x\t0x%04x\r\n", j++, nbuf->data,
|
||||
nbuf->offset,
|
||||
nbuf->length);
|
||||
nbuf = (NBUF *) nbuf->node.next;
|
||||
}
|
||||
}
|
||||
dbg("\r\n");
|
||||
|
||||
set_ipl(level);
|
||||
set_ipl(level);
|
||||
#endif /* DBG_NBUF */
|
||||
}
|
||||
|
||||
164
net/nif.c
164
net/nif.c
@@ -20,111 +20,111 @@
|
||||
|
||||
int nif_protocol_exist(NIF *nif, uint16_t protocol)
|
||||
{
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and if a protocol handler exists,
|
||||
* true is returned. This function is useful for network cards
|
||||
* that needn't read in the entire frame but can discard frames
|
||||
* arbitrarily.
|
||||
*/
|
||||
int index;
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and if a protocol handler exists,
|
||||
* true is returned. This function is useful for network cards
|
||||
* that needn't read in the entire frame but can discard frames
|
||||
* arbitrarily.
|
||||
*/
|
||||
int index;
|
||||
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return false;
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
void nif_protocol_handler(NIF *nif, uint16_t protocol, NBUF *pNbuf)
|
||||
{
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and if a protocol handler exists,
|
||||
* the protocol handler is invoked. This routine called by
|
||||
* network device driver after receiving a frame.
|
||||
*/
|
||||
int index;
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and if a protocol handler exists,
|
||||
* the protocol handler is invoked. This routine called by
|
||||
* network device driver after receiving a frame.
|
||||
*/
|
||||
int index;
|
||||
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
{
|
||||
dbg("call protocol handler for protocol %d at %p\r\n", protocol,
|
||||
nif->protocol[index].handler);
|
||||
nif->protocol[index].handler(nif,pNbuf);
|
||||
return;
|
||||
}
|
||||
}
|
||||
dbg("no protocol handler found for protocol %d\r\n", protocol);
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
{
|
||||
dbg("call protocol handler for protocol %d at %p\r\n", protocol,
|
||||
nif->protocol[index].handler);
|
||||
nif->protocol[index].handler(nif,pNbuf);
|
||||
return;
|
||||
}
|
||||
}
|
||||
dbg("no protocol handler found for protocol %d\r\n", protocol);
|
||||
}
|
||||
|
||||
void *nif_get_protocol_info(NIF *nif, uint16_t protocol)
|
||||
{
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and returns a pointer to the
|
||||
* config info for 'protocol', otherwise NULL is returned.
|
||||
*/
|
||||
int index;
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and returns a pointer to the
|
||||
* config info for 'protocol', otherwise NULL is returned.
|
||||
*/
|
||||
int index;
|
||||
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
return (void *)nif->protocol[index].info;
|
||||
}
|
||||
return (void *)0;
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
return (void *)nif->protocol[index].info;
|
||||
}
|
||||
return (void *)0;
|
||||
}
|
||||
|
||||
int nif_bind_protocol(NIF *nif, uint16_t protocol, void (*handler)(NIF *,NBUF *),
|
||||
void *info)
|
||||
void *info)
|
||||
{
|
||||
/*
|
||||
* This function registers 'protocol' as a supported
|
||||
* protocol in 'nif'.
|
||||
*/
|
||||
if (nif->num_protocol < (MAX_SUP_PROTO - 1))
|
||||
{
|
||||
nif->protocol[nif->num_protocol].protocol = protocol;
|
||||
nif->protocol[nif->num_protocol].handler = (void(*)(NIF *, NBUF *)) handler;
|
||||
nif->protocol[nif->num_protocol].info = info;
|
||||
++nif->num_protocol;
|
||||
/*
|
||||
* This function registers 'protocol' as a supported
|
||||
* protocol in 'nif'.
|
||||
*/
|
||||
if (nif->num_protocol < (MAX_SUP_PROTO - 1))
|
||||
{
|
||||
nif->protocol[nif->num_protocol].protocol = protocol;
|
||||
nif->protocol[nif->num_protocol].handler = (void(*)(NIF *, NBUF *)) handler;
|
||||
nif->protocol[nif->num_protocol].info = info;
|
||||
++nif->num_protocol;
|
||||
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
NIF *nif_init (NIF *nif)
|
||||
{
|
||||
int i;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ETH_ADDR_LEN; ++i)
|
||||
{
|
||||
nif->hwa[i] = 0;
|
||||
nif->broadcast[i] = 0xFF;
|
||||
}
|
||||
for (i = 0; i < ETH_ADDR_LEN; ++i)
|
||||
{
|
||||
nif->hwa[i] = 0;
|
||||
nif->broadcast[i] = 0xFF;
|
||||
}
|
||||
|
||||
for (i = 0; i < MAX_SUP_PROTO; ++i)
|
||||
{
|
||||
nif->protocol[i].protocol = 0;
|
||||
nif->protocol[i].handler = 0;
|
||||
nif->protocol[i].info = 0;
|
||||
}
|
||||
nif->num_protocol = 0;
|
||||
for (i = 0; i < MAX_SUP_PROTO; ++i)
|
||||
{
|
||||
nif->protocol[i].protocol = 0;
|
||||
nif->protocol[i].handler = 0;
|
||||
nif->protocol[i].info = 0;
|
||||
}
|
||||
nif->num_protocol = 0;
|
||||
|
||||
nif->mtu = 0;
|
||||
nif->ch = 0;
|
||||
nif->send = 0;
|
||||
nif->mtu = 0;
|
||||
nif->ch = 0;
|
||||
nif->send = 0;
|
||||
|
||||
nif->f_rx = 0;
|
||||
nif->f_tx = 0;
|
||||
nif->f_rx_err = 0;
|
||||
nif->f_tx_err = 0;
|
||||
nif->f_err = 0;
|
||||
nif->f_rx = 0;
|
||||
nif->f_tx = 0;
|
||||
nif->f_rx_err = 0;
|
||||
nif->f_tx_err = 0;
|
||||
nif->f_err = 0;
|
||||
|
||||
return nif;
|
||||
return nif;
|
||||
}
|
||||
|
||||
1050
net/tftp.c
1050
net/tftp.c
File diff suppressed because it is too large
Load Diff
@@ -42,9 +42,9 @@
|
||||
#define SREC_COUNT(a) (a)[1] /* length of valid bytes to follow */
|
||||
#define SREC_ADDR16(a) (256 * (a)[2] + (a)[3]) /* 2 byte address field */
|
||||
#define SREC_ADDR24(a) (0x10000 * (a)[2] + 0x100 * \
|
||||
(a)[3] + (a)[4]) /* 3 byte address field */
|
||||
(a)[3] + (a)[4]) /* 3 byte address field */
|
||||
#define SREC_ADDR32(a) (0x1000000 * a[2] + 0x10000 * \
|
||||
a[3] + 0x100 * (a)[4] + (a)[5]) /* 4 byte address field */
|
||||
a[3] + 0x100 * (a)[4] + (a)[5]) /* 4 byte address field */
|
||||
#define SREC_DATA16(a) ((uint8_t *)&((a)[4])) /* address of first byte of data in a record */
|
||||
#define SREC_DATA24(a) ((uint8_t *)&((a)[5])) /* address of first data byte in 24 bit record */
|
||||
#define SREC_DATA32(a) ((uint8_t *)&((a)[6])) /* adress of first byte of a record with 32 bit address field */
|
||||
@@ -67,13 +67,13 @@
|
||||
*/
|
||||
static uint8_t nibble_to_byte(uint8_t nibble)
|
||||
{
|
||||
if ((nibble >= '0') && (nibble <= '9'))
|
||||
return nibble - '0';
|
||||
else if ((nibble >= 'A' && nibble <= 'F'))
|
||||
return 10 + nibble - 'A';
|
||||
else if ((nibble >= 'a' && nibble <= 'f'))
|
||||
return 10 + nibble - 'a';
|
||||
return 0;
|
||||
if ((nibble >= '0') && (nibble <= '9'))
|
||||
return nibble - '0';
|
||||
else if ((nibble >= 'A' && nibble <= 'F'))
|
||||
return 10 + nibble - 'A';
|
||||
else if ((nibble >= 'a' && nibble <= 'f'))
|
||||
return 10 + nibble - 'a';
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -81,7 +81,7 @@ static uint8_t nibble_to_byte(uint8_t nibble)
|
||||
*/
|
||||
static uint8_t hex_to_byte(uint8_t hex[2])
|
||||
{
|
||||
return 16 * (nibble_to_byte(hex[0])) + (nibble_to_byte(hex[1]));
|
||||
return 16 * (nibble_to_byte(hex[0])) + (nibble_to_byte(hex[1]));
|
||||
}
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
@@ -90,7 +90,7 @@ static uint8_t hex_to_byte(uint8_t hex[2])
|
||||
*/
|
||||
static uint16_t hex_to_word(uint8_t hex[4])
|
||||
{
|
||||
return 256 * hex_to_byte(&hex[0]) + hex_to_byte(&hex[2]);
|
||||
return 256 * hex_to_byte(&hex[0]) + hex_to_byte(&hex[2]);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -98,7 +98,7 @@ static uint16_t hex_to_word(uint8_t hex[4])
|
||||
*/
|
||||
static uint32_t hex_to_long(uint8_t hex[8])
|
||||
{
|
||||
return 65536 * hex_to_word(&hex[0]) + hex_to_word(&hex[4]);
|
||||
return 65536 * hex_to_word(&hex[0]) + hex_to_word(&hex[4]);
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
@@ -109,46 +109,46 @@ static uint32_t hex_to_long(uint8_t hex[8])
|
||||
*/
|
||||
static uint8_t checksum(uint8_t arr[])
|
||||
{
|
||||
int i;
|
||||
uint8_t checksum = SREC_COUNT(arr);
|
||||
int i;
|
||||
uint8_t checksum = SREC_COUNT(arr);
|
||||
|
||||
for (i = 0; i < SREC_COUNT(arr) - 1; i++)
|
||||
{
|
||||
checksum += arr[i + 2];
|
||||
}
|
||||
return ~checksum;
|
||||
for (i = 0; i < SREC_COUNT(arr) - 1; i++)
|
||||
{
|
||||
checksum += arr[i + 2];
|
||||
}
|
||||
return ~checksum;
|
||||
}
|
||||
|
||||
void print_record(uint8_t *arr)
|
||||
{
|
||||
switch (SREC_TYPE(arr))
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
printf("type 0x%x ", SREC_TYPE(arr));
|
||||
printf("count 0x%x ", SREC_COUNT(arr));
|
||||
printf("addr 0x%x ", SREC_ADDR16(arr));
|
||||
printf("module %11.11s ", SREC_DATA16(arr));
|
||||
printf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
switch (SREC_TYPE(arr))
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
printf("type 0x%x ", SREC_TYPE(arr));
|
||||
printf("count 0x%x ", SREC_COUNT(arr));
|
||||
printf("addr 0x%x ", SREC_ADDR16(arr));
|
||||
printf("module %11.11s ", SREC_DATA16(arr));
|
||||
printf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
|
||||
case 3:
|
||||
case 7:
|
||||
{
|
||||
printf("type 0x%x ", SREC_TYPE(arr));
|
||||
printf("count 0x%x ", SREC_COUNT(arr));
|
||||
printf("addr 0x%x ", SREC_ADDR32(arr));
|
||||
printf("data %02x,%02x,%02x,%02x,... ",
|
||||
SREC_DATA32(arr)[0], SREC_DATA32(arr)[1], SREC_DATA32(arr)[3], SREC_DATA32(arr)[4]);
|
||||
printf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
case 3:
|
||||
case 7:
|
||||
{
|
||||
printf("type 0x%x ", SREC_TYPE(arr));
|
||||
printf("count 0x%x ", SREC_COUNT(arr));
|
||||
printf("addr 0x%x ", SREC_ADDR32(arr));
|
||||
printf("data %02x,%02x,%02x,%02x,... ",
|
||||
SREC_DATA32(arr)[0], SREC_DATA32(arr)[1], SREC_DATA32(arr)[3], SREC_DATA32(arr)[4]);
|
||||
printf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
printf("unsupported report type %d in print_record\r\n", arr[0]);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
printf("unsupported report type %d in print_record\r\n", arr[0]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -156,26 +156,26 @@ void print_record(uint8_t *arr)
|
||||
*/
|
||||
static void line_to_vector(uint8_t *buff, uint8_t *vector)
|
||||
{
|
||||
int i;
|
||||
int length;
|
||||
uint8_t *vp = vector;
|
||||
int i;
|
||||
int length;
|
||||
uint8_t *vp = vector;
|
||||
|
||||
length = hex_to_byte(buff + 2);
|
||||
length = hex_to_byte(buff + 2);
|
||||
|
||||
buff++;
|
||||
*vp++ = nibble_to_byte(*buff); /* record type. Only one single nibble */
|
||||
buff++;
|
||||
buff++;
|
||||
*vp++ = nibble_to_byte(*buff); /* record type. Only one single nibble */
|
||||
buff++;
|
||||
|
||||
for (i = 0; i <= length; i++)
|
||||
{
|
||||
*vp++ = hex_to_byte(buff);
|
||||
buff += 2;
|
||||
}
|
||||
for (i = 0; i <= length; i++)
|
||||
{
|
||||
*vp++ = hex_to_byte(buff);
|
||||
buff += 2;
|
||||
}
|
||||
}
|
||||
|
||||
static void vector_to_line(uint8_t *vector, uint8_t *buff)
|
||||
{
|
||||
sprintf(buff, "S");
|
||||
sprintf(buff, "S");
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -199,157 +199,157 @@ static void vector_to_line(uint8_t *vector, uint8_t *buff)
|
||||
*/
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
int fres;
|
||||
int set;
|
||||
char *filename = NULL;
|
||||
FILE *file;
|
||||
int ret = OK;
|
||||
int i;
|
||||
int fres;
|
||||
int set;
|
||||
char *filename = NULL;
|
||||
FILE *file;
|
||||
int ret = OK;
|
||||
int i;
|
||||
|
||||
|
||||
for (i = 1; i < argc; i++)
|
||||
{
|
||||
if (argv[i][0] == '-')
|
||||
{
|
||||
/* option */
|
||||
if (strcmp(argv[i], "-s") == 0)
|
||||
{
|
||||
set = 1;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
filename = argv[i];
|
||||
}
|
||||
}
|
||||
for (i = 1; i < argc; i++)
|
||||
{
|
||||
if (argv[i][0] == '-')
|
||||
{
|
||||
/* option */
|
||||
if (strcmp(argv[i], "-s") == 0)
|
||||
{
|
||||
set = 1;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
filename = argv[i];
|
||||
}
|
||||
}
|
||||
|
||||
if (filename == NULL)
|
||||
{
|
||||
fprintf(stderr, "no filename given\n");
|
||||
exit(1);
|
||||
}
|
||||
if (filename == NULL)
|
||||
{
|
||||
fprintf(stderr, "no filename given\n");
|
||||
exit(1);
|
||||
}
|
||||
|
||||
if ((file = fopen(filename, "r")) != NULL)
|
||||
{
|
||||
uint8_t line[80];
|
||||
int lineno = 0;
|
||||
int data_records = 0;
|
||||
bool found_block_header = false;
|
||||
bool found_block_end = false;
|
||||
bool found_block_data = false;
|
||||
if ((file = fopen(filename, "r")) != NULL)
|
||||
{
|
||||
uint8_t line[80];
|
||||
int lineno = 0;
|
||||
int data_records = 0;
|
||||
bool found_block_header = false;
|
||||
bool found_block_end = false;
|
||||
bool found_block_data = false;
|
||||
|
||||
while (ret == OK && (uint8_t *) fgets((char *) line, sizeof(line), file) != NULL)
|
||||
{
|
||||
lineno++;
|
||||
uint8_t vector[80];
|
||||
char str[255];
|
||||
int length;
|
||||
while (ret == OK && (uint8_t *) fgets((char *) line, sizeof(line), file) != NULL)
|
||||
{
|
||||
lineno++;
|
||||
uint8_t vector[80];
|
||||
char str[255];
|
||||
int length;
|
||||
|
||||
|
||||
|
||||
line_to_vector(line, vector); /* vector now contains the decoded contents of line, from line[1] on */
|
||||
line_to_vector(line, vector); /* vector now contains the decoded contents of line, from line[1] on */
|
||||
|
||||
if (line[0] == 'S')
|
||||
{
|
||||
char header[256];
|
||||
if (line[0] == 'S')
|
||||
{
|
||||
char header[256];
|
||||
|
||||
if (SREC_CHECKSUM(vector) != checksum(vector))
|
||||
{
|
||||
printf("invalid checksum 0x%x (should be 0x%x) in line %d\r\n",
|
||||
SREC_CHECKSUM(vector), checksum(vector), lineno);
|
||||
ret = FAIL;
|
||||
}
|
||||
if (SREC_CHECKSUM(vector) != checksum(vector))
|
||||
{
|
||||
printf("invalid checksum 0x%x (should be 0x%x) in line %d\r\n",
|
||||
SREC_CHECKSUM(vector), checksum(vector), lineno);
|
||||
ret = FAIL;
|
||||
}
|
||||
|
||||
switch (vector[0])
|
||||
{
|
||||
case 0: /* block header */
|
||||
found_block_header = true;
|
||||
if (found_block_data || found_block_end)
|
||||
{
|
||||
printf("S7 or S3 record found before S0: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
printf("address: 0x%04x\n", SREC_ADDR16(vector));
|
||||
printf("length of record: %d\n", SREC_COUNT(vector));
|
||||
length = SREC_DATA16_SIZE(vector) - (SREC_DATA16(vector) - vector);
|
||||
printf("length: %d\n", length);
|
||||
strncpy(str, SREC_DATA16(vector), length);
|
||||
str[length] = '\0';
|
||||
printf("Name: %s\n", str);
|
||||
printf("version: %d, revision %d\n",
|
||||
* (unsigned short *)((char *) SREC_DATA16(vector) + length),
|
||||
* (unsigned short *)((char *) SREC_DATA16(vector) + length + 1));
|
||||
print_record(vector);
|
||||
switch (vector[0])
|
||||
{
|
||||
case 0: /* block header */
|
||||
found_block_header = true;
|
||||
if (found_block_data || found_block_end)
|
||||
{
|
||||
printf("S7 or S3 record found before S0: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
printf("address: 0x%04x\n", SREC_ADDR16(vector));
|
||||
printf("length of record: %d\n", SREC_COUNT(vector));
|
||||
length = SREC_DATA16_SIZE(vector) - (SREC_DATA16(vector) - vector);
|
||||
printf("length: %d\n", length);
|
||||
strncpy(str, SREC_DATA16(vector), length);
|
||||
str[length] = '\0';
|
||||
printf("Name: %s\n", str);
|
||||
printf("version: %d, revision %d\n",
|
||||
* (unsigned short *)((char *) SREC_DATA16(vector) + length),
|
||||
* (unsigned short *)((char *) SREC_DATA16(vector) + length + 1));
|
||||
print_record(vector);
|
||||
|
||||
break;
|
||||
break;
|
||||
|
||||
case 2: /* three byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
printf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
// ret = callback((uint8_t *) SREC_ADDR24(vector), SREC_DATA24(vector), SREC_DATA24_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
case 2: /* three byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
printf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
// ret = callback((uint8_t *) SREC_ADDR24(vector), SREC_DATA24(vector), SREC_DATA24_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
|
||||
case 3: /* four byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
printf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
// ret = callback((uint8_t *) SREC_ADDR32(vector), SREC_DATA32(vector), SREC_DATA32_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
case 3: /* four byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
printf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
// ret = callback((uint8_t *) SREC_ADDR32(vector), SREC_DATA32(vector), SREC_DATA32_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
|
||||
case 7: /* four byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
printf("S7 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
//*start_address = (void *) SREC_ADDR32(vector);
|
||||
}
|
||||
break;
|
||||
case 7: /* four byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
printf("S7 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
//*start_address = (void *) SREC_ADDR32(vector);
|
||||
}
|
||||
break;
|
||||
|
||||
case 8: /* three byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
printf("S8 record found before S0 or after S8: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
//*start_address = (void *) SREC_ADDR24(vector);
|
||||
}
|
||||
break;
|
||||
case 8: /* three byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
printf("S8 record found before S0 or after S8: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
//*start_address = (void *) SREC_ADDR24(vector);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
printf("unsupported record type (%d) found in line %d\r\n", vector[0], lineno);
|
||||
printf("offending line: \r\n");
|
||||
printf("%s\r\n", line);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("illegal character ('%c') found on line %d: S-records corrupt?\r\n", line[0], lineno);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
fclose(file);
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("could not open file %s\r\n", filename);
|
||||
ret = FILE_OPEN;
|
||||
}
|
||||
return ret;
|
||||
default:
|
||||
printf("unsupported record type (%d) found in line %d\r\n", vector[0], lineno);
|
||||
printf("offending line: \r\n");
|
||||
printf("%s\r\n", line);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("illegal character ('%c') found on line %d: S-records corrupt?\r\n", line[0], lineno);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
fclose(file);
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("could not open file %s\r\n", filename);
|
||||
ret = FILE_OPEN;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -357,9 +357,9 @@ int main(int argc, char *argv[])
|
||||
*/
|
||||
static err_t simulate()
|
||||
{
|
||||
err_t ret = OK;
|
||||
err_t ret = OK;
|
||||
|
||||
return ret;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@@ -368,18 +368,13 @@ static err_t simulate()
|
||||
*/
|
||||
static err_t verify(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
{
|
||||
uint8_t *end = src + length;
|
||||
uint8_t *end = src + length;
|
||||
|
||||
do
|
||||
{
|
||||
if (*src++ != *dst++)
|
||||
return FAIL;
|
||||
} while (src < end);
|
||||
do
|
||||
{
|
||||
if (*src++ != *dst++)
|
||||
return FAIL;
|
||||
} while (src < end);
|
||||
|
||||
return OK;
|
||||
return OK;
|
||||
}
|
||||
|
||||
void srec_execute(char *flasher_filename)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
1154
pci/ehci-hcd.c
1154
pci/ehci-hcd.c
File diff suppressed because it is too large
Load Diff
183
pci/ohci-hcd.c
183
pci/ohci-hcd.c
@@ -49,19 +49,14 @@
|
||||
#include "pci.h"
|
||||
#include "interrupts.h"
|
||||
|
||||
// // #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
#undef OHCI_USE_NPS /* force NoPowerSwitching mode */
|
||||
|
||||
#undef OHCI_VERBOSE_DEBUG /* not always helpful */
|
||||
#undef OHCI_FILL_TRACE
|
||||
|
||||
#define DEBUG_OHCI
|
||||
#ifdef DEBUG_OHCI
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DEBUG_OHCI */
|
||||
#define err(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
|
||||
#include "usb.h"
|
||||
#include "ohci.h"
|
||||
#include "util.h" /* for endian conversions */
|
||||
@@ -79,7 +74,7 @@
|
||||
/*
|
||||
* do a longword read from addr and byteswap the result
|
||||
*/
|
||||
inline uint32_t readl(volatile uint32_t *addr)
|
||||
static inline uint32_t readl(volatile uint32_t *addr)
|
||||
{
|
||||
uint32_t res;
|
||||
|
||||
@@ -92,7 +87,7 @@ inline uint32_t readl(volatile uint32_t *addr)
|
||||
/*
|
||||
* byteswap value and write it to address
|
||||
*/
|
||||
inline void writel(uint32_t value, uint32_t *address)
|
||||
static inline void writel(uint32_t value, uint32_t *address)
|
||||
{
|
||||
// dbg("writing %08x to %08x\r\n", value, address);
|
||||
* (volatile uint32_t *) address = swpl(value);
|
||||
@@ -109,52 +104,52 @@ inline void writel(uint32_t value, uint32_t *address)
|
||||
|
||||
struct pci_device_id ohci_usb_pci_table[] =
|
||||
{
|
||||
{
|
||||
PCI_VENDOR_ID_AL,
|
||||
PCI_DEVICE_ID_AL_M5237,
|
||||
PCI_ANY_ID,
|
||||
PCI_ANY_ID,
|
||||
PCI_CLASS_SERIAL_USB_OHCI,
|
||||
0,
|
||||
0
|
||||
}, /* ULI1575 PCI OHCI module ids */
|
||||
{
|
||||
PCI_VENDOR_ID_NEC,
|
||||
PCI_DEVICE_ID_NEC_USB,
|
||||
PCI_ANY_ID,
|
||||
PCI_ANY_ID,
|
||||
PCI_CLASS_SERIAL_USB_OHCI,
|
||||
0,
|
||||
0
|
||||
}, /* NEC PCI OHCI module ids */
|
||||
{
|
||||
PCI_VENDOR_ID_NEC,
|
||||
PCI_DEVICE_ID_NEC_USB_A,
|
||||
PCI_ANY_ID,
|
||||
PCI_ANY_ID,
|
||||
PCI_CLASS_SERIAL_USB_OHCI,
|
||||
0,
|
||||
0
|
||||
}, /* NEC PCI OHCI module ids */
|
||||
{
|
||||
PCI_VENDOR_ID_PHILIPS,
|
||||
PCI_DEVICE_ID_PHILIPS_ISP1561,
|
||||
PCI_ANY_ID,
|
||||
PCI_ANY_ID,
|
||||
PCI_CLASS_SERIAL_USB_OHCI,
|
||||
0,
|
||||
0
|
||||
}, /* Philips 1561 PCI OHCI module ids */
|
||||
/* Please add supported PCI OHCI controller ids here */
|
||||
{
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0
|
||||
}
|
||||
{
|
||||
PCI_VENDOR_ID_AL,
|
||||
PCI_DEVICE_ID_AL_M5237,
|
||||
PCI_ANY_ID,
|
||||
PCI_ANY_ID,
|
||||
PCI_CLASS_SERIAL_USB_OHCI,
|
||||
0,
|
||||
0
|
||||
}, /* ULI1575 PCI OHCI module ids */
|
||||
{
|
||||
PCI_VENDOR_ID_NEC,
|
||||
PCI_DEVICE_ID_NEC_USB,
|
||||
PCI_ANY_ID,
|
||||
PCI_ANY_ID,
|
||||
PCI_CLASS_SERIAL_USB_OHCI,
|
||||
0,
|
||||
0
|
||||
}, /* NEC PCI OHCI module ids */
|
||||
{
|
||||
PCI_VENDOR_ID_NEC,
|
||||
PCI_DEVICE_ID_NEC_USB_A,
|
||||
PCI_ANY_ID,
|
||||
PCI_ANY_ID,
|
||||
PCI_CLASS_SERIAL_USB_OHCI,
|
||||
0,
|
||||
0
|
||||
}, /* NEC PCI OHCI module ids */
|
||||
{
|
||||
PCI_VENDOR_ID_PHILIPS,
|
||||
PCI_DEVICE_ID_PHILIPS_ISP1561,
|
||||
PCI_ANY_ID,
|
||||
PCI_ANY_ID,
|
||||
PCI_CLASS_SERIAL_USB_OHCI,
|
||||
0,
|
||||
0
|
||||
}, /* Philips 1561 PCI OHCI module ids */
|
||||
/* Please add supported PCI OHCI controller ids here */
|
||||
{
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0
|
||||
}
|
||||
};
|
||||
|
||||
/* global ohci_t */
|
||||
@@ -169,8 +164,8 @@ static inline uint32_t roothub_portstatus(ohci_t *ohci, int i) { return readl(&o
|
||||
/* forward declaration */
|
||||
static int hc_interrupt(ohci_t *ohci);
|
||||
static void td_submit_job(ohci_t *ohci, struct usb_device *dev, uint32_t pipe,
|
||||
void *buffer, int transfer_len, struct devrequest *setup,
|
||||
urb_priv_t *urb, int interval);
|
||||
void *buffer, int transfer_len, struct devrequest *setup,
|
||||
urb_priv_t *urb, int interval);
|
||||
|
||||
|
||||
static struct td *ptd;
|
||||
@@ -231,20 +226,20 @@ static int sohci_get_current_frame_number(ohci_t *ohci, struct usb_device *dev);
|
||||
* small: 0) header + data packets 1) just header */
|
||||
|
||||
static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
|
||||
uint32_t pipe, void *buffer, int transfer_len,
|
||||
struct devrequest *setup, char *str, int small)
|
||||
uint32_t pipe, void *buffer, int transfer_len,
|
||||
struct devrequest *setup, char *str, int small)
|
||||
{
|
||||
dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx\r\n",
|
||||
str,
|
||||
sohci_get_current_frame_number(ohci, dev),
|
||||
usb_pipedevice(pipe),
|
||||
usb_pipeendpoint(pipe),
|
||||
usb_pipeout(pipe)? 'O': 'I',
|
||||
usb_pipetype(pipe) < 2 ? \
|
||||
(usb_pipeint(pipe)? "INTR": "ISOC"): \
|
||||
(usb_pipecontrol(pipe)? "CTRL": "BULK"),
|
||||
(purb ? purb->actual_length : 0),
|
||||
transfer_len, dev->status);
|
||||
str,
|
||||
sohci_get_current_frame_number(ohci, dev),
|
||||
usb_pipedevice(pipe),
|
||||
usb_pipeendpoint(pipe),
|
||||
usb_pipeout(pipe)? 'O': 'I',
|
||||
usb_pipetype(pipe) < 2 ? \
|
||||
(usb_pipeint(pipe)? "INTR": "ISOC"): \
|
||||
(usb_pipecontrol(pipe)? "CTRL": "BULK"),
|
||||
(purb ? purb->actual_length : 0),
|
||||
transfer_len, dev->status);
|
||||
#ifdef OHCI_VERBOSE_DEBUG
|
||||
if (!small)
|
||||
{
|
||||
@@ -313,7 +308,7 @@ static void ohci_dump_intr_mask(char *label, uint32_t mask)
|
||||
(mask & OHCI_INTR_SF) ? " SF" : "",
|
||||
(mask & OHCI_INTR_WDH) ? " WDH" : "",
|
||||
(mask & OHCI_INTR_SO) ? " SO" : ""
|
||||
);
|
||||
);
|
||||
}
|
||||
|
||||
static void maybe_print_eds(ohci_t *controller, char *label, uint32_t value)
|
||||
@@ -375,7 +370,7 @@ static void ohci_dump_status(ohci_t *controller)
|
||||
(temp & OHCI_BLF) ? " BLF" : "",
|
||||
(temp & OHCI_CLF) ? " CLF" : "",
|
||||
(temp & OHCI_HCR) ? " HCR" : ""
|
||||
);
|
||||
);
|
||||
ohci_dump_intr_mask("intrstatus", readl(®s->intrstatus));
|
||||
ohci_dump_intr_mask("intrenable", readl(®s->intrenable));
|
||||
maybe_print_eds(controller, "ed_periodcurrent", readl(®s->ed_periodcurrent));
|
||||
@@ -395,7 +390,7 @@ static void ohci_dump_roothub(ohci_t *controller, int verbose)
|
||||
temp = roothub_a(controller);
|
||||
(void) temp;
|
||||
|
||||
// ndp = (temp & RH_A_NDP);
|
||||
// ndp = (temp & RH_A_NDP);
|
||||
ndp = controller->ndp;
|
||||
if (verbose)
|
||||
{
|
||||
@@ -423,7 +418,7 @@ static void ohci_dump_roothub(ohci_t *controller, int verbose)
|
||||
(temp & RH_HS_DRWE) ? " DRWE" : "",
|
||||
(temp & RH_HS_OCI) ? " OCI" : "",
|
||||
(temp & RH_HS_LPS) ? " LPS" : ""
|
||||
);
|
||||
);
|
||||
}
|
||||
|
||||
for (i = 0; i < ndp; i++)
|
||||
@@ -446,7 +441,7 @@ static void ohci_dump_roothub(ohci_t *controller, int verbose)
|
||||
|
||||
(temp & RH_PS_PES) ? " PES" : "",
|
||||
(temp & RH_PS_CCS) ? " CCS" : ""
|
||||
);
|
||||
);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -736,8 +731,8 @@ static int ep_link(ohci_t *ohci, ed_t *edi)
|
||||
{
|
||||
inter = 1;
|
||||
for (ed_p = &(ohci->hcca->int_table[ep_rev(5, i) + int_branch]);
|
||||
(*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
|
||||
ed_p = &(((ed_t *)ed_p)->hwNextED))
|
||||
(*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
|
||||
ed_p = &(((ed_t *)ed_p)->hwNextED))
|
||||
inter = ep_rev(6, ((ed_t *)ed_p)->int_interval);
|
||||
ed->hwNextED = *ed_p;
|
||||
*ed_p = swpl((uint32_t)ed - ohci->dma_offset);
|
||||
@@ -869,11 +864,11 @@ static ed_t *ep_add_ed(ohci_t *ohci, struct usb_device *usb_dev, uint32_t pipe,
|
||||
}
|
||||
|
||||
ed->hwINFO = swpl(usb_pipedevice(pipe)
|
||||
| usb_pipeendpoint(pipe) << 7
|
||||
| (usb_pipeisoc(pipe)? 0x8000: 0)
|
||||
| (usb_pipecontrol(pipe)? 0: (usb_pipeout(pipe)? 0x800: 0x1000))
|
||||
| usb_pipeslow(pipe) << 13
|
||||
| usb_maxpacket(usb_dev, pipe) << 16);
|
||||
| usb_pipeendpoint(pipe) << 7
|
||||
| (usb_pipeisoc(pipe)? 0x8000: 0)
|
||||
| (usb_pipecontrol(pipe)? 0: (usb_pipeout(pipe)? 0x800: 0x1000))
|
||||
| usb_pipeslow(pipe) << 13
|
||||
| usb_maxpacket(usb_dev, pipe) << 16);
|
||||
|
||||
if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK)
|
||||
{
|
||||
@@ -943,14 +938,14 @@ static void td_fill(ohci_t *ohci, unsigned int info, void *data, int len,
|
||||
{
|
||||
int i;
|
||||
dbg("td_fill: %08x %08x %08X %08X at 0x%08X\r\n",
|
||||
swpl(td->hwINFO), swpl(td->hwCBP), swpl(td->hwNextTD), swpl(td->hwBE), td);
|
||||
swpl(td->hwINFO), swpl(td->hwCBP), swpl(td->hwNextTD), swpl(td->hwBE), td);
|
||||
for (i = 0; i < len; i++)
|
||||
dbg("%02X ", *(unsigned char *)(data + i) & 0xff);
|
||||
dbg("\r\n");
|
||||
}
|
||||
else
|
||||
dbg("td_fill: %08x %08x %08X %08X at 0x%08X\r\n",
|
||||
swpl(td->hwINFO), swpl(td->hwCBP), swpl(td->hwNextTD), swpl(td->hwBE), td);
|
||||
swpl(td->hwINFO), swpl(td->hwCBP), swpl(td->hwNextTD), swpl(td->hwBE), td);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -959,8 +954,8 @@ static void td_fill(ohci_t *ohci, unsigned int info, void *data, int len,
|
||||
/* prepare all TDs of a transfer */
|
||||
|
||||
static void td_submit_job(ohci_t *ohci, struct usb_device *dev, uint32_t pipe,
|
||||
void *buffer, int transfer_len, struct devrequest *setup,
|
||||
urb_priv_t *urb, int interval)
|
||||
void *buffer, int transfer_len, struct devrequest *setup,
|
||||
urb_priv_t *urb, int interval)
|
||||
{
|
||||
int data_len = transfer_len;
|
||||
void *data;
|
||||
@@ -1258,7 +1253,7 @@ static uint8_t root_hub_config_des[] =
|
||||
0x01, /* uint8_t bConfigurationValue; */
|
||||
0x00, /* uint8_t iConfiguration; */
|
||||
0x40, /* uint8_t bmAttributes;
|
||||
Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
|
||||
Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
|
||||
0x00, /* uint8_t MaxPower; */
|
||||
|
||||
/* interface */
|
||||
@@ -1344,7 +1339,7 @@ int rh_check_port_status(ohci_t *controller)
|
||||
uint32_t temp, ndp, i;
|
||||
int res = -1;
|
||||
temp = roothub_a(controller);
|
||||
// ndp = (temp & RH_A_NDP);
|
||||
// ndp = (temp & RH_A_NDP);
|
||||
ndp = controller->ndp;
|
||||
for (i = 0; i < ndp; i++)
|
||||
{
|
||||
@@ -1368,7 +1363,7 @@ int rh_check_port_status(ohci_t *controller)
|
||||
}
|
||||
|
||||
static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev, uint32_t pipe,
|
||||
void *buffer, int transfer_len, struct devrequest *cmd)
|
||||
void *buffer, int transfer_len, struct devrequest *cmd)
|
||||
{
|
||||
void *data = buffer;
|
||||
int leni = transfer_len;
|
||||
@@ -1524,7 +1519,7 @@ static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev, uint32_t pip
|
||||
uint32_t temp = roothub_a(ohci);
|
||||
data_buf[0] = 9; /* min length; */
|
||||
data_buf[1] = 0x29;
|
||||
// data_buf[2] = temp & RH_A_NDP;
|
||||
// data_buf[2] = temp & RH_A_NDP;
|
||||
data_buf[2] = (uint8_t)ohci->ndp;
|
||||
data_buf[3] = 0;
|
||||
|
||||
@@ -1607,7 +1602,7 @@ static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev, uint32_t pip
|
||||
*/
|
||||
|
||||
static int submit_common_msg(ohci_t *ohci, struct usb_device *dev, uint32_t pipe, void *buffer,
|
||||
int transfer_len, struct devrequest *setup, int interval)
|
||||
int transfer_len, struct devrequest *setup, int interval)
|
||||
{
|
||||
int stat = 0;
|
||||
int maxsize = usb_maxpacket(dev, pipe);
|
||||
@@ -1688,7 +1683,7 @@ static int submit_common_msg(ohci_t *ohci, struct usb_device *dev, uint32_t pipe
|
||||
}
|
||||
else
|
||||
#endif
|
||||
stat = hc_interrupt(ohci);
|
||||
stat = hc_interrupt(ohci);
|
||||
if (stat < 0)
|
||||
{
|
||||
dbg("USB CRC error\r\n");
|
||||
@@ -1820,7 +1815,7 @@ static int hc_reset(ohci_t *ohci)
|
||||
uint32_t id = 0;
|
||||
id = pci_read_config_longword(handle, PCIIDR);
|
||||
if ((PCI_VENDOR_ID_PHILIPS == (id & 0xFFFF)) && (PCI_DEVICE_ID_PHILIPS_ISP1561_2 == (id >> 16)))
|
||||
{
|
||||
{
|
||||
int timeout = 1000;
|
||||
uint32_t usb_base_addr = 0xFFFFFFFF;
|
||||
struct pci_rd *pci_rsc_desc;
|
||||
@@ -1859,7 +1854,7 @@ static int hc_reset(ohci_t *ohci)
|
||||
}
|
||||
|
||||
if ((ohci->controller == 0) && (ohci->ent->vendor == PCI_VENDOR_ID_NEC)
|
||||
&& (ohci->ent->device == PCI_DEVICE_ID_NEC_USB))
|
||||
&& (ohci->ent->device == PCI_DEVICE_ID_NEC_USB))
|
||||
{
|
||||
//if (ohci->handle == 1) /* NEC on motherboard has FPGA clock */
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
|
||||
479
pci/pci.c
479
pci/pci.c
@@ -26,6 +26,7 @@
|
||||
|
||||
#include <MCF5475.h>
|
||||
#include "pci.h"
|
||||
#include "pci_errata.h"
|
||||
#include "bas_types.h"
|
||||
#include "bas_printf.h"
|
||||
#include "bas_string.h"
|
||||
@@ -33,13 +34,8 @@
|
||||
#include "interrupts.h"
|
||||
#include "wait.h"
|
||||
|
||||
//#define DEBUG_PCI
|
||||
#ifdef DEBUG_PCI
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DEBUG_PCI */
|
||||
#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
// #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
#define pci_config_wait() do { __asm__ __volatile("tpf" ::: "memory"); } while (0)
|
||||
|
||||
@@ -52,38 +48,36 @@ static struct pci_class
|
||||
char *description;
|
||||
} pci_classes[] =
|
||||
{
|
||||
{ 0x00, "device was built prior definition of the class code field" },
|
||||
{ 0x01, "Mass Storage Controller" },
|
||||
{ 0x02, "Network Controller" },
|
||||
{ 0x03, "Display Controller" },
|
||||
{ 0x04, "Multimedia Controller" },
|
||||
{ 0x05, "Memory Controller" },
|
||||
{ 0x06, "Bridge Device" },
|
||||
{ 0x07, "Simple Communication Controller" },
|
||||
{ 0x08, "Base System Peripherial" },
|
||||
{ 0x09, "Input Device" },
|
||||
{ 0x0a, "Docking Station" },
|
||||
{ 0x0b, "Processor" },
|
||||
{ 0x0c, "Serial Bus Controller" },
|
||||
{ 0x0d, "Wireless Controller" },
|
||||
{ 0x0e, "Intelligent I/O Controller" },
|
||||
{ 0x0f, "Satellite Communication Controller" },
|
||||
{ 0x10, "Encryption/Decryption Controller" },
|
||||
{ 0x11, "Data Acquisition and Signal Processing Controller" },
|
||||
{ 0xff, "Device does not fit any defined class" },
|
||||
{ 0x00, "device was built prior definition of the class code field" },
|
||||
{ 0x01, "Mass Storage Controller" },
|
||||
{ 0x02, "Network Controller" },
|
||||
{ 0x03, "Display Controller" },
|
||||
{ 0x04, "Multimedia Controller" },
|
||||
{ 0x05, "Memory Controller" },
|
||||
{ 0x06, "Bridge Device" },
|
||||
{ 0x07, "Simple Communication Controller" },
|
||||
{ 0x08, "Base System Peripherial" },
|
||||
{ 0x09, "Input Device" },
|
||||
{ 0x0a, "Docking Station" },
|
||||
{ 0x0b, "Processor" },
|
||||
{ 0x0c, "Serial Bus Controller" },
|
||||
{ 0x0d, "Wireless Controller" },
|
||||
{ 0x0e, "Intelligent I/O Controller" },
|
||||
{ 0x0f, "Satellite Communication Controller" },
|
||||
{ 0x10, "Encryption/Decryption Controller" },
|
||||
{ 0x11, "Data Acquisition and Signal Processing Controller" },
|
||||
{ 0xff, "Device does not fit any defined class" },
|
||||
};
|
||||
static int num_pci_classes = sizeof(pci_classes) / sizeof(struct pci_class);
|
||||
|
||||
#define NUM_CARDS 10
|
||||
#define NUM_RESOURCES 7
|
||||
/* holds the handle of a card at position = array index */
|
||||
static int32_t handles[NUM_CARDS];
|
||||
static int32_t handles[NUM_CARDS] = { -1 };
|
||||
|
||||
/* holds the card's resource descriptors; filled in pci_device_config() */
|
||||
static struct pci_rd resource_descriptors[NUM_CARDS][NUM_RESOURCES];
|
||||
|
||||
typedef int (*pci_interrupt_handler)(int param);
|
||||
|
||||
/*
|
||||
* holds the interrupt handler addresses (see pci_hook_interrupt()
|
||||
* and pci_unhook_interrupt()) of the PCI cards
|
||||
@@ -100,65 +94,6 @@ struct pci_interrupt
|
||||
#define MAX_INTERRUPTS (NUM_CARDS * 3)
|
||||
static struct pci_interrupt interrupts[MAX_INTERRUPTS];
|
||||
|
||||
static inline __attribute__((aligned(16))) void chip_errata_135(void)
|
||||
{
|
||||
/*
|
||||
* Errata type: Silicon
|
||||
* Affected component: PCI
|
||||
* Description: When core PCI transactions that involve writes to configuration or I/O space
|
||||
* are followed by a core line access to line addresses 0x4 and 0xC, core access
|
||||
* to the XL bus can hang.
|
||||
* Workaround: Prevent PCI configuration and I/O writes from being followed by the described
|
||||
* line access by the core by generating a known good XL bus transaction after
|
||||
* the PCI transaction.
|
||||
* Create a dummy function which is called immediately after each of the affected
|
||||
* transactions. There are three requirements for this dummy function.
|
||||
* 1. The function must be aligned to a 16-byte boundary.
|
||||
* 2. The function must contain a dummy write to a location on the XL bus,
|
||||
* preferably one with no side effects.
|
||||
* 3. The function must be longer than 32 bytes. If it is not, the function should
|
||||
* be padded with 16- or 48-bit TPF instructions placed after the end of
|
||||
* the function (after the RTS instruction) such that the length is longer
|
||||
* than 32 bytes.
|
||||
*/
|
||||
|
||||
__asm__ __volatile(
|
||||
" .extern __MBAR \n\t"
|
||||
" clr.l d0 \n\t"
|
||||
" move.l d0,__MBAR+0xF0C \n\t" /* Must use direct addressing. write to EPORT module */
|
||||
/* xlbus -> slavebus -> eport, writing '0' to register */
|
||||
/* has no effect */
|
||||
" rts \n\t"
|
||||
" tpf.l #0x0 \n\t"
|
||||
" tpf.l #0x0 \n\t"
|
||||
" tpf.l #0x0 \n\t"
|
||||
" tpf.l #0x0 \n\t"
|
||||
" tpf.l #0x0 \n\t"
|
||||
::: "memory");
|
||||
}
|
||||
|
||||
static inline void chip_errata_055(int32_t handle)
|
||||
{
|
||||
uint32_t dummy;
|
||||
|
||||
return; /* test */
|
||||
|
||||
/* initiate PCI configuration access to device */
|
||||
MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */
|
||||
MCF_PCI_PCICAR_BUSNUM(3) | /* note: invalid bus number */
|
||||
MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */
|
||||
MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */
|
||||
MCF_PCI_PCICAR_DWORD(0);
|
||||
|
||||
/* issue a dummy read to an unsupported bus number (will fail) */
|
||||
dummy = * (volatile uint32_t *) PCI_IO_OFFSET; /* access device */
|
||||
|
||||
/* silently clear the PCI errors we produced just now */
|
||||
MCF_PCI_PCIISR = 0xffffffff; /* clear all errors */
|
||||
MCF_PCI_PCIGSCR = MCF_PCI_PCIGSCR_PE | MCF_PCI_PCIGSCR_SE;
|
||||
|
||||
(void) dummy;
|
||||
}
|
||||
|
||||
/*
|
||||
* Although this pragma stuff should work according to the GCC docs, it doesn't seem to
|
||||
@@ -175,15 +110,16 @@ int32_t pci_get_interrupt_cause(void)
|
||||
/*
|
||||
* loop through all PCI devices...
|
||||
*/
|
||||
dbg("");
|
||||
while ((handle = *hdl++) != -1)
|
||||
{
|
||||
uint16_t command_register = swpw(pci_read_config_word(handle, PCICR));
|
||||
uint16_t status_register = swpw(pci_read_config_word(handle, PCISR));
|
||||
uint16_t command_register = swpw(pci_read_config_word(handle, PCI_LANESWAP_W(PCICR)));
|
||||
uint16_t status_register = swpw(pci_read_config_word(handle, PCI_LANESWAP_W(PCISR)));
|
||||
|
||||
/*
|
||||
* ...to see which device caused the interrupt
|
||||
*/
|
||||
if ((status_register & PCICSR_INTERRUPT) && !(command_register & PCICSR_INT_DISABLE))
|
||||
if ((status_register & PCISR_INTERRUPT) && !(command_register & PCICR_INT_DISABLE))
|
||||
{
|
||||
/* device has interrupts enabled and has an active interrupt, so its probably ours */
|
||||
|
||||
@@ -198,6 +134,7 @@ int32_t pci_call_interrupt_chain(int32_t handle, int32_t data)
|
||||
{
|
||||
int i;
|
||||
|
||||
dbg("");
|
||||
for (i = 0; i < MAX_INTERRUPTS; i++)
|
||||
{
|
||||
if (interrupts[i].handle == handle)
|
||||
@@ -244,7 +181,7 @@ static char *device_class(int classcode)
|
||||
return pci_classes[i].description;
|
||||
}
|
||||
}
|
||||
return "not found";
|
||||
return "unknown device class";
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -300,11 +237,6 @@ static int pci_check_status(void)
|
||||
|
||||
ret = 1;
|
||||
}
|
||||
|
||||
if (!ret)
|
||||
{
|
||||
dbg("no error\r\n");
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -353,7 +285,7 @@ uint16_t pci_read_config_word(int32_t handle, int offset)
|
||||
|
||||
NOP();
|
||||
|
||||
value = * (volatile uint16_t *) PCI_IO_OFFSET + (offset & 2);
|
||||
value = * (volatile uint16_t *) (PCI_IO_OFFSET + (offset & 2));
|
||||
|
||||
NOP();
|
||||
|
||||
@@ -371,10 +303,10 @@ uint8_t pci_read_config_byte(int32_t handle, int offset)
|
||||
|
||||
/* initiate PCI configuration access to device */
|
||||
MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */
|
||||
MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) |
|
||||
MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */
|
||||
MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */
|
||||
MCF_PCI_PCICAR_DWORD(offset / 4);
|
||||
MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) |
|
||||
MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */
|
||||
MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */
|
||||
MCF_PCI_PCICAR_DWORD(offset / 4);
|
||||
|
||||
NOP();
|
||||
|
||||
@@ -397,15 +329,19 @@ uint8_t pci_read_config_byte(int32_t handle, int offset)
|
||||
int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t value)
|
||||
{
|
||||
/* initiate PCI configuration access to device */
|
||||
MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */
|
||||
MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) |
|
||||
MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */
|
||||
MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */
|
||||
MCF_PCI_PCICAR_DWORD(offset / 4);
|
||||
|
||||
MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */
|
||||
MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) |
|
||||
MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */
|
||||
MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */
|
||||
MCF_PCI_PCICAR_DWORD(offset / 4);
|
||||
|
||||
chip_errata_135();
|
||||
NOP();
|
||||
|
||||
* (volatile uint32_t *) PCI_IO_OFFSET = value; /* access device */
|
||||
|
||||
dbg("chip errata\r\n");
|
||||
chip_errata_135();
|
||||
|
||||
NOP();
|
||||
@@ -429,12 +365,14 @@ int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value)
|
||||
MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) |
|
||||
MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) |
|
||||
MCF_PCI_PCICAR_DWORD(offset / 4);
|
||||
|
||||
chip_errata_135();
|
||||
|
||||
NOP();
|
||||
|
||||
* (volatile uint16_t *) (PCI_IO_OFFSET + (offset & 2)) = value;
|
||||
chip_errata_135();
|
||||
NOP();
|
||||
|
||||
/* finish configuration space access cycle */
|
||||
MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;
|
||||
@@ -461,7 +399,8 @@ int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value)
|
||||
* (volatile uint8_t *) (PCI_IO_OFFSET + (offset & 3)) = value;
|
||||
chip_errata_135();
|
||||
|
||||
__asm__ __volatile__("tpf" ::: "memory");
|
||||
NOP();
|
||||
|
||||
|
||||
/* finish configuration space access cycle */
|
||||
MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;
|
||||
@@ -470,6 +409,7 @@ int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value)
|
||||
|
||||
return PCI_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/*
|
||||
* pci_get_resource
|
||||
*
|
||||
@@ -517,11 +457,11 @@ int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index)
|
||||
uint8_t htr;
|
||||
|
||||
handle = PCI_HANDLE(bus, device, 0);
|
||||
value = pci_read_config_longword(handle, PCIIDR);
|
||||
value = swpl(pci_read_config_longword(handle, PCIIDR));
|
||||
if (value != 0xffffffff) /* we have a device at this position */
|
||||
{
|
||||
if (vendor_id == 0xffff ||
|
||||
(PCI_VENDOR_ID(value) == vendor_id && PCI_DEVICE_ID(value) == device_id))
|
||||
(PCI_VENDOR_ID(value) == vendor_id && PCI_DEVICE_ID(value) == device_id))
|
||||
{
|
||||
if (n == index)
|
||||
{
|
||||
@@ -535,18 +475,18 @@ int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index)
|
||||
* Check to see if it is a multi-function device. We need to look "behind" it
|
||||
* for the other functions in that case.
|
||||
*/
|
||||
if ((htr = pci_read_config_byte(handle, PCIHTR)) & 0x80)
|
||||
if ((htr = pci_read_config_byte(handle, PCI_LANESWAP_B(PCIHTR))) & 0x80)
|
||||
{
|
||||
/* yes, this is a multi-function device, look for more functions */
|
||||
|
||||
for (function = 1; function < 8; function++)
|
||||
{
|
||||
handle = PCI_HANDLE(bus, device, function);
|
||||
value = pci_read_config_longword(handle, PCIIDR);
|
||||
value = swpl(pci_read_config_longword(handle, PCIIDR));
|
||||
if (value != 0xffffffff) /* device found */
|
||||
{
|
||||
if (vendor_id == 0xffff ||
|
||||
(PCI_VENDOR_ID(value) == vendor_id && PCI_DEVICE_ID(value) == device_id))
|
||||
((PCI_VENDOR_ID(value) == vendor_id) && (PCI_DEVICE_ID(value) == device_id)))
|
||||
{
|
||||
if (n == index)
|
||||
{
|
||||
@@ -563,81 +503,61 @@ int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index)
|
||||
return PCI_DEVICE_NOT_FOUND;
|
||||
}
|
||||
|
||||
static bool match_classcode(uint32_t handle, uint32_t classcode)
|
||||
{
|
||||
uint8_t find_mask = (classcode >> 24) & 0xff;
|
||||
uint32_t value = swpl(pci_read_config_longword(handle, PCICCR));
|
||||
int i;
|
||||
|
||||
classcode &= 0x00ffffff;
|
||||
value >>= 8; /* shift away revision id */
|
||||
|
||||
//dbg("classcode=0x%08x, value=0x%08x\r\n", classcode, value);
|
||||
|
||||
for (i = 0; i < 3; i++) /* loop through mask */
|
||||
{
|
||||
if ((find_mask >> i) & 1)
|
||||
{
|
||||
//dbg("compare 0x%02x against 0x%02x\r\n", value & 0xff, classcode & 0xff);
|
||||
if ((value & 0xff) != (classcode & 0xff))
|
||||
return false;
|
||||
//dbg("match\r\n");
|
||||
classcode >>= 8;
|
||||
}
|
||||
value >>= 8;
|
||||
//dbg("value=0x%08x\r\n", value);
|
||||
}
|
||||
dbg("return true\r\n");
|
||||
return true;
|
||||
}
|
||||
|
||||
/*
|
||||
* pci_find_classcode(uint32_t classcode, int index)
|
||||
*
|
||||
* Find the index'th pci device with a specific classcode. Bits 0-23 describe this classcode.
|
||||
*
|
||||
* Bits 24 - 26 describe what needs to match: 24: prog interface, 25: PCI subclass, 26: PCI base class.
|
||||
* If no bits are set, there is a match for each device.
|
||||
*/
|
||||
int32_t pci_find_classcode(uint32_t classcode, int index)
|
||||
{
|
||||
uint16_t bus;
|
||||
uint16_t device;
|
||||
uint16_t function = 0;
|
||||
uint16_t n = 0;
|
||||
int32_t handle;
|
||||
int i;
|
||||
uint32_t handle;
|
||||
int n = 0;
|
||||
|
||||
for (bus = 0; bus < 2; bus++)
|
||||
for (i = 0; (handle = handles[i]) != -1; i++)
|
||||
{
|
||||
for (device = 10; device < 31; device++)
|
||||
dbg("handle=0x%x, n=%d, index=%d\r\n", handle, n, index);
|
||||
if (match_classcode(handle, classcode))
|
||||
{
|
||||
uint32_t value;
|
||||
uint8_t htr;
|
||||
|
||||
handle = PCI_HANDLE(bus, device, 0);
|
||||
|
||||
value = pci_read_config_longword(handle, PCIIDR);
|
||||
|
||||
if (value != 0xffffffff) /* device found */
|
||||
{
|
||||
value = pci_read_config_longword(handle, PCICCR);
|
||||
|
||||
if ((classcode & (1 << 26) ? ((PCI_CLASS_CODE(value) == (classcode & 0xff))) : true) &&
|
||||
(classcode & (1 << 25) ? ((PCI_SUBCLASS(value) == ((classcode & 0xff00) >> 8))) : true) &&
|
||||
(classcode & (1 << 24) ? ((PCI_PROG_IF(value) == ((classcode & 0xff0000) >> 16))) : true))
|
||||
{
|
||||
if (n == index)
|
||||
{
|
||||
return handle;
|
||||
}
|
||||
n++;
|
||||
}
|
||||
|
||||
/*
|
||||
* there is a device at this position, but not the one we are looking for.
|
||||
* Check to see if it is a multi-function device. We need to look "behind" it
|
||||
* for the other functions in that case.
|
||||
*/
|
||||
if ((htr = pci_read_config_byte(handle, PCIHTR)) & 0x80)
|
||||
{
|
||||
/* yes, this is a multi-function device, look for more functions */
|
||||
|
||||
for (function = 1; function < 8; function++)
|
||||
{
|
||||
handle = PCI_HANDLE(bus, device, function);
|
||||
value = pci_read_config_longword(handle, PCIIDR);
|
||||
|
||||
if (value != 0xffffffff) /* device found */
|
||||
{
|
||||
value = pci_read_config_longword(handle, PCICCR);
|
||||
|
||||
if ((classcode & (1 << 26) ? ((PCI_CLASS_CODE(value) == (classcode & 0xff))) : true) &&
|
||||
(classcode & (1 << 25) ? ((PCI_SUBCLASS(value) == ((classcode & 0xff00) >> 8))) : true) &&
|
||||
(classcode & (1 << 24) ? ((PCI_PROG_IF(value) == ((classcode & 0xff0000) >> 16))) : true))
|
||||
{
|
||||
if (n == index)
|
||||
{
|
||||
return handle;
|
||||
}
|
||||
n++;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
if (n == index)
|
||||
return handle;
|
||||
else
|
||||
n++;
|
||||
}
|
||||
}
|
||||
|
||||
dbg("not found\r\n");
|
||||
return PCI_DEVICE_NOT_FOUND;
|
||||
}
|
||||
|
||||
@@ -645,7 +565,7 @@ int32_t pci_hook_interrupt(int32_t handle, void *handler, void *parameter)
|
||||
{
|
||||
int i;
|
||||
|
||||
pci_interrupt_handler h = handler;
|
||||
// pci_interrupt_handler h = handler;
|
||||
|
||||
/*
|
||||
* find empty slot
|
||||
@@ -883,9 +803,9 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
|
||||
* disable device
|
||||
*/
|
||||
|
||||
cr = swpw(pci_read_config_word(handle, PCICSR));
|
||||
cr = swpw(pci_read_config_word(handle, PCI_LANESWAP_W(PCICR)));
|
||||
cr &= ~3; /* disable device response to address */
|
||||
pci_write_config_word(handle, PCICSR, swpw(cr));
|
||||
pci_write_config_word(handle, PCI_LANESWAP_W(PCICR), swpw(cr));
|
||||
|
||||
int barnum = 0;
|
||||
|
||||
@@ -913,8 +833,8 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
|
||||
if (IS_PCI_MEM_BAR(address))
|
||||
{
|
||||
/* adjust base address to card's alignment requirements */
|
||||
int size = ~(address & 0xfffffff0) + 1;
|
||||
dbg("device 0x%x: BAR[%d] requests %d bytes of memory\r\n", handle, i / 4, size);
|
||||
size_t size = ~(address & 0xfffffff0) + 1;
|
||||
dbg("device 0x%02x: BAR[%d] requests %ld kBytes of memory\r\n", handle, i / 4, size / 1024);
|
||||
|
||||
/* calculate a valid map adress with alignment requirements */
|
||||
address = (mem_address + size - 1) & ~(size - 1);
|
||||
@@ -926,11 +846,11 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
|
||||
value = swpl(pci_read_config_longword(handle, PCIBAR0 + i)) & ~1;
|
||||
|
||||
dbg("set PCIBAR%d on device 0x%02x to 0x%08x\r\n",
|
||||
i / 4, handle, value);
|
||||
i / 4, handle, value);
|
||||
|
||||
/* fill resource descriptor */
|
||||
rd->next = sizeof(struct pci_rd);
|
||||
rd->flags = 0 | FLG_32BIT | FLG_16BIT | FLG_8BIT | 2; /* little endian, lane swapped */
|
||||
rd->flags = 0 | FLG_32BIT | FLG_16BIT | FLG_8BIT | ORD_INTEL_LS; /* little endian, lane swapped */
|
||||
rd->start = address;
|
||||
rd->length = size;
|
||||
rd->offset = 0;
|
||||
@@ -975,7 +895,6 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
|
||||
/*
|
||||
* check if we have an expansion ROM
|
||||
*/
|
||||
value = swpl(pci_read_config_longword(handle, PCIERBAR));
|
||||
|
||||
/*
|
||||
* write all bits of PCIERBAR
|
||||
@@ -988,8 +907,15 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
|
||||
address = swpl(pci_read_config_longword(handle, PCIERBAR));
|
||||
if (address & 1)
|
||||
{
|
||||
/*
|
||||
* there is a ROM
|
||||
*/
|
||||
|
||||
struct pci_rd *rd = &descriptors[barnum];
|
||||
int size = ~(address & ~0x7ff);
|
||||
int size = ~(address & ~0x7ff) + 1;
|
||||
|
||||
dbg("expansion ROM requested size=0x%08x\r\n", size);
|
||||
dbg("device 0x%02x: requests %ld kBytes for expansion ROM\r\n", handle, size / 1024);
|
||||
|
||||
/* expansion ROM active and mapped */
|
||||
|
||||
@@ -1011,6 +937,7 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
|
||||
rd->length = size;
|
||||
rd->dmaoffset = 0;
|
||||
|
||||
cr |= 2; /* enable Memory */
|
||||
mem_address += size;
|
||||
barnum++;
|
||||
}
|
||||
@@ -1020,19 +947,17 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
|
||||
descriptors[barnum - 1].flags |= FLG_LAST;
|
||||
|
||||
/* check if device requests an interrupt */
|
||||
il = pci_read_config_byte(handle, PCIIPR);
|
||||
il = pci_read_config_byte(handle, PCI_LANESWAP_B(PCIIPR));
|
||||
dbg("device requests interrupts on interrupt pin %d\r\n", il);
|
||||
|
||||
/* enable interrupt on PCI device */
|
||||
/* disable interrupt on PCI device */
|
||||
|
||||
il = pci_read_config_byte(handle, PCICR);
|
||||
il &= ~PCICSR_INT_DISABLE;
|
||||
pci_write_config_byte(handle, PCICR, il);
|
||||
cr |= PCICR_INT_DISABLE;
|
||||
|
||||
/*
|
||||
* enable device memory or I/O access
|
||||
*/
|
||||
pci_write_config_word(handle, PCICSR, swpw(cr));
|
||||
pci_write_config_word(handle, PCI_LANESWAP_W(PCICR), swpw(cr));
|
||||
}
|
||||
|
||||
static void pci_bridge_config(uint16_t bus, uint16_t device, uint16_t function)
|
||||
@@ -1041,14 +966,24 @@ static void pci_bridge_config(uint16_t bus, uint16_t device, uint16_t function)
|
||||
|
||||
if (function != 0)
|
||||
{
|
||||
dbg("trying to configure a multi-function bridge. Cancelled\r\n");
|
||||
err("trying to configure a multi-function bridge. Cancelled\r\n");
|
||||
return;
|
||||
}
|
||||
handle = PCI_HANDLE(bus, device, function);
|
||||
dbg("handle=%d\r\n", handle);
|
||||
|
||||
pci_write_config_longword(handle, PCIBAR0, 0x40000000);
|
||||
pci_write_config_longword(handle, PCIBISTR, MCF_PCI_PCICR1_CACHELINESIZE(8) |
|
||||
MCF_PCI_PCICR1_LATTIMER(0x20));
|
||||
pci_write_config_longword(handle, PCIBAR0, swpl(0x40000000));
|
||||
pci_write_config_longword(handle, PCIBAR1, 0x0);
|
||||
pci_write_config_longword(handle, PCICSR, 0x146);
|
||||
pci_write_config_word(handle, PCI_LANESWAP_W(PCICR), swpw(
|
||||
(1 << 1) /* memory space */
|
||||
| (1 << 2) /* bus master */
|
||||
| (1 << 4) /* memory write and invalidate */
|
||||
| (1 << 6) /* parity errors */
|
||||
| (1 << 8) /* SERR */
|
||||
| (1 << 9) /* fast back-to-back */
|
||||
));
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -1068,31 +1003,37 @@ void pci_scan(void)
|
||||
{
|
||||
uint32_t value;
|
||||
|
||||
value = pci_read_config_longword(handle, PCIIDR);
|
||||
xprintf(" %02x | %02x | %02x |%04x|%04x|%04x| %s (0x%02x)\r\n",
|
||||
value = swpl(pci_read_config_longword(handle, PCIIDR));
|
||||
|
||||
xprintf(" %02x | %02x | %02x |%04x|%04x|%04x| %s (0x%02x, 0x%04x)\r\n",
|
||||
PCI_BUS_FROM_HANDLE(handle),
|
||||
PCI_DEVICE_FROM_HANDLE(handle),
|
||||
PCI_FUNCTION_FROM_HANDLE(handle),
|
||||
PCI_VENDOR_ID(value), PCI_DEVICE_ID(value),
|
||||
handle,
|
||||
device_class(pci_read_config_byte(handle, PCICCR)),
|
||||
pci_read_config_byte(handle, PCICCR));
|
||||
device_class(pci_read_config_byte(handle, PCI_LANESWAP_B(PCICCR))),
|
||||
pci_read_config_byte(handle, PCI_LANESWAP_B(PCICCR)),
|
||||
pci_read_config_word(handle, PCI_LANESWAP_W(PCICCR)));
|
||||
|
||||
/* save handle to index value so that we'll be able to later find our resources */
|
||||
handles[index] = handle;
|
||||
handles[index + 1] = -1;
|
||||
|
||||
if (PCI_VENDOR_ID(value) != 0x1057 && PCI_DEVICE_ID(value) != 0x5806) /* do not configure bridge */
|
||||
{
|
||||
/* configure memory and I/O for card */
|
||||
pci_device_config(PCI_BUS_FROM_HANDLE(handle),
|
||||
PCI_DEVICE_FROM_HANDLE(handle),
|
||||
PCI_FUNCTION_FROM_HANDLE(handle));
|
||||
PCI_DEVICE_FROM_HANDLE(handle),
|
||||
PCI_FUNCTION_FROM_HANDLE(handle));
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("\r\n");
|
||||
pci_bridge_config(PCI_BUS_FROM_HANDLE(handle),
|
||||
PCI_DEVICE_FROM_HANDLE(handle),
|
||||
PCI_FUNCTION_FROM_HANDLE(handle));
|
||||
PCI_DEVICE_FROM_HANDLE(handle),
|
||||
PCI_FUNCTION_FROM_HANDLE(handle));
|
||||
}
|
||||
dbg("\r\n");
|
||||
handle = pci_find_device(0x0, 0xFFFF, ++index);
|
||||
}
|
||||
xprintf("\r\n...finished\r\n");
|
||||
@@ -1104,15 +1045,16 @@ void init_eport(void)
|
||||
/* configure IRQ1-7 pins on EPORT falling edge triggered */
|
||||
MCF_EPORT_EPPAR = MCF_EPORT_EPPAR_EPPA7(MCF_EPORT_EPPAR_FALLING) |
|
||||
MCF_EPORT_EPPAR_EPPA6(MCF_EPORT_EPPAR_FALLING) |
|
||||
#if MACHINE_FIREBEE /* irq5 level triggered on FireBee */
|
||||
#if defined(MACHINE_FIREBEE) /* irq5 level triggered on FireBee */
|
||||
MCF_EPORT_EPPAR_EPPA5(MCF_EPORT_EPPAR_LEVEL) |
|
||||
#elif MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
MCF_EPORT_EPPAR_EPPA5(MCF_EPORT_EPPAR_FALLING) |
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
MCF_EPORT_EPPAR_EPPA4(MCF_EPORT_EPPAR_FALLING) |
|
||||
MCF_EPORT_EPPAR_EPPA3(MCF_EPORT_EPPAR_FALLING) |
|
||||
MCF_EPORT_EPPAR_EPPA2(MCF_EPORT_EPPAR_FALLING) |
|
||||
MCF_EPORT_EPPAR_EPPA1(MCF_EPORT_EPPAR_FALLING);
|
||||
|
||||
MCF_EPORT_EPDDR = 0; /* clear data direction register. All pins as input */
|
||||
MCF_EPORT_EPFR = -1; /* clear all EPORT interrupt flags */
|
||||
MCF_EPORT_EPIER = 0xfe; /* enable all EPORT interrupts (for now) */
|
||||
@@ -1127,15 +1069,15 @@ void init_xlbus_arbiter(void)
|
||||
if (clock_ratio == 4)
|
||||
{
|
||||
MCF_XLB_XARB_CFG = MCF_XLB_XARB_CFG_BA |
|
||||
MCF_XLB_XARB_CFG_DT |
|
||||
MCF_XLB_XARB_CFG_AT |
|
||||
MCF_XLB_XARB_CFG_PLDIS;
|
||||
MCF_XLB_XARB_CFG_DT |
|
||||
MCF_XLB_XARB_CFG_AT |
|
||||
MCF_XLB_XARB_CFG_PLDIS;
|
||||
}
|
||||
else
|
||||
{
|
||||
MCF_XLB_XARB_CFG = MCF_XLB_XARB_CFG_BA |
|
||||
MCF_XLB_XARB_CFG_DT |
|
||||
MCF_XLB_XARB_CFG_AT;
|
||||
MCF_XLB_XARB_CFG_DT |
|
||||
MCF_XLB_XARB_CFG_AT;
|
||||
}
|
||||
|
||||
MCF_XLB_XARB_ADRTO = 0x1fffff;
|
||||
@@ -1149,13 +1091,14 @@ void init_xlbus_arbiter(void)
|
||||
* M2 = Multichannel DMA
|
||||
* M3 = PCI target interface
|
||||
*/
|
||||
|
||||
#if 0
|
||||
MCF_XLB_XARB_PRIEN = MCF_XLB_XARB_PRIEN_M0 | /* activate programmed priority for Coldfire core */
|
||||
MCF_XLB_XARB_PRIEN_M2 | /* activate programmed priority for Multichannel DMA */
|
||||
MCF_XLB_XARB_PRIEN_M3; /* activate programmed priority for PCI target interface */
|
||||
MCF_XLB_XARB_PRIEN_M2 | /* activate programmed priority for Multichannel DMA */
|
||||
MCF_XLB_XARB_PRIEN_M3; /* activate programmed priority for PCI target interface */
|
||||
MCF_XLB_XARB_PRI = MCF_XLB_XARB_PRI_M0P(7) | /* Coldfire core gets lowest */
|
||||
MCF_XLB_XARB_PRI_M2P(5) | /* Multichannel DMA mid priority */
|
||||
MCF_XLB_XARB_PRI_M3P(3); /* PCI target interface is highest priority */
|
||||
MCF_XLB_XARB_PRI_M2P(5) | /* Multichannel DMA mid priority */
|
||||
MCF_XLB_XARB_PRI_M3P(3); /* PCI target interface is highest priority */
|
||||
#endif
|
||||
}
|
||||
|
||||
void init_pci(void)
|
||||
@@ -1169,15 +1112,16 @@ void init_pci(void)
|
||||
init_eport();
|
||||
init_xlbus_arbiter();
|
||||
|
||||
MCF_PCI_PCIGSCR = 1; /* reset PCI */
|
||||
MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_PR; /* reset PCI devices */
|
||||
|
||||
|
||||
/*
|
||||
* setup the PCI arbiter
|
||||
*/
|
||||
MCF_PCIARB_PACR = MCF_PCIARB_PACR_INTMPRI /* internal master priority: high */
|
||||
| MCF_PCIARB_PACR_EXTMPRI(0xf) /* external master priority: high */
|
||||
| MCF_PCIARB_PACR_INTMINTEN /* enable "internal master broken" interrupt */
|
||||
| MCF_PCIARB_PACR_EXTMINTEN(0x0f); /* enable "external master broken" interrupt */
|
||||
| MCF_PCIARB_PACR_EXTMPRI(0x0) /* external master priority: high */
|
||||
| MCF_PCIARB_PACR_INTMINTEN /* enable "internal master broken" interrupt */
|
||||
| MCF_PCIARB_PACR_EXTMINTEN(0x0f); /* enable "external master broken" interrupt */
|
||||
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_TBST |
|
||||
@@ -1190,57 +1134,74 @@ void init_pci(void)
|
||||
MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 |
|
||||
MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 |
|
||||
MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0;
|
||||
#elif MACHINE_M5484LITE
|
||||
MCF_PAD_PAR_PCIBG = 0x3ff; /* enable all PCI bus grant and bus requests on the LITE board */
|
||||
MCF_PAD_PAR_PCIBR = 0x3ff;
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0 |
|
||||
MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 |
|
||||
MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 |
|
||||
MCF_PAD_PAR_PCIBG_PAR_PCIBG3_PCIBG3 |
|
||||
MCF_PAD_PAR_PCIBG_PAR_PCIBG4_PCIBG4; /* enable all PCI bus grant and bus requests on the LITE board */
|
||||
MCF_PAD_PAR_PCIBR = MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0 |
|
||||
MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 |
|
||||
MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 |
|
||||
MCF_PAD_PAR_PCIBR_PAR_PCIBR3_PCIBR3 |
|
||||
MCF_PAD_PAR_PCIBR_PAR_PCIBR4_PCIBR4;
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
MCF_PCI_PCISCR = MCF_PCI_PCISCR_M | /* memory access control enabled */
|
||||
MCF_PCI_PCISCR_B | /* bus master enabled */
|
||||
MCF_PCI_PCISCR_M | /* mem access enable */
|
||||
MCF_PCI_PCISCR_MA | /* clear master abort error */
|
||||
MCF_PCI_PCISCR_MW; /* memory write and invalidate enabled */
|
||||
MCF_PCI_PCISCR = MCF_PCI_PCISCR_M | /* memory access control enabled */
|
||||
MCF_PCI_PCISCR_B | /* bus master enabled */
|
||||
MCF_PCI_PCISCR_M | /* mem access enable */
|
||||
MCF_PCI_PCISCR_MA | /* clear master abort error */
|
||||
MCF_PCI_PCISCR_MW | /* memory write and invalidate enabled */
|
||||
MCF_PCI_PCISCR_PER; /* assert PERR on parity error */
|
||||
|
||||
|
||||
/* Setup burst parameters */
|
||||
MCF_PCI_PCICR1 = MCF_PCI_PCICR1_CACHELINESIZE(0) |
|
||||
MCF_PCI_PCICR1_LATTIMER(0x20); /* TODO: test increased latency timer */
|
||||
MCF_PCI_PCICR1 = MCF_PCI_PCICR1_CACHELINESIZE(8) |
|
||||
MCF_PCI_PCICR1_LATTIMER(0x20); /* TODO: test increased latency timer */
|
||||
|
||||
MCF_PCI_PCICR2 = MCF_PCI_PCICR2_MINGNT(1) |
|
||||
MCF_PCI_PCICR2_MAXLAT(32);
|
||||
MCF_PCI_PCICR2_MAXLAT(32);
|
||||
|
||||
// MCF_PCI_PCICR2 = 0; /* this is what Linux does */
|
||||
|
||||
/* error signaling */
|
||||
|
||||
MCF_PCI_PCIICR = MCF_PCI_PCIICR_TAE | /* target abort enable */
|
||||
MCF_PCI_PCIICR_IAE; /* initiator abort enable */
|
||||
MCF_PCI_PCIICR_IAE; /* initiator abort enable */
|
||||
|
||||
// MCF_PCI_PCIICR = 0; /* this is what Linux does */
|
||||
|
||||
MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_SEE; /* system error interrupt enable */
|
||||
|
||||
MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_SEE | /* system error interrupt enable */
|
||||
MCF_PCI_PCIGSCR_PEE; /* parity error interrupt enable */
|
||||
/* Configure Initiator Windows */
|
||||
|
||||
/* initiator window 0 base / translation adress register */
|
||||
MCF_PCI_PCIIW0BTAR = (PCI_MEMORY_OFFSET | (((PCI_MEMORY_SIZE - 1) >> 8) & 0xffff0000))
|
||||
| ((PCI_MEMORY_OFFSET >> 16) & 0xff00);
|
||||
/*
|
||||
* initiator window 0 base / translation adress register
|
||||
* used for PCI memory access
|
||||
*/
|
||||
MCF_PCI_PCIIW0BTAR = ((PCI_MEMORY_OFFSET + ((PCI_MEMORY_SIZE - 1) >> 8)) & 0xffff0000)
|
||||
| (PCI_MEMORY_OFFSET >> 16);
|
||||
|
||||
NOP();
|
||||
dbg("PCIIW0BTAR=0x%08x\r\n", MCF_PCI_PCIIW0BTAR);
|
||||
|
||||
/* initiator window 1 base / translation adress register */
|
||||
MCF_PCI_PCIIW1BTAR = (PCI_IO_OFFSET | ((PCI_IO_SIZE - 1) >> 8)) & 0xffff0000;
|
||||
/*
|
||||
* initiator window 1 base / translation adress register
|
||||
* used for PCI I/O access
|
||||
*/
|
||||
MCF_PCI_PCIIW1BTAR = ((PCI_IO_OFFSET + ((PCI_IO_SIZE - 1) >> 8)) & 0xffff0000)
|
||||
| (PCI_IO_OFFSET >> 16);
|
||||
NOP();
|
||||
/* initiator window 2 base / translation address register */
|
||||
MCF_PCI_PCIIW2BTAR = 0L; /* not used */
|
||||
NOP();
|
||||
/* initiator window configuration register */
|
||||
MCF_PCI_PCIIWCR = MCF_PCI_PCIIWCR_WINCTRL0_MEMRDLINE |
|
||||
MCF_PCI_PCIIWCR_WINCTRL1_IO |
|
||||
MCF_PCI_PCIIWCR_WINCTRL0_E |
|
||||
MCF_PCI_PCIIWCR_WINCTRL1_E;
|
||||
MCF_PCI_PCIIWCR_WINCTRL1_IO |
|
||||
MCF_PCI_PCIIWCR_WINCTRL0_E |
|
||||
MCF_PCI_PCIIWCR_WINCTRL1_E;
|
||||
NOP();
|
||||
|
||||
/*
|
||||
* Initialize target control register.
|
||||
* Used when an external bus master accesses the Coldfire PCI as target
|
||||
@@ -1253,6 +1214,8 @@ void init_pci(void)
|
||||
/* reset PCI devices */
|
||||
MCF_PCI_PCIGSCR &= ~MCF_PCI_PCIGSCR_PR;
|
||||
do { NOP(); } while (MCF_PCI_PCIGSCR & MCF_PCI_PCIGSCR_PR); /* wait until reset finished */
|
||||
wait(200);
|
||||
|
||||
xprintf("finished\r\n");
|
||||
|
||||
/* initialize/clear resource descriptor table */
|
||||
@@ -1287,16 +1250,16 @@ void pci_print_device_abilities(int32_t handle)
|
||||
pci_write_config_word(handle, PCICSR, 0xffff);
|
||||
value = swpw(pci_read_config_word(handle, PCICSR));
|
||||
dbg("IO: %1d MEM: %1d MSTR:%1d SPCC: %1d MEMW: %1d VGAS: %1d PERR: %1d STEP: %1d SERR: %1d FBTB: %1d\r\n",
|
||||
value & PCICSR_IO ? 1 : 0,
|
||||
value & PCICSR_MEMORY ? 1 : 0,
|
||||
value & PCICSR_MASTER ? 1 : 0,
|
||||
value & PCICSR_SPECIAL ? 1 : 0,
|
||||
value & PCICSR_MEMWI ? 1 : 0,
|
||||
value & PCICSR_VGA_SNOOP ? 1 : 0,
|
||||
value & PCICSR_PERR ? 1 : 0,
|
||||
value & PCICSR_STEPPING ? 1 : 0,
|
||||
value & PCICSR_SERR ? 1 : 0,
|
||||
value & PCICSR_FAST_BTOB_E ? 1 : 0);
|
||||
value & PCICSR_IO ? 1 : 0,
|
||||
value & PCICSR_MEMORY ? 1 : 0,
|
||||
value & PCICSR_MASTER ? 1 : 0,
|
||||
value & PCICSR_SPECIAL ? 1 : 0,
|
||||
value & PCICSR_MEMWI ? 1 : 0,
|
||||
value & PCICSR_VGA_SNOOP ? 1 : 0,
|
||||
value & PCICSR_PERR ? 1 : 0,
|
||||
value & PCICSR_STEPPING ? 1 : 0,
|
||||
value & PCICSR_SERR ? 1 : 0,
|
||||
value & PCICSR_FAST_BTOB_E ? 1 : 0);
|
||||
pci_write_config_word(handle, PCICSR, saved_value);
|
||||
}
|
||||
|
||||
@@ -1307,15 +1270,15 @@ void pci_print_device_config(int32_t handle)
|
||||
|
||||
value = swpw(pci_read_config_word(handle, PCICSR + 2));
|
||||
dbg("66M: %1d UDF: %1d FB2B:%1d PERR: %1d TABR: %1d DABR: %1d SERR: %1d PPER: %1d\r\n",
|
||||
value & PCICSR_66MHZ ? 1 : 0,
|
||||
value & PCICSR_UDF ? 1 : 0,
|
||||
value & PCICSR_FAST_BTOB ? 1 : 0,
|
||||
value & PCICSR_DPARITY_ERROR ? 1 : 0,
|
||||
value & PCICSR_T_ABORT_S ? 1 : 0,
|
||||
value & PCICSR_T_ABORT_R ? 1 : 0,
|
||||
value & PCICSR_M_ABORT_R ? 1 : 0,
|
||||
value & PCICSR_S_ERROR_S ? 1 : 0,
|
||||
value & PCICSR_PARITY_ERR ? 1 : 0);
|
||||
value & PCICSR_66MHZ ? 1 : 0,
|
||||
value & PCICSR_UDF ? 1 : 0,
|
||||
value & PCICSR_FAST_BTOB ? 1 : 0,
|
||||
value & PCICSR_DPARITY_ERROR ? 1 : 0,
|
||||
value & PCICSR_T_ABORT_S ? 1 : 0,
|
||||
value & PCICSR_T_ABORT_R ? 1 : 0,
|
||||
value & PCICSR_M_ABORT_R ? 1 : 0,
|
||||
value & PCICSR_S_ERROR_S ? 1 : 0,
|
||||
value & PCICSR_PARITY_ERR ? 1 : 0);
|
||||
}
|
||||
#endif /* DEBUG_PCI */
|
||||
|
||||
|
||||
66
pci/pci_errata.c
Executable file
66
pci/pci_errata.c
Executable file
@@ -0,0 +1,66 @@
|
||||
#include "pci_errata.h"
|
||||
#include "pci.h"
|
||||
#include <MCF5475.h>
|
||||
|
||||
#include "debug.h"
|
||||
|
||||
__attribute__((aligned(16))) void chip_errata_135(void)
|
||||
{
|
||||
/*
|
||||
* Errata type: Silicon
|
||||
* Affected component: PCI
|
||||
* Description: When core PCI transactions that involve writes to configuration or I/O space
|
||||
* are followed by a core line access to line addresses 0x4 and 0xC, core access
|
||||
* to the XL bus can hang.
|
||||
* Workaround: Prevent PCI configuration and I/O writes from being followed by the described
|
||||
* line access by the core by generating a known good XL bus transaction after
|
||||
* the PCI transaction.
|
||||
* Create a dummy function which is called immediately after each of the affected
|
||||
* transactions. There are three requirements for this dummy function.
|
||||
* 1. The function must be aligned to a 16-byte boundary.
|
||||
* 2. The function must contain a dummy write to a location on the XL bus,
|
||||
* preferably one with no side effects.
|
||||
* 3. The function must be longer than 32 bytes. If it is not, the function should
|
||||
* be padded with 16- or 48-bit TPF instructions placed after the end of
|
||||
* the function (after the RTS instruction) such that the length is longer
|
||||
* than 32 bytes.
|
||||
*/
|
||||
|
||||
__asm__ __volatile(
|
||||
" .extern __MBAR \n\t"
|
||||
" clr.l d0 \n\t"
|
||||
" move.l d0,__MBAR+0xF0C \n\t" /* Must use direct addressing. write to EPORT module */
|
||||
/* xlbus -> slavebus -> eport, writing '0' to register */
|
||||
/* has no effect */
|
||||
" rts \n\t"
|
||||
" tpf.l #0x0 \n\t"
|
||||
" tpf.l #0x0 \n\t"
|
||||
" tpf.l #0x0 \n\t"
|
||||
" tpf.l #0x0 \n\t"
|
||||
" tpf.l #0x0 \n\t"
|
||||
::: "d0", "memory");
|
||||
}
|
||||
|
||||
void chip_errata_055(int32_t handle)
|
||||
{
|
||||
uint32_t dummy;
|
||||
|
||||
return; /* test */
|
||||
|
||||
/* initiate PCI configuration access to device */
|
||||
MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */
|
||||
MCF_PCI_PCICAR_BUSNUM(3) | /* note: invalid bus number */
|
||||
MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */
|
||||
MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */
|
||||
MCF_PCI_PCICAR_DWORD(0);
|
||||
|
||||
/* issue a dummy read to an unsupported bus number (will fail) */
|
||||
dummy = * (volatile uint32_t *) PCI_IO_OFFSET; /* access device */
|
||||
|
||||
/* silently clear the PCI errors we produced just now */
|
||||
MCF_PCI_PCIISR = 0xffffffff; /* clear all errors */
|
||||
MCF_PCI_PCIGSCR = MCF_PCI_PCIGSCR_PE | MCF_PCI_PCIGSCR_SE;
|
||||
|
||||
(void) dummy;
|
||||
}
|
||||
|
||||
474
radeon/i2c-algo-bit.c
Normal file
474
radeon/i2c-algo-bit.c
Normal file
@@ -0,0 +1,474 @@
|
||||
/* ------------------------------------------------------------------------- */
|
||||
/* i2c-algo-bit.c i2c driver algorithms for bit-shift adapters */
|
||||
/* ------------------------------------------------------------------------- */
|
||||
/* Copyright (C) 1995-2000 Simon G. Vogl
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
/* With some changes from Frodo Looijaard <frodol@dds.nl>, Kyösti Mälkki
|
||||
<kmalkki@cc.hut.fi> and Jean Delvare <khali@linux-fr.org> */
|
||||
|
||||
#include "wait.h"
|
||||
#include "i2c.h"
|
||||
#include "i2c-algo-bit.h"
|
||||
|
||||
#ifndef NULL
|
||||
#define NULL ((void *)0)
|
||||
#endif
|
||||
|
||||
// #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
extern void start_timeout(void);
|
||||
extern int end_timeout(long msec);
|
||||
|
||||
/* --- setting states on the bus with the right timing: --------------- */
|
||||
|
||||
#define setsda(adap,val) adap->setsda(adap->data, val)
|
||||
#define setscl(adap,val) adap->setscl(adap->data, val)
|
||||
#define getsda(adap) adap->getsda(adap->data)
|
||||
#define getscl(adap) adap->getscl(adap->data)
|
||||
|
||||
static inline void sdalo(struct i2c_algo_bit_data *adap)
|
||||
{
|
||||
setsda(adap,0);
|
||||
wait_us(adap->udelay);
|
||||
}
|
||||
|
||||
static inline void sdahi(struct i2c_algo_bit_data *adap)
|
||||
{
|
||||
setsda(adap,1);
|
||||
wait_us(adap->udelay);
|
||||
}
|
||||
|
||||
static inline void scllo(struct i2c_algo_bit_data *adap)
|
||||
{
|
||||
setscl(adap,0);
|
||||
wait_us(adap->udelay);
|
||||
}
|
||||
|
||||
/*
|
||||
* Raise scl line, and do checking for delays. This is necessary for slower
|
||||
* devices.
|
||||
*/
|
||||
static inline int sclhi(struct i2c_algo_bit_data *adap)
|
||||
{
|
||||
setscl(adap, 1);
|
||||
/* Not all adapters have scl sense line... */
|
||||
if(adap->getscl == NULL )
|
||||
{
|
||||
wait_us(adap->udelay);
|
||||
return 0;
|
||||
}
|
||||
start_timeout();
|
||||
while (! getscl(adap))
|
||||
{
|
||||
/* the hw knows how to read the clock line,
|
||||
* so we wait until it actually gets high.
|
||||
* This is safer as some chips may hold it low
|
||||
* while they are processing data internally.
|
||||
*/
|
||||
if (end_timeout((long)adap->timeout))
|
||||
return -110;
|
||||
}
|
||||
wait_us(adap->udelay);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/* --- other auxiliary functions -------------------------------------- */
|
||||
void i2c_start(struct i2c_algo_bit_data *adap)
|
||||
{
|
||||
/* assert: scl, sda are high */
|
||||
sdalo(adap);
|
||||
scllo(adap);
|
||||
}
|
||||
|
||||
static void i2c_repstart(struct i2c_algo_bit_data *adap)
|
||||
{
|
||||
/* scl, sda may not be high */
|
||||
setsda(adap, 1);
|
||||
sclhi(adap);
|
||||
wait_us(adap->udelay);
|
||||
sdalo(adap);
|
||||
scllo(adap);
|
||||
}
|
||||
|
||||
static void i2c_stop(struct i2c_algo_bit_data *adap)
|
||||
{
|
||||
/* assert: scl is low */
|
||||
sdalo(adap);
|
||||
sclhi(adap);
|
||||
sdahi(adap);
|
||||
}
|
||||
|
||||
/*
|
||||
* send a byte without start cond., look for arbitration,
|
||||
* check ackn. from slave
|
||||
*
|
||||
* returns:
|
||||
* 1 if the device acknowledged
|
||||
* 0 if the device did not ack
|
||||
* -ETIMEDOUT if an error occurred (while raising the scl line)
|
||||
*/
|
||||
static int i2c_outb(struct i2c_adapter *i2c_adap, char c)
|
||||
{
|
||||
int i;
|
||||
int sb;
|
||||
int ack;
|
||||
struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
|
||||
/* assert: scl is low */
|
||||
|
||||
for (i = 7; i >= 0; i--)
|
||||
{
|
||||
sb = c & (1 << i);
|
||||
setsda(adap,sb);
|
||||
wait_us(adap->udelay);
|
||||
if (sclhi(adap) < 0)
|
||||
{
|
||||
/* timed out */
|
||||
sdahi(adap); /* we don't want to block the net */
|
||||
#ifdef DEBUG
|
||||
dbg("ETIMEDOUT\r\n");
|
||||
#endif
|
||||
return -110;
|
||||
};
|
||||
/* do arbitration here:
|
||||
* if ( sb && ! getsda(adap) ) -> ouch! Get out of here.
|
||||
*/
|
||||
setscl(adap, 0 );
|
||||
wait_us(adap->udelay);
|
||||
}
|
||||
sdahi(adap);
|
||||
if(sclhi(adap)<0)
|
||||
{
|
||||
/* timeout */
|
||||
|
||||
dbg("ETIMEDOUT\r\n");
|
||||
|
||||
return -110;
|
||||
}
|
||||
/* read ack: SDA should be pulled down by slave */
|
||||
ack = getsda(adap); /* ack: sda is pulled low ->success. */
|
||||
scllo(adap);
|
||||
|
||||
dbg("0x%02x, ack=0x%02x\r\n", (unsigned long)(c & 0xff), ack);
|
||||
|
||||
return 0 == ack; /* return 1 if device acked */
|
||||
/* assert: scl is low (sda undef) */
|
||||
}
|
||||
|
||||
static int i2c_inb(struct i2c_adapter *i2c_adap)
|
||||
{
|
||||
/* read byte via i2c port, without start/stop sequence */
|
||||
/* acknowledge is sent in i2c_read. */
|
||||
int i;
|
||||
unsigned char indata = 0;
|
||||
struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
|
||||
/* assert: scl is low */
|
||||
sdahi(adap);
|
||||
for(i = 0; i < 8; i++)
|
||||
{
|
||||
if (sclhi(adap) < 0)
|
||||
{
|
||||
/* timeout */
|
||||
dbg("i2c_inb TIMEDOUT\r\n");
|
||||
return -110;
|
||||
}
|
||||
indata *= 2;
|
||||
if (getsda(adap))
|
||||
indata |= 0x01;
|
||||
scllo(adap);
|
||||
}
|
||||
/* assert: scl is low */
|
||||
dbg("0x%02x\r\n", (unsigned long)(indata & 0xff));
|
||||
|
||||
return (int) (indata & 0xff);
|
||||
}
|
||||
|
||||
/*
|
||||
* Sanity check for the adapter hardware - check the reaction of
|
||||
* the bus lines only if it seems to be idle.
|
||||
*/
|
||||
static int test_bus(struct i2c_algo_bit_data *adap)
|
||||
{
|
||||
int scl, sda;
|
||||
sda = getsda(adap);
|
||||
scl = (adap->getscl == NULL ? 1 : getscl(adap));
|
||||
if (!scl || !sda )
|
||||
goto bailout;
|
||||
sdalo(adap);
|
||||
sda = getsda(adap);
|
||||
scl = (adap->getscl == NULL ? 1 : getscl(adap));
|
||||
if (sda !=0 || scl == 0)
|
||||
goto bailout;
|
||||
sdahi(adap);
|
||||
sda = getsda(adap);
|
||||
scl = (adap->getscl == NULL ? 1 : getscl(adap));
|
||||
if (sda == 0 || scl ==0)
|
||||
goto bailout;
|
||||
scllo(adap);
|
||||
sda = getsda(adap);
|
||||
scl = (adap->getscl == NULL ? 0 : getscl(adap));
|
||||
if (scl !=0 || sda == 0)
|
||||
goto bailout;
|
||||
sclhi(adap);
|
||||
sda = getsda(adap);
|
||||
scl = (adap->getscl == NULL ? 1 : getscl(adap));
|
||||
if (scl == 0 || sda ==0)
|
||||
goto bailout;
|
||||
return 0;
|
||||
bailout:
|
||||
sdahi(adap);
|
||||
sclhi(adap);
|
||||
return -110;
|
||||
}
|
||||
|
||||
/* ----- Utility functions
|
||||
*/
|
||||
|
||||
/* try_address tries to contact a chip for a number of
|
||||
* times before it gives up.
|
||||
* return values:
|
||||
* 1 chip answered
|
||||
* 0 chip did not answer
|
||||
* -x transmission error
|
||||
*/
|
||||
static inline int try_address(struct i2c_adapter *i2c_adap,
|
||||
unsigned char addr, int retries)
|
||||
{
|
||||
struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
|
||||
int i, ret = -1;
|
||||
for (i = 0; i <= retries; i++)
|
||||
{
|
||||
ret = i2c_outb(i2c_adap, addr);
|
||||
if (ret == 1)
|
||||
break; /* success! */
|
||||
i2c_stop(adap);
|
||||
wait_us(5);
|
||||
if (i == retries) /* no success */
|
||||
break;
|
||||
i2c_start(adap);
|
||||
wait_us(adap->udelay);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
|
||||
{
|
||||
struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
|
||||
char c;
|
||||
const char *temp = (const char *)msg->buf;
|
||||
int count = msg->len;
|
||||
unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
|
||||
int retval;
|
||||
int wrcount=0;
|
||||
while(count > 0)
|
||||
{
|
||||
c = *temp;
|
||||
retval = i2c_outb(i2c_adap,c);
|
||||
if ((retval > 0) || (nak_ok && (retval==0)))
|
||||
{ /* ok or ignored NAK */
|
||||
count--;
|
||||
temp++;
|
||||
wrcount++;
|
||||
}
|
||||
else
|
||||
{ /* arbitration or no acknowledge */
|
||||
i2c_stop(adap);
|
||||
return (retval < 0)? retval : -110;
|
||||
/* got a better one ?? */
|
||||
}
|
||||
}
|
||||
return wrcount;
|
||||
}
|
||||
|
||||
static inline int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
|
||||
{
|
||||
int inval;
|
||||
int rdcount=0; /* counts bytes read */
|
||||
struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
|
||||
char *temp = (char *)msg->buf;
|
||||
int count = msg->len;
|
||||
while(count > 0)
|
||||
{
|
||||
inval = i2c_inb(i2c_adap);
|
||||
if (inval >= 0)
|
||||
{
|
||||
*temp = inval;
|
||||
rdcount++;
|
||||
}
|
||||
else
|
||||
/* read timed out */
|
||||
break;
|
||||
temp++;
|
||||
count--;
|
||||
if (msg->flags & I2C_M_NO_RD_ACK)
|
||||
continue;
|
||||
if (count > 0)
|
||||
/* send ack */
|
||||
sdalo(adap);
|
||||
else
|
||||
sdahi(adap); /* neg. ack on last byte */
|
||||
if (sclhi(adap) < 0)
|
||||
{
|
||||
/* timeout */
|
||||
sdahi(adap);
|
||||
return -1;
|
||||
};
|
||||
scllo(adap);
|
||||
sdahi(adap);
|
||||
}
|
||||
return rdcount;
|
||||
}
|
||||
|
||||
/* doAddress initiates the transfer by generating the start condition (in
|
||||
* try_address) and transmits the address in the necessary format to handle
|
||||
* reads, writes as well as 10bit-addresses.
|
||||
* returns:
|
||||
* 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
|
||||
* -x an error occurred (like: -EREMOTEIO if the device did not answer, or
|
||||
* -ETIMEDOUT, for example if the lines are stuck...)
|
||||
*/
|
||||
static inline int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
|
||||
{
|
||||
unsigned short flags = msg->flags;
|
||||
unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
|
||||
struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
|
||||
unsigned char addr;
|
||||
int ret, retries;
|
||||
retries = nak_ok ? 0 : i2c_adap->retries;
|
||||
if (flags & I2C_M_TEN)
|
||||
{
|
||||
/* a ten bit address */
|
||||
addr = 0xf0 | (( msg->addr >> 7) & 0x03);
|
||||
/* try extended address code...*/
|
||||
ret = try_address(i2c_adap, addr, retries);
|
||||
if ((ret != 1) && !nak_ok)
|
||||
return -1;
|
||||
/* the remaining 8 bit address */
|
||||
ret = i2c_outb(i2c_adap,msg->addr & 0x7f);
|
||||
if ((ret != 1) && !nak_ok)
|
||||
/* the chip did not ack / xmission error occurred */
|
||||
return -1;
|
||||
if (flags & I2C_M_RD)
|
||||
{
|
||||
i2c_repstart(adap);
|
||||
/* okay, now switch into reading mode */
|
||||
addr |= 0x01;
|
||||
ret = try_address(i2c_adap, addr, retries);
|
||||
if ((ret != 1) && !nak_ok)
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
else
|
||||
{ /* normal 7bit address */
|
||||
addr = (msg->addr << 1);
|
||||
if (flags & I2C_M_RD )
|
||||
addr |= 1;
|
||||
if (flags & I2C_M_REV_DIR_ADDR )
|
||||
addr ^= 1;
|
||||
ret = try_address(i2c_adap, addr, retries);
|
||||
if ((ret != 1) && !nak_ok)
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bit_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num)
|
||||
{
|
||||
struct i2c_msg *pmsg;
|
||||
struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
|
||||
int i,ret;
|
||||
unsigned short nak_ok;
|
||||
i2c_start(adap);
|
||||
for(i=0;i<num;i++)
|
||||
{
|
||||
pmsg = &msgs[i];
|
||||
nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
|
||||
if(!(pmsg->flags & I2C_M_NOSTART))
|
||||
{
|
||||
if (i)
|
||||
i2c_repstart(adap);
|
||||
ret = bit_doAddress(i2c_adap, pmsg);
|
||||
if ((ret != 0) && !nak_ok)
|
||||
return (ret < 0) ? ret : -1;
|
||||
}
|
||||
if(pmsg->flags & I2C_M_RD )
|
||||
{
|
||||
/* read bytes into buffer*/
|
||||
ret = readbytes(i2c_adap, pmsg);
|
||||
if(ret < pmsg->len)
|
||||
return (ret < 0)? ret : -1;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* write bytes from buffer */
|
||||
ret = sendbytes(i2c_adap, pmsg);
|
||||
if (ret < pmsg->len )
|
||||
return (ret < 0) ? ret : -1;
|
||||
}
|
||||
}
|
||||
i2c_stop(adap);
|
||||
return num;
|
||||
}
|
||||
|
||||
/* -----exported algorithm data: ------------------------------------- */
|
||||
|
||||
static struct i2c_algorithm i2c_bit_algo = {
|
||||
.master_xfer = bit_xfer,
|
||||
};
|
||||
|
||||
/*
|
||||
* registering functions to load algorithms at runtime
|
||||
*/
|
||||
int i2c_bit_add_bus(struct i2c_adapter *adap)
|
||||
{
|
||||
struct i2c_algo_bit_data *bit_adap = adap->algo_data;
|
||||
if (1)
|
||||
{
|
||||
int ret = test_bus(bit_adap);
|
||||
if (ret < 0)
|
||||
return -1;
|
||||
}
|
||||
/* register new adapter to i2c module... */
|
||||
adap->algo = &i2c_bit_algo;
|
||||
adap->timeout = 10; /* default values, should */
|
||||
adap->retries = 3; /* be replaced by defines */
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_bit_del_bus(struct i2c_adapter *adap)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ----------------------------------------------------
|
||||
* the functional interface to the i2c busses.
|
||||
* ----------------------------------------------------
|
||||
*/
|
||||
|
||||
int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
|
||||
{
|
||||
int ret;
|
||||
if (adap->algo->master_xfer)
|
||||
{
|
||||
ret = adap->algo->master_xfer(adap, msgs, num);
|
||||
return ret;
|
||||
}
|
||||
else
|
||||
return -1;
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
3824
radeon/radeon_base.c
3824
radeon/radeon_base.c
File diff suppressed because it is too large
Load Diff
@@ -70,71 +70,71 @@
|
||||
#define CURSOR_SWAPPING_START() \
|
||||
if (rinfo->big_endian) \
|
||||
OUTREG(SURFACE_CNTL, \
|
||||
((__surface_cntl = INREG(SURFACE_CNTL)) | \
|
||||
NONSURF_AP0_SWP_32BPP) & \
|
||||
~NONSURF_AP0_SWP_16BPP);
|
||||
((__surface_cntl = INREG(SURFACE_CNTL)) | \
|
||||
NONSURF_AP0_SWP_32BPP) & \
|
||||
~NONSURF_AP0_SWP_16BPP);
|
||||
#define CURSOR_SWAPPING_END() \
|
||||
if (rinfo->big_endian) \
|
||||
(OUTREG(SURFACE_CNTL, __surface_cntl));
|
||||
(OUTREG(SURFACE_CNTL, __surface_cntl));
|
||||
|
||||
/* Set cursor foreground and background colors */
|
||||
void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
|
||||
void radeon_set_cursor_colors(struct fb_info *info, int32_t bg, int32_t fg)
|
||||
{
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base + rinfo->cursor_start);
|
||||
int pixel, i;
|
||||
CURSOR_SWAPPING_DECL_MMIO
|
||||
CURSOR_SWAPPING_DECL
|
||||
// DPRINTVALHEX("radeonfb: RADEONSetCursorColors: cursor_start ",rinfo->cursor_start);
|
||||
// DPRINT("\r\n");
|
||||
fg |= 0xff000000;
|
||||
bg |= 0xff000000;
|
||||
/* Don't recolour the image if we don't have to. */
|
||||
int pixel, i;
|
||||
CURSOR_SWAPPING_DECL_MMIO
|
||||
CURSOR_SWAPPING_DECL
|
||||
// DPRINTVALHEX("radeonfb: RADEONSetCursorColors: cursor_start ",rinfo->cursor_start);
|
||||
// DPRINT("\r\n");
|
||||
fg |= 0xff000000;
|
||||
bg |= 0xff000000;
|
||||
/* Don't recolour the image if we don't have to. */
|
||||
if (fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
|
||||
return;
|
||||
CURSOR_SWAPPING_START();
|
||||
return;
|
||||
CURSOR_SWAPPING_START();
|
||||
|
||||
/*
|
||||
* Note: We assume that the pixels are either fully opaque or fully
|
||||
* transparent, so we won't premultiply them, and we can just
|
||||
* check for non-zero pixel values; those are either fg or bg
|
||||
*/
|
||||
* transparent, so we won't premultiply them, and we can just
|
||||
* check for non-zero pixel values; those are either fg or bg
|
||||
*/
|
||||
for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
|
||||
if ((pixel = *pixels))
|
||||
*pixels = (pixel == rinfo->cursor_fg) ? fg : bg;
|
||||
CURSOR_SWAPPING_END();
|
||||
rinfo->cursor_fg = fg;
|
||||
rinfo->cursor_bg = bg;
|
||||
*pixels = (pixel == rinfo->cursor_fg) ? fg : bg;
|
||||
CURSOR_SWAPPING_END();
|
||||
rinfo->cursor_fg = fg;
|
||||
rinfo->cursor_bg = bg;
|
||||
}
|
||||
|
||||
/* Set cursor position to (x,y) with offset into cursor bitmap at
|
||||
* (xorigin,yorigin)
|
||||
*/
|
||||
void radeon_set_cursor_position(struct fb_info *info, int x, int y)
|
||||
void radeon_set_cursor_position(struct fb_info *info, int32_t x, int32_t y)
|
||||
{
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
struct fb_var_screeninfo *mode = &info->var;
|
||||
int xorigin = 0;
|
||||
int yorigin = 0;
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
struct fb_var_screeninfo *mode = &info->var;
|
||||
int xorigin = 0;
|
||||
int yorigin = 0;
|
||||
if (mode->vmode & FB_VMODE_DOUBLE)
|
||||
y <<= 1;
|
||||
y <<= 1;
|
||||
if (x < 0)
|
||||
xorigin = 1 - x;
|
||||
xorigin = 1 - x;
|
||||
if (y < 0)
|
||||
yorigin = 1 - y;
|
||||
yorigin = 1 - y;
|
||||
|
||||
// DPRINTVALHEX("radeonfb: RADEONSetCursorPosition: cursor_start ",rinfo->cursor_start);
|
||||
// DPRINTVAL(" x ",x);
|
||||
// DPRINTVAL(" y ",y);
|
||||
// DPRINT("\r\n");
|
||||
// DPRINTVALHEX("radeonfb: RADEONSetCursorPosition: cursor_start ",rinfo->cursor_start);
|
||||
// DPRINTVAL(" x ",x);
|
||||
// DPRINTVAL(" y ",y);
|
||||
// DPRINT("\r\n");
|
||||
|
||||
OUTREG(CUR_HORZ_VERT_OFF, (CUR_LOCK | (xorigin << 16) | yorigin));
|
||||
OUTREG(CUR_HORZ_VERT_POSN, (CUR_LOCK | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y)));
|
||||
OUTREG(CUR_OFFSET, rinfo->cursor_start + yorigin * 256);
|
||||
rinfo->cursor_x = (unsigned long)x;
|
||||
OUTREG(CUR_HORZ_VERT_OFF, (CUR_LOCK | (xorigin << 16) | yorigin));
|
||||
OUTREG(CUR_HORZ_VERT_POSN, (CUR_LOCK | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y)));
|
||||
OUTREG(CUR_OFFSET, rinfo->cursor_start + yorigin * 256);
|
||||
rinfo->cursor_x = (unsigned long)x;
|
||||
if (mode->vmode & FB_VMODE_DOUBLE)
|
||||
rinfo->cursor_y = (unsigned long) y >> 1;
|
||||
else
|
||||
else
|
||||
rinfo->cursor_y = (unsigned long) y;
|
||||
}
|
||||
|
||||
@@ -142,194 +142,194 @@ void radeon_set_cursor_position(struct fb_info *info, int x, int y)
|
||||
* Copy cursor image from `image' to video memory. RADEONSetCursorPosition
|
||||
* will be called after this, so we can ignore xorigin and yorigin.
|
||||
*/
|
||||
void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom)
|
||||
void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int32_t zoom)
|
||||
{
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
unsigned long *d = (unsigned long *)((unsigned long)rinfo->fb_base+rinfo->cursor_start);
|
||||
unsigned long save = 0;
|
||||
unsigned short chunk, mchunk;
|
||||
unsigned long i, j, k;
|
||||
CURSOR_SWAPPING_DECL
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
unsigned long *d = (unsigned long *)((unsigned long)rinfo->fb_base+rinfo->cursor_start);
|
||||
unsigned long save = 0;
|
||||
unsigned short chunk, mchunk;
|
||||
unsigned long i, j, k;
|
||||
CURSOR_SWAPPING_DECL
|
||||
|
||||
// DPRINTVALHEX("radeonfb: RADEONLoadCursorImage: cursor_start ",rinfo->cursor_start);
|
||||
// DPRINT("\r\n");
|
||||
// DPRINTVALHEX("radeonfb: RADEONLoadCursorImage: cursor_start ",rinfo->cursor_start);
|
||||
// DPRINT("\r\n");
|
||||
|
||||
save = INREG(CRTC_GEN_CNTL) & ~(unsigned long) (3 << 20);
|
||||
save |= (unsigned long) (2 << 20);
|
||||
OUTREG(CRTC_GEN_CNTL, save & (unsigned long)~CRTC_CUR_EN);
|
||||
save = INREG(CRTC_GEN_CNTL) & ~(unsigned long) (3 << 20);
|
||||
save |= (unsigned long) (2 << 20);
|
||||
OUTREG(CRTC_GEN_CNTL, save & (unsigned long)~CRTC_CUR_EN);
|
||||
|
||||
/*
|
||||
* Convert the bitmap to ARGB32.
|
||||
*/
|
||||
CURSOR_SWAPPING_START();
|
||||
/*
|
||||
* Convert the bitmap to ARGB32.
|
||||
*/
|
||||
CURSOR_SWAPPING_START();
|
||||
#define ARGB_PER_CHUNK (8 * sizeof (chunk))
|
||||
switch(zoom)
|
||||
{
|
||||
case 1:
|
||||
default:
|
||||
for (i = 0; i < CURSOR_HEIGHT; i++)
|
||||
{
|
||||
if (i < 16)
|
||||
{
|
||||
mchunk = *mask++;
|
||||
chunk = *data++;
|
||||
}
|
||||
else
|
||||
mchunk = chunk = 0;
|
||||
for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
|
||||
{
|
||||
for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
|
||||
{
|
||||
if (mchunk & 0x8000)
|
||||
{
|
||||
if (chunk & 0x8000)
|
||||
*d++ = 0xff000000; /* Black, fully opaque. */
|
||||
else
|
||||
*d++ = 0xffffffff; /* White, fully opaque. */
|
||||
}
|
||||
else
|
||||
*d++ = 0x00000000; /* White/Black, fully transparent. */
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 2:
|
||||
for (i = 0; i < CURSOR_HEIGHT; i++)
|
||||
{
|
||||
if (i < 16*2)
|
||||
{
|
||||
mchunk = *mask;
|
||||
chunk = *data;
|
||||
if ((i & 1) == 1)
|
||||
{
|
||||
mask++;
|
||||
data++;
|
||||
}
|
||||
}
|
||||
else
|
||||
mchunk = chunk = 0;
|
||||
for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
|
||||
{
|
||||
for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
|
||||
{
|
||||
if (mchunk & 0x8000)
|
||||
{
|
||||
if (chunk & 0x8000)
|
||||
{
|
||||
*d++ = 0xff000000; /* Black, fully opaque. */
|
||||
*d++ = 0xff000000;
|
||||
}
|
||||
else
|
||||
{
|
||||
*d++ = 0xffffffff; /* White, fully opaque. */
|
||||
*d++ = 0xffffffff;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
*d++ = 0x00000000; /* White/Black, fully transparent. */
|
||||
*d++ = 0x00000000;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 4:
|
||||
for (i = 0; i < CURSOR_HEIGHT; i++)
|
||||
{
|
||||
if (i < 16 * 4)
|
||||
{
|
||||
mchunk = *mask;
|
||||
chunk = *data;
|
||||
if ((i & 3) == 3)
|
||||
{
|
||||
mask++;
|
||||
data++;
|
||||
}
|
||||
}
|
||||
else
|
||||
mchunk = chunk = 0;
|
||||
for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
|
||||
{
|
||||
for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
|
||||
{
|
||||
if (mchunk & 0x8000)
|
||||
{
|
||||
if (chunk & 0x8000)
|
||||
{
|
||||
*d++ = 0xff000000; /* Black, fully opaque. */
|
||||
*d++ = 0xff000000;
|
||||
*d++ = 0xff000000;
|
||||
*d++ = 0xff000000;
|
||||
}
|
||||
else
|
||||
{
|
||||
*d++ = 0xffffffff; /* White, fully opaque. */
|
||||
*d++ = 0xffffffff;
|
||||
*d++ = 0xffffffff;
|
||||
*d++ = 0xffffffff;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
*d++ = 0x00000000; /* White/Black, fully transparent. */
|
||||
*d++ = 0x00000000;
|
||||
*d++ = 0x00000000;
|
||||
*d++ = 0x00000000;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
CURSOR_SWAPPING_END();
|
||||
rinfo->cursor_bg = 0xffffffff; /* White, fully opaque. */
|
||||
rinfo->cursor_fg = 0xff000000; /* Black, fully opaque. */
|
||||
OUTREG(CRTC_GEN_CNTL, save);
|
||||
switch(zoom)
|
||||
{
|
||||
case 1:
|
||||
default:
|
||||
for (i = 0; i < CURSOR_HEIGHT; i++)
|
||||
{
|
||||
if (i < 16)
|
||||
{
|
||||
mchunk = *mask++;
|
||||
chunk = *data++;
|
||||
}
|
||||
else
|
||||
mchunk = chunk = 0;
|
||||
for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
|
||||
{
|
||||
for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
|
||||
{
|
||||
if (mchunk & 0x8000)
|
||||
{
|
||||
if (chunk & 0x8000)
|
||||
*d++ = 0xff000000; /* Black, fully opaque. */
|
||||
else
|
||||
*d++ = 0xffffffff; /* White, fully opaque. */
|
||||
}
|
||||
else
|
||||
*d++ = 0x00000000; /* White/Black, fully transparent. */
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 2:
|
||||
for (i = 0; i < CURSOR_HEIGHT; i++)
|
||||
{
|
||||
if (i < 16*2)
|
||||
{
|
||||
mchunk = *mask;
|
||||
chunk = *data;
|
||||
if ((i & 1) == 1)
|
||||
{
|
||||
mask++;
|
||||
data++;
|
||||
}
|
||||
}
|
||||
else
|
||||
mchunk = chunk = 0;
|
||||
for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
|
||||
{
|
||||
for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
|
||||
{
|
||||
if (mchunk & 0x8000)
|
||||
{
|
||||
if (chunk & 0x8000)
|
||||
{
|
||||
*d++ = 0xff000000; /* Black, fully opaque. */
|
||||
*d++ = 0xff000000;
|
||||
}
|
||||
else
|
||||
{
|
||||
*d++ = 0xffffffff; /* White, fully opaque. */
|
||||
*d++ = 0xffffffff;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
*d++ = 0x00000000; /* White/Black, fully transparent. */
|
||||
*d++ = 0x00000000;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 4:
|
||||
for (i = 0; i < CURSOR_HEIGHT; i++)
|
||||
{
|
||||
if (i < 16 * 4)
|
||||
{
|
||||
mchunk = *mask;
|
||||
chunk = *data;
|
||||
if ((i & 3) == 3)
|
||||
{
|
||||
mask++;
|
||||
data++;
|
||||
}
|
||||
}
|
||||
else
|
||||
mchunk = chunk = 0;
|
||||
for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
|
||||
{
|
||||
for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
|
||||
{
|
||||
if (mchunk & 0x8000)
|
||||
{
|
||||
if (chunk & 0x8000)
|
||||
{
|
||||
*d++ = 0xff000000; /* Black, fully opaque. */
|
||||
*d++ = 0xff000000;
|
||||
*d++ = 0xff000000;
|
||||
*d++ = 0xff000000;
|
||||
}
|
||||
else
|
||||
{
|
||||
*d++ = 0xffffffff; /* White, fully opaque. */
|
||||
*d++ = 0xffffffff;
|
||||
*d++ = 0xffffffff;
|
||||
*d++ = 0xffffffff;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
*d++ = 0x00000000; /* White/Black, fully transparent. */
|
||||
*d++ = 0x00000000;
|
||||
*d++ = 0x00000000;
|
||||
*d++ = 0x00000000;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
CURSOR_SWAPPING_END();
|
||||
rinfo->cursor_bg = 0xffffffff; /* White, fully opaque. */
|
||||
rinfo->cursor_fg = 0xff000000; /* Black, fully opaque. */
|
||||
OUTREG(CRTC_GEN_CNTL, save);
|
||||
}
|
||||
|
||||
/* Hide hardware cursor. */
|
||||
void radeon_hide_cursor(struct fb_info *info)
|
||||
{
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
|
||||
// DPRINT("radeonfb: RADEONHideCursor\r\n");
|
||||
OUTREGP(CRTC_GEN_CNTL, 0, ~CRTC_CUR_EN);
|
||||
rinfo->cursor_show = 0;
|
||||
// DPRINT("radeonfb: RADEONHideCursor\r\n");
|
||||
OUTREGP(CRTC_GEN_CNTL, 0, ~CRTC_CUR_EN);
|
||||
rinfo->cursor_show = 0;
|
||||
}
|
||||
|
||||
/* Show hardware cursor. */
|
||||
void radeon_show_cursor(struct fb_info *info)
|
||||
{
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
|
||||
// DPRINT("radeonfb: RADEONShowCursor\r\n");
|
||||
OUTREGP(CRTC_GEN_CNTL, CRTC_CUR_EN, ~CRTC_CUR_EN);
|
||||
rinfo->cursor_show = 1;
|
||||
// DPRINT("radeonfb: RADEONShowCursor\r\n");
|
||||
OUTREGP(CRTC_GEN_CNTL, CRTC_CUR_EN, ~CRTC_CUR_EN);
|
||||
rinfo->cursor_show = 1;
|
||||
}
|
||||
|
||||
/* Initialize hardware cursor support. */
|
||||
long radeon_cursor_init(struct fb_info *info)
|
||||
{
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
int size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
|
||||
unsigned long fbarea = offscreen_alloc(rinfo->info, size_bytes + 256);
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
int size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
|
||||
unsigned long fbarea = offscreen_alloc(rinfo->info, size_bytes + 256);
|
||||
|
||||
dbg("radeonfb: %s: fbarea: %p\r\n", fbarea);
|
||||
|
||||
if (!fbarea)
|
||||
rinfo->cursor_start = 0;
|
||||
else
|
||||
{
|
||||
unsigned short data[16], mask[16];
|
||||
rinfo->cursor_start = 0;
|
||||
else
|
||||
{
|
||||
unsigned short data[16], mask[16];
|
||||
|
||||
memset(data, 0, sizeof(data));
|
||||
memset(mask, 0, sizeof(data));
|
||||
rinfo->cursor_start = RADEON_ALIGN(fbarea - (unsigned long) rinfo->fb_base, 256);
|
||||
rinfo->cursor_end = rinfo->cursor_start + size_bytes;
|
||||
radeon_load_cursor_image(info, mask, data, 1);
|
||||
}
|
||||
dbg("radeonfb: %s cursor_start: %p\r\n", rinfo->cursor_start);
|
||||
memset(data, 0, sizeof(data));
|
||||
memset(mask, 0, sizeof(data));
|
||||
rinfo->cursor_start = RADEON_ALIGN(fbarea - (unsigned long) rinfo->fb_base, 256);
|
||||
rinfo->cursor_end = rinfo->cursor_start + size_bytes;
|
||||
radeon_load_cursor_image(info, mask, data, 1);
|
||||
}
|
||||
dbg("radeonfb: %s cursor_start: %p\r\n", rinfo->cursor_start);
|
||||
|
||||
return (rinfo->cursor_start ? fbarea : 0);
|
||||
return (rinfo->cursor_start ? fbarea : 0);
|
||||
}
|
||||
|
||||
237
radeon/radeon_i2c.c
Normal file
237
radeon/radeon_i2c.c
Normal file
@@ -0,0 +1,237 @@
|
||||
#include "video.h"
|
||||
#include "radeonfb.h"
|
||||
#include "edid.h"
|
||||
#include "i2c.h"
|
||||
#include "driver_mem.h"
|
||||
|
||||
// #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
|
||||
#define CONFIG_FB_RADEON_I2C
|
||||
#ifdef CONFIG_FB_RADEON_I2C
|
||||
|
||||
#define RADEON_DDC 0x50
|
||||
|
||||
static void radeon_gpio_setscl(void* data, int state)
|
||||
{
|
||||
struct radeon_i2c_chan *chan = data;
|
||||
struct radeonfb_info *rinfo = chan->rinfo;
|
||||
unsigned long val;
|
||||
|
||||
val = INREG(chan->ddc_reg) & ~(VGA_DDC_CLK_OUT_EN);
|
||||
|
||||
if (!state)
|
||||
val |= VGA_DDC_CLK_OUT_EN;
|
||||
OUTREG(chan->ddc_reg, val);
|
||||
(void) INREG(chan->ddc_reg);
|
||||
}
|
||||
|
||||
static void radeon_gpio_setsda(void* data, int state)
|
||||
{
|
||||
struct radeon_i2c_chan *chan = data;
|
||||
struct radeonfb_info *rinfo = chan->rinfo;
|
||||
unsigned long val;
|
||||
|
||||
val = INREG(chan->ddc_reg) & ~(VGA_DDC_DATA_OUT_EN);
|
||||
if (!state)
|
||||
val |= VGA_DDC_DATA_OUT_EN;
|
||||
OUTREG(chan->ddc_reg, val);
|
||||
(void) INREG(chan->ddc_reg);
|
||||
}
|
||||
|
||||
static int radeon_gpio_getscl(void* data)
|
||||
{
|
||||
struct radeon_i2c_chan *chan = data;
|
||||
struct radeonfb_info *rinfo = chan->rinfo;
|
||||
unsigned long val;
|
||||
|
||||
val = INREG(chan->ddc_reg);
|
||||
return (val & VGA_DDC_CLK_INPUT) ? 1 : 0;
|
||||
}
|
||||
|
||||
static int radeon_gpio_getsda(void* data)
|
||||
{
|
||||
struct radeon_i2c_chan *chan = data;
|
||||
struct radeonfb_info *rinfo = chan->rinfo;
|
||||
unsigned long val;
|
||||
val = INREG(chan->ddc_reg);
|
||||
return(val & VGA_DDC_DATA_INPUT) ? 1 : 0;
|
||||
}
|
||||
|
||||
static int radeon_setup_i2c_bus(struct radeon_i2c_chan *chan)
|
||||
{
|
||||
int rc;
|
||||
chan->adapter.algo_data = &chan->algo;
|
||||
chan->algo.setsda = radeon_gpio_setsda;
|
||||
chan->algo.setscl = radeon_gpio_setscl;
|
||||
chan->algo.getsda = radeon_gpio_getsda;
|
||||
chan->algo.getscl = radeon_gpio_getscl;
|
||||
chan->algo.udelay = 40;
|
||||
chan->algo.timeout = 20;
|
||||
chan->algo.data = chan;
|
||||
/* Raise SCL and SDA */
|
||||
radeon_gpio_setsda(chan, 1);
|
||||
radeon_gpio_setscl(chan, 1);
|
||||
udelay(20);
|
||||
rc = i2c_bit_add_bus(&chan->adapter);
|
||||
return rc;
|
||||
}
|
||||
|
||||
void radeon_create_i2c_busses(struct radeonfb_info *rinfo)
|
||||
{
|
||||
rinfo->i2c[0].rinfo = rinfo;
|
||||
rinfo->i2c[0].ddc_reg = GPIO_MONID;
|
||||
radeon_setup_i2c_bus(&rinfo->i2c[0]);
|
||||
rinfo->i2c[1].rinfo = rinfo;
|
||||
rinfo->i2c[1].ddc_reg = GPIO_DVI_DDC;
|
||||
radeon_setup_i2c_bus(&rinfo->i2c[1]);
|
||||
rinfo->i2c[2].rinfo = rinfo;
|
||||
rinfo->i2c[2].ddc_reg = GPIO_VGA_DDC;
|
||||
radeon_setup_i2c_bus(&rinfo->i2c[2]);
|
||||
rinfo->i2c[3].rinfo = rinfo;
|
||||
rinfo->i2c[3].ddc_reg = GPIO_CRT2_DDC;
|
||||
radeon_setup_i2c_bus(&rinfo->i2c[3]);
|
||||
}
|
||||
|
||||
#if 0
|
||||
void radeon_delete_i2c_busses(struct radeonfb_info *rinfo)
|
||||
{
|
||||
if(rinfo->i2c[0].rinfo)
|
||||
i2c_bit_del_bus(&rinfo->i2c[0].adapter);
|
||||
rinfo->i2c[0].rinfo = NULL;
|
||||
if(rinfo->i2c[1].rinfo)
|
||||
i2c_bit_del_bus(&rinfo->i2c[1].adapter);
|
||||
rinfo->i2c[1].rinfo = NULL;
|
||||
if(rinfo->i2c[2].rinfo)
|
||||
i2c_bit_del_bus(&rinfo->i2c[2].adapter);
|
||||
rinfo->i2c[2].rinfo = NULL;
|
||||
if(rinfo->i2c[3].rinfo)
|
||||
i2c_bit_del_bus(&rinfo->i2c[3].adapter);
|
||||
rinfo->i2c[3].rinfo = NULL;
|
||||
}
|
||||
#endif
|
||||
|
||||
static unsigned char *radeon_do_probe_i2c_edid(struct radeon_i2c_chan *chan)
|
||||
{
|
||||
unsigned char start = 0x0;
|
||||
struct i2c_msg msgs[] =
|
||||
{
|
||||
{
|
||||
.addr = RADEON_DDC,
|
||||
.len = 1,
|
||||
.buf = &start,
|
||||
},
|
||||
{
|
||||
.addr = RADEON_DDC,
|
||||
.flags = I2C_M_RD,
|
||||
.len = EDID_LENGTH,
|
||||
},
|
||||
};
|
||||
|
||||
unsigned char *buf;
|
||||
|
||||
buf = driver_mem_alloc(EDID_LENGTH * 3);
|
||||
if (!buf)
|
||||
return NULL;
|
||||
|
||||
msgs[1].buf = buf;
|
||||
if (i2c_transfer(&chan->adapter, msgs, 2) == 2)
|
||||
return buf;
|
||||
else
|
||||
dbg("i2c_transfer() failed\r\n");
|
||||
|
||||
driver_mem_free(buf);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
int32_t radeon_probe_i2c_connector(struct radeonfb_info *rinfo, int32_t conn, uint8_t **out_edid)
|
||||
{
|
||||
unsigned long reg = rinfo->i2c[conn - 1].ddc_reg;
|
||||
unsigned char *edid = NULL;
|
||||
int i, j;
|
||||
|
||||
OUTREG(reg, INREG(reg) & ~(VGA_DDC_DATA_OUTPUT | VGA_DDC_CLK_OUTPUT));
|
||||
OUTREG(reg, INREG(reg) & ~(VGA_DDC_CLK_OUT_EN));
|
||||
(void) INREG(reg);
|
||||
|
||||
for(i = 0; i < 3; i++)
|
||||
{
|
||||
/* For some old monitors we need the
|
||||
* following process to initialize/stop DDC
|
||||
*/
|
||||
OUTREG(reg, INREG(reg) & ~(VGA_DDC_DATA_OUT_EN));
|
||||
(void)INREG(reg);
|
||||
wait_ms(13);
|
||||
|
||||
OUTREG(reg, INREG(reg) & ~(VGA_DDC_CLK_OUT_EN));
|
||||
(void)INREG(reg);
|
||||
|
||||
for(j = 0; j < 5; j++)
|
||||
{
|
||||
wait_ms(10);
|
||||
if (INREG(reg) & VGA_DDC_CLK_INPUT)
|
||||
break;
|
||||
}
|
||||
|
||||
if (j == 5)
|
||||
continue;
|
||||
|
||||
OUTREG(reg, INREG(reg) | VGA_DDC_DATA_OUT_EN);
|
||||
(void) INREG(reg);
|
||||
wait_ms(15);
|
||||
|
||||
OUTREG(reg, INREG(reg) | VGA_DDC_CLK_OUT_EN);
|
||||
(void) INREG(reg);
|
||||
wait_ms(15);
|
||||
|
||||
OUTREG(reg, INREG(reg) & ~(VGA_DDC_DATA_OUT_EN));
|
||||
(void) INREG(reg);
|
||||
wait_ms(15);
|
||||
|
||||
/* Do the real work */
|
||||
edid = radeon_do_probe_i2c_edid(&rinfo->i2c[conn - 1]);
|
||||
OUTREG(reg, INREG(reg) | (VGA_DDC_DATA_OUT_EN | VGA_DDC_CLK_OUT_EN));
|
||||
(void) INREG(reg);
|
||||
wait_ms(15);
|
||||
OUTREG(reg, INREG(reg) & ~(VGA_DDC_CLK_OUT_EN));
|
||||
(void) INREG(reg);
|
||||
for(j = 0; j < 10; j++)
|
||||
{
|
||||
wait_ms(10);
|
||||
if (INREG(reg) & VGA_DDC_CLK_INPUT)
|
||||
break;
|
||||
}
|
||||
OUTREG(reg, INREG(reg) & ~(VGA_DDC_DATA_OUT_EN));
|
||||
(void) INREG(reg);
|
||||
wait_ms(15);
|
||||
|
||||
OUTREG(reg, INREG(reg) | (VGA_DDC_DATA_OUT_EN | VGA_DDC_CLK_OUT_EN));
|
||||
(void) INREG(reg);
|
||||
|
||||
if (edid)
|
||||
break;
|
||||
}
|
||||
/* Release the DDC lines when done or the Apple Cinema HD display
|
||||
* will switch off */
|
||||
OUTREG(reg, INREG(reg) & ~(VGA_DDC_CLK_OUT_EN | VGA_DDC_DATA_OUT_EN));
|
||||
(void) INREG(reg);
|
||||
|
||||
if (out_edid)
|
||||
*out_edid = edid;
|
||||
|
||||
if (!edid)
|
||||
return MT_NONE;
|
||||
|
||||
if (edid[0x14] & 0x80)
|
||||
{
|
||||
/* Fix detection using BIOS tables */
|
||||
if(rinfo->is_mobility /*&& conn == ddc_dvi*/ && (INREG(LVDS_GEN_CNTL) & LVDS_ON))
|
||||
return MT_LCD;
|
||||
else
|
||||
return MT_DFP;
|
||||
}
|
||||
return MT_CRT;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_FB_RADEON_I2C */
|
||||
File diff suppressed because it is too large
Load Diff
213
spi/dspi.c
213
spi/dspi.c
@@ -30,79 +30,79 @@
|
||||
|
||||
struct baudrate
|
||||
{
|
||||
int br_divisor;
|
||||
int pbr_divisor;
|
||||
int divider;
|
||||
int br_divisor;
|
||||
int pbr_divisor;
|
||||
int divider;
|
||||
};
|
||||
|
||||
static const int system_clock = 132000000; /* System clock in Hz */
|
||||
|
||||
struct baudrate baudrates[] =
|
||||
static struct baudrate baudrates[] =
|
||||
{
|
||||
{ 0b0000, 0b00, 4 },
|
||||
{ 0b0000, 0b01, 6 },
|
||||
{ 0b0001, 0b00, 8 },
|
||||
{ 0b0000, 0b10, 10 },
|
||||
{ 0b0001, 0b01, 12 },
|
||||
{ 0b0010, 0b00, 12 },
|
||||
{ 0b0000, 0b11, 14 },
|
||||
{ 0b0011, 0b00, 16 },
|
||||
{ 0b0010, 0b01, 18 },
|
||||
{ 0b0001, 0b10, 20 },
|
||||
{ 0b0011, 0b01, 24 },
|
||||
{ 0b0001, 0b11, 28 },
|
||||
{ 0b0010, 0b10, 30 },
|
||||
{ 0b0100, 0b00, 32 },
|
||||
{ 0b0011, 0b10, 40 },
|
||||
{ 0b0010, 0b11, 42 },
|
||||
{ 0b0100, 0b01, 48 },
|
||||
{ 0b0011, 0b11, 56 },
|
||||
{ 0b0101, 0b00, 64 },
|
||||
{ 0b0100, 0b10, 80 },
|
||||
{ 0b0101, 0b01, 96 },
|
||||
{ 0b0100, 0b11, 112 },
|
||||
{ 0b0110, 0b00, 128 },
|
||||
{ 0b0101, 0b10, 160 },
|
||||
{ 0b0110, 0b01, 192 },
|
||||
{ 0b0101, 0b11, 224 },
|
||||
{ 0b0111, 0b00, 256 },
|
||||
{ 0b0110, 0b10, 320 },
|
||||
{ 0b0111, 0b01, 384 },
|
||||
{ 0b0110, 0b11, 448 },
|
||||
{ 0b1000, 0b00, 512 },
|
||||
{ 0b0111, 0b10, 640 },
|
||||
{ 0b1000, 0b01, 768 },
|
||||
{ 0b0111, 0b11, 896 },
|
||||
{ 0b1001, 0b00, 1024 },
|
||||
{ 0b1000, 0b10, 1280 },
|
||||
{ 0b1001, 0b01, 1536 },
|
||||
{ 0b1000, 0b11, 1792 },
|
||||
{ 0b1010, 0b00, 2048 },
|
||||
{ 0b1001, 0b10, 2560 },
|
||||
{ 0b1010, 0b01, 3072 },
|
||||
{ 0b1001, 0b11, 3584 },
|
||||
{ 0b1011, 0b00, 4096 },
|
||||
{ 0b1010, 0b10, 5120 },
|
||||
{ 0b1011, 0b01, 6144 },
|
||||
{ 0b1010, 0b11, 7168 },
|
||||
{ 0b1100, 0b00, 8192 },
|
||||
{ 0b1011, 0b10, 10240 },
|
||||
{ 0b1100, 0b01, 12288 },
|
||||
{ 0b1011, 0b11, 14336 },
|
||||
{ 0b1101, 0b00, 16384 },
|
||||
{ 0b1100, 0b10, 20480 },
|
||||
{ 0b1101, 0b01, 24576 },
|
||||
{ 0b1100, 0b11, 28672 },
|
||||
{ 0b1110, 0b00, 32768 },
|
||||
{ 0b1101, 0b10, 40960 },
|
||||
{ 0b1110, 0b01, 49152 },
|
||||
{ 0b1101, 0b11, 57344 },
|
||||
{ 0b1111, 0b00, 65536 },
|
||||
{ 0b1110, 0b10, 81920 },
|
||||
{ 0b1111, 0b01, 98304 },
|
||||
{ 0b1110, 0b11, 114688 },
|
||||
{ 0b1111, 0b10, 163840 },
|
||||
{ 0b1111, 0b11, 229376 },
|
||||
{ 0b0000, 0b00, 4 },
|
||||
{ 0b0000, 0b01, 6 },
|
||||
{ 0b0001, 0b00, 8 },
|
||||
{ 0b0000, 0b10, 10 },
|
||||
{ 0b0001, 0b01, 12 },
|
||||
{ 0b0010, 0b00, 12 },
|
||||
{ 0b0000, 0b11, 14 },
|
||||
{ 0b0011, 0b00, 16 },
|
||||
{ 0b0010, 0b01, 18 },
|
||||
{ 0b0001, 0b10, 20 },
|
||||
{ 0b0011, 0b01, 24 },
|
||||
{ 0b0001, 0b11, 28 },
|
||||
{ 0b0010, 0b10, 30 },
|
||||
{ 0b0100, 0b00, 32 },
|
||||
{ 0b0011, 0b10, 40 },
|
||||
{ 0b0010, 0b11, 42 },
|
||||
{ 0b0100, 0b01, 48 },
|
||||
{ 0b0011, 0b11, 56 },
|
||||
{ 0b0101, 0b00, 64 },
|
||||
{ 0b0100, 0b10, 80 },
|
||||
{ 0b0101, 0b01, 96 },
|
||||
{ 0b0100, 0b11, 112 },
|
||||
{ 0b0110, 0b00, 128 },
|
||||
{ 0b0101, 0b10, 160 },
|
||||
{ 0b0110, 0b01, 192 },
|
||||
{ 0b0101, 0b11, 224 },
|
||||
{ 0b0111, 0b00, 256 },
|
||||
{ 0b0110, 0b10, 320 },
|
||||
{ 0b0111, 0b01, 384 },
|
||||
{ 0b0110, 0b11, 448 },
|
||||
{ 0b1000, 0b00, 512 },
|
||||
{ 0b0111, 0b10, 640 },
|
||||
{ 0b1000, 0b01, 768 },
|
||||
{ 0b0111, 0b11, 896 },
|
||||
{ 0b1001, 0b00, 1024 },
|
||||
{ 0b1000, 0b10, 1280 },
|
||||
{ 0b1001, 0b01, 1536 },
|
||||
{ 0b1000, 0b11, 1792 },
|
||||
{ 0b1010, 0b00, 2048 },
|
||||
{ 0b1001, 0b10, 2560 },
|
||||
{ 0b1010, 0b01, 3072 },
|
||||
{ 0b1001, 0b11, 3584 },
|
||||
{ 0b1011, 0b00, 4096 },
|
||||
{ 0b1010, 0b10, 5120 },
|
||||
{ 0b1011, 0b01, 6144 },
|
||||
{ 0b1010, 0b11, 7168 },
|
||||
{ 0b1100, 0b00, 8192 },
|
||||
{ 0b1011, 0b10, 10240 },
|
||||
{ 0b1100, 0b01, 12288 },
|
||||
{ 0b1011, 0b11, 14336 },
|
||||
{ 0b1101, 0b00, 16384 },
|
||||
{ 0b1100, 0b10, 20480 },
|
||||
{ 0b1101, 0b01, 24576 },
|
||||
{ 0b1100, 0b11, 28672 },
|
||||
{ 0b1110, 0b00, 32768 },
|
||||
{ 0b1101, 0b10, 40960 },
|
||||
{ 0b1110, 0b01, 49152 },
|
||||
{ 0b1101, 0b11, 57344 },
|
||||
{ 0b1111, 0b00, 65536 },
|
||||
{ 0b1110, 0b10, 81920 },
|
||||
{ 0b1111, 0b01, 98304 },
|
||||
{ 0b1110, 0b11, 114688 },
|
||||
{ 0b1111, 0b10, 163840 },
|
||||
{ 0b1111, 0b11, 229376 },
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -110,28 +110,29 @@ struct baudrate baudrates[] =
|
||||
*/
|
||||
int dspi_set_baudrate(int rate)
|
||||
{
|
||||
int set_baudrate = 0;
|
||||
int br;
|
||||
int pbr;
|
||||
int i;
|
||||
int set_baudrate = 0;
|
||||
int br;
|
||||
int pbr;
|
||||
int i;
|
||||
|
||||
for (i = sizeof(baudrates) / sizeof(struct baudrate) - 1; i >= 0; i--)
|
||||
{
|
||||
set_baudrate = system_clock / baudrates[i].divider;
|
||||
for (i = sizeof(baudrates) / sizeof(struct baudrate) - 1; i >= 0; i--)
|
||||
{
|
||||
set_baudrate = system_clock / baudrates[i].divider;
|
||||
|
||||
if (set_baudrate > rate)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
br = baudrates[i].br_divisor;
|
||||
pbr = baudrates[i].pbr_divisor;
|
||||
if (set_baudrate > rate)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
br = baudrates[i].br_divisor;
|
||||
pbr = baudrates[i].pbr_divisor;
|
||||
|
||||
/* TODO: set br and pbr here */
|
||||
/* TODO: set br and pbr here */
|
||||
(void) pbr;
|
||||
(void) br;
|
||||
return set_baudrate;
|
||||
}
|
||||
|
||||
return set_baudrate;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint32_t dspi_fifo_val = MCF_DSPI_DTFR_CTCNT;
|
||||
@@ -141,20 +142,20 @@ static uint32_t dspi_fifo_val = MCF_DSPI_DTFR_CTCNT;
|
||||
*/
|
||||
uint8_t dspi_xchg_byte(int device, uint8_t byte, int last)
|
||||
{
|
||||
uint32_t fifo;
|
||||
uint8_t res;
|
||||
uint32_t fifo;
|
||||
uint8_t res;
|
||||
|
||||
fifo = dspi_fifo_val | (byte & 0xff); /* transfer bytes only */
|
||||
fifo |= (last ? MCF_DSPI_DTFR_EOQ : 0); /* mark last transfer */
|
||||
MCF_DSPI_DTFR = fifo;
|
||||
while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until DSPI transfer complete */
|
||||
fifo = MCF_DSPI_DRFR; /* read transferred word */
|
||||
fifo = dspi_fifo_val | (byte & 0xff); /* transfer bytes only */
|
||||
fifo |= (last ? MCF_DSPI_DTFR_EOQ : 0); /* mark last transfer */
|
||||
MCF_DSPI_DTFR = fifo;
|
||||
while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until DSPI transfer complete */
|
||||
fifo = MCF_DSPI_DRFR; /* read transferred word */
|
||||
|
||||
MCF_DSPI_DSR = -1; /* clear DSPI status register */
|
||||
MCF_DSPI_DSR = -1; /* clear DSPI status register */
|
||||
|
||||
res = fifo & 0xff;
|
||||
res = fifo & 0xff;
|
||||
|
||||
return res;
|
||||
return res;
|
||||
}
|
||||
|
||||
/* Receive multiple byte with 0xff as output
|
||||
@@ -162,13 +163,13 @@ uint8_t dspi_xchg_byte(int device, uint8_t byte, int last)
|
||||
* buff: pointer to data buffer
|
||||
* btr: number of bytes to receive (16, 64 or 512)
|
||||
*/
|
||||
static void dspi_rcv_byte_multi(int device, uint8_t *buff, uint32_t count)
|
||||
void dspi_rcv_byte_multi(int device, uint8_t *buff, uint32_t count)
|
||||
{
|
||||
int i;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < count - 1; i++)
|
||||
*buff++ = dspi_xchg_byte(device, 0xff, 0);
|
||||
*buff++ = dspi_xchg_byte(device, 0xff, 1); /* transfer last byte and stop transmission */
|
||||
for (i = 0; i < count - 1; i++)
|
||||
*buff++ = dspi_xchg_byte(device, 0xff, 0);
|
||||
*buff++ = dspi_xchg_byte(device, 0xff, 1); /* transfer last byte and stop transmission */
|
||||
}
|
||||
|
||||
/* Send multiple byte, discard input
|
||||
@@ -176,12 +177,12 @@ static void dspi_rcv_byte_multi(int device, uint8_t *buff, uint32_t count)
|
||||
* buff: pointer to data
|
||||
* btx: number of bytes to send
|
||||
*/
|
||||
static void dspi_xmt_byte_multi(int device, const uint8_t *buff, uint32_t btx)
|
||||
void dspi_xmt_byte_multi(int device, const uint8_t *buff, uint32_t btx)
|
||||
{
|
||||
int i;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < btx - 1; i++)
|
||||
dspi_xchg_byte(device, *buff++, 0);
|
||||
dspi_xchg_byte(device, *buff++, 1); /* transfer last byte and indicate end of transmission */
|
||||
for (i = 0; i < btx - 1; i++)
|
||||
dspi_xchg_byte(device, *buff++, 0);
|
||||
dspi_xchg_byte(device, *buff++, 1); /* transfer last byte and indicate end of transmission */
|
||||
}
|
||||
|
||||
|
||||
138
spi/sd_card.c
138
spi/sd_card.c
@@ -41,81 +41,81 @@
|
||||
*/
|
||||
void sd_card_init(void)
|
||||
{
|
||||
DRESULT res;
|
||||
FATFS fs;
|
||||
FRESULT fres;
|
||||
DRESULT res;
|
||||
FATFS fs;
|
||||
FRESULT fres;
|
||||
|
||||
disk_initialize(0);
|
||||
res = disk_status(0);
|
||||
xprintf("disk status of SD card is %d\r\n", res);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
xprintf("mount status of SD card fs is %d\r\n", fres);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
DIR directory;
|
||||
FIL file;
|
||||
disk_initialize(0);
|
||||
res = disk_status(0);
|
||||
xprintf("disk status of SD card is %d\r\n", res);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
xprintf("mount status of SD card fs is %d\r\n", fres);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
DIR directory;
|
||||
FIL file;
|
||||
|
||||
fres = f_opendir(&directory, "\\");
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
FILINFO fi;
|
||||
fres = f_opendir(&directory, "\\");
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
FILINFO fi;
|
||||
|
||||
while (((fres = f_readdir(&directory, &fi)) == FR_OK) && fi.fname[0])
|
||||
{
|
||||
xprintf("%13.13s %d\r\n", fi.fname, fi.fsize);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("could not open directory \"\\\" on SD-card! Error code: %d\r\n", fres);
|
||||
}
|
||||
while (((fres = f_readdir(&directory, &fi)) == FR_OK) && fi.fname[0])
|
||||
{
|
||||
xprintf("%13.13s %d\r\n", fi.fname, fi.fsize);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("could not open directory \"\\\" on SD-card! Error code: %d\r\n", fres);
|
||||
}
|
||||
|
||||
/*
|
||||
* let's see if we find our boot flashing executable on disk
|
||||
*/
|
||||
fres = f_open(&file, FLASHCODE_NAME, FA_READ);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
/*
|
||||
* yes, load and execute it
|
||||
*
|
||||
* FIXME: we will need some kind of user confirmation here
|
||||
* to avoid unwanted flashing or "bootsector viruses" before going productive
|
||||
*/
|
||||
uint32_t size; /* length of code piece read */
|
||||
uint32_t total_size = 0L;
|
||||
int32_t start_time = MCF_SLT_SCNT(0);
|
||||
int32_t end_time;
|
||||
int32_t time = 0;
|
||||
/*
|
||||
* let's see if we find our boot flashing executable on disk
|
||||
*/
|
||||
fres = f_open(&file, FLASHCODE_NAME, FA_READ);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
/*
|
||||
* yes, load and execute it
|
||||
*
|
||||
* FIXME: we will need some kind of user confirmation here
|
||||
* to avoid unwanted flashing or "bootsector viruses" before going productive
|
||||
*/
|
||||
uint32_t size; /* length of code piece read */
|
||||
uint32_t total_size = 0L;
|
||||
int32_t start_time = MCF_SLT_SCNT(0);
|
||||
int32_t end_time;
|
||||
int32_t time = 0;
|
||||
|
||||
while ((fres = f_read(&file, (void *) FLASHCODE_ADDRESS, 1024 * 1000, &size)) == FR_OK && size > 0)
|
||||
{
|
||||
total_size += size / 1024;
|
||||
xprintf("read hunk of %d bytes, total_size = %d kBytes\r\n", size, total_size);
|
||||
}
|
||||
end_time = MCF_SLT_SCNT(0);
|
||||
time = (end_time - start_time) / 132L;
|
||||
xprintf("result of f_read: %ld, %ld kbytes read\r\n", fres, total_size);
|
||||
xprintf("time to load %s: %ld s\r\n", FLASHCODE_NAME, time / 1000 / 100);
|
||||
xprintf("equals to about %ld kBytes/second\r\n", total_size / (time / 1000 / 100));
|
||||
while ((fres = f_read(&file, (void *) FLASHCODE_ADDRESS, 1024 * 1000, &size)) == FR_OK && size > 0)
|
||||
{
|
||||
total_size += size / 1024;
|
||||
xprintf("read hunk of %d bytes, total_size = %d kBytes\r\n", size, total_size);
|
||||
}
|
||||
end_time = MCF_SLT_SCNT(0);
|
||||
time = (end_time - start_time) / 132L;
|
||||
xprintf("result of f_read: %ld, %ld kbytes read\r\n", fres, total_size);
|
||||
xprintf("time to load %s: %ld s\r\n", FLASHCODE_NAME, time / 1000 / 100);
|
||||
xprintf("equals to about %ld kBytes/second\r\n", total_size / (time / 1000 / 100));
|
||||
|
||||
}
|
||||
f_close(&file);
|
||||
}
|
||||
f_close(&file);
|
||||
|
||||
fres = f_open(&file, WELCOME_NAME, FA_READ);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
char line[128];
|
||||
fres = f_open(&file, WELCOME_NAME, FA_READ);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
char line[128];
|
||||
|
||||
while (f_gets(line, sizeof(line), &file))
|
||||
{
|
||||
xprintf("%s", line);
|
||||
}
|
||||
}
|
||||
f_close(&file);
|
||||
}
|
||||
f_mount(0, 0L); /* release work area */
|
||||
}
|
||||
while (f_gets(line, sizeof(line), &file))
|
||||
{
|
||||
xprintf("%s", line);
|
||||
}
|
||||
}
|
||||
f_close(&file);
|
||||
}
|
||||
f_mount(0, 0L); /* release work area */
|
||||
}
|
||||
}
|
||||
|
||||
221
sys/BaS.c
221
sys/BaS.c
@@ -31,6 +31,7 @@
|
||||
#include "bas_printf.h"
|
||||
#include "bas_string.h"
|
||||
#include "bas_types.h"
|
||||
#include "bas_utils.h"
|
||||
#include "sd_card.h"
|
||||
#include "wait.h"
|
||||
|
||||
@@ -51,13 +52,8 @@
|
||||
#include "pci.h"
|
||||
#include "video.h"
|
||||
|
||||
//#define BAS_DEBUG
|
||||
#if defined(BAS_DEBUG)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif
|
||||
#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
// // #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
/* imported routines */
|
||||
extern int vec_init();
|
||||
@@ -179,8 +175,8 @@ void nvram_init(void)
|
||||
for (i = 0; i < 64; i++)
|
||||
{
|
||||
uint8_t data = read_pic_byte();
|
||||
*(volatile uint8_t*)0xffff8961 = i;
|
||||
*(volatile uint8_t*)0xffff8963 = data;
|
||||
* (volatile uint8_t*) 0xffff8961 = i;
|
||||
* (volatile uint8_t*) 0xffff8963 = data;
|
||||
}
|
||||
|
||||
xprintf("finished\r\n");
|
||||
@@ -195,13 +191,13 @@ void acia_init()
|
||||
{
|
||||
xprintf("init ACIA: ");
|
||||
/* init ACIA */
|
||||
KBD_ACIA_CONTROL = 3; /* master reset */
|
||||
KBD_ACIA_CONTROL = 3; /* master reset */
|
||||
NOP();
|
||||
|
||||
MIDI_ACIA_CONTROL = 3; /* master reset */
|
||||
MIDI_ACIA_CONTROL = 3; /* master reset */
|
||||
NOP();
|
||||
|
||||
KBD_ACIA_CONTROL = 0x96; /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */
|
||||
KBD_ACIA_CONTROL = 0x96; /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */
|
||||
NOP();
|
||||
|
||||
MFP_INTR_IN_SERVICE_A = 0xff;
|
||||
@@ -217,11 +213,12 @@ void enable_coldfire_interrupts()
|
||||
{
|
||||
xprintf("enable interrupts: ");
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
FBEE_INTR_CONTROL = 0L; /* disable all interrupts */
|
||||
FBEE_INTR_CONTROL = 0L; /* disable all interrupts */
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
MCF_EPORT_EPPAR = 0xaaa8; /* all interrupts on falling edge */
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
/*
|
||||
* TIN0 on the Coldfire is connected to the FPGA. TIN0 triggers every write
|
||||
@@ -231,14 +228,21 @@ void enable_coldfire_interrupts()
|
||||
MCF_GPT_GMS_IEN |
|
||||
MCF_GPT_GMS_TMS(1); /* route GPT0 interrupt on interrupt controller */
|
||||
MCF_INTC_ICR62 = MCF_INTC_ICR_IL(7) |
|
||||
MCF_INTC_ICR_IP(6); /* interrupt level 7, interrupt priority 7 */
|
||||
|
||||
MCF_INTC_ICR_IP(6); /* interrupt level 7, interrupt priority 6 */
|
||||
MCF_INTC_IMRH = 0xbffffffe; /* psc3 and timer 0 int on */
|
||||
#endif
|
||||
#endif
|
||||
xprintf("finished\r\n");
|
||||
}
|
||||
|
||||
void enable_pci_interrupts()
|
||||
{
|
||||
dbg("enable PCI interrupts\r\n");
|
||||
MCF_EPORT_EPIER = 0xfe; /* int 1-7 on */
|
||||
MCF_EPORT_EPFR = 0xff; /* clear all pending interrupts */
|
||||
MCF_INTC_IMRL = 0xffffff00; /* int 1-7 on */
|
||||
//MCF_INTC_IMRH = 0xbffffffe; /* psc3 and timer 0 int on */
|
||||
MCF_INTC_IMRH = 0;
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
FBEE_INTR_ENABLE = FBEE_INTR_INT_IRQ7 | /* enable pseudo bus error */
|
||||
FBEE_INTR_INT_MFP_IRQ6 | /* enable MFP interrupts */
|
||||
FBEE_INTR_INT_FPGA_IRQ5 | /* enable Firebee (PIC, PCI, ETH PHY, DVI, DSP) interrupts */
|
||||
@@ -247,15 +251,26 @@ void enable_coldfire_interrupts()
|
||||
FBEE_INTR_PCI_INTB |
|
||||
FBEE_INTR_PCI_INTC |
|
||||
FBEE_INTR_PCI_INTD;
|
||||
#endif
|
||||
;
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
/*
|
||||
* MCF 5484 interrupts are configured at the CPLD for the FireEngine
|
||||
*/
|
||||
|
||||
xprintf("finished\r\n");
|
||||
/* TODO: enable PCI interrupts on the LITEKIT */
|
||||
#elif defined(MACHINE_M54455)
|
||||
/* MCF 54455 interrupts are configured at the FPGA */
|
||||
|
||||
/* TODO: enable PCI interrupts on the MCF54455 */
|
||||
#else
|
||||
#error unknown machine!
|
||||
#endif
|
||||
}
|
||||
|
||||
void disable_coldfire_interrupts()
|
||||
{
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
FBEE_INTR_ENABLE = 0; /* disable all interrupts */
|
||||
FBEE_INTR_ENABLE = 0; /* disable all interrupts */
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
MCF_EPORT_EPIER = 0x0;
|
||||
@@ -267,22 +282,43 @@ void disable_coldfire_interrupts()
|
||||
|
||||
NIF nif1;
|
||||
#if defined(MACHINE_M5484LITE)
|
||||
/*
|
||||
* on the MCF 5484 LITEKIT, the second FEC interface is usable
|
||||
*/
|
||||
NIF nif2;
|
||||
#endif
|
||||
|
||||
bool spurious_interrupt_handler(void *arg1, void *arg2)
|
||||
{
|
||||
err("spurious interrupt\r\n");
|
||||
err("IMRH=%lx, IMRL=%lx\r\n", MCF_INTC_IMRH, MCF_INTC_IMRL);
|
||||
err("IPRH=%lx, IPRL=%lx\r\n", MCF_INTC_IPRH, MCF_INTC_IPRL);
|
||||
err("IRLR=%x\r\n", MCF_INTC_IRLR);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/*
|
||||
* initialize the interrupt handler tables to dispatch interrupt requests from Coldfire devices
|
||||
*/
|
||||
void init_isr(void)
|
||||
{
|
||||
isr_init(); /* need to call that explicitely, otherwise isr table might be full */
|
||||
isr_init(); /* need to call that explicitely, otherwise isr table might be full */
|
||||
|
||||
/*
|
||||
* register spurious interrupt handler
|
||||
*/
|
||||
if (!isr_register_handler(24, 6, 6, spurious_interrupt_handler, NULL, NULL))
|
||||
{
|
||||
dbg("unable to register spurious interrupt handler\r\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* register the FEC interrupt handler
|
||||
*/
|
||||
if (!isr_register_handler(64 + INT_SOURCE_FEC0, 5, 1, fec0_interrupt_handler, NULL, (void *) &nif1))
|
||||
{
|
||||
err("unable to register isr for FEC0\r\n");
|
||||
dbg("unable to register isr for FEC0\r\n");
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -291,16 +327,16 @@ void init_isr(void)
|
||||
|
||||
if (!isr_register_handler(64 + INT_SOURCE_DMA, 5, 3, dma_interrupt_handler, NULL, NULL))
|
||||
{
|
||||
err("unable to register isr for DMA\r\n");
|
||||
dbg("unable to register isr for DMA\r\n");
|
||||
}
|
||||
|
||||
#ifdef MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
/*
|
||||
* register GPT0 timer interrupt vector
|
||||
*/
|
||||
if (!isr_register_handler(64 + INT_SOURCE_GPT0, 5, 2, gpt0_interrupt_handler, NULL, NULL))
|
||||
{
|
||||
err("unable to register isr for GPT0 timer\r\n");
|
||||
dbg("unable to register isr for GPT0 timer\r\n");
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -308,34 +344,62 @@ void init_isr(void)
|
||||
*/
|
||||
if (!isr_register_handler(64 + INT_SOURCE_PSC3, 5, 5, pic_interrupt_handler, NULL, NULL))
|
||||
{
|
||||
err("Error: unable to register ISR for PSC3\r\n");
|
||||
dbg("Error: unable to register ISR for PSC3\r\n");
|
||||
}
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
/*
|
||||
* register the XLB PCI interrupt handler
|
||||
*/
|
||||
if (!isr_register_handler(64 + INT_SOURCE_XLBPCI, 7, 0, xlbpci_interrupt_handler, NULL, NULL))
|
||||
if (!isr_register_handler(64 + INT_SOURCE_XLBPCI, 3, 0, xlbpci_interrupt_handler, NULL, NULL))
|
||||
{
|
||||
err("Error: unable to register isr for XLB PCI interrupts\r\n");
|
||||
dbg("Error: unable to register isr for XLB PCI interrupts\r\n");
|
||||
}
|
||||
|
||||
MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */
|
||||
MCF_XLB_XARB_IMR_MME | /* multiple master at prio 0 interrupt */
|
||||
MCF_XLB_XARB_IMR_TTAE | /* TT address only interrupt */
|
||||
MCF_XLB_XARB_IMR_TTRE | /* TT reserved interrupt enable */
|
||||
MCF_XLB_XARB_IMR_ECWE | /* external control word interrupt */
|
||||
MCF_XLB_XARB_IMR_TTME | /* TBST/TSIZ mismatch interrupt */
|
||||
MCF_XLB_XARB_IMR_BAE; /* bus activity tenure timeout interrupt */
|
||||
MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */
|
||||
MCF_XLB_XARB_IMR_MME | /* multiple master at prio 0 interrupt */
|
||||
MCF_XLB_XARB_IMR_TTAE | /* TT address only interrupt */
|
||||
MCF_XLB_XARB_IMR_TTRE | /* TT reserved interrupt enable */
|
||||
MCF_XLB_XARB_IMR_ECWE | /* external control word interrupt */
|
||||
MCF_XLB_XARB_IMR_TTME | /* TBST/TSIZ mismatch interrupt */
|
||||
MCF_XLB_XARB_IMR_BAE; /* bus activity tenure timeout interrupt */
|
||||
|
||||
if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 7, 1, pciarb_interrupt_handler, NULL, NULL))
|
||||
if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 5, 0, pciarb_interrupt_handler, NULL, NULL))
|
||||
{
|
||||
err("Error: unable to register isr for PCIARB interrupts\r\n");
|
||||
dbg("Error: unable to register isr for PCIARB interrupts\r\n");
|
||||
|
||||
return;
|
||||
}
|
||||
MCF_PCIARB_PACR = MCF_PCIARB_PACR_EXTMINTEN(0x1f) | /* external master broken interrupt */
|
||||
MCF_PCIARB_PACR_INTMINTEN; /* internal master broken interrupt */
|
||||
|
||||
if (!isr_register_handler(64 + INT_SOURCE_XLBARB, 7, 1, xlbarb_interrupt_handler, NULL, NULL))
|
||||
{
|
||||
dbg("Error: unable to register isr for XLB ARB interrupts\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
/* Jump into the OS */
|
||||
typedef void void_func(void);
|
||||
struct rom_header
|
||||
{
|
||||
void *initial_sp;
|
||||
void_func *initial_pc;
|
||||
};
|
||||
|
||||
/*
|
||||
* fix ST RAM header (address 0x0 and 0x4). FreeMiNT uses these vectors on CTRL-ALT-DEL.
|
||||
*
|
||||
* Beware: Newer compilers refuse to dereference pointers to NULL and abort if the following
|
||||
* attribute isn't set.
|
||||
*/
|
||||
static void fix_stram_header() __attribute__((optimize("no-delete-null-pointer-checks")));
|
||||
static void fix_stram_header()
|
||||
{
|
||||
struct rom_header *bas_header = (struct rom_header *) TARGET_ADDRESS;
|
||||
struct rom_header *stram_header = (struct rom_header *) 0x0;
|
||||
|
||||
*stram_header = *bas_header;
|
||||
}
|
||||
|
||||
void BaS(void)
|
||||
@@ -352,13 +416,14 @@ void BaS(void)
|
||||
mmu_init();
|
||||
xprintf("finished\r\n");
|
||||
|
||||
xprintf("copy EmuTOS: ");
|
||||
|
||||
xprintf("initialize Coldfire DMA: ");
|
||||
dma_init();
|
||||
xprintf("finished\r\n");
|
||||
|
||||
xprintf("copy EmuTOS: ");
|
||||
/* copy EMUTOS */
|
||||
src = (uint8_t *) EMUTOS;
|
||||
dma_memcpy(dst, src, EMUTOS_SIZE);
|
||||
memcpy(dst, src, EMUTOS_SIZE);
|
||||
xprintf("finished\r\n");
|
||||
|
||||
xprintf("initialize exception vector table: ");
|
||||
@@ -373,7 +438,7 @@ void BaS(void)
|
||||
NOP(); /* force pipeline sync */
|
||||
xprintf("finished\r\n");
|
||||
|
||||
#ifdef MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
xprintf("IDE reset: ");
|
||||
/* IDE reset */
|
||||
* (volatile uint8_t *) (0xffff8802 - 2) = 14;
|
||||
@@ -384,16 +449,17 @@ void BaS(void)
|
||||
|
||||
xprintf("finished\r\n");
|
||||
xprintf("enable video: ");
|
||||
|
||||
/*
|
||||
* video setup (25MHz)
|
||||
*/
|
||||
* (volatile uint32_t *) (0xf0000410 + 0) = 0x032002ba; /* horizontal 640x480 */
|
||||
* (volatile uint32_t *) (0xf0000410 + 4) = 0x020c020a; /* vertical 640x480 */
|
||||
* (volatile uint32_t *) (0xf0000410 + 8) = 0x0190015d; /* horizontal 320x240 */
|
||||
* (volatile uint32_t *) (0xf0000410 + 12) = 0x020C020A; /* vertical 320x230 */
|
||||
* (volatile uint32_t *) 0xf0000410 = 0x032002ba; /* horizontal 640x480 */
|
||||
* (volatile uint32_t *) 0xf0000414 = 0x020c020a; /* vertical 640x480 */
|
||||
* (volatile uint32_t *) 0xf0000418 = 0x0190015d; /* horizontal 320x240 */
|
||||
* (volatile uint32_t *) 0xf000041c = 0x020c020a; /* vertical 320x230 */
|
||||
|
||||
/* fifo on, refresh on, ddrcs and cke on, video dac on */
|
||||
* (volatile uint32_t *) (0xf0000410 - 0x20) = 0x01070002;
|
||||
* (volatile uint32_t *) 0xf0000400 = 0x01070082;
|
||||
|
||||
xprintf("finished\r\n");
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
@@ -403,7 +469,7 @@ void BaS(void)
|
||||
/*
|
||||
* memory setup
|
||||
*/
|
||||
memset((void *) 0x400, 0, 0x400);
|
||||
// memset((void *) 0x200, 0, 0x400);
|
||||
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
/* set Falcon bus control register */
|
||||
@@ -430,28 +496,69 @@ void BaS(void)
|
||||
|
||||
srec_execute("BASFLASH.S19");
|
||||
|
||||
/* Jump into the OS */
|
||||
typedef void void_func(void);
|
||||
struct rom_header
|
||||
{
|
||||
void *initial_sp;
|
||||
void_func *initial_pc;
|
||||
};
|
||||
|
||||
xprintf("BaS initialization finished, enable interrupts\r\n");
|
||||
init_isr();
|
||||
|
||||
enable_coldfire_interrupts();
|
||||
dma_irq_enable();
|
||||
MCF_INTC_IMRH = 0;
|
||||
MCF_INTC_IMRL = 0;
|
||||
|
||||
dma_irq_enable();
|
||||
fec_irq_enable(0, 5, 1);
|
||||
|
||||
enable_pci_interrupts();
|
||||
init_pci();
|
||||
// video_init();
|
||||
video_init();
|
||||
|
||||
/* initialize USB devices */
|
||||
//init_usb();
|
||||
init_usb();
|
||||
|
||||
set_ipl(7); /* disable interrupts */
|
||||
|
||||
/*
|
||||
* start FireTOS if DIP switch is set accordingly
|
||||
*/
|
||||
if (!(DIP_SWITCH & (1 << 6)))
|
||||
{
|
||||
extern uint8_t _FIRETOS[];
|
||||
#define FIRETOS ((uint32_t)_FIRETOS) /* where FireTOS is stored in flash */
|
||||
|
||||
/* make sure MMU is disabled */
|
||||
MCF_MMU_MMUCR = 0; /* MMU off */
|
||||
NOP(); /* force pipeline sync */
|
||||
|
||||
|
||||
/*
|
||||
* FireTOS wants to have the TOS system variables cleared
|
||||
*/
|
||||
memset((void *) 0x400, 0, 0x400);
|
||||
|
||||
/* ST RAM */
|
||||
|
||||
* (uint32_t *) 0x42e = STRAM_END; /* phystop TOS system variable */
|
||||
* (uint32_t *) 0x420 = 0x752019f3; /* memvalid TOS system variable */
|
||||
* (uint32_t *) 0x43a = 0x237698aa; /* memval2 TOS system variable */
|
||||
* (uint32_t *) 0x51a = 0x5555aaaa; /* memval3 TOS system variable */
|
||||
|
||||
/* TT-RAM */
|
||||
|
||||
* (uint32_t *) 0x5a4 = FASTRAM_END; /* ramtop TOS system variable */
|
||||
* (uint32_t *) 0x5a8 = 0x1357bd13; /* ramvalid TOS system variable */
|
||||
|
||||
xprintf("call FireTOS\r\n");
|
||||
/* Jump into FireTOS */
|
||||
|
||||
void_func* FireTOS = (void_func*) FIRETOS;
|
||||
FireTOS(); // Should never return
|
||||
}
|
||||
|
||||
/*
|
||||
* fix initial pc/sp in ST RAM for FreeMiNT. It expects valid values there
|
||||
* like on original STs (where these values reside in ROM) and uses them on
|
||||
* CTRL-ALT-DELETE reboots.
|
||||
*/
|
||||
fix_stram_header();
|
||||
|
||||
xprintf("call EmuTOS\r\n");
|
||||
struct rom_header *os_header = (struct rom_header *) TOS;
|
||||
os_header->initial_pc();
|
||||
|
||||
226
sys/cache.c
226
sys/cache.c
@@ -26,60 +26,61 @@
|
||||
|
||||
void cacr_set(uint32_t value)
|
||||
{
|
||||
extern uint32_t rt_cacr;
|
||||
extern uint32_t rt_cacr;
|
||||
|
||||
rt_cacr = value;
|
||||
__asm__ __volatile__("movec %0, cacr\n\t"
|
||||
: /* output */
|
||||
: "r" (rt_cacr)
|
||||
: "memory" /* clobbers */);
|
||||
rt_cacr = value;
|
||||
__asm__ __volatile__(
|
||||
" movec %0, cacr\n\t"
|
||||
: /* output */
|
||||
: "r" (rt_cacr)
|
||||
: "memory" /* clobbers */);
|
||||
}
|
||||
|
||||
uint32_t cacr_get(void)
|
||||
{
|
||||
extern uint32_t rt_cacr;
|
||||
extern uint32_t rt_cacr;
|
||||
|
||||
return rt_cacr;
|
||||
return rt_cacr;
|
||||
}
|
||||
|
||||
void disable_data_cache(void)
|
||||
{
|
||||
flush_and_invalidate_caches();
|
||||
cacr_set((cacr_get() | CF_CACR_DCINVA) & ~CF_CACR_DEC);
|
||||
flush_and_invalidate_caches();
|
||||
cacr_set((cacr_get() | CF_CACR_DCINVA) & ~CF_CACR_DEC);
|
||||
}
|
||||
|
||||
void disable_instruction_cache(void)
|
||||
{
|
||||
flush_and_invalidate_caches();
|
||||
cacr_set((cacr_get() | CF_CACR_ICINVA) & ~CF_CACR_IEC);
|
||||
flush_and_invalidate_caches();
|
||||
cacr_set((cacr_get() | CF_CACR_ICINVA) & ~CF_CACR_IEC);
|
||||
}
|
||||
|
||||
void enable_data_cache(void)
|
||||
{
|
||||
cacr_set(cacr_get() & ~CF_CACR_DCINVA);
|
||||
cacr_set(cacr_get() & ~CF_CACR_DCINVA);
|
||||
}
|
||||
|
||||
void flush_and_invalidate_caches(void)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
" clr.l d0 \n\t"
|
||||
" clr.l d1 \n\t"
|
||||
" move.l d0,a0 \n\t"
|
||||
"cfa_setloop: \n\t"
|
||||
" cpushl bc,(a0) | flush\n\t"
|
||||
" lea 0x10(a0),a0 | index+1\n\t"
|
||||
" addq.l #1,d1 | index+1\n\t"
|
||||
" cmpi.w #512,d1 | all sets?\n\t"
|
||||
" bne.s cfa_setloop | no->\n\t"
|
||||
" clr.l d1 \n\t"
|
||||
" addq.l #1,d0 \n\t"
|
||||
" move.l d0,a0 \n\t"
|
||||
" cmpi.w #4,d0 | all ways?\n\t"
|
||||
" bne.s cfa_setloop | no->\n\t"
|
||||
/* input */ :
|
||||
/* output */ :
|
||||
/* clobber */ : "cc", "d0", "d1", "a0"
|
||||
);
|
||||
__asm__ __volatile__(
|
||||
" clr.l d0 \n\t"
|
||||
" clr.l d1 \n\t"
|
||||
" move.l d0,a0 \n\t"
|
||||
"1: \n\t"
|
||||
" cpushl bc,(a0) | flush\n\t"
|
||||
" lea 0x10(a0),a0 | index+1\n\t"
|
||||
" addq.l #1,d1 | index+1\n\t"
|
||||
" cmpi.w #512,d1 | all sets?\n\t"
|
||||
" bne.s 1b | no->\n\t"
|
||||
" clr.l d1 \n\t"
|
||||
" addq.l #1,d0 \n\t"
|
||||
" move.l d0,a0 \n\t"
|
||||
" cmpi.w #4,d0 | all ways?\n\t"
|
||||
" bne.s 1b | no->\n\t"
|
||||
/* input */ :
|
||||
/* output */ :
|
||||
/* clobber */ : "cc", "d0", "d1", "a0"
|
||||
);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -87,48 +88,48 @@ void flush_and_invalidate_caches(void)
|
||||
*/
|
||||
void flush_icache_range(void *address, size_t size)
|
||||
{
|
||||
uint32_t set;
|
||||
uint32_t start_set;
|
||||
uint32_t end_set;
|
||||
void *endaddr = address + size;
|
||||
uint32_t set;
|
||||
uint32_t start_set;
|
||||
uint32_t end_set;
|
||||
void *endaddr = address + size;
|
||||
|
||||
start_set = (uint32_t) address & _ICACHE_SET_MASK;
|
||||
end_set = (uint32_t) endaddr & _ICACHE_SET_MASK;
|
||||
start_set = (uint32_t) address & _ICACHE_SET_MASK;
|
||||
end_set = (uint32_t) endaddr & _ICACHE_SET_MASK;
|
||||
|
||||
if (start_set > end_set) {
|
||||
/* from the begining to the lowest address */
|
||||
if (start_set > end_set) {
|
||||
/* from the begining to the lowest address */
|
||||
for (set = 0; set <= end_set; set += (0x10 - 3))
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
: /* output parameters */
|
||||
: [set] "a" (set) /* input parameters */
|
||||
: "cc" /* clobbered registers */
|
||||
);
|
||||
}
|
||||
/* next loop will finish the cache ie pass the hole */
|
||||
end_set = LAST_ICACHE_ADDR;
|
||||
}
|
||||
for (set = start_set; set <= end_set; set += (0x10 - 3)) {
|
||||
__asm__ __volatile__(
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set])"
|
||||
: /* output parameters */
|
||||
: [set] "a" (set)
|
||||
: "cc"
|
||||
);
|
||||
}
|
||||
__asm__ __volatile__(
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
: /* output parameters */
|
||||
: [set] "a" (set) /* input parameters */
|
||||
: "cc" /* clobbered registers */
|
||||
);
|
||||
}
|
||||
/* next loop will finish the cache ie pass the hole */
|
||||
end_set = LAST_ICACHE_ADDR;
|
||||
}
|
||||
for (set = start_set; set <= end_set; set += (0x10 - 3)) {
|
||||
__asm__ __volatile__(
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl ic,(%[set])"
|
||||
: /* output parameters */
|
||||
: [set] "a" (set)
|
||||
: "cc"
|
||||
);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -138,52 +139,53 @@ void flush_icache_range(void *address, size_t size)
|
||||
*/
|
||||
void flush_dcache_range(void *address, size_t size)
|
||||
{
|
||||
unsigned long set;
|
||||
unsigned long start_set;
|
||||
unsigned long end_set;
|
||||
void *endaddr;
|
||||
unsigned long set;
|
||||
unsigned long start_set;
|
||||
unsigned long end_set;
|
||||
void *endaddr;
|
||||
|
||||
endaddr = address + size;
|
||||
start_set = (uint32_t) address & _DCACHE_SET_MASK;
|
||||
end_set = (uint32_t) endaddr & _DCACHE_SET_MASK;
|
||||
endaddr = address + size;
|
||||
start_set = (uint32_t) address & _DCACHE_SET_MASK;
|
||||
end_set = (uint32_t) endaddr & _DCACHE_SET_MASK;
|
||||
|
||||
if (start_set > end_set) {
|
||||
/* from the begining to the lowest address */
|
||||
for (set = 0; set <= end_set; set += (0x10 - 3))
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
: /* output parameters */
|
||||
: [set] "a" (set)
|
||||
: "cc" /* clobbered registers */
|
||||
);
|
||||
}
|
||||
/* next loop will finish the cache ie pass the hole */
|
||||
end_set = LAST_DCACHE_ADDR;
|
||||
}
|
||||
for (set = start_set; set <= end_set; set += (0x10 - 3))
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq%.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
: /* output parameters */
|
||||
: [set] "a" (set)
|
||||
: "cc" /* clobbered registers */
|
||||
);
|
||||
}
|
||||
if (start_set > end_set) {
|
||||
/* from the begining to the lowest address */
|
||||
for (set = 0; set <= end_set; set += (0x10 - 3))
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
: /* output parameters */
|
||||
: [set] "a" (set)
|
||||
: "cc" /* clobbered registers */
|
||||
);
|
||||
}
|
||||
/* next loop will finish the cache ie pass the hole */
|
||||
end_set = LAST_DCACHE_ADDR;
|
||||
}
|
||||
for (set = start_set; set <= end_set; set += (0x10 - 3))
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq%.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
" addq.l #1,%[set] \n\t"
|
||||
" cpushl dc,(%[set]) \n\t"
|
||||
: /* output parameters */
|
||||
: [set] "a" (set)
|
||||
: "cc" /* clobbered registers */
|
||||
);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* flush and invalidate a specific region from the both caches. We do not know if the area is cached
|
||||
* at all, we do not know in which of the four ways it is cached, but we know the index where they
|
||||
|
||||
@@ -11,6 +11,7 @@
|
||||
* option any later version.
|
||||
*/
|
||||
|
||||
|
||||
#include <bas_types.h>
|
||||
#include "bas_string.h"
|
||||
#include "bas_printf.h"
|
||||
@@ -27,12 +28,8 @@
|
||||
#error "unknown machine!"
|
||||
#endif
|
||||
|
||||
//#define DBG_DM
|
||||
#ifdef DBG_DM
|
||||
#define dbg(fmt, args...) xprintf(fmt, ##args)
|
||||
#else
|
||||
#define dbg(fmt, args...)
|
||||
#endif
|
||||
// #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
extern long offscren_reserved(void);
|
||||
|
||||
@@ -258,7 +255,7 @@ int32_t driver_mem_free(void *addr)
|
||||
freeit(p, mpb);
|
||||
set_ipl(level);
|
||||
|
||||
dbg("%s: driver_mem_free(0x%08X)\r\n", __FUNCTION__, addr);
|
||||
dbg("addr=0x%08X)\r\n", addr);
|
||||
|
||||
return(0);
|
||||
}
|
||||
@@ -292,7 +289,7 @@ void *driver_mem_alloc(uint32_t amount)
|
||||
ret = (void *) m->m_start;
|
||||
}
|
||||
set_ipl(level);
|
||||
dbg("%s: driver_mem_alloc(%d) = 0x%08X\r\n", __FUNCTION__, amount, ret);
|
||||
dbg("alloc(%d) = 0x%08X\r\n", amount, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -303,7 +300,7 @@ int driver_mem_init(void)
|
||||
{
|
||||
if (use_count == 0)
|
||||
{
|
||||
dbg("%s: initialise driver_mem_buffer[] at %p, size 0x%x\r\n", __FUNCTION__, driver_mem_buffer, DRIVER_MEM_BUFFER_SIZE);
|
||||
dbg("initialise driver_mem_buffer[] at %p, size 0x%x\r\n", driver_mem_buffer, DRIVER_MEM_BUFFER_SIZE);
|
||||
memset(driver_mem_buffer, 0, DRIVER_MEM_BUFFER_SIZE);
|
||||
|
||||
pmd.mp_mfl = pmd.mp_rover = &tab_md[0];
|
||||
@@ -314,10 +311,10 @@ int driver_mem_init(void)
|
||||
pmd.mp_mal = (MD *) NULL;
|
||||
memset(driver_mem_buffer, 0, tab_md[0].m_length);
|
||||
|
||||
dbg("%s: uncached driver memory buffer at 0x%08X size %d\r\n", __FUNCTION__, tab_md[0].m_start, tab_md[0].m_length);
|
||||
dbg("uncached driver memory buffer at 0x%08X size %d\r\n", tab_md[0].m_start, tab_md[0].m_length);
|
||||
}
|
||||
use_count++;
|
||||
dbg("%s: driver_mem now has a use count of %d\r\n", __FUNCTION__, use_count);
|
||||
dbg("driver_mem now has a use count of %d\r\n", use_count);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -334,7 +331,7 @@ void driver_mem_release(void)
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
dbg("%s: driver_mem use count now %d\r\n", __FUNCTION__, use_count);
|
||||
dbg("driver_mem use count now %d\r\n", use_count);
|
||||
}
|
||||
|
||||
|
||||
|
||||
750
sys/exceptions.S
750
sys/exceptions.S
@@ -21,114 +21,114 @@
|
||||
*/
|
||||
|
||||
#include "startcf.h"
|
||||
#if MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#elif MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
.extern __SUP_SP
|
||||
.extern _rom_entry
|
||||
.extern __RAMBAR0
|
||||
.extern _rt_mod
|
||||
.extern _rt_ssp
|
||||
.extern _rt_usp
|
||||
.extern _rt_vbr
|
||||
.extern _mmutr_miss
|
||||
.extern __MBAR
|
||||
.extern __MMUBAR
|
||||
.extern _video_tlb
|
||||
.extern _video_sbt
|
||||
.extern _flush_and_invalidate_caches
|
||||
.extern _get_bas_drivers
|
||||
.extern __SUP_SP
|
||||
.extern _rom_entry
|
||||
.extern __RAMBAR0
|
||||
.extern _rt_mod
|
||||
.extern _rt_ssp
|
||||
.extern _rt_usp
|
||||
.extern _rt_vbr
|
||||
.extern _mmutr_miss
|
||||
.extern __MBAR
|
||||
.extern __MMUBAR
|
||||
.extern _video_tlb
|
||||
.extern _video_sbt
|
||||
.extern _flush_and_invalidate_caches
|
||||
.extern _get_bas_drivers
|
||||
|
||||
/* PCI interrupt handlers */
|
||||
.extern _irq5_handler
|
||||
.extern _irq6_handler
|
||||
.extern _irq7_handler
|
||||
/* PCI interrupt handlers */
|
||||
.extern _irq5_handler
|
||||
.extern _irq6_handler
|
||||
.extern _irq7_handler
|
||||
|
||||
.global _vec_init
|
||||
.global _std_exc_vec /* needed by driver_vec.c */
|
||||
.global _vec_init
|
||||
.global _std_exc_vec /* needed by driver_vec.c */
|
||||
|
||||
/* Register read/write equates */
|
||||
|
||||
/* MMU */
|
||||
.equ MCF_MMU_MMUCR, __MMUBAR
|
||||
.equ MCF_MMU_MMUOR, __MMUBAR+0x04
|
||||
.equ MCF_MMU_MMUSR, __MMUBAR+0x08
|
||||
.equ MCF_MMU_MMUAR, __MMUBAR+0x10
|
||||
.equ MCF_MMU_MMUTR, __MMUBAR+0x14
|
||||
.equ MCF_MMU_MMUDR, __MMUBAR+0x18
|
||||
/* MMU */
|
||||
.equ MCF_MMU_MMUCR, __MMUBAR
|
||||
.equ MCF_MMU_MMUOR, __MMUBAR+0x04
|
||||
.equ MCF_MMU_MMUSR, __MMUBAR+0x08
|
||||
.equ MCF_MMU_MMUAR, __MMUBAR+0x10
|
||||
.equ MCF_MMU_MMUTR, __MMUBAR+0x14
|
||||
.equ MCF_MMU_MMUDR, __MMUBAR+0x18
|
||||
|
||||
/* EPORT flag register */
|
||||
.equ MCF_EPORT_EPFR, __MBAR+0xf0c
|
||||
/* EPORT flag register */
|
||||
.equ MCF_EPORT_EPFR, __MBAR+0xf0c
|
||||
|
||||
/* FEC1 port output data direction register */
|
||||
.equ MCF_GPIO_PODR_FEC1L, __MBAR+0xa07
|
||||
/* FEC1 port output data direction register */
|
||||
.equ MCF_GPIO_PODR_FEC1L, __MBAR+0xa07
|
||||
|
||||
/* PSC0 transmit buffer register */
|
||||
.equ MCF_PSC0_PSCTB_8BIT, __MBAR+0x860c
|
||||
/* PSC0 transmit buffer register */
|
||||
.equ MCF_PSC0_PSCTB_8BIT, __MBAR+0x860c
|
||||
|
||||
/* GPT mode select register */
|
||||
.equ MCF_GPT0_GMS, __MBAR+0x800
|
||||
/* GPT mode select register */
|
||||
.equ MCF_GPT0_GMS, __MBAR+0x800
|
||||
|
||||
/* Slice timer 0 count register */
|
||||
.equ MCF_SLT0_SCNT, __MBAR+0x908
|
||||
/* Slice timer 0 count register */
|
||||
.equ MCF_SLT0_SCNT, __MBAR+0x908
|
||||
|
||||
// interrupt sources
|
||||
.equ INT_SOURCE_EPORT_EPF1,1 // edge port flag 1
|
||||
.equ INT_SOURCE_EPORT_EPF2,2 // edge port flag 2
|
||||
.equ INT_SOURCE_EPORT_EPF3,3 // edge port flag 3
|
||||
.equ INT_SOURCE_EPORT_EPF4,4 // edge port flag 4
|
||||
.equ INT_SOURCE_EPORT_EPF5,5 // edge port flag 5
|
||||
.equ INT_SOURCE_EPORT_EPF6,6 // edge port flag 6
|
||||
.equ INT_SOURCE_EPORT_EPF7,7 // edge port flag 7
|
||||
.equ INT_SOURCE_USB_EP0ISR,15 // USB endpoint 0 interrupt
|
||||
.equ INT_SOURCE_USB_EP1ISR,16 // USB endpoint 1 interrupt
|
||||
.equ INT_SOURCE_USB_EP2ISR,17 // USB endpoint 2 interrupt
|
||||
.equ INT_SOURCE_USB_EP3ISR,18 // USB endpoint 3 interrupt
|
||||
.equ INT_SOURCE_USB_EP4ISR,19 // USB endpoint 4 interrupt
|
||||
.equ INT_SOURCE_USB_EP5ISR,20 // USB endpoint 5 interrupt
|
||||
.equ INT_SOURCE_USB_EP6ISR,21 // USB endpoint 6 interrupt
|
||||
.equ INT_SOURCE_USB_USBISR,22 // USB general interrupt
|
||||
.equ INT_SOURCE_USB_USBAISR,23 // USB core interrupt
|
||||
.equ INT_SOURCE_USB_ANY,24 // OR of all USB interrupts
|
||||
.equ INT_SOURCE_USB_DSPI_OVF,25 // DSPI overflow or underflow
|
||||
.equ INT_SOURCE_USB_DSPI_RFOF,26 // receive FIFO overflow interrupt
|
||||
.equ INT_SOURCE_USB_DSPI_RFDF,27 // receive FIFO drain interrupt
|
||||
.equ INT_SOURCE_USB_DSPI_TFUF,28 // transmit FIFO underflow interrupt
|
||||
.equ INT_SOURCE_USB_DSPI_TCF,29 // transfer complete interrupt
|
||||
.equ INT_SOURCE_USB_DSPI_TFFF,30 // transfer FIFO fill interrupt
|
||||
.equ INT_SOURCE_USB_DSPI_EOQF,31 // end of queue interrupt
|
||||
.equ INT_SOURCE_PSC3,32 // PSC3 interrupt
|
||||
.equ INT_SOURCE_PSC2,33 // PSC2 interrupt
|
||||
.equ INT_SOURCE_PSC1,34 // PSC1 interrupt
|
||||
.equ INT_SOURCE_PSC0,35 // PSC0 interrupt
|
||||
.equ INT_SOURCE_CTIMERS,36 // combined source for comm timers
|
||||
.equ INT_SOURCE_SEC,37 // SEC interrupt
|
||||
.equ INT_SOURCE_FEC1,38 // FEC1 interrupt
|
||||
.equ INT_SOURCE_FEC0,39 // FEC0 interrupt
|
||||
.equ INT_SOURCE_I2C,40 // I2C interrupt
|
||||
.equ INT_SOURCE_PCIARB,41 // PCI arbiter interrupt
|
||||
.equ INT_SOURCE_CBPCI,42 // COMM bus PCI interrupt
|
||||
.equ INT_SOURCE_XLBPCI,43 // XLB PCI interrupt
|
||||
.equ INT_SOURCE_XLBARB,47 // XLBARB to PCI interrupt
|
||||
.equ INT_SOURCE_DMA,48 // multichannel DMA interrupt
|
||||
.equ INT_SOURCE_CAN0_ERROR,49 // FlexCAN error interrupt
|
||||
.equ INT_SOURCE_CAN0_BUSOFF,50 // FlexCAN bus off interrupt
|
||||
.equ INT_SOURCE_CAN0_MBOR,51 // message buffer ORed interrupt
|
||||
.equ INT_SOURCE_SLT1,53 // slice timer 1 interrupt
|
||||
.equ INT_SOURCE_SLT0,54 // slice timer 0 interrupt
|
||||
.equ INT_SOURCE_CAN1_ERROR,55 // FlexCAN error interrupt
|
||||
.equ INT_SOURCE_CAN1_BUSOFF,56 // FlexCAN bus off interrupt
|
||||
.equ INT_SOURCE_CAN1_MBOR,57 // message buffer ORed interrupt
|
||||
.equ INT_SOURCE_GPT3,59 // GPT3 timer interrupt
|
||||
.equ INT_SOURCE_GPT2,60 // GPT2 timer interrupt
|
||||
.equ INT_SOURCE_GPT1,61 // GPT1 timer interrupt
|
||||
.equ INT_SOURCE_GPT0,62 // GPT0 timer interrupt
|
||||
// interrupt sources
|
||||
.equ INT_SOURCE_EPORT_EPF1,1 // edge port flag 1
|
||||
.equ INT_SOURCE_EPORT_EPF2,2 // edge port flag 2
|
||||
.equ INT_SOURCE_EPORT_EPF3,3 // edge port flag 3
|
||||
.equ INT_SOURCE_EPORT_EPF4,4 // edge port flag 4
|
||||
.equ INT_SOURCE_EPORT_EPF5,5 // edge port flag 5
|
||||
.equ INT_SOURCE_EPORT_EPF6,6 // edge port flag 6
|
||||
.equ INT_SOURCE_EPORT_EPF7,7 // edge port flag 7
|
||||
.equ INT_SOURCE_USB_EP0ISR,15 // USB endpoint 0 interrupt
|
||||
.equ INT_SOURCE_USB_EP1ISR,16 // USB endpoint 1 interrupt
|
||||
.equ INT_SOURCE_USB_EP2ISR,17 // USB endpoint 2 interrupt
|
||||
.equ INT_SOURCE_USB_EP3ISR,18 // USB endpoint 3 interrupt
|
||||
.equ INT_SOURCE_USB_EP4ISR,19 // USB endpoint 4 interrupt
|
||||
.equ INT_SOURCE_USB_EP5ISR,20 // USB endpoint 5 interrupt
|
||||
.equ INT_SOURCE_USB_EP6ISR,21 // USB endpoint 6 interrupt
|
||||
.equ INT_SOURCE_USB_USBISR,22 // USB general interrupt
|
||||
.equ INT_SOURCE_USB_USBAISR,23 // USB core interrupt
|
||||
.equ INT_SOURCE_USB_ANY,24 // OR of all USB interrupts
|
||||
.equ INT_SOURCE_USB_DSPI_OVF,25 // DSPI overflow or underflow
|
||||
.equ INT_SOURCE_USB_DSPI_RFOF,26 // receive FIFO overflow interrupt
|
||||
.equ INT_SOURCE_USB_DSPI_RFDF,27 // receive FIFO drain interrupt
|
||||
.equ INT_SOURCE_USB_DSPI_TFUF,28 // transmit FIFO underflow interrupt
|
||||
.equ INT_SOURCE_USB_DSPI_TCF,29 // transfer complete interrupt
|
||||
.equ INT_SOURCE_USB_DSPI_TFFF,30 // transfer FIFO fill interrupt
|
||||
.equ INT_SOURCE_USB_DSPI_EOQF,31 // end of queue interrupt
|
||||
.equ INT_SOURCE_PSC3,32 // PSC3 interrupt
|
||||
.equ INT_SOURCE_PSC2,33 // PSC2 interrupt
|
||||
.equ INT_SOURCE_PSC1,34 // PSC1 interrupt
|
||||
.equ INT_SOURCE_PSC0,35 // PSC0 interrupt
|
||||
.equ INT_SOURCE_CTIMERS,36 // combined source for comm timers
|
||||
.equ INT_SOURCE_SEC,37 // SEC interrupt
|
||||
.equ INT_SOURCE_FEC1,38 // FEC1 interrupt
|
||||
.equ INT_SOURCE_FEC0,39 // FEC0 interrupt
|
||||
.equ INT_SOURCE_I2C,40 // I2C interrupt
|
||||
.equ INT_SOURCE_PCIARB,41 // PCI arbiter interrupt
|
||||
.equ INT_SOURCE_CBPCI,42 // COMM bus PCI interrupt
|
||||
.equ INT_SOURCE_XLBPCI,43 // XLB PCI interrupt
|
||||
.equ INT_SOURCE_XLBARB,47 // XLBARB to PCI interrupt
|
||||
.equ INT_SOURCE_DMA,48 // multichannel DMA interrupt
|
||||
.equ INT_SOURCE_CAN0_ERROR,49 // FlexCAN error interrupt
|
||||
.equ INT_SOURCE_CAN0_BUSOFF,50 // FlexCAN bus off interrupt
|
||||
.equ INT_SOURCE_CAN0_MBOR,51 // message buffer ORed interrupt
|
||||
.equ INT_SOURCE_SLT1,53 // slice timer 1 interrupt
|
||||
.equ INT_SOURCE_SLT0,54 // slice timer 0 interrupt
|
||||
.equ INT_SOURCE_CAN1_ERROR,55 // FlexCAN error interrupt
|
||||
.equ INT_SOURCE_CAN1_BUSOFF,56 // FlexCAN bus off interrupt
|
||||
.equ INT_SOURCE_CAN1_MBOR,57 // message buffer ORed interrupt
|
||||
.equ INT_SOURCE_GPT3,59 // GPT3 timer interrupt
|
||||
.equ INT_SOURCE_GPT2,60 // GPT2 timer interrupt
|
||||
.equ INT_SOURCE_GPT1,61 // GPT1 timer interrupt
|
||||
.equ INT_SOURCE_GPT0,62 // GPT0 timer interrupt
|
||||
|
||||
// Atari register equates (provided by FPGA)
|
||||
.equ vbasehi, 0xffff8201
|
||||
.equ vbasehi, 0xffff8201
|
||||
|
||||
/*
|
||||
* macros
|
||||
@@ -139,113 +139,122 @@
|
||||
* flag from the EDGE PORT flag register, set the status register to the appropriate interrupt
|
||||
* mask an jump through the corresponging vector
|
||||
*/
|
||||
.macro irq vector,int_mask,clr_int
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
subq.l #8,sp
|
||||
movem.l d0/a5,(sp) // save registers
|
||||
.macro irq vector,int_mask,clr_int
|
||||
move.w #0x2700,sr // disable interrupts
|
||||
subq.l #8,sp
|
||||
movem.l d0/a5,(sp) // save registers
|
||||
|
||||
lea MCF_EPORT_EPFR,a5
|
||||
move.b #\clr_int,(a5) // clear int pending
|
||||
lea MCF_EPORT_EPFR,a5
|
||||
move.b #\clr_int,(a5) // clear int pending
|
||||
|
||||
movem.l (sp),d0/a5 // restore registers
|
||||
addq.l #8,sp
|
||||
move.l \vector,-(sp)
|
||||
move #0x2\int_mask\()00,sr
|
||||
rts
|
||||
.endm
|
||||
movem.l (sp),d0/a5 // restore registers
|
||||
addq.l #8,sp
|
||||
move.l \vector,-(sp)
|
||||
move #0x2\int_mask\()00,sr
|
||||
rts
|
||||
.endm
|
||||
|
||||
.text
|
||||
.text
|
||||
_vec_init:
|
||||
move.l a2,-(sp) // Backup registers
|
||||
move.l a2,-(sp) // Backup registers
|
||||
|
||||
mov3q.l #-1,_rt_mod // rt_mod auf super
|
||||
clr.l _rt_ssp
|
||||
clr.l _rt_usp
|
||||
clr.l _rt_vbr
|
||||
move.l #__RAMBAR0,d0 // exception vectors reside in rambar0
|
||||
movec d0,VBR
|
||||
move.l d0,a0
|
||||
move.l a0,a2
|
||||
mov3q.l #-1,_rt_mod // rt_mod auf super
|
||||
clr.l _rt_ssp
|
||||
clr.l _rt_usp
|
||||
clr.l _rt_vbr
|
||||
move.l #__RAMBAR0,d0 // exception vectors reside in rambar0
|
||||
movec d0,VBR
|
||||
move.l d0,a0
|
||||
move.l a0,a2
|
||||
|
||||
/*
|
||||
* first, set standard vector for all exceptions
|
||||
*/
|
||||
init_vec:
|
||||
move.l #256,d0
|
||||
lea std_exc_vec(pc),a1 // standard vector
|
||||
move.l #256,d0
|
||||
lea std_exc_vec(pc),a1 // standard vector
|
||||
init_vec_loop:
|
||||
move.l a1,(a2)+ // set standard vector for all exceptions
|
||||
subq.l #1,d0
|
||||
bne init_vec_loop
|
||||
move.l a1,(a2)+ // set standard vector for all exceptions
|
||||
subq.l #1,d0
|
||||
bne init_vec_loop
|
||||
|
||||
move.l #__SUP_SP,(a0) // set initial stack pointer at start of exception vector table
|
||||
// set individual interrupt handler assignments
|
||||
|
||||
lea reset_vector(pc),a1 // set reset vector
|
||||
move.l a1,0x04(a0)
|
||||
move.l #__SUP_SP,(a0) // set initial stack pointer at start of exception vector table
|
||||
|
||||
lea access(pc),a1 // set illegal access exception handler
|
||||
move.l a1,0x08(a0)
|
||||
lea reset_vector(pc),a1 // set reset vector
|
||||
move.l a1,0x04(a0)
|
||||
|
||||
lea access(pc),a1 // set illegal access exception handler
|
||||
move.l a1,0x08(a0)
|
||||
|
||||
// install spurious interrupt handler
|
||||
lea _lowlevel_isr_handler,a1
|
||||
move.l a1,0x60(a0)
|
||||
|
||||
// trap #0 (without any parameters for now) is used to provide BaS' driver addresses to the OS
|
||||
lea _get_bas_drivers(pc),a1
|
||||
move.l a1,0x80(a0) // trap #0 exception vector
|
||||
lea _get_bas_drivers(pc),a1
|
||||
move.l a1,0x80(a0) // trap #0 exception vector
|
||||
|
||||
// MFP non-autovector interrupt handlers. Those are just rerouted to their autovector counterparts
|
||||
|
||||
lea irq1(pc),a1
|
||||
move.l a1,0x104(a0)
|
||||
lea irq1(pc),a1
|
||||
move.l a1,0x104(a0)
|
||||
|
||||
lea irq2(pc),a1
|
||||
move.l a1,0x108(a0)
|
||||
lea irq2(pc),a1
|
||||
move.l a1,0x108(a0)
|
||||
|
||||
lea irq3(pc),a1
|
||||
move.l a1,0x10c(a0)
|
||||
lea irq3(pc),a1
|
||||
move.l a1,0x10c(a0)
|
||||
|
||||
lea irq4(pc),a1
|
||||
move.l a1,0x110(a0)
|
||||
lea irq4(pc),a1
|
||||
move.l a1,0x110(a0)
|
||||
|
||||
lea irq5(pc),a1
|
||||
move.l a1,0x114(a0)
|
||||
lea irq5(pc),a1
|
||||
move.l a1,0x114(a0)
|
||||
|
||||
lea irq6(pc),a1
|
||||
move.l a1,0x118(a0)
|
||||
lea irq6(pc),a1
|
||||
move.l a1,0x118(a0)
|
||||
|
||||
lea irq7(pc),a1
|
||||
move.l a1,0x11c(a0)
|
||||
lea irq7(pc),a1
|
||||
move.l a1,0x11c(a0)
|
||||
|
||||
|
||||
|
||||
// install lowlevel_isr_handler for the three GPT timers
|
||||
lea _lowlevel_isr_handler(pc),a1
|
||||
move.l a1,(INT_SOURCE_GPT1 + 64) * 4(a0)
|
||||
move.l a1,(INT_SOURCE_GPT2 + 64) * 4(a0)
|
||||
move.l a1,(INT_SOURCE_GPT3 + 64) * 4(a0)
|
||||
lea _lowlevel_isr_handler(pc),a1
|
||||
move.l a1,(INT_SOURCE_GPT1 + 64) * 4(a0)
|
||||
move.l a1,(INT_SOURCE_GPT2 + 64) * 4(a0)
|
||||
move.l a1,(INT_SOURCE_GPT3 + 64) * 4(a0)
|
||||
|
||||
// install lowlevel_isr_handler for the PSC3 interrupt
|
||||
move.l a1,(INT_SOURCE_PSC3 + 64) * 4(a0)
|
||||
move.l a1,(INT_SOURCE_PSC3 + 64) * 4(a0)
|
||||
|
||||
// install lowlevel_isr_handler for Coldfire DMA interrupts
|
||||
move.l a1,(INT_SOURCE_DMA + 64) * 4(a0)
|
||||
move.l a1,(INT_SOURCE_DMA + 64) * 4(a0)
|
||||
|
||||
// install lowlevel_isr_handler for the XLBPCI interrupt
|
||||
move.l a1,(INT_SOURCE_XLBPCI + 64) * 4(a0)
|
||||
move.l a1,(INT_SOURCE_XLBPCI + 64) * 4(a0)
|
||||
|
||||
// install lowlevel_isr_handler for the XLBARB interrupt
|
||||
move.l a1,(INT_SOURCE_XLBARB + 64) * 4(a0)
|
||||
|
||||
// install lowlevel_isr_handler for the FEC0 interrupt
|
||||
move.l a1,(INT_SOURCE_FEC0 + 64) * 4(a0)
|
||||
move.l a1,(INT_SOURCE_FEC0 + 64) * 4(a0)
|
||||
|
||||
#ifndef MACHINE_FIREBEE
|
||||
// FEC1 not wired on the FireBee (used for FPGA as GPIO), but available on other machines
|
||||
move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0)
|
||||
move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0)
|
||||
#endif
|
||||
|
||||
#ifdef MACHINE_FIREBEE
|
||||
|
||||
// timer vectors (triggers when vbashi gets changed, used for video page copy)
|
||||
move.l a1,(INT_SOURCE_GPT0 + 64) * 4(a0)
|
||||
// move.l a1,(INT_SOURCE_GPT0 + 64) * 4(a0)
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
move.l (sp)+,a2 // Restore registers
|
||||
rts
|
||||
move.l (sp)+,a2 // Restore registers
|
||||
rts
|
||||
|
||||
|
||||
/*
|
||||
@@ -254,281 +263,294 @@ init_vec_loop:
|
||||
vector_table_start:
|
||||
std_exc_vec:
|
||||
_std_exc_vec:
|
||||
//move.w #0x2700,sr // disable interrupt
|
||||
subq.l #8,sp
|
||||
movem.l d0/a5,(sp) // save registers
|
||||
move.w 8(sp),d0 // fetch vector
|
||||
and.l #0x3fc,d0 // mask out vector number
|
||||
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
subq.l #8,sp
|
||||
movem.l d0/a5,(sp) // save registers
|
||||
move.w 8(sp),d0 // fetch vector
|
||||
and.l #0x3fc,d0 // mask out vector number
|
||||
// #define DBG_EXC
|
||||
#ifdef DBG_EXC
|
||||
// printout vector number of exception
|
||||
// printout vector number of exception
|
||||
|
||||
lea -4 * 4(sp),sp // reserve stack space
|
||||
movem.l d0-d1/a0-a1,(sp) // save gcc scratch registers
|
||||
lea -4 * 4(sp),sp // reserve stack space
|
||||
movem.l d0-d1/a0-a1,(sp) // save gcc scratch registers
|
||||
|
||||
lsr.l #2,d0 // shift vector number in place
|
||||
cmp.l #33,d0
|
||||
beq noprint
|
||||
cmp.l #34,d0
|
||||
beq n oprint
|
||||
cmp.l #45,d0
|
||||
beq noprint
|
||||
cmp.l #46,d0
|
||||
beq noprint
|
||||
move.l 4 * 4 + 8 + 4(sp),-(sp) // pc at exception
|
||||
move.l d0,-(sp) // provide it to xprintf()
|
||||
pea exception_text
|
||||
jsr _xprintf // call xprintf()
|
||||
add.l #3*4,sp // adjust stack
|
||||
lsr.l #2,d0 // shift vector number in place
|
||||
cmp.l #33,d0
|
||||
beq noprint
|
||||
cmp.l #34,d0
|
||||
beq noprint
|
||||
cmp.l #45,d0
|
||||
beq noprint
|
||||
cmp.l #46,d0
|
||||
beq noprint
|
||||
move.l 4 * 4 + 8 + 4(sp),-(sp) // pc at exception
|
||||
move.l d0,-(sp) // provide it to xprintf()
|
||||
pea exception_text
|
||||
jsr _xprintf // call xprintf()
|
||||
add.l #3*4,sp // adjust stack
|
||||
noprint:
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
lea 4 * 4(sp),sp
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
lea 4 * 4(sp),sp
|
||||
#endif /* DBG_EXC */
|
||||
|
||||
add.l _rt_vbr,d0 // + VBR
|
||||
move.l d0,a5
|
||||
move.l (a5),d0 // fetch exception routine address
|
||||
add.l _rt_vbr,d0 // + VBR
|
||||
move.l d0,a5
|
||||
move.l (a5),d0 // fetch exception routine address
|
||||
|
||||
move.l 4(sp),a5 // restore a5
|
||||
move.l d0,4(sp) // store exception routine address
|
||||
move.l 4(sp),a5 // restore a5
|
||||
move.l d0,4(sp) // store exception routine address
|
||||
|
||||
// FIXME: not clear why we would need the following?
|
||||
//move.w 10(sp),d0 // restore original SR
|
||||
//bset #13,d0 // set supervisor bit
|
||||
//move.w d0,sr //
|
||||
move.l (sp)+,d0 // restore d0
|
||||
rts // jump to exception handler
|
||||
move.w 10(sp),d0 // restore original SR (irq mask)
|
||||
bset #13,d0 // set supervisor bit
|
||||
move.w d0,sr //
|
||||
move.l (sp)+,d0 // restore d0
|
||||
rts // jump to exception handler
|
||||
|
||||
exception_text:
|
||||
.ascii "DEBUG: EXCEPTION %d caught at %p"
|
||||
.byte 13, 10, 0
|
||||
.align 4
|
||||
.ascii "DEBUG: EXCEPTION %d caught at %p"
|
||||
.byte 13, 10, 0
|
||||
.align 4
|
||||
|
||||
reset_vector:
|
||||
move.w #0x2700,sr // disable interrupts
|
||||
move.l #0x31415926,d0
|
||||
cmp.l 0x426,d0 // _resvalid: reset vector valid?
|
||||
beq std_exc_vec // yes->
|
||||
jmp _rom_entry // no, cold start machine
|
||||
move.w #0x2700,sr // disable interrupts
|
||||
move.l #0x31415926,d0
|
||||
cmp.l 0x426,d0 // _resvalid: reset vector valid?
|
||||
beq std_exc_vec // yes->
|
||||
jmp _rom_entry // no, cold start machine
|
||||
|
||||
access:
|
||||
move.w #0x2700,sr // disable interrupts
|
||||
move.w #0x2700,sr // disable interrupts
|
||||
|
||||
link a6,#-4 * 4 // make room for gcc scratch registers
|
||||
movem.l d0-d1/a0-a1,(sp) // save them
|
||||
link a6,#-4 * 4 // make room for gcc scratch registers
|
||||
movem.l d0-d1/a0-a1,(sp) // save them
|
||||
|
||||
move.l 4(a6),-(sp) // push format_status
|
||||
move.l 8(a6),-(sp) // pc at exception
|
||||
move.l MCF_MMU_MMUAR,-(sp) // MMU fault address
|
||||
move.l MCF_MMU_MMUSR,-(sp) // MMU status regisrter
|
||||
move.w #0x2300,sr // can lower interrupt mask now that MMU status is safe
|
||||
jsr _mmutr_miss // call C routine
|
||||
lea 4 * 4(sp),sp // adjust stack
|
||||
move.l 4(a6),-(sp) // push format_status
|
||||
move.l 8(a6),-(sp) // pc at exception
|
||||
move.l MCF_MMU_MMUAR,-(sp) // MMU fault address
|
||||
move.l MCF_MMU_MMUSR,-(sp) // MMU status register
|
||||
// probably doesn't make sense since we still have a potential unmapped MMU page
|
||||
// move.w #0x2300,sr // can lower interrupt mask now that MMU status is safe
|
||||
jsr _mmutr_miss // call C routine
|
||||
lea 4 * 4(sp),sp // adjust stack
|
||||
|
||||
tst.l d0 // exception handler signals bus error
|
||||
bne bus_error
|
||||
tst.l d0 // exception handler signals bus error
|
||||
bne bus_error
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
rte
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
rte
|
||||
|
||||
bus_error:
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
bra std_exc_vec // FIXME: this seems to be bogous...
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
move.l 0x08,-(sp)
|
||||
rts
|
||||
// bra std_exc_vec // FIXME: this seems to be bogous...
|
||||
|
||||
zero_divide:
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
move.l a0,-(sp)
|
||||
move.l d0,-(sp)
|
||||
move.l 12(sp),a0 // pc
|
||||
move.w (a0)+,d0 // command word
|
||||
btst #7,d0 // long?
|
||||
beq zd_word // nein->
|
||||
addq.l #2,a0
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
move.l a0,-(sp)
|
||||
move.l d0,-(sp)
|
||||
move.l 12(sp),a0 // pc
|
||||
move.w (a0)+,d0 // command word
|
||||
btst #7,d0 // long?
|
||||
beq zd_word // no->
|
||||
addq.l #2,a0
|
||||
|
||||
zd_word:
|
||||
and.l 0x3f,d0 // mask out ea field
|
||||
cmp.w #0x08,d0 // -(ax) or less?
|
||||
ble zd_end
|
||||
addq.l #2,a0
|
||||
cmp.w #0x39,d0 // xxx.L
|
||||
bne zd_nal
|
||||
addq.l #2,a0
|
||||
bra zd_end
|
||||
and.l 0x3f,d0 // mask out ea field
|
||||
cmp.w #0x08,d0 // -(ax) or less?
|
||||
ble zd_end
|
||||
addq.l #2,a0
|
||||
cmp.w #0x39,d0 // xxx.L
|
||||
bne zd_nal
|
||||
addq.l #2,a0
|
||||
bra zd_end
|
||||
|
||||
zd_nal: cmp.w #0x3c,d0 // immediate?
|
||||
bne zd_end // no->
|
||||
btst #7,d0 // long?
|
||||
beq zd_end // no
|
||||
addq.l #2,a0
|
||||
zd_nal: cmp.w #0x3c,d0 // immediate?
|
||||
bne zd_end // no->
|
||||
btst #7,d0 // long?
|
||||
beq zd_end // no
|
||||
addq.l #2,a0
|
||||
zd_end:
|
||||
move.l a0,12(sp)
|
||||
move.l (sp)+,d0
|
||||
move.l (sp)+,a0
|
||||
rte
|
||||
move.l a0,12(sp)
|
||||
move.l (sp)+,d0
|
||||
move.l (sp)+,a0
|
||||
rte
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
linea:
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
halt
|
||||
nop
|
||||
nop
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
halt
|
||||
nop
|
||||
nop
|
||||
linef:
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
halt
|
||||
nop
|
||||
nop
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
halt
|
||||
nop
|
||||
nop
|
||||
format:
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
halt
|
||||
nop
|
||||
nop
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
halt
|
||||
nop
|
||||
nop
|
||||
|
||||
//floating point
|
||||
flpoow:
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
halt
|
||||
nop
|
||||
nop
|
||||
move.w #0x2700,sr // disable interrupt
|
||||
halt
|
||||
nop
|
||||
nop
|
||||
#endif /* _NOT_USED */
|
||||
|
||||
|
||||
irq1: irq 0x64, 1, 0x02 // Level 1 autovector interrupt (unused)
|
||||
irq2: irq 0x68, 2, 0x04 // Level 2 autovector interrupt (horizontal blank)
|
||||
irq3: irq 0x6c, 3, 0x08 // Level 3 autovector interrupt (unused)
|
||||
irq4: irq 0x70, 4, 0x10 // Level 4 autovector interrupt (vertical blank)
|
||||
irq1: irq 0x64, 1, 0x02 // Level 1 autovector interrupt (unused)
|
||||
irq2: irq 0x68, 2, 0x04 // Level 2 autovector interrupt (horizontal blank)
|
||||
irq3: irq 0x6c, 3, 0x08 // Level 3 autovector interrupt (unused)
|
||||
irq4: irq 0x70, 4, 0x10 // Level 4 autovector interrupt (vertical blank)
|
||||
|
||||
|
||||
|
||||
#if defined(MACHINE_FIREBEE) /* these handlers are only meaningful for the Firebee */
|
||||
irq5: //move.w #0x2700,sr // disable interrupts
|
||||
subq.l #4,sp // extra space
|
||||
#if defined(MACHINE_FIREBEE) /* these handlers are only meaningful for the Firebee */
|
||||
irq5: //move.w #0x2700,sr // disable interrupts
|
||||
subq.l #4,sp // extra space
|
||||
|
||||
link a6,#-4 * 4 // save gcc scratch registers
|
||||
movem.l d0-d1/a0-a1,(sp)
|
||||
link a6,#-4 * 4 // save gcc scratch registers
|
||||
movem.l d0-d1/a0-a1,(sp)
|
||||
|
||||
jsr _irq5_handler // call C handler routine
|
||||
jsr _irq5_handler // call C handler routine
|
||||
|
||||
tst.b d0 // handled?
|
||||
beq irq5_forward
|
||||
tst.b d0 // handled?
|
||||
beq irq5_forward
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
addq.l #4,sp
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
addq.l #4,sp
|
||||
|
||||
rte // return from exception
|
||||
rte // return from exception
|
||||
|
||||
irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector
|
||||
add.l _rt_vbr,a0 // add runtime vbr
|
||||
move.l a0,4(a6) // put on stack
|
||||
irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector
|
||||
add.l _rt_vbr,a0 // add runtime vbr
|
||||
move.l a0,4(a6) // put on stack
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6 //
|
||||
move.w #0x2500,sr // set interrupt level
|
||||
rts // jump through vector
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6 //
|
||||
move.w #0x2500,sr // set interrupt level
|
||||
rts // jump through vector
|
||||
|
||||
/*
|
||||
* irq6 needs special treatment since - because the Coldfire only supports autovector interrupts
|
||||
* - the exception vector is provided by the simulated MFP from the FPGA
|
||||
*/
|
||||
irq6: //move.w #0x2700,sr // disable interrupt
|
||||
subq.l #4,sp // extra space
|
||||
irq6: move.w #0x2700,sr // disable interrupt
|
||||
subq.l #4,sp // extra space
|
||||
|
||||
link a6,#-4 * 4 // save gcc scratch registers
|
||||
movem.l d0-d1/a0-a1,(sp)
|
||||
link a6,#-4 * 4 // save gcc scratch registers
|
||||
movem.l d0-d1/a0-a1,(sp)
|
||||
|
||||
move.l 8(a6),-(sp) // format status word
|
||||
move.l 12(a6),-(sp) // pc at exception
|
||||
jsr _irq6_handler // call C handler
|
||||
lea 8(sp),sp // fix stack
|
||||
move.l 8(a6),-(sp) // format status word
|
||||
move.l 12(a6),-(sp) // pc at exception
|
||||
jsr _irq6_handler // call C handler
|
||||
lea 8(sp),sp // fix stack
|
||||
|
||||
tst.b d0 // interrupt handled?
|
||||
beq irq6_forward // no, forward to TOS
|
||||
tst.b d0 // interrupt handled?
|
||||
beq irq6_forward // no, forward to TOS
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
addq.l #4,sp // "extra space" not needed in this case
|
||||
rte
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
addq.l #4,sp // "extra space" not needed in this case
|
||||
rte
|
||||
|
||||
irq6_forward:
|
||||
move.l 0xf0020000,a0 // fetch "MFP interrupt vector" from FPGA
|
||||
add.l _rt_vbr,a0 // add runtime VBR
|
||||
move.l (a0),4(a6) // fetch handler address and put it on "extra space"
|
||||
move.l 0xf0020000,a0 // fetch "MFP interrupt vector" from FPGA
|
||||
add.l _rt_vbr,a0 // add runtime VBR
|
||||
move.l (a0),4(a6) // fetch handler address and put it on "extra space"
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1
|
||||
unlk a6
|
||||
move.w #0x2600,sr // set interrupt mask to MFP level
|
||||
movem.l (sp),d0-d1/a0-a1
|
||||
unlk a6
|
||||
move.w #0x2600,sr // set interrupt mask to MFP level
|
||||
|
||||
rts // jump through vector
|
||||
rts // jump through vector
|
||||
|
||||
/*
|
||||
* irq 7 = pseudo bus error
|
||||
*/
|
||||
irq7:
|
||||
lea -12(sp),sp
|
||||
movem.l d0/a0,(sp)
|
||||
lea -12(sp),sp
|
||||
movem.l d0/a0,(sp)
|
||||
|
||||
move.l __RAMBAR0+0x008,a0 // real access error handler
|
||||
move.l a0,8(sp) // this will be the return address for rts
|
||||
move.l __RAMBAR0+0x008,a0 // real access error handler
|
||||
move.l a0,8(sp) // this will be the return address for rts
|
||||
|
||||
move.w 12(sp),d0 // format/vector word
|
||||
andi.l #0xf000,d0 // keep only the format
|
||||
ori.l #2*4,d0 // simulate vector #2, no fault
|
||||
move.w d0,12(sp)
|
||||
move.w 12(sp),d0 // format/vector word
|
||||
andi.l #0xf000,d0 // keep only the format
|
||||
ori.l #2*4,d0 // simulate vector #2, no fault
|
||||
move.w d0,12(sp)
|
||||
|
||||
// TODO: Inside an interrupt handler, 16(sp) is the return address.
|
||||
// For an Access Error, it should be the address of the fault instruction instead
|
||||
// TODO: Inside an interrupt handler, 16(sp) is the return address.
|
||||
// For an Access Error, it should be the address of the fault instruction instead
|
||||
|
||||
lea MCF_EPORT_EPFR,a0
|
||||
bset #7,(a0) // clear int 7
|
||||
lea MCF_EPORT_EPFR,a0
|
||||
bset #7,(a0) // clear int 7
|
||||
|
||||
move.l (sp)+,d0 // restore registers
|
||||
move.l (sp)+,a0
|
||||
rts // Forward to the Access Error handler
|
||||
move.l (sp)+,d0 // restore registers
|
||||
move.l (sp)+,a0
|
||||
rts // Forward to the Access Error handler
|
||||
|
||||
#else // handlers for M5484LITE
|
||||
#else // handlers for M5484LITE
|
||||
|
||||
irq5: // irq5 is tied to PCI INTC# and PCI INTD# on the M5484LITE
|
||||
//move.w #0x2700,sr // disable interrupts
|
||||
irq5:
|
||||
move.w #0x2700,sr // disable interrupts
|
||||
subq.l #4,sp // extra space
|
||||
|
||||
lea -4*4(sp),sp // save gcc scratch registers
|
||||
movem.l d0-d1/a0-a1,(sp)
|
||||
link a6,#-4 * 4 // save gcc scratch registers
|
||||
movem.l d0-d1/a0-a1,(sp)
|
||||
|
||||
jsr _irq5_handler // call C handler routine
|
||||
jsr _irq5_handler // call C handler routine
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
lea 4*4(sp),sp
|
||||
tst.b d0 // handled?
|
||||
beq irq5_forward
|
||||
|
||||
rte // return from exception
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
addq.l #4,sp
|
||||
|
||||
irq5text:
|
||||
.ascii "IRQ5!"
|
||||
.dc.b 13,10,0
|
||||
rte // return from exception
|
||||
|
||||
irq5_forward:
|
||||
move.l 0x74,a0 // fetch OS irq5 vector
|
||||
add.l _rt_vbr,a0 // add runtime vbr
|
||||
move.l a0,4(a6) // put on stack
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6 //
|
||||
move.w #0x2500,sr // set interrupt level
|
||||
rts // jump through vector
|
||||
|
||||
irq6:
|
||||
irq 0x74,5,0x20
|
||||
irq 0x74,5,0x20
|
||||
|
||||
irq7: // irq7 is tied to PCI INTA# and PCI INTB# on the M5484LITE
|
||||
irq7: // irq7 is tied to PCI INTA# and PCI INTB# on the M5484LITE
|
||||
|
||||
//move.w #0x2700,sr // disable interrupts
|
||||
move.w #0x2700,sr // disable interrupts
|
||||
|
||||
lea -4*4(sp),sp // save gcc scratch registers
|
||||
movem.l d0-d1/a0-a1,(sp)
|
||||
lea -4*4(sp),sp // save gcc scratch registers
|
||||
movem.l d0-d1/a0-a1,(sp)
|
||||
|
||||
jsr _irq7_handler // call C handler routine
|
||||
jsr _irq7_handler // call C handler routine
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
lea 4*4(sp),sp
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
lea 4 * 4(sp),sp
|
||||
|
||||
rte // return from exception
|
||||
rte // return from exception
|
||||
|
||||
irq7text:
|
||||
.data
|
||||
.ascii "IRQ7!"
|
||||
.dc.b 13,10,0
|
||||
.text
|
||||
.data
|
||||
.ascii "IRQ7!"
|
||||
.dc.b 13,10,0
|
||||
.text
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
/*
|
||||
@@ -536,8 +558,8 @@ irq7text:
|
||||
* isr_register_handler(int vector). If the higlevel routine (isr_execute_handler())
|
||||
* returns != true, the call is forwarded to the OS (through its own vector base).
|
||||
*/
|
||||
.global _lowlevel_isr_handler
|
||||
.extern _isr_execute_handler
|
||||
.global _lowlevel_isr_handler
|
||||
.extern _isr_execute_handler
|
||||
|
||||
|
||||
/*
|
||||
@@ -553,33 +575,33 @@ irq7text:
|
||||
* (sp) -> gcc scratch registers save area
|
||||
*/
|
||||
_lowlevel_isr_handler:
|
||||
subq.l #4,sp // extra space
|
||||
link a6,#-4 * 4 // make room for
|
||||
movem.l d0-d1/a0-a1,(sp) // gcc scratch registers and save them,
|
||||
// other registers will be taken care of by gcc itself
|
||||
subq.l #4,sp // extra space
|
||||
link a6,#-4 * 4 // make room for
|
||||
movem.l d0-d1/a0-a1,(sp) // gcc scratch registers and save them,
|
||||
// other registers will be taken care of by gcc itself
|
||||
|
||||
move.w 8(a6),d0 // fetch vector number from stack
|
||||
lsr.l #2,d0 // move it in place
|
||||
andi.l #0xff,d0 // mask it out
|
||||
move.l d0,-(sp) // push it
|
||||
jsr _isr_execute_handler // call the C handler
|
||||
addq.l #4,sp // adjust stack
|
||||
tst.b d0 // handled?
|
||||
beq lowlevel_forward // no, forward it to TOS
|
||||
move.w 8(a6),d0 // fetch vector number from stack
|
||||
lsr.l #2,d0 // move it in place
|
||||
andi.l #0xff,d0 // mask it out
|
||||
move.l d0,-(sp) // push it
|
||||
jsr _isr_execute_handler // call the C handler
|
||||
addq.l #4,sp // adjust stack
|
||||
tst.b d0 // handled?
|
||||
beq lowlevel_forward // no, forward it to TOS
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
addq.l #4,sp // eliminate extra space
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6
|
||||
addq.l #4,sp // eliminate extra space
|
||||
|
||||
rte
|
||||
rte
|
||||
|
||||
lowlevel_forward:
|
||||
move.l 8(a6),d0 // fetch OS irq vector
|
||||
lsr.l #2,d0 // move it in place
|
||||
andi.l #0xff,d0 // mask out vector number
|
||||
add.l _rt_vbr,d0 // add runtime vbr
|
||||
move.l d0,4(a6) // put on stack as return address
|
||||
move.l 8(a6),d0 // fetch OS irq vector
|
||||
lsr.l #2,d0 // move it in place
|
||||
andi.l #0xff,d0 // mask out vector number
|
||||
add.l _rt_vbr,d0 // add runtime vbr
|
||||
move.l d0,4(a6) // put on stack as return address
|
||||
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6 //
|
||||
rts // jump through vector
|
||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||
unlk a6 //
|
||||
rts // jump through vector
|
||||
|
||||
@@ -52,109 +52,134 @@ void fault_handler(uint32_t pc, uint32_t format_status)
|
||||
xprintf("fault_status: %x (", fault_status);
|
||||
switch (fault_status)
|
||||
{
|
||||
case 0:
|
||||
xprintf("not an access or address error nor an interrupted debug service routine");
|
||||
break;
|
||||
case 1:
|
||||
case 3:
|
||||
case 11:
|
||||
xprintf("reserved");
|
||||
break;
|
||||
case 2:
|
||||
xprintf("interrupt during a debug service routine for faults other than access errors");
|
||||
break;
|
||||
case 4:
|
||||
xprintf("error (for example, protection fault) on instruction fetch");
|
||||
break;
|
||||
case 5:
|
||||
xprintf("TLB miss on opword or instruction fetch");
|
||||
break;
|
||||
case 6:
|
||||
xprintf("TLB miss on extension word of instruction fetch");
|
||||
break;
|
||||
case 7:
|
||||
xprintf("IFP access error while executing in emulator mode");
|
||||
break;
|
||||
case 8:
|
||||
xprintf("error on data write");
|
||||
break;
|
||||
case 9:
|
||||
xprintf("error on attempted write to write-protected space");
|
||||
break;
|
||||
case 10:
|
||||
xprintf("TLB miss on data write");
|
||||
break;
|
||||
case 12:
|
||||
xprintf("error on data read");
|
||||
break;
|
||||
case 13:
|
||||
xprintf("attempted read, read-modify-write of protected space");
|
||||
break;
|
||||
case 14:
|
||||
xprintf("TLB miss on data read or read-modify-write");
|
||||
break;
|
||||
case 15:
|
||||
xprintf("OEP access error while executing in emulator mode");
|
||||
case 0:
|
||||
xprintf("not an access or address error nor an interrupted debug service routine");
|
||||
break;
|
||||
|
||||
case 1:
|
||||
case 3:
|
||||
case 11:
|
||||
xprintf("reserved");
|
||||
break;
|
||||
|
||||
case 2:
|
||||
xprintf("interrupt during a debug service routine for faults other than access errors");
|
||||
break;
|
||||
|
||||
case 4:
|
||||
xprintf("error (for example, protection fault) on instruction fetch");
|
||||
break;
|
||||
|
||||
case 5:
|
||||
xprintf("TLB miss on opword or instruction fetch");
|
||||
break;
|
||||
|
||||
case 6:
|
||||
xprintf("TLB miss on extension word of instruction fetch");
|
||||
break;
|
||||
|
||||
case 7:
|
||||
xprintf("IFP access error while executing in emulator mode");
|
||||
break;
|
||||
|
||||
case 8:
|
||||
xprintf("error on data write");
|
||||
break;
|
||||
|
||||
case 9:
|
||||
xprintf("error on attempted write to write-protected space");
|
||||
break;
|
||||
|
||||
case 10:
|
||||
xprintf("TLB miss on data write");
|
||||
break;
|
||||
|
||||
case 12:
|
||||
xprintf("error on data read");
|
||||
break;
|
||||
|
||||
case 13:
|
||||
xprintf("attempted read, read-modify-write of protected space");
|
||||
break;
|
||||
|
||||
case 14:
|
||||
xprintf("TLB miss on data read or read-modify-write");
|
||||
break;
|
||||
|
||||
case 15:
|
||||
xprintf("OEP access error while executing in emulator mode");
|
||||
}
|
||||
xprintf(")\r\n");
|
||||
|
||||
xprintf("vector = %02x (", vector);
|
||||
xprintf("vector = %d (", vector);
|
||||
switch (vector)
|
||||
{
|
||||
case 2:
|
||||
xprintf("access error");
|
||||
break;
|
||||
case 3:
|
||||
xprintf("address error");
|
||||
break;
|
||||
case 4:
|
||||
xprintf("illegal instruction");
|
||||
break;
|
||||
case 5:
|
||||
xprintf("divide by zero");
|
||||
break;
|
||||
case 8:
|
||||
xprintf("privilege violation");
|
||||
break;
|
||||
case 9:
|
||||
xprintf("trace");
|
||||
break;
|
||||
case 10:
|
||||
xprintf("unimplemented line-a opcode");
|
||||
break;
|
||||
case 11:
|
||||
xprintf("unimplemented line-f opcode");
|
||||
break;
|
||||
case 12:
|
||||
xprintf("non-PC breakpoint debug interrupt");
|
||||
break;
|
||||
case 13:
|
||||
xprintf("PC breakpoint debug interrupt");
|
||||
break;
|
||||
case 14:
|
||||
xprintf("format error");
|
||||
break;
|
||||
case 24:
|
||||
xprintf("spurious interrupt");
|
||||
break;
|
||||
default:
|
||||
if ( ((vector >= 6) && (vector <= 7)) ||
|
||||
((vector >= 16) && (vector <= 23)))
|
||||
{
|
||||
xprintf("reserved");
|
||||
}
|
||||
else if ((vector >= 25) && (vector <= 31))
|
||||
{
|
||||
xprintf("level %d autovectored interrupt", fault_status - 24);
|
||||
}
|
||||
else if ((vector >= 32) && (vector <= 47))
|
||||
{
|
||||
xprintf("trap #%d", vector - 32);
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("unknown vector\r\n");
|
||||
}
|
||||
case 2:
|
||||
xprintf("access error");
|
||||
break;
|
||||
|
||||
case 3:
|
||||
xprintf("address error");
|
||||
break;
|
||||
|
||||
case 4:
|
||||
xprintf("illegal instruction");
|
||||
break;
|
||||
|
||||
case 5:
|
||||
xprintf("divide by zero");
|
||||
break;
|
||||
|
||||
case 8:
|
||||
xprintf("privilege violation");
|
||||
break;
|
||||
|
||||
case 9:
|
||||
xprintf("trace");
|
||||
break;
|
||||
|
||||
case 10:
|
||||
xprintf("unimplemented line-a opcode");
|
||||
break;
|
||||
|
||||
case 11:
|
||||
xprintf("unimplemented line-f opcode");
|
||||
break;
|
||||
|
||||
case 12:
|
||||
xprintf("non-PC breakpoint debug interrupt");
|
||||
break;
|
||||
|
||||
case 13:
|
||||
xprintf("PC breakpoint debug interrupt");
|
||||
break;
|
||||
|
||||
case 14:
|
||||
xprintf("format error");
|
||||
break;
|
||||
|
||||
case 24:
|
||||
xprintf("spurious interrupt");
|
||||
break;
|
||||
|
||||
default:
|
||||
if ( ((vector >= 6) && (vector <= 7)) ||
|
||||
((vector >= 16) && (vector <= 23)))
|
||||
{
|
||||
xprintf("reserved");
|
||||
}
|
||||
else if ((vector >= 25) && (vector <= 31))
|
||||
{
|
||||
xprintf("level %d autovectored interrupt", fault_status - 24);
|
||||
}
|
||||
else if ((vector >= 32) && (vector <= 47))
|
||||
{
|
||||
xprintf("trap #%d", vector - 32);
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("unknown vector\r\n");
|
||||
}
|
||||
}
|
||||
xprintf(")\r\n");
|
||||
xprintf("sr=%4x\r\n", sr);
|
||||
|
||||
@@ -50,8 +50,8 @@ extern uint8_t _FPGA_CONFIG_SIZE[];
|
||||
* been loaded through the onboard JTAG interface.
|
||||
* init_fpga() will honour this and not overwrite config.
|
||||
*/
|
||||
extern bool _FPGA_JTAG_LOADED;
|
||||
extern int32_t _FPGA_JTAG_VALID;
|
||||
extern uint32_t _FPGA_JTAG_LOADED;
|
||||
extern uint32_t _FPGA_JTAG_VALID;
|
||||
#define VALID_JTAG 0xaffeaffe
|
||||
|
||||
void config_gpio_for_fpga_config(void)
|
||||
@@ -94,14 +94,16 @@ bool init_fpga(void)
|
||||
volatile int32_t time, start, end;
|
||||
int i;
|
||||
|
||||
dbg("FPGA load config\r\n(_FPGA_JTAG_LOADED = %x, _FPGA_JTAG_VALID = %x)...\r\n", _FPGA_JTAG_LOADED, _FPGA_JTAG_VALID);
|
||||
if (_FPGA_JTAG_LOADED == true && _FPGA_JTAG_VALID == VALID_JTAG)
|
||||
xprintf("FPGA load config...\r\n");
|
||||
xprintf("_FPGA_JTAG_LOADED = 0x%x\r\n", _FPGA_JTAG_LOADED);
|
||||
xprintf("_FPGA_JTAG_VALID = 0x%x\r\n", _FPGA_JTAG_VALID);
|
||||
if (_FPGA_JTAG_LOADED == 1 && _FPGA_JTAG_VALID == VALID_JTAG)
|
||||
{
|
||||
dbg("detected _FPGA_JTAG_LOADED flag. Not overwriting FPGA config.\r\n");
|
||||
xprintf("detected _FPGA_JTAG_LOADED flag. FPGA config skipped.\r\n");
|
||||
|
||||
/* reset the flag so that next boot will load config again from flash */
|
||||
_FPGA_JTAG_LOADED = 0;
|
||||
_FPGA_JTAG_VALID = 0;
|
||||
// _FPGA_JTAG_LOADED = 0;
|
||||
// _FPGA_JTAG_VALID = 0;
|
||||
|
||||
return true;
|
||||
}
|
||||
@@ -124,7 +126,7 @@ bool init_fpga(void)
|
||||
* excerpt from an Altera configuration manual:
|
||||
*
|
||||
* The low-to-high transition of nCONFIG on the FPGA begins the configuration cycle. The
|
||||
* configuration cycle consists of 3 stages<EFBFBD>reset, configuration, and initialization.
|
||||
* configuration cycle consists of 3 stages: reset, configuration, and initialization.
|
||||
* While nCONFIG is low, the device is in reset. When the device comes out of reset,
|
||||
* nCONFIG must be at a logic high level in order for the device to release the open-drain
|
||||
* nSTATUS pin. After nSTATUS is released, it is pulled high by a pull-up resistor and the FPGA
|
||||
@@ -180,6 +182,16 @@ bool init_fpga(void)
|
||||
|
||||
xprintf("finished (took %f seconds).\r\n", time / 1000.0);
|
||||
config_gpio_for_jtag_config();
|
||||
|
||||
/*
|
||||
* assure skipping fpga load on warm boot
|
||||
*/
|
||||
|
||||
_FPGA_JTAG_LOADED = 1;
|
||||
_FPGA_JTAG_VALID = VALID_JTAG;
|
||||
|
||||
xprintf("SRAM now set to FPGA load skip\r\n");
|
||||
|
||||
return true;
|
||||
}
|
||||
xprintf("FAILED!\r\n");
|
||||
|
||||
283
sys/interrupts.c
283
sys/interrupts.c
@@ -36,15 +36,10 @@
|
||||
#include "util.h"
|
||||
#include "dma.h"
|
||||
#include "pci.h"
|
||||
#include <stdarg.h>
|
||||
|
||||
//#define IRQ_DEBUG
|
||||
#if defined(IRQ_DEBUG)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif
|
||||
#define err(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
|
||||
// #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
#ifndef MAX_ISR_ENTRY
|
||||
#define MAX_ISR_ENTRY (20)
|
||||
@@ -61,6 +56,7 @@ struct isrentry
|
||||
|
||||
static struct isrentry isrtab[MAX_ISR_ENTRY]; /* list of interrupt service routines */
|
||||
|
||||
|
||||
/*
|
||||
* clear the table of interrupt service handlers
|
||||
*/
|
||||
@@ -117,7 +113,7 @@ bool isr_enable_int_source(int int_source)
|
||||
}
|
||||
else
|
||||
{
|
||||
err("vector %d does not correspond to an internal interrupt source\r\n");
|
||||
dbg("vector %d does not correspond to an internal interrupt source\r\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@@ -137,9 +133,9 @@ bool isr_register_handler(int vector, int level, int priority, bool (*handler)(v
|
||||
int index;
|
||||
int int_source;
|
||||
|
||||
if ((vector == 0) || (handler == NULL))
|
||||
if ((vector <= 0) || (handler == NULL))
|
||||
{
|
||||
dbg("illegal vector or handler!\r\n");
|
||||
dbg("illegal vector or handler (vector=%x, handler=%p)!\r\n", vector, handler);
|
||||
|
||||
return false;
|
||||
}
|
||||
@@ -163,18 +159,20 @@ bool isr_register_handler(int vector, int level, int priority, bool (*handler)(v
|
||||
|
||||
int_source = vector - 64;
|
||||
|
||||
if (!isr_enable_int_source(int_source))
|
||||
if (int_source >= 0)
|
||||
{
|
||||
err("failed to enable internal interrupt souce %d in IMRL/IMRH\r\n", int_source);
|
||||
return false;
|
||||
}
|
||||
if (!isr_enable_int_source(int_source))
|
||||
{
|
||||
dbg("failed to enable internal interrupt souce %d in IMRL/IMRH\r\n", int_source);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (!isr_set_prio_and_level(int_source, priority, level))
|
||||
{
|
||||
err("failed to set priority and level for interrupt source %d\r\n", int_source);
|
||||
return false;
|
||||
if (!isr_set_prio_and_level(int_source, priority, level))
|
||||
{
|
||||
dbg("failed to set priority and level for interrupt source %d\r\n", int_source);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
}
|
||||
@@ -203,6 +201,140 @@ void isr_remove_handler(bool (*handler)(void *, void *))
|
||||
dbg("no such handler registered (handler=%p\r\n", handler);
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
static char *vector_to_str[] =
|
||||
{
|
||||
"initial stack pointer", /* 0 */
|
||||
"initial program counter", /* 1 */
|
||||
"access error", /* 2 */
|
||||
"address error", /* 3 */
|
||||
"illegal instruction", /* 4 */
|
||||
"divide by zero", /* 5 */
|
||||
"reserved6", /* 6 */
|
||||
"reserved7", /* 7 */
|
||||
"privilege violation", /* 8 */
|
||||
"trace", /* 9 */
|
||||
"unimplemented line-a opcode", /* 10 */
|
||||
"unimplemented line-f opcode", /* 11 */
|
||||
"non-PC breakpoint debug interrupt", /* 12 */
|
||||
"PC breakpoint debug interrupt", /* 13 */
|
||||
"format error", /* 14 */
|
||||
"uninitialized interrupt", /* 15 */
|
||||
"reserved16",
|
||||
"reserved17",
|
||||
"reserved18",
|
||||
"reserved19",
|
||||
"reserved20",
|
||||
"reserved21",
|
||||
"reserved22",
|
||||
"reserved23",
|
||||
"spurious interrupt", /* 24 */
|
||||
"level 1 autovector", /* 25 */
|
||||
"level 2 autovector", /* 26 */
|
||||
"level 3 autovector", /* 27 */
|
||||
"level 4 autovector", /* 28 */
|
||||
"level 5 autovector", /* 29 */
|
||||
"level 6 autovector", /* 30 */
|
||||
"level 7 autovector", /* 31 */
|
||||
"trap #0", /* 32 */
|
||||
"trap #1", /* 33 */
|
||||
"trap #2", /* 34 */
|
||||
"trap #3", /* 35 */
|
||||
"trap #4", /* 36 */
|
||||
"trap #5", /* 37 */
|
||||
"trap #6", /* 38 */
|
||||
"trap #7", /* 39 */
|
||||
"trap #8", /* 40 */
|
||||
"trap #9", /* 41 */
|
||||
"trap #10" /* 42 */
|
||||
"trap #11", /* 43 */
|
||||
"trap #12", /* 44 */
|
||||
"trap #13", /* 45 */
|
||||
"trap #14", /* 46 */
|
||||
"trap #15", /* 47 */
|
||||
"floating point branch on unordered condition", /* 48 */
|
||||
"floting point inexact result", /* 49 */
|
||||
"floating point divide by zero", /* 50 */
|
||||
"floating point underflow", /* 51 */
|
||||
"floating point operand error", /* 52 */
|
||||
"floating point overflow", /* 53 */
|
||||
"floating point NaN", /* 54 */
|
||||
"floating point denormalized number", /* 55 */
|
||||
"reserved56", /* 56 */
|
||||
"reserved57",
|
||||
"reserved58",
|
||||
"reserved59",
|
||||
"reserved60",
|
||||
"unsupported instruction", /* 61 */
|
||||
"reserved62", /* 62 */
|
||||
"reserved63", /* 63 */
|
||||
"", "",
|
||||
"edge port 1", /* 1 */
|
||||
"edge port 2", /* 2 */
|
||||
"edge port 3", /* 3 */
|
||||
"edge port 4", /* 4 */
|
||||
"edge port 5", /* 5 */
|
||||
"edge port 6", /* 6 */
|
||||
"edge port 7", /* 7 */
|
||||
"unused8",
|
||||
"unused9",
|
||||
"unused10",
|
||||
"unused11",
|
||||
"unused12",
|
||||
"unused13",
|
||||
"unused14",
|
||||
"USB endpoint 0", /* 15 */
|
||||
"USB endpoint 1", /* 16 */
|
||||
"USB endpoint 2", /* 17 */
|
||||
"USB endpoint 3", /* 18 */
|
||||
"USB endpoint 4", /* 19 */
|
||||
"USB endpoint 5", /* 20 */
|
||||
"USB endpoint 6", /* 21 */
|
||||
"USB general interrupt", /* 22 */
|
||||
"USB core interrupt", /* 23 */
|
||||
"USB OR interrupt", /* 24 */
|
||||
"DSPI over/underflow", /* 25 */
|
||||
"DSPI receive FIFO overflow", /* 26 */
|
||||
"DSPI receive FIFO drain", /* 27 */
|
||||
"DSPI transmit FIFO underflow", /* 28 */
|
||||
"DSPI transfer complete", /* 29 */
|
||||
"DSPI trasmit FIFO full", /* 30 */
|
||||
"DSPI end of queue", /* 31 */
|
||||
"PSC3", /* 32 */
|
||||
"PSC2", /* 33 */
|
||||
"PSC1", /* 34 */
|
||||
"PSC0", /* 35 */
|
||||
"Comm timer", /* 36 */
|
||||
"SEC", /* 37 */
|
||||
"FEC1", /* 38 */
|
||||
"FEC0", /* 39 */
|
||||
"I2C", /* 40 */
|
||||
"PCI arbiter", /* 41 */
|
||||
"comm bus PCI", /* 42 */
|
||||
"XLB PCI", /* 43 */
|
||||
"not used44",
|
||||
"not used45",
|
||||
"not used46",
|
||||
"XLB arbiter to CPU", /* 47 */
|
||||
"multichannel DMA", /* 48 */
|
||||
"FlexCAN 0 error", /* 49 */
|
||||
"FlexCAN 0 bus off", /* 50 */
|
||||
"FlexCAN 0 message buffer", /* 51 */
|
||||
"not used52"
|
||||
"slice timer 1", /* 53 */
|
||||
"slice timer 0", /* 54 */
|
||||
"FlexCAN 1 error", /* 55 */
|
||||
"FlexCAN 1 bus off", /* 56 */
|
||||
"FlexCAN 1 message buffer", /* 57 */
|
||||
"not used58",
|
||||
"GPT3", /* 59 */
|
||||
"GPT2", /* 60 */
|
||||
"GPT1", /* 61 */
|
||||
"GPT0", /* 62 */
|
||||
"not used63"
|
||||
};
|
||||
#endif /* DEBUG */
|
||||
|
||||
/*
|
||||
* This routine searches the ISR table for an entry that matches
|
||||
* 'vector'. If one is found, then 'handler' is executed.
|
||||
@@ -215,7 +347,7 @@ bool isr_execute_handler(int vector)
|
||||
{
|
||||
int index;
|
||||
|
||||
dbg("vector = %d\r\n", vector);
|
||||
dbg("vector = %d (%s)\r\n", vector, vector_to_str[vector]);
|
||||
|
||||
/*
|
||||
* locate an interrupt service routine handler.
|
||||
@@ -233,6 +365,7 @@ bool isr_execute_handler(int vector)
|
||||
return true;
|
||||
}
|
||||
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
/*
|
||||
* PIC interrupt handler for Firebee
|
||||
*
|
||||
@@ -243,24 +376,27 @@ bool pic_interrupt_handler(void *arg1, void *arg2)
|
||||
{
|
||||
uint8_t rcv_byte;
|
||||
|
||||
rcv_byte = MCF_PSC3_PSCRB_8BIT;
|
||||
dbg("PIC interrupt\r\n");
|
||||
|
||||
rcv_byte = read_pic_byte();
|
||||
if (rcv_byte == 2) /* PIC requests RTC data */
|
||||
{
|
||||
uint8_t *rtc_reg = (uint8_t *) 0xffff8961;
|
||||
uint8_t *rtc_data = (uint8_t *) 0xffff8963;
|
||||
volatile uint8_t *rtc_reg = (uint8_t *) 0xffff8961;
|
||||
volatile uint8_t *rtc_data = (uint8_t *) 0xffff8963;
|
||||
int index = 0;
|
||||
|
||||
err("PIC interrupt: requesting RTC data\r\n");
|
||||
|
||||
MCF_PSC3_PSCTB_8BIT = 0x82; // header byte to PIC
|
||||
write_pic_byte(0x82); // header byte to PIC
|
||||
do
|
||||
{
|
||||
*rtc_reg = 0;
|
||||
MCF_PSC3_PSCTB_8BIT = *rtc_data;
|
||||
} while (index++ < 64);
|
||||
*rtc_reg = index;
|
||||
write_pic_byte(*rtc_data);
|
||||
} while (++index < 64);
|
||||
}
|
||||
return true;
|
||||
}
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
bool xlbpci_interrupt_handler(void *arg1, void *arg2)
|
||||
{
|
||||
@@ -295,6 +431,58 @@ bool pciarb_interrupt_handler(void *arg1, void *arg2)
|
||||
{
|
||||
dbg("PCI ARB interrupt\r\n");
|
||||
|
||||
MCF_PCIARB_PASR |= MCF_PCIARB_PASR_EXTMBK(0x1f) | MCF_PCIARB_PASR_ITLMBK;
|
||||
return true;
|
||||
}
|
||||
|
||||
bool xlbarb_interrupt_handler(void *arg1, void *arg2, ...)
|
||||
{
|
||||
va_list args;
|
||||
int i;
|
||||
uint32_t status = MCF_XLB_XARB_SR;
|
||||
|
||||
dbg("arg1=0x%08x arg2=0x%08x\r\n", arg1, arg2);
|
||||
va_start(args, arg2);
|
||||
for (i = 0; i < 20; i++)
|
||||
{
|
||||
dbg("arg[%d]=0x%08x\r\n", i, va_arg(args, int));
|
||||
}
|
||||
va_end(args);
|
||||
|
||||
/*
|
||||
* TODO: we should probably issue a bus error when this occors
|
||||
*/
|
||||
err("XLB arbiter interrupt.\r\n");
|
||||
err("XARB_ADRCAP=0x%08lx\r\n", MCF_XLB_XARB_ADRCAP);
|
||||
err("XARB_SIGCAP=0x%08lx\r\n", MCF_XLB_XARB_SIGCAP);
|
||||
|
||||
MCF_XLB_XARB_ADRCAP = 0x0L;
|
||||
MCF_XLB_XARB_SIGCAP = 0x0L;
|
||||
|
||||
if (status & MCF_XLB_XARB_SR_AT)
|
||||
err("address tenure timeout\r\n");
|
||||
if (status & MCF_XLB_XARB_SR_DT)
|
||||
err("data tenure timeout\r\n");
|
||||
if (status & MCF_XLB_XARB_SR_BA)
|
||||
err("bus activity tenure timeout\r\n");
|
||||
if (status & MCF_XLB_XARB_SR_TTM)
|
||||
err("TBST/TSIZ mismatch\r\n");
|
||||
if (status & MCF_XLB_XARB_SR_ECW)
|
||||
err("external control word read/write\r\n");
|
||||
if (status & MCF_XLB_XARB_SR_TTR)
|
||||
err("TT reserved\r\n");
|
||||
if (status & MCF_XLB_XARB_SR_TTA)
|
||||
err("TT address only\r\n");
|
||||
if (status & MCF_XLB_XARB_SR_MM)
|
||||
err("multiple masters at priority 0\r\n");
|
||||
if (status & MCF_XLB_XARB_SR_SEA)
|
||||
err("slave error acknowledge\r\n");
|
||||
|
||||
/*
|
||||
* acknowledge interrupt
|
||||
*/
|
||||
MCF_XLB_XARB_SR = status; /* rwc bits */
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
@@ -332,6 +520,12 @@ bool irq5_handler(void *arg1, void *arg2)
|
||||
pending_interrupts & FBEE_INTR_PCI_INTC ||
|
||||
pending_interrupts & FBEE_INTR_PCI_INTD)
|
||||
{
|
||||
int handle;
|
||||
|
||||
if ((handle = pci_get_interrupt_cause() != -1))
|
||||
{
|
||||
pci_call_interrupt_chain(handle, 0L);
|
||||
}
|
||||
dbg("PCI interrupt IRQ5\r\n");
|
||||
FBEE_INTR_CLEAR = FBEE_INTR_PCI_INTA |
|
||||
FBEE_INTR_PCI_INTB |
|
||||
@@ -345,14 +539,6 @@ bool irq5_handler(void *arg1, void *arg2)
|
||||
FBEE_INTR_CLEAR = FBEE_INTR_DSP;
|
||||
}
|
||||
|
||||
if (pending_interrupts & FBEE_INTR_VSYNC || pending_interrupts & FBEE_INTR_HSYNC)
|
||||
{
|
||||
dbg("vsync or hsync interrupt!\r\n");
|
||||
FBEE_INTR_CLEAR = FBEE_INTR_VSYNC | FBEE_INTR_HSYNC;
|
||||
/* hsync and vsync should go to TOS unhandled */
|
||||
return false;
|
||||
}
|
||||
|
||||
MCF_EPORT_EPFR |= (1 << 5); /* clear interrupt from edge port */
|
||||
|
||||
return true;
|
||||
@@ -474,7 +660,7 @@ bool irq7_handler(void)
|
||||
*/
|
||||
bool gpt0_interrupt_handler(void *arg0, void *arg1)
|
||||
{
|
||||
dbg("handler called\n\r");
|
||||
dbg("gpt0 handler called\n\r");
|
||||
|
||||
MCF_GPT0_GMS &= ~1; /* rearm trigger */
|
||||
NOP();
|
||||
@@ -483,3 +669,26 @@ bool gpt0_interrupt_handler(void *arg0, void *arg1)
|
||||
return true;
|
||||
}
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
|
||||
uint32_t set_ipl(uint32_t ipl)
|
||||
{
|
||||
uint32_t ret;
|
||||
|
||||
__asm__ __volatile__(
|
||||
" move.w sr,%[ret]\r\n" /* retrieve status register */
|
||||
" andi.l #0x07,%[ipl]\n\t" /* mask out ipl bits on new value */
|
||||
" lsl.l #8,%[ipl]\n\t" /* shift them to position */
|
||||
" move.l %[ret],d0\n\t" /* retrieve original value */
|
||||
" andi.l #0x0000f8ff,d0\n\t" /* clear ipl part */
|
||||
" or.l %[ipl],d0\n\t" /* or in new value */
|
||||
" move.w d0,sr\n\t" /* put it in place */
|
||||
" andi.l #0x0700,%[ret]\r\n" /* mask out ipl bits */
|
||||
" lsr.l #8,%[ret]\r\n" /* shift them to position */
|
||||
: [ret] "=&d" (ret) /* output */
|
||||
: [ipl] "d" (ipl) /* input */
|
||||
: "cc" /* clobber */
|
||||
);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
331
sys/mmu.c
331
sys/mmu.c
@@ -1,16 +1,10 @@
|
||||
#include "mmu.h"
|
||||
#include "acia.h"
|
||||
#include "exceptions.h"
|
||||
#include "pci.h"
|
||||
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
#error "unknown machine!"
|
||||
#endif
|
||||
// #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
/*
|
||||
* mmu.c
|
||||
@@ -35,26 +29,6 @@
|
||||
* Copyright 2013 M. Froeschle
|
||||
*/
|
||||
|
||||
#define ACR_BA(x) ((x) & 0xffff0000)
|
||||
#define ACR_ADMSK(x) (((x) & 0xffff) << 16)
|
||||
#define ACR_E(x) (((x) & 1) << 15)
|
||||
|
||||
#define ACR_S(x) (((x) & 3) << 13)
|
||||
#define ACR_S_USERMODE 0
|
||||
#define ACR_S_SUPERVISOR_MODE 1
|
||||
#define ACR_S_ALL 2
|
||||
|
||||
#define ACR_AMM(x) (((x) & 1) << 10)
|
||||
|
||||
#define ACR_CM(x) (((x) & 3) << 5)
|
||||
#define ACR_CM_CACHEABLE_WT 0x0
|
||||
#define ACR_CM_CACHEABLE_CB 0x1
|
||||
#define ACR_CM_CACHE_INH_PRECISE 0x2
|
||||
#define ACR_CM_CACHE_INH_IMPRECISE 0x3
|
||||
|
||||
#define ACR_SP(x) (((x) & 1) << 3)
|
||||
#define ACR_W(x) (((x) & 1) << 2)
|
||||
|
||||
#include <stdint.h>
|
||||
#include "bas_printf.h"
|
||||
#include "bas_types.h"
|
||||
@@ -73,14 +47,6 @@
|
||||
#error "unknown machine!"x
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
//#define DBG_MMU
|
||||
#ifdef DBG_MMU
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG (%s()): " format, __FUNCTION__, ##arg);} while(0)
|
||||
#else
|
||||
#define dbg(format, arg...) do {;} while (0)
|
||||
#endif /* DBG_MMU */
|
||||
#define err(format, arg...) do { xprintf("ERROR (%s()): " format, __FUNCTION__, ##arg); } while(0);
|
||||
|
||||
/*
|
||||
* set ASID register
|
||||
* saves new value to rt_asid and returns former value
|
||||
@@ -229,8 +195,9 @@ static struct virt_to_phys translation[] =
|
||||
{ 0x00000000, 0x00e00000, 0x00000000 }, /* map first 14 MByte to first 14 Mb of SD ram */
|
||||
{ 0x00e00000, 0x00100000, 0x00000000 }, /* map TOS to SDRAM */
|
||||
{ 0x01000000, 0x04000000, 0x00000000 }, /* map rest of ram virt = phys */
|
||||
{ 0x60000000, 0x10000000, 0x00000000 }, /* map CPLD CF card I/O area */
|
||||
|
||||
#if 0
|
||||
{ 0x04000000, 0x08000000, 0x7C000000 }, /* experimental mapping for PCI memory */
|
||||
#endif
|
||||
};
|
||||
#elif defined(MACHINE_M54455)
|
||||
/* FIXME: this is not determined yet! */
|
||||
@@ -248,7 +215,7 @@ static struct virt_to_phys translation[] =
|
||||
|
||||
static int num_translations = sizeof(translation) / sizeof(struct virt_to_phys);
|
||||
|
||||
static inline int32_t lookup_phys(int32_t virt)
|
||||
static inline uint32_t lookup_phys(int32_t virt)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -264,36 +231,27 @@ static inline int32_t lookup_phys(int32_t virt)
|
||||
return -1;
|
||||
}
|
||||
|
||||
struct mmu_page_descriptor
|
||||
{
|
||||
uint8_t cache_mode : 2;
|
||||
uint8_t supervisor_protect : 1;
|
||||
uint8_t read : 1;
|
||||
uint8_t write : 1;
|
||||
uint8_t execute : 1;
|
||||
uint8_t global : 1;
|
||||
uint8_t locked : 1;
|
||||
};
|
||||
|
||||
/*
|
||||
* page descriptors. Size depending on DEFAULT_PAGE_SIZE, either 1M (resulting in 512
|
||||
* bytes size) or 8k pages (64k descriptor array size)
|
||||
*/
|
||||
static struct mmu_page_descriptor pages[SDRAM_SIZE / DEFAULT_PAGE_SIZE];
|
||||
#define NUM_PAGES (SDRAM_SIZE / SIZE_DEFAULT)
|
||||
static struct mmu_page_descriptor_ram pages[NUM_PAGES];
|
||||
|
||||
|
||||
int mmu_map_instruction_page(int32_t virt, uint8_t asid)
|
||||
int mmu_map_instruction_page(uint32_t virt, uint8_t asid)
|
||||
{
|
||||
const uint32_t size_mask = ~ (DEFAULT_PAGE_SIZE - 1); /* pagesize */
|
||||
int page_index = (virt & size_mask) / DEFAULT_PAGE_SIZE; /* index into page_descriptor array */
|
||||
struct mmu_page_descriptor *page = &pages[page_index]; /* attributes of page to map */
|
||||
const uint32_t size_mask = ~ (SIZE_DEFAULT - 1); /* pagesize */
|
||||
int page_index = (virt & size_mask) / SIZE_DEFAULT; /* index into page_descriptor array */
|
||||
struct mmu_page_descriptor_ram *page = &pages[page_index]; /* attributes of page to map */
|
||||
int ipl;
|
||||
int32_t phys = lookup_phys(virt); /* virtual to physical translation of page */
|
||||
uint32_t phys = lookup_phys(virt); /* virtual to physical translation of page */
|
||||
|
||||
if (phys == -1)
|
||||
if (phys == (uint32_t) -1)
|
||||
{
|
||||
/* no valid mapping found, caller will issue a bus error in return */
|
||||
|
||||
dbg("no mapping found\r\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -316,7 +274,7 @@ int mmu_map_instruction_page(int32_t virt, uint8_t asid)
|
||||
MCF_MMU_MMUTR_V; /* valid */
|
||||
|
||||
MCF_MMU_MMUDR = (phys & size_mask) | /* physical address */
|
||||
MCF_MMU_MMUDR_SZ(DEFAULT_PAGE_SIZE) | /* page size */
|
||||
MCF_MMU_MMUDR_SZ(MMU_PAGE_SIZE_DEFAULT) | /* page size */
|
||||
MCF_MMU_MMUDR_CM(page->cache_mode) | /* cache mode */
|
||||
(page->supervisor_protect ? MCF_MMU_MMUDR_SP : 0) | /* supervisor protect */
|
||||
(page->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */
|
||||
@@ -337,23 +295,52 @@ int mmu_map_instruction_page(int32_t virt, uint8_t asid)
|
||||
return 1;
|
||||
}
|
||||
|
||||
int mmu_map_data_page(int32_t virt, uint8_t asid)
|
||||
struct mmu_page_descriptor_ram pci_descriptor =
|
||||
{
|
||||
.cache_mode = CACHE_NOCACHE_PRECISE,
|
||||
.supervisor_protect = 0,
|
||||
.read = 1,
|
||||
.write = 1,
|
||||
.execute = 1,
|
||||
.global = 1,
|
||||
.locked = 0
|
||||
};
|
||||
|
||||
int mmu_map_data_page(uint32_t virt, uint8_t asid)
|
||||
{
|
||||
uint16_t ipl;
|
||||
const uint32_t size_mask = ~ (DEFAULT_PAGE_SIZE - 1); /* pagesize */
|
||||
int page_index = (virt & size_mask) / DEFAULT_PAGE_SIZE; /* index into page_descriptor array */
|
||||
struct mmu_page_descriptor *page = &pages[page_index]; /* attributes of page to map */
|
||||
const uint32_t size_mask = ~ (SIZE_DEFAULT - 1); /* pagesize */
|
||||
int page_index = (virt & size_mask) / SIZE_DEFAULT; /* index into page_descriptor array */
|
||||
struct mmu_page_descriptor_ram *page;
|
||||
uint32_t phys = 0L;
|
||||
|
||||
int32_t phys = lookup_phys(virt); /* virtual to physical translation of page */
|
||||
if (page_index < sizeof(pages) / sizeof(struct mmu_page_descriptor_ram))
|
||||
{
|
||||
page = &pages[page_index]; /* attributes of page to map */
|
||||
phys = lookup_phys(virt); /* virtual to physical translation of page */
|
||||
}
|
||||
|
||||
if (phys == -1)
|
||||
/*
|
||||
* check if we are trying to access PCI space
|
||||
*/
|
||||
else if (virt >= PCI_MEMORY_OFFSET && virt <= PCI_MEMORY_OFFSET + PCI_MEMORY_SIZE)
|
||||
{
|
||||
phys = virt;
|
||||
page = &pci_descriptor;
|
||||
}
|
||||
else
|
||||
return 0;
|
||||
|
||||
|
||||
|
||||
if (phys == (uint32_t) -1)
|
||||
{
|
||||
/* no valid mapping found, caller will issue a bus error in return */
|
||||
|
||||
dbg("no mapping found\r\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef DBG_MMU
|
||||
#ifdef DEBUG
|
||||
register int sp asm("sp");
|
||||
dbg("page_descriptor: 0x%02x, ssp = 0x%08x\r\n", * (uint8_t *) page, sp);
|
||||
#endif /* DBG_MMU */
|
||||
@@ -370,7 +357,7 @@ int mmu_map_data_page(int32_t virt, uint8_t asid)
|
||||
MCF_MMU_MMUTR_V; /* valid */
|
||||
|
||||
MCF_MMU_MMUDR = (phys & size_mask) | /* physical address */
|
||||
MCF_MMU_MMUDR_SZ(DEFAULT_PAGE_SIZE) | /* page size */
|
||||
MCF_MMU_MMUDR_SZ(MMU_PAGE_SIZE_DEFAULT) | /* page size */
|
||||
MCF_MMU_MMUDR_CM(page->cache_mode) | /* cache mode */
|
||||
(page->supervisor_protect ? MCF_MMU_MMUDR_SP : 0) | /* supervisor protect */
|
||||
(page->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */
|
||||
@@ -382,6 +369,7 @@ int mmu_map_data_page(int32_t virt, uint8_t asid)
|
||||
MCF_MMU_MMUOR_UAA; /* update allocation address field */
|
||||
|
||||
set_ipl(ipl);
|
||||
|
||||
dbg("mapped virt=0x%08x to phys=0x%08x\r\n", virt & size_mask, phys & size_mask);
|
||||
|
||||
dbg("DTLB: MCF_MMU_MMUOR = %08x\r\n", MCF_MMU_MMUOR);
|
||||
@@ -399,7 +387,7 @@ int mmu_map_data_page(int32_t virt, uint8_t asid)
|
||||
* per instruction as a minimum, more for performance. Thus locked pages (that can't be touched by the
|
||||
* LRU algorithm) should be used sparsingly.
|
||||
*/
|
||||
int mmu_map_page(int32_t virt, int32_t phys, enum mmu_page_size sz, uint8_t page_id, const struct mmu_page_descriptor *flags)
|
||||
uint32_t mmu_map_page(uint32_t virt, uint32_t phys, enum mmu_page_size sz, uint8_t page_id, const struct mmu_page_descriptor_ram *flags)
|
||||
{
|
||||
int size_mask;
|
||||
int ipl;
|
||||
@@ -433,17 +421,18 @@ int mmu_map_page(int32_t virt, int32_t phys, enum mmu_page_size sz, uint8_t page
|
||||
|
||||
ipl = set_ipl(7); /* do not disturb */
|
||||
|
||||
MCF_MMU_MMUTR = ((int) virt & size_mask) | /* virtual address */
|
||||
MCF_MMU_MMUTR = (virt & size_mask) | /* virtual address */
|
||||
MCF_MMU_MMUTR_ID(page_id) | /* address space id (ASID) */
|
||||
(flags->global ? MCF_MMU_MMUTR_SG : 0) | /* shared global */
|
||||
MCF_MMU_MMUTR_V; /* valid */
|
||||
|
||||
MCF_MMU_MMUDR = ((int) phys & size_mask) | /* physical address */
|
||||
MCF_MMU_MMUDR = (phys & size_mask) | /* physical address */
|
||||
MCF_MMU_MMUDR_SZ(sz) | /* page size */
|
||||
MCF_MMU_MMUDR_CM(flags->cache_mode) |
|
||||
(flags->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */
|
||||
(flags->write ? MCF_MMU_MMUDR_W : 0) | /* write access enable */
|
||||
(flags->execute ? MCF_MMU_MMUDR_X : 0) | /* execute access enable */
|
||||
(flags->supervisor_protect ? MCF_MMU_MMUDR_SP : 0) | /* supervisor protect */
|
||||
(flags->locked ? MCF_MMU_MMUDR_LK : 0);
|
||||
|
||||
MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */
|
||||
@@ -456,7 +445,7 @@ int mmu_map_page(int32_t virt, int32_t phys, enum mmu_page_size sz, uint8_t page
|
||||
|
||||
set_ipl(ipl);
|
||||
|
||||
dbg("mapped virt=0x%08x to phys=0x%08x\r\n", virt, phys);
|
||||
dbg("mapped virt=0x%08x to phys=0x%08x size mask 0x%lx\r\n", virt, phys, size_mask);
|
||||
|
||||
return 1;
|
||||
}
|
||||
@@ -465,7 +454,7 @@ void mmu_init(void)
|
||||
{
|
||||
extern uint8_t _MMUBAR[];
|
||||
uint32_t MMUBAR = (uint32_t) &_MMUBAR[0];
|
||||
struct mmu_page_descriptor flags;
|
||||
struct mmu_page_descriptor_ram flags;
|
||||
int i;
|
||||
|
||||
/*
|
||||
@@ -477,26 +466,24 @@ void mmu_init(void)
|
||||
/*
|
||||
* prelaminary initialization of page descriptor 0 (root) table
|
||||
*/
|
||||
for (i = 0; i < sizeof(pages) / sizeof(struct mmu_page_descriptor); i++)
|
||||
for (i = 0; i < NUM_PAGES; i++)
|
||||
{
|
||||
uint32_t addr = i * DEFAULT_PAGE_SIZE;
|
||||
uint32_t addr = i * SIZE_DEFAULT;
|
||||
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
if (addr >= 0x00f00000UL && addr < 0x00ffffffUL) /* Falcon I/O area on the Firebee */
|
||||
{
|
||||
pages[i].cache_mode = CACHE_NOCACHE_PRECISE;
|
||||
pages[i].execute = 0;
|
||||
pages[i].supervisor_protect = 1;
|
||||
pages[i].read = 1;
|
||||
pages[i].write = 1;
|
||||
pages[i].execute = 0;
|
||||
pages[i].global = 1;
|
||||
pages[i].supervisor_protect = 1;
|
||||
}
|
||||
else if (addr >= 0x0UL && addr < 0x00e00000UL) /* ST-RAM, potential video memory */
|
||||
{
|
||||
pages[i].cache_mode = CACHE_WRITETHROUGH;
|
||||
pages[i].execute = 1;
|
||||
pages[i].supervisor_protect = 0;
|
||||
pages[i].supervisor_protect = 0; // (addr == 0x0L ? 1 : 0);
|
||||
pages[i].read = 1;
|
||||
pages[i].write = 1;
|
||||
pages[i].execute = 1;
|
||||
@@ -505,40 +492,45 @@ void mmu_init(void)
|
||||
else if (addr >= 0x00e00000UL && addr < 0x00f00000UL) /* EmuTOS */
|
||||
{
|
||||
pages[i].cache_mode = CACHE_COPYBACK;
|
||||
pages[i].execute = 1;
|
||||
pages[i].supervisor_protect = 1;
|
||||
pages[i].supervisor_protect = 0;
|
||||
pages[i].read = 1;
|
||||
pages[i].write = 0;
|
||||
pages[i].execute = 1;
|
||||
pages[i].global = 1;
|
||||
}
|
||||
else if (addr >= 0x00000000 && addr <= 0x00010000) /* first Megabyte of ST RAM */
|
||||
{
|
||||
pages[i].cache_mode = CACHE_COPYBACK;
|
||||
pages[i].supervisor_protect = 0;
|
||||
pages[i].read = 1;
|
||||
pages[i].write = 1;
|
||||
pages[i].execute = 1;
|
||||
pages[i].global = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
pages[i].cache_mode = CACHE_COPYBACK;
|
||||
pages[i].execute = 1;
|
||||
pages[i].supervisor_protect = 0;
|
||||
pages[i].read = 1;
|
||||
pages[i].write = 1;
|
||||
pages[i].supervisor_protect = 0;
|
||||
pages[i].execute = 1;
|
||||
pages[i].global = 1;
|
||||
}
|
||||
pages[i].locked = 0; /* not locked */
|
||||
pages[0].supervisor_protect = 0; /* protect system vectors */
|
||||
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
if (addr >= 0x60000000UL && addr < 0x70000000UL) /* Compact Flash on the m5484lite */
|
||||
{
|
||||
pages[i].cache_mode = CACHE_NOCACHE_PRECISE;
|
||||
pages[i].execute = 0;
|
||||
pages[i].supervisor_protect = 0;
|
||||
pages[i].read = 1;
|
||||
pages[i].write = 1;
|
||||
pages[i].execute = 0;
|
||||
pages[i].execute = 1;
|
||||
pages[i].global = 1;
|
||||
pages[i].supervisor_protect = 1;
|
||||
}
|
||||
else if (addr >= 0x0UL && addr < 0x00e00000UL) /* ST-RAM, potential video memory */
|
||||
{
|
||||
pages[i].cache_mode = CACHE_WRITETHROUGH;
|
||||
pages[i].execute = 1;
|
||||
pages[i].supervisor_protect = 0;
|
||||
pages[i].read = 1;
|
||||
pages[i].write = 1;
|
||||
@@ -565,7 +557,6 @@ void mmu_init(void)
|
||||
pages[i].global = 1;
|
||||
}
|
||||
pages[i].locked = 0; /* not locked */
|
||||
pages[0].supervisor_protect = 0; /* protect system vectors */
|
||||
|
||||
#elif defined(MACHINE_M54455)
|
||||
if (addr >= 0x60000000UL && addr < 0x70000000UL) /* Compact Flash on the m5484lite */
|
||||
@@ -608,29 +599,33 @@ void mmu_init(void)
|
||||
pages[i].global = 1;
|
||||
}
|
||||
pages[i].locked = 0; /* not locked */
|
||||
pages[0].supervisor_protect = 0; /* protect system vectors */
|
||||
#else
|
||||
#error Unknown machine!
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
}
|
||||
|
||||
set_asid(0); /* do not use address extension (ASID provides virtual 48 bit addresses */
|
||||
set_asid(0); /* do not use address extension (ASID provides virtual 48 bit addresses */
|
||||
|
||||
// pages[0].supervisor_protect = 1; /* protect system vectors */
|
||||
|
||||
/* set data access attributes in ACR0 and ACR1 */
|
||||
|
||||
/* map PCI address space */
|
||||
/* set SRAM and MBAR access */
|
||||
set_acr0(ACR_W(0) | /* read and write accesses permitted */
|
||||
ACR_SP(1) | /* supervisor and user mode access permitted */
|
||||
// ACR_SP(1) | /* supervisor only access permitted */
|
||||
ACR_CM(ACR_CM_CACHE_INH_PRECISE) | /* cache inhibit, precise */
|
||||
ACR_AMM(0) | /* control region > 16 MB */
|
||||
ACR_S(ACR_S_SUPERVISOR_MODE) | /* match addresses in supervisor mode only */
|
||||
ACR_S(ACR_S_SUPERVISOR_MODE) | /* match addresses in supervisor and user mode */
|
||||
ACR_E(1) | /* enable ACR */
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
ACR_ADMSK(0x7f) | /* cover 2GB area from 0x80000000 to 0xffffffff */
|
||||
ACR_BA(0x80000000)); /* (equals area from 3 to 4 GB */
|
||||
// ACR_BA(PCI_MEMORY_OFFSET)); /* (equals area from 3 to 4 GB */
|
||||
ACR_BA(0xe0000000));
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
ACR_ADMSK(0x7f) | /* cover 2 GB area from 0x80000000 to 0xffffffff */
|
||||
ACR_BA(0x80000000));
|
||||
// ACR_BA(PCI_MEMORY_OFFSET));
|
||||
ACR_BA(0xe0000000));
|
||||
#elif defined(MACHINE_M54455)
|
||||
ACR_ADMSK(0x7f) |
|
||||
ACR_BA(0x80000000)); /* FIXME: not determined yet */
|
||||
@@ -638,8 +633,6 @@ void mmu_init(void)
|
||||
#error unknown machine!
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
// set_acr1(0x601fc000);
|
||||
|
||||
/* data access attributes for BaS in flash */
|
||||
|
||||
set_acr1(ACR_W(0) |
|
||||
@@ -676,47 +669,18 @@ void mmu_init(void)
|
||||
ACR_ADMSK(0x7) |
|
||||
ACR_BA(0xe0000000));
|
||||
|
||||
/* disable ACR1 - 3, essentially disabling all of the above */
|
||||
|
||||
/* disable ACR3 */
|
||||
set_acr3(0x0);
|
||||
|
||||
set_mmubar(MMUBAR + 1); /* set and enable MMUBAR */
|
||||
|
||||
/* create locked TLB entries */
|
||||
|
||||
flags.cache_mode = CACHE_COPYBACK;
|
||||
flags.supervisor_protect = 0;
|
||||
flags.read = 1;
|
||||
flags.write = 1;
|
||||
flags.execute = 1;
|
||||
flags.locked = true;
|
||||
|
||||
/* 0x00000000 - 0x00100000 (first MB of physical memory) locked virt = phys */
|
||||
mmu_map_page(0x0, 0x0, MMU_PAGE_SIZE_1M, 0, &flags);
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
/*
|
||||
* 0x00d00000 - 0x00e00000 (last megabyte of ST RAM = Falcon video memory) locked ID = 6
|
||||
* mapped to physical address 0x60d0'0000 (FPGA video memory)
|
||||
* video RAM: read write execute normal write true
|
||||
*/
|
||||
flags.cache_mode = CACHE_WRITETHROUGH;
|
||||
flags.supervisor_protect = 0;
|
||||
flags.read = 1;
|
||||
flags.write = 1;
|
||||
flags.execute = 1;
|
||||
flags.locked = true;
|
||||
mmu_map_page(0x00d00000, 0x60d00000, MMU_PAGE_SIZE_1M, SCA_PAGE_ID, &flags);
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Make the TOS (in SDRAM) read-only
|
||||
* This maps virtual 0x00e0'0000 - 0x00ef'ffff to the same virtual address
|
||||
*/
|
||||
flags.cache_mode = CACHE_COPYBACK;
|
||||
flags.supervisor_protect = 0;
|
||||
flags.supervisor_protect = 0; // needs to stay like this or cf_flasher will choke */
|
||||
flags.read = 1;
|
||||
flags.write = 0;
|
||||
flags.execute = 1;
|
||||
@@ -735,6 +699,21 @@ void mmu_init(void)
|
||||
flags.execute = 0;
|
||||
flags.locked = 1;
|
||||
mmu_map_page(0x00f00000, 0xfff00000, MMU_PAGE_SIZE_1M, 0, &flags);
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
/*
|
||||
* Map m5484LITE CPLD access
|
||||
*/
|
||||
flags.cache_mode = CACHE_NOCACHE_PRECISE;
|
||||
flags.supervisor_protect = 1;
|
||||
flags.read = 1;
|
||||
flags.write = 1;
|
||||
flags.execute = 0;
|
||||
flags.locked = 1;
|
||||
mmu_map_page(0x6a000000, 0x6a000000, MMU_PAGE_SIZE_1M, 0, &flags);
|
||||
#elif defined(MACHINE_M54455)
|
||||
#warning MMU specs for M54455 not yet determined
|
||||
#else
|
||||
#error Unknown machine
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
/*
|
||||
@@ -742,7 +721,7 @@ void mmu_init(void)
|
||||
* virtual address. This is also used (completely) when BaS is in RAM
|
||||
*/
|
||||
flags.cache_mode = CACHE_COPYBACK;
|
||||
flags.supervisor_protect = 1;
|
||||
flags.supervisor_protect = 0;
|
||||
flags.read = 1;
|
||||
flags.write = 1;
|
||||
flags.execute = 1;
|
||||
@@ -754,7 +733,7 @@ void mmu_init(void)
|
||||
* virtual address. Used uncached for drivers.
|
||||
*/
|
||||
flags.cache_mode = CACHE_NOCACHE_PRECISE;
|
||||
flags.supervisor_protect = 1;
|
||||
flags.supervisor_protect = 0;
|
||||
flags.read = 1;
|
||||
flags.write = 1;
|
||||
flags.execute = 0;
|
||||
@@ -763,12 +742,11 @@ void mmu_init(void)
|
||||
}
|
||||
|
||||
|
||||
uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc,
|
||||
uint32_t format_status)
|
||||
uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc, uint32_t format_status)
|
||||
{
|
||||
uint32_t fault = format_status & 0xc030000;
|
||||
|
||||
dbg("MMU TLB MISS accessing 0x%08x\r\nFS = 0x%08x\r\nPC = 0x%08x\r\n", fault_address, format_status, pc);
|
||||
//dbg("MMU TLB MISS accessing 0x%08x\r\nFS = 0x%08x\r\nPC = 0x%08x\r\n", fault_address, format_status, pc);
|
||||
// flush_and_invalidate_caches();
|
||||
|
||||
switch (fault)
|
||||
@@ -786,22 +764,24 @@ uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc,
|
||||
|
||||
if (!mmu_map_instruction_page(pc, 0))
|
||||
{
|
||||
dbg("bus error\r\n");
|
||||
dbg("ITLB miss bus error\r\n");
|
||||
return 1; /* bus error */
|
||||
}
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
/* due to prefetch, it makes sense to map the next adjacent page also for ITLBs */
|
||||
if (pc + DEFAULT_PAGE_SIZE < TARGET_ADDRESS)
|
||||
if (pc + SIZE_DEFAULT < TARGET_ADDRESS)
|
||||
{
|
||||
/*
|
||||
* only do this if the next page is still valid RAM
|
||||
*/
|
||||
if (!mmu_map_instruction_page(pc + DEFAULT_PAGE_SIZE, 0))
|
||||
if (!mmu_map_instruction_page(pc + MMU_DEFAULT_PAGE_SIZE, 0))
|
||||
{
|
||||
dbg("bus error\r\n");
|
||||
dbg("ITLB next page bus error\r\n");
|
||||
return 1; /* bus error */
|
||||
}
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
break;
|
||||
|
||||
case 0x08020000: /* TLB miss on data write */
|
||||
@@ -815,14 +795,58 @@ uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc,
|
||||
|
||||
if (!mmu_map_data_page(fault_address, 0))
|
||||
{
|
||||
dbg("bus error\r\n");
|
||||
dbg("DTLB miss bus error\r\n");
|
||||
return 1; /* bus error */
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x0c010000:
|
||||
case 0x08010000:
|
||||
dbg("privilege violation accessing 0x%08x\r\n"
|
||||
"FS = 0x%08x\r\n"
|
||||
"MMUSR = 0x%08x\r\n"
|
||||
"PC = 0x%08x\r\n",
|
||||
fault_address, format_status, mmu_sr, pc);
|
||||
dbg("fault = 0x%08x\r\n", fault);
|
||||
#ifdef _DOES_NOT_WORK_
|
||||
/*
|
||||
* check if its one of our "special cases" and map a user page on top of it if user
|
||||
* mode access should be allowed
|
||||
*/
|
||||
if (fault_address >= 1024 && fault_address < 0x00100000) /* ST-RAM */
|
||||
{
|
||||
struct mmu_page_descriptor flags =
|
||||
{
|
||||
.cache_mode = CACHE_COPYBACK,
|
||||
.supervisor_protect = 0,
|
||||
.read = 1,
|
||||
.write = 1,
|
||||
.execute = 1,
|
||||
.global = 1,
|
||||
.locked = 0
|
||||
};
|
||||
|
||||
uint32_t virt = fault_address & ~(SIZE_1K - 1);
|
||||
uint32_t phys = (fault_address & (~(SIZE_1K - 1))) + 0x60000000;
|
||||
dbg("mapping helper page virt=0x%08x to phys=0x%08x\r\n", virt, phys);
|
||||
if (!mmu_map_page(virt, phys, MMU_PAGE_SIZE_1K, 0, &flags))
|
||||
{
|
||||
dbg("privilege violation (bus error)\r\n");
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
return 1;
|
||||
break;
|
||||
|
||||
/* else issue a bus error */
|
||||
default:
|
||||
dbg("bus error\r\n");
|
||||
dbg("bus error accessing 0x%08x\r\n"
|
||||
"FS = 0x%08x\r\n"
|
||||
"MMUSR = 0x%08x\r\n"
|
||||
"PC = 0x%08x\r\n",
|
||||
fault_address, format_status, mmu_sr, pc);
|
||||
dbg("fault = 0x%08x\r\n", fault);
|
||||
return 1; /* signal bus error to caller */
|
||||
}
|
||||
#ifdef DBG_MMU
|
||||
@@ -858,14 +882,14 @@ uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc,
|
||||
*
|
||||
* return: 0 if failed (page not in translation table), 1 otherwise
|
||||
*/
|
||||
int32_t mmu_map_data_page_locked(uint32_t virt, uint32_t size, int asid)
|
||||
uint32_t mmu_map_data_page_locked(uint32_t virt, uint32_t size, int asid)
|
||||
{
|
||||
const uint32_t size_mask = ~ (DEFAULT_PAGE_SIZE - 1); /* pagesize */
|
||||
int page_index = (virt & size_mask) / DEFAULT_PAGE_SIZE; /* index into page_descriptor array */
|
||||
struct mmu_page_descriptor *page = &pages[page_index]; /* attributes of page to map */
|
||||
const uint32_t size_mask = ~ (SIZE_DEFAULT - 1); /* pagesize */
|
||||
int page_index = (virt & size_mask) / SIZE_DEFAULT; /* index into page_descriptor array */
|
||||
struct mmu_page_descriptor_ram *page = &pages[page_index]; /* attributes of page to map */
|
||||
int i = 0;
|
||||
|
||||
while (page_index * DEFAULT_PAGE_SIZE < virt + size)
|
||||
while (page_index * SIZE_DEFAULT < virt + size)
|
||||
{
|
||||
if (page->locked)
|
||||
{
|
||||
@@ -877,7 +901,7 @@ int32_t mmu_map_data_page_locked(uint32_t virt, uint32_t size, int asid)
|
||||
mmu_map_data_page(virt, 0);
|
||||
i++;
|
||||
}
|
||||
virt += DEFAULT_PAGE_SIZE;
|
||||
virt += SIZE_DEFAULT;
|
||||
}
|
||||
|
||||
dbg("%d pages locked\r\n", i);
|
||||
@@ -890,18 +914,18 @@ int32_t mmu_map_data_page_locked(uint32_t virt, uint32_t size, int asid)
|
||||
*
|
||||
* return: 0 if failed (page not found), 1 otherwise
|
||||
*/
|
||||
int32_t mmu_unlock_data_page(uint32_t address, uint32_t size, int asid)
|
||||
uint32_t mmu_unlock_data_page(uint32_t address, uint32_t size, int asid)
|
||||
{
|
||||
int curr_asid;
|
||||
const uint32_t size_mask = ~ (DEFAULT_PAGE_SIZE - 1);
|
||||
int page_index = (address & size_mask) / DEFAULT_PAGE_SIZE; /* index into page descriptor array */
|
||||
struct mmu_page_descriptor *page = &pages[page_index];
|
||||
const uint32_t size_mask = ~ (SIZE_DEFAULT - 1);
|
||||
int page_index = (address & size_mask) / SIZE_DEFAULT; /* index into page descriptor array */
|
||||
struct mmu_page_descriptor_ram *page = &pages[page_index];
|
||||
|
||||
curr_asid = set_asid(asid); /* set asid to the one to search for */
|
||||
|
||||
/* TODO: check for pages[] array bounds */
|
||||
|
||||
while (page_index * DEFAULT_PAGE_SIZE < address + size)
|
||||
while (page_index * SIZE_DEFAULT < address + size)
|
||||
{
|
||||
MCF_MMU_MMUAR = address + page->supervisor_protect;
|
||||
MCF_MMU_MMUOR = MCF_MMU_MMUOR_STLB | /* search TLB */
|
||||
@@ -909,7 +933,7 @@ int32_t mmu_unlock_data_page(uint32_t address, uint32_t size, int asid)
|
||||
MCF_MMU_MMUOR_RW;
|
||||
if (MCF_MMU_MMUSR & MCF_MMU_MMUSR_HIT) /* found */
|
||||
{
|
||||
#ifdef DBG_MMU
|
||||
#ifdef DEBUG
|
||||
uint32_t tlb_aa = MCF_MMU_MMUOR >> 16; /* MMU internal allocation address for TLB */
|
||||
#endif /* DBG_MMU */
|
||||
|
||||
@@ -930,7 +954,7 @@ int32_t mmu_unlock_data_page(uint32_t address, uint32_t size, int asid)
|
||||
return 1; /* success */
|
||||
}
|
||||
|
||||
int32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb)
|
||||
uint32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb)
|
||||
{
|
||||
int i;
|
||||
int li = 0;
|
||||
@@ -979,5 +1003,6 @@ int32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb)
|
||||
|
||||
uint32_t mmu_report_pagesize(void)
|
||||
{
|
||||
return DEFAULT_PAGE_SIZE;
|
||||
return SIZE_DEFAULT;
|
||||
}
|
||||
|
||||
|
||||
100
sys/startcf.S
100
sys/startcf.S
@@ -4,64 +4,74 @@
|
||||
* so it will be placed at the very beginning of the ROM.
|
||||
*/
|
||||
|
||||
.equ MCF_MMU_MMUCR, __MMUBAR + 0
|
||||
.equ MCF_MMU_MMUCR, __MMUBAR + 0
|
||||
|
||||
.global _rom_header
|
||||
.global _rom_entry
|
||||
.globl _rom_header
|
||||
.globl _rom_entry
|
||||
|
||||
.extern _initialize_hardware
|
||||
.extern _rt_mbar
|
||||
.extern _initialize_hardware
|
||||
.extern _rt_mbar
|
||||
|
||||
/* ROM header */
|
||||
_rom_header:
|
||||
/* The first long is supposed to be the initial SP.
|
||||
* We replace it by bra.s to allow running the ROM from the first byte.
|
||||
* Then we add a fake jmp instruction for pretty disassembly.
|
||||
*/
|
||||
bra.s _rom_entry // Short jump to the real entry point
|
||||
.short 0x4ef9 // Fake jmp instruction
|
||||
/* The second long is the initial PC */
|
||||
.long _rom_entry // Real entry point
|
||||
/* The first long is supposed to be the initial SP.
|
||||
* We replace it by bra.s to allow running the ROM from the first byte.
|
||||
* Then we add a fake jmp instruction for pretty disassembly.
|
||||
*/
|
||||
bra.s _rom_entry // Short jump to the real entry point
|
||||
.short 0x4ef9 // Fake jmp instruction
|
||||
/* The second long is the initial PC */
|
||||
.long _rom_entry // Real entry point
|
||||
|
||||
/* ROM entry point */
|
||||
_rom_entry:
|
||||
/* disable interrupts */
|
||||
move.w #0x2700,SR
|
||||
/* disable interrupts */
|
||||
move.w #0x2700,sr
|
||||
|
||||
/* Initialize MBAR */
|
||||
move.l #__MBAR,d0
|
||||
movec d0,MBAR
|
||||
move.l d0,_rt_mbar
|
||||
#if !defined(MACHINE_M54455) // MCF54455 does not have the MBAR register
|
||||
/* Initialize MBAR */
|
||||
move.l #__MBAR,d0
|
||||
movec d0,MBAR
|
||||
move.l d0,_rt_mbar
|
||||
#endif
|
||||
|
||||
/* mmu off */
|
||||
move.l #__MMUBAR+1,d0
|
||||
movec d0,MMUBAR
|
||||
/* mmu off */
|
||||
move.l #__MMUBAR+1,d0
|
||||
movec d0,MMUBAR
|
||||
|
||||
clr.l d0
|
||||
move.l d0,MCF_MMU_MMUCR
|
||||
clr.l d0
|
||||
move.l d0,MCF_MMU_MMUCR
|
||||
nop
|
||||
|
||||
/* Initialize RAMBARs: locate SRAM and validate it */
|
||||
move.l #__RAMBAR0 + 0x7,d0 /* supervisor only */
|
||||
movec d0,RAMBAR0
|
||||
move.l #__RAMBAR1 + 0x1,d0
|
||||
movec d0,RAMBAR1
|
||||
#if !defined(MACHINE_M54455) // MCF54455 does not have RAMBAR0 and RAMBAR1 registers */
|
||||
|
||||
/* set stack pointer to end of SRAM */
|
||||
lea __SUP_SP,a7
|
||||
move.l #0,(sp)
|
||||
/* Initialize RAMBARs: locate SRAM and validate it */
|
||||
move.l #__RAMBAR0 + 0x7,d0 // supervisor only
|
||||
movec d0,RAMBAR0
|
||||
move.l #__RAMBAR1 + 0x1,d0
|
||||
movec d0,RAMBAR1
|
||||
#else
|
||||
move.l #__RAMBAR0 + 0x7,d0
|
||||
movec d0,RAMBAR
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Initialize the processor caches.
|
||||
* The instruction cache is fully enabled.
|
||||
* The data cache is enabled, but cache-inhibited by default.
|
||||
* Later, the MMU will fully activate the data cache for specific areas.
|
||||
* It is important to enable both caches now, otherwise cpushl would hang.
|
||||
*/
|
||||
/* set stack pointer to end of SRAM */
|
||||
lea __SUP_SP,a7
|
||||
move.l #0,(sp)
|
||||
|
||||
move.l #0xa50c8120,d0
|
||||
movec d0,cacr
|
||||
andi.l #0xfefbfeff,d0 // Clear invalidate bits
|
||||
move.l d0,_rt_cacr
|
||||
/*
|
||||
* Initialize the processor caches.
|
||||
* The instruction cache is fully enabled.
|
||||
* The data cache is enabled, but cache-inhibited by default.
|
||||
* Later, the MMU will fully activate the data cache for specific areas.
|
||||
* It is important to enable both caches now, otherwise cpushl would hang.
|
||||
*/
|
||||
|
||||
move.l #0xa50c8120,d0
|
||||
movec d0,cacr
|
||||
andi.l #0xfefbfeff,d0 // Clear invalidate bits
|
||||
move.l d0,_rt_cacr
|
||||
|
||||
/* initialize any hardware specific issues */
|
||||
bra _initialize_hardware
|
||||
|
||||
/* initialize any hardware specific issues */
|
||||
bra _initialize_hardware
|
||||
|
||||
241
sys/sysinit.c
241
sys/sysinit.c
@@ -46,8 +46,6 @@
|
||||
#else
|
||||
#error "unknown machine"
|
||||
#endif /* MACHINE_M5484LITE */
|
||||
|
||||
#
|
||||
#include "dma.h"
|
||||
#include "mod_devicetable.h"
|
||||
#include "pci_ids.h"
|
||||
@@ -55,6 +53,9 @@
|
||||
#include "usb.h"
|
||||
#include "video.h"
|
||||
|
||||
// #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
#define UNUSED(x) (void)(x) /* Unused variable */
|
||||
|
||||
bool fpga_configured = false; /* for FPGA JTAG configuration */
|
||||
@@ -70,7 +71,7 @@ extern volatile long _VRAM; /* start address of video ram from linker script */
|
||||
* BYT3 = 7.576ns/tick = 132.00MHz offset 3
|
||||
* count down!!! 132MHz!!!
|
||||
*/
|
||||
void init_slt(void)
|
||||
static void init_slt(void)
|
||||
{
|
||||
xprintf("slice timer initialization: ");
|
||||
MCF_SLT0_STCNT = 0xffffffff;
|
||||
@@ -81,7 +82,7 @@ void init_slt(void)
|
||||
/*
|
||||
* init GPIO general purpose I/O module
|
||||
*/
|
||||
void init_gpio(void)
|
||||
static void init_gpio(void)
|
||||
{
|
||||
/*
|
||||
* pad register P.S.:FBCTL and FBCS set correctly at reset
|
||||
@@ -128,13 +129,13 @@ void init_gpio(void)
|
||||
* /PCIBG1 used as /PCIBG1
|
||||
* /PCIBG0 used as /PCIBG0
|
||||
*/
|
||||
#if MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_TBST |
|
||||
MCF_PAD_PAR_PCIBG_PAR_PCIBG3_GPIO |
|
||||
MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 |
|
||||
MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 |
|
||||
MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0;
|
||||
#elif MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_PCIBG4 |
|
||||
MCF_PAD_PAR_PCIBG_PAR_PCIBG3_PCIBG3 |
|
||||
MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 |
|
||||
@@ -214,16 +215,16 @@ void init_gpio(void)
|
||||
/*
|
||||
* init serial
|
||||
*/
|
||||
void init_serial(void)
|
||||
static void init_serial(void)
|
||||
{
|
||||
/* PSC0: SER1 */
|
||||
MCF_PSC0_PSCSICR = 0; /* PSC control register: select UART mode */
|
||||
MCF_PSC0_PSCCSR = 0xDD; /* use TX and RX baud rate from PSC timer */
|
||||
MCF_PSC0_PSCCTUR = 0x00; /* =\ */
|
||||
#ifdef MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
MCF_PSC0_PSCCTLR = 36; /* divide sys_clk by 36 => BAUD RATE = 115200 bps */
|
||||
#endif
|
||||
#ifdef MACHINE_M5484LITE
|
||||
#if defined(MACHINE_M5484LITE)
|
||||
MCF_PSC0_PSCCTLR = 27; /* LITE board has 100 MHz sys_clk only */
|
||||
#endif
|
||||
MCF_PSC0_PSCCR = 0x20; /* reset receiver and RxFIFO */
|
||||
@@ -244,7 +245,7 @@ void init_serial(void)
|
||||
MCF_PSC0_PSCOPSET = 0x01;
|
||||
MCF_PSC0_PSCCR = 0x05;
|
||||
|
||||
#ifdef MACHINE_FIREBEE /* PSC3 is not connected to anything on the LITE board */
|
||||
#if defined(MACHINE_FIREBEE) /* PSC3 is not connected to anything on the LITE board */
|
||||
/* PSC3: PIC */
|
||||
MCF_PSC3_PSCSICR = 0; // UART
|
||||
MCF_PSC3_PSCCSR = 0xDD;
|
||||
@@ -267,16 +268,13 @@ void init_serial(void)
|
||||
MCF_PSC3_PSCCR = 0x05;
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
MCF_INTC_ICR32 = MCF_INTC_ICR_IL(7) |
|
||||
MCF_INTC_ICR_IL(4); /* PSC3 interrupt vector. Do we need it? */
|
||||
|
||||
xprintf("\r\nserial interfaces initialization: finished\r\n");
|
||||
}
|
||||
|
||||
/********************************************************************/
|
||||
/* Initialize DDR DIMMs on the EVB board */
|
||||
/********************************************************************/
|
||||
bool init_ddram(void)
|
||||
static bool init_ddram(void)
|
||||
{
|
||||
xprintf("SDRAM controller initialization: ");
|
||||
|
||||
@@ -298,7 +296,7 @@ bool init_ddram(void)
|
||||
*/
|
||||
MCF_SDRAMC_SDRAMDS = 0x000002AA;/* SDRAMDS configuration */
|
||||
|
||||
#if MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
MCF_SDRAMC_CS0CFG = 0x0000001A; /* SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF) */
|
||||
MCF_SDRAMC_CS1CFG = 0x0800001A; /* SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF) */
|
||||
MCF_SDRAMC_CS2CFG = 0x1000001A; /* SDRAM CS2 configuration (128Mbytes 1000_0000 - 07FF_FFFF) */
|
||||
@@ -341,7 +339,7 @@ bool init_ddram(void)
|
||||
MCF_SDRAMC_SDMR = 0x008D0000; /* SDMR (write to LMR) */
|
||||
MCF_SDRAMC_SDCR = 0x710D0F00; /* SDCR (lock SDMR and enable refresh) */
|
||||
|
||||
#elif MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
MCF_SDRAMC_CS0CFG = 0x00000019; /* SDRAM CS0 configuration (64 Mbytes 0000_0000 - 03FF_FFFF) */
|
||||
MCF_SDRAMC_CS1CFG = 0x00000000; /* SDRAM CS1 configuration - off */
|
||||
MCF_SDRAMC_CS2CFG = 0x00000000; /* SDRAM CS2 configuration - off */
|
||||
@@ -401,65 +399,58 @@ bool init_ddram(void)
|
||||
/*
|
||||
* initialize FlexBus chip select registers
|
||||
*/
|
||||
void init_fbcs()
|
||||
static void init_fbcs()
|
||||
{
|
||||
xprintf("FlexBus chip select registers initialization: ");
|
||||
|
||||
/* Flash */
|
||||
MCF_FBCS0_CSAR = BOOTFLASH_BASE_ADDRESS; /* flash base address */
|
||||
MCF_FBCS0_CSCR = MCF_FBCS_CSCR_PS_16 | /* 16 bit word access */
|
||||
MCF_FBCS_CSCR_WS(6)| /* 6 Waitstates */
|
||||
MCF_FBCS_CSCR_AA |
|
||||
MCF_FBCS_CSCR_ASET(1) |
|
||||
MCF_FBCS_CSCR_RDAH(1); /* chip errata SECF077 */
|
||||
MCF_FBCS0_CSAR = MCF_FBCS_CSAR_BA(BOOTFLASH_BASE_ADDRESS); /* flash base address */
|
||||
MCF_FBCS0_CSCR = MCF_FBCS_CSCR_PS_16 | /* 16 bit word access */
|
||||
MCF_FBCS_CSCR_WS(8)| /* 6 wait states */
|
||||
MCF_FBCS_CSCR_AA | /* auto /TA acknowledge */
|
||||
MCF_FBCS_CSCR_ASET(1) | /* assert chip select on second rising edge after address assertion */
|
||||
MCF_FBCS_CSCR_RDAH(1); /* chip errata SECF077 */
|
||||
MCF_FBCS0_CSMR = BOOTFLASH_BAM |
|
||||
MCF_FBCS_CSMR_V; /* enable */
|
||||
|
||||
|
||||
#if MACHINE_FIREBEE /* FBC setup for FireBee */
|
||||
MCF_FBCS1_CSAR = 0xFFF00000; /* ATARI I/O ADRESS */
|
||||
#if defined(MACHINE_FIREBEE) /* FBC setup for FireBee */
|
||||
MCF_FBCS1_CSAR = MCF_FBCS_CSAR_BA(0xFFF00000); /* ATARI I/O address range */
|
||||
MCF_FBCS1_CSCR = MCF_FBCS_CSCR_PS_16 /* 16BIT PORT */
|
||||
| MCF_FBCS_CSCR_WS(8) /* DEFAULT 8WS */
|
||||
| MCF_FBCS_CSCR_AA; /* AA */
|
||||
| MCF_FBCS_CSCR_WS(32) /* 8 wait states */
|
||||
| MCF_FBCS_CSCR_AA; /* auto /TA acknowledge */
|
||||
MCF_FBCS1_CSMR = MCF_FBCS_CSMR_BAM_1M | MCF_FBCS_CSMR_V;
|
||||
|
||||
MCF_FBCS2_CSAR = 0xF0000000; /* Firebee new I/O address range */
|
||||
MCF_FBCS2_CSAR = MCF_FBCS_CSAR_BA(0xF0000000); /* Firebee new I/O address range */
|
||||
MCF_FBCS2_CSCR = MCF_FBCS_CSCR_PS_32 /* 32BIT PORT */
|
||||
| MCF_FBCS_CSCR_WS(8) /* DEFAULT 4WS */
|
||||
| MCF_FBCS_CSCR_AA; /* AA */
|
||||
| MCF_FBCS_CSCR_WS(32) /* 4 wait states */
|
||||
| MCF_FBCS_CSCR_AA; /* auto /TA acknowledge */
|
||||
MCF_FBCS2_CSMR = (MCF_FBCS_CSMR_BAM_128M /* F000'0000-F7FF'FFFF */
|
||||
| MCF_FBCS_CSMR_V);
|
||||
|
||||
MCF_FBCS3_CSAR = 0xF8000000; /* Firebee new I/O address range */
|
||||
MCF_FBCS3_CSCR = MCF_FBCS_CSCR_PS_16 /* 16BIT PORT */
|
||||
| MCF_FBCS_CSCR_AA; // AA
|
||||
MCF_FBCS3_CSAR = MCF_FBCS_CSAR_BA(0xF8000000); /* Firebee SRAM */
|
||||
MCF_FBCS3_CSCR = MCF_FBCS_CSCR_PS_16 /* 16 bit port */
|
||||
| MCF_FBCS_CSCR_WS(32) /* 0 wait states */
|
||||
| MCF_FBCS_CSCR_AA; /* auto /TA acknowledge */
|
||||
MCF_FBCS3_CSMR = (MCF_FBCS_CSMR_BAM_64M /* F800'0000-FBFF'FFFF */
|
||||
| MCF_FBCS_CSMR_V);
|
||||
|
||||
MCF_FBCS4_CSAR = 0x40000000; /* video ram area, FB_CS3 not used, decoded on FPGA */
|
||||
MCF_FBCS4_CSCR = MCF_FBCS_CSCR_PS_32 /* 32BIT PORT */
|
||||
/*
|
||||
* Note: burst read/write settings of the following FBCS are purely "cosmetical".
|
||||
* The Coldfire FlexBus only "bursts" on a smaller port size than 32 bit up to 32 bit,
|
||||
* i.e. it can burst on an 8 bit port up to 4 burst cycles or two on a 16 bit port.
|
||||
* Enabling burst on a 32 bit port has no effect (unfortunately).
|
||||
*/
|
||||
MCF_FBCS4_CSAR = MCF_FBCS_CSAR_BA(0x40000000); /* video ram area, FB_CS3 not used, decoded on FPGA */
|
||||
MCF_FBCS4_CSCR = MCF_FBCS_CSCR_PS_32 /* 32 bit port */
|
||||
| MCF_FBCS_CSCR_WS(32) /* 0 wait states */
|
||||
| MCF_FBCS_CSCR_AA /* /TA auto acknowledge */
|
||||
| MCF_FBCS_CSCR_BSTR /* burst read enable */
|
||||
| MCF_FBCS_CSCR_BSTW; /* burst write enable */
|
||||
MCF_FBCS4_CSMR = MCF_FBCS_CSMR_BAM_1G /* 4000'0000-7FFF'FFFF */
|
||||
| MCF_FBCS_CSMR_V;
|
||||
#elif MACHINE_M5484LITE
|
||||
/* disable other FBCS for now */
|
||||
MCF_FBCS1_CSMR = 0;
|
||||
MCF_FBCS2_CSMR = 0;
|
||||
MCF_FBCS3_CSMR = 0;
|
||||
MCF_FBCS4_CSMR = 0;
|
||||
|
||||
MCF_FBCS5_CSAR = MCF_FBCS_CSAR_BA(0x60000000);
|
||||
MCF_FBCS5_CSCR = MCF_FBCS_CSCR_PS_16 /* CPLD access */
|
||||
| MCF_FBCS_CSCR_WS(32)
|
||||
| MCF_FBCS_CSCR_ASET(1)
|
||||
| MCF_FBCS_CSCR_AA;
|
||||
MCF_FBCS5_CSMR = MCF_FBCS_CSMR_BAM_256M
|
||||
| MCF_FBCS_CSMR_V;
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
|
||||
#ifndef MACHINE_M5484LITE
|
||||
/* disable FBCS5 on Firebee */
|
||||
MCF_FBCS5_CSAR = 0x0;
|
||||
MCF_FBCS5_CSCR = MCF_FBCS_CSCR_PS_8
|
||||
| MCF_FBCS_CSCR_BSTR
|
||||
@@ -467,12 +458,30 @@ void init_fbcs()
|
||||
| MCF_FBCS_CSCR_RDAH(1); /* chip errata SECF077 */
|
||||
MCF_FBCS5_CSMR = MCF_FBCS_CSMR_BAM_1G;
|
||||
//| MCF_FBCS_CSMR_V;
|
||||
#endif /* MACHINE_M5484LITE */
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
/* disable other FBCS for now */
|
||||
MCF_FBCS1_CSMR = 0;
|
||||
MCF_FBCS2_CSMR = 0;
|
||||
MCF_FBCS3_CSMR = 0;
|
||||
MCF_FBCS4_CSMR = 0;
|
||||
|
||||
/*
|
||||
* the FireEngine needs AA for its CPLD accessed registers
|
||||
*/
|
||||
MCF_FBCS5_CSAR = MCF_FBCS_CSAR_BA(0x60000000);
|
||||
MCF_FBCS5_CSCR = MCF_FBCS_CSCR_PS_16 | /* CPLD access 16 bit wide */
|
||||
MCF_FBCS_CSCR_WS(32) | /* 32 wait states */
|
||||
MCF_FBCS_CSCR_ASET(1) | /* chip select on second rising clock edge */
|
||||
MCF_FBCS_CSCR_AA; /* auto acknowledge */
|
||||
MCF_FBCS5_CSMR = MCF_FBCS_CSMR_BAM_256M | /* maps 0x60000000 to 0x68000000 */
|
||||
MCF_FBCS_CSMR_V;
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
xprintf("finished\r\n");
|
||||
}
|
||||
|
||||
void wait_pll(void)
|
||||
#ifdef MACHINE_FIREBEE
|
||||
static void wait_pll(void)
|
||||
{
|
||||
int32_t trgt = MCF_SLT0_SCNT - 100000;
|
||||
do
|
||||
@@ -483,12 +492,12 @@ void wait_pll(void)
|
||||
|
||||
static volatile uint8_t *pll_base = (volatile uint8_t *) 0xf0000600;
|
||||
|
||||
void init_pll(void)
|
||||
static void init_pll(void)
|
||||
{
|
||||
xprintf("FPGA PLL initialization: ");
|
||||
|
||||
wait_pll();
|
||||
* (volatile uint16_t *) (pll_base + 0x48) = 27; /* loopfilter r */
|
||||
* (volatile uint16_t *) (pll_base + 0x48) = 27; /* loopfilter r */
|
||||
|
||||
wait_pll();
|
||||
* (volatile uint16_t *) (pll_base + 0x08) = 1; /* charge pump 1 */
|
||||
@@ -530,13 +539,10 @@ void init_pll(void)
|
||||
xprintf("finished\r\n");
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* INIT VIDEO DDR RAM
|
||||
*/
|
||||
|
||||
void init_video_ddr(void) {
|
||||
static void init_video_ddr(void) {
|
||||
xprintf("init video RAM: ");
|
||||
|
||||
* (volatile uint16_t *) 0xf0000400 = 0xb; /* set cke = 1, cs=1, config = 1 */
|
||||
@@ -564,11 +570,11 @@ void init_video_ddr(void) {
|
||||
_VRAM = 0000070022; /* load MR dll on */
|
||||
NOP();
|
||||
|
||||
* (uint32_t *) 0xf0000400 = 0x01070002; /* fifo on, refresh on, ddrcs und cke on, video dac on */
|
||||
* (uint32_t *) 0xf0000400 = 0x01070082; /* fifo on, refresh on, ddrcs und cke on, video dac on, Falcon shift mode on */
|
||||
|
||||
xprintf("finished\r\n");
|
||||
}
|
||||
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
/*
|
||||
* probe for NEC compatible USB host controller and install if found
|
||||
@@ -582,53 +588,51 @@ void init_usb(void)
|
||||
int usb_found = 0;
|
||||
int index = 0;
|
||||
|
||||
xprintf("USB controller initialization:\r\n");
|
||||
inf("USB controller initialization:\r\n");
|
||||
|
||||
do
|
||||
{
|
||||
handle = pci_find_device(0x0000, 0xffff, index++);
|
||||
handle = pci_find_classcode(PCI_CLASS_SERIAL_USB | PCI_FIND_BASE_CLASS | PCI_FIND_SUB_CLASS, index++);
|
||||
dbg("handle 0x%02x\r\n", handle);
|
||||
if (handle > 0)
|
||||
{
|
||||
uint32_t id = 0;
|
||||
uint32_t class = 0;
|
||||
long id;
|
||||
long pci_class;
|
||||
|
||||
id = pci_read_config_longword(handle, PCIIDR);
|
||||
class = pci_read_config_longword(handle, PCIREV);
|
||||
xprintf("serial USB found at bus=0x%x, dev=0x%x, fnc=0x%x (0x%x)\r\n",
|
||||
PCI_BUS_FROM_HANDLE(handle),
|
||||
PCI_DEVICE_FROM_HANDLE(handle),
|
||||
PCI_FUNCTION_FROM_HANDLE(handle),
|
||||
handle);
|
||||
id = swpl(pci_read_config_longword(handle, PCIIDR));
|
||||
pci_class = swpl(pci_read_config_longword(handle, PCIREV));
|
||||
|
||||
if (PCI_CLASS_CODE(class) == PCI_CLASS_SERIAL_USB)
|
||||
if (pci_class >> 8 == PCI_CLASS_SERIAL_USB_EHCI)
|
||||
{
|
||||
xprintf("serial USB found at bus=0x%x, dev=0x%x, fnc=0x%x (0x%x)\r\n",
|
||||
PCI_BUS_FROM_HANDLE(handle),
|
||||
PCI_DEVICE_FROM_HANDLE(handle),
|
||||
PCI_FUNCTION_FROM_HANDLE(handle),
|
||||
handle);
|
||||
if (PCI_SUBCLASS(class) == PCI_CLASS_SERIAL_USB_EHCI)
|
||||
board = ehci_usb_pci_table;
|
||||
while (board->vendor)
|
||||
{
|
||||
board = ehci_usb_pci_table;
|
||||
while (board->vendor)
|
||||
if ((board->vendor == PCI_VENDOR_ID(id)) && board->device == PCI_DEVICE_ID(id))
|
||||
{
|
||||
if ((board->vendor == PCI_VENDOR_ID(id)) && board->device == PCI_DEVICE_ID(id))
|
||||
if (usb_init(handle, board) >= 0)
|
||||
{
|
||||
if (usb_init(handle, board) >= 0)
|
||||
{
|
||||
usb_found++;
|
||||
}
|
||||
usb_found++;
|
||||
}
|
||||
board++;
|
||||
}
|
||||
board++;
|
||||
}
|
||||
if (PCI_SUBCLASS(class) == PCI_CLASS_SERIAL_USB_OHCI)
|
||||
}
|
||||
if (pci_class >> 8 == PCI_CLASS_SERIAL_USB_OHCI)
|
||||
{
|
||||
board = ohci_usb_pci_table;
|
||||
while (board->vendor)
|
||||
{
|
||||
board = ohci_usb_pci_table;
|
||||
while (board->vendor)
|
||||
if ((board->vendor == PCI_VENDOR_ID(id)) && board->device == PCI_DEVICE_ID(id))
|
||||
{
|
||||
if ((board->vendor == PCI_VENDOR_ID(id)) && board->device == PCI_DEVICE_ID(id))
|
||||
{
|
||||
if (usb_init(handle, board) >= 0)
|
||||
usb_found++;
|
||||
}
|
||||
board++;
|
||||
if (usb_init(handle, board) >= 0)
|
||||
usb_found++;
|
||||
}
|
||||
board++;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -637,6 +641,8 @@ void init_usb(void)
|
||||
xprintf("finished (found %d USB controller(s))\r\n", usb_found);
|
||||
}
|
||||
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
|
||||
static bool i2c_transfer_finished(void)
|
||||
{
|
||||
if (MCF_I2C_I2SR & MCF_I2C_I2SR_IIF)
|
||||
@@ -659,7 +665,7 @@ static bool i2c_bus_free(void)
|
||||
/*
|
||||
* TFP410 (DVI) on
|
||||
*/
|
||||
void dvi_on(void)
|
||||
static void dvi_on(void)
|
||||
{
|
||||
uint8_t receivedByte;
|
||||
uint8_t dummyByte; /* only used for a dummy read */
|
||||
@@ -808,7 +814,7 @@ try_again:
|
||||
/*
|
||||
* AC97
|
||||
*/
|
||||
void init_ac97(void)
|
||||
static void init_ac97(void)
|
||||
{
|
||||
// PSC2: AC97 ----------
|
||||
int i;
|
||||
@@ -902,6 +908,7 @@ livo:
|
||||
MCF_PSC2_PSCTB_AC97 = 0x00000000; //last data
|
||||
xprintf(" finished\r\n");
|
||||
}
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
/* Symbols from the linker script */
|
||||
|
||||
@@ -929,22 +936,20 @@ extern uint8_t _BAS_RESIDENT_TEXT[];
|
||||
extern uint8_t _BAS_RESIDENT_TEXT_SIZE[];
|
||||
#define BAS_RESIDENT_TEXT_SIZE ((uint32_t) _BAS_RESIDENT_TEXT_SIZE)
|
||||
|
||||
void clear_bss_segment(void)
|
||||
static void clear_bss_segment(void)
|
||||
{
|
||||
extern uint8_t _BAS_BSS_START[];
|
||||
uint8_t * BAS_BSS_START = &_BAS_BSS_START[0];
|
||||
extern uint8_t _BAS_BSS_END[];
|
||||
uint8_t *BAS_BSS_END = &_BAS_BSS_END[0];
|
||||
|
||||
bzero(BAS_BSS_START, BAS_BSS_END - BAS_BSS_START - 1);
|
||||
bzero(BAS_BSS_START, BAS_BSS_END - BAS_BSS_START + 1);
|
||||
}
|
||||
|
||||
void initialize_hardware(void)
|
||||
{
|
||||
bool coldboot = true;
|
||||
|
||||
/* Test for FireTOS switch: DIP switch #5 up */
|
||||
#ifdef MACHINE_FIREBEE
|
||||
#ifdef _NOT_USED_ // #if defined(MACHINE_FIREBEE)
|
||||
if (!(DIP_SWITCH & (1 << 6))) {
|
||||
/* Minimal hardware initialization */
|
||||
init_gpio();
|
||||
@@ -962,6 +967,7 @@ void initialize_hardware(void)
|
||||
|
||||
/* TT-RAM */
|
||||
|
||||
xprintf("FASTRAM_END = %p\r\n", FASTRAM_END);
|
||||
* (uint32_t *) 0x5a4 = FASTRAM_END; /* ramtop TOS system variable */
|
||||
* (uint32_t *) 0x5a8 = 0x1357bd13; /* ramvalid TOS system variable */
|
||||
|
||||
@@ -977,7 +983,7 @@ void initialize_hardware(void)
|
||||
|
||||
xprintf("\n\n");
|
||||
xprintf("%s BASIS system (BaS) v %d.%d (%s, %s)\r\n\r\n",
|
||||
#if MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
"Firebee"
|
||||
#elif MACHINE_M5484LITE
|
||||
"m5484 LITEKIT"
|
||||
@@ -1047,18 +1053,33 @@ void initialize_hardware(void)
|
||||
break;
|
||||
}
|
||||
|
||||
/* make sure MMU is disabled */
|
||||
MCF_MMU_MMUCR = 0; /* MMU off */
|
||||
NOP(); /* force pipeline sync */
|
||||
|
||||
/*
|
||||
* Determine the processor revision
|
||||
*/
|
||||
xprintf(" (revision %d)\r\n", ((MCF_SIU_JTAGID & MCF_SIU_JTAGID_REV) >> 28));
|
||||
|
||||
/* make sure MMU is disabled */
|
||||
MCF_MMU_MMUCR = 0; /* MMU off */
|
||||
NOP(); /* force pipeline sync */
|
||||
|
||||
init_slt();
|
||||
init_fbcs();
|
||||
coldboot = init_ddram();
|
||||
init_ddram();
|
||||
|
||||
#if defined(MACHINE_M5484LITE)
|
||||
dbg("Fire Engine Control register: %02x\r\n", * (uint8_t *) 0x61000000);
|
||||
dbg("Fire Engine interrupt register: %02x\r\n", * (uint8_t *) 0x62000000);
|
||||
dbg("Fire Engine interrupt mask register: %02x\r\n", * (uint8_t *) 0x63000000);
|
||||
dbg("Fire Engine power management register: %02x\r\n", * (uint8_t *) 0x64000000);
|
||||
dbg("Fire Engine EEPROM SPI register: %02x\r\n", * (uint8_t *) 0x65000000);
|
||||
dbg("Fire Engine Flash register: %02x\r\n", * (uint8_t *) 0x66000000);
|
||||
dbg("Fire Engine CPLD revision register: %02x\r\n", * (uint8_t *) 0x67000000);
|
||||
dbg("Fire Engine Hardware revision register:%02x\r\n", * (uint8_t *) 0x68000000);
|
||||
|
||||
dbg("write control register 0x%02x\r\n", 1 << 7);
|
||||
* (uint8_t *) 0x61000000 = 1 << 7;
|
||||
dbg("Fire Engine Control register: %02x\r\n", * (uint8_t *) 0x61000000);
|
||||
#endif /* MACHINE_M5484LITE */
|
||||
|
||||
/*
|
||||
* install (preliminary) exception vectors
|
||||
@@ -1103,21 +1124,15 @@ void initialize_hardware(void)
|
||||
|
||||
}
|
||||
|
||||
#if MACHINE_FIREBEE
|
||||
if (coldboot) /* does not work with BDM */
|
||||
;
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
fpga_configured = init_fpga();
|
||||
|
||||
init_pll();
|
||||
init_video_ddr();
|
||||
dvi_on();
|
||||
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
driver_mem_init();
|
||||
|
||||
#if MACHINE_FIREBEE
|
||||
init_ac97();
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
driver_mem_init();
|
||||
|
||||
/* jump into the BaS */
|
||||
extern void BaS(void);
|
||||
|
||||
30
tos/Makefile
30
tos/Makefile
@@ -2,14 +2,36 @@
|
||||
.PHONY: jtagwait
|
||||
.PHONY: bascook
|
||||
.PHONY: vmem_test
|
||||
tos: jtagwait bascook vmem_test
|
||||
.PHONY: pci_test
|
||||
.PHONY: pci_mem
|
||||
.PHONY: fpga_test
|
||||
tos: jtagwait bascook vmem_test pci_test pci_mem fpga_test
|
||||
|
||||
jtagwait:
|
||||
(cd $@; make)
|
||||
@$(MAKE) -s -C $@
|
||||
|
||||
bascook:
|
||||
(cd $@; make)
|
||||
@$(MAKE) -s -C $@
|
||||
|
||||
vmem_test:
|
||||
(cd $@; make)
|
||||
@$(MAKE) -s -C $@
|
||||
|
||||
pci_test:
|
||||
@$(MAKE) -s -C $@
|
||||
|
||||
pci_mem:
|
||||
@$(MAKE) -s -C $@
|
||||
|
||||
fpga_test:
|
||||
@$(MAKE) -s -C $@
|
||||
|
||||
.PHONY: clean
|
||||
clean:
|
||||
@(cd jtagwait; $(MAKE) -s clean)
|
||||
@(cd bascook; $(MAKE) -s clean)
|
||||
@(cd vmem_test; $(MAKE) -s clean)
|
||||
@(cd pci_test; $(MAKE) -s clean)
|
||||
@(cd pci_mem; $(MAKE) -s clean)
|
||||
@(cd fpga_test; $(MAKE) -s clean)
|
||||
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user