Compare commits
301 Commits
R_0_8_3@10
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6
.gdbinit
6
.gdbinit
@@ -1,7 +1,9 @@
|
||||
#set disassemble-next-line on
|
||||
define tr
|
||||
#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
|
||||
target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
|
||||
#!killall m68k-bdm-gdbserver
|
||||
target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
|
||||
#target remote localhost:1234
|
||||
#target remote | m68k-bdm-gdbserver pipe /dev/tblcf1
|
||||
#target dbug /dev/ttyS0
|
||||
#monitor bdm-reset
|
||||
end
|
||||
|
||||
2
BaS_gcc.config
Normal file
2
BaS_gcc.config
Normal file
@@ -0,0 +1,2 @@
|
||||
// ADD PREDEFINED MACROS HERE!
|
||||
#define MACHINE_FIREBEE
|
||||
1
BaS_gcc.creator
Normal file
1
BaS_gcc.creator
Normal file
@@ -0,0 +1 @@
|
||||
[General]
|
||||
734
BaS_gcc.files
Normal file
734
BaS_gcc.files
Normal file
@@ -0,0 +1,734 @@
|
||||
dma/dma.c
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||||
dma/MCD_dmaApi.c
|
||||
dma/MCD_tasks.c
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||||
dma/MCD_tasksInit.c
|
||||
exe/basflash.c
|
||||
exe/basflash_start.c
|
||||
flash/flash.c
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||||
flash/s19reader.c
|
||||
fs/cc932.c
|
||||
fs/cc936.c
|
||||
fs/cc949.c
|
||||
fs/cc950.c
|
||||
fs/ccsbcs.c
|
||||
fs/ff.c
|
||||
fs/unicode.c
|
||||
if/driver_vec.c
|
||||
include/acia.h
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||||
include/am79c874.h
|
||||
include/arp.h
|
||||
include/ati_ids.h
|
||||
include/bas_printf.h
|
||||
include/bas_string.h
|
||||
include/bas_types.h
|
||||
include/bas_utils.h
|
||||
include/bcm5222.h
|
||||
include/bootp.h
|
||||
include/cache.h
|
||||
include/diskio.h
|
||||
include/dma.h
|
||||
include/driver_mem.h
|
||||
include/driver_vec.h
|
||||
include/edid.h
|
||||
include/ehci.h
|
||||
include/eth.h
|
||||
include/exceptions.h
|
||||
include/fb.h
|
||||
include/fec.h
|
||||
include/fecbd.h
|
||||
include/ff.h
|
||||
include/ffconf.h
|
||||
include/firebee.h
|
||||
include/font.h
|
||||
include/i2c-algo-bit.h
|
||||
include/i2c.h
|
||||
include/icmp.h
|
||||
include/ikbd.h
|
||||
include/interrupts.h
|
||||
include/ip.h
|
||||
include/m54455.h
|
||||
include/m5484l.h
|
||||
include/MCD_dma.h
|
||||
include/mcd_initiators.h
|
||||
include/MCD_progCheck.h
|
||||
include/MCD_tasksInit.h
|
||||
include/MCF5475.h
|
||||
include/MCF5475_CLOCK.h
|
||||
include/MCF5475_CTM.h
|
||||
include/MCF5475_DMA.h
|
||||
include/MCF5475_DSPI.h
|
||||
include/MCF5475_EPORT.h
|
||||
include/MCF5475_FBCS.h
|
||||
include/MCF5475_FEC.h
|
||||
include/MCF5475_GPIO.h
|
||||
include/MCF5475_GPT.h
|
||||
include/MCF5475_I2C.h
|
||||
include/MCF5475_INTC.h
|
||||
include/MCF5475_MMU.h
|
||||
include/MCF5475_PAD.h
|
||||
include/MCF5475_PCI.h
|
||||
include/MCF5475_PCIARB.h
|
||||
include/MCF5475_PSC.h
|
||||
include/MCF5475_SDRAMC.h
|
||||
include/MCF5475_SEC.h
|
||||
include/MCF5475_SIU.h
|
||||
include/MCF5475_SLT.h
|
||||
include/MCF5475_SRAM.h
|
||||
include/MCF5475_USB.h
|
||||
include/MCF5475_XLB.h
|
||||
include/mmu.h
|
||||
include/mod_devicetable.h
|
||||
include/nbuf.h
|
||||
include/net.h
|
||||
include/net_timer.h
|
||||
include/nif.h
|
||||
include/ohci.h
|
||||
include/part.h
|
||||
include/pci.h
|
||||
include/pci_ids.h
|
||||
include/queue.h
|
||||
include/radeon_reg.h
|
||||
include/radeonfb.h
|
||||
include/s19reader.h
|
||||
include/screen.h
|
||||
include/sd_card.h
|
||||
include/startcf.h
|
||||
include/sysinit.h
|
||||
include/tftp.h
|
||||
include/udp.h
|
||||
include/usb.h
|
||||
include/usb_defs.h
|
||||
include/usb_hub.h
|
||||
include/user_io.h
|
||||
include/util.h
|
||||
include/version.h
|
||||
include/videl.h
|
||||
include/video.h
|
||||
include/wait.h
|
||||
include/x86debug.h
|
||||
include/x86decode.h
|
||||
include/x86emu.h
|
||||
include/x86emui.h
|
||||
include/x86fpu.h
|
||||
include/x86fpu_regs.h
|
||||
include/x86ops.h
|
||||
include/x86pcibios.h
|
||||
include/x86prim_asm.h
|
||||
include/x86prim_ops.h
|
||||
include/x86regs.h
|
||||
include/xhdi_sd.h
|
||||
kbd/ikbd.c
|
||||
net/am79c874.c
|
||||
net/arp.c
|
||||
net/bcm5222.c
|
||||
net/bootp.c
|
||||
net/fec.c
|
||||
net/fecbd.c
|
||||
net/ip.c
|
||||
net/nbuf.c
|
||||
net/net_timer.c
|
||||
net/nif.c
|
||||
net/queue.c
|
||||
net/tftp.c
|
||||
net/udp.c
|
||||
nutil/s19header.c
|
||||
pci/ehci-hcd.c
|
||||
pci/ohci-hcd.c
|
||||
pci/pci.c
|
||||
radeon/radeon_accel.c
|
||||
radeon/radeon_base.c
|
||||
radeon/radeon_cursor.c
|
||||
radeon/radeon_monitor.c
|
||||
spi/dspi.c
|
||||
spi/mmc.c
|
||||
spi/sd_card.c
|
||||
sys/BaS.c
|
||||
sys/cache.c
|
||||
sys/driver_mem.c
|
||||
sys/fault_vectors.c
|
||||
sys/init_fpga.c
|
||||
sys/interrupts.c
|
||||
sys/mmu.c
|
||||
sys/sysinit.c
|
||||
tos/bascook/sources/bascook.c
|
||||
tos/jtagwait/include/bas_printf.h
|
||||
tos/jtagwait/include/bas_string.h
|
||||
tos/jtagwait/include/driver_vec.h
|
||||
tos/jtagwait/include/MCF5475.h
|
||||
tos/jtagwait/include/MCF5475_CLOCK.h
|
||||
tos/jtagwait/include/MCF5475_CTM.h
|
||||
tos/jtagwait/include/MCF5475_DMA.h
|
||||
tos/jtagwait/include/MCF5475_DSPI.h
|
||||
tos/jtagwait/include/MCF5475_EPORT.h
|
||||
tos/jtagwait/include/MCF5475_FBCS.h
|
||||
tos/jtagwait/include/MCF5475_FEC.h
|
||||
tos/jtagwait/include/MCF5475_GPIO.h
|
||||
tos/jtagwait/include/MCF5475_GPT.h
|
||||
tos/jtagwait/include/MCF5475_I2C.h
|
||||
tos/jtagwait/include/MCF5475_INTC.h
|
||||
tos/jtagwait/include/MCF5475_MMU.h
|
||||
tos/jtagwait/include/MCF5475_PAD.h
|
||||
tos/jtagwait/include/MCF5475_PCI.h
|
||||
tos/jtagwait/include/MCF5475_PCIARB.h
|
||||
tos/jtagwait/include/MCF5475_PSC.h
|
||||
tos/jtagwait/include/MCF5475_SDRAMC.h
|
||||
tos/jtagwait/include/MCF5475_SEC.h
|
||||
tos/jtagwait/include/MCF5475_SIU.h
|
||||
tos/jtagwait/include/MCF5475_SLT.h
|
||||
tos/jtagwait/include/MCF5475_SRAM.h
|
||||
tos/jtagwait/include/MCF5475_USB.h
|
||||
tos/jtagwait/include/MCF5475_XLB.h
|
||||
tos/jtagwait/sources/jtagwait.c
|
||||
usb/usb.c
|
||||
usb/usb_hub.c
|
||||
usb/usb_kbd.c
|
||||
tos/jtagwait/sources/bas_printf.c
|
||||
tos/jtagwait/sources/bas_string.c
|
||||
tos/vmem_test/Makefile
|
||||
sys/startcf.S
|
||||
sys/exceptions.S
|
||||
util/bas_printf.c
|
||||
util/bas_string.c
|
||||
util/printf_helper.S
|
||||
util/wait.c
|
||||
bas.lk.in
|
||||
i2c/i2c.c
|
||||
Makefile
|
||||
x86emu/x86biosemu.c
|
||||
x86emu/x86emu.c
|
||||
x86emu/x86pcibios.c
|
||||
util/libgcc_helper.S
|
||||
util/setjmp.c
|
||||
util/setjmp.S
|
||||
include/x86emu_regs.h
|
||||
x86emu/x86emu_util.c
|
||||
include/setjmp.h
|
||||
video/video.c
|
||||
video/fbmem.c
|
||||
video/fbmodedb.c
|
||||
video/fbmon.c
|
||||
video/fnt_st_8x16.c
|
||||
video/offscreen.c
|
||||
video/vdi_fill.c
|
||||
video/videl.c
|
||||
video/video.c
|
||||
tos/jtagwait/Makefile
|
||||
tos/Makefile
|
||||
dma/dma.c
|
||||
dma/MCD_dmaApi.c
|
||||
dma/MCD_tasks.c
|
||||
dma/MCD_tasksInit.c
|
||||
exe/basflash.c
|
||||
exe/basflash_start.c
|
||||
firebee/bas.elf
|
||||
firebee/bas.lk
|
||||
firebee/bas.map
|
||||
firebee/bas.s19
|
||||
firebee/basflash.elf
|
||||
firebee/basflash.map
|
||||
firebee/basflash.s19
|
||||
firebee/bashflash.lk
|
||||
firebee/depend
|
||||
firebee/ram.elf
|
||||
firebee/ram.lk
|
||||
firebee/ram.s19
|
||||
flash/flash.c
|
||||
flash/s19reader.c
|
||||
flash_scripts/flash_firebee_bas.bdm
|
||||
flash_scripts/flash_firebee_etos.bdm
|
||||
flash_scripts/flash_firebee_firetos.bdm
|
||||
flash_scripts/flash_firebee_fpga.bdm
|
||||
flash_scripts/flash_m548x_bas.bdm
|
||||
flash_scripts/flash_m548x_dbug.bdm
|
||||
flash_scripts/flash_m548x_etos.bdm
|
||||
fs/cc932.c
|
||||
fs/cc936.c
|
||||
fs/cc949.c
|
||||
fs/cc950.c
|
||||
fs/ccsbcs.c
|
||||
fs/ff.c
|
||||
fs/unicode.c
|
||||
i2c/i2c.c
|
||||
if/driver_vec.c
|
||||
include/acia.h
|
||||
include/am79c874.h
|
||||
include/arp.h
|
||||
include/ati_ids.h
|
||||
include/bas_printf.h
|
||||
include/bas_string.h
|
||||
include/bas_types.h
|
||||
include/bas_utils.h
|
||||
include/bcm5222.h
|
||||
include/bootp.h
|
||||
include/cache.h
|
||||
include/diskio.h
|
||||
include/dma.h
|
||||
include/driver_mem.h
|
||||
include/driver_vec.h
|
||||
include/edid.h
|
||||
include/ehci.h
|
||||
include/eth.h
|
||||
include/exceptions.h
|
||||
include/fb.h
|
||||
include/fec.h
|
||||
include/fecbd.h
|
||||
include/ff.h
|
||||
include/ffconf.h
|
||||
include/firebee.h
|
||||
include/font.h
|
||||
include/i2c-algo-bit.h
|
||||
include/i2c.h
|
||||
include/icmp.h
|
||||
include/ikbd.h
|
||||
include/interrupts.h
|
||||
include/ip.h
|
||||
include/m54455.h
|
||||
include/m5484l.h
|
||||
include/MCD_dma.h
|
||||
include/mcd_initiators.h
|
||||
include/MCD_progCheck.h
|
||||
include/MCD_tasksInit.h
|
||||
include/MCF5475.h
|
||||
include/MCF5475_CLOCK.h
|
||||
include/MCF5475_CTM.h
|
||||
include/MCF5475_DMA.h
|
||||
include/MCF5475_DSPI.h
|
||||
include/MCF5475_EPORT.h
|
||||
include/MCF5475_FBCS.h
|
||||
include/MCF5475_FEC.h
|
||||
include/MCF5475_GPIO.h
|
||||
include/MCF5475_GPT.h
|
||||
include/MCF5475_I2C.h
|
||||
include/MCF5475_INTC.h
|
||||
include/MCF5475_MMU.h
|
||||
include/MCF5475_PAD.h
|
||||
include/MCF5475_PCI.h
|
||||
include/MCF5475_PCIARB.h
|
||||
include/MCF5475_PSC.h
|
||||
include/MCF5475_SDRAMC.h
|
||||
include/MCF5475_SEC.h
|
||||
include/MCF5475_SIU.h
|
||||
include/MCF5475_SLT.h
|
||||
include/MCF5475_SRAM.h
|
||||
include/MCF5475_USB.h
|
||||
include/MCF5475_XLB.h
|
||||
include/mmu.h
|
||||
include/mod_devicetable.h
|
||||
include/nbuf.h
|
||||
include/net.h
|
||||
include/net_timer.h
|
||||
include/nif.h
|
||||
include/ohci.h
|
||||
include/part.h
|
||||
include/pci.h
|
||||
include/pci_ids.h
|
||||
include/queue.h
|
||||
include/radeon_reg.h
|
||||
include/radeonfb.h
|
||||
include/s19reader.h
|
||||
include/screen.h
|
||||
include/sd_card.h
|
||||
include/setjmp.h
|
||||
include/startcf.h
|
||||
include/sysinit.h
|
||||
include/tftp.h
|
||||
include/udp.h
|
||||
include/usb.h
|
||||
include/usb_defs.h
|
||||
include/usb_hub.h
|
||||
include/user_io.h
|
||||
include/util.h
|
||||
include/version.h
|
||||
include/videl.h
|
||||
include/video.h
|
||||
include/wait.h
|
||||
include/x86emu.h
|
||||
include/x86emu_regs.h
|
||||
include/x86pcibios.h
|
||||
include/xhdi_sd.h
|
||||
kbd/ikbd.c
|
||||
m54455/bas.elf
|
||||
m54455/bas.lk
|
||||
m54455/bas.map
|
||||
m54455/bas.s19
|
||||
m54455/basflash.elf
|
||||
m54455/basflash.map
|
||||
m54455/basflash.s19
|
||||
m54455/bashflash.lk
|
||||
m54455/depend
|
||||
m54455/ram.elf
|
||||
m54455/ram.lk
|
||||
m54455/ram.s19
|
||||
m5484lite/bas.elf
|
||||
m5484lite/bas.lk
|
||||
m5484lite/bas.map
|
||||
m5484lite/bas.s19
|
||||
m5484lite/basflash.elf
|
||||
m5484lite/basflash.map
|
||||
m5484lite/basflash.s19
|
||||
m5484lite/bashflash.lk
|
||||
m5484lite/depend
|
||||
m5484lite/ram.elf
|
||||
m5484lite/ram.lk
|
||||
m5484lite/ram.s19
|
||||
net/am79c874.c
|
||||
net/arp.c
|
||||
net/bcm5222.c
|
||||
net/bootp.c
|
||||
net/fec.c
|
||||
net/fecbd.c
|
||||
net/ip.c
|
||||
net/nbuf.c
|
||||
net/net_timer.c
|
||||
net/nif.c
|
||||
net/queue.c
|
||||
net/tftp.c
|
||||
net/udp.c
|
||||
nutil/s19header.c
|
||||
pci/ehci-hcd.c
|
||||
pci/ohci-hcd.c
|
||||
pci/pci.c
|
||||
pci/pci_wrappers.S
|
||||
radeon/radeon_accel.c
|
||||
radeon/radeon_base.c
|
||||
radeon/radeon_cursor.c
|
||||
radeon/radeon_monitor.c
|
||||
spi/dspi.c
|
||||
spi/mmc.c
|
||||
spi/sd_card.c
|
||||
sys/BaS.c
|
||||
sys/cache.c
|
||||
sys/driver_mem.c
|
||||
sys/exceptions.S
|
||||
sys/fault_vectors.c
|
||||
sys/init_fpga.c
|
||||
sys/interrupts.c
|
||||
sys/mmu.c
|
||||
sys/startcf.S
|
||||
sys/sysinit.c
|
||||
tos/bascook/sources/bascook.c
|
||||
tos/bascook/bascook.prg
|
||||
tos/bascook/depend
|
||||
tos/bascook/Makefile
|
||||
tos/bascook/mapfile
|
||||
tos/jtagwait/include/bas_printf.h
|
||||
tos/jtagwait/include/bas_string.h
|
||||
tos/jtagwait/include/driver_vec.h
|
||||
tos/jtagwait/include/MCF5475.h
|
||||
tos/jtagwait/include/MCF5475_CLOCK.h
|
||||
tos/jtagwait/include/MCF5475_CTM.h
|
||||
tos/jtagwait/include/MCF5475_DMA.h
|
||||
tos/jtagwait/include/MCF5475_DSPI.h
|
||||
tos/jtagwait/include/MCF5475_EPORT.h
|
||||
tos/jtagwait/include/MCF5475_FBCS.h
|
||||
tos/jtagwait/include/MCF5475_FEC.h
|
||||
tos/jtagwait/include/MCF5475_GPIO.h
|
||||
tos/jtagwait/include/MCF5475_GPT.h
|
||||
tos/jtagwait/include/MCF5475_I2C.h
|
||||
tos/jtagwait/include/MCF5475_INTC.h
|
||||
tos/jtagwait/include/MCF5475_MMU.h
|
||||
tos/jtagwait/include/MCF5475_PAD.h
|
||||
tos/jtagwait/include/MCF5475_PCI.h
|
||||
tos/jtagwait/include/MCF5475_PCIARB.h
|
||||
tos/jtagwait/include/MCF5475_PSC.h
|
||||
tos/jtagwait/include/MCF5475_SDRAMC.h
|
||||
tos/jtagwait/include/MCF5475_SEC.h
|
||||
tos/jtagwait/include/MCF5475_SIU.h
|
||||
tos/jtagwait/include/MCF5475_SLT.h
|
||||
tos/jtagwait/include/MCF5475_SRAM.h
|
||||
tos/jtagwait/include/MCF5475_USB.h
|
||||
tos/jtagwait/include/MCF5475_XLB.h
|
||||
tos/jtagwait/m5475/mshort/jtagwait.prg
|
||||
tos/jtagwait/m5475/jtagwait.prg
|
||||
tos/jtagwait/sources/bas_printf.c
|
||||
tos/jtagwait/sources/bas_string.c
|
||||
tos/jtagwait/sources/jtagwait.c
|
||||
tos/jtagwait/sources/printf_helper.S
|
||||
tos/jtagwait/depend
|
||||
tos/jtagwait/jtagwait.config
|
||||
tos/jtagwait/jtagwait.creator
|
||||
tos/jtagwait/jtagwait.creator.user
|
||||
tos/jtagwait/jtagwait.files
|
||||
tos/jtagwait/jtagwait.includes
|
||||
tos/jtagwait/Makefile
|
||||
tos/jtagwait/mapfile
|
||||
tos/pci_test/include/bas_printf.h
|
||||
tos/pci_test/include/bas_string.h
|
||||
tos/pci_test/include/driver_vec.h
|
||||
tos/pci_test/include/MCF5475.h
|
||||
tos/pci_test/include/MCF5475_CLOCK.h
|
||||
tos/pci_test/include/MCF5475_CTM.h
|
||||
tos/pci_test/include/MCF5475_DMA.h
|
||||
tos/pci_test/include/MCF5475_DSPI.h
|
||||
tos/pci_test/include/MCF5475_EPORT.h
|
||||
tos/pci_test/include/MCF5475_FBCS.h
|
||||
tos/pci_test/include/MCF5475_FEC.h
|
||||
tos/pci_test/include/MCF5475_GPIO.h
|
||||
tos/pci_test/include/MCF5475_GPT.h
|
||||
tos/pci_test/include/MCF5475_I2C.h
|
||||
tos/pci_test/include/MCF5475_INTC.h
|
||||
tos/pci_test/include/MCF5475_MMU.h
|
||||
tos/pci_test/include/MCF5475_PAD.h
|
||||
tos/pci_test/include/MCF5475_PCI.h
|
||||
tos/pci_test/include/MCF5475_PCIARB.h
|
||||
tos/pci_test/include/MCF5475_PSC.h
|
||||
tos/pci_test/include/MCF5475_SDRAMC.h
|
||||
tos/pci_test/include/MCF5475_SEC.h
|
||||
tos/pci_test/include/MCF5475_SIU.h
|
||||
tos/pci_test/include/MCF5475_SLT.h
|
||||
tos/pci_test/include/MCF5475_SRAM.h
|
||||
tos/pci_test/include/MCF5475_USB.h
|
||||
tos/pci_test/include/MCF5475_XLB.h
|
||||
tos/pci_test/m5475/mshort/pci_test.prg
|
||||
tos/pci_test/m5475/pci_test.prg
|
||||
tos/pci_test/sources/bas_printf.c
|
||||
tos/pci_test/sources/bas_string.c
|
||||
tos/pci_test/sources/pci_test.c
|
||||
tos/pci_test/sources/printf_helper.S
|
||||
tos/pci_test/depend
|
||||
tos/pci_test/Makefile
|
||||
tos/pci_test/mapfile
|
||||
tos/pci_test/pci_test.config
|
||||
tos/pci_test/pci_test.creator
|
||||
tos/pci_test/pci_test.files
|
||||
tos/pci_test/pci_test.includes
|
||||
tos/vmem_test/include/bas_printf.h
|
||||
tos/vmem_test/include/bas_string.h
|
||||
tos/vmem_test/include/driver_vec.h
|
||||
tos/vmem_test/include/MCF5475.h
|
||||
tos/vmem_test/include/MCF5475_CLOCK.h
|
||||
tos/vmem_test/include/MCF5475_CTM.h
|
||||
tos/vmem_test/include/MCF5475_DMA.h
|
||||
tos/vmem_test/include/MCF5475_DSPI.h
|
||||
tos/vmem_test/include/MCF5475_EPORT.h
|
||||
tos/vmem_test/include/MCF5475_FBCS.h
|
||||
tos/vmem_test/include/MCF5475_FEC.h
|
||||
tos/vmem_test/include/MCF5475_GPIO.h
|
||||
tos/vmem_test/include/MCF5475_GPT.h
|
||||
tos/vmem_test/include/MCF5475_I2C.h
|
||||
tos/vmem_test/include/MCF5475_INTC.h
|
||||
tos/vmem_test/include/MCF5475_MMU.h
|
||||
tos/vmem_test/include/MCF5475_PAD.h
|
||||
tos/vmem_test/include/MCF5475_PCI.h
|
||||
tos/vmem_test/include/MCF5475_PCIARB.h
|
||||
tos/vmem_test/include/MCF5475_PSC.h
|
||||
tos/vmem_test/include/MCF5475_SDRAMC.h
|
||||
tos/vmem_test/include/MCF5475_SEC.h
|
||||
tos/vmem_test/include/MCF5475_SIU.h
|
||||
tos/vmem_test/include/MCF5475_SLT.h
|
||||
tos/vmem_test/include/MCF5475_SRAM.h
|
||||
tos/vmem_test/include/MCF5475_USB.h
|
||||
tos/vmem_test/include/MCF5475_XLB.h
|
||||
tos/vmem_test/m5475/mshort/vmem_test.prg
|
||||
tos/vmem_test/m5475/vmem_test.prg
|
||||
tos/vmem_test/Makefile
|
||||
tos/vmem_test/mapfile
|
||||
tos/vmem_test/vmem_test.config
|
||||
tos/vmem_test/vmem_test.creator
|
||||
tos/vmem_test/vmem_test.files
|
||||
tos/vmem_test/vmem_test.includes
|
||||
tos/Makefile
|
||||
usb/usb.c
|
||||
usb/usb_hub.c
|
||||
usb/usb_kbd.c
|
||||
usb/usb_mouse.c
|
||||
util/bas_printf.c
|
||||
util/bas_string.c
|
||||
util/libgcc_helper.S
|
||||
util/printf_helper.S
|
||||
util/setjmp.S
|
||||
util/wait.c
|
||||
video/fbmem.c
|
||||
video/fbmodedb.c
|
||||
video/fbmon.c
|
||||
video/fnt_st_8x16.c
|
||||
video/offscreen.c
|
||||
video/vdi_fill.c
|
||||
video/videl.c
|
||||
video/video.c
|
||||
x86emu/x86biosemu.c
|
||||
x86emu/x86emu.c
|
||||
x86emu/x86emu_util.c
|
||||
x86emu/x86pcibios.c
|
||||
xhdi/xhdi_interface.c
|
||||
xhdi/xhdi_sd.c
|
||||
xhdi/xhdi_vec.S
|
||||
bas.lk.in
|
||||
bas_firebee.bdm
|
||||
BaS_gcc.config
|
||||
BaS_gcc.creator
|
||||
BaS_gcc.creator.user
|
||||
BaS_gcc.creator.user.3.2-pre1
|
||||
BaS_gcc.creator.user.ori
|
||||
BaS_gcc.files
|
||||
BaS_gcc.includes
|
||||
bas_m5484.bdm
|
||||
basflash.lk.in
|
||||
check.bdm
|
||||
COPYING
|
||||
COPYING.LESSER
|
||||
Doxyfile
|
||||
dump.bdm
|
||||
Makefile
|
||||
mcf5474.gdb
|
||||
svn-commit.tmp
|
||||
tos/pci_test/include/bas_printf.h
|
||||
tos/pci_test/include/bas_string.h
|
||||
tos/pci_test/include/driver_vec.h
|
||||
tos/pci_test/include/MCF5475_CLOCK.h
|
||||
tos/pci_test/include/MCF5475_CTM.h
|
||||
tos/pci_test/include/MCF5475_DMA.h
|
||||
tos/pci_test/include/MCF5475_DSPI.h
|
||||
tos/pci_test/include/MCF5475_EPORT.h
|
||||
tos/pci_test/include/MCF5475_FBCS.h
|
||||
tos/pci_test/include/MCF5475_FEC.h
|
||||
tos/pci_test/include/MCF5475_GPIO.h
|
||||
tos/pci_test/include/MCF5475_GPT.h
|
||||
tos/pci_test/include/MCF5475_I2C.h
|
||||
tos/pci_test/include/MCF5475_INTC.h
|
||||
tos/pci_test/include/MCF5475_MMU.h
|
||||
tos/pci_test/include/MCF5475_PAD.h
|
||||
tos/pci_test/include/MCF5475_PCI.h
|
||||
tos/pci_test/include/MCF5475_PCIARB.h
|
||||
tos/pci_test/include/MCF5475_PSC.h
|
||||
tos/pci_test/include/MCF5475_SDRAMC.h
|
||||
tos/pci_test/include/MCF5475_SEC.h
|
||||
tos/pci_test/include/MCF5475_SIU.h
|
||||
tos/pci_test/include/MCF5475_SLT.h
|
||||
tos/pci_test/include/MCF5475_SRAM.h
|
||||
tos/pci_test/include/MCF5475_USB.h
|
||||
tos/pci_test/include/MCF5475_XLB.h
|
||||
tos/pci_test/include/MCF5475.h
|
||||
tos/pci_test/include/pci.h
|
||||
memory_map.txt
|
||||
pci/pci_errata.c
|
||||
include/pci_errata.h
|
||||
tos/bascook/sources/bascook.c
|
||||
tos/bascook/Makefile
|
||||
tos/fpga_test/include/bas_printf.h
|
||||
tos/fpga_test/include/bas_string.h
|
||||
tos/fpga_test/include/driver_vec.h
|
||||
tos/fpga_test/include/MCF5475.h
|
||||
tos/fpga_test/include/MCF5475_CLOCK.h
|
||||
tos/fpga_test/include/MCF5475_CTM.h
|
||||
tos/fpga_test/include/MCF5475_DMA.h
|
||||
tos/fpga_test/include/MCF5475_DSPI.h
|
||||
tos/fpga_test/include/MCF5475_EPORT.h
|
||||
tos/fpga_test/include/MCF5475_FBCS.h
|
||||
tos/fpga_test/include/MCF5475_FEC.h
|
||||
tos/fpga_test/include/MCF5475_GPIO.h
|
||||
tos/fpga_test/include/MCF5475_GPT.h
|
||||
tos/fpga_test/include/MCF5475_I2C.h
|
||||
tos/fpga_test/include/MCF5475_INTC.h
|
||||
tos/fpga_test/include/MCF5475_MMU.h
|
||||
tos/fpga_test/include/MCF5475_PAD.h
|
||||
tos/fpga_test/include/MCF5475_PCI.h
|
||||
tos/fpga_test/include/MCF5475_PCIARB.h
|
||||
tos/fpga_test/include/MCF5475_PSC.h
|
||||
tos/fpga_test/include/MCF5475_SDRAMC.h
|
||||
tos/fpga_test/include/MCF5475_SEC.h
|
||||
tos/fpga_test/include/MCF5475_SIU.h
|
||||
tos/fpga_test/include/MCF5475_SLT.h
|
||||
tos/fpga_test/include/MCF5475_SRAM.h
|
||||
tos/fpga_test/include/MCF5475_USB.h
|
||||
tos/fpga_test/include/MCF5475_XLB.h
|
||||
tos/fpga_test/sources/bas_printf.c
|
||||
tos/fpga_test/sources/bas_string.c
|
||||
tos/fpga_test/sources/printf_helper.S
|
||||
tos/fpga_test/Makefile
|
||||
tos/jtagwait/include/bas_printf.h
|
||||
tos/jtagwait/include/bas_string.h
|
||||
tos/jtagwait/include/driver_vec.h
|
||||
tos/jtagwait/include/MCF5475.h
|
||||
tos/jtagwait/include/MCF5475_CLOCK.h
|
||||
tos/jtagwait/include/MCF5475_CTM.h
|
||||
tos/jtagwait/include/MCF5475_DMA.h
|
||||
tos/jtagwait/include/MCF5475_DSPI.h
|
||||
tos/jtagwait/include/MCF5475_EPORT.h
|
||||
tos/jtagwait/include/MCF5475_FBCS.h
|
||||
tos/jtagwait/include/MCF5475_FEC.h
|
||||
tos/jtagwait/include/MCF5475_GPIO.h
|
||||
tos/jtagwait/include/MCF5475_GPT.h
|
||||
tos/jtagwait/include/MCF5475_I2C.h
|
||||
tos/jtagwait/include/MCF5475_INTC.h
|
||||
tos/jtagwait/include/MCF5475_MMU.h
|
||||
tos/jtagwait/include/MCF5475_PAD.h
|
||||
tos/jtagwait/include/MCF5475_PCI.h
|
||||
tos/jtagwait/include/MCF5475_PCIARB.h
|
||||
tos/jtagwait/include/MCF5475_PSC.h
|
||||
tos/jtagwait/include/MCF5475_SDRAMC.h
|
||||
tos/jtagwait/include/MCF5475_SEC.h
|
||||
tos/jtagwait/include/MCF5475_SIU.h
|
||||
tos/jtagwait/include/MCF5475_SLT.h
|
||||
tos/jtagwait/include/MCF5475_SRAM.h
|
||||
tos/jtagwait/include/MCF5475_USB.h
|
||||
tos/jtagwait/include/MCF5475_XLB.h
|
||||
tos/jtagwait/sources/bas_printf.c
|
||||
tos/jtagwait/sources/bas_string.c
|
||||
tos/jtagwait/sources/jtagwait.c
|
||||
tos/jtagwait/sources/printf_helper.S
|
||||
tos/jtagwait/Makefile
|
||||
tos/pci_test/include/bas_printf.h
|
||||
tos/pci_test/include/bas_string.h
|
||||
tos/pci_test/include/driver_vec.h
|
||||
tos/pci_test/include/MCF5475.h
|
||||
tos/pci_test/include/MCF5475_CLOCK.h
|
||||
tos/pci_test/include/MCF5475_CTM.h
|
||||
tos/pci_test/include/MCF5475_DMA.h
|
||||
tos/pci_test/include/MCF5475_DSPI.h
|
||||
tos/pci_test/include/MCF5475_EPORT.h
|
||||
tos/pci_test/include/MCF5475_FBCS.h
|
||||
tos/pci_test/include/MCF5475_FEC.h
|
||||
tos/pci_test/include/MCF5475_GPIO.h
|
||||
tos/pci_test/include/MCF5475_GPT.h
|
||||
tos/pci_test/include/MCF5475_I2C.h
|
||||
tos/pci_test/include/MCF5475_INTC.h
|
||||
tos/pci_test/include/MCF5475_MMU.h
|
||||
tos/pci_test/include/MCF5475_PAD.h
|
||||
tos/pci_test/include/MCF5475_PCI.h
|
||||
tos/pci_test/include/MCF5475_PCIARB.h
|
||||
tos/pci_test/include/MCF5475_PSC.h
|
||||
tos/pci_test/include/MCF5475_SDRAMC.h
|
||||
tos/pci_test/include/MCF5475_SEC.h
|
||||
tos/pci_test/include/MCF5475_SIU.h
|
||||
tos/pci_test/include/MCF5475_SLT.h
|
||||
tos/pci_test/include/MCF5475_SRAM.h
|
||||
tos/pci_test/include/MCF5475_USB.h
|
||||
tos/pci_test/include/MCF5475_XLB.h
|
||||
tos/pci_test/include/pci.h
|
||||
tos/pci_test/sources/bas_printf.c
|
||||
tos/pci_test/sources/bas_string.c
|
||||
tos/pci_test/sources/pci_test.c
|
||||
tos/pci_test/sources/printf_helper.S
|
||||
tos/pci_test/Makefile
|
||||
tos/vmem_test/include/bas_printf.h
|
||||
tos/vmem_test/include/bas_string.h
|
||||
tos/vmem_test/include/driver_vec.h
|
||||
tos/vmem_test/include/MCF5475.h
|
||||
tos/vmem_test/include/MCF5475_CLOCK.h
|
||||
tos/vmem_test/include/MCF5475_CTM.h
|
||||
tos/vmem_test/include/MCF5475_DMA.h
|
||||
tos/vmem_test/include/MCF5475_DSPI.h
|
||||
tos/vmem_test/include/MCF5475_EPORT.h
|
||||
tos/vmem_test/include/MCF5475_FBCS.h
|
||||
tos/vmem_test/include/MCF5475_FEC.h
|
||||
tos/vmem_test/include/MCF5475_GPIO.h
|
||||
tos/vmem_test/include/MCF5475_GPT.h
|
||||
tos/vmem_test/include/MCF5475_I2C.h
|
||||
tos/vmem_test/include/MCF5475_INTC.h
|
||||
tos/vmem_test/include/MCF5475_MMU.h
|
||||
tos/vmem_test/include/MCF5475_PAD.h
|
||||
tos/vmem_test/include/MCF5475_PCI.h
|
||||
tos/vmem_test/include/MCF5475_PCIARB.h
|
||||
tos/vmem_test/include/MCF5475_PSC.h
|
||||
tos/vmem_test/include/MCF5475_SDRAMC.h
|
||||
tos/vmem_test/include/MCF5475_SEC.h
|
||||
tos/vmem_test/include/MCF5475_SIU.h
|
||||
tos/vmem_test/include/MCF5475_SLT.h
|
||||
tos/vmem_test/include/MCF5475_SRAM.h
|
||||
tos/vmem_test/include/MCF5475_USB.h
|
||||
tos/vmem_test/include/MCF5475_XLB.h
|
||||
tos/vmem_test/sources/fpga_test.c
|
||||
tos/vmem_test/Makefile
|
||||
tos/Makefile
|
||||
tos/fpga_test/sources/fpga_test.c
|
||||
49
BaS_gcc.includes
Normal file
49
BaS_gcc.includes
Normal file
@@ -0,0 +1,49 @@
|
||||
include
|
||||
tos/jtagwait/include
|
||||
tos/pci_test/include
|
||||
/usr/m68k-atari-mint/include
|
||||
/opt/cross-mint/m68k-atari-mint/include
|
||||
/opt/gygwin/opt/cross-mint/m68k-atari-mint/include
|
||||
dma
|
||||
m54455
|
||||
sys
|
||||
pci
|
||||
tos/pci_test
|
||||
tos/jtagwait/m5475/mshort
|
||||
m5484lite
|
||||
tos/pci_test/include
|
||||
tos/bascook
|
||||
tos/vmem_test/m5475/mshort
|
||||
i2c
|
||||
fs
|
||||
tos/vmem_test/m5475
|
||||
tos/pci_test/m5475
|
||||
spi
|
||||
if
|
||||
tos/jtagwait/m5475
|
||||
util
|
||||
kbd
|
||||
flash_scripts
|
||||
video
|
||||
usb
|
||||
exe
|
||||
tos/vmem_test/sources
|
||||
tos
|
||||
nutil
|
||||
tos/jtagwait/sources
|
||||
x86emu
|
||||
flash
|
||||
tos/vmem_test/include
|
||||
tos/bascook/sources
|
||||
tos/pci_test/m5475/mshort
|
||||
.
|
||||
radeon
|
||||
net
|
||||
xhdi
|
||||
tos/vmem_test
|
||||
tos/pci_test/sources
|
||||
firebee
|
||||
tos/jtagwait
|
||||
tos/fpga_test/include
|
||||
tos/fpga_test
|
||||
tos/fpga_test/sources
|
||||
121
Makefile
121
Makefile
@@ -1,8 +1,9 @@
|
||||
# # Makefile for Firebee BaS
|
||||
# Makefile for Firebee BaS
|
||||
#
|
||||
# This Makefile is meant for cross compiling the BaS with Vincent Riviere's cross compilers.
|
||||
# If you want to compile native on an Atari (you will need at least GCC 4.6.3), set
|
||||
# TCPREFIX to be empty.
|
||||
#
|
||||
# If you want to compile with the m68k-elf- toolchain, set TCPREFIX accordingly. Requires an extra
|
||||
# installation, but allows source level debugging over BDM with a recent gdb (tested with 7.5),
|
||||
# the m68k BDM tools from sourceforge (http://bdm.sourceforge.net) and a BDM pod (TBLCF and P&E tested).
|
||||
@@ -15,7 +16,7 @@ ifeq (Y,$(COMPILE_ELF))
|
||||
TCPREFIX=m68k-elf-
|
||||
EXE=elf
|
||||
FORMAT=elf32-m68k
|
||||
else
|
||||
else
|
||||
TCPREFIX=m68k-atari-mint-
|
||||
EXE=s19
|
||||
FORMAT=srec
|
||||
@@ -29,14 +30,22 @@ AR=$(TCPREFIX)ar
|
||||
RANLIB=$(TCPREFIX)ranlib
|
||||
NATIVECC=gcc
|
||||
|
||||
ifeq (Y,$(COMPILE_ELF))
|
||||
LDLIBS=-lgcc
|
||||
else
|
||||
LDLIBS=-lgcc
|
||||
endif
|
||||
|
||||
INCLUDE=-Iinclude
|
||||
CFLAGS=-mcpu=5474 \
|
||||
-Wall \
|
||||
-Os \
|
||||
-fomit-frame-pointer \
|
||||
-ffreestanding \
|
||||
-fleading-underscore \
|
||||
-Wa,--register-prefix-optional
|
||||
CFLAGS= -Wall \
|
||||
-O2 \
|
||||
-fomit-frame-pointer \
|
||||
-ffreestanding \
|
||||
-fleading-underscore \
|
||||
-Winline \
|
||||
-Wshadow \
|
||||
-Wa,--register-prefix-optional \
|
||||
-g2
|
||||
CFLAGS_OPTIMIZED = -mcpu=5474 \
|
||||
-Wall \
|
||||
-O2 \
|
||||
@@ -44,12 +53,13 @@ CFLAGS_OPTIMIZED = -mcpu=5474 \
|
||||
-ffreestanding \
|
||||
-fleading-underscore \
|
||||
-Wa,--register-prefix-optional
|
||||
LDFLAGS=
|
||||
|
||||
TRGTDIRS= ./firebee ./m5484lite
|
||||
TRGTDIRS= ./firebee ./m54455 ./m5484lite
|
||||
OBJDIRS=$(patsubst %, %/objs,$(TRGTDIRS))
|
||||
TOOLDIR=util
|
||||
|
||||
VPATH=dma exe flash fs if kbd pci spi sys usb net util video radeon x86emu xhdi
|
||||
VPATH=dma exe flash fs i2c if kbd pci spi sys usb net util video radeon x86emu xhdi
|
||||
|
||||
# Linker control file. The final $(LDCFILE) is intermediate only (preprocessed version of $(LDCSRC)
|
||||
LDCFILE=bas.lk
|
||||
@@ -82,19 +92,25 @@ CSRCS= \
|
||||
s19reader.c \
|
||||
flash.c \
|
||||
dma.c \
|
||||
i2c.c \
|
||||
xhdi_sd.c \
|
||||
xhdi_interface.c \
|
||||
pci.c \
|
||||
pci_errata.c \
|
||||
dspi.c \
|
||||
driver_vec.c \
|
||||
driver_mem.c \
|
||||
\
|
||||
MCD_dmaApi.c \
|
||||
MCD_tasks.c \
|
||||
MCD_tasksInit.c \
|
||||
\
|
||||
usb.c \
|
||||
ohci-hcd.c \
|
||||
ehci-hcd.c \
|
||||
usb_hub.c \
|
||||
usb_mouse.c \
|
||||
usb_kbd.c \
|
||||
ikbd.c \
|
||||
\
|
||||
nbuf.c \
|
||||
@@ -123,26 +139,28 @@ CSRCS= \
|
||||
radeon_accel.c \
|
||||
radeon_cursor.c \
|
||||
radeon_monitor.c \
|
||||
fnt_st_8x16.c \
|
||||
\
|
||||
x86decode.c \
|
||||
x86sys.c \
|
||||
x86debug.c \
|
||||
x86prim_ops.c \
|
||||
x86ops.c \
|
||||
x86ops2.c \
|
||||
x86fpu.c \
|
||||
x86biosemu.c \
|
||||
x86emu.c \
|
||||
x86pcibios.c \
|
||||
x86biosemu.c \
|
||||
x86emu_util.c \
|
||||
\
|
||||
basflash.c \
|
||||
basflash_start.c
|
||||
basflash_start.c
|
||||
|
||||
|
||||
ASRCS= \
|
||||
startcf.S \
|
||||
printf_helper.S \
|
||||
exceptions.S \
|
||||
xhdi_vec.S
|
||||
setjmp.S \
|
||||
xhdi_vec.S \
|
||||
pci_wrappers.S
|
||||
|
||||
ifeq (Y,$(COMPILE_ELF)) # needed for __ vs ___ kludge
|
||||
ASRCS += libgcc_helper.S
|
||||
endif
|
||||
|
||||
SRCS=$(ASRCS) $(CSRCS)
|
||||
COBJS=$(patsubst %.c,%.o,$(CSRCS))
|
||||
@@ -153,12 +171,18 @@ LIBBAS=libbas.a
|
||||
|
||||
LIBS=$(patsubst %,%/$(LIBBAS),$(TRGTDIRS))
|
||||
|
||||
all: fls ram bfl lib
|
||||
all: ver fls ram bfl lib tos
|
||||
fls: $(patsubst %,%/$(FLASH_EXEC),$(TRGTDIRS))
|
||||
ram: $(patsubst %,%/$(RAM_EXEC),$(TRGTDIRS))
|
||||
bfl: $(patsubst %,%/$(BASFLASH_EXEC),$(TRGTDIRS))
|
||||
lib: $(LIBS)
|
||||
|
||||
.PHONY: ver
|
||||
ver:
|
||||
touch include/version.h
|
||||
.PHONY: tos
|
||||
tos:
|
||||
(cd tos; $(MAKE))
|
||||
|
||||
.PHONY: clean
|
||||
clean:
|
||||
@@ -166,37 +190,39 @@ clean:
|
||||
do rm -f $$d/*.map $$d/*.s19 $$d/*.elf $$d/*.lk $$d/*.a $$d/objs/* $$d/depend;\
|
||||
done
|
||||
rm -f tags
|
||||
(cd tos; make clean)
|
||||
|
||||
|
||||
|
||||
# flags for targets
|
||||
m5484lite/bas.$(EXE): MACHINE=MACHINE_M5484LITE
|
||||
m54455/bas.$(EXE): MACHINE=MACHINE_M54455
|
||||
firebee/bas.$(EXE): MACHINE=MACHINE_FIREBEE
|
||||
|
||||
m5484lite/ram.$(EXE): MACHINE=MACHINE_M5484LITE
|
||||
m54455/ram.$(EXE): MACHINE=MACHINE_M54455
|
||||
firebee/ram.$(EXE): MACHINE=MACHINE_FIREBEE
|
||||
|
||||
m5484lite/basflash.$(EXE): MACHINE=MACHINE_M5484LITE
|
||||
m54455/basflash.$(EXE): MACHINE=MACHINE_M54455
|
||||
firebee/basflash.$(EXE): MACHINE=MACHINE_FIREBEE
|
||||
|
||||
m5484lite/bas.$(EXE): CFLAGS += -mcpu=5484
|
||||
m54455/bas.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
|
||||
firebee/bas.$(EXE): CFLAGS += -mcpu=5474
|
||||
|
||||
m5484lite/ram.$(EXE): CFLAGS += -mcpu=5484
|
||||
m54455/ram.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
|
||||
firebee/ram.$(EXE): CFLAGS += -mcpu=5474
|
||||
|
||||
m5484lite/basflash.$(EXE): CFLAGS += -mcpu=5484
|
||||
m54455/basflash.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
|
||||
firebee/basflash.$(EXE): CFLAGS += -mcpu=5474
|
||||
|
||||
#
|
||||
# generate pattern rules for different object files
|
||||
#
|
||||
define CC_TEMPLATE
|
||||
ifeq (firebee,$(1))
|
||||
MACHINE=MACHINE_FIREBEE
|
||||
else
|
||||
MACHINE=MACHINE_M5484LITE
|
||||
endif
|
||||
|
||||
# always optimize x86 emulator objects
|
||||
$(1)/objs/x86decode.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
$(1)/objs/x86sys.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
$(1)/objs/x86debug.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
$(1)/objs/x86prim_ops.o:CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
$(1)/objs/x86ops.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
$(1)/objs/x86ops2.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
$(1)/objs/x86fpu.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
$(1)/objs/x86biosemu.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
$(1)/objs/x86pcibios.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
|
||||
$(1)/objs/%.o:%.c
|
||||
$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
|
||||
|
||||
@@ -246,7 +272,8 @@ define EX_TEMPLATE
|
||||
$(1)_MAPFILE=$(1)/$$(basename $$(FLASH_EXEC)).map
|
||||
$(1)/$$(FLASH_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
|
||||
$(CPP) $(INCLUDE) -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDCFILE)
|
||||
$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE) --cref -T $(1)/$$(LDCFILE) -o $$@
|
||||
#$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE) --cref -T $(1)/$$(LDCFILE) $(LDLIBS) -o $$@
|
||||
$(CC) $$(CFLAGS) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDCFILE) $(LDLIBS) -o $$@
|
||||
ifeq ($(COMPILE_ELF),Y)
|
||||
$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
else
|
||||
@@ -257,7 +284,8 @@ endif
|
||||
$(1)_MAPFILE_RAM=$(1)/$$(basename $$(RAM_EXEC)).map
|
||||
$(1)/$$(RAM_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
|
||||
$(CPP) $(INCLUDE) -DCOMPILE_RAM -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDRFILE)
|
||||
$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) -o $$@
|
||||
#$(LD) $(LDFLAGS) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) $(LDLIBS) -o $$@
|
||||
$(CC) $$(CFLAGS) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE_RAM) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDRFILE) $(LDLIBS) -o $$@
|
||||
ifeq ($(COMPILE_ELF),Y)
|
||||
$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
else
|
||||
@@ -268,7 +296,8 @@ endif
|
||||
$(1)_MAPFILE_BFL=$(1)/$$(basename $$(BASFLASH_EXEC)).map
|
||||
$(1)/$$(BASFLASH_EXEC): $(1)/objs/basflash.o $(1)/objs/basflash_start.o $(1)/$(LIBBAS) $(LDCBFL)
|
||||
$(CPP) $(INCLUDE) -P -DOBJDIR=$(1)/objs -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCBSRC) -o $(1)/$$(LDCBFS)
|
||||
$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_BFL) --cref -T $(1)/$$(LDCFILE) -L$(1) -lbas -o $$@
|
||||
#$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_BFL) --cref -T $(1)/$$(LDCFILE) -L$(1) -lbas $(LDLIBS) -o $$@
|
||||
$(CC) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE_BFL) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDCFILE) -L$(1) -lbas $(LDLIBS) -o $$@
|
||||
ifeq ($(COMPILE_ELF),Y)
|
||||
$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
else
|
||||
@@ -280,21 +309,21 @@ $(foreach DIR,$(TRGTDIRS),$(eval $(call EX_TEMPLATE,$(DIR))))
|
||||
|
||||
indent: $(CSRCS)
|
||||
indent $<
|
||||
|
||||
|
||||
.PHONY: tags
|
||||
tags:
|
||||
ctags $(patsubst %,%/*,$(VPATH))
|
||||
|
||||
|
||||
.PHONY: printvars
|
||||
printvars:
|
||||
@$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
|
||||
ifeq (MACHINE_M5484LITE,$$(MACHINE))
|
||||
MNAME=m5484lite
|
||||
else ifeq (MACHINE_FIREBEE,$(MACHINE))
|
||||
MNAME=firebee
|
||||
MNAME=firebee
|
||||
endif
|
||||
|
||||
tools:
|
||||
$(NATIVECC) $(INCLUDE) -c $(TOOLDIR)/s19header.c -o $(TOOLDIR)/s19header.o
|
||||
$(NATIVECC) $(INCLUDE) -c $(TOOLDIR)/s19header.c -o $(TOOLDIR)/s19header.o
|
||||
$(NATIVECC) -o $(TOOLDIR)/s19header $(TOOLDIR)/s19header.o
|
||||
|
||||
|
||||
415
bas.lk.in
415
bas.lk.in
@@ -1,251 +1,278 @@
|
||||
#ifdef MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
#ifdef MACHINE_M5484LITE
|
||||
#include "m5484l.h"
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
# include "m5484l.h"
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
#error "unknown machine!"
|
||||
#endif /* MACHINE_M5484LITE */
|
||||
|
||||
/* make bas_rom access flags rx if compiling to RAM */
|
||||
#ifdef COMPILE_RAM
|
||||
#define ROMFLAGS WX
|
||||
#define ROMFLAGS WX
|
||||
#else
|
||||
#define ROMFLAGS RX
|
||||
#define ROMFLAGS RX
|
||||
#endif /* COMPILE_RAM */
|
||||
|
||||
MEMORY
|
||||
{
|
||||
bas_rom (ROMFLAGS) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000
|
||||
/*
|
||||
* target to copy BaS data segment to. 1M should be enough for now
|
||||
*/
|
||||
* target to copy BaS data segment to. 1M should be enough for now
|
||||
*/
|
||||
bas_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00200000, LENGTH = 0x00100000
|
||||
/*
|
||||
* driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
|
||||
*/
|
||||
*/
|
||||
driver_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00100000, LENGTH = 0x00100000
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* BaS in ROM */
|
||||
.text :
|
||||
{
|
||||
OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */
|
||||
/* BaS in ROM */
|
||||
.text :
|
||||
{
|
||||
OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */
|
||||
|
||||
OBJDIR/sysinit.o(.text)
|
||||
OBJDIR/fault_vectors.o(.text)
|
||||
OBJDIR/sysinit.o(.text)
|
||||
OBJDIR/fault_vectors.o(.text)
|
||||
#ifdef MACHINE_FIREBEE
|
||||
OBJDIR/init_fpga.o(.text)
|
||||
OBJDIR/init_fpga.o(.text)
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
OBJDIR/wait.o(.text)
|
||||
OBJDIR/exceptions.o(.text)
|
||||
OBJDIR/driver_vec.o(.text)
|
||||
OBJDIR/interrupts.o(.text)
|
||||
OBJDIR/mmu.o(.text)
|
||||
|
||||
OBJDIR/BaS.o(.text)
|
||||
OBJDIR/pci.o(.text)
|
||||
OBJDIR/usb.o(.text)
|
||||
OBJDIR/driver_mem.o(.text)
|
||||
OBJDIR/usb_mouse.o(.text)
|
||||
OBJDIR/ohci-hcd.o(.text)
|
||||
OBJDIR/ehci-hcd.o(.text)
|
||||
OBJDIR/wait.o(.text)
|
||||
OBJDIR/wait.o(.text)
|
||||
OBJDIR/exceptions.o(.text)
|
||||
OBJDIR/setjmp.o(.text)
|
||||
OBJDIR/driver_vec.o(.text)
|
||||
OBJDIR/interrupts.o(.text)
|
||||
OBJDIR/mmu.o(.text)
|
||||
|
||||
OBJDIR/nbuf.o(.text)
|
||||
OBJDIR/net_timer.o(.text)
|
||||
OBJDIR/queue.o(.text)
|
||||
OBJDIR/nif.o(.text)
|
||||
OBJDIR/fecbd.o(.text)
|
||||
OBJDIR/fec.o(.text)
|
||||
OBJDIR/am79c874.o(.text)
|
||||
OBJDIR/bcm5222.o(.text)
|
||||
OBJDIR/ip.o(.text)
|
||||
OBJDIR/udp.o(text)
|
||||
OBJDIR/bootp.o(text)
|
||||
OBJDIR/tftp.o(text)
|
||||
OBJDIR/arp.o(text)
|
||||
OBJDIR/BaS.o(.text)
|
||||
OBJDIR/pci.o(.text)
|
||||
. = ALIGN(16);
|
||||
OBJDIR/pci_errata.o(.text)
|
||||
OBJDIR/pci_wrappers.o(.text)
|
||||
OBJDIR/usb.o(.text)
|
||||
OBJDIR/driver_mem.o(.text)
|
||||
OBJDIR/usb_hub.o(.text)
|
||||
OBJDIR/usb_mouse.o(.text)
|
||||
OBJDIR/usb_kbd.o(.text)
|
||||
OBJDIR/ohci-hcd.o(.text)
|
||||
OBJDIR/ehci-hcd.o(.text)
|
||||
OBJDIR/wait.o(.text)
|
||||
|
||||
OBJDIR/unicode.o(.text)
|
||||
OBJDIR/mmc.o(.text)
|
||||
OBJDIR/ff.o(.text)
|
||||
OBJDIR/sd_card.o(.text)
|
||||
OBJDIR/s19reader.o(.text)
|
||||
OBJDIR/bas_printf.o(.text)
|
||||
OBJDIR/bas_string.o(.text)
|
||||
OBJDIR/printf_helper.o(.text)
|
||||
OBJDIR/cache.o(.text)
|
||||
OBJDIR/dma.o(.text)
|
||||
OBJDIR/MCD_dmaApi.o(.text)
|
||||
OBJDIR/MCD_tasks.o(.text)
|
||||
OBJDIR/MCD_tasksInit.o(.text)
|
||||
OBJDIR/nbuf.o(.text)
|
||||
OBJDIR/net_timer.o(.text)
|
||||
OBJDIR/queue.o(.text)
|
||||
OBJDIR/nif.o(.text)
|
||||
OBJDIR/fecbd.o(.text)
|
||||
OBJDIR/fec.o(.text)
|
||||
OBJDIR/am79c874.o(.text)
|
||||
OBJDIR/bcm5222.o(.text)
|
||||
OBJDIR/ip.o(.text)
|
||||
OBJDIR/udp.o(text)
|
||||
OBJDIR/bootp.o(text)
|
||||
OBJDIR/tftp.o(text)
|
||||
OBJDIR/arp.o(text)
|
||||
|
||||
OBJDIR/video.o(.text)
|
||||
OBJDIR/videl.o(.text)
|
||||
OBJDIR/fbmem.o(.text)
|
||||
OBJDIR/fbmon.o(.text)
|
||||
OBJDIR/fbmodedb.o(.text)
|
||||
OBJDIR/offscreen.o(.text)
|
||||
OBJDIR/unicode.o(.text)
|
||||
OBJDIR/mmc.o(.text)
|
||||
OBJDIR/ff.o(.text)
|
||||
OBJDIR/sd_card.o(.text)
|
||||
OBJDIR/s19reader.o(.text)
|
||||
OBJDIR/bas_printf.o(.text)
|
||||
OBJDIR/bas_string.o(.text)
|
||||
#if (FORMAT_ELF == 1)
|
||||
OBJDIR/libgcc_helper.o(.text)
|
||||
#endif
|
||||
OBJDIR/printf_helper.o(.text)
|
||||
OBJDIR/cache.o(.text)
|
||||
OBJDIR/dma.o(.text)
|
||||
OBJDIR/MCD_dmaApi.o(.text)
|
||||
OBJDIR/MCD_tasks.o(.text)
|
||||
OBJDIR/MCD_tasksInit.o(.text)
|
||||
|
||||
OBJDIR/x86decode.o(.text)
|
||||
OBJDIR/x86ops.o(.text)
|
||||
OBJDIR/x86ops2.o(.text)
|
||||
OBJDIR/x86fpu.o(.text)
|
||||
OBJDIR/x86sys.o(.text)
|
||||
OBJDIR/x86biosemu.o(.text)
|
||||
OBJDIR/x86debug.o(.text)
|
||||
OBJDIR/x86prim_ops.o(.text)
|
||||
OBJDIR/x86pcibios.o(.text)
|
||||
OBJDIR/video.o(.text)
|
||||
OBJDIR/videl.o(.text)
|
||||
OBJDIR/fbmem.o(.text)
|
||||
OBJDIR/fbmon.o(.text)
|
||||
OBJDIR/fbmodedb.o(.text)
|
||||
OBJDIR/offscreen.o(.text)
|
||||
|
||||
OBJDIR/radeon_base.o(.text)
|
||||
OBJDIR/radeon_accel.o(.text)
|
||||
OBJDIR/radeon_cursor.o(.text)
|
||||
OBJDIR/radeon_monitor.o(.text)
|
||||
OBJDIR/x86emu.o(.text)
|
||||
OBJDIR/x86emu_util.o(.text)
|
||||
OBJDIR/x86pcibios.o(.text)
|
||||
OBJDIR/x86biosemu.o(.text)
|
||||
|
||||
OBJDIR/radeon_base.o(.text)
|
||||
OBJDIR/radeon_accel.o(.text)
|
||||
OBJDIR/radeon_cursor.o(.text)
|
||||
OBJDIR/radeon_monitor.o(.text)
|
||||
|
||||
OBJDIR/xhdi_sd.o(.text)
|
||||
OBJDIR/xhdi_interface.o(.text)
|
||||
OBJDIR/xhdi_vec.o(.text)
|
||||
|
||||
OBJDIR/xhdi_sd.o(.text)
|
||||
OBJDIR/xhdi_interface.o(.text)
|
||||
OBJDIR/xhdi_vec.o(.text)
|
||||
|
||||
#ifdef COMPILE_RAM
|
||||
/*
|
||||
* if we compile to RAM anyway, there is no need to copy anything
|
||||
*/
|
||||
. = ALIGN(4);
|
||||
__BAS_DATA_START = .;
|
||||
*(.data)
|
||||
__BAS_DATA_END = .;
|
||||
__BAS_BSS_START = .;
|
||||
*(.bss)
|
||||
__BAS_BSS_END = .;
|
||||
/*
|
||||
* if we compile to RAM anyway, there is no need to copy anything
|
||||
*/
|
||||
. = ALIGN(4);
|
||||
__BAS_DATA_START = .;
|
||||
*(.data)
|
||||
__BAS_DATA_END = .;
|
||||
__BAS_BSS_START = .;
|
||||
*(.bss)
|
||||
__BAS_BSS_END = .;
|
||||
#endif /* COMPILE_RAM */
|
||||
|
||||
#if (FORMAT_ELF == 1)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.eh_frame)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
#endif
|
||||
} > bas_rom
|
||||
} > bas_rom
|
||||
|
||||
|
||||
#if (TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS)
|
||||
/*
|
||||
* put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
|
||||
*/
|
||||
.bas :
|
||||
AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
|
||||
{
|
||||
. = ALIGN(4); /* same alignment than AT() statement! */
|
||||
__BAS_DATA_START = .;
|
||||
*(.data)
|
||||
__BAS_DATA_END = .;
|
||||
__BAS_BSS_START = .;
|
||||
*(.bss)
|
||||
__BAS_BSS_END = .;
|
||||
/*
|
||||
* put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
|
||||
*/
|
||||
.bas :
|
||||
AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
|
||||
{
|
||||
. = ALIGN(4); /* same alignment than AT() statement! */
|
||||
__BAS_DATA_START = .;
|
||||
*(.data)
|
||||
__BAS_DATA_END = .;
|
||||
__BAS_BSS_START = .;
|
||||
*(.bss)
|
||||
__BAS_BSS_END = .;
|
||||
|
||||
. = ALIGN(16);
|
||||
} > bas_ram
|
||||
. = ALIGN(16);
|
||||
} > bas_ram
|
||||
#endif
|
||||
|
||||
.driver_memory :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_driver_mem_buffer = .;
|
||||
//. = . + DRIVER_MEM_BUFFER_SIZE;
|
||||
} > driver_ram
|
||||
|
||||
/*
|
||||
* Global memory map
|
||||
*/
|
||||
.driver_memory :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_driver_mem_buffer = .;
|
||||
//. = . + DRIVER_MEM_BUFFER_SIZE;
|
||||
} > driver_ram
|
||||
|
||||
/* SDRAM Initialization */
|
||||
___SDRAM = SDRAM_START;
|
||||
___SDRAM_SIZE = SDRAM_SIZE;
|
||||
_SDRAM_VECTOR_TABLE = ___SDRAM;
|
||||
|
||||
/* ST-RAM */
|
||||
__STRAM = ___SDRAM;
|
||||
__STRAM_END = __TOS;
|
||||
/*
|
||||
* Global memory map
|
||||
*/
|
||||
|
||||
/* TOS */
|
||||
__TOS = 0x00e00000;
|
||||
/* SDRAM Initialization */
|
||||
___SDRAM = SDRAM_START;
|
||||
___SDRAM_SIZE = SDRAM_SIZE;
|
||||
_SDRAM_VECTOR_TABLE = ___SDRAM;
|
||||
|
||||
/* FastRAM */
|
||||
__FASTRAM = 0x10000000;
|
||||
__TARGET_ADDRESS = TARGET_ADDRESS;
|
||||
|
||||
#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
|
||||
__FASTRAM_END = __BAS_IN_RAM;
|
||||
#else
|
||||
__FASTRAM_END = TARGET_ADDRESS;
|
||||
#endif
|
||||
/* ST-RAM */
|
||||
__STRAM = ___SDRAM;
|
||||
__STRAM_END = __TOS;
|
||||
|
||||
/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
|
||||
___BOOT_FLASH = BOOTFLASH_BASE_ADDRESS;
|
||||
___BOOT_FLASH_SIZE = BOOTFLASH_SIZE;
|
||||
/* TOS */
|
||||
__TOS = 0x00e00000;
|
||||
|
||||
/* FastRAM */
|
||||
__FASTRAM = 0x10000000;
|
||||
__TARGET_ADDRESS = TARGET_ADDRESS;
|
||||
|
||||
#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
|
||||
/* BaS */
|
||||
__BAS_LMA = LOADADDR(.bas);
|
||||
__BAS_IN_RAM = ADDR(.bas);
|
||||
__BAS_SIZE = SIZEOF(.bas);
|
||||
__FASTRAM_END = __BAS_IN_RAM;
|
||||
#else
|
||||
/* BaS is already in RAM - no need to copy anything */
|
||||
__BAS_IN_RAM = __FASTRAM_END;
|
||||
__BAS_SIZE = 0;
|
||||
__BAS_LMA = __BAS_IN_RAM;
|
||||
__FASTRAM_END = TARGET_ADDRESS;
|
||||
#endif
|
||||
__FASTRAM_SIZE = __FASTRAM_END - __FASTRAM;
|
||||
|
||||
/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
|
||||
___BOOT_FLASH = BOOTFLASH_BASE_ADDRESS;
|
||||
___BOOT_FLASH_SIZE = BOOTFLASH_SIZE;
|
||||
|
||||
#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
|
||||
/* BaS */
|
||||
__BAS_LMA = LOADADDR(.bas);
|
||||
__BAS_IN_RAM = ADDR(.bas);
|
||||
__BAS_SIZE = SIZEOF(.bas);
|
||||
#else
|
||||
/* BaS is already in RAM - no need to copy anything */
|
||||
__BAS_IN_RAM = __FASTRAM_END;
|
||||
__BAS_SIZE = 0;
|
||||
__BAS_LMA = __BAS_IN_RAM;
|
||||
#endif
|
||||
|
||||
/* Other flash components */
|
||||
__FIRETOS = 0xe0400000;
|
||||
__EMUTOS = EMUTOS_BASE_ADDRESS;
|
||||
__EMUTOS_SIZE = 0x00100000;
|
||||
/* Other flash components */
|
||||
__FIRETOS = 0xe0400000;
|
||||
__EMUTOS = EMUTOS_BASE_ADDRESS;
|
||||
__EMUTOS_SIZE = 0x00100000;
|
||||
|
||||
/* where FPGA data lives in flash */
|
||||
__FPGA_FLASH_DATA = 0xe0700000;
|
||||
__FPGA_FLASH_DATA_SIZE = 0x100000;
|
||||
/* where FPGA data lives in flash */
|
||||
__FPGA_CONFIG = 0xe0700000;
|
||||
__FPGA_CONFIG_SIZE = 0x100000;
|
||||
|
||||
/* VIDEO RAM BASIS */
|
||||
__VRAM = 0x60000000;
|
||||
/* VIDEO RAM BASIS */
|
||||
__VRAM = 0x60000000;
|
||||
|
||||
/* Memory mapped registers */
|
||||
__MBAR = 0xFF000000;
|
||||
|
||||
/* 32KB on-chip System SRAM */
|
||||
__SYS_SRAM = __MBAR + 0x10000;
|
||||
__SYS_SRAM_SIZE = 0x00008000;
|
||||
/* Memory mapped registers */
|
||||
__MBAR = 0xFF000000;
|
||||
|
||||
/* MMU memory mapped registers */
|
||||
__MMUBAR = 0xFF040000;
|
||||
/* 32KB on-chip System SRAM */
|
||||
__SYS_SRAM = __MBAR + 0x10000;
|
||||
__SYS_SRAM_SIZE = 0x00008000;
|
||||
|
||||
/*
|
||||
* 4KB on-chip Core SRAM0: -> exception table
|
||||
*/
|
||||
__RAMBAR0 = 0xFF100000;
|
||||
__RAMBAR0_SIZE = 0x00001000;
|
||||
/* MMU memory mapped registers */
|
||||
__MMUBAR = 0xFF040000;
|
||||
|
||||
/* 4KB on-chip Core SRAM1 */
|
||||
__RAMBAR1 = 0xFF101000;
|
||||
__RAMBAR1_SIZE = 0x00001000;
|
||||
__SUP_SP = __RAMBAR0 + __RAMBAR0_SIZE - 4;
|
||||
#if !defined(MACHINE_M54455) /* MCF54455 does not have RAMBAR0 and RAMBAR1 registers */
|
||||
/*
|
||||
* 4KB on-chip Core SRAM0: -> exception table
|
||||
*/
|
||||
__RAMBAR0 = 0xFF100000;
|
||||
__RAMBAR0_SIZE = 0x00001000;
|
||||
|
||||
/* system variables */
|
||||
|
||||
/* RAMBAR0 0 to 0x7FF -> exception vectors */
|
||||
_rt_mod = __RAMBAR0 + 0x800;
|
||||
_rt_ssp = __RAMBAR0 + 0x804;
|
||||
_rt_usp = __RAMBAR0 + 0x808;
|
||||
_rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */
|
||||
_rt_cacr = __RAMBAR0 + 0x810; /* 002 */
|
||||
_rt_asid = __RAMBAR0 + 0x814; /* 003 */
|
||||
_rt_acr0 = __RAMBAR0 + 0x818; /* 004 */
|
||||
_rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */
|
||||
_rt_acr2 = __RAMBAR0 + 0x820; /* 006 */
|
||||
_rt_acr3 = __RAMBAR0 + 0x824; /* 007 */
|
||||
_rt_mmubar = __RAMBAR0 + 0x828; /* 008 */
|
||||
_rt_sr = __RAMBAR0 + 0x82c;
|
||||
_d0_save = __RAMBAR0 + 0x830;
|
||||
_a7_save = __RAMBAR0 + 0x834;
|
||||
_video_tlb = __RAMBAR0 + 0x838;
|
||||
_video_sbt = __RAMBAR0 + 0x83C;
|
||||
_rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */
|
||||
/* 4KB on-chip Core SRAM1 */
|
||||
__RAMBAR1 = 0xFF101000;
|
||||
__RAMBAR1_SIZE = 0x00001000;
|
||||
__SUP_SP = __RAMBAR1 + __RAMBAR1_SIZE - 4;
|
||||
#else
|
||||
__RAMBAR0 = 0x80000000; /* RAMBAR must be between 0x80000000 on MCF54455 */
|
||||
__RAMBAR0_SIZE = 0x1000;
|
||||
__SUP_SP = __RAMBAR0 + __RAMBAR0_SIZE + 0x1000 - 4;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* FPGA_JTAG_LOADED (if 1) indicates that FPGA configuration has been loaded through JTAG
|
||||
* and shouldn't be overwritten on boot. For this to work (and not let us be faked
|
||||
* by a random uninitialised value), __FPGA_JTAG_VALID is used as a "magic value" and must be
|
||||
* 0xaffeaffe to make this work.
|
||||
*/
|
||||
#if !defined(MACHINE_M54455) /* MCF54455 does not have RAMBAR0 and RAMBAR1 */
|
||||
__FPGA_JTAG_LOADED = __RAMBAR1;
|
||||
__FPGA_JTAG_VALID = __RAMBAR1 + 4;
|
||||
#else
|
||||
__FPGA_JTAG_LOADED = __RAMBAR0 + 0x1000;
|
||||
__FPGA_JTAG_VALID = __RAMBAR0 + 0x1000 + 4;
|
||||
#endif
|
||||
|
||||
/* system variables */
|
||||
/* RAMBAR0 0 to 0x7FF -> exception vectors */
|
||||
_rt_mod = __RAMBAR0 + 0x800;
|
||||
_rt_ssp = __RAMBAR0 + 0x804;
|
||||
_rt_usp = __RAMBAR0 + 0x808;
|
||||
_rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */
|
||||
_rt_cacr = __RAMBAR0 + 0x810; /* 002 */
|
||||
_rt_asid = __RAMBAR0 + 0x814; /* 003 */
|
||||
_rt_acr0 = __RAMBAR0 + 0x818; /* 004 */
|
||||
_rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */
|
||||
_rt_acr2 = __RAMBAR0 + 0x820; /* 006 */
|
||||
_rt_acr3 = __RAMBAR0 + 0x824; /* 007 */
|
||||
_rt_mmubar = __RAMBAR0 + 0x828; /* 008 */
|
||||
_rt_sr = __RAMBAR0 + 0x82c;
|
||||
_d0_save = __RAMBAR0 + 0x830;
|
||||
_a7_save = __RAMBAR0 + 0x834;
|
||||
_video_tlb = __RAMBAR0 + 0x838;
|
||||
_video_sbt = __RAMBAR0 + 0x83C;
|
||||
_rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */
|
||||
}
|
||||
|
||||
@@ -63,10 +63,6 @@ write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
|
||||
sleep 100
|
||||
|
||||
load -v firebee/ram.elf
|
||||
write-ctrl 0x80e 0x2700
|
||||
write-ctrl 0x2 0xa50c8120
|
||||
dump-register SR
|
||||
dump-register CACR
|
||||
dump-register MBAR
|
||||
|
||||
execute
|
||||
wait
|
||||
|
||||
1070
dma/MCD_dmaApi.c
1070
dma/MCD_dmaApi.c
File diff suppressed because it is too large
Load Diff
370
dma/MCD_tasks.c
370
dma/MCD_tasks.c
@@ -7,253 +7,253 @@
|
||||
|
||||
#include "MCD_dma.h"
|
||||
|
||||
uint32_t MCD_varTab0[];
|
||||
uint32_t MCD_varTab1[];
|
||||
uint32_t MCD_varTab2[];
|
||||
uint32_t MCD_varTab3[];
|
||||
uint32_t MCD_varTab4[];
|
||||
uint32_t MCD_varTab5[];
|
||||
uint32_t MCD_varTab6[];
|
||||
uint32_t MCD_varTab7[];
|
||||
uint32_t MCD_varTab8[];
|
||||
uint32_t MCD_varTab9[];
|
||||
uint32_t MCD_varTab10[];
|
||||
uint32_t MCD_varTab11[];
|
||||
uint32_t MCD_varTab12[];
|
||||
uint32_t MCD_varTab13[];
|
||||
uint32_t MCD_varTab14[];
|
||||
uint32_t MCD_varTab15[];
|
||||
u32 MCD_varTab0[];
|
||||
u32 MCD_varTab1[];
|
||||
u32 MCD_varTab2[];
|
||||
u32 MCD_varTab3[];
|
||||
u32 MCD_varTab4[];
|
||||
u32 MCD_varTab5[];
|
||||
u32 MCD_varTab6[];
|
||||
u32 MCD_varTab7[];
|
||||
u32 MCD_varTab8[];
|
||||
u32 MCD_varTab9[];
|
||||
u32 MCD_varTab10[];
|
||||
u32 MCD_varTab11[];
|
||||
u32 MCD_varTab12[];
|
||||
u32 MCD_varTab13[];
|
||||
u32 MCD_varTab14[];
|
||||
u32 MCD_varTab15[];
|
||||
|
||||
uint32_t MCD_funcDescTab0[];
|
||||
u32 MCD_funcDescTab0[];
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
uint32_t MCD_funcDescTab1[];
|
||||
uint32_t MCD_funcDescTab2[];
|
||||
uint32_t MCD_funcDescTab3[];
|
||||
uint32_t MCD_funcDescTab4[];
|
||||
uint32_t MCD_funcDescTab5[];
|
||||
uint32_t MCD_funcDescTab6[];
|
||||
uint32_t MCD_funcDescTab7[];
|
||||
uint32_t MCD_funcDescTab8[];
|
||||
uint32_t MCD_funcDescTab9[];
|
||||
uint32_t MCD_funcDescTab10[];
|
||||
uint32_t MCD_funcDescTab11[];
|
||||
uint32_t MCD_funcDescTab12[];
|
||||
uint32_t MCD_funcDescTab13[];
|
||||
uint32_t MCD_funcDescTab14[];
|
||||
uint32_t MCD_funcDescTab15[];
|
||||
u32 MCD_funcDescTab1[];
|
||||
u32 MCD_funcDescTab2[];
|
||||
u32 MCD_funcDescTab3[];
|
||||
u32 MCD_funcDescTab4[];
|
||||
u32 MCD_funcDescTab5[];
|
||||
u32 MCD_funcDescTab6[];
|
||||
u32 MCD_funcDescTab7[];
|
||||
u32 MCD_funcDescTab8[];
|
||||
u32 MCD_funcDescTab9[];
|
||||
u32 MCD_funcDescTab10[];
|
||||
u32 MCD_funcDescTab11[];
|
||||
u32 MCD_funcDescTab12[];
|
||||
u32 MCD_funcDescTab13[];
|
||||
u32 MCD_funcDescTab14[];
|
||||
u32 MCD_funcDescTab15[];
|
||||
#endif
|
||||
|
||||
uint32_t MCD_contextSave0[];
|
||||
uint32_t MCD_contextSave1[];
|
||||
uint32_t MCD_contextSave2[];
|
||||
uint32_t MCD_contextSave3[];
|
||||
uint32_t MCD_contextSave4[];
|
||||
uint32_t MCD_contextSave5[];
|
||||
uint32_t MCD_contextSave6[];
|
||||
uint32_t MCD_contextSave7[];
|
||||
uint32_t MCD_contextSave8[];
|
||||
uint32_t MCD_contextSave9[];
|
||||
uint32_t MCD_contextSave10[];
|
||||
uint32_t MCD_contextSave11[];
|
||||
uint32_t MCD_contextSave12[];
|
||||
uint32_t MCD_contextSave13[];
|
||||
uint32_t MCD_contextSave14[];
|
||||
uint32_t MCD_contextSave15[];
|
||||
u32 MCD_contextSave0[];
|
||||
u32 MCD_contextSave1[];
|
||||
u32 MCD_contextSave2[];
|
||||
u32 MCD_contextSave3[];
|
||||
u32 MCD_contextSave4[];
|
||||
u32 MCD_contextSave5[];
|
||||
u32 MCD_contextSave6[];
|
||||
u32 MCD_contextSave7[];
|
||||
u32 MCD_contextSave8[];
|
||||
u32 MCD_contextSave9[];
|
||||
u32 MCD_contextSave10[];
|
||||
u32 MCD_contextSave11[];
|
||||
u32 MCD_contextSave12[];
|
||||
u32 MCD_contextSave13[];
|
||||
u32 MCD_contextSave14[];
|
||||
u32 MCD_contextSave15[];
|
||||
|
||||
uint32_t MCD_realTaskTableSrc[] =
|
||||
u32 MCD_realTaskTableSrc[] =
|
||||
{
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab0, /* Task 0 Variable Table */
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_varTab0, /* Task 0 Variable Table */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave0, /* Task 0 context save space */
|
||||
(u32)MCD_contextSave0, /* Task 0 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab1, /* Task 1 Variable Table */
|
||||
(u32)MCD_varTab1, /* Task 1 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab1, /* Task 1 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab1, /* Task 1 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave1, /* Task 1 context save space */
|
||||
(u32)MCD_contextSave1, /* Task 1 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab2, /* Task 2 Variable Table */
|
||||
(u32)MCD_varTab2, /* Task 2 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab2, /* Task 2 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab2, /* Task 2 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave2, /* Task 2 context save space */
|
||||
(u32)MCD_contextSave2, /* Task 2 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab3, /* Task 3 Variable Table */
|
||||
(u32)MCD_varTab3, /* Task 3 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab3, /* Task 3 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab3, /* Task 3 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave3, /* Task 3 context save space */
|
||||
(u32)MCD_contextSave3, /* Task 3 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab4, /* Task 4 Variable Table */
|
||||
(u32)MCD_varTab4, /* Task 4 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab4, /* Task 4 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab4, /* Task 4 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave4, /* Task 4 context save space */
|
||||
(u32)MCD_contextSave4, /* Task 4 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab5, /* Task 5 Variable Table */
|
||||
(u32)MCD_varTab5, /* Task 5 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab5, /* Task 5 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab5, /* Task 5 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave5, /* Task 5 context save space */
|
||||
(u32)MCD_contextSave5, /* Task 5 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab6, /* Task 6 Variable Table */
|
||||
(u32)MCD_varTab6, /* Task 6 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab6, /* Task 6 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab6, /* Task 6 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave6, /* Task 6 context save space */
|
||||
(u32)MCD_contextSave6, /* Task 6 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab7, /* Task 7 Variable Table */
|
||||
(u32)MCD_varTab7, /* Task 7 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab7, /* Task 7 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab7, /* Task 7 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave7, /* Task 7 context save space */
|
||||
(u32)MCD_contextSave7, /* Task 7 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab8, /* Task 8 Variable Table */
|
||||
(u32)MCD_varTab8, /* Task 8 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab8, /* Task 8 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab8, /* Task 8 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave8, /* Task 8 context save space */
|
||||
(u32)MCD_contextSave8, /* Task 8 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab9, /* Task 9 Variable Table */
|
||||
(u32)MCD_varTab9, /* Task 9 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab9, /* Task 9 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab9, /* Task 9 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave9, /* Task 9 context save space */
|
||||
(u32)MCD_contextSave9, /* Task 9 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab10, /* Task 10 Variable Table */
|
||||
(u32)MCD_varTab10, /* Task 10 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave10, /* Task 10 context save space */
|
||||
(u32)MCD_contextSave10, /* Task 10 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab11, /* Task 11 Variable Table */
|
||||
(u32)MCD_varTab11, /* Task 11 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave11, /* Task 11 context save space */
|
||||
(u32)MCD_contextSave11, /* Task 11 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab12, /* Task 12 Variable Table */
|
||||
(u32)MCD_varTab12, /* Task 12 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave12, /* Task 12 context save space */
|
||||
(u32)MCD_contextSave12, /* Task 12 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab13, /* Task 13 Variable Table */
|
||||
(u32)MCD_varTab13, /* Task 13 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave13, /* Task 13 context save space */
|
||||
(u32)MCD_contextSave13, /* Task 13 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab14, /* Task 14 Variable Table */
|
||||
(u32)MCD_varTab14, /* Task 14 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave14, /* Task 14 context save space */
|
||||
(u32)MCD_contextSave14, /* Task 14 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab15, /* Task 15 Variable Table */
|
||||
(u32)MCD_varTab15, /* Task 15 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave15, /* Task 15 context save space */
|
||||
(u32)MCD_contextSave15, /* Task 15 context save space */
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
|
||||
uint32_t MCD_varTab0[] =
|
||||
u32 MCD_varTab0[] =
|
||||
{ /* Task 0 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -290,7 +290,7 @@ uint32_t MCD_varTab0[] =
|
||||
};
|
||||
|
||||
|
||||
uint32_t MCD_varTab1[] =
|
||||
u32 MCD_varTab1[] =
|
||||
{ /* Task 1 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -326,7 +326,7 @@ uint32_t MCD_varTab1[] =
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab2[]=
|
||||
u32 MCD_varTab2[]=
|
||||
{ /* Task 2 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -362,7 +362,7 @@ uint32_t MCD_varTab2[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab3[]=
|
||||
u32 MCD_varTab3[]=
|
||||
{ /* Task 3 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -398,7 +398,7 @@ uint32_t MCD_varTab3[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab4[]=
|
||||
u32 MCD_varTab4[]=
|
||||
{ /* Task 4 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -434,7 +434,7 @@ uint32_t MCD_varTab4[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab5[]=
|
||||
u32 MCD_varTab5[]=
|
||||
{ /* Task 5 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -470,7 +470,7 @@ uint32_t MCD_varTab5[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab6[]=
|
||||
u32 MCD_varTab6[]=
|
||||
{ /* Task 6 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -506,7 +506,7 @@ uint32_t MCD_varTab6[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab7[]=
|
||||
u32 MCD_varTab7[]=
|
||||
{ /* Task 7 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -542,7 +542,7 @@ uint32_t MCD_varTab7[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab8[]=
|
||||
u32 MCD_varTab8[]=
|
||||
{ /* Task 8 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -578,7 +578,7 @@ uint32_t MCD_varTab8[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab9[]=
|
||||
u32 MCD_varTab9[]=
|
||||
{ /* Task 9 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -614,7 +614,7 @@ uint32_t MCD_varTab9[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab10[]=
|
||||
u32 MCD_varTab10[]=
|
||||
{ /* Task 10 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -650,7 +650,7 @@ uint32_t MCD_varTab10[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab11[]=
|
||||
u32 MCD_varTab11[]=
|
||||
{ /* Task 11 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -686,7 +686,7 @@ uint32_t MCD_varTab11[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab12[]=
|
||||
u32 MCD_varTab12[]=
|
||||
{ /* Task 12 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -722,7 +722,7 @@ uint32_t MCD_varTab12[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab13[]=
|
||||
u32 MCD_varTab13[]=
|
||||
{ /* Task 13 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -758,7 +758,7 @@ uint32_t MCD_varTab13[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab14[]=
|
||||
u32 MCD_varTab14[]=
|
||||
{ /* Task 14 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -794,7 +794,7 @@ uint32_t MCD_varTab14[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab15[]=
|
||||
u32 MCD_varTab15[]=
|
||||
{ /* Task 15 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -830,7 +830,7 @@ uint32_t MCD_varTab15[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab0[]=
|
||||
u32 MCD_funcDescTab0[]=
|
||||
{ /* Task 0 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -899,7 +899,7 @@ uint32_t MCD_funcDescTab0[]=
|
||||
};
|
||||
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
uint32_t MCD_funcDescTab1[]=
|
||||
u32 MCD_funcDescTab1[]=
|
||||
{ /* Task 1 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -967,7 +967,7 @@ uint32_t MCD_funcDescTab1[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab2[]=
|
||||
u32 MCD_funcDescTab2[]=
|
||||
{ /* Task 2 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1035,7 +1035,7 @@ uint32_t MCD_funcDescTab2[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab3[]=
|
||||
u32 MCD_funcDescTab3[]=
|
||||
{ /* Task 3 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1103,7 +1103,7 @@ uint32_t MCD_funcDescTab3[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab4[]=
|
||||
u32 MCD_funcDescTab4[]=
|
||||
{ /* Task 4 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1171,7 +1171,7 @@ uint32_t MCD_funcDescTab4[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab5[]=
|
||||
u32 MCD_funcDescTab5[]=
|
||||
{ /* Task 5 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1239,7 +1239,7 @@ uint32_t MCD_funcDescTab5[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab6[]=
|
||||
u32 MCD_funcDescTab6[]=
|
||||
{ /* Task 6 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1307,7 +1307,7 @@ uint32_t MCD_funcDescTab6[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab7[]=
|
||||
u32 MCD_funcDescTab7[]=
|
||||
{ /* Task 7 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1375,7 +1375,7 @@ uint32_t MCD_funcDescTab7[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab8[]=
|
||||
u32 MCD_funcDescTab8[]=
|
||||
{ /* Task 8 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1443,7 +1443,7 @@ uint32_t MCD_funcDescTab8[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab9[]=
|
||||
u32 MCD_funcDescTab9[]=
|
||||
{ /* Task 9 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1511,7 +1511,7 @@ uint32_t MCD_funcDescTab9[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab10[]=
|
||||
u32 MCD_funcDescTab10[]=
|
||||
{ /* Task 10 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1579,7 +1579,7 @@ uint32_t MCD_funcDescTab10[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab11[]=
|
||||
u32 MCD_funcDescTab11[]=
|
||||
{ /* Task 11 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1647,7 +1647,7 @@ uint32_t MCD_funcDescTab11[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab12[]=
|
||||
u32 MCD_funcDescTab12[]=
|
||||
{ /* Task 12 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1715,7 +1715,7 @@ uint32_t MCD_funcDescTab12[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab13[]=
|
||||
u32 MCD_funcDescTab13[]=
|
||||
{ /* Task 13 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1783,7 +1783,7 @@ uint32_t MCD_funcDescTab13[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab14[]=
|
||||
u32 MCD_funcDescTab14[]=
|
||||
{ /* Task 14 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1851,7 +1851,7 @@ uint32_t MCD_funcDescTab14[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab15[]=
|
||||
u32 MCD_funcDescTab15[]=
|
||||
{ /* Task 15 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1920,45 +1920,45 @@ uint32_t MCD_funcDescTab15[]=
|
||||
};
|
||||
#endif /*MCD_INCLUDE_EU*/
|
||||
|
||||
uint32_t MCD_contextSave0[128]; /* Task 0 context save space */
|
||||
uint32_t MCD_contextSave1[128]; /* Task 1 context save space */
|
||||
uint32_t MCD_contextSave2[128]; /* Task 2 context save space */
|
||||
uint32_t MCD_contextSave3[128]; /* Task 3 context save space */
|
||||
uint32_t MCD_contextSave4[128]; /* Task 4 context save space */
|
||||
uint32_t MCD_contextSave5[128]; /* Task 5 context save space */
|
||||
uint32_t MCD_contextSave6[128]; /* Task 6 context save space */
|
||||
uint32_t MCD_contextSave7[128]; /* Task 7 context save space */
|
||||
uint32_t MCD_contextSave8[128]; /* Task 8 context save space */
|
||||
uint32_t MCD_contextSave9[128]; /* Task 9 context save space */
|
||||
uint32_t MCD_contextSave10[128]; /* Task 10 context save space */
|
||||
uint32_t MCD_contextSave11[128]; /* Task 11 context save space */
|
||||
uint32_t MCD_contextSave12[128]; /* Task 12 context save space */
|
||||
uint32_t MCD_contextSave13[128]; /* Task 13 context save space */
|
||||
uint32_t MCD_contextSave14[128]; /* Task 14 context save space */
|
||||
uint32_t MCD_contextSave15[128]; /* Task 15 context save space */
|
||||
u32 MCD_contextSave0[128]; /* Task 0 context save space */
|
||||
u32 MCD_contextSave1[128]; /* Task 1 context save space */
|
||||
u32 MCD_contextSave2[128]; /* Task 2 context save space */
|
||||
u32 MCD_contextSave3[128]; /* Task 3 context save space */
|
||||
u32 MCD_contextSave4[128]; /* Task 4 context save space */
|
||||
u32 MCD_contextSave5[128]; /* Task 5 context save space */
|
||||
u32 MCD_contextSave6[128]; /* Task 6 context save space */
|
||||
u32 MCD_contextSave7[128]; /* Task 7 context save space */
|
||||
u32 MCD_contextSave8[128]; /* Task 8 context save space */
|
||||
u32 MCD_contextSave9[128]; /* Task 9 context save space */
|
||||
u32 MCD_contextSave10[128]; /* Task 10 context save space */
|
||||
u32 MCD_contextSave11[128]; /* Task 11 context save space */
|
||||
u32 MCD_contextSave12[128]; /* Task 12 context save space */
|
||||
u32 MCD_contextSave13[128]; /* Task 13 context save space */
|
||||
u32 MCD_contextSave14[128]; /* Task 14 context save space */
|
||||
u32 MCD_contextSave15[128]; /* Task 15 context save space */
|
||||
|
||||
|
||||
uint32_t MCD_ChainNoEu_TDT[];
|
||||
uint32_t MCD_SingleNoEu_TDT[];
|
||||
u32 MCD_ChainNoEu_TDT[];
|
||||
u32 MCD_SingleNoEu_TDT[];
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
uint32_t MCD_ChainEu_TDT[];
|
||||
uint32_t MCD_SingleEu_TDT[];
|
||||
u32 MCD_ChainEu_TDT[];
|
||||
u32 MCD_SingleEu_TDT[];
|
||||
#endif
|
||||
uint32_t MCD_ENetRcv_TDT[];
|
||||
uint32_t MCD_ENetXmit_TDT[];
|
||||
u32 MCD_ENetRcv_TDT[];
|
||||
u32 MCD_ENetXmit_TDT[];
|
||||
|
||||
uint32_t MCD_modelTaskTableSrc[]=
|
||||
u32 MCD_modelTaskTableSrc[]=
|
||||
{
|
||||
(uint32_t)MCD_ChainNoEu_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_ChainNoEu_TDT)[0x0000016c],
|
||||
(u32)MCD_ChainNoEu_TDT,
|
||||
(u32)&((u8*)MCD_ChainNoEu_TDT)[0x0000016c],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_SingleNoEu_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_SingleNoEu_TDT)[0x000000d4],
|
||||
(u32)MCD_SingleNoEu_TDT,
|
||||
(u32)&((u8*)MCD_SingleNoEu_TDT)[0x000000d4],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1966,16 +1966,16 @@ uint32_t MCD_modelTaskTableSrc[]=
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_ChainEu_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_ChainEu_TDT)[0x000001b4],
|
||||
(u32)MCD_ChainEu_TDT,
|
||||
(u32)&((u8*)MCD_ChainEu_TDT)[0x000001b4],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_SingleEu_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_SingleEu_TDT)[0x00000124],
|
||||
(u32)MCD_SingleEu_TDT,
|
||||
(u32)&((u8*)MCD_SingleEu_TDT)[0x00000124],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1983,16 +1983,16 @@ uint32_t MCD_modelTaskTableSrc[]=
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
#endif
|
||||
(uint32_t)MCD_ENetRcv_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_ENetRcv_TDT)[0x0000009c],
|
||||
(u32)MCD_ENetRcv_TDT,
|
||||
(u32)&((u8*)MCD_ENetRcv_TDT)[0x0000009c],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_ENetXmit_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_ENetXmit_TDT)[0x000000d0],
|
||||
(u32)MCD_ENetXmit_TDT,
|
||||
(u32)&((u8*)MCD_ENetXmit_TDT)[0x000000d0],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -2000,7 +2000,7 @@ uint32_t MCD_modelTaskTableSrc[]=
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
uint32_t MCD_ChainNoEu_TDT[]=
|
||||
u32 MCD_ChainNoEu_TDT[]=
|
||||
{
|
||||
0x80004000, /* 0000(:370): LCDEXT: idx0 = 0x00000000; ; */
|
||||
0x8118801b, /* 0004(:370): LCD: idx1 = var2; idx1 once var0; idx1 += inc3 */
|
||||
@@ -2095,7 +2095,7 @@ uint32_t MCD_ChainNoEu_TDT[]=
|
||||
0x000001f8, /* 0168(:0): NOP */
|
||||
0x000001f8, /* 016C(:0): NOP */
|
||||
};
|
||||
uint32_t MCD_SingleNoEu_TDT[]=
|
||||
u32 MCD_SingleNoEu_TDT[]=
|
||||
{
|
||||
0x8198001b, /* 0000(:657): LCD: idx0 = var3; idx0 once var0; idx0 += inc3 */
|
||||
0x7000000d, /* 0004(:658): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */
|
||||
@@ -2153,7 +2153,7 @@ uint32_t MCD_SingleNoEu_TDT[]=
|
||||
0x040001f8, /* 00D4(:713): DRD1A: FN=0 INT init=0 WS=0 RS=0 */
|
||||
};
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
uint32_t MCD_ChainEu_TDT[]=
|
||||
u32 MCD_ChainEu_TDT[]=
|
||||
{
|
||||
0x80004000, /* 0000(:947): LCDEXT: idx0 = 0x00000000; ; */
|
||||
0x8198801b, /* 0004(:947): LCD: idx1 = var3; idx1 once var0; idx1 += inc3 */
|
||||
@@ -2266,7 +2266,7 @@ uint32_t MCD_ChainEu_TDT[]=
|
||||
0x000001f8, /* 01B0(:0): NOP */
|
||||
0x000001f8, /* 01B4(:0): NOP */
|
||||
};
|
||||
uint32_t MCD_SingleEu_TDT[]=
|
||||
u32 MCD_SingleEu_TDT[]=
|
||||
{
|
||||
0x8218001b, /* 0000(:1248): LCD: idx0 = var4; idx0 once var0; idx0 += inc3 */
|
||||
0x7000000d, /* 0004(:1249): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */
|
||||
@@ -2344,7 +2344,7 @@ uint32_t MCD_SingleEu_TDT[]=
|
||||
0x040001f8, /* 0124(:1316): DRD1A: FN=0 INT init=0 WS=0 RS=0 */
|
||||
};
|
||||
#endif
|
||||
uint32_t MCD_ENetRcv_TDT[]=
|
||||
u32 MCD_ENetRcv_TDT[]=
|
||||
{
|
||||
0x80004000, /* 0000(:1389): LCDEXT: idx0 = 0x00000000; ; */
|
||||
0x81988000, /* 0004(:1389): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
|
||||
@@ -2387,7 +2387,7 @@ uint32_t MCD_ENetRcv_TDT[]=
|
||||
0x040001f8, /* 0098(:1441): DRD1A: FN=0 INT init=0 WS=0 RS=0 */
|
||||
0x000001f8, /* 009C(:0): NOP */
|
||||
};
|
||||
uint32_t MCD_ENetXmit_TDT[]=
|
||||
u32 MCD_ENetXmit_TDT[]=
|
||||
{
|
||||
0x80004000, /* 0000(:1516): LCDEXT: idx0 = 0x00000000; ; */
|
||||
0x81988000, /* 0004(:1516): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
|
||||
|
||||
@@ -11,7 +11,6 @@
|
||||
*/
|
||||
|
||||
#include "MCD_dma.h"
|
||||
#include "MCD_tasksInit.h"
|
||||
|
||||
extern dmaRegs *MCD_dmaBar;
|
||||
|
||||
@@ -23,33 +22,33 @@ extern dmaRegs *MCD_dmaBar;
|
||||
void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)currBD); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (uint32_t)xferSize); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)0x00000000); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x80000000); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0x00000010); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000004); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x08000000); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000001); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x40000000); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)xferSize); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)0x00000000); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (u32)0x80000000); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (u32)0x00000010); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (u32)0x08000000); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000001); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x40000000); /* inc[6] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
@@ -57,29 +56,29 @@ void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer
|
||||
* Task 1
|
||||
*/
|
||||
|
||||
void MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)srcAddr); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)destAddr); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)dmaSize); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)flags); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)currBD); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000004); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x08000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000001); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x40000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)srcAddr); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)destAddr); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)dmaSize); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)flags); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)currBD); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000004); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x08000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000001); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x40000000); /* inc[5] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
@@ -90,36 +89,36 @@ void MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, s
|
||||
void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (uint32_t)xferSize); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x00000000); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x00000000); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0x80000000); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000010); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x00000001); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 17, (uint32_t)0x00000004); /* var[17] */
|
||||
MCD_SET_VAR(taskTable+channel, 18, (uint32_t)0x08000000); /* var[18] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0xc0000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x80000001); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0x40000000); /* inc[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)xferSize); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000000); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (u32)0x00000000); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (u32)0x80000000); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000010); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000001); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 17, (u32)0x00000004); /* var[17] */
|
||||
MCD_SET_VAR(taskTable+channel, 18, (u32)0x08000000); /* var[18] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0xc0000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
@@ -127,33 +126,33 @@ void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi
|
||||
* Task 3
|
||||
*/
|
||||
|
||||
void MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)srcAddr); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)destAddr); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)dmaSize); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)flags); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)currBD); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000001); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x00000004); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x08000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0xc0000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x80000001); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0x40000000); /* inc[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)srcAddr); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)destAddr); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)dmaSize); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)flags); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000001); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000004); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x08000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0xc0000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
@@ -161,29 +160,29 @@ void MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, sho
|
||||
* Task 4
|
||||
*/
|
||||
|
||||
void MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel)
|
||||
void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)bDBase); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)rcvFifoPtr); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x0000ffff); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x30000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x0fffffff); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000008); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)0x00000000); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)0x60000000); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)0x20000004); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x40000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)rcvFifoPtr); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x0000ffff); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x30000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)0x0fffffff); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000008); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)0x20000004); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x40000000); /* inc[3] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
@@ -191,35 +190,35 @@ void MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, vo
|
||||
* Task 5
|
||||
*/
|
||||
|
||||
void MCD_startDmaENetXmit(int8_t *bDBase, int8_t *currBD, int8_t *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel)
|
||||
void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)bDBase); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (uint32_t)xmitFifoPtr); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x0000ffff); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0xffffffff); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000004); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x00000008); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)0x00000000); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)0x60000000); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)0x40000000); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0xc000fffc); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0xe0000004); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x4000ffff); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0xe0000001); /* inc[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)xmitFifoPtr); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (u32)0x0000ffff); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (u32)0xffffffff); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000008); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)0x40000000); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0xc000fffc); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0xe0000004); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x4000ffff); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (u32)0xe0000001); /* inc[7] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
303
exe/basflash.c
303
exe/basflash.c
@@ -21,10 +21,9 @@
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "bas_string.h"
|
||||
#include <bas_types.h>
|
||||
#include "bas_printf.h"
|
||||
#include "bas_string.h"
|
||||
#include "diskio.h"
|
||||
#include "ff.h"
|
||||
#include "s19reader.h"
|
||||
@@ -220,190 +219,190 @@ static const int num_flash_areas = sizeof(flash_areas) / sizeof(struct romram);
|
||||
*/
|
||||
void amd_flash_sector_erase(int n)
|
||||
{
|
||||
volatile AMD_FLASH_CELL status;
|
||||
volatile AMD_FLASH_CELL status;
|
||||
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[SADDR(n)] = AMD_FLASH_CMD_DATA(0x30);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[SADDR(n)] = AMD_FLASH_CMD_DATA(0x30);
|
||||
|
||||
do
|
||||
status = pFlash[SADDR(n)];
|
||||
while ((status & AMD_FLASH_CMD_DATA(0x80)) != AMD_FLASH_CMD_DATA(0x80));
|
||||
do
|
||||
status = pFlash[SADDR(n)];
|
||||
while ((status & AMD_FLASH_CMD_DATA(0x80)) != AMD_FLASH_CMD_DATA(0x80));
|
||||
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
}
|
||||
|
||||
int amd_flash_erase(void *start, int bytes, void (*putchar)(int))
|
||||
{
|
||||
int i, ebytes = 0;
|
||||
int i, ebytes = 0;
|
||||
|
||||
if (bytes == 0)
|
||||
return 0;
|
||||
if (bytes == 0)
|
||||
return 0;
|
||||
|
||||
for (i = 0; i < AMD_FLASH_SECTORS; i++)
|
||||
{
|
||||
if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
|
||||
start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
for (i = 0; i < AMD_FLASH_SECTORS; i++)
|
||||
{
|
||||
if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
|
||||
start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
while (ebytes < bytes)
|
||||
{
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar('.');
|
||||
}
|
||||
amd_flash_sector_erase(i);
|
||||
ebytes += SSIZE(i);
|
||||
i++;
|
||||
}
|
||||
while (ebytes < bytes)
|
||||
{
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar('.');
|
||||
}
|
||||
amd_flash_sector_erase(i);
|
||||
ebytes += SSIZE(i);
|
||||
i++;
|
||||
}
|
||||
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar(10); /* LF */
|
||||
putchar(13); /* CR */
|
||||
}
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar(10); /* LF */
|
||||
putchar(13); /* CR */
|
||||
}
|
||||
|
||||
return ebytes;
|
||||
return ebytes;
|
||||
}
|
||||
|
||||
void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
|
||||
{
|
||||
volatile AMD_FLASH_CELL status;
|
||||
int retry;
|
||||
volatile AMD_FLASH_CELL status;
|
||||
int retry;
|
||||
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xA0);
|
||||
*dst = data;
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xA0);
|
||||
*dst = data;
|
||||
|
||||
/*
|
||||
* Wait for program operation to finish
|
||||
* (Data# Polling Algorithm)
|
||||
*/
|
||||
retry = 0;
|
||||
while (1)
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
if (status & AMD_FLASH_CMD_DATA(0x20))
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
if (++retry > 1024)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Wait for program operation to finish
|
||||
* (Data# Polling Algorithm)
|
||||
*/
|
||||
retry = 0;
|
||||
while (1)
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
if (status & AMD_FLASH_CMD_DATA(0x20))
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
if (++retry > 1024)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int amd_flash_program(void *dest, void *source, int bytes, int erase, void (*func)(void), void (*putchar)(int))
|
||||
{
|
||||
AMD_FLASH_CELL *src, *dst;
|
||||
int hashi=1,hashj=0;
|
||||
char hash[5];
|
||||
AMD_FLASH_CELL *src, *dst;
|
||||
int hashi=1,hashj=0;
|
||||
char hash[5];
|
||||
|
||||
hash[0]=8; /* Backspace */
|
||||
hash[1]=124;/* "|" */
|
||||
hash[2]=47; /* "/" */
|
||||
hash[3]=45; /* "-" */
|
||||
hash[4]=92; /* "\" */
|
||||
hash[0]=8; /* Backspace */
|
||||
hash[1]=124;/* "|" */
|
||||
hash[2]=47; /* "/" */
|
||||
hash[3]=45; /* "-" */
|
||||
hash[4]=92; /* "\" */
|
||||
|
||||
src = (AMD_FLASH_CELL *)source;
|
||||
dst = (AMD_FLASH_CELL *)dest;
|
||||
src = (AMD_FLASH_CELL *)source;
|
||||
dst = (AMD_FLASH_CELL *)dest;
|
||||
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
|
||||
/*
|
||||
* Erase device if necessary
|
||||
*/
|
||||
if (erase)
|
||||
{
|
||||
amd_flash_erase(dest, bytes, putchar);
|
||||
}
|
||||
/*
|
||||
* Erase device if necessary
|
||||
*/
|
||||
if (erase)
|
||||
{
|
||||
amd_flash_erase(dest, bytes, putchar);
|
||||
}
|
||||
|
||||
/*
|
||||
* Program device
|
||||
*/
|
||||
while (bytes > 0)
|
||||
{
|
||||
amd_flash_program_cell(dst,*src);
|
||||
/*
|
||||
* Program device
|
||||
*/
|
||||
while (bytes > 0)
|
||||
{
|
||||
amd_flash_program_cell(dst,*src);
|
||||
|
||||
/* Verify Write */
|
||||
if (*dst == *src)
|
||||
{
|
||||
bytes -= AMD_FLASH_CELL_BYTES;
|
||||
*dst++, *src++;
|
||||
/* Verify Write */
|
||||
if (*dst == *src)
|
||||
{
|
||||
bytes -= AMD_FLASH_CELL_BYTES;
|
||||
*dst++, *src++;
|
||||
|
||||
if ((putchar != NULL))
|
||||
{
|
||||
/* Hash marks to indicate progress */
|
||||
if (hashj == 0x1000)
|
||||
{
|
||||
hashj = -1;
|
||||
putchar(hash[0]);
|
||||
putchar(hash[hashi]);
|
||||
if ((putchar != NULL))
|
||||
{
|
||||
/* Hash marks to indicate progress */
|
||||
if (hashj == 0x1000)
|
||||
{
|
||||
hashj = -1;
|
||||
putchar(hash[0]);
|
||||
putchar(hash[hashi]);
|
||||
|
||||
hashi++;
|
||||
if (hashi == 5)
|
||||
{
|
||||
hashi=1;
|
||||
}
|
||||
hashi++;
|
||||
if (hashi == 5)
|
||||
{
|
||||
hashi=1;
|
||||
}
|
||||
|
||||
}
|
||||
hashj++;
|
||||
}
|
||||
}
|
||||
else
|
||||
break;
|
||||
}
|
||||
}
|
||||
hashj++;
|
||||
}
|
||||
}
|
||||
else
|
||||
break;
|
||||
}
|
||||
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
/*
|
||||
* Place device in read mode
|
||||
*/
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
|
||||
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar(hash[0]);
|
||||
}
|
||||
if (putchar != NULL)
|
||||
{
|
||||
putchar(hash[0]);
|
||||
}
|
||||
|
||||
/*
|
||||
* If a function was passed in, call it now
|
||||
*/
|
||||
if ((func != NULL))
|
||||
{
|
||||
func();
|
||||
}
|
||||
/*
|
||||
* If a function was passed in, call it now
|
||||
*/
|
||||
if ((func != NULL))
|
||||
{
|
||||
func();
|
||||
}
|
||||
|
||||
return ((int)src - (int)source);
|
||||
return ((int)src - (int)source);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -635,7 +634,7 @@ void basflash(void)
|
||||
if (strlen(fileinfo.fname) >= 4
|
||||
&& strncmp(
|
||||
&fileinfo.fname[strlen(fileinfo.fname)
|
||||
- 4], srec_ext, 4) == 0) /* we have a .S19 file */
|
||||
- 4], srec_ext, 4) == 0) /* we have a .S19 file */
|
||||
{
|
||||
/*
|
||||
* build path + filename
|
||||
|
||||
@@ -21,7 +21,7 @@
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
static uint32_t ownstack[4096];
|
||||
static uint32_t *stackptr = &ownstack[4095];
|
||||
|
||||
289
flash/flash.c
289
flash/flash.c
@@ -1,10 +1,9 @@
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include "bas_types.h"
|
||||
|
||||
#if MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#elif MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
@@ -16,8 +15,8 @@
|
||||
|
||||
struct amd_flash_sector_info
|
||||
{
|
||||
uint32_t size; /* sector size in bytes */
|
||||
uint32_t offset; /* offset from base of device */
|
||||
uint32_t size; /* sector size in bytes */
|
||||
uint32_t offset; /* offset from base of device */
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -25,134 +24,134 @@ struct amd_flash_sector_info
|
||||
*/
|
||||
static struct amd_flash_sector_info sector[] =
|
||||
{
|
||||
{ 8 * 1024, 0x00000000 }, /* SA0 */
|
||||
{ 8 * 1024, 0x00008000 }, /* SA1 */
|
||||
{ 8 * 1024, 0x00010000 }, /* SA2 */
|
||||
{ 8 * 1024, 0x00018000 }, /* SA3 */
|
||||
{ 8 * 1024, 0x00020000 }, /* SA4 */
|
||||
{ 8 * 1024, 0x00028000 }, /* SA5 */
|
||||
{ 8 * 1024, 0x00030000 }, /* SA6 */
|
||||
{ 8 * 1024, 0x00038000 }, /* SA7 */
|
||||
{ 8 * 1024, 0x00040000 }, /* SA8 */
|
||||
{ 64 * 1024, 0x00048000 }, /* SA9 */
|
||||
{ 64 * 1024, 0x00050000 }, /* SA10 */
|
||||
{ 64 * 1024, 0x00058000 }, /* SA11 */
|
||||
{ 64 * 1024, 0x00060000 }, /* SA12 */
|
||||
{ 64 * 1024, 0x00068000 }, /* SA13 */
|
||||
{ 64 * 1024, 0x00070000 }, /* SA14 */
|
||||
{ 64 * 1024, 0x00078000 }, /* SA15 */
|
||||
{ 64 * 1024, 0x00080000 }, /* SA16 */
|
||||
{ 64 * 1024, 0x00088000 }, /* SA17 */
|
||||
{ 64 * 1024, 0x00090000 }, /* SA18 */
|
||||
{ 64 * 1024, 0x00098000 }, /* SA19 */
|
||||
{ 64 * 1024, 0x000a0000 }, /* SA20 */
|
||||
{ 64 * 1024, 0x000a8000 }, /* SA21 */
|
||||
{ 64 * 1024, 0x000b0000 }, /* SA22 */
|
||||
{ 64 * 1024, 0x000b8000 }, /* SA23 */
|
||||
{ 64 * 1024, 0x000c0000 }, /* SA24 */
|
||||
{ 64 * 1024, 0x000c8000 }, /* SA25 */
|
||||
{ 64 * 1024, 0x000d0000 }, /* SA26 */
|
||||
{ 64 * 1024, 0x000d8000 }, /* SA27 */
|
||||
{ 64 * 1024, 0x000e0000 }, /* SA28 */
|
||||
{ 64 * 1024, 0x000e8000 }, /* SA29 */
|
||||
{ 64 * 1024, 0x000f0000 }, /* SA30 */
|
||||
{ 64 * 1024, 0x000f8000 }, /* SA31 */
|
||||
{ 64 * 1024, 0x00100000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00108000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00110000 }, /* SA34 */
|
||||
{ 64 * 1024, 0x00118000 }, /* SA35 */
|
||||
{ 64 * 1024, 0x00120000 }, /* SA36 */
|
||||
{ 64 * 1024, 0x00128000 }, /* SA37 */
|
||||
{ 64 * 1024, 0x00130000 }, /* SA38 */
|
||||
{ 64 * 1024, 0x00138000 }, /* SA39 */
|
||||
{ 64 * 1024, 0x00140000 }, /* SA40 */
|
||||
{ 64 * 1024, 0x00148000 }, /* SA41 */
|
||||
{ 64 * 1024, 0x00150000 }, /* SA42 */
|
||||
{ 64 * 1024, 0x00158000 }, /* SA43 */
|
||||
{ 64 * 1024, 0x00160000 }, /* SA44 */
|
||||
{ 64 * 1024, 0x00168000 }, /* SA45 */
|
||||
{ 64 * 1024, 0x00170000 }, /* SA46 */
|
||||
{ 64 * 1024, 0x00178000 }, /* SA47 */
|
||||
{ 64 * 1024, 0x00180000 }, /* SA48 */
|
||||
{ 64 * 1024, 0x00188000 }, /* SA49 */
|
||||
{ 64 * 1024, 0x00190000 }, /* SA50 */
|
||||
{ 64 * 1024, 0x00198000 }, /* SA51 */
|
||||
{ 64 * 1024, 0x001a0000 }, /* SA52 */
|
||||
{ 64 * 1024, 0x001a8000 }, /* SA53 */
|
||||
{ 64 * 1024, 0x001b0000 }, /* SA54 */
|
||||
{ 64 * 1024, 0x001b8000 }, /* SA55 */
|
||||
{ 64 * 1024, 0x001c0000 }, /* SA56 */
|
||||
{ 64 * 1024, 0x001c8000 }, /* SA57 */
|
||||
{ 64 * 1024, 0x001d0000 }, /* SA58 */
|
||||
{ 64 * 1024, 0x001d8000 }, /* SA59 */
|
||||
{ 64 * 1024, 0x001e0000 }, /* SA60 */
|
||||
{ 64 * 1024, 0x001e8000 }, /* SA61 */
|
||||
{ 64 * 1024, 0x001f0000 }, /* SA62 */
|
||||
{ 64 * 1024, 0x001f8000 }, /* SA63 */
|
||||
{ 64 * 1024, 0x00200000 }, /* SA64 */
|
||||
{ 64 * 1024, 0x00208000 }, /* SA65 */
|
||||
{ 64 * 1024, 0x00210000 }, /* SA66 */
|
||||
{ 64 * 1024, 0x00218000 }, /* SA67 */
|
||||
{ 64 * 1024, 0x00220000 }, /* SA68 */
|
||||
{ 64 * 1024, 0x00228000 }, /* SA69 */
|
||||
{ 64 * 1024, 0x00230000 }, /* SA70 */
|
||||
{ 64 * 1024, 0x00238000 }, /* SA71 */
|
||||
{ 64 * 1024, 0x00240000 }, /* SA72 */
|
||||
{ 64 * 1024, 0x00248000 }, /* SA73 */
|
||||
{ 64 * 1024, 0x00250000 }, /* SA74 */
|
||||
{ 64 * 1024, 0x00258000 }, /* SA75 */
|
||||
{ 64 * 1024, 0x00260000 }, /* SA76 */
|
||||
{ 64 * 1024, 0x00268000 }, /* SA77 */
|
||||
{ 64 * 1024, 0x00270000 }, /* SA78 */
|
||||
{ 64 * 1024, 0x00278000 }, /* SA79 */
|
||||
{ 64 * 1024, 0x00280000 }, /* SA80 */
|
||||
{ 64 * 1024, 0x00288000 }, /* SA81 */
|
||||
{ 64 * 1024, 0x00290000 }, /* SA82 */
|
||||
{ 64 * 1024, 0x00298000 }, /* SA83 */
|
||||
{ 64 * 1024, 0x002a0000 }, /* SA84 */
|
||||
{ 64 * 1024, 0x002a8000 }, /* SA85 */
|
||||
{ 64 * 1024, 0x002b0000 }, /* SA86 */
|
||||
{ 64 * 1024, 0x002b8000 }, /* SA87 */
|
||||
{ 64 * 1024, 0x002c0000 }, /* SA88 */
|
||||
{ 64 * 1024, 0x002c8000 }, /* SA89 */
|
||||
{ 64 * 1024, 0x002d0000 }, /* SA90 */
|
||||
{ 64 * 1024, 0x002d8000 }, /* SA91 */
|
||||
{ 64 * 1024, 0x002e0000 }, /* SA92 */
|
||||
{ 64 * 1024, 0x002e8000 }, /* SA93 */
|
||||
{ 64 * 1024, 0x002f0000 }, /* SA94 */
|
||||
{ 64 * 1024, 0x002f8000 }, /* SA95 */
|
||||
{ 64 * 1024, 0x00300000 }, /* SA96 */
|
||||
{ 64 * 1024, 0x00308000 }, /* SA97 */
|
||||
{ 64 * 1024, 0x00310000 }, /* SA98 */
|
||||
{ 64 * 1024, 0x00318000 }, /* SA99 */
|
||||
{ 64 * 1024, 0x00320000 }, /* SA100 */
|
||||
{ 64 * 1024, 0x00328000 }, /* SA101 */
|
||||
{ 64 * 1024, 0x00330000 }, /* SA102 */
|
||||
{ 64 * 1024, 0x00338000 }, /* SA103 */
|
||||
{ 64 * 1024, 0x00340000 }, /* SA104 */
|
||||
{ 64 * 1024, 0x00348000 }, /* SA105 */
|
||||
{ 64 * 1024, 0x00350000 }, /* SA106 */
|
||||
{ 64 * 1024, 0x00358000 }, /* SA107 */
|
||||
{ 64 * 1024, 0x00360000 }, /* SA108 */
|
||||
{ 64 * 1024, 0x00368000 }, /* SA109 */
|
||||
{ 64 * 1024, 0x00370000 }, /* SA110 */
|
||||
{ 64 * 1024, 0x00378000 }, /* SA111 */
|
||||
{ 64 * 1024, 0x00380000 }, /* SA112 */
|
||||
{ 64 * 1024, 0x00388000 }, /* SA113 */
|
||||
{ 64 * 1024, 0x00390000 }, /* SA114 */
|
||||
{ 64 * 1024, 0x00398000 }, /* SA115 */
|
||||
{ 64 * 1024, 0x003a0000 }, /* SA116 */
|
||||
{ 64 * 1024, 0x003a8000 }, /* SA117 */
|
||||
{ 64 * 1024, 0x003b0000 }, /* SA118 */
|
||||
{ 64 * 1024, 0x003b8000 }, /* SA119 */
|
||||
{ 64 * 1024, 0x003c0000 }, /* SA120 */
|
||||
{ 64 * 1024, 0x003c8000 }, /* SA121 */
|
||||
{ 64 * 1024, 0x003d0000 }, /* SA122 */
|
||||
{ 64 * 1024, 0x003d8000 }, /* SA123 */
|
||||
{ 64 * 1024, 0x003e0000 }, /* SA124 */
|
||||
{ 64 * 1024, 0x003e8000 }, /* SA125 */
|
||||
{ 64 * 1024, 0x003f0000 }, /* SA126 */
|
||||
{ 64 * 1024, 0x003f8000 }, /* SA127 */
|
||||
{ 8 * 1024, 0x00000000 }, /* SA0 */
|
||||
{ 8 * 1024, 0x00008000 }, /* SA1 */
|
||||
{ 8 * 1024, 0x00010000 }, /* SA2 */
|
||||
{ 8 * 1024, 0x00018000 }, /* SA3 */
|
||||
{ 8 * 1024, 0x00020000 }, /* SA4 */
|
||||
{ 8 * 1024, 0x00028000 }, /* SA5 */
|
||||
{ 8 * 1024, 0x00030000 }, /* SA6 */
|
||||
{ 8 * 1024, 0x00038000 }, /* SA7 */
|
||||
{ 8 * 1024, 0x00040000 }, /* SA8 */
|
||||
{ 64 * 1024, 0x00048000 }, /* SA9 */
|
||||
{ 64 * 1024, 0x00050000 }, /* SA10 */
|
||||
{ 64 * 1024, 0x00058000 }, /* SA11 */
|
||||
{ 64 * 1024, 0x00060000 }, /* SA12 */
|
||||
{ 64 * 1024, 0x00068000 }, /* SA13 */
|
||||
{ 64 * 1024, 0x00070000 }, /* SA14 */
|
||||
{ 64 * 1024, 0x00078000 }, /* SA15 */
|
||||
{ 64 * 1024, 0x00080000 }, /* SA16 */
|
||||
{ 64 * 1024, 0x00088000 }, /* SA17 */
|
||||
{ 64 * 1024, 0x00090000 }, /* SA18 */
|
||||
{ 64 * 1024, 0x00098000 }, /* SA19 */
|
||||
{ 64 * 1024, 0x000a0000 }, /* SA20 */
|
||||
{ 64 * 1024, 0x000a8000 }, /* SA21 */
|
||||
{ 64 * 1024, 0x000b0000 }, /* SA22 */
|
||||
{ 64 * 1024, 0x000b8000 }, /* SA23 */
|
||||
{ 64 * 1024, 0x000c0000 }, /* SA24 */
|
||||
{ 64 * 1024, 0x000c8000 }, /* SA25 */
|
||||
{ 64 * 1024, 0x000d0000 }, /* SA26 */
|
||||
{ 64 * 1024, 0x000d8000 }, /* SA27 */
|
||||
{ 64 * 1024, 0x000e0000 }, /* SA28 */
|
||||
{ 64 * 1024, 0x000e8000 }, /* SA29 */
|
||||
{ 64 * 1024, 0x000f0000 }, /* SA30 */
|
||||
{ 64 * 1024, 0x000f8000 }, /* SA31 */
|
||||
{ 64 * 1024, 0x00100000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00108000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00110000 }, /* SA34 */
|
||||
{ 64 * 1024, 0x00118000 }, /* SA35 */
|
||||
{ 64 * 1024, 0x00120000 }, /* SA36 */
|
||||
{ 64 * 1024, 0x00128000 }, /* SA37 */
|
||||
{ 64 * 1024, 0x00130000 }, /* SA38 */
|
||||
{ 64 * 1024, 0x00138000 }, /* SA39 */
|
||||
{ 64 * 1024, 0x00140000 }, /* SA40 */
|
||||
{ 64 * 1024, 0x00148000 }, /* SA41 */
|
||||
{ 64 * 1024, 0x00150000 }, /* SA42 */
|
||||
{ 64 * 1024, 0x00158000 }, /* SA43 */
|
||||
{ 64 * 1024, 0x00160000 }, /* SA44 */
|
||||
{ 64 * 1024, 0x00168000 }, /* SA45 */
|
||||
{ 64 * 1024, 0x00170000 }, /* SA46 */
|
||||
{ 64 * 1024, 0x00178000 }, /* SA47 */
|
||||
{ 64 * 1024, 0x00180000 }, /* SA48 */
|
||||
{ 64 * 1024, 0x00188000 }, /* SA49 */
|
||||
{ 64 * 1024, 0x00190000 }, /* SA50 */
|
||||
{ 64 * 1024, 0x00198000 }, /* SA51 */
|
||||
{ 64 * 1024, 0x001a0000 }, /* SA52 */
|
||||
{ 64 * 1024, 0x001a8000 }, /* SA53 */
|
||||
{ 64 * 1024, 0x001b0000 }, /* SA54 */
|
||||
{ 64 * 1024, 0x001b8000 }, /* SA55 */
|
||||
{ 64 * 1024, 0x001c0000 }, /* SA56 */
|
||||
{ 64 * 1024, 0x001c8000 }, /* SA57 */
|
||||
{ 64 * 1024, 0x001d0000 }, /* SA58 */
|
||||
{ 64 * 1024, 0x001d8000 }, /* SA59 */
|
||||
{ 64 * 1024, 0x001e0000 }, /* SA60 */
|
||||
{ 64 * 1024, 0x001e8000 }, /* SA61 */
|
||||
{ 64 * 1024, 0x001f0000 }, /* SA62 */
|
||||
{ 64 * 1024, 0x001f8000 }, /* SA63 */
|
||||
{ 64 * 1024, 0x00200000 }, /* SA64 */
|
||||
{ 64 * 1024, 0x00208000 }, /* SA65 */
|
||||
{ 64 * 1024, 0x00210000 }, /* SA66 */
|
||||
{ 64 * 1024, 0x00218000 }, /* SA67 */
|
||||
{ 64 * 1024, 0x00220000 }, /* SA68 */
|
||||
{ 64 * 1024, 0x00228000 }, /* SA69 */
|
||||
{ 64 * 1024, 0x00230000 }, /* SA70 */
|
||||
{ 64 * 1024, 0x00238000 }, /* SA71 */
|
||||
{ 64 * 1024, 0x00240000 }, /* SA72 */
|
||||
{ 64 * 1024, 0x00248000 }, /* SA73 */
|
||||
{ 64 * 1024, 0x00250000 }, /* SA74 */
|
||||
{ 64 * 1024, 0x00258000 }, /* SA75 */
|
||||
{ 64 * 1024, 0x00260000 }, /* SA76 */
|
||||
{ 64 * 1024, 0x00268000 }, /* SA77 */
|
||||
{ 64 * 1024, 0x00270000 }, /* SA78 */
|
||||
{ 64 * 1024, 0x00278000 }, /* SA79 */
|
||||
{ 64 * 1024, 0x00280000 }, /* SA80 */
|
||||
{ 64 * 1024, 0x00288000 }, /* SA81 */
|
||||
{ 64 * 1024, 0x00290000 }, /* SA82 */
|
||||
{ 64 * 1024, 0x00298000 }, /* SA83 */
|
||||
{ 64 * 1024, 0x002a0000 }, /* SA84 */
|
||||
{ 64 * 1024, 0x002a8000 }, /* SA85 */
|
||||
{ 64 * 1024, 0x002b0000 }, /* SA86 */
|
||||
{ 64 * 1024, 0x002b8000 }, /* SA87 */
|
||||
{ 64 * 1024, 0x002c0000 }, /* SA88 */
|
||||
{ 64 * 1024, 0x002c8000 }, /* SA89 */
|
||||
{ 64 * 1024, 0x002d0000 }, /* SA90 */
|
||||
{ 64 * 1024, 0x002d8000 }, /* SA91 */
|
||||
{ 64 * 1024, 0x002e0000 }, /* SA92 */
|
||||
{ 64 * 1024, 0x002e8000 }, /* SA93 */
|
||||
{ 64 * 1024, 0x002f0000 }, /* SA94 */
|
||||
{ 64 * 1024, 0x002f8000 }, /* SA95 */
|
||||
{ 64 * 1024, 0x00300000 }, /* SA96 */
|
||||
{ 64 * 1024, 0x00308000 }, /* SA97 */
|
||||
{ 64 * 1024, 0x00310000 }, /* SA98 */
|
||||
{ 64 * 1024, 0x00318000 }, /* SA99 */
|
||||
{ 64 * 1024, 0x00320000 }, /* SA100 */
|
||||
{ 64 * 1024, 0x00328000 }, /* SA101 */
|
||||
{ 64 * 1024, 0x00330000 }, /* SA102 */
|
||||
{ 64 * 1024, 0x00338000 }, /* SA103 */
|
||||
{ 64 * 1024, 0x00340000 }, /* SA104 */
|
||||
{ 64 * 1024, 0x00348000 }, /* SA105 */
|
||||
{ 64 * 1024, 0x00350000 }, /* SA106 */
|
||||
{ 64 * 1024, 0x00358000 }, /* SA107 */
|
||||
{ 64 * 1024, 0x00360000 }, /* SA108 */
|
||||
{ 64 * 1024, 0x00368000 }, /* SA109 */
|
||||
{ 64 * 1024, 0x00370000 }, /* SA110 */
|
||||
{ 64 * 1024, 0x00378000 }, /* SA111 */
|
||||
{ 64 * 1024, 0x00380000 }, /* SA112 */
|
||||
{ 64 * 1024, 0x00388000 }, /* SA113 */
|
||||
{ 64 * 1024, 0x00390000 }, /* SA114 */
|
||||
{ 64 * 1024, 0x00398000 }, /* SA115 */
|
||||
{ 64 * 1024, 0x003a0000 }, /* SA116 */
|
||||
{ 64 * 1024, 0x003a8000 }, /* SA117 */
|
||||
{ 64 * 1024, 0x003b0000 }, /* SA118 */
|
||||
{ 64 * 1024, 0x003b8000 }, /* SA119 */
|
||||
{ 64 * 1024, 0x003c0000 }, /* SA120 */
|
||||
{ 64 * 1024, 0x003c8000 }, /* SA121 */
|
||||
{ 64 * 1024, 0x003d0000 }, /* SA122 */
|
||||
{ 64 * 1024, 0x003d8000 }, /* SA123 */
|
||||
{ 64 * 1024, 0x003e0000 }, /* SA124 */
|
||||
{ 64 * 1024, 0x003e8000 }, /* SA125 */
|
||||
{ 64 * 1024, 0x003f0000 }, /* SA126 */
|
||||
{ 64 * 1024, 0x003f8000 }, /* SA127 */
|
||||
};
|
||||
|
||||
static const int AMD_FLASH_SECTORS = sizeof(sector) / sizeof(struct amd_flash_sector_info);
|
||||
@@ -167,17 +166,17 @@ static AMD_FLASH_CELL *pFlash;
|
||||
|
||||
typedef struct romram
|
||||
{
|
||||
uint32_t flash_address;
|
||||
uint32_t ram_address;
|
||||
char *name;
|
||||
uint32_t flash_address;
|
||||
uint32_t ram_address;
|
||||
char *name;
|
||||
} ROMRAM;
|
||||
|
||||
static const struct romram flash_areas[] =
|
||||
{
|
||||
{ 0xe0000000, 0x00e00000, "BaS" }, /* BaS */
|
||||
{ 0xe0600000, 0x00e00000, "EmuTOS" }, /* EmuTOS */
|
||||
{ 0xe0400000, 0x00e00000, "FireTOS" }, /* FireTOS */
|
||||
{ 0xe0700000, 0x00e00000, "FPGA" }, /* FPGA config */
|
||||
{ 0xe0000000, 0x00e00000, "BaS" }, /* BaS */
|
||||
{ 0xe0600000, 0x00e00000, "EmuTOS" }, /* EmuTOS */
|
||||
{ 0xe0400000, 0x00e00000, "FireTOS" }, /* FireTOS */
|
||||
{ 0xe0700000, 0x00e00000, "FPGA" }, /* FPGA config */
|
||||
};
|
||||
static const int num_flash_areas = sizeof(flash_areas) / sizeof(struct romram);
|
||||
|
||||
@@ -223,7 +222,7 @@ int amd_flash_erase(void *start, int bytes, void (*putchar)(int))
|
||||
for (i = 0; i < AMD_FLASH_SECTORS; i++)
|
||||
{
|
||||
if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
|
||||
start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
|
||||
start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
@@ -268,7 +267,7 @@ void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
@@ -276,7 +275,7 @@ void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
@@ -292,9 +291,9 @@ void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
|
||||
int amd_flash_program(void *dest, void *source, int bytes, int erase, void (*func)(void), void (*putchar)(int))
|
||||
{
|
||||
AMD_FLASH_CELL *src;
|
||||
AMD_FLASH_CELL *dst;
|
||||
AMD_FLASH_CELL *dst;
|
||||
int hashi = 1;
|
||||
int hashj = 0;
|
||||
int hashj = 0;
|
||||
char hash[5];
|
||||
|
||||
hash[0] = 8; /* Backspace */
|
||||
|
||||
@@ -23,8 +23,7 @@
|
||||
* Copyright 2012 M. Froeschle
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
#include "bas_printf.h"
|
||||
#include "bas_string.h"
|
||||
@@ -41,33 +40,33 @@
|
||||
* and finally ended up with this. Not nice, put paid (and working).
|
||||
*
|
||||
*/
|
||||
#define SREC_TYPE(a) (a)[0] /* type of record */
|
||||
#define SREC_COUNT(a) (a)[1] /* length of valid bytes to follow */
|
||||
#define SREC_ADDR16(a) (256 * (a)[2] + (a)[3]) /* 2 byte address field */
|
||||
#define SREC_ADDR24(a) (0x10000 * (a)[2] + 0x100 * \
|
||||
(a)[3] + (a)[4]) /* 3 byte address field */
|
||||
#define SREC_TYPE(a) (a)[0] /* type of record */
|
||||
#define SREC_COUNT(a) (a)[1] /* length of valid bytes to follow */
|
||||
#define SREC_ADDR16(a) (256 * (a)[2] + (a)[3]) /* 2 byte address field */
|
||||
#define SREC_ADDR24(a) (0x10000 * (a)[2] + 0x100 * \
|
||||
(a)[3] + (a)[4]) /* 3 byte address field */
|
||||
#define SREC_ADDR32(a) (0x1000000 * a[2] + 0x10000 * \
|
||||
a[3] + 0x100 * (a)[4] + (a)[5]) /* 4 byte address field */
|
||||
#define SREC_DATA16(a) ((uint8_t *)&((a)[4])) /* address of first byte of data in a record */
|
||||
#define SREC_DATA24(a) ((uint8_t *)&((a)[5])) /* address of first data byte in 24 bit record */
|
||||
#define SREC_DATA32(a) ((uint8_t *)&((a)[6])) /* adress of first byte of a record with 32 bit address field */
|
||||
#define SREC_DATA16_SIZE(a) (SREC_COUNT((a)) - 3) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA24_SIZE(a) (SREC_COUNT((a)) - 4) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA32_SIZE(a) (SREC_COUNT((a)) - 5) /* length of the data[] array without the checksum field */
|
||||
#define SREC_CHECKSUM(a) (a)[SREC_COUNT(a) + 2 - 1] /* record's checksum (two's complement of the sum of all bytes) */
|
||||
(a)[3] + 0x100 * (a)[4] + (a)[5]) /* 4 byte address field */
|
||||
#define SREC_DATA16(a) ((uint8_t *)&((a)[4])) /* address of first byte of data in a record */
|
||||
#define SREC_DATA24(a) ((uint8_t *)&((a)[5])) /* address of first data byte in 24 bit record */
|
||||
#define SREC_DATA32(a) ((uint8_t *)&((a)[6])) /* adress of first byte of a record with 32 bit address field */
|
||||
#define SREC_DATA16_SIZE(a) (SREC_COUNT((a)) - 3) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA24_SIZE(a) (SREC_COUNT((a)) - 4) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA32_SIZE(a) (SREC_COUNT((a)) - 5) /* length of the data[] array without the checksum field */
|
||||
#define SREC_CHECKSUM(a) (a)[SREC_COUNT(a) + 2 - 1] /* record's checksum (two's complement of the sum of all bytes) */
|
||||
|
||||
/*
|
||||
* convert a single hex character into byte
|
||||
*/
|
||||
static uint8_t nibble_to_byte(uint8_t nibble)
|
||||
{
|
||||
if ((nibble >= '0') && (nibble <= '9'))
|
||||
return nibble - '0';
|
||||
else if ((nibble >= 'A' && nibble <= 'F'))
|
||||
return 10 + nibble - 'A';
|
||||
else if ((nibble >= 'a' && nibble <= 'f'))
|
||||
return 10 + nibble - 'a';
|
||||
return 0;
|
||||
if ((nibble >= '0') && (nibble <= '9'))
|
||||
return nibble - '0';
|
||||
else if ((nibble >= 'A' && nibble <= 'F'))
|
||||
return 10 + nibble - 'A';
|
||||
else if ((nibble >= 'a' && nibble <= 'f'))
|
||||
return 10 + nibble - 'a';
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -75,7 +74,7 @@ static uint8_t nibble_to_byte(uint8_t nibble)
|
||||
*/
|
||||
static uint8_t hex_to_byte(uint8_t hex[2])
|
||||
{
|
||||
return 16 * (nibble_to_byte(hex[0])) + (nibble_to_byte(hex[1]));
|
||||
return 16 * (nibble_to_byte(hex[0])) + (nibble_to_byte(hex[1]));
|
||||
}
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
@@ -84,7 +83,7 @@ static uint8_t hex_to_byte(uint8_t hex[2])
|
||||
*/
|
||||
static uint16_t hex_to_word(uint8_t hex[4])
|
||||
{
|
||||
return 256 * hex_to_byte(&hex[0]) + hex_to_byte(&hex[2]);
|
||||
return 256 * hex_to_byte(&hex[0]) + hex_to_byte(&hex[2]);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -92,7 +91,7 @@ static uint16_t hex_to_word(uint8_t hex[4])
|
||||
*/
|
||||
static uint32_t hex_to_long(uint8_t hex[8])
|
||||
{
|
||||
return 65536 * hex_to_word(&hex[0]) + hex_to_word(&hex[4]);
|
||||
return 65536 * hex_to_word(&hex[0]) + hex_to_word(&hex[4]);
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
@@ -103,47 +102,47 @@ static uint32_t hex_to_long(uint8_t hex[8])
|
||||
*/
|
||||
static uint8_t checksum(uint8_t arr[])
|
||||
{
|
||||
int i;
|
||||
uint8_t checksum = SREC_COUNT(arr);
|
||||
int i;
|
||||
uint8_t checksum = SREC_COUNT(arr);
|
||||
|
||||
for (i = 0; i < SREC_COUNT(arr) - 1; i++)
|
||||
{
|
||||
checksum += arr[i + 2];
|
||||
}
|
||||
return ~checksum;
|
||||
for (i = 0; i < SREC_COUNT(arr) - 1; i++)
|
||||
{
|
||||
checksum += arr[i + 2];
|
||||
}
|
||||
return ~checksum;
|
||||
}
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
void print_record(uint8_t *arr)
|
||||
{
|
||||
switch (SREC_TYPE(arr))
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR16(arr));
|
||||
xprintf("module %11.11s ", SREC_DATA16(arr));
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
switch (SREC_TYPE(arr))
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR16(arr));
|
||||
xprintf("module %11.11s ", SREC_DATA16(arr));
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
|
||||
case 3:
|
||||
case 7:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR32(arr));
|
||||
xprintf("data %02x,%02x,%02x,%02x,... ",
|
||||
SREC_DATA32(arr)[0], SREC_DATA32(arr)[1], SREC_DATA32(arr)[3], SREC_DATA32(arr)[4]);
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
case 3:
|
||||
case 7:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR32(arr));
|
||||
xprintf("data %02x,%02x,%02x,%02x,... ",
|
||||
SREC_DATA32(arr)[0], SREC_DATA32(arr)[1], SREC_DATA32(arr)[3], SREC_DATA32(arr)[4]);
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
xprintf("unsupported report type %d in print_record\r\n", arr[0]);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
xprintf("unsupported report type %d in print_record\r\n", arr[0]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
@@ -152,21 +151,21 @@ void print_record(uint8_t *arr)
|
||||
*/
|
||||
static void line_to_vector(uint8_t *buff, uint8_t *vector)
|
||||
{
|
||||
int i;
|
||||
int length;
|
||||
uint8_t *vp = vector;
|
||||
int i;
|
||||
int length;
|
||||
uint8_t *vp = vector;
|
||||
|
||||
length = hex_to_byte(buff + 2);
|
||||
length = hex_to_byte(buff + 2);
|
||||
|
||||
buff++;
|
||||
*vp++ = nibble_to_byte(*buff); /* record type. Only one single nibble */
|
||||
buff++;
|
||||
buff++;
|
||||
*vp++ = nibble_to_byte(*buff); /* record type. Only one single nibble */
|
||||
buff++;
|
||||
|
||||
for (i = 0; i <= length; i++)
|
||||
{
|
||||
*vp++ = hex_to_byte(buff);
|
||||
buff += 2;
|
||||
}
|
||||
for (i = 0; i <= length; i++)
|
||||
{
|
||||
*vp++ = hex_to_byte(buff);
|
||||
buff += 2;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -190,114 +189,114 @@ static void line_to_vector(uint8_t *buff, uint8_t *vector)
|
||||
*/
|
||||
err_t read_srecords(char *filename, void **start_address, uint32_t *actual_length, memcpy_callback_t callback)
|
||||
{
|
||||
FRESULT fres;
|
||||
FIL file;
|
||||
err_t ret = OK;
|
||||
FRESULT fres;
|
||||
FIL file;
|
||||
err_t ret = OK;
|
||||
|
||||
if ((fres = f_open(&file, filename, FA_READ) == FR_OK))
|
||||
{
|
||||
uint8_t line[80];
|
||||
int lineno = 0;
|
||||
int data_records = 0;
|
||||
bool found_block_header = false;
|
||||
bool found_block_end = false;
|
||||
bool found_block_data = false;
|
||||
if ((fres = f_open(&file, filename, FA_READ) == FR_OK))
|
||||
{
|
||||
uint8_t line[80];
|
||||
int lineno = 0;
|
||||
int data_records = 0;
|
||||
bool found_block_header = false;
|
||||
bool found_block_end = false;
|
||||
bool found_block_data = false;
|
||||
|
||||
while (ret == OK && (uint8_t *) f_gets((char *) line, sizeof(line), &file) != NULL)
|
||||
{
|
||||
lineno++;
|
||||
uint8_t vector[80];
|
||||
while (ret == OK && (uint8_t *) f_gets((char *) line, sizeof(line), &file) != NULL)
|
||||
{
|
||||
lineno++;
|
||||
uint8_t vector[80];
|
||||
|
||||
line_to_vector(line, vector); /* vector now contains the decoded contents of line, from line[1] on */
|
||||
line_to_vector(line, vector); /* vector now contains the decoded contents of line, from line[1] on */
|
||||
|
||||
if (line[0] == 'S')
|
||||
{
|
||||
if (SREC_CHECKSUM(vector) != checksum(vector))
|
||||
{
|
||||
xprintf("invalid checksum 0x%x (should be 0x%x) in line %d\r\n",
|
||||
SREC_CHECKSUM(vector), checksum(vector), lineno);
|
||||
ret = FAIL;
|
||||
}
|
||||
if (line[0] == 'S')
|
||||
{
|
||||
if (SREC_CHECKSUM(vector) != checksum(vector))
|
||||
{
|
||||
xprintf("invalid checksum 0x%x (should be 0x%x) in line %d\r\n",
|
||||
SREC_CHECKSUM(vector), checksum(vector), lineno);
|
||||
ret = FAIL;
|
||||
}
|
||||
|
||||
switch (vector[0])
|
||||
{
|
||||
case 0: /* block header */
|
||||
found_block_header = true;
|
||||
if (found_block_data || found_block_end)
|
||||
{
|
||||
xprintf("S7 or S3 record found before S0: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
switch (vector[0])
|
||||
{
|
||||
case 0: /* block header */
|
||||
found_block_header = true;
|
||||
if (found_block_data || found_block_end)
|
||||
{
|
||||
xprintf("S7 or S3 record found before S0: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
|
||||
break;
|
||||
break;
|
||||
|
||||
case 2: /* three byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
ret = callback((uint8_t *) SREC_ADDR24(vector), SREC_DATA24(vector), SREC_DATA24_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
case 2: /* three byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
ret = callback((uint8_t *) SREC_ADDR24(vector), SREC_DATA24(vector), SREC_DATA24_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
|
||||
case 3: /* four byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
ret = callback((uint8_t *) SREC_ADDR32(vector), SREC_DATA32(vector), SREC_DATA32_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
case 3: /* four byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
ret = callback((uint8_t *) SREC_ADDR32(vector), SREC_DATA32(vector), SREC_DATA32_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
|
||||
case 7: /* four byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S7 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR32(vector);
|
||||
}
|
||||
break;
|
||||
case 7: /* four byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S7 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR32(vector);
|
||||
}
|
||||
break;
|
||||
|
||||
case 8: /* three byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S8 record found before S0 or after S8: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR24(vector);
|
||||
}
|
||||
break;
|
||||
case 8: /* three byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S8 record found before S0 or after S8: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR24(vector);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
xprintf("unsupported record type (%d) found in line %d\r\n", vector[0], lineno);
|
||||
xprintf("offending line: \r\n");
|
||||
xprintf("%s\r\n", line);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("illegal character ('%c') found on line %d: S-records corrupt?\r\n", line[0], lineno);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
f_close(&file);
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("could not open file %s\r\n", filename);
|
||||
ret = FILE_OPEN;
|
||||
}
|
||||
return ret;
|
||||
default:
|
||||
xprintf("unsupported record type (%d) found in line %d\r\n", vector[0], lineno);
|
||||
xprintf("offending line: \r\n");
|
||||
xprintf("%s\r\n", line);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("illegal character ('%c') found on line %d: S-records corrupt?\r\n", line[0], lineno);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
f_close(&file);
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("could not open file %s\r\n", filename);
|
||||
ret = FILE_OPEN;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -305,21 +304,21 @@ err_t read_srecords(char *filename, void **start_address, uint32_t *actual_lengt
|
||||
*/
|
||||
static err_t simulate()
|
||||
{
|
||||
err_t ret = OK;
|
||||
err_t ret = OK;
|
||||
|
||||
return ret;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
{
|
||||
err_t ret = OK;
|
||||
err_t ret = OK;
|
||||
|
||||
/* TODO: do the actual flash */
|
||||
amd_flash_program(dst, src, length, false, NULL, xputchar);
|
||||
/* TODO: do the actual flash */
|
||||
amd_flash_program(dst, src, length, false, NULL, xputchar);
|
||||
|
||||
return ret;
|
||||
return ret;
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
@@ -327,93 +326,104 @@ static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
/*
|
||||
* this callback verifies the data against the S-record file contents after a write to destination
|
||||
*/
|
||||
static err_t verify(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
static err_t verify(uint8_t *dst, uint8_t *src, size_t length)
|
||||
{
|
||||
uint8_t *end = src + length;
|
||||
uint8_t *end = src + length;
|
||||
|
||||
do
|
||||
{
|
||||
if (*src++ != *dst++)
|
||||
return FAIL;
|
||||
} while (src < end);
|
||||
do
|
||||
{
|
||||
if (*src++ != *dst++)
|
||||
return FAIL;
|
||||
} while (src < end);
|
||||
|
||||
return OK;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/*
|
||||
* needed to avoid missing type cast warning below
|
||||
*/
|
||||
static inline err_t srec_memcpy(uint8_t *dst, uint8_t *src, size_t n)
|
||||
{
|
||||
err_t e = OK;
|
||||
|
||||
memcpy((void *) dst, (void *) src, n);
|
||||
return e;
|
||||
}
|
||||
|
||||
void srec_execute(char *flasher_filename)
|
||||
{
|
||||
DRESULT res;
|
||||
FRESULT fres;
|
||||
FATFS fs;
|
||||
FIL file;
|
||||
err_t err;
|
||||
void *start_address;
|
||||
uint32_t length;
|
||||
DRESULT res;
|
||||
FRESULT fres;
|
||||
FATFS fs;
|
||||
FIL file;
|
||||
err_t err;
|
||||
void *start_address;
|
||||
uint32_t length;
|
||||
|
||||
disk_initialize(0);
|
||||
res = disk_status(0);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
if ((fres = f_open(&file, flasher_filename, FA_READ) != FR_OK))
|
||||
{
|
||||
xprintf("flasher file %s not present on disk\r\n", flasher_filename);
|
||||
}
|
||||
else
|
||||
{
|
||||
f_close(&file);
|
||||
disk_initialize(0);
|
||||
res = disk_status(0);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
if ((fres = f_open(&file, flasher_filename, FA_READ) != FR_OK))
|
||||
{
|
||||
xprintf("flasher file %s not present on disk\r\n", flasher_filename);
|
||||
}
|
||||
else
|
||||
{
|
||||
f_close(&file);
|
||||
|
||||
/* first pass: parse and check for inconsistencies */
|
||||
xprintf("check file integrity: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, simulate);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: copy data to destination */
|
||||
xprintf("OK.\r\ncopy/flash data: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, memcpy);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: verify data */
|
||||
xprintf("OK.\r\nverify data: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, verify);
|
||||
if (err == OK)
|
||||
{
|
||||
xprintf("OK.\r\n");
|
||||
typedef void void_func(void);
|
||||
void_func *func;
|
||||
xprintf("target successfully written and verified. Start address: %p\r\n", start_address);
|
||||
/* first pass: parse and check for inconsistencies */
|
||||
xprintf("check file integrity: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, simulate);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: copy data to destination */
|
||||
xprintf("OK.\r\ncopy/flash data: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, srec_memcpy);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: verify data */
|
||||
xprintf("OK.\r\nverify data: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, verify);
|
||||
if (err == OK)
|
||||
{
|
||||
xprintf("OK.\r\n");
|
||||
typedef void void_func(void);
|
||||
void_func *func;
|
||||
xprintf("target successfully written and verified. Start address: %p\r\n", start_address);
|
||||
|
||||
func = start_address;
|
||||
flush_and_invalidate_caches();
|
||||
(*func)();
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not mount FAT FS\r\n");
|
||||
}
|
||||
f_mount(0, NULL);
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not initialize SD card\r\n");
|
||||
}
|
||||
func = start_address;
|
||||
flush_and_invalidate_caches();
|
||||
(*func)();
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not mount FAT FS\r\n");
|
||||
}
|
||||
f_mount(0, NULL);
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not initialize SD card\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -1,71 +1,53 @@
|
||||
#!/usr/local/bin/bdmctrl
|
||||
#!/usr/local/bin/bdmctrl -D2
|
||||
#
|
||||
# firebee board initialization for bdmctrl
|
||||
#
|
||||
open $1
|
||||
reset
|
||||
sleep 10
|
||||
sleep 1
|
||||
|
||||
wait
|
||||
|
||||
# Turn on MBAR at 0xFF00_0000
|
||||
write-ctrl 0x0C0F 0xFF000000
|
||||
|
||||
# set VBR
|
||||
write-ctrl 0x0801 0x00000000
|
||||
|
||||
#
|
||||
# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
|
||||
write 0xFF000500 0xE0000000 4
|
||||
write 0xFF000508 0x00001180 4
|
||||
write 0xFF000504 0x007F0001 4
|
||||
|
||||
# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
|
||||
write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
|
||||
write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
|
||||
write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
|
||||
write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
|
||||
write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
|
||||
write 0xFF000108 0x73622830 4 # SDCFG1
|
||||
write 0xFF00010C 0x46770000 4 # SDCFG2
|
||||
|
||||
write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
|
||||
write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
|
||||
write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
|
||||
sleep 100
|
||||
write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
|
||||
write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
|
||||
write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
|
||||
write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
|
||||
write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
|
||||
sleep 10
|
||||
|
||||
|
||||
# use system sdram as flashlib scratch area.
|
||||
# TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
|
||||
# This seems to be related to large flash buffers and PC-relative adressing of the plugin
|
||||
flash-plugin 0x1000 0xf000 flash29.plugin
|
||||
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
|
||||
flash 0xE0000000
|
||||
flash 0xe0000000
|
||||
|
||||
# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS)
|
||||
#
|
||||
# Caution: sector offset numbers need to be the ones from the x16 address range
|
||||
# column and they vary in size - needs to be exactly as in the data sheet (p. 9)
|
||||
#
|
||||
# contrary to documentation, it seems we need to erase-wait after each sector
|
||||
|
||||
erase 0xE0000000 0
|
||||
erase 0xE0000000 1
|
||||
erase 0xE0000000 2
|
||||
erase 0xE0000000 3
|
||||
erase 0xE0000000 4
|
||||
erase 0xE0000000 5
|
||||
erase 0xE0000000 7
|
||||
erase 0xE0000000 8
|
||||
erase 0xE0000000 9
|
||||
erase 0xE0000000 10
|
||||
erase-wait 0xE0000000
|
||||
erase 0xe0000000 0
|
||||
erase 0xe0000000 0x1000
|
||||
erase 0xe0000000 0x2000
|
||||
erase 0xe0000000 0x3000
|
||||
erase 0xe0000000 0x4000
|
||||
erase 0xe0000000 0x5000
|
||||
erase 0xe0000000 0x6000
|
||||
erase 0xe0000000 0x7000
|
||||
erase 0xe0000000 0x8000
|
||||
erase 0xe0000000 0x10000
|
||||
erase 0xe0000000 0x18000
|
||||
erase 0xe0000000 0x20000
|
||||
erase 0xe0000000 0x28000
|
||||
erase 0xe0000000 0x30000
|
||||
erase 0xe0000000 0x38000
|
||||
erase 0xe0000000 0x40000
|
||||
erase 0xe0000000 0x48000
|
||||
erase 0xe0000000 0x50000
|
||||
erase 0xe0000000 0x58000
|
||||
erase 0xe0000000 0x60000
|
||||
erase 0xe0000000 0x70000
|
||||
erase 0xe0000000 0x78000
|
||||
|
||||
erase-wait 0xe0000000
|
||||
# should now have erased from 0xe0000000 to 0xe00fffff
|
||||
|
||||
dump-mem 0xe0010000 0x20 b
|
||||
|
||||
load -v ../firebee/bas.elf
|
||||
wait
|
||||
|
||||
@@ -54,7 +54,7 @@ sleep 10
|
||||
#flash-plugin 0x1000 0xf000 flash29.plugin
|
||||
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
|
||||
flash 0xE0000000
|
||||
flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
#flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
|
||||
# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for bas)
|
||||
#
|
||||
|
||||
@@ -10,20 +10,20 @@ wait
|
||||
write-ctrl 0x0801 0x00000000
|
||||
dump-register VBR
|
||||
|
||||
# Turn on MBAR at 0xFF00_0000
|
||||
write-ctrl 0x0C0F 0xFF000000
|
||||
# Turn on MBAR at 0x1000_0000
|
||||
write-ctrl 0x0C0F 0x10000000
|
||||
dump-register MBAR
|
||||
|
||||
# Turn on RAMBAR0 at address FF10_0000
|
||||
write-ctrl 0x0C04 0xFF100007
|
||||
# Turn on RAMBAR0 at address 2000_0000
|
||||
write-ctrl 0x0C04 0x20000007
|
||||
|
||||
# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently)
|
||||
write-ctrl 0x0C05 0xFF101001
|
||||
write-ctrl 0x0C05 0x20001001
|
||||
|
||||
#
|
||||
# Init CS0 (BootFLASH @ E000_0000 - E03F_FFFF 4Mbytes)
|
||||
write 0xFF000500 0xE0000000 4
|
||||
write 0xFF000508 0x00041180 4
|
||||
# Init CS0 (BootFLASH @ FF80_0000 - FFBF_FFFF 4Mbytes)
|
||||
write 0xFF000500 0xFF800000 4
|
||||
write 0xFF000508 0x00100D80 4
|
||||
write 0xFF000504 0x003F0001 4
|
||||
|
||||
# SDRAM Initialization @ 0000_0000 - 03FF_FFFF 64 Mbytes
|
||||
@@ -52,27 +52,26 @@ sleep 10
|
||||
# This seems to be related to large flash buffers and PC-relative adressing of the plugin
|
||||
#flash-plugin 0x1000 0xf000 flash29.plugin
|
||||
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
|
||||
flash 0xE0000000
|
||||
flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
flash 0xFF800000
|
||||
#flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
|
||||
# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for bas)
|
||||
#
|
||||
# Caution: sector offset numbers need to be the ones from the x16 address range
|
||||
# column and they vary in size - needs to be exactly as in the data sheet (p. 9)
|
||||
# Erase flash from 0xFF800000 to 0xFFBFFFFF (reserved space for bas)
|
||||
#
|
||||
# contrary to documentation, it seems we need to erase-wait after each sector
|
||||
|
||||
#erase 0xE0000000 0x0
|
||||
#erase 0xE0002000 0x0
|
||||
#erase 0xE0000000 0x00004000
|
||||
#erase 0xE0000000 0x00005000
|
||||
#erase 0xE0000000 0x00006000
|
||||
#erase 0xE0000000 0x00007000
|
||||
#erase 0xE0000000 0x00008000
|
||||
#erase 0xE0000000 0x00009000
|
||||
#erase 0xE0000000 0x0000a000
|
||||
#erase 0xE0000000 0x0000b000
|
||||
#erase-wait 0xe0000000
|
||||
#blank-chk 0xE0000000 0x0
|
||||
load -v m5484lite_dbug_flash.elf
|
||||
erase 0xFF800000 0
|
||||
erase 0xFF800000 1
|
||||
erase 0xFF800000 2
|
||||
erase 0xFF800000 3
|
||||
erase 0xFF800000 4
|
||||
erase 0xFF800000 5
|
||||
erase 0xFF800000 6
|
||||
erase 0xFF800000 7
|
||||
erase 0xFF800000 8
|
||||
erase 0xFF800000 9
|
||||
erase 0xFF800000 10
|
||||
erase 0xFF800000 11
|
||||
erase 0xFF800000 12
|
||||
erase 0xFF800000 13
|
||||
load -v m548xlite_dbug_flash.elf
|
||||
wait
|
||||
|
||||
@@ -63,4 +63,4 @@ erase 0xe0000000 37
|
||||
erase 0xe0000000 38
|
||||
erase 0xe0000000 39
|
||||
|
||||
load ../../emutos/emutos-m548x_bas.elf
|
||||
load ../../emutos/emutos-m548xbas.elf
|
||||
|
||||
7506
fs/cc932.c
7506
fs/cc932.c
File diff suppressed because it is too large
Load Diff
21870
fs/cc936.c
21870
fs/cc936.c
File diff suppressed because it is too large
Load Diff
17126
fs/cc949.c
17126
fs/cc949.c
File diff suppressed because it is too large
Load Diff
13578
fs/cc950.c
13578
fs/cc950.c
File diff suppressed because it is too large
Load Diff
843
fs/ccsbcs.c
843
fs/ccsbcs.c
@@ -26,468 +26,510 @@
|
||||
*/
|
||||
|
||||
#include <ff.h>
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
#if _CODE_PAGE == 437
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP437(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 720
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */
|
||||
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
|
||||
0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642,
|
||||
0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
|
||||
0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP720(0x80-0xFF) to Unicode conversion table */
|
||||
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
|
||||
0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642,
|
||||
0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
|
||||
0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 737
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */
|
||||
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
|
||||
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
|
||||
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
|
||||
0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
|
||||
0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0,
|
||||
0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD,
|
||||
0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
|
||||
0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP737(0x80-0xFF) to Unicode conversion table */
|
||||
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
|
||||
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
|
||||
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
|
||||
0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
|
||||
0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0,
|
||||
0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD,
|
||||
0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
|
||||
0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 775
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */
|
||||
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
|
||||
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
|
||||
0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6,
|
||||
0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118,
|
||||
0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
|
||||
0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B,
|
||||
0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144,
|
||||
0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
|
||||
0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP775(0x80-0xFF) to Unicode conversion table */
|
||||
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
|
||||
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
|
||||
0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6,
|
||||
0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118,
|
||||
0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
|
||||
0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B,
|
||||
0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144,
|
||||
0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
|
||||
0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 850
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP850(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 852
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
|
||||
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
|
||||
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E,
|
||||
0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A,
|
||||
0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE,
|
||||
0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161,
|
||||
0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
|
||||
0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP852(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
|
||||
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
|
||||
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E,
|
||||
0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A,
|
||||
0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE,
|
||||
0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161,
|
||||
0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
|
||||
0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 855
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */
|
||||
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
|
||||
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
|
||||
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
|
||||
0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
|
||||
0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414,
|
||||
0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438,
|
||||
0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E,
|
||||
0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
|
||||
0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443,
|
||||
0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
|
||||
0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D,
|
||||
0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP855(0x80-0xFF) to Unicode conversion table */
|
||||
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
|
||||
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
|
||||
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
|
||||
0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
|
||||
0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414,
|
||||
0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438,
|
||||
0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E,
|
||||
0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
|
||||
0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443,
|
||||
0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
|
||||
0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D,
|
||||
0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 857
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000,
|
||||
0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP857(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000,
|
||||
0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 858
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP858(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 862
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP862(0x80-0xFF) to Unicode conversion table */
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 866
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
|
||||
0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP866(0x80-0xFF) to Unicode conversion table */
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
|
||||
0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 874
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07,
|
||||
0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F,
|
||||
0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17,
|
||||
0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F,
|
||||
0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27,
|
||||
0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F,
|
||||
0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37,
|
||||
0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F,
|
||||
0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47,
|
||||
0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F,
|
||||
0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57,
|
||||
0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP874(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07,
|
||||
0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F,
|
||||
0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17,
|
||||
0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F,
|
||||
0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27,
|
||||
0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F,
|
||||
0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37,
|
||||
0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F,
|
||||
0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47,
|
||||
0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F,
|
||||
0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57,
|
||||
0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1250
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A,
|
||||
0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B,
|
||||
0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C,
|
||||
0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7,
|
||||
0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E,
|
||||
0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7,
|
||||
0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF,
|
||||
0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7,
|
||||
0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F,
|
||||
0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7,
|
||||
0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1250(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A,
|
||||
0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B,
|
||||
0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C,
|
||||
0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7,
|
||||
0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E,
|
||||
0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7,
|
||||
0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF,
|
||||
0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7,
|
||||
0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F,
|
||||
0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7,
|
||||
0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1251
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */
|
||||
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
|
||||
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F,
|
||||
0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7,
|
||||
0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407,
|
||||
0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457,
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1251(0x80-0xFF) to Unicode conversion table */
|
||||
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
|
||||
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F,
|
||||
0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7,
|
||||
0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407,
|
||||
0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457,
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1252
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x00DD, 0x00DE, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1252(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x00DD, 0x00DE, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1253
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F,
|
||||
0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397,
|
||||
0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F,
|
||||
0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7,
|
||||
0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF,
|
||||
0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7,
|
||||
0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF,
|
||||
0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7,
|
||||
0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1253(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F,
|
||||
0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397,
|
||||
0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F,
|
||||
0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7,
|
||||
0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF,
|
||||
0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7,
|
||||
0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF,
|
||||
0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7,
|
||||
0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1254
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1254(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1255
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7,
|
||||
0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF,
|
||||
0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3,
|
||||
0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1255(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7,
|
||||
0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF,
|
||||
0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3,
|
||||
0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1256
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
|
||||
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA,
|
||||
0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F,
|
||||
0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7,
|
||||
0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643,
|
||||
0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF,
|
||||
0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7,
|
||||
0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1256(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
|
||||
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA,
|
||||
0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F,
|
||||
0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7,
|
||||
0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643,
|
||||
0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF,
|
||||
0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7,
|
||||
0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2
|
||||
}
|
||||
|
||||
#elif _CODE_PAGE == 1257
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000,
|
||||
0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7,
|
||||
0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6,
|
||||
0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112,
|
||||
0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B,
|
||||
0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF,
|
||||
0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113,
|
||||
0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C,
|
||||
0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1257(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000,
|
||||
0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7,
|
||||
0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6,
|
||||
0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112,
|
||||
0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B,
|
||||
0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF,
|
||||
0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113,
|
||||
0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C,
|
||||
0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1258
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -499,42 +541,79 @@ const uint16_t Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||
|
||||
|
||||
uint16_t ff_convert ( /* Converted character, Returns zero on error */
|
||||
uint16_t src, /* Character code to be converted */
|
||||
uint32_t dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
|
||||
)
|
||||
uint16_t src, /* Character code to be converted */
|
||||
uint32_t dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
|
||||
)
|
||||
{
|
||||
uint16_t c;
|
||||
uint16_t c;
|
||||
|
||||
|
||||
if (src < 0x80) { /* ASCII */
|
||||
c = src;
|
||||
if (src < 0x80) { /* ASCII */
|
||||
c = src;
|
||||
|
||||
} else {
|
||||
if (dir) { /* OEMCP to Unicode */
|
||||
c = (src >= 0x100) ? 0 : Tbl[src - 0x80];
|
||||
} else {
|
||||
if (dir) { /* OEMCP to Unicode */
|
||||
c = (src >= 0x100) ? 0 : Tbl[src - 0x80];
|
||||
|
||||
} else { /* Unicode to OEMCP */
|
||||
for (c = 0; c < 0x80; c++) {
|
||||
if (src == Tbl[c]) break;
|
||||
}
|
||||
c = (c + 0x80) & 0xFF;
|
||||
}
|
||||
}
|
||||
} else { /* Unicode to OEMCP */
|
||||
for (c = 0; c < 0x80; c++) {
|
||||
if (src == Tbl[c]) break;
|
||||
}
|
||||
c = (c + 0x80) & 0xFF;
|
||||
}
|
||||
}
|
||||
|
||||
return c;
|
||||
return c;
|
||||
}
|
||||
|
||||
|
||||
uint16_t ff_wtoupper ( /* Upper converted character */
|
||||
uint16_t chr /* Input character */
|
||||
)
|
||||
uint16_t chr /* Input character */
|
||||
)
|
||||
{
|
||||
static const uint16_t tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 };
|
||||
static const uint16_t tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
|
||||
int i;
|
||||
static const uint16_t tbl_lower[] =
|
||||
{
|
||||
0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
|
||||
0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70,
|
||||
0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78,
|
||||
0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7,
|
||||
0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8,
|
||||
0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101,
|
||||
0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F,
|
||||
0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D,
|
||||
0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B,
|
||||
0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A,
|
||||
0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148,
|
||||
0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157,
|
||||
0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165,
|
||||
0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173,
|
||||
0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1,
|
||||
0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8,
|
||||
0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF,
|
||||
0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7,
|
||||
0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433,
|
||||
0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A,
|
||||
0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441,
|
||||
0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448,
|
||||
0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F,
|
||||
0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457,
|
||||
0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F,
|
||||
0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177,
|
||||
0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F,
|
||||
0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48,
|
||||
0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50,
|
||||
0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58,
|
||||
0xFF59, 0xFF5A, 0
|
||||
};
|
||||
static const uint16_t tbl_upper[] =
|
||||
{
|
||||
0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
|
||||
int i;
|
||||
|
||||
|
||||
for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ;
|
||||
for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ;
|
||||
|
||||
return tbl_lower[i] ? tbl_upper[i] : chr;
|
||||
return tbl_lower[i] ? tbl_upper[i] : chr;
|
||||
}
|
||||
|
||||
41
i2c/i2c.c
Normal file
41
i2c/i2c.c
Normal file
@@ -0,0 +1,41 @@
|
||||
|
||||
#include <bas_types.h>
|
||||
|
||||
void i2c_init(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void i2c_set_frequency(int hz)
|
||||
{
|
||||
}
|
||||
|
||||
int i2c_read(int address, char *data, int length, bool repeated)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_read_byte(int ack)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_write(int address, const char *data, int length, bool repeated)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_write_byte(int data)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void i2c_start(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void i2c_stop(void)
|
||||
{
|
||||
|
||||
}
|
||||
292
if/driver_vec.c
292
if/driver_vec.c
@@ -23,20 +23,21 @@
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <bas_types.h>
|
||||
#include "version.h"
|
||||
#include "xhdi_sd.h"
|
||||
#include "dma.h"
|
||||
#include "driver_vec.h"
|
||||
#include "driver_mem.h"
|
||||
#include "pci.h"
|
||||
#include "mmu.h"
|
||||
|
||||
/*
|
||||
* driver interface struct for the SD card BaS driver
|
||||
*/
|
||||
static struct xhdi_driver_interface xhdi_call_interface =
|
||||
static struct xhdi_driver_interface xhdi_call_interface =
|
||||
{
|
||||
xhdi_call
|
||||
xhdi_call
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -46,90 +47,253 @@ static struct xhdi_driver_interface xhdi_call_interface =
|
||||
*/
|
||||
static struct dma_driver_interface dma_interface =
|
||||
{
|
||||
.version = 0x0101,
|
||||
.magic = 'DMAC',
|
||||
.dma_set_initiator = &dma_set_initiator,
|
||||
.dma_get_initiator = dma_get_initiator,
|
||||
.dma_free_initiator = dma_free_initiator,
|
||||
.dma_set_channel = dma_set_channel,
|
||||
.dma_get_channel = dma_get_channel,
|
||||
.dma_free_channel = dma_free_channel,
|
||||
.dma_clear_channel = dma_clear_channel,
|
||||
.MCD_startDma = MCD_startDma,
|
||||
.MCD_dmaStatus = MCD_dmaStatus,
|
||||
.MCD_XferProgrQuery = MCD_XferProgrQuery,
|
||||
.MCD_killDma = MCD_killDma,
|
||||
.MCD_continDma = MCD_continDma,
|
||||
.MCD_pauseDma = MCD_pauseDma,
|
||||
.MCD_resumeDma = MCD_resumeDma,
|
||||
.MCD_csumQuery = MCD_csumQuery,
|
||||
.dma_malloc = driver_mem_alloc,
|
||||
.dma_free = driver_mem_free
|
||||
.version = 0x0101,
|
||||
.magic = 0x444d4143, /* 'DMAC' */
|
||||
.dma_set_initiator = dma_set_initiator,
|
||||
.dma_get_initiator = dma_get_initiator,
|
||||
.dma_free_initiator = dma_free_initiator,
|
||||
.dma_set_channel = dma_set_channel,
|
||||
.dma_get_channel = dma_get_channel,
|
||||
.dma_free_channel = dma_free_channel,
|
||||
.dma_clear_channel = dma_clear_channel,
|
||||
.MCD_startDma = (int (*)(long, int8_t *, unsigned int, int8_t *, unsigned int,
|
||||
unsigned int, unsigned int, unsigned int, int,
|
||||
unsigned int, unsigned int)) MCD_startDma,
|
||||
.MCD_dmaStatus = (int32_t (*)(int32_t)) MCD_dmaStatus,
|
||||
.MCD_XferProgrQuery = (int32_t (*)(int32_t, MCD_XferProg *)) MCD_XferProgrQuery,
|
||||
.MCD_killDma = (int32_t (*)(int32_t)) MCD_killDma,
|
||||
.MCD_continDma = (int32_t (*)(int32_t)) MCD_continDma,
|
||||
.MCD_pauseDma = (int32_t (*)(int32_t)) MCD_pauseDma,
|
||||
.MCD_resumeDma = (int32_t (*)(int32_t)) MCD_resumeDma,
|
||||
.MCD_csumQuery = (int32_t (*)(int32_t, uint32_t *)) MCD_csumQuery,
|
||||
.dma_malloc = driver_mem_alloc,
|
||||
.dma_free = driver_mem_free
|
||||
};
|
||||
|
||||
extern const struct fb_info *info_fb;
|
||||
extern struct fb_info *info_fb;
|
||||
|
||||
/*
|
||||
* driver interface struct for the PCI_BIOS BaS driver
|
||||
*/
|
||||
static struct pci_bios_interface pci_interface =
|
||||
{
|
||||
.subjar = 0,
|
||||
.version = 0x00010000,
|
||||
.find_pci_device = wrapper_find_pci_device,
|
||||
.find_pci_classcode = wrapper_find_pci_classcode,
|
||||
.read_config_byte = wrapper_read_config_byte,
|
||||
.read_config_word = wrapper_read_config_word,
|
||||
.read_config_longword = wrapper_read_config_longword,
|
||||
.fast_read_config_byte = wrapper_fast_read_config_byte,
|
||||
.fast_read_config_word = wrapper_fast_read_config_word,
|
||||
.fast_read_config_longword = wrapper_fast_read_config_longword,
|
||||
.write_config_byte = wrapper_write_config_byte,
|
||||
.write_config_word = wrapper_write_config_word,
|
||||
.write_config_longword = wrapper_write_config_longword,
|
||||
.hook_interrupt = wrapper_hook_interrupt,
|
||||
.unhook_interrupt = wrapper_unhook_interrupt,
|
||||
.special_cycle = wrapper_special_cycle,
|
||||
.get_routing = wrapper_get_routing,
|
||||
.set_interrupt = wrapper_set_interrupt,
|
||||
.get_resource = wrapper_get_resource,
|
||||
.get_card_used = wrapper_get_card_used,
|
||||
.set_card_used = wrapper_set_card_used,
|
||||
.read_mem_byte = wrapper_read_mem_byte,
|
||||
.read_mem_word = wrapper_read_mem_word,
|
||||
.read_mem_longword = wrapper_read_mem_longword,
|
||||
.fast_read_mem_byte = wrapper_fast_read_mem_byte,
|
||||
.fast_read_mem_word = wrapper_fast_read_mem_word,
|
||||
.fast_read_mem_longword = wrapper_fast_read_mem_longword,
|
||||
.write_mem_byte = wrapper_write_mem_byte,
|
||||
.write_mem_word = wrapper_write_mem_word,
|
||||
.write_mem_longword = wrapper_write_mem_longword,
|
||||
.read_io_byte = wrapper_read_io_byte,
|
||||
.read_io_word = wrapper_read_io_word,
|
||||
.read_io_longword = wrapper_read_io_longword,
|
||||
.fast_read_io_byte = wrapper_fast_read_io_byte,
|
||||
.fast_read_io_word = wrapper_fast_read_io_word,
|
||||
.fast_read_io_longword = wrapper_fast_read_io_longword,
|
||||
.write_io_byte = wrapper_write_io_byte,
|
||||
.write_io_word = wrapper_write_io_word,
|
||||
.write_io_longword = wrapper_write_io_longword,
|
||||
.get_machine_id = wrapper_get_machine_id,
|
||||
.get_pagesize = wrapper_get_pagesize,
|
||||
.virt_to_bus = wrapper_virt_to_bus,
|
||||
.bus_to_virt = wrapper_bus_to_virt,
|
||||
.virt_to_phys = wrapper_virt_to_phys,
|
||||
.phys_to_virt = wrapper_phys_to_virt,
|
||||
};
|
||||
|
||||
static struct pci_native_driver_interface_0_1 pci_native_interface_0_1 =
|
||||
{
|
||||
.pci_read_config_longword = pci_read_config_longword,
|
||||
.pci_read_config_word = pci_read_config_word,
|
||||
.pci_read_config_byte = pci_read_config_byte,
|
||||
.pci_write_config_longword = pci_write_config_longword,
|
||||
.pci_write_config_word = pci_write_config_word,
|
||||
.pci_write_config_byte = pci_write_config_byte,
|
||||
.pci_hook_interrupt = pci_hook_interrupt,
|
||||
.pci_unhook_interrupt = pci_unhook_interrupt,
|
||||
.pci_get_resource = pci_get_resource,
|
||||
};
|
||||
|
||||
static struct pci_native_driver_interface pci_native_interface =
|
||||
{
|
||||
.pci_read_config_longword = pci_read_config_longword,
|
||||
.pci_read_config_word = pci_read_config_word,
|
||||
.pci_read_config_byte = pci_read_config_byte,
|
||||
.pci_write_config_longword = pci_write_config_longword,
|
||||
.pci_write_config_word = pci_write_config_word,
|
||||
.pci_write_config_byte = pci_write_config_byte,
|
||||
.pci_hook_interrupt = pci_hook_interrupt,
|
||||
.pci_unhook_interrupt = pci_unhook_interrupt,
|
||||
.pci_find_device = pci_find_device,
|
||||
.pci_find_classcode = pci_find_classcode,
|
||||
.pci_get_resource = pci_get_resource,
|
||||
};
|
||||
/*
|
||||
* driver interface struct for the BaS framebuffer video driver
|
||||
*/
|
||||
static struct framebuffer_driver_interface framebuffer_interface =
|
||||
{
|
||||
.framebuffer_info = &info_fb
|
||||
.framebuffer_info = &info_fb
|
||||
};
|
||||
|
||||
/*
|
||||
* driver interface struct for the BaS MMU driver
|
||||
*/
|
||||
static struct mmu_driver_interface mmu_interface =
|
||||
{
|
||||
.map_page_locked = &mmu_map_data_page_locked,
|
||||
.unlock_page = &mmu_unlock_data_page,
|
||||
.report_locked_pages = &mmu_report_locked_pages,
|
||||
.report_pagesize = &mmu_report_pagesize
|
||||
};
|
||||
|
||||
static struct generic_interface interfaces[] =
|
||||
{
|
||||
{
|
||||
/* BaS SD-card driver interface */
|
||||
{
|
||||
/* BaS SD-card driver interface */
|
||||
|
||||
.type = XHDI_DRIVER,
|
||||
.name = "SDCARD",
|
||||
.description = "BaS SD Card driver",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.xhdi = &xhdi_call_interface
|
||||
},
|
||||
{
|
||||
.type = MCD_DRIVER,
|
||||
.name = "MCDDMA",
|
||||
.description = "BaS Multichannel DMA driver",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.dma = &dma_interface,
|
||||
},
|
||||
{
|
||||
.type = VIDEO_DRIVER,
|
||||
.name = "RADEON",
|
||||
.description = "BaS RADEON framebuffer driver",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.fb = &framebuffer_interface,
|
||||
},
|
||||
.type = XHDI_DRIVER,
|
||||
.name = "SDCARD",
|
||||
.description = "BaS SD Card driver",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.xhdi = &xhdi_call_interface
|
||||
},
|
||||
{
|
||||
.type = MCD_DRIVER,
|
||||
.name = "MCDDMA",
|
||||
.description = "BaS Multichannel DMA driver",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.dma = &dma_interface,
|
||||
},
|
||||
{
|
||||
.type = VIDEO_DRIVER,
|
||||
.name = "RADEON",
|
||||
.description = "BaS RADEON framebuffer driver",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.fb = &framebuffer_interface,
|
||||
},
|
||||
{
|
||||
.type = PCI_DRIVER,
|
||||
.name = "PCI",
|
||||
.description = "BaS PCI_BIOS driver",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.pci = &pci_interface,
|
||||
},
|
||||
{
|
||||
.type = MMU_DRIVER,
|
||||
.name = "MMU",
|
||||
.description = "BaS MMU driver",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.mmu = &mmu_interface,
|
||||
},
|
||||
{
|
||||
.type = PCI_NATIVE_DRIVER,
|
||||
.name = "PCI_N",
|
||||
.description = "BaS PCI native",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.pci_native = (struct pci_native_driver_interface *) &pci_native_interface_0_1,
|
||||
},
|
||||
{
|
||||
.type = PCI_NATIVE_DRIVER,
|
||||
.name = "PCI_N",
|
||||
.description = "BaS PCI native",
|
||||
.version = 0,
|
||||
.revision = 2,
|
||||
.interface.pci_native = &pci_native_interface,
|
||||
},
|
||||
|
||||
/* insert new drivers here */
|
||||
/* insert new drivers here */
|
||||
|
||||
{
|
||||
.type = END_OF_DRIVERS
|
||||
}
|
||||
{
|
||||
.type = END_OF_DRIVERS
|
||||
}
|
||||
};
|
||||
|
||||
extern void remove_handler(void); /* forward declaration */
|
||||
|
||||
/*
|
||||
* this is the driver table we expose to the OS
|
||||
*/
|
||||
static struct driver_table bas_drivers =
|
||||
{
|
||||
.bas_version = MAJOR_VERSION,
|
||||
.bas_revision = MINOR_VERSION,
|
||||
.remove_handler = NULL,
|
||||
.interfaces = { interfaces }
|
||||
.bas_version = MAJOR_VERSION,
|
||||
.bas_revision = MINOR_VERSION,
|
||||
.remove_handler = remove_handler,
|
||||
.interfaces = interfaces
|
||||
};
|
||||
|
||||
void remove_handler(void)
|
||||
{
|
||||
extern void std_exc_vec(void);
|
||||
uint32_t *trap_0_vector = (uint32_t *) 0x80;
|
||||
|
||||
*trap_0_vector = (uint32_t) std_exc_vec;
|
||||
}
|
||||
|
||||
/*
|
||||
* trap #0 entry point
|
||||
*
|
||||
* this is used to retrieve the driver table that gets exposed to the OS by BaS
|
||||
*/
|
||||
void __attribute__((interrupt)) get_bas_drivers(void)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"move.l #%[drivers],d0\n\t"
|
||||
: /* no output */
|
||||
: [drivers] "o" (bas_drivers) /* input */
|
||||
: /* clobber */
|
||||
);
|
||||
__asm__ __volatile(
|
||||
/*
|
||||
* (sp) should now point to the next instruction after the trap
|
||||
* The trap itself is 2 bytes, the four bytes before that must
|
||||
* read '_BAS', otherwise we are not meant by this call
|
||||
*/
|
||||
" move.l a0,-(sp) \n\t" // save registers
|
||||
" move.l d0,-(sp) \n\t"
|
||||
" move.l 12(sp),a0 \n\t" // get return address
|
||||
" move.l -6(a0),d0 \n\t" //
|
||||
" cmp.l #0x5f424153,d0 \n\t" // is it '_BAS'?
|
||||
" beq fetch_drivers \n\t" // yes
|
||||
/*
|
||||
* This seems indeed a "normal" trap #0. Better pass control to "normal" trap #0 processing
|
||||
* If trap #0 isn't set to something sensible, we'll probably crash here, but this must be
|
||||
* prevented on the caller side.
|
||||
*/
|
||||
" move.l (sp)+,d0 \n\t" // restore registers
|
||||
" move.l (sp)+,a0 \n\t"
|
||||
" move.l 0x80,-(sp) \n\t" // fetch vector
|
||||
" rts \n\t" // and jump through it
|
||||
|
||||
"fetch_drivers: \n\t"
|
||||
" move.l #%[drivers],d0 \n\t" // return driver struct in d0
|
||||
" addq.l #4,sp \n\t" // adjust stack
|
||||
" move.l (sp)+,a0 \n\t" // restore register
|
||||
: /* no output */
|
||||
: [drivers] "o" (bas_drivers) /* input */
|
||||
: /* clobber */
|
||||
);
|
||||
}
|
||||
|
||||
@@ -7,14 +7,11 @@
|
||||
#ifndef _MCD_API_H
|
||||
#define _MCD_API_H
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
/*
|
||||
* Turn Execution Unit tasks ON (#define) or OFF (#undef)
|
||||
*/
|
||||
#undef MCD_INCLUDE_EU
|
||||
//#define MCD_INCLUDE_EU
|
||||
|
||||
/*
|
||||
* Number of DMA channels
|
||||
*/
|
||||
@@ -49,33 +46,39 @@
|
||||
/*
|
||||
* Portability typedefs
|
||||
*/
|
||||
typedef int s32;
|
||||
typedef unsigned int u32;
|
||||
typedef short s16;
|
||||
typedef unsigned short u16;
|
||||
typedef char s8;
|
||||
typedef unsigned char u8;
|
||||
|
||||
/*
|
||||
* These structures represent the internal registers of the
|
||||
* multi-channel DMA
|
||||
*/
|
||||
struct dmaRegs_s {
|
||||
uint32_t taskbar; /* task table base address register */
|
||||
uint32_t currPtr;
|
||||
uint32_t endPtr;
|
||||
uint32_t varTablePtr;
|
||||
uint16_t dma_rsvd0;
|
||||
uint16_t ptdControl; /* ptd control */
|
||||
uint32_t intPending; /* interrupt pending register */
|
||||
uint32_t intMask; /* interrupt mask register */
|
||||
uint16_t taskControl[16]; /* task control registers */
|
||||
uint8_t priority[32]; /* priority registers */
|
||||
uint32_t initiatorMux; /* initiator mux control */
|
||||
uint32_t taskSize0; /* task size control register 0. */
|
||||
uint32_t taskSize1; /* task size control register 1. */
|
||||
uint32_t dma_rsvd1; /* reserved */
|
||||
uint32_t dma_rsvd2; /* reserved */
|
||||
uint32_t debugComp1; /* debug comparator 1 */
|
||||
uint32_t debugComp2; /* debug comparator 2 */
|
||||
uint32_t debugControl; /* debug control */
|
||||
uint32_t debugStatus; /* debug status */
|
||||
uint32_t ptdDebug; /* priority task decode debug */
|
||||
uint32_t dma_rsvd3[31]; /* reserved */
|
||||
u32 taskbar; /* task table base address register */
|
||||
u32 currPtr;
|
||||
u32 endPtr;
|
||||
u32 varTablePtr;
|
||||
u16 dma_rsvd0;
|
||||
u16 ptdControl; /* ptd control */
|
||||
u32 intPending; /* interrupt pending register */
|
||||
u32 intMask; /* interrupt mask register */
|
||||
u16 taskControl[16]; /* task control registers */
|
||||
u8 priority[32]; /* priority registers */
|
||||
u32 initiatorMux; /* initiator mux control */
|
||||
u32 taskSize0; /* task size control register 0. */
|
||||
u32 taskSize1; /* task size control register 1. */
|
||||
u32 dma_rsvd1; /* reserved */
|
||||
u32 dma_rsvd2; /* reserved */
|
||||
u32 debugComp1; /* debug comparator 1 */
|
||||
u32 debugComp2; /* debug comparator 2 */
|
||||
u32 debugControl; /* debug control */
|
||||
u32 debugStatus; /* debug status */
|
||||
u32 ptdDebug; /* priority task decode debug */
|
||||
u32 dma_rsvd3[31]; /* reserved */
|
||||
};
|
||||
typedef volatile struct dmaRegs_s dmaRegs;
|
||||
|
||||
@@ -161,7 +164,7 @@ typedef volatile struct dmaRegs_s dmaRegs;
|
||||
*/
|
||||
/* Byte swapping: */
|
||||
#define MCD_NO_BYTE_SWAP 0x00045670 /* to disable byte swapping. */
|
||||
#define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each uint32_t of the DMAed data. */
|
||||
#define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each u32 of the DMAed data. */
|
||||
#define MCD_U16_REVERSE 0x00067450 /* to reverse the 16-bit halves of
|
||||
each 32-bit data value being DMAed.*/
|
||||
#define MCD_U16_BYTE_REVERSE 0x00054760 /* to reverse the byte halves of each
|
||||
@@ -228,44 +231,44 @@ typedef volatile struct dmaRegs_s dmaRegs;
|
||||
|
||||
/* Task Table Entry struct*/
|
||||
typedef struct {
|
||||
uint32_t TDTstart; /* task descriptor table start */
|
||||
uint32_t TDTend; /* task descriptor table end */
|
||||
uint32_t varTab; /* variable table start */
|
||||
uint32_t FDTandFlags; /* function descriptor table start and flags */
|
||||
volatile uint32_t descAddrAndStatus;
|
||||
volatile uint32_t modifiedVarTab;
|
||||
uint32_t contextSaveSpace; /* context save space start */
|
||||
uint32_t literalBases;
|
||||
u32 TDTstart; /* task descriptor table start */
|
||||
u32 TDTend; /* task descriptor table end */
|
||||
u32 varTab; /* variable table start */
|
||||
u32 FDTandFlags; /* function descriptor table start and flags */
|
||||
volatile u32 descAddrAndStatus;
|
||||
volatile u32 modifiedVarTab;
|
||||
u32 contextSaveSpace; /* context save space start */
|
||||
u32 literalBases;
|
||||
} TaskTableEntry;
|
||||
|
||||
|
||||
/* Chained buffer descriptor */
|
||||
typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
|
||||
struct MCD_bufDesc_struct {
|
||||
uint32_t flags; /* flags describing the DMA */
|
||||
uint32_t csumResult; /* checksum from checksumming performed since last checksum reset */
|
||||
int8_t *srcAddr; /* the address to move data from */
|
||||
int8_t *destAddr; /* the address to move data to */
|
||||
int8_t *lastDestAddr; /* the last address written to */
|
||||
uint32_t dmaSize; /* the number of bytes to transfer independent of the transfer size */
|
||||
u32 flags; /* flags describing the DMA */
|
||||
u32 csumResult; /* checksum from checksumming performed since last checksum reset */
|
||||
s8 *srcAddr; /* the address to move data from */
|
||||
s8 *destAddr; /* the address to move data to */
|
||||
s8 *lastDestAddr; /* the last address written to */
|
||||
u32 dmaSize; /* the number of bytes to transfer independent of the transfer size */
|
||||
MCD_bufDesc *next; /* next buffer descriptor in chain */
|
||||
uint32_t info; /* private information about this descriptor; DMA does not affect it */
|
||||
u32 info; /* private information about this descriptor; DMA does not affect it */
|
||||
};
|
||||
|
||||
/* Progress Query struct */
|
||||
typedef volatile struct MCD_XferProg_struct {
|
||||
int8_t *lastSrcAddr; /* the most-recent or last, post-increment source address */
|
||||
int8_t *lastDestAddr; /* the most-recent or last, post-increment destination address */
|
||||
uint32_t dmaSize; /* the amount of data transferred for the current buffer */
|
||||
s8 *lastSrcAddr; /* the most-recent or last, post-increment source address */
|
||||
s8 *lastDestAddr; /* the most-recent or last, post-increment destination address */
|
||||
u32 dmaSize; /* the amount of data transferred for the current buffer */
|
||||
MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */
|
||||
} MCD_XferProg;
|
||||
|
||||
|
||||
/* FEC buffer descriptor */
|
||||
typedef volatile struct MCD_bufDescFec_struct {
|
||||
uint16_t statCtrl;
|
||||
uint16_t length;
|
||||
uint32_t dataPointer;
|
||||
u16 statCtrl;
|
||||
u16 length;
|
||||
u32 dataPointer;
|
||||
} MCD_bufDescFec;
|
||||
|
||||
|
||||
@@ -279,65 +282,65 @@ typedef volatile struct MCD_bufDescFec_struct {
|
||||
*/
|
||||
int MCD_startDma (
|
||||
int channel, /* the channel on which to run the DMA */
|
||||
int8_t *srcAddr, /* the address to move data from, or buffer-descriptor address */
|
||||
int16_t srcIncr, /* the amount to increment the source address per transfer */
|
||||
int8_t *destAddr, /* the address to move data to */
|
||||
int16_t destIncr, /* the amount to increment the destination address per transfer */
|
||||
uint32_t dmaSize, /* the number of bytes to transfer independent of the transfer size */
|
||||
uint32_t xferSize, /* the number bytes in of each data movement (1, 2, or 4) */
|
||||
uint32_t initiator, /* what device initiates the DMA */
|
||||
s8 *srcAddr, /* the address to move data from, or buffer-descriptor address */
|
||||
s16 srcIncr, /* the amount to increment the source address per transfer */
|
||||
s8 *destAddr, /* the address to move data to */
|
||||
s16 destIncr, /* the amount to increment the destination address per transfer */
|
||||
u32 dmaSize, /* the number of bytes to transfer independent of the transfer size */
|
||||
u32 xferSize, /* the number bytes in of each data movement (1, 2, or 4) */
|
||||
u32 initiator, /* what device initiates the DMA */
|
||||
int priority, /* priority of the DMA */
|
||||
uint32_t flags, /* flags describing the DMA */
|
||||
uint32_t funcDesc /* a description of byte swapping, bit swapping, and CRC actions */
|
||||
u32 flags, /* flags describing the DMA */
|
||||
u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */
|
||||
);
|
||||
|
||||
/*
|
||||
* MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
|
||||
* registers, relocating and creating the appropriate task structures, and
|
||||
/*
|
||||
* MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
|
||||
* registers, relocating and creating the appropriate task structures, and
|
||||
* setting up some global settings
|
||||
*/
|
||||
int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, uint32_t flags);
|
||||
int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_dmaStatus() returns the status of the DMA on the requested channel.
|
||||
*/
|
||||
int MCD_dmaStatus (int channel);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_XferProgrQuery() returns progress of DMA on requested channel
|
||||
*/
|
||||
int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_killDma() halts the DMA on the requested channel, without any
|
||||
* intention of resuming the DMA.
|
||||
*/
|
||||
int MCD_killDma (int channel);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_continDma() continues a DMA which as stopped due to encountering an
|
||||
* unready buffer descriptor.
|
||||
*/
|
||||
int MCD_continDma (int channel);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
|
||||
* running on that channel).
|
||||
* running on that channel).
|
||||
*/
|
||||
int MCD_pauseDma (int channel);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
|
||||
* running on that channel).
|
||||
*/
|
||||
int MCD_resumeDma (int channel);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
|
||||
*/
|
||||
int MCD_csumQuery (int channel, uint32_t *csum);
|
||||
int MCD_csumQuery (int channel, u32 *csum);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_getCodeSize provides the packed size required by the microcoded task
|
||||
* and structures.
|
||||
*/
|
||||
@@ -350,7 +353,7 @@ int MCD_getCodeSize(void);
|
||||
int MCD_getVersion(char **longVersion);
|
||||
|
||||
/* macro for setting a location in the variable table */
|
||||
#define MCD_SET_VAR(taskTab,idx,value) ((uint32_t *)(taskTab)->varTab)[idx] = value
|
||||
#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value
|
||||
/* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
|
||||
so I'm avoiding surrounding it with "do {} while(0)" */
|
||||
|
||||
|
||||
@@ -15,7 +15,7 @@ void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer
|
||||
/*
|
||||
* Task 1
|
||||
*/
|
||||
void MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
@@ -27,18 +27,18 @@ void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi
|
||||
/*
|
||||
* Task 3
|
||||
*/
|
||||
void MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
* Task 4
|
||||
*/
|
||||
void MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel);
|
||||
void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
* Task 5
|
||||
*/
|
||||
void MCD_startDmaENetXmit(int8_t *bDBase, int8_t *currBD, int8_t *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel);
|
||||
void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
#endif /* MCD_TSK_INIT_H */
|
||||
|
||||
@@ -16,7 +16,7 @@
|
||||
#ifndef __MCF5475_H__
|
||||
#define __MCF5475_H__
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
/***
|
||||
* MCF5475 Derivative Memory map definitions from linker command files:
|
||||
* __MBAR, __MMUBAR, __RAMBAR0, __RAMBAR0_SIZE, __RAMBAR1, __RAMBAR1_SIZE
|
||||
|
||||
@@ -107,7 +107,6 @@
|
||||
#define MCF_INTC_LIACK(x) (*(volatile uint8_t *)(&_MBAR[0x7E4 + ((x-1)*0x4)]))
|
||||
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_INTC_IPRH */
|
||||
#define MCF_INTC_IPRH_INT32 (0x1)
|
||||
#define MCF_INTC_IPRH_INT33 (0x2)
|
||||
|
||||
@@ -62,7 +62,7 @@
|
||||
/* Bit definitions and macros for MCF_MMU_MMUTR */
|
||||
#define MCF_MMU_MMUTR_V (0x1)
|
||||
#define MCF_MMU_MMUTR_SG (0x2)
|
||||
#define MCF_MMU_MMUTR_ID(x) (((x)&0xFF)<<0x2)
|
||||
#define MCF_MMU_MMUTR_ID(x) (((x) & 0xFF) << 0x2)
|
||||
#define MCF_MMU_MMUTR_VA(x) (((x)&0x3FFFFF)<<0xA)
|
||||
|
||||
/* Bit definitions and macros for MCF_MMU_MMUDR */
|
||||
@@ -71,9 +71,9 @@
|
||||
#define MCF_MMU_MMUDR_W (0x8)
|
||||
#define MCF_MMU_MMUDR_R (0x10)
|
||||
#define MCF_MMU_MMUDR_SP (0x20)
|
||||
#define MCF_MMU_MMUDR_CM(x) (((x)&0x3)<<0x6)
|
||||
#define MCF_MMU_MMUDR_SZ(x) (((x)&0x3)<<0x8)
|
||||
#define MCF_MMU_MMUDR_PA(x) (((x)&0x3FFFFF)<<0xA)
|
||||
#define MCF_MMU_MMUDR_CM(x) (((x) & 0x3) << 0x6)
|
||||
#define MCF_MMU_MMUDR_SZ(x) (((x) & 0x3) << 0x8)
|
||||
#define MCF_MMU_MMUDR_PA(x) (((x) & 0x3FFFFF) << 0xA)
|
||||
|
||||
|
||||
#endif /* __MCF5475_MMU_H__ */
|
||||
|
||||
@@ -35,6 +35,7 @@ extern char *strncat(char *dst, const char *src, size_t max);
|
||||
extern int atoi(const char *c);
|
||||
extern void *memcpy(void *dst, const void *src, size_t n);
|
||||
extern void *memset(void *s, int c, size_t n);
|
||||
extern int memcmp(const void *s1, const void *s2, size_t max);
|
||||
extern void bzero(void *s, size_t n);
|
||||
|
||||
#define isdigit(c) (((c) >= '0') && ((c) <= '9'))
|
||||
|
||||
@@ -30,5 +30,6 @@
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <stddef.h> /* for sizeof() etc. */
|
||||
|
||||
#endif /* BAS_TYPES_H_ */
|
||||
|
||||
@@ -26,4 +26,7 @@
|
||||
#define CLEAR_BIT(p,bit) p &= ~(bit)
|
||||
#define CLEAR_BIT_NO(p,nr) CLEAR_BIT(p, (1 << (nr)))
|
||||
|
||||
extern void write_pic_byte(uint8_t value);
|
||||
extern uint8_t read_pic_byte(void);
|
||||
|
||||
#endif /* _BAS_UTILS_H_ */
|
||||
|
||||
@@ -25,8 +25,7 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
/*
|
||||
* CACR Cache Control Register
|
||||
@@ -54,6 +53,7 @@
|
||||
#define CF_CACR_ICINVA (0x00000100) /* Instr Cache Invalidate All */
|
||||
#define CF_CACR_IDSP (0x00000080) /* Ins default supervisor-protect */
|
||||
#define CF_CACR_EUSP (0x00000020) /* Switch stacks in user mode */
|
||||
#define CF_CACR_DF (0x00000010) /* Disable FPU */
|
||||
|
||||
#define _DCACHE_SET_MASK ((DCACHE_SIZE/64-1)<<CACHE_WAYS)
|
||||
#define _ICACHE_SET_MASK ((ICACHE_SIZE/64-1)<<CACHE_WAYS)
|
||||
@@ -83,7 +83,7 @@ extern uint32_t cacr_get(void);
|
||||
extern void cacr_set(uint32_t);
|
||||
extern void flush_icache_range(void *address, size_t size);
|
||||
extern void flush_dcache_range(void *address, size_t size);
|
||||
|
||||
extern void flush_cache_range(void *address, size_t size);
|
||||
|
||||
|
||||
#endif /* _CACHE_H_ */
|
||||
|
||||
@@ -12,7 +12,7 @@ extern "C" {
|
||||
#define _USE_WRITE 1 /* 1: Enable disk_write function */
|
||||
#define _USE_IOCTL 1 /* 1: Enable disk_ioctl fucntion */
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
|
||||
/* Status of Disk Functions */
|
||||
|
||||
@@ -26,10 +26,6 @@
|
||||
#include "MCD_dma.h"
|
||||
#include "bas_string.h"
|
||||
|
||||
#define DMA_INTC_LVL 6
|
||||
#define DMA_INTC_PRI 0
|
||||
|
||||
|
||||
void *dma_memcpy(void *dst, void *src, size_t n);
|
||||
extern int dma_init(void);
|
||||
extern int dma_get_channel(int requestor);
|
||||
@@ -39,9 +35,9 @@ extern void dma_clear_channel(int channel);
|
||||
extern uint32_t dma_get_initiator(int requestor);
|
||||
extern int dma_set_initiator(int initiator);
|
||||
extern void dma_free_initiator(int initiator);
|
||||
extern void dma_irq_enable(uint8_t lvl, uint8_t pri);
|
||||
extern void dma_irq_enable(void);
|
||||
extern void dma_irq_disable(void);
|
||||
extern int dma_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool dma_interrupt_handler(void *arg1, void *arg2);
|
||||
|
||||
|
||||
#endif /* _DMA_H_ */
|
||||
|
||||
@@ -27,57 +27,62 @@
|
||||
|
||||
#include "xhdi_sd.h"
|
||||
#include "MCD_dma.h"
|
||||
#include "pci.h"
|
||||
|
||||
enum driver_type
|
||||
{
|
||||
END_OF_DRIVERS, /* marks end of driver list */
|
||||
BLOCKDEV_DRIVER,
|
||||
CHARDEV_DRIVER,
|
||||
VIDEO_DRIVER,
|
||||
XHDI_DRIVER,
|
||||
MCD_DRIVER,
|
||||
BLOCKDEV_DRIVER,
|
||||
CHARDEV_DRIVER,
|
||||
XHDI_DRIVER,
|
||||
MCD_DRIVER,
|
||||
VIDEO_DRIVER,
|
||||
PCI_DRIVER,
|
||||
MMU_DRIVER,
|
||||
PCI_NATIVE_DRIVER,
|
||||
END_OF_DRIVERS = 0xffffffffL, /* marks end of driver list */
|
||||
};
|
||||
|
||||
struct generic_driver_interface
|
||||
{
|
||||
uint32_t (*init)(void);
|
||||
uint32_t (*read)(void *buf, size_t count);
|
||||
uint32_t (*write)(const void *buf, size_t count);
|
||||
uint32_t (*ioctl)(uint32_t request, ...);
|
||||
uint32_t (*init)(void);
|
||||
uint32_t (*read)(void *buf, size_t count);
|
||||
uint32_t (*write)(const void *buf, size_t count);
|
||||
uint32_t (*ioctl)(uint32_t request, ...);
|
||||
};
|
||||
|
||||
struct dma_driver_interface
|
||||
{
|
||||
int32_t version;
|
||||
int32_t magic;
|
||||
int32_t (*dma_set_initiator)(int32_t initiator);
|
||||
uint32_t (*dma_get_initiator)(int32_t requestor);
|
||||
void (*dma_free_initiator)(int32_t requestor);
|
||||
int32_t (*dma_set_channel)(int32_t requestor, void (*handler)(void));
|
||||
int32_t (*dma_get_channel)(int32_t requestor);
|
||||
void (*dma_free_channel)(int32_t requestor);
|
||||
void (*dma_clear_channel)(int32_t channel);
|
||||
int32_t (*MCD_startDma)(long channel,
|
||||
int8_t *srcAddr, uint32_t srcIncr, int8_t *destAddr, uint32_t destIncr,
|
||||
uint32_t dmaSize, uint32_t xferSize, uint32_t initiator, int32_t priority,
|
||||
uint32_t flags, uint32_t funcDesc);
|
||||
int32_t (*MCD_dmaStatus)(int32_t channel);
|
||||
int32_t (*MCD_XferProgrQuery)(int32_t channel, MCD_XferProg *progRep);
|
||||
int32_t (*MCD_killDma)(int32_t channel);
|
||||
int32_t (*MCD_continDma)(int32_t channel);
|
||||
int32_t (*MCD_pauseDma)(int32_t channel);
|
||||
int32_t (*MCD_resumeDma)(int32_t channel);
|
||||
int32_t (*MCD_csumQuery)(int32_t channel, uint32_t *csum);
|
||||
void *(*dma_malloc)(uint32_t amount);
|
||||
int32_t (*dma_free)(void *addr);
|
||||
};
|
||||
|
||||
struct xhdi_driver_interface
|
||||
{
|
||||
uint32_t (*xhdivec)();
|
||||
int32_t version;
|
||||
int32_t magic;
|
||||
int (*dma_set_initiator)(int initiator);
|
||||
uint32_t (*dma_get_initiator)(int requestor);
|
||||
void (*dma_free_initiator)(int requestor);
|
||||
int (*dma_set_channel)(int requestor, void (*handler)(void));
|
||||
int (*dma_get_channel)(int requestor);
|
||||
void (*dma_free_channel)(int requestor);
|
||||
void (*dma_clear_channel)(int channel);
|
||||
int (*MCD_startDma)(long channel,
|
||||
int8_t *srcAddr, unsigned int srcIncr, int8_t *destAddr, unsigned int destIncr,
|
||||
unsigned int dmaSize, unsigned int xferSize, unsigned int initiator, int priority,
|
||||
unsigned int flags, unsigned int funcDesc);
|
||||
int32_t (*MCD_dmaStatus)(int32_t channel);
|
||||
int32_t (*MCD_XferProgrQuery)(int32_t channel, MCD_XferProg *progRep);
|
||||
int32_t (*MCD_killDma)(int32_t channel);
|
||||
int32_t (*MCD_continDma)(int32_t channel);
|
||||
int32_t (*MCD_pauseDma)(int32_t channel);
|
||||
int32_t (*MCD_resumeDma)(int32_t channel);
|
||||
int32_t (*MCD_csumQuery)(int32_t channel, uint32_t *csum);
|
||||
void *(*dma_malloc)(uint32_t amount);
|
||||
int32_t (*dma_free)(void *addr);
|
||||
};
|
||||
|
||||
/* Interpretation of offset for color fields: All offsets are from the right,
|
||||
struct xhdi_driver_interface
|
||||
{
|
||||
uint32_t (*xhdivec)();
|
||||
};
|
||||
|
||||
/*
|
||||
* Interpretation of offset for color fields: All offsets are from the right,
|
||||
* inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
|
||||
* can use the offset as right argument to <<). A pixel afterwards is a bit
|
||||
* stream and is written to video memory as that unmodified. This implies
|
||||
@@ -88,7 +93,7 @@ struct fb_bitfield
|
||||
unsigned long offset; /* beginning of bitfield */
|
||||
unsigned long length; /* length of bitfield */
|
||||
unsigned long msb_right; /* != 0 : Most significant bit is */
|
||||
/* right */
|
||||
/* right */
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -139,7 +144,7 @@ struct fb_fix_screeninfo
|
||||
{
|
||||
char id[16]; /* identification string eg "TT Builtin" */
|
||||
unsigned long smem_start; /* Start of frame buffer mem */
|
||||
/* (physical address) */
|
||||
/* (physical address) */
|
||||
unsigned long smem_len; /* Length of frame buffer mem */
|
||||
unsigned long type; /* see FB_TYPE_* */
|
||||
unsigned long type_aux; /* Interleave for interleaved Planes */
|
||||
@@ -149,16 +154,16 @@ struct fb_fix_screeninfo
|
||||
unsigned short ywrapstep; /* zero if no hardware ywrap */
|
||||
unsigned long line_length; /* length of a line in bytes */
|
||||
unsigned long mmio_start; /* Start of Memory Mapped I/O */
|
||||
/* (physical address) */
|
||||
/* (physical address) */
|
||||
unsigned long mmio_len; /* Length of Memory Mapped I/O */
|
||||
unsigned long accel; /* Indicate to driver which */
|
||||
/* specific chip/card we have */
|
||||
/* specific chip/card we have */
|
||||
unsigned short reserved[3]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
struct fb_chroma
|
||||
{
|
||||
unsigned long redx; /* in fraction of 1024 */
|
||||
unsigned long redx; /* in fraction of 1024 */
|
||||
unsigned long greenx;
|
||||
unsigned long bluex;
|
||||
unsigned long whitex;
|
||||
@@ -201,33 +206,130 @@ struct fb_monspecs
|
||||
|
||||
struct framebuffer_driver_interface
|
||||
{
|
||||
struct fb_info **framebuffer_info; /* pointer to an fb_info struct (defined in include/fb.h) */
|
||||
struct fb_info **framebuffer_info; /* pointer to an fb_info struct (defined in include/fb.h) */
|
||||
};
|
||||
|
||||
struct pci_bios_interface
|
||||
{
|
||||
uint32_t subjar;
|
||||
uint32_t version;
|
||||
/* Although we declare this functions as standard gcc functions (cdecl),
|
||||
* they expect parameters inside registers (fastcall) unsupported by gcc m68k.
|
||||
* Caller will take care of parameters passing convention.
|
||||
*/
|
||||
int32_t (*find_pci_device)(uint32_t id, uint16_t index);
|
||||
int32_t (*find_pci_classcode)(uint32_t class, uint16_t index);
|
||||
int32_t (*read_config_byte)(int32_t handle, uint16_t reg, uint8_t *address);
|
||||
int32_t (*read_config_word)(int32_t handle, uint16_t reg, uint16_t *address);
|
||||
int32_t (*read_config_longword)(int32_t handle, uint16_t reg, uint32_t *address);
|
||||
uint8_t (*fast_read_config_byte)(int32_t handle, uint16_t reg);
|
||||
uint16_t (*fast_read_config_word)(int32_t handle, uint16_t reg);
|
||||
uint32_t (*fast_read_config_longword)(int32_t handle, uint16_t reg);
|
||||
int32_t (*write_config_byte)(int32_t handle, uint16_t reg, uint16_t val);
|
||||
int32_t (*write_config_word)(int32_t handle, uint16_t reg, uint16_t val);
|
||||
int32_t (*write_config_longword)(int32_t handle, uint16_t reg, uint32_t val);
|
||||
int32_t (*hook_interrupt)(int32_t handle, uint32_t *routine, uint32_t *parameter);
|
||||
int32_t (*unhook_interrupt)(int32_t handle);
|
||||
int32_t (*special_cycle)(uint16_t bus, uint32_t data);
|
||||
int32_t (*get_routing)(int32_t handle);
|
||||
int32_t (*set_interrupt)(int32_t handle);
|
||||
int32_t (*get_resource)(int32_t handle);
|
||||
int32_t (*get_card_used)(int32_t handle, uint32_t *address);
|
||||
int32_t (*set_card_used)(int32_t handle, uint32_t *callback);
|
||||
int32_t (*read_mem_byte)(int32_t handle, uint32_t offset, uint8_t *address);
|
||||
int32_t (*read_mem_word)(int32_t handle, uint32_t offset, uint16_t *address);
|
||||
int32_t (*read_mem_longword)(int32_t handle, uint32_t offset, uint32_t *address);
|
||||
uint8_t (*fast_read_mem_byte)(int32_t handle, uint32_t offset);
|
||||
uint16_t (*fast_read_mem_word)(int32_t handle, uint32_t offset);
|
||||
uint32_t (*fast_read_mem_longword)(int32_t handle, uint32_t offset);
|
||||
int32_t (*write_mem_byte)(int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_mem_word)(int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_mem_longword)(int32_t handle, uint32_t offset, uint32_t val);
|
||||
int32_t (*read_io_byte)(int32_t handle, uint32_t offset, uint8_t *address);
|
||||
int32_t (*read_io_word)(int32_t handle, uint32_t offset, uint16_t *address);
|
||||
int32_t (*read_io_longword)(int32_t handle, uint32_t offset, uint32_t *address);
|
||||
uint8_t (*fast_read_io_byte)(int32_t handle, uint32_t offset);
|
||||
uint16_t (*fast_read_io_word)(int32_t handle, uint32_t offset);
|
||||
uint32_t (*fast_read_io_longword)(int32_t handle, uint32_t offset);
|
||||
int32_t (*write_io_byte)(int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_io_word)(int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_io_longword)(int32_t handle, uint32_t offset, uint32_t val);
|
||||
int32_t (*get_machine_id)(void);
|
||||
int32_t (*get_pagesize)(void);
|
||||
int32_t (*virt_to_bus)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
|
||||
int32_t (*bus_to_virt)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
|
||||
int32_t (*virt_to_phys)(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
int32_t (*phys_to_virt)(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
// int32_t reserved[2];
|
||||
};
|
||||
|
||||
struct mmu_driver_interface
|
||||
{
|
||||
uint32_t (*map_page_locked)(uint32_t address, uint32_t length, int asid);
|
||||
uint32_t (*unlock_page)(uint32_t address, uint32_t length, int asid);
|
||||
uint32_t (*report_locked_pages)(uint32_t *num_itlb, uint32_t *num_dtlb);
|
||||
uint32_t (*report_pagesize)(void);
|
||||
};
|
||||
|
||||
struct pci_native_driver_interface_0_1
|
||||
{
|
||||
uint32_t (*pci_read_config_longword)(int32_t handle, int offset);
|
||||
uint16_t (*pci_read_config_word)(int32_t handle, int offset);
|
||||
uint8_t (*pci_read_config_byte)(int32_t handle, int offset);
|
||||
|
||||
int32_t (*pci_write_config_longword)(int32_t handle, int offset, uint32_t value);
|
||||
int32_t (*pci_write_config_word)(int32_t handle, int offset, uint16_t value);
|
||||
int32_t (*pci_write_config_byte)(int32_t handle, int offset, uint8_t value);
|
||||
int32_t (*pci_hook_interrupt)(int32_t handle, void *handler, void *parameter);
|
||||
int32_t (*pci_unhook_interrupt)(int32_t handle);
|
||||
|
||||
struct pci_rd * (*pci_get_resource)(int32_t handle);
|
||||
};
|
||||
|
||||
struct pci_native_driver_interface
|
||||
{
|
||||
uint32_t (*pci_read_config_longword)(int32_t handle, int offset);
|
||||
uint16_t (*pci_read_config_word)(int32_t handle, int offset);
|
||||
uint8_t (*pci_read_config_byte)(int32_t handle, int offset);
|
||||
|
||||
int32_t (*pci_write_config_longword)(int32_t handle, int offset, uint32_t value);
|
||||
int32_t (*pci_write_config_word)(int32_t handle, int offset, uint16_t value);
|
||||
int32_t (*pci_write_config_byte)(int32_t handle, int offset, uint8_t value);
|
||||
int32_t (*pci_hook_interrupt)(int32_t handle, void *handler, void *parameter);
|
||||
int32_t (*pci_unhook_interrupt)(int32_t handle);
|
||||
int32_t (*pci_find_device)(uint16_t device_id, uint16_t vendor_id, int index);
|
||||
int32_t (*pci_find_classcode)(uint32_t classcode, int index);
|
||||
struct pci_rd * (*pci_get_resource)(int32_t handle);
|
||||
};
|
||||
|
||||
union interface
|
||||
{
|
||||
struct generic_driver_interface *gdi;
|
||||
struct xhdi_driver_interface *xhdi;
|
||||
struct dma_driver_interface *dma;
|
||||
struct framebuffer_driver_interface *fb;
|
||||
struct generic_driver_interface *gdi;
|
||||
struct xhdi_driver_interface *xhdi;
|
||||
struct dma_driver_interface *dma;
|
||||
struct framebuffer_driver_interface *fb;
|
||||
struct pci_bios_interface *pci;
|
||||
struct mmu_driver_interface *mmu;
|
||||
struct pci_native_driver_interface_0_1 *pci_native_0_1;
|
||||
struct pci_native_driver_interface *pci_native;
|
||||
};
|
||||
|
||||
struct generic_interface
|
||||
{
|
||||
enum driver_type type;
|
||||
char name[16];
|
||||
char description[64];
|
||||
int version;
|
||||
int revision;
|
||||
union interface interface;
|
||||
enum driver_type type;
|
||||
char name[16];
|
||||
char description[64];
|
||||
int version;
|
||||
int revision;
|
||||
union interface interface;
|
||||
};
|
||||
|
||||
struct driver_table
|
||||
{
|
||||
uint32_t bas_version;
|
||||
uint32_t bas_revision;
|
||||
uint32_t (*remove_handler)(); /* calling this will disable the BaS' hook into trap #0 */
|
||||
struct generic_interface *interfaces[];
|
||||
uint32_t bas_version;
|
||||
uint32_t bas_revision;
|
||||
void (*remove_handler)(void); /* calling this will disable the BaS' hook into trap #0 */
|
||||
struct generic_interface *interfaces;
|
||||
};
|
||||
|
||||
|
||||
|
||||
183
include/ehci.h
183
include/ehci.h
@@ -23,43 +23,42 @@
|
||||
#define USB_EHCI_H
|
||||
|
||||
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 5
|
||||
#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
|
||||
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
|
||||
#endif
|
||||
|
||||
/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
|
||||
#define DeviceRequest \
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
|
||||
|
||||
#define DeviceOutRequest \
|
||||
((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
|
||||
((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
|
||||
|
||||
#define InterfaceRequest \
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
|
||||
#define EndpointRequest \
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
|
||||
#define EndpointOutRequest \
|
||||
((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
|
||||
/*
|
||||
* Register Space.
|
||||
*/
|
||||
struct ehci_hccr {
|
||||
uint32_t cr_capbase;
|
||||
struct ehci_hccr
|
||||
{
|
||||
uint32_t cr_capbase;
|
||||
#define HC_LENGTH(p) (((p) >> 0) & 0x00ff)
|
||||
#define HC_VERSION(p) (((p) >> 16) & 0xffff)
|
||||
uint32_t cr_hcsparams;
|
||||
#define HCS_PPC(p) ((p) & (1 << 4))
|
||||
uint32_t cr_hcsparams;
|
||||
#define HCS_PPC(p) ((p) & (1 << 4))
|
||||
#define HCS_INDICATOR(p) ((p) & (1 << 16)) /* Port indicators */
|
||||
#define HCS_N_PORTS(p) (((p) >> 0) & 0xf)
|
||||
uint32_t cr_hccparams;
|
||||
uint8_t cr_hcsp_portrt[8];
|
||||
uint32_t cr_hccparams;
|
||||
uint8_t cr_hcsp_portrt[8];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
struct ehci_hcor {
|
||||
uint32_t or_usbcmd;
|
||||
struct ehci_hcor
|
||||
{
|
||||
uint32_t or_usbcmd;
|
||||
#define CMD_PARK (1 << 11) /* enable "park" */
|
||||
#define CMD_PARK_CNT(c) (((c) >> 8) & 3) /* how many transfers to park */
|
||||
#define CMD_ASE (1 << 5) /* async schedule enable */
|
||||
@@ -68,72 +67,74 @@ struct ehci_hcor {
|
||||
#define CMD_PSE (1 << 4) /* periodic schedule enable */
|
||||
#define CMD_RESET (1 << 1) /* reset HC not bus */
|
||||
#define CMD_RUN (1 << 0) /* start/stop HC */
|
||||
uint32_t or_usbsts;
|
||||
uint32_t or_usbsts;
|
||||
#define STD_ASS (1 << 15)
|
||||
#define STS_PSSTAT (1 << 14)
|
||||
#define STS_RECL ( 1 << 13)
|
||||
#define STS_PSSTAT (1 << 14)
|
||||
#define STS_RECL (1 << 13)
|
||||
#define STS_HALT (1 << 12)
|
||||
#define STS_IAA (1 << 5)
|
||||
#define STS_HSE (1 << 4)
|
||||
#define STS_FLR (1 << 3)
|
||||
#define STS_PCD (1 << 2)
|
||||
#define STS_IAA (1 << 5)
|
||||
#define STS_HSE (1 << 4)
|
||||
#define STS_FLR (1 << 3)
|
||||
#define STS_PCD (1 << 2)
|
||||
#define STS_USBERRINT (1 << 1)
|
||||
#define STS_USBINT (1 << 0)
|
||||
uint32_t or_usbintr;
|
||||
#define INTR_IAAE (1 << 5)
|
||||
#define INTR_HSEE (1 << 4)
|
||||
#define INTR_FLRE (1 << 3)
|
||||
#define INTR_PCDE (1 << 2)
|
||||
#define STS_USBINT (1 << 0)
|
||||
uint32_t or_usbintr;
|
||||
#define INTR_IAAE (1 << 5)
|
||||
#define INTR_HSEE (1 << 4)
|
||||
#define INTR_FLRE (1 << 3)
|
||||
#define INTR_PCDE (1 << 2)
|
||||
#define INTR_USBERRINTE (1 << 1)
|
||||
#define INTR_USBINTE (1 << 0)
|
||||
uint32_t or_frindex;
|
||||
uint32_t or_ctrldssegment;
|
||||
uint32_t or_periodiclistbase;
|
||||
uint32_t or_asynclistaddr;
|
||||
uint32_t _reserved_[9];
|
||||
uint32_t or_configflag;
|
||||
uint32_t or_frindex;
|
||||
uint32_t or_ctrldssegment;
|
||||
uint32_t or_periodiclistbase;
|
||||
uint32_t or_asynclistaddr;
|
||||
uint32_t _reserved_[9];
|
||||
uint32_t or_configflag;
|
||||
#define FLAG_CF (1 << 0) /* true: we'll support "high speed" */
|
||||
uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
|
||||
uint32_t or_systune;
|
||||
uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
|
||||
uint32_t or_systune;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define USBMODE 0x68 /* USB Device mode */
|
||||
#define USBMODE 0x68 /* USB Device mode */
|
||||
#define USBMODE_SDIS (1 << 3) /* Stream disable */
|
||||
#define USBMODE_BE (1 << 2) /* BE/LE endiannes select */
|
||||
#define USBMODE_BE (1 << 2) /* BE/LE endiannes select */
|
||||
#define USBMODE_CM_HC (3 << 0) /* host controller mode */
|
||||
#define USBMODE_CM_IDLE (0 << 0) /* idle state */
|
||||
|
||||
/* Interface descriptor */
|
||||
struct usb_linux_interface_descriptor {
|
||||
unsigned char bLength;
|
||||
unsigned char bDescriptorType;
|
||||
unsigned char bInterfaceNumber;
|
||||
unsigned char bAlternateSetting;
|
||||
unsigned char bNumEndpoints;
|
||||
unsigned char bInterfaceClass;
|
||||
unsigned char bInterfaceSubClass;
|
||||
unsigned char bInterfaceProtocol;
|
||||
unsigned char iInterface;
|
||||
struct usb_linux_interface_descriptor
|
||||
{
|
||||
unsigned char bLength;
|
||||
unsigned char bDescriptorType;
|
||||
unsigned char bInterfaceNumber;
|
||||
unsigned char bAlternateSetting;
|
||||
unsigned char bNumEndpoints;
|
||||
unsigned char bInterfaceClass;
|
||||
unsigned char bInterfaceSubClass;
|
||||
unsigned char bInterfaceProtocol;
|
||||
unsigned char iInterface;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* Configuration descriptor information.. */
|
||||
struct usb_linux_config_descriptor {
|
||||
unsigned char bLength;
|
||||
unsigned char bDescriptorType;
|
||||
unsigned short wTotalLength;
|
||||
unsigned char bNumInterfaces;
|
||||
unsigned char bConfigurationValue;
|
||||
unsigned char iConfiguration;
|
||||
unsigned char bmAttributes;
|
||||
unsigned char MaxPower;
|
||||
struct usb_linux_config_descriptor
|
||||
{
|
||||
unsigned char bLength;
|
||||
unsigned char bDescriptorType;
|
||||
unsigned short wTotalLength;
|
||||
unsigned char bNumInterfaces;
|
||||
unsigned char bConfigurationValue;
|
||||
unsigned char iConfiguration;
|
||||
unsigned char bmAttributes;
|
||||
unsigned char MaxPower;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#if defined CONFIG_EHCI_DESC_BIG_ENDIAN
|
||||
#define ehci_readl(x) (*((volatile u32 *)(x)))
|
||||
#define ehci_writel(a, b) (*((volatile u32 *)(a)) = ((volatile u32)b))
|
||||
#define ehci_readl(x) (*((volatile uint32_t *)(x)))
|
||||
#define ehci_writel(a, b) (*((volatile uint32_t *)(a)) = ((volatile uint32_t) b))
|
||||
#else
|
||||
#define ehci_readl(x) swpl((*((volatile u32 *)(x))))
|
||||
#define ehci_writel(a, b) (*((volatile u32 *)(a)) = swpl(((volatile u32)b)))
|
||||
#define ehci_readl(x) swpl((*((volatile uint32_t *)(x))))
|
||||
#define ehci_writel(a, b) (*((volatile uint32_t *)(a)) = swpl(((volatile uint32_t) b)))
|
||||
#endif
|
||||
|
||||
#if defined CONFIG_EHCI_MMIO_BIG_ENDIAN
|
||||
@@ -147,18 +148,18 @@ struct usb_linux_config_descriptor {
|
||||
#define EHCI_PS_WKOC_E (1 << 22) /* RW wake on over current */
|
||||
#define EHCI_PS_WKDSCNNT_E (1 << 21) /* RW wake on disconnect */
|
||||
#define EHCI_PS_WKCNNT_E (1 << 20) /* RW wake on connect */
|
||||
#define EHCI_PS_PO (1 << 13) /* RW port owner */
|
||||
#define EHCI_PS_PP (1 << 12) /* RW,RO port power */
|
||||
#define EHCI_PS_LS (3 << 10) /* RO line status */
|
||||
#define EHCI_PS_PR (1 << 8) /* RW port reset */
|
||||
#define EHCI_PS_SUSP (1 << 7) /* RW suspend */
|
||||
#define EHCI_PS_FPR (1 << 6) /* RW force port resume */
|
||||
#define EHCI_PS_OCC (1 << 5) /* RWC over current change */
|
||||
#define EHCI_PS_OCA (1 << 4) /* RO over current active */
|
||||
#define EHCI_PS_PEC (1 << 3) /* RWC port enable change */
|
||||
#define EHCI_PS_PE (1 << 2) /* RW port enable */
|
||||
#define EHCI_PS_CSC (1 << 1) /* RWC connect status change */
|
||||
#define EHCI_PS_CS (1 << 0) /* RO connect status */
|
||||
#define EHCI_PS_PO (1 << 13) /* RW port owner */
|
||||
#define EHCI_PS_PP (1 << 12) /* RW,RO port power */
|
||||
#define EHCI_PS_LS (3 << 10) /* RO line status */
|
||||
#define EHCI_PS_PR (1 << 8) /* RW port reset */
|
||||
#define EHCI_PS_SUSP (1 << 7) /* RW suspend */
|
||||
#define EHCI_PS_FPR (1 << 6) /* RW force port resume */
|
||||
#define EHCI_PS_OCC (1 << 5) /* RWC over current change */
|
||||
#define EHCI_PS_OCA (1 << 4) /* RO over current active */
|
||||
#define EHCI_PS_PEC (1 << 3) /* RWC port enable change */
|
||||
#define EHCI_PS_PE (1 << 2) /* RW port enable */
|
||||
#define EHCI_PS_CSC (1 << 1) /* RWC connect status change */
|
||||
#define EHCI_PS_CS (1 << 0) /* RO connect status */
|
||||
#define EHCI_PS_CLEAR (EHCI_PS_OCC | EHCI_PS_PEC | EHCI_PS_CSC)
|
||||
|
||||
#define EHCI_PS_IS_LOWSPEED(x) (((x) & EHCI_PS_LS) == (1 << 10))
|
||||
@@ -174,31 +175,33 @@ struct usb_linux_config_descriptor {
|
||||
*/
|
||||
|
||||
/* Queue Element Transfer Descriptor (qTD). */
|
||||
struct qTD {
|
||||
uint32_t qt_next;
|
||||
struct qTD
|
||||
{
|
||||
uint32_t qt_next;
|
||||
#define QT_NEXT_TERMINATE 1
|
||||
uint32_t qt_altnext;
|
||||
uint32_t qt_token;
|
||||
uint32_t qt_buffer[5];
|
||||
uint32_t qt_altnext;
|
||||
uint32_t qt_token;
|
||||
uint32_t qt_buffer[5];
|
||||
};
|
||||
|
||||
/* Queue Head (QH). */
|
||||
struct QH {
|
||||
uint32_t qh_link;
|
||||
struct QH
|
||||
{
|
||||
uint32_t qh_link;
|
||||
#define QH_LINK_TERMINATE 1
|
||||
#define QH_LINK_TYPE_ITD 0
|
||||
#define QH_LINK_TYPE_QH 2
|
||||
#define QH_LINK_TYPE_SITD 4
|
||||
#define QH_LINK_TYPE_FSTN 6
|
||||
uint32_t qh_endpt1;
|
||||
uint32_t qh_endpt2;
|
||||
uint32_t qh_curtd;
|
||||
struct qTD qh_overlay;
|
||||
/*
|
||||
* Add dummy fill value to make the size of this struct
|
||||
* aligned to 32 bytes
|
||||
*/
|
||||
uint8_t fill[16];
|
||||
uint32_t qh_endpt1;
|
||||
uint32_t qh_endpt2;
|
||||
uint32_t qh_curtd;
|
||||
struct qTD qh_overlay;
|
||||
/*
|
||||
* Add dummy fill value to make the size of this struct
|
||||
* aligned to 32 bytes
|
||||
*/
|
||||
uint8_t fill[16];
|
||||
};
|
||||
|
||||
/* Low level init functions */
|
||||
|
||||
@@ -1,28 +1,8 @@
|
||||
#ifndef _EXCEPTIONS_H_
|
||||
#define _EXCEPTIONS_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
static inline uint32_t set_ipl(uint32_t ipl)
|
||||
{
|
||||
uint32_t ret;
|
||||
|
||||
__asm__ __volatile__(
|
||||
" move.w sr,%[ret]\r\n" /* retrieve status register */
|
||||
" andi.l #0x07,%[ipl]\n\t" /* mask out ipl bits on new value */
|
||||
" lsl.l #8,%[ipl]\n\t" /* shift them to position */
|
||||
" move.l %[ret],d0\n\t" /* retrieve original value */
|
||||
" andi.l #0x0000f8ff,d0\n\t" /* clear ipl part */
|
||||
" or.l %[ipl],d0\n\t" /* or in new value */
|
||||
" move.w d0,sr\n\t" /* put it in place */
|
||||
" andi.l #0x0700,%[ret]\r\n" /* mask out ipl bits */
|
||||
" lsr.l #8,%[ret]\r\n" /* shift them to position */
|
||||
: [ret] "=&d" (ret) /* output */
|
||||
: [ipl] "d" (ipl) /* input */
|
||||
: "d0" /* clobber */
|
||||
);
|
||||
|
||||
return ret;
|
||||
}
|
||||
extern uint32_t set_ipl(uint32_t ipl);
|
||||
|
||||
#endif /* _EXCEPTIONS_H_ */
|
||||
|
||||
@@ -528,7 +528,6 @@ struct fb_videomode {
|
||||
extern const struct fb_videomode vesa_modes[];
|
||||
|
||||
/* timer */
|
||||
extern void udelay(long usec);
|
||||
#ifdef COLDFIRE
|
||||
#ifdef MCF5445X
|
||||
#define US_TO_TIMER(a) (a)
|
||||
@@ -541,6 +540,7 @@ extern void udelay(long usec);
|
||||
#define US_TO_TIMER(a) (((a)*256)/5000)
|
||||
#define TIMER_TO_US(a) (((a)*5000)/256)
|
||||
#endif
|
||||
|
||||
extern void start_timeout(void);
|
||||
extern int end_timeout(long msec);
|
||||
extern void mdelay(long msec);
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
* File: fec.h
|
||||
* Purpose: Driver for the Fast Ethernet Controller (FEC)
|
||||
*
|
||||
* Notes:
|
||||
* Notes:
|
||||
*/
|
||||
|
||||
#ifndef _FEC_H_
|
||||
@@ -30,30 +30,30 @@
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
int total; /* total count of errors */
|
||||
int hberr; /* heartbeat error */
|
||||
int babr; /* babbling receiver */
|
||||
int babt; /* babbling transmitter */
|
||||
int gra; /* graceful stop complete */
|
||||
int txf; /* transmit frame */
|
||||
int mii; /* MII */
|
||||
int lc; /* late collision */
|
||||
int rl; /* collision retry limit */
|
||||
int xfun; /* transmit FIFO underrrun */
|
||||
int xferr; /* transmit FIFO error */
|
||||
int rferr; /* receive FIFO error */
|
||||
int dtxf; /* DMA transmit frame */
|
||||
int drxf; /* DMA receive frame */
|
||||
int rfsw_inv; /* Invalid bit in RFSW */
|
||||
int rfsw_l; /* RFSW Last in Frame */
|
||||
int rfsw_m; /* RFSW Miss */
|
||||
int rfsw_bc; /* RFSW Broadcast */
|
||||
int rfsw_mc; /* RFSW Multicast */
|
||||
int rfsw_lg; /* RFSW Length Violation */
|
||||
int rfsw_no; /* RFSW Non-octet */
|
||||
int rfsw_cr; /* RFSW Bad CRC */
|
||||
int rfsw_ov; /* RFSW Overflow */
|
||||
int rfsw_tr; /* RFSW Truncated */
|
||||
int total; /* total count of errors */
|
||||
int hberr; /* heartbeat error */
|
||||
int babr; /* babbling receiver */
|
||||
int babt; /* babbling transmitter */
|
||||
int gra; /* graceful stop complete */
|
||||
int txf; /* transmit frame */
|
||||
int mii; /* MII */
|
||||
int lc; /* late collision */
|
||||
int rl; /* collision retry limit */
|
||||
int xfun; /* transmit FIFO underrrun */
|
||||
int xferr; /* transmit FIFO error */
|
||||
int rferr; /* receive FIFO error */
|
||||
int dtxf; /* DMA transmit frame */
|
||||
int drxf; /* DMA receive frame */
|
||||
int rfsw_inv; /* Invalid bit in RFSW */
|
||||
int rfsw_l; /* RFSW Last in Frame */
|
||||
int rfsw_m; /* RFSW Miss */
|
||||
int rfsw_bc; /* RFSW Broadcast */
|
||||
int rfsw_mc; /* RFSW Multicast */
|
||||
int rfsw_lg; /* RFSW Length Violation */
|
||||
int rfsw_no; /* RFSW Non-octet */
|
||||
int rfsw_cr; /* RFSW Bad CRC */
|
||||
int rfsw_ov; /* RFSW Overflow */
|
||||
int rfsw_tr; /* RFSW Truncated */
|
||||
} FEC_EVENT_LOG;
|
||||
|
||||
|
||||
@@ -87,8 +87,8 @@ extern int fec1_send(NIF *, uint8_t *, uint8_t *, uint16_t , NBUF *);
|
||||
extern void fec_irq_enable(uint8_t, uint8_t, uint8_t);
|
||||
extern void fec_irq_disable(uint8_t);
|
||||
extern void fec_interrupt_handler(uint8_t);
|
||||
extern int fec0_interrupt_handler(void *, void *);
|
||||
extern int fec1_interrupt_handler(void *, void *);
|
||||
extern bool fec0_interrupt_handler(void *, void *);
|
||||
extern bool fec1_interrupt_handler(void *, void *);
|
||||
extern void fec_eth_setup(uint8_t, uint8_t, uint8_t, uint8_t, const uint8_t *);
|
||||
extern void fec_eth_reset(uint8_t);
|
||||
extern void fec_eth_stop(uint8_t);
|
||||
|
||||
@@ -21,7 +21,7 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
#include <ffconf.h> /* FatFs configuration options */
|
||||
|
||||
#if _FATFS != _FFCONF
|
||||
|
||||
@@ -27,10 +27,10 @@
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#define SYSCLK 132000
|
||||
#define SYSCLK 132000 /* NOTE: 132 _is_ correct. 133 _is_ wrong. Do not change! */
|
||||
|
||||
#define BOOTFLASH_BASE_ADDRESS 0xE0000000
|
||||
#define BOOTFLASH_SIZE 0x800000 /* FireBee has 8 MByte Flash */
|
||||
#define BOOTFLASH_SIZE 0x800000 /* FireBee has 8 MByte Flash */
|
||||
#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1)
|
||||
|
||||
#define SDRAM_START 0x00000000 /* start at address 0 */
|
||||
|
||||
98
include/font.h
Normal file
98
include/font.h
Normal file
@@ -0,0 +1,98 @@
|
||||
/*
|
||||
* font.h - font specific definitions
|
||||
*
|
||||
* Copyright (c) 2001 Lineo, Inc.
|
||||
* Copyright (c) 2004 by Authors:
|
||||
*
|
||||
* Authors:
|
||||
* MAD Martin Doering
|
||||
*
|
||||
* This file is distributed under the GPL, version 2 or at your
|
||||
* option any later version. See doc/license.txt for details.
|
||||
*/
|
||||
|
||||
#ifndef FONT_H
|
||||
#define FONT_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* font header flags */
|
||||
|
||||
#define F_DEFAULT 1 /* this is the default font (face and size) */
|
||||
#define F_HORZ_OFF 2 /* there are left and right offset tables */
|
||||
#define F_STDFORM 4 /* is the font in standard format */
|
||||
#define F_MONOSPACE 8 /* is the font monospaced */
|
||||
|
||||
/* font style bits */
|
||||
|
||||
#define F_THICKEN 1
|
||||
#define F_LIGHT 2
|
||||
#define F_SKEW 4
|
||||
#define F_UNDER 8
|
||||
#define F_OUTLINE 16
|
||||
#define F_SHADOW 32
|
||||
|
||||
/* font specific linea variables */
|
||||
|
||||
extern const uint16_t *v_fnt_ad; /* address of current monospace font */
|
||||
extern const uint16_t *v_off_ad; /* address of font offset table */
|
||||
extern uint16_t v_fnt_nd; /* ascii code of last cell in font */
|
||||
extern uint16_t v_fnt_st; /* ascii code of first cell in font */
|
||||
extern uint16_t v_fnt_wr; /* font cell wrap */
|
||||
|
||||
/* character cell specific linea variables */
|
||||
|
||||
extern uint16_t v_cel_ht; /* cell height (width is 8) */
|
||||
extern uint16_t v_cel_mx; /* needed by MiNT: columns on the screen minus 1 */
|
||||
extern uint16_t v_cel_my; /* needed by MiNT: rows on the screen minus 1 */
|
||||
extern uint16_t v_cel_wr; /* needed by MiNT: length (in int8_ts) of a line of characters */
|
||||
|
||||
/*
|
||||
* font_ring is a struct of four pointers, each of which points to
|
||||
* a list of font headers linked together to form a string.
|
||||
*/
|
||||
|
||||
extern struct font_head *font_ring[4]; /* Ring of available fonts */
|
||||
extern int16_t font_count; /* all three fonts and NULL */
|
||||
|
||||
/* the font header descibes a font */
|
||||
|
||||
struct font_head {
|
||||
int16_t font_id;
|
||||
int16_t point;
|
||||
int8_t name[32];
|
||||
uint16_t first_ade;
|
||||
uint16_t last_ade;
|
||||
uint16_t top;
|
||||
uint16_t ascent;
|
||||
uint16_t half;
|
||||
uint16_t descent;
|
||||
uint16_t bottom;
|
||||
uint16_t max_char_width;
|
||||
uint16_t max_cell_width;
|
||||
uint16_t left_offset; /* amount character slants left when skewed */
|
||||
uint16_t right_offset; /* amount character slants right */
|
||||
uint16_t thicken; /* number of pixels to smear */
|
||||
uint16_t ul_size; /* size of the underline */
|
||||
uint16_t lighten; /* mask to and with to lighten */
|
||||
uint16_t skew; /* mask for skewing */
|
||||
uint16_t flags;
|
||||
|
||||
const uint8_t *hor_table; /* horizontal offsets */
|
||||
const uint16_t *off_table; /* character offsets */
|
||||
const uint16_t *dat_table; /* character definitions */
|
||||
uint16_t form_width;
|
||||
uint16_t form_height;
|
||||
|
||||
struct font_head *next_font;/* pointer to next font */
|
||||
uint16_t font_seg;
|
||||
};
|
||||
|
||||
|
||||
|
||||
/* prototypes */
|
||||
|
||||
void font_init(void); /* initialize BIOS font ring */
|
||||
void font_set_default(void); /* choose the default font */
|
||||
|
||||
#endif /* FONT_H */
|
||||
@@ -32,18 +32,19 @@
|
||||
* manipulate the line states, and to init any hw-specific features. This is
|
||||
* only used if you have more than one hw-type of adapter running.
|
||||
*/
|
||||
struct i2c_algo_bit_data {
|
||||
void *data; /* private data for lowlevel routines */
|
||||
void (*setsda) (void *data, int state);
|
||||
void (*setscl) (void *data, int state);
|
||||
int (*getsda) (void *data);
|
||||
int (*getscl) (void *data);
|
||||
struct i2c_algo_bit_data
|
||||
{
|
||||
void *data; /* private data for lowlevel routines */
|
||||
void (*setsda) (void *data, int state);
|
||||
void (*setscl) (void *data, int state);
|
||||
int (*getsda) (void *data);
|
||||
int (*getscl) (void *data);
|
||||
|
||||
/* local settings */
|
||||
int udelay; /* half-clock-cycle time in microsecs */
|
||||
/* i.e. clock is (500 / udelay) KHz */
|
||||
int mdelay; /* in millisecs, unused */
|
||||
int timeout; /* in jiffies */
|
||||
/* local settings */
|
||||
int udelay; /* half-clock-cycle time in microsecs */
|
||||
/* i.e. clock is (500 / udelay) KHz */
|
||||
int mdelay; /* in millisecs, unused */
|
||||
int timeout; /* in jiffies */
|
||||
};
|
||||
|
||||
#define I2C_BIT_ADAP_MAX 16
|
||||
|
||||
@@ -28,6 +28,8 @@
|
||||
#ifndef _I2C_H
|
||||
#define _I2C_H
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
/* --- General options ------------------------------------------------ */
|
||||
|
||||
struct i2c_msg;
|
||||
@@ -44,39 +46,51 @@ extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
|
||||
* be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584
|
||||
* to name two of the most common.
|
||||
*/
|
||||
struct i2c_algorithm {
|
||||
unsigned int id;
|
||||
int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num);
|
||||
/* --- ioctl like call to set div. parameters. */
|
||||
int (*algo_control)(struct i2c_adapter *, unsigned int, unsigned long);
|
||||
struct i2c_algorithm
|
||||
{
|
||||
unsigned int id;
|
||||
int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num);
|
||||
/* --- ioctl like call to set div. parameters. */
|
||||
int (*algo_control)(struct i2c_adapter *, unsigned int, unsigned long);
|
||||
};
|
||||
|
||||
/*
|
||||
* i2c_adapter is the structure used to identify a physical i2c bus along
|
||||
* with the access algorithms necessary to access it.
|
||||
*/
|
||||
struct i2c_adapter {
|
||||
struct i2c_algorithm *algo;/* the algorithm to access the bus */
|
||||
void *algo_data;
|
||||
int timeout;
|
||||
int retries;
|
||||
int nr;
|
||||
struct i2c_adapter
|
||||
{
|
||||
struct i2c_algorithm *algo; /* the algorithm to access the bus */
|
||||
void *algo_data;
|
||||
int timeout;
|
||||
int retries;
|
||||
int nr;
|
||||
};
|
||||
|
||||
/*
|
||||
* I2C Message - used for pure i2c transaction, also from /dev interface
|
||||
*/
|
||||
struct i2c_msg {
|
||||
unsigned short addr; /* slave address */
|
||||
unsigned short flags;
|
||||
#define I2C_M_TEN 0x10 /* we have a ten bit chip address */
|
||||
#define I2C_M_RD 0x01
|
||||
#define I2C_M_NOSTART 0x4000
|
||||
#define I2C_M_REV_DIR_ADDR 0x2000
|
||||
#define I2C_M_IGNORE_NAK 0x1000
|
||||
#define I2C_M_NO_RD_ACK 0x0800
|
||||
unsigned short len; /* msg length */
|
||||
unsigned char *buf; /* pointer to msg data */
|
||||
struct i2c_msg
|
||||
{
|
||||
unsigned short addr; /* slave address */
|
||||
unsigned short flags;
|
||||
#define I2C_M_TEN 0x10 /* we have a ten bit chip address */
|
||||
#define I2C_M_RD 0x01
|
||||
#define I2C_M_NOSTART 0x4000
|
||||
#define I2C_M_REV_DIR_ADDR 0x2000
|
||||
#define I2C_M_IGNORE_NAK 0x1000
|
||||
#define I2C_M_NO_RD_ACK 0x0800
|
||||
unsigned short len; /* msg length */
|
||||
unsigned char *buf; /* pointer to msg data */
|
||||
};
|
||||
|
||||
extern void i2c_init(void);
|
||||
extern void i2c_set_frequency(int hz);
|
||||
extern int i2c_read(int address, char *data, int lengt, bool repeated);
|
||||
extern int i2c_read_byte(int ack);
|
||||
extern int i2c_write(int address, const char *data, int length, bool repeated);
|
||||
extern int i2c_write_byte(int data);
|
||||
extern void i2c_start(void);
|
||||
extern void i2c_stop(void);
|
||||
|
||||
#endif /* _I2C_H */
|
||||
|
||||
@@ -27,81 +27,123 @@
|
||||
#include <stdbool.h>
|
||||
|
||||
/* interrupt sources */
|
||||
#define INT_SOURCE_EPORT_EPF1 1 // edge port flag 1
|
||||
#define INT_SOURCE_EPORT_EPF2 2 // edge port flag 2
|
||||
#define INT_SOURCE_EPORT_EPF3 3 // edge port flag 3
|
||||
#define INT_SOURCE_EPORT_EPF4 4 // edge port flag 4
|
||||
#define INT_SOURCE_EPORT_EPF5 5 // edge port flag 5
|
||||
#define INT_SOURCE_EPORT_EPF6 6 // edge port flag 6
|
||||
#define INT_SOURCE_EPORT_EPF7 7 // edge port flag 7
|
||||
#define INT_SOURCE_USB_EP0ISR 15 // USB endpoint 0 interrupt
|
||||
#define INT_SOURCE_USB_EP1ISR 16 // USB endpoint 1 interrupt
|
||||
#define INT_SOURCE_USB_EP2ISR 17 // USB endpoint 2 interrupt
|
||||
#define INT_SOURCE_USB_EP3ISR 18 // USB endpoint 3 interrupt
|
||||
#define INT_SOURCE_USB_EP4ISR 19 // USB endpoint 4 interrupt
|
||||
#define INT_SOURCE_USB_EP5ISR 20 // USB endpoint 5 interrupt
|
||||
#define INT_SOURCE_USB_EP6ISR 21 // USB endpoint 6 interrupt
|
||||
#define INT_SOURCE_USB_USBISR 22 // USB general interrupt
|
||||
#define INT_SOURCE_USB_USBAISR 23 // USB core interrupt
|
||||
#define INT_SOURCE_USB_ANY 24 // OR of all USB interrupts
|
||||
#define INT_SOURCE_USB_DSPI_OVF 25 // DSPI overflow or underflow
|
||||
#define INT_SOURCE_USB_DSPI_RFOF 26 // receive FIFO overflow interrupt
|
||||
#define INT_SOURCE_USB_DSPI_RFDF 27 // receive FIFO drain interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TFUF 28 // transmit FIFO underflow interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TCF 29 // transfer complete interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TFFF 30 // transfer FIFO fill interrupt
|
||||
#define INT_SOURCE_USB_DSPI_EOQF 31 // end of queue interrupt
|
||||
#define INT_SOURCE_PSC3 32 // PSC3 interrupt
|
||||
#define INT_SOURCE_PSC2 33 // PSC2 interrupt
|
||||
#define INT_SOURCE_PSC1 34 // PSC1 interrupt
|
||||
#define INT_SOURCE_PSC0 35 // PSC0 interrupt
|
||||
#define INT_SOURCE_CTIMERS 36 // combined source for comm timers
|
||||
#define INT_SOURCE_SEC 37 // SEC interrupt
|
||||
#define INT_SOURCE_FEC1 38 // FEC1 interrupt
|
||||
#define INT_SOURCE_FEC0 39 // FEC0 interrupt
|
||||
#define INT_SOURCE_I2C 40 // I2C interrupt
|
||||
#define INT_SOURCE_PCIARB 41 // PCI arbiter interrupt
|
||||
#define INT_SOURCE_CBPCI 42 // COMM bus PCI interrupt
|
||||
#define INT_SOURCE_XLBPCI 43 // XLB PCI interrupt
|
||||
#define INT_SOURCE_XLBARB 47 // XLBARB to PCI interrupt
|
||||
#define INT_SOURCE_DMA 48 // multichannel DMA interrupt
|
||||
#define INT_SOURCE_CAN0_ERROR 49 // FlexCAN error interrupt
|
||||
#define INT_SOURCE_CAN0_BUSOFF 50 // FlexCAN bus off interrupt
|
||||
#define INT_SOURCE_CAN0_MBOR 51 // message buffer ORed interrupt
|
||||
#define INT_SOURCE_SLT1 53 // slice timer 1 interrupt
|
||||
#define INT_SOURCE_SLT0 54 // slice timer 0 interrupt
|
||||
#define INT_SOURCE_CAN1_ERROR 55 // FlexCAN error interrupt
|
||||
#define INT_SOURCE_CAN1_BUSOFF 56 // FlexCAN bus off interrupt
|
||||
#define INT_SOURCE_CAN1_MBOR 57 // message buffer ORed interrupt
|
||||
#define INT_SOURCE_GPT3 59 // GPT3 timer interrupt
|
||||
#define INT_SOURCE_GPT2 60 // GPT2 timer interrupt
|
||||
#define INT_SOURCE_GPT1 61 // GPT1 timer interrupt
|
||||
#define INT_SOURCE_GPT0 62 // GPT0 timer interrupt
|
||||
#define INT_SOURCE_EPORT_EPF1 1 // edge port flag 1
|
||||
#define INT_SOURCE_EPORT_EPF2 2 // edge port flag 2
|
||||
#define INT_SOURCE_EPORT_EPF3 3 // edge port flag 3
|
||||
#define INT_SOURCE_EPORT_EPF4 4 // edge port flag 4
|
||||
#define INT_SOURCE_EPORT_EPF5 5 // edge port flag 5
|
||||
#define INT_SOURCE_EPORT_EPF6 6 // edge port flag 6
|
||||
#define INT_SOURCE_EPORT_EPF7 7 // edge port flag 7
|
||||
#define INT_SOURCE_USB_EP0ISR 15 // USB endpoint 0 interrupt
|
||||
#define INT_SOURCE_USB_EP1ISR 16 // USB endpoint 1 interrupt
|
||||
#define INT_SOURCE_USB_EP2ISR 17 // USB endpoint 2 interrupt
|
||||
#define INT_SOURCE_USB_EP3ISR 18 // USB endpoint 3 interrupt
|
||||
#define INT_SOURCE_USB_EP4ISR 19 // USB endpoint 4 interrupt
|
||||
#define INT_SOURCE_USB_EP5ISR 20 // USB endpoint 5 interrupt
|
||||
#define INT_SOURCE_USB_EP6ISR 21 // USB endpoint 6 interrupt
|
||||
#define INT_SOURCE_USB_USBISR 22 // USB general interrupt
|
||||
#define INT_SOURCE_USB_USBAISR 23 // USB core interrupt
|
||||
#define INT_SOURCE_USB_ANY 24 // OR of all USB interrupts
|
||||
#define INT_SOURCE_USB_DSPI_OVF 25 // DSPI overflow or underflow
|
||||
#define INT_SOURCE_USB_DSPI_RFOF 26 // receive FIFO overflow interrupt
|
||||
#define INT_SOURCE_USB_DSPI_RFDF 27 // receive FIFO drain interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TFUF 28 // transmit FIFO underflow interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TCF 29 // transfer complete interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TFFF 30 // transfer FIFO fill interrupt
|
||||
#define INT_SOURCE_USB_DSPI_EOQF 31 // end of queue interrupt
|
||||
#define INT_SOURCE_PSC3 32 // PSC3 interrupt
|
||||
#define INT_SOURCE_PSC2 33 // PSC2 interrupt
|
||||
#define INT_SOURCE_PSC1 34 // PSC1 interrupt
|
||||
#define INT_SOURCE_PSC0 35 // PSC0 interrupt
|
||||
#define INT_SOURCE_CTIMERS 36 // combined source for comm timers
|
||||
#define INT_SOURCE_SEC 37 // SEC interrupt
|
||||
#define INT_SOURCE_FEC1 38 // FEC1 interrupt
|
||||
#define INT_SOURCE_FEC0 39 // FEC0 interrupt
|
||||
#define INT_SOURCE_I2C 40 // I2C interrupt
|
||||
#define INT_SOURCE_PCIARB 41 // PCI arbiter interrupt
|
||||
#define INT_SOURCE_CBPCI 42 // COMM bus PCI interrupt
|
||||
#define INT_SOURCE_XLBPCI 43 // XLB PCI interrupt
|
||||
#define INT_SOURCE_XLBARB 47 // XLBARB to PCI interrupt
|
||||
#define INT_SOURCE_DMA 48 // multichannel DMA interrupt
|
||||
#define INT_SOURCE_CAN0_ERROR 49 // FlexCAN error interrupt
|
||||
#define INT_SOURCE_CAN0_BUSOFF 50 // FlexCAN bus off interrupt
|
||||
#define INT_SOURCE_CAN0_MBOR 51 // message buffer ORed interrupt
|
||||
#define INT_SOURCE_SLT1 53 // slice timer 1 interrupt
|
||||
#define INT_SOURCE_SLT0 54 // slice timer 0 interrupt
|
||||
#define INT_SOURCE_CAN1_ERROR 55 // FlexCAN error interrupt
|
||||
#define INT_SOURCE_CAN1_BUSOFF 56 // FlexCAN bus off interrupt
|
||||
#define INT_SOURCE_CAN1_MBOR 57 // message buffer ORed interrupt
|
||||
#define INT_SOURCE_GPT3 59 // GPT3 timer interrupt
|
||||
#define INT_SOURCE_GPT2 60 // GPT2 timer interrupt
|
||||
#define INT_SOURCE_GPT1 61 // GPT1 timer interrupt
|
||||
#define INT_SOURCE_GPT0 62 // GPT0 timer interrupt
|
||||
|
||||
|
||||
#define FEC0_INTC_LVL 5 /* interrupt level for FEC0 */
|
||||
#define FEC0_INTC_PRI 7 /* interrupt priority for FEC0 */
|
||||
#define FEC0_INTC_LVL 6 /* interrupt level for FEC0 */
|
||||
#define FEC0_INTC_PRI 7 /* interrupt priority for FEC0 */
|
||||
|
||||
#define FEC1_INTC_LVL 5 /* interrupt level for FEC1 */
|
||||
#define FEC1_INTC_PRI 7 /* interrupt priority for FEC1 */
|
||||
#define FEC1_INTC_LVL 6 /* interrupt level for FEC1 */
|
||||
#define FEC1_INTC_PRI 6 /* interrupt priority for FEC1 */
|
||||
|
||||
#define FEC_INTC_LVL(x) ((x == 0) ? FEC0_INTC_LVL : FEC1_INTC_LVL)
|
||||
#define FEC_INTC_PRI(x) ((x == 0) ? FEC0_INTC_PRI : FEC1_INTC_PRI)
|
||||
#define FEC_INTC_LVL(x) ((x == 0) ? FEC0_INTC_LVL : FEC1_INTC_LVL)
|
||||
#define FEC_INTC_PRI(x) ((x == 0) ? FEC0_INTC_PRI : FEC1_INTC_PRI)
|
||||
|
||||
#define FEC0RX_DMA_PRI 5
|
||||
#define FEC1RX_DMA_PRI 5
|
||||
#define FEC1RX_DMA_PRI 4
|
||||
#define FECRX_DMA_PRI(x) ((x == 0) ? FEC0RX_DMA_PRI : FEC1RX_DMA_PRI)
|
||||
#define FEC0TX_DMA_PRI 6
|
||||
#define FEC1TX_DMA_PRI 6
|
||||
#define FEC0TX_DMA_PRI 2
|
||||
#define FEC1TX_DMA_PRI 1
|
||||
#define FECTX_DMA_PRI(x) ((x == 0) ? FEC0TX_DMA_PRI : FEC1TX_DMA_PRI)
|
||||
|
||||
extern int register_interrupt_handler(uint8_t source, uint8_t level, uint8_t priority, uint8_t intr, void (*handler)(void));
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
|
||||
#define ISR_DBUG_ISR 0x01
|
||||
#define ISR_USER_ISR 0x02
|
||||
/* Firebee FPGA interrupt controller */
|
||||
#define FBEE_INTR_CONTROL * ((volatile uint32_t *) 0xf0010000)
|
||||
#define FBEE_INTR_ENABLE * ((volatile uint32_t *) 0xf0010004)
|
||||
#define FBEE_INTR_CLEAR * ((volatile uint32_t *) 0xf0010008)
|
||||
#define FBEE_INTR_PENDING * ((volatile uint32_t *) 0xff01000c)
|
||||
|
||||
/* register bits for Firebee FPGA-based interrupt controller */
|
||||
#define FBEE_INTR_PIC (1 << 0) /* PIC interrupt enable/pending/clear bit */
|
||||
#define FBEE_INTR_ETHERNET (1 << 1) /* ethernet PHY interrupt enable/pending/clear bit */
|
||||
#define FBEE_INTR_DVI (1 << 2) /* TFP410 monitor sense interrupt enable/pending/clear bit */
|
||||
#define FBEE_INTR_PCI_INTA (1 << 3) /* /PCIINTA enable/pending clear bit */
|
||||
#define FBEE_INTR_PCI_INTB (1 << 4) /* /PCIINTB enable/pending clear bit */
|
||||
#define FBEE_INTR_PCI_INTC (1 << 5) /* /PCIINTC enable/pending clear bit */
|
||||
#define FBEE_INTR_PCI_INTD (1 << 6) /* /PCIINTD enable/pending clear bit */
|
||||
#define FBEE_INTR_DSP (1 << 7) /* DSP interrupt enable/pending/clear bit */
|
||||
#define FBEE_INTR_VSYNC (1 << 8) /* VSYNC interrupt enable/pending/clear bit */
|
||||
#define FBEE_INTR_HSYNC (1 << 9) /* HSYNC interrupt enable/pending/clear bit */
|
||||
|
||||
#define FBEE_INTR_INT_HSYNC_IRQ2 (1 << 26) /* these bits are only meaningful for the FBEE_INTR_ENABLE register */
|
||||
#define FBEE_INTR_INT_CTR0_IRQ3 (1 << 27)
|
||||
#define FBEE_INTR_INT_VSYNC_IRQ4 (1 << 28)
|
||||
#define FBEE_INTR_INT_FPGA_IRQ5 (1 << 29)
|
||||
#define FBEE_INTR_INT_MFP_IRQ6 (1 << 30)
|
||||
#define FBEE_INTR_INT_IRQ7 (1 << 31)
|
||||
|
||||
/*
|
||||
* Atari MFP interrupt registers.
|
||||
*/
|
||||
|
||||
#define FALCON_MFP_IERA *((volatile uint8_t *) 0xfffffa07)
|
||||
#define FALCON_MFP_IERB *((volatile uint8_t *) 0xfffffa09)
|
||||
#define FALCON_MFP_IPRA *((volatile uint8_t *) 0xfffffa0b)
|
||||
#define FALCON_MFP_IPRB *((volatile uint8_t *) 0xfffffa0d)
|
||||
#define FALCON_MFP_IMRA *((volatile uint8_t *) 0xfffffa13)
|
||||
#define FALCON_MFP_IMRB *((volatile uint8_t *) 0xfffffa15)
|
||||
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
extern void isr_init(void);
|
||||
extern int isr_register_handler(int type, int vector, int (*handler)(void *, void *), void *hdev, void *harg);
|
||||
extern void isr_remove_handler(int type ,int (*handler)(void *, void *));
|
||||
extern bool isr_set_prio_and_level(int int_source, int priority, int level);
|
||||
extern bool isr_enable_int_source(int int_source);
|
||||
extern bool isr_register_handler(int vector, int level, int priority, bool (*handler)(void *, void *), void *hdev, void *harg);
|
||||
extern void isr_remove_handler(bool (*handler)(void *, void *));
|
||||
extern bool isr_execute_handler(int vector);
|
||||
extern bool pic_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool xlbpci_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool pciarb_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool gpt0_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool irq5_handler(void *arg1, void *arg2);
|
||||
#endif /* _INTERRUPTS_H_ */
|
||||
|
||||
@@ -9,7 +9,6 @@
|
||||
#ifndef _IP_H
|
||||
#define _IP_H
|
||||
|
||||
/********************************************************************/
|
||||
|
||||
/* 32-bit IP Addresses */
|
||||
typedef uint8_t IP_ADDR[4];
|
||||
@@ -57,7 +56,6 @@ typedef struct
|
||||
#define IP_HDR_OFFSET ETH_HDR_LEN
|
||||
#define IP_HDR_SIZE 20 /* no options */
|
||||
|
||||
/********************************************************************/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
@@ -71,7 +69,6 @@ typedef struct
|
||||
unsigned int err;
|
||||
} IP_INFO;
|
||||
|
||||
/********************************************************************/
|
||||
|
||||
extern void ip_handler(NIF *nif, NBUF *nbf);
|
||||
uint16_t ip_chksum(uint16_t *data, int num);
|
||||
|
||||
49
include/m54455.h
Normal file
49
include/m54455.h
Normal file
@@ -0,0 +1,49 @@
|
||||
#ifndef _M54455_H_
|
||||
#define _M54455_H_
|
||||
|
||||
/*
|
||||
* m54455.h
|
||||
*
|
||||
* preprocessor definitions for the M54455 Freescale machine. This file should contain nothing but preprocessor
|
||||
* definition that evaluate to numbers. It is intended for use in C sources as well as in linker control
|
||||
* files, so care must be taken to not break the syntax of either one.
|
||||
*
|
||||
* This file is part of BaS_gcc.
|
||||
*
|
||||
* BaS_gcc is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* BaS_gcc is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with BaS_gcc. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
* Created on: 26.02.2013
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#define SYSCLK 133000
|
||||
|
||||
#define BOOTFLASH_BASE_ADDRESS 0xe0000000
|
||||
#define BOOTFLASH_SIZE 0x800000
|
||||
#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1)
|
||||
|
||||
#define SDRAM_START 0x00000000 /* start at address 0 */
|
||||
#define SDRAM_SIZE 0x8000000
|
||||
|
||||
#ifdef COMPILE_RAM
|
||||
#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000)
|
||||
#else
|
||||
#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
|
||||
#endif /* COMPILE_RAM */
|
||||
|
||||
#define DRIVER_MEM_BUFFER_SIZE 0x100000
|
||||
|
||||
#define EMUTOS_BASE_ADDRESS 0xe0100000
|
||||
|
||||
#endif /* _M54455_H_ */
|
||||
@@ -24,17 +24,99 @@
|
||||
#ifndef _MMU_H_
|
||||
#define _MMU_H_
|
||||
|
||||
#include <stddef.h>
|
||||
#include "bas_types.h"
|
||||
|
||||
/*
|
||||
* ACR register handling macros
|
||||
*/
|
||||
#define ACR_BA(x) ((x) & 0xffff0000)
|
||||
#define ACR_ADMSK(x) (((x) & 0xffff) << 16)
|
||||
#define ACR_E(x) (((x) & 1) << 15)
|
||||
|
||||
#define ACR_S(x) (((x) & 3) << 13)
|
||||
#define ACR_S_USERMODE 0
|
||||
#define ACR_S_SUPERVISOR_MODE 1
|
||||
#define ACR_S_ALL 2
|
||||
|
||||
#define ACR_ADDRESS_MASK_MODE(x) (((x) & 1) << 10)
|
||||
|
||||
#define ACR_CACHE_MODE(x) (((x) & 3) << 5)
|
||||
#define ACR_SUPERVISOR_PROTECT(x) (((x) & 1) << 3)
|
||||
#define ACR_WRITE_PROTECT(x) (((x) & 1) << 2)
|
||||
|
||||
|
||||
/*
|
||||
* MMU register handling macros
|
||||
*/
|
||||
|
||||
#define SCA_PAGE_ID 6 /* indicates video memory page */
|
||||
|
||||
/*
|
||||
* MMU page sizes
|
||||
*/
|
||||
|
||||
enum mmu_page_size
|
||||
{
|
||||
MMU_PAGE_SIZE_1M = 0,
|
||||
MMU_PAGE_SIZE_4K = 1,
|
||||
MMU_PAGE_SIZE_8K = 2,
|
||||
MMU_PAGE_SIZE_1K = 3
|
||||
};
|
||||
|
||||
#define MMU_PAGE_SIZE_DEFAULT MMU_PAGE_SIZE_1M /* note: if this changes, SIZE_DEFAULT below _must_ also change */
|
||||
|
||||
#define SIZE_1M 0x100000 /* 1 Megabyte */
|
||||
#define SIZE_4K 0x1000 /* 4 KB */
|
||||
#define SIZE_8K 0x2000 /* 8 KB */
|
||||
#define SIZE_1K 0x400 /* 1 KB */
|
||||
|
||||
#define SIZE_DEFAULT SIZE_1M
|
||||
/*
|
||||
* cache modes
|
||||
*/
|
||||
#define CACHE_WRITETHROUGH 0
|
||||
#define CACHE_COPYBACK 1
|
||||
#define CACHE_NOCACHE_PRECISE 2
|
||||
#define CACHE_NOCACHE_IMPRECISE 3
|
||||
|
||||
|
||||
/*
|
||||
* page flags
|
||||
*/
|
||||
#define SV_PROTECT 1
|
||||
#define SV_USER 0
|
||||
|
||||
#define ACCESS_READ (1 << 0)
|
||||
#define ACCESS_WRITE (1 << 1)
|
||||
#define ACCESS_EXECUTE (1 << 2)
|
||||
|
||||
|
||||
/*
|
||||
* global variables from linker script
|
||||
*/
|
||||
extern long video_tlb;
|
||||
extern long video_sbt;
|
||||
|
||||
extern void mmu_init(void);
|
||||
extern void mmutr_miss(uint32_t addresss);
|
||||
struct mmu_page_descriptor
|
||||
{
|
||||
uint8_t cache_mode : 2;
|
||||
uint8_t supervisor_protect : 1;
|
||||
uint8_t read : 1;
|
||||
uint8_t write : 1;
|
||||
uint8_t execute : 1;
|
||||
uint8_t global : 1;
|
||||
uint8_t locked : 1;
|
||||
};
|
||||
|
||||
extern void mmu_init(void);
|
||||
extern uint32_t mmu_map_page(uint32_t virt, uint32_t phys, enum mmu_page_size sz, uint8_t page_id, const struct mmu_page_descriptor *flags);
|
||||
|
||||
/*
|
||||
* API functions for the BaS driver interface
|
||||
*/
|
||||
extern uint32_t mmu_map_data_page_locked(uint32_t address, uint32_t length, int asid);
|
||||
extern uint32_t mmu_unlock_data_page(uint32_t address, uint32_t length, int asid);
|
||||
extern uint32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb);
|
||||
extern uint32_t mmu_report_pagesize(void);
|
||||
#endif /* _MMU_H_ */
|
||||
|
||||
@@ -3,10 +3,14 @@
|
||||
|
||||
#define PCI_ANY_ID (~0)
|
||||
|
||||
struct pci_device_id {
|
||||
unsigned long vendor, device; /* Vendor and device ID or PCI_ANY_ID*/
|
||||
unsigned long subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */
|
||||
unsigned long class, class_mask; /* (class,subclass,prog-if) triplet */
|
||||
struct pci_device_id
|
||||
{
|
||||
unsigned long vendor; /* Vendor and device ID or PCI_ANY_ID*/
|
||||
unsigned long device;
|
||||
unsigned long subvendor; /* Subsystem ID's or PCI_ANY_ID */
|
||||
unsigned long subdevice;
|
||||
unsigned long class; /* (class,subclass,prog-if) triplet */
|
||||
unsigned long class_mask;
|
||||
unsigned long driver_data; /* Data private to the driver */
|
||||
};
|
||||
|
||||
@@ -15,7 +19,8 @@ struct pci_device_id {
|
||||
#define IEEE1394_MATCH_SPECIFIER_ID 0x0004
|
||||
#define IEEE1394_MATCH_VERSION 0x0008
|
||||
|
||||
struct ieee1394_device_id {
|
||||
struct ieee1394_device_id
|
||||
{
|
||||
unsigned long match_flags;
|
||||
unsigned long vendor_id;
|
||||
unsigned long model_id;
|
||||
@@ -81,7 +86,8 @@ struct ieee1394_device_id {
|
||||
* matches towards the beginning of your table, so that driver_info can
|
||||
* record quirks of specific products.
|
||||
*/
|
||||
struct usb_device_id {
|
||||
struct usb_device_id
|
||||
{
|
||||
/* which fields to match against? */
|
||||
unsigned short match_flags;
|
||||
|
||||
@@ -106,10 +112,10 @@ struct usb_device_id {
|
||||
};
|
||||
|
||||
/* Some useful macros to use to create struct usb_device_id */
|
||||
#define USB_DEVICE_ID_MATCH_VENDOR 0x0001
|
||||
#define USB_DEVICE_ID_MATCH_PRODUCT 0x0002
|
||||
#define USB_DEVICE_ID_MATCH_DEV_LO 0x0004
|
||||
#define USB_DEVICE_ID_MATCH_DEV_HI 0x0008
|
||||
#define USB_DEVICE_ID_MATCH_VENDOR 0x0001
|
||||
#define USB_DEVICE_ID_MATCH_PRODUCT 0x0002
|
||||
#define USB_DEVICE_ID_MATCH_DEV_LO 0x0004
|
||||
#define USB_DEVICE_ID_MATCH_DEV_HI 0x0008
|
||||
#define USB_DEVICE_ID_MATCH_DEV_CLASS 0x0010
|
||||
#define USB_DEVICE_ID_MATCH_DEV_SUBCLASS 0x0020
|
||||
#define USB_DEVICE_ID_MATCH_DEV_PROTOCOL 0x0040
|
||||
@@ -118,18 +124,19 @@ struct usb_device_id {
|
||||
#define USB_DEVICE_ID_MATCH_INT_PROTOCOL 0x0200
|
||||
|
||||
/* s390 CCW devices */
|
||||
struct ccw_device_id {
|
||||
struct ccw_device_id
|
||||
{
|
||||
unsigned short match_flags; /* which fields to match against */
|
||||
|
||||
unsigned short cu_type; /* control unit type */
|
||||
unsigned short dev_type; /* device type */
|
||||
unsigned char cu_model; /* control unit model */
|
||||
unsigned char dev_model; /* device model */
|
||||
unsigned short cu_type; /* control unit type */
|
||||
unsigned short dev_type; /* device type */
|
||||
unsigned char cu_model; /* control unit model */
|
||||
unsigned char dev_model; /* device model */
|
||||
|
||||
unsigned long driver_info;
|
||||
};
|
||||
|
||||
#define CCW_DEVICE_ID_MATCH_CU_TYPE 0x01
|
||||
#define CCW_DEVICE_ID_MATCH_CU_TYPE 0x01
|
||||
#define CCW_DEVICE_ID_MATCH_CU_MODEL 0x02
|
||||
#define CCW_DEVICE_ID_MATCH_DEVICE_TYPE 0x04
|
||||
#define CCW_DEVICE_ID_MATCH_DEVICE_MODEL 0x08
|
||||
@@ -138,15 +145,18 @@ struct ccw_device_id {
|
||||
#define PNP_ID_LEN 8
|
||||
#define PNP_MAX_DEVICES 8
|
||||
|
||||
struct pnp_device_id {
|
||||
struct pnp_device_id
|
||||
{
|
||||
unsigned char id[PNP_ID_LEN];
|
||||
unsigned long driver_data;
|
||||
};
|
||||
|
||||
struct pnp_card_device_id {
|
||||
struct pnp_card_device_id
|
||||
{
|
||||
unsigned char id[PNP_ID_LEN];
|
||||
unsigned long driver_data;
|
||||
struct {
|
||||
struct
|
||||
{
|
||||
unsigned char id[PNP_ID_LEN];
|
||||
} devs[PNP_MAX_DEVICES];
|
||||
};
|
||||
@@ -154,7 +164,8 @@ struct pnp_card_device_id {
|
||||
|
||||
#define SERIO_ANY 0xff
|
||||
|
||||
struct serio_device_id {
|
||||
struct serio_device_id
|
||||
{
|
||||
unsigned char type;
|
||||
unsigned char extra;
|
||||
unsigned char id;
|
||||
|
||||
@@ -10,7 +10,6 @@
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
/********************************************************************/
|
||||
/*
|
||||
* Include the Queue structure definitions
|
||||
*/
|
||||
|
||||
@@ -8,9 +8,7 @@
|
||||
#ifndef _TIMER_H_
|
||||
#define _TIMER_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <stddef.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
355
include/ohci.h
355
include/ohci.h
@@ -6,63 +6,63 @@
|
||||
*
|
||||
* usb-ohci.h
|
||||
*/
|
||||
|
||||
|
||||
#define USB_OHCI_MAX_ROOT_PORTS 4
|
||||
|
||||
static int cc_to_error[16] = {
|
||||
static int cc_to_error[16] =
|
||||
{
|
||||
|
||||
/* mapping of the OHCI CC status to error codes */
|
||||
/* No Error */ 0,
|
||||
/* CRC Error */ USB_ST_CRC_ERR,
|
||||
/* Bit Stuff */ USB_ST_BIT_ERR,
|
||||
/* Data Togg */ USB_ST_CRC_ERR,
|
||||
/* Stall */ USB_ST_STALLED,
|
||||
/* DevNotResp */ -1,
|
||||
/* PIDCheck */ USB_ST_BIT_ERR,
|
||||
/* UnExpPID */ USB_ST_BIT_ERR,
|
||||
/* DataOver */ USB_ST_BUF_ERR,
|
||||
/* DataUnder */ USB_ST_BUF_ERR,
|
||||
/* reservd */ -1,
|
||||
/* reservd */ -1,
|
||||
/* BufferOver */ USB_ST_BUF_ERR,
|
||||
/* BuffUnder */ USB_ST_BUF_ERR,
|
||||
/* Not Access */ -1,
|
||||
/* Not Access */ -1
|
||||
/* No Error */ 0,
|
||||
/* CRC Error */ USB_ST_CRC_ERR,
|
||||
/* Bit Stuff */ USB_ST_BIT_ERR,
|
||||
/* Data Togg */ USB_ST_CRC_ERR,
|
||||
/* Stall */ USB_ST_STALLED,
|
||||
/* DevNotResp */ -1,
|
||||
/* PIDCheck */ USB_ST_BIT_ERR,
|
||||
/* UnExpPID */ USB_ST_BIT_ERR,
|
||||
/* DataOver */ USB_ST_BUF_ERR,
|
||||
/* DataUnder */ USB_ST_BUF_ERR,
|
||||
/* reservd */ -1,
|
||||
/* reservd */ -1,
|
||||
/* BufferOver */ USB_ST_BUF_ERR,
|
||||
/* BuffUnder */ USB_ST_BUF_ERR,
|
||||
/* Not Access */ -1,
|
||||
/* Not Access */ -1
|
||||
};
|
||||
|
||||
#ifdef DEBUG
|
||||
static const char *cc_to_string[16] = {
|
||||
"No Error",
|
||||
"CRC: Last data packet from endpoint contained a CRC error.",
|
||||
"BITSTUFFING:\r\nLast data packet from endpoint contained a bit stuffing violation",
|
||||
"DATATOGGLEMISMATCH:\r\n Last packet from endpoint had data toggle PID\r\n" \
|
||||
"that did not match the expected value.",
|
||||
"STALL: TD was moved to the Done Queue because the endpoint returned a STALL PID",
|
||||
"DEVICENOTRESPONDING:\r\nDevice did not respond to token (IN) or did\r\n" \
|
||||
"not provide a handshake (OUT)",
|
||||
"PIDCHECKFAILURE:\r\nCheck bits on PID from endpoint failed on data PID\r\n"\
|
||||
"(IN) or handshake (OUT)",
|
||||
"UNEXPECTEDPID:\r\nReceive PID was not valid when encountered or PID\r\n" \
|
||||
"value is not defined.",
|
||||
"DATAOVERRUN:\r\nThe amount of data returned by the endpoint exceeded\r\n" \
|
||||
"either the size of the maximum data packet allowed\r\n" \
|
||||
"from the endpoint (found in MaximumPacketSize field\r\n" \
|
||||
"of ED) or the remaining buffer size.",
|
||||
"DATAUNDERRUN:\r\nThe endpoint returned less than MaximumPacketSize\r\n" \
|
||||
"and that amount was not sufficient to fill the\r\n" \
|
||||
"specified buffer",
|
||||
"reserved1",
|
||||
"reserved2",
|
||||
"BUFFEROVERRUN:\r\nDuring an IN, HC received data from endpoint faster\r\n" \
|
||||
"than it could be written to system memory",
|
||||
"BUFFERUNDERRUN:\r\nDuring an OUT, HC could not retrieve data from\r\n" \
|
||||
"system memory fast enough to keep up with data USB data rate.",
|
||||
"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
|
||||
"on a list to be processed by the HC.(1)",
|
||||
"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
|
||||
"on a list to be processed by the HC.(2)",
|
||||
static const char *cc_to_string[16] =
|
||||
{
|
||||
"No Error",
|
||||
"CRC: Last data packet from endpoint contained a CRC error.",
|
||||
"BITSTUFFING:\r\nLast data packet from endpoint contained a bit stuffing violation",
|
||||
"DATATOGGLEMISMATCH:\r\n Last packet from endpoint had data toggle PID\r\n" \
|
||||
"that did not match the expected value.",
|
||||
"STALL: TD was moved to the Done Queue because the endpoint returned a STALL PID",
|
||||
"DEVICENOTRESPONDING:\r\nDevice did not respond to token (IN) or did\r\n" \
|
||||
"not provide a handshake (OUT)",
|
||||
"PIDCHECKFAILURE:\r\nCheck bits on PID from endpoint failed on data PID\r\n"\
|
||||
"(IN) or handshake (OUT)",
|
||||
"UNEXPECTEDPID:\r\nReceive PID was not valid when encountered or PID\r\n" \
|
||||
"value is not defined.",
|
||||
"DATAOVERRUN:\r\nThe amount of data returned by the endpoint exceeded\r\n" \
|
||||
"either the size of the maximum data packet allowed\r\n" \
|
||||
"from the endpoint (found in MaximumPacketSize field\r\n" \
|
||||
"of ED) or the remaining buffer size.",
|
||||
"DATAUNDERRUN:\r\nThe endpoint returned less than MaximumPacketSize\r\n" \
|
||||
"and that amount was not sufficient to fill the\r\n" \
|
||||
"specified buffer",
|
||||
"reserved1",
|
||||
"reserved2",
|
||||
"BUFFEROVERRUN:\r\nDuring an IN, HC received data from endpoint faster\r\n" \
|
||||
"than it could be written to system memory",
|
||||
"BUFFERUNDERRUN:\r\nDuring an OUT, HC could not retrieve data from\r\n" \
|
||||
"system memory fast enough to keep up with data USB data rate.",
|
||||
"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
|
||||
"on a list to be processed by the HC.(1)",
|
||||
"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
|
||||
"on a list to be processed by the HC.(2)",
|
||||
};
|
||||
#endif /* DEBUG */
|
||||
|
||||
/* ED States */
|
||||
|
||||
@@ -73,25 +73,26 @@ static const char *cc_to_string[16] = {
|
||||
#define ED_URB_DEL 0x08
|
||||
|
||||
/* usb_ohci_ed */
|
||||
struct ed {
|
||||
uint32_t hwINFO;
|
||||
uint32_t hwTailP;
|
||||
uint32_t hwHeadP;
|
||||
uint32_t hwNextED;
|
||||
struct ed
|
||||
{
|
||||
uint32_t hwINFO;
|
||||
uint32_t hwTailP;
|
||||
uint32_t hwHeadP;
|
||||
uint32_t hwNextED;
|
||||
|
||||
struct ed *ed_prev;
|
||||
uint8_t int_period;
|
||||
uint8_t int_branch;
|
||||
uint8_t int_load;
|
||||
uint8_t int_interval;
|
||||
uint8_t state;
|
||||
uint8_t type;
|
||||
uint16_t last_iso;
|
||||
struct ed *ed_rm_list;
|
||||
struct ed *ed_prev;
|
||||
uint8_t int_period;
|
||||
uint8_t int_branch;
|
||||
uint8_t int_load;
|
||||
uint8_t int_interval;
|
||||
uint8_t state;
|
||||
uint8_t type;
|
||||
uint16_t last_iso;
|
||||
struct ed *ed_rm_list;
|
||||
|
||||
struct usb_device *usb_dev;
|
||||
void *purb;
|
||||
uint32_t unused[2];
|
||||
struct usb_device *usb_dev;
|
||||
void *purb;
|
||||
uint32_t unused[2];
|
||||
} __attribute__((aligned(16)));
|
||||
typedef struct ed ed_t;
|
||||
|
||||
@@ -134,22 +135,23 @@ typedef struct ed ed_t;
|
||||
|
||||
#define MAXPSW 1
|
||||
|
||||
struct td {
|
||||
uint32_t hwINFO;
|
||||
uint32_t hwCBP; /* Current Buffer Pointer */
|
||||
uint32_t hwNextTD; /* Next TD Pointer */
|
||||
uint32_t hwBE; /* Memory Buffer End Pointer */
|
||||
struct td
|
||||
{
|
||||
uint32_t hwINFO;
|
||||
uint32_t hwCBP; /* Current Buffer Pointer */
|
||||
uint32_t hwNextTD; /* Next TD Pointer */
|
||||
uint32_t hwBE; /* Memory Buffer End Pointer */
|
||||
|
||||
uint16_t hwPSW[MAXPSW];
|
||||
uint8_t unused;
|
||||
uint8_t index;
|
||||
struct ed *ed;
|
||||
struct td *next_dl_td;
|
||||
struct usb_device *usb_dev;
|
||||
int transfer_len;
|
||||
uint32_t data;
|
||||
uint16_t hwPSW[MAXPSW];
|
||||
uint8_t unused;
|
||||
uint8_t index;
|
||||
struct ed *ed;
|
||||
struct td *next_dl_td;
|
||||
struct usb_device *usb_dev;
|
||||
int transfer_len;
|
||||
uint32_t data;
|
||||
|
||||
uint32_t unused2[2];
|
||||
uint32_t unused2[2];
|
||||
} __attribute__((aligned(32)));
|
||||
typedef struct td td_t;
|
||||
|
||||
@@ -162,17 +164,18 @@ typedef struct td td_t;
|
||||
*/
|
||||
|
||||
#define NUM_INTS 32 /* part of the OHCI standard */
|
||||
struct ohci_hcca {
|
||||
uint32_t int_table[NUM_INTS]; /* Interrupt ED table */
|
||||
struct ohci_hcca
|
||||
{
|
||||
uint32_t int_table[NUM_INTS]; /* Interrupt ED table */
|
||||
#if defined(CONFIG_MPC5200)
|
||||
uint16_t pad1; /* set to 0 on each frame_no change */
|
||||
uint16_t frame_no; /* current frame number */
|
||||
uint16_t pad1; /* set to 0 on each frame_no change */
|
||||
uint16_t frame_no; /* current frame number */
|
||||
#else
|
||||
uint16_t frame_no; /* current frame number */
|
||||
uint16_t pad1; /* set to 0 on each frame_no change */
|
||||
uint16_t frame_no; /* current frame number */
|
||||
uint16_t pad1; /* set to 0 on each frame_no change */
|
||||
#endif
|
||||
uint32_t done_head; /* info returned for an interrupt */
|
||||
uint8_t reserved_for_hc[116];
|
||||
uint32_t done_head; /* info returned for an interrupt */
|
||||
uint8_t reserved_for_hc[116];
|
||||
} __attribute__((aligned(256)));
|
||||
|
||||
/*
|
||||
@@ -180,35 +183,37 @@ struct ohci_hcca {
|
||||
* region. This is Memory Mapped I/O. You must use the readl() and
|
||||
* writel() macros defined in asm/io.h to access these!!
|
||||
*/
|
||||
struct ohci_regs {
|
||||
/* control and status registers */
|
||||
uint32_t revision;
|
||||
uint32_t control;
|
||||
uint32_t cmdstatus;
|
||||
uint32_t intrstatus;
|
||||
uint32_t intrenable;
|
||||
uint32_t intrdisable;
|
||||
/* memory pointers */
|
||||
uint32_t hcca;
|
||||
uint32_t ed_periodcurrent;
|
||||
uint32_t ed_controlhead;
|
||||
uint32_t ed_controlcurrent;
|
||||
uint32_t ed_bulkhead;
|
||||
uint32_t ed_bulkcurrent;
|
||||
uint32_t donehead;
|
||||
/* frame counters */
|
||||
uint32_t fminterval;
|
||||
uint32_t fmremaining;
|
||||
uint32_t fmnumber;
|
||||
uint32_t periodicstart;
|
||||
uint32_t lsthresh;
|
||||
/* Root hub ports */
|
||||
struct ohci_roothub_regs {
|
||||
uint32_t a;
|
||||
uint32_t b;
|
||||
uint32_t status;
|
||||
uint32_t portstatus[USB_OHCI_MAX_ROOT_PORTS];
|
||||
} roothub;
|
||||
struct ohci_regs
|
||||
{
|
||||
/* control and status registers */
|
||||
uint32_t revision;
|
||||
uint32_t control;
|
||||
uint32_t cmdstatus;
|
||||
uint32_t intrstatus;
|
||||
uint32_t intrenable;
|
||||
uint32_t intrdisable;
|
||||
/* memory pointers */
|
||||
uint32_t hcca;
|
||||
uint32_t ed_periodcurrent;
|
||||
uint32_t ed_controlhead;
|
||||
uint32_t ed_controlcurrent;
|
||||
uint32_t ed_bulkhead;
|
||||
uint32_t ed_bulkcurrent;
|
||||
uint32_t donehead;
|
||||
/* frame counters */
|
||||
uint32_t fminterval;
|
||||
uint32_t fmremaining;
|
||||
uint32_t fmnumber;
|
||||
uint32_t periodicstart;
|
||||
uint32_t lsthresh;
|
||||
/* Root hub ports */
|
||||
struct ohci_roothub_regs
|
||||
{
|
||||
uint32_t a;
|
||||
uint32_t b;
|
||||
uint32_t status;
|
||||
uint32_t portstatus[USB_OHCI_MAX_ROOT_PORTS];
|
||||
} roothub;
|
||||
} __attribute__((aligned(32)));
|
||||
|
||||
/* Some EHCI controls */
|
||||
@@ -263,12 +268,13 @@ struct ohci_regs {
|
||||
|
||||
|
||||
/* Virtual Root HUB */
|
||||
struct virt_root_hub {
|
||||
int devnum; /* Address of Root Hub endpoint */
|
||||
void *dev; /* was urb */
|
||||
void *int_addr;
|
||||
int send;
|
||||
int interval;
|
||||
struct virt_root_hub
|
||||
{
|
||||
int devnum; /* Address of Root Hub endpoint */
|
||||
void *dev; /* was urb */
|
||||
void *int_addr;
|
||||
int send;
|
||||
int interval;
|
||||
};
|
||||
|
||||
/* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */
|
||||
@@ -366,26 +372,27 @@ struct virt_root_hub {
|
||||
#define N_URB_TD 48
|
||||
typedef struct
|
||||
{
|
||||
ed_t *ed;
|
||||
uint16_t length; /* number of tds associated with this request */
|
||||
uint16_t td_cnt; /* number of tds already serviced */
|
||||
struct usb_device *dev;
|
||||
int state;
|
||||
uint32_t pipe;
|
||||
void *transfer_buffer;
|
||||
int transfer_buffer_length;
|
||||
int interval;
|
||||
int actual_length;
|
||||
int finished;
|
||||
td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */
|
||||
ed_t *ed;
|
||||
uint16_t length; /* number of tds associated with this request */
|
||||
uint16_t td_cnt; /* number of tds already serviced */
|
||||
struct usb_device *dev;
|
||||
int state;
|
||||
uint32_t pipe;
|
||||
void *transfer_buffer;
|
||||
int transfer_buffer_length;
|
||||
int interval;
|
||||
int actual_length;
|
||||
int finished;
|
||||
td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */
|
||||
} urb_priv_t;
|
||||
#define URB_DEL 1
|
||||
|
||||
#define NUM_EDS 8 /* num of preallocated endpoint descriptors */
|
||||
|
||||
struct ohci_device {
|
||||
ed_t ed[NUM_EDS];
|
||||
int ed_cnt;
|
||||
struct ohci_device
|
||||
{
|
||||
ed_t ed[NUM_EDS];
|
||||
int ed_cnt;
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -395,46 +402,47 @@ struct ohci_device {
|
||||
* a subset of what the full implementation needs. (Linus)
|
||||
*/
|
||||
|
||||
typedef struct ohci {
|
||||
/* ------- common part -------- */
|
||||
long handle; /* PCI BIOS */
|
||||
const struct pci_device_id *ent;
|
||||
int usbnum;
|
||||
typedef struct ohci
|
||||
{
|
||||
/* ------- common part -------- */
|
||||
long handle; /* PCI BIOS */
|
||||
const struct pci_device_id *ent;
|
||||
int usbnum;
|
||||
/* ---- end of common part ---- */
|
||||
int big_endian; /* PCI BIOS */
|
||||
int controller;
|
||||
struct ohci_hcca *hcca_unaligned;
|
||||
struct ohci_hcca *hcca; /* hcca */
|
||||
td_t *td_unaligned;
|
||||
struct ohci_device *ohci_dev_unaligned;
|
||||
/* this allocates EDs for all possible endpoints */
|
||||
struct ohci_device *ohci_dev;
|
||||
int big_endian; /* PCI BIOS */
|
||||
int controller;
|
||||
struct ohci_hcca *hcca_unaligned;
|
||||
struct ohci_hcca *hcca; /* hcca */
|
||||
td_t *td_unaligned;
|
||||
struct ohci_device *ohci_dev_unaligned;
|
||||
/* this allocates EDs for all possible endpoints */
|
||||
struct ohci_device *ohci_dev;
|
||||
|
||||
int irq_enabled;
|
||||
int stat_irq;
|
||||
int irq;
|
||||
int disabled; /* e.g. got a UE, we're hung */
|
||||
int sleeping;
|
||||
int irq_enabled;
|
||||
int stat_irq;
|
||||
int irq;
|
||||
int disabled; /* e.g. got a UE, we're hung */
|
||||
int sleeping;
|
||||
#define OHCI_FLAGS_NEC 0x80000000
|
||||
uint32_t flags; /* for HC bugs */
|
||||
uint32_t flags; /* for HC bugs */
|
||||
|
||||
uint32_t offset;
|
||||
uint32_t dma_offset;
|
||||
struct ohci_regs *regs; /* OHCI controller's memory */
|
||||
uint32_t offset;
|
||||
uint32_t dma_offset;
|
||||
struct ohci_regs *regs; /* OHCI controller's memory */
|
||||
|
||||
int ohci_int_load[32]; /* load of the 32 Interrupt Chains (for load balancing)*/
|
||||
ed_t *ed_rm_list[2]; /* lists of all endpoints to be removed */
|
||||
ed_t *ed_bulktail; /* last endpoint of bulk list */
|
||||
ed_t *ed_controltail; /* last endpoint of control list */
|
||||
int intrstatus;
|
||||
uint32_t hc_control; /* copy of the hc control reg */
|
||||
uint32_t ndp; /* copy NDP from roothub_a */
|
||||
struct virt_root_hub rh;
|
||||
int ohci_int_load[32]; /* load of the 32 Interrupt Chains (for load balancing)*/
|
||||
ed_t *ed_rm_list[2]; /* lists of all endpoints to be removed */
|
||||
ed_t *ed_bulktail; /* last endpoint of bulk list */
|
||||
ed_t *ed_controltail; /* last endpoint of control list */
|
||||
int intrstatus;
|
||||
uint32_t hc_control; /* copy of the hc control reg */
|
||||
uint32_t ndp; /* copy NDP from roothub_a */
|
||||
struct virt_root_hub rh;
|
||||
|
||||
const char *slot_name;
|
||||
const char *slot_name;
|
||||
|
||||
/* device which was disconnected */
|
||||
struct usb_device *devgone;
|
||||
/* device which was disconnected */
|
||||
struct usb_device *devgone;
|
||||
} ohci_t;
|
||||
|
||||
/* hcd */
|
||||
@@ -443,7 +451,6 @@ static int ep_link(ohci_t * ohci, ed_t * ed);
|
||||
static int ep_unlink(ohci_t * ohci, ed_t * ed);
|
||||
static ed_t * ep_add_ed(ohci_t * ohci, struct usb_device * usb_dev, uint32_t pipe, int interval, int load);
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/* we need more TDs than EDs */
|
||||
#define NUM_TD 64
|
||||
@@ -451,7 +458,7 @@ static ed_t * ep_add_ed(ohci_t * ohci, struct usb_device * usb_dev, uint32_t pip
|
||||
|
||||
static inline void ed_free(struct ed *ed)
|
||||
{
|
||||
ed->usb_dev = NULL;
|
||||
ed->usb_dev = NULL;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -26,7 +26,8 @@
|
||||
typedef unsigned long long uint64_t;
|
||||
typedef unsigned long lbaint_t;
|
||||
|
||||
typedef struct block_dev_desc {
|
||||
typedef struct block_dev_desc
|
||||
{
|
||||
int if_type; /* type of the interface */
|
||||
int dev; /* device number */
|
||||
unsigned char part_type; /* partition type */
|
||||
|
||||
222
include/pci.h
222
include/pci.h
@@ -21,13 +21,13 @@
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include "util.h" /* for swpX() */
|
||||
#include <bas_types.h>
|
||||
#include "util.h" /* for swpX() */
|
||||
|
||||
#define PCI_MEMORY_OFFSET (0x80000000)
|
||||
#define PCI_MEMORY_SIZE (0x40000000) /* 1 GByte PCI memory window */
|
||||
#define PCI_IO_OFFSET (0xD0000000)
|
||||
#define PCI_IO_SIZE (0x10000000) /* 128 MByte PCI I/O window */
|
||||
#define PCI_MEMORY_OFFSET 0x80000000
|
||||
#define PCI_MEMORY_SIZE 0x40000000 /* 1 GByte PCI memory window */
|
||||
#define PCI_IO_OFFSET 0xD0000000
|
||||
#define PCI_IO_SIZE 0x10000000 /* 128 MByte PCI I/O window */
|
||||
|
||||
/*
|
||||
* Note: the byte offsets are in little endian format, so you can't use them
|
||||
@@ -50,7 +50,7 @@
|
||||
#define PCIBAR2 0x18 /* PCI Base Address Register for Memory
|
||||
Accesses to Local Address Space 0 */
|
||||
#define PCIBAR3 0x1C /* PCI Base Address Register for Memory
|
||||
Accesses to Local Address Space 1 */
|
||||
Accesses to Local Address Space 1 */
|
||||
#define PCIBAR4 0x20 /* PCI Base Address Register, reserved */
|
||||
#define PCIBAR5 0x24 /* PCI Base Address Register, reserved */
|
||||
#define PCICIS 0x28 /* PCI Cardbus CIS Pointer, not support*/
|
||||
@@ -81,29 +81,32 @@
|
||||
/*
|
||||
* bit definitions for PCICSR lower half (Command Register)
|
||||
*/
|
||||
#define PCICSR_IO (1 << 0) /* if set: device responds to I/O space accesses */
|
||||
#define PCICSR_MEMORY (1 << 1) /* if set: device responds to memory space accesses */
|
||||
#define PCICSR_MASTER (1 << 2) /* if set: device is master */
|
||||
#define PCICSR_SPECIAL (1 << 3) /* if set: device reacts on special cycles */
|
||||
#define PCICSR_MEMWI (1 << 4) /* if set: device deals with memory write and invalidate */
|
||||
#define PCICSR_VGA_SNOOP (1 << 5) /* if set: capable of palette snoop */
|
||||
#define PCICSR_PERR (1 << 6) /* if set: reacts to parity errors */
|
||||
#define PCICSR_STEPPING (1 << 7) /* if set: stepping enabled */
|
||||
#define PCICSR_SERR (1 << 8) /* if set: SERR pin enabled */
|
||||
#define PCICSR_FAST_BTOB_E (1 << 9) /* if set: fast back-to-back enabled */
|
||||
#define PCICSR_IO (1 << 0) /* if set: device responds to I/O space accesses */
|
||||
#define PCICSR_MEMORY (1 << 1) /* if set: device responds to memory space accesses */
|
||||
#define PCICSR_MASTER (1 << 2) /* if set: device is master */
|
||||
#define PCICSR_SPECIAL (1 << 3) /* if set: device reacts on special cycles */
|
||||
#define PCICSR_MEMWI (1 << 4) /* if set: device deals with memory write and invalidate */
|
||||
#define PCICSR_VGA_SNOOP (1 << 5) /* if set: capable of palette snoop */
|
||||
#define PCICSR_PERR (1 << 6) /* if set: reacts to parity errors */
|
||||
#define PCICSR_STEPPING (1 << 7) /* if set: stepping enabled */
|
||||
#define PCICSR_SERR (1 << 8) /* if set: SERR pin enabled */
|
||||
#define PCICSR_FAST_BTOB_E (1 << 9) /* if set: fast back-to-back enabled */
|
||||
#define PCICSR_INT_DISABLE (1 << 10) /* if set: disable interrupts from this device */
|
||||
/*
|
||||
* bit definitions for PCICSR upper half (Status Register)
|
||||
*/
|
||||
#define PCICSR_66MHZ (1 << 5) /* 66 MHz capable */
|
||||
#define PCICSR_UDF (1 << 6) /* UDF supported */
|
||||
#define PCICSR_FAST_BTOB (1 << 7) /* Fast back-to-back enabled */
|
||||
#define PCICSR_DPARITY_ERROR (1 << 8) /* data parity error detected */
|
||||
#define PCICSR_INTERRUPT (1 << 3) /* device requested interrupt */
|
||||
#define PCICSR_CAPABILITIES (1 << 4) /* if set, capabilities pointer is valid */
|
||||
#define PCICSR_66MHZ (1 << 5) /* 66 MHz capable */
|
||||
#define PCICSR_UDF (1 << 6) /* UDF supported */
|
||||
#define PCICSR_FAST_BTOB (1 << 7) /* Fast back-to-back enabled */
|
||||
#define PCICSR_DPARITY_ERROR (1 << 8) /* data parity error detected */
|
||||
|
||||
#define PCICSR_T_ABORT_S (1 << 11) /* target abort signaled */
|
||||
#define PCICSR_T_ABORT_R (1 << 12) /* target abort received */
|
||||
#define PCICSR_M_ABORT_R (1 << 13) /* master abort received */
|
||||
#define PCICSR_S_ERROR_S (1 << 14) /* system error signaled */
|
||||
#define PCICSR_PARITY_ERR (1 << 15) /* data parity error */
|
||||
#define PCICSR_T_ABORT_S (1 << 11) /* target abort signaled */
|
||||
#define PCICSR_T_ABORT_R (1 << 12) /* target abort received */
|
||||
#define PCICSR_M_ABORT_R (1 << 13) /* master abort received */
|
||||
#define PCICSR_S_ERROR_S (1 << 14) /* system error signaled */
|
||||
#define PCICSR_PARITY_ERR (1 << 15) /* data parity error */
|
||||
|
||||
/* Header type 1 (PCI-to-PCI bridges) */
|
||||
#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */
|
||||
@@ -131,7 +134,7 @@ struct pci_rd /* structure of resource descriptor */
|
||||
unsigned long length; /* length of resource */
|
||||
unsigned long offset; /* offset PCI to phys. CPU Address */
|
||||
unsigned long dmaoffset; /* offset for DMA-transfers */
|
||||
} __attribute__ ((packed));
|
||||
};
|
||||
|
||||
typedef struct /* structure of address conversion */
|
||||
{
|
||||
@@ -183,57 +186,61 @@ typedef struct /* structure of address conversion */
|
||||
/* PCI configuration space macros */
|
||||
|
||||
/* register 0x00 macros */
|
||||
#define PCI_VENDOR_ID(i) swpw((uint16_t)(((i) & 0xffff0000) >> 16))
|
||||
#define PCI_DEVICE_ID(i) swpw((uint16_t) ((i) & 0xffff))
|
||||
#define PCI_VENDOR_ID(i) swpw((uint16_t)(((i) & 0xffff0000) >> 16))
|
||||
#define PCI_DEVICE_ID(i) swpw((uint16_t) ((i) & 0xffff))
|
||||
|
||||
/* register 0x04 macros */
|
||||
#define PCI_STATUS(i) ((i) & 0xffff)
|
||||
#define PCI_COMMAND(i) (((i) >> 16) & 0xffff)
|
||||
#define PCI_STATUS(i) ((i) & 0xffff)
|
||||
#define PCI_COMMAND(i) (((i) >> 16) & 0xffff)
|
||||
|
||||
/* register 0x08 macros */
|
||||
#define PCI_CLASS_CODE(i) ((swpl((i)) & 0xff000000) >> 24)
|
||||
#define PCI_SUBCLASS(i) ((swpl((i)) & 0x00ff0000) >> 16)
|
||||
#define PCI_PROG_IF(i) ((swpl((i)) & 0x0000ff00) >> 8)
|
||||
#define PCI_REVISION_ID(i) ((swpl((i)) & 0x000000ff))
|
||||
#define PCI_CLASS_CODE(i) ((swpl((i)) & 0xff000000) >> 24)
|
||||
#define PCI_SUBCLASS(i) ((swpl((i)) & 0x00ff0000) >> 16)
|
||||
#define PCI_PROG_IF(i) ((swpl((i)) & 0x0000ff00) >> 8)
|
||||
#define PCI_REVISION_ID(i) ((swpl((i)) & 0x000000ff))
|
||||
|
||||
/* register 0x0c macros */
|
||||
#define PCI_BIST(i) ((swpl((i)) & 0xff000000) >> 24)
|
||||
#define PCI_HEADER_TYPE(i) ((swpl((i)) & 0x00ff0000) >> 16)
|
||||
#define PCI_LAT_TIMER(i) ((swpl((i)) & 0x0000ff00) >> 8)
|
||||
#define PCI_CACHELINE_SIZE(i) ((swpl((i)) & 0x000000ff))
|
||||
#define PCI_BIST(i) ((swpl((i)) & 0xff000000) >> 24)
|
||||
#define PCI_HEADER_TYPE(i) ((swpl((i)) & 0x00ff0000) >> 16)
|
||||
#define PCI_LAT_TIMER(i) ((swpl((i)) & 0x0000ff00) >> 8)
|
||||
#define PCI_CACHELINE_SIZE(i) ((swpl((i)) & 0x000000ff))
|
||||
|
||||
/* register 0x2c macros */
|
||||
#define PCI_SUBSYS_ID(i) (((i) & 0xffff0000) >> 16)
|
||||
#define PCI_SUBSYS_VID(i) (((i) & 0xffff))
|
||||
#define PCI_SUBSYS_ID(i) (((i) & 0xffff0000) >> 16)
|
||||
#define PCI_SUBSYS_VID(i) (((i) & 0xffff))
|
||||
|
||||
/* register 0x34 macros */
|
||||
#define PCI_CAPABILITIES(i) ((i) & 0xff)
|
||||
#define PCI_CAPABILITIES(i) ((i) & 0xff)
|
||||
|
||||
/* register 0x3c macros */
|
||||
#define PCI_MAX_LATENCY(i) (((i) & 0xff000000) >> 24)
|
||||
#define PCI_MIN_GRANT(i) (((i) & 0xff0000) >> 16)
|
||||
#define PCI_INTERRUPT_PIN(i) (((i) & 0xff00) >> 8)
|
||||
#define PCI_INTERRUPT_LINE(i) (((i)) & 0xff)
|
||||
#define PCI_MAX_LATENCY(i) (((i) & 0xff000000) >> 24)
|
||||
#define PCI_MIN_GRANT(i) (((i) & 0xff0000) >> 16)
|
||||
#define PCI_INTERRUPT_PIN(i) (((i) & 0xff00) >> 8)
|
||||
#define PCI_INTERRUPT_LINE(i) (((i)) & 0xff)
|
||||
|
||||
#define IS_PCI_MEM_BAR(i) ((i) & 1) == 0
|
||||
#define IS_PCI_IO_BAR(i) ((i) & 1) == 1
|
||||
#define PCI_MEMBAR_TYPE(i) (((i) & 0x6) >> 1)
|
||||
#define PCI_IOBAR_ADR(i) (((i) & 0xfffffffc))
|
||||
#define PCI_MEMBAR_ADR(i) (((i) & 0xfffffff0))
|
||||
#define IS_PCI_MEM_BAR(i) ((i) & 1) == 0
|
||||
#define IS_PCI_IO_BAR(i) ((i) & 1) == 1
|
||||
#define PCI_MEMBAR_TYPE(i) (((i) & 0x6) >> 1)
|
||||
#define PCI_IOBAR_ADR(i) (((i) & 0xfffffffc))
|
||||
#define PCI_MEMBAR_ADR(i) (((i) & 0xfffffff0))
|
||||
|
||||
extern void init_eport(void);
|
||||
extern void init_xlbus_arbiter(void);
|
||||
extern void init_pci(void);
|
||||
extern int pci_handle2index(int32_t handle);
|
||||
|
||||
extern int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index);
|
||||
extern int32_t pci_find_classcode(uint32_t classcode, int index);
|
||||
|
||||
extern int32_t pci_get_interrupt_cause(void);
|
||||
extern int32_t pci_call_interrupt_chain(int32_t handle, int32_t data);
|
||||
|
||||
/*
|
||||
* match bits for pci_find_classcode()
|
||||
*/
|
||||
#define PCI_FIND_BASE_CLASS (1 << 26)
|
||||
#define PCI_FIND_SUB_CLASS (1 << 25)
|
||||
#define PCI_FIND_PROG_IF (1 << 24)
|
||||
#define PCI_FIND_BASE_CLASS (1 << 26)
|
||||
#define PCI_FIND_SUB_CLASS (1 << 25)
|
||||
#define PCI_FIND_PROG_IF (1 << 24)
|
||||
|
||||
extern uint32_t pci_read_config_longword(int32_t handle, int offset);
|
||||
extern uint16_t pci_read_config_word(int32_t handle, int offset);
|
||||
@@ -243,19 +250,104 @@ extern int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t va
|
||||
extern int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value);
|
||||
extern int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value);
|
||||
|
||||
extern struct pci_rd *pci_get_resource(int32_t handle);
|
||||
extern int32_t pci_hook_interrupt(int32_t handle, void *interrupt_handler, void *parameter);
|
||||
typedef int (*pci_interrupt_handler)(int param);
|
||||
|
||||
extern int32_t pci_hook_interrupt(int32_t handle, void *handler, void *parameter);
|
||||
extern int32_t pci_unhook_interrupt(int32_t handle);
|
||||
|
||||
#define PCI_MK_CONF_ADDR(bus, device, function) (MCF_PCI_PCICAR_E | \
|
||||
((bus) << 16) | \
|
||||
((device << 8) | \
|
||||
(function))
|
||||
extern struct pci_rd *pci_get_resource(int32_t handle);
|
||||
|
||||
#define PCI_HANDLE(bus, slot, function) (0 | ((bus & 0xff) << 10 | (slot & 0x1f) << 3 | (function & 7)))
|
||||
#define PCI_BUS_FROM_HANDLE(h) (((h) & 0xff00) >> 10)
|
||||
#define PCI_DEVICE_FROM_HANDLE(h) (((h) & 0xf8) >> 3)
|
||||
#define PCI_FUNCTION_FROM_HANDLE(h) (((h) & 0x7))
|
||||
/*
|
||||
* Not implemented PCI_BIOS functions
|
||||
*/
|
||||
extern uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg);
|
||||
extern uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg);
|
||||
extern uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg);
|
||||
extern int32_t pci_special_cycle(uint16_t bus, uint32_t data);
|
||||
extern int32_t pci_get_routing(int32_t handle);
|
||||
extern int32_t pci_set_interrupt(int32_t handle);
|
||||
extern int32_t pci_get_card_used(int32_t handle, uint32_t *address);
|
||||
extern int32_t pci_set_card_used(int32_t handle, uint32_t *callback);
|
||||
extern int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
|
||||
extern int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
|
||||
extern int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
|
||||
extern uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset);
|
||||
extern uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset);
|
||||
extern uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset);
|
||||
extern int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
|
||||
extern int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
|
||||
extern int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
|
||||
extern int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
|
||||
extern int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
|
||||
extern int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
|
||||
extern uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset);
|
||||
extern uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset);
|
||||
extern uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset);
|
||||
extern int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
|
||||
extern int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
|
||||
extern int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
|
||||
extern int32_t pci_get_machine_id(void);
|
||||
extern int32_t pci_get_pagesize(void);
|
||||
extern int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
|
||||
extern int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
|
||||
extern int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
extern int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
|
||||
/*
|
||||
* prototypes for PCI wrapper routines
|
||||
*/
|
||||
extern int32_t wrapper_find_pci_device(uint32_t id, uint16_t index);
|
||||
extern int32_t wrapper_find_pci_classcode(uint32_t class, uint16_t index);
|
||||
extern int32_t wrapper_read_config_byte(int32_t handle, uint16_t reg, uint8_t *address);
|
||||
extern int32_t wrapper_read_config_word(int32_t handle, uint16_t reg, uint16_t *address);
|
||||
extern int32_t wrapper_read_config_longword(int32_t handle, uint16_t reg, uint32_t *address);
|
||||
extern uint8_t wrapper_fast_read_config_byte(int32_t handle, uint16_t reg);
|
||||
extern uint16_t wrapper_fast_read_config_word(int32_t handle, uint16_t reg);
|
||||
extern uint32_t wrapper_fast_read_config_longword(int32_t handle, uint16_t reg);
|
||||
extern int32_t wrapper_write_config_byte(int32_t handle, uint16_t reg, uint16_t val);
|
||||
extern int32_t wrapper_write_config_word(int32_t handle, uint16_t reg, uint16_t val);
|
||||
extern int32_t wrapper_write_config_longword(int32_t handle, uint16_t reg, uint32_t val);
|
||||
extern int32_t wrapper_hook_interrupt(int32_t handle, uint32_t *routine, uint32_t *parameter);
|
||||
extern int32_t wrapper_unhook_interrupt(int32_t handle);
|
||||
extern int32_t wrapper_special_cycle(uint16_t bus, uint32_t data);
|
||||
extern int32_t wrapper_get_routing(int32_t handle);
|
||||
extern int32_t wrapper_set_interrupt(int32_t handle);
|
||||
extern int32_t wrapper_get_resource(int32_t handle);
|
||||
extern int32_t wrapper_get_card_used(int32_t handle, uint32_t *address);
|
||||
extern int32_t wrapper_set_card_used(int32_t handle, uint32_t *callback);
|
||||
extern int32_t wrapper_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
|
||||
extern int32_t wrapper_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
|
||||
extern int32_t wrapper_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
|
||||
extern uint8_t wrapper_fast_read_mem_byte(int32_t handle, uint32_t offset);
|
||||
extern uint16_t wrapper_fast_read_mem_word(int32_t handle, uint32_t offset);
|
||||
extern uint32_t wrapper_fast_read_mem_longword(int32_t handle, uint32_t offset);
|
||||
extern int32_t wrapper_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
|
||||
extern int32_t wrapper_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
|
||||
extern int32_t wrapper_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
|
||||
extern int32_t wrapper_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
|
||||
extern int32_t wrapper_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
|
||||
extern int32_t wrapper_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
|
||||
extern uint8_t wrapper_fast_read_io_byte(int32_t handle, uint32_t offset);
|
||||
extern uint16_t wrapper_fast_read_io_word(int32_t handle, uint32_t offset);
|
||||
extern uint32_t wrapper_fast_read_io_longword(int32_t handle, uint32_t offset);
|
||||
extern int32_t wrapper_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
|
||||
extern int32_t wrapper_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
|
||||
extern int32_t wrapper_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
|
||||
extern int32_t wrapper_get_machine_id(void);
|
||||
extern int32_t wrapper_get_pagesize(void);
|
||||
extern int32_t wrapper_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
|
||||
extern int32_t wrapper_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
|
||||
extern int32_t wrapper_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
extern int32_t wrapper_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
|
||||
#define PCI_MK_CONF_ADDR(bus, device, function) (MCF_PCI_PCICAR_E | \
|
||||
((bus) << 16) | \
|
||||
((device << 8) | \
|
||||
(function))
|
||||
|
||||
#define PCI_HANDLE(bus, slot, function) (0 | ((bus & 0xff) << 10 | (slot & 0x1f) << 3 | (function & 7)))
|
||||
#define PCI_BUS_FROM_HANDLE(h) (((h) & 0xff00) >> 10)
|
||||
#define PCI_DEVICE_FROM_HANDLE(h) (((h) & 0xf8) >> 3)
|
||||
#define PCI_FUNCTION_FROM_HANDLE(h) (((h) & 0x7))
|
||||
|
||||
extern void chip_errata_135(void); /* needed in ohci-hcd.c */
|
||||
#endif /* _PCI_H_ */
|
||||
|
||||
11
include/pci_errata.h
Executable file
11
include/pci_errata.h
Executable file
@@ -0,0 +1,11 @@
|
||||
#ifndef PCI_ERRATA_H
|
||||
#define PCI_ERRATA_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
extern void chip_errata_135(void);
|
||||
extern void chip_errata_055(int32_t handle);
|
||||
|
||||
#endif // PCI_ERRATA_H
|
||||
|
||||
@@ -45,7 +45,7 @@
|
||||
#define PCI_CLASS_BRIDGE_HOST 0x0600
|
||||
#define PCI_CLASS_BRIDGE_ISA 0x0601
|
||||
#define PCI_CLASS_BRIDGE_EISA 0x0602
|
||||
#define PCI_CLASS_BRIDGE_MC 0x0603
|
||||
#define PCI_CLASS_BRIDGE_MC 0x0603
|
||||
#define PCI_CLASS_BRIDGE_PCI 0x0604
|
||||
#define PCI_CLASS_BRIDGE_PCMCIA 0x0605
|
||||
#define PCI_CLASS_BRIDGE_NUBUS 0x0606
|
||||
@@ -598,8 +598,10 @@
|
||||
#define PCI_DEVICE_ID_NEC_VL 0x0016 /* PCI-VL Bridge */
|
||||
#define PCI_DEVICE_ID_NEC_STARALPHA2 0x002c /* STAR ALPHA2 */
|
||||
#define PCI_DEVICE_ID_NEC_CBUS_2 0x002d /* PCI-Cbus Bridge */
|
||||
#define PCI_DEVICE_ID_NEC_USB_A 0x0031
|
||||
#define PCI_DEVICE_ID_NEC_USB 0x0035 /* PCI-USB Host */
|
||||
#define PCI_DEVICE_ID_NEC_USB_2 0x00e0 /* PCI-USB 2 Host */
|
||||
#define PCI_DEVICE_ID_NEC_USB_3 0x00f0
|
||||
#define PCI_DEVICE_ID_NEC_CBUS_3 0x003b
|
||||
#define PCI_DEVICE_ID_NEC_NAPCCARD 0x003e
|
||||
#define PCI_DEVICE_ID_NEC_PCX2 0x0046 /* PowerVR */
|
||||
@@ -798,7 +800,7 @@
|
||||
|
||||
#define PCI_VENDOR_ID_ANIGMA 0x1051
|
||||
#define PCI_DEVICE_ID_ANIGMA_MC145575 0x0100
|
||||
|
||||
|
||||
#define PCI_VENDOR_ID_EFAR 0x1055
|
||||
#define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130
|
||||
#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460
|
||||
@@ -1507,7 +1509,7 @@
|
||||
|
||||
#define PCI_VENDOR_ID_ZIATECH 0x1138
|
||||
#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550
|
||||
|
||||
|
||||
#define PCI_VENDOR_ID_CYCLONE 0x113c
|
||||
#define PCI_DEVICE_ID_CYCLONE_SDK 0x0001
|
||||
|
||||
@@ -1707,8 +1709,8 @@
|
||||
#define PCI_DEVICE_ID_RP8OCTA 0x0005
|
||||
#define PCI_DEVICE_ID_RP8J 0x0006
|
||||
#define PCI_DEVICE_ID_RP4J 0x0007
|
||||
#define PCI_DEVICE_ID_RP8SNI 0x0008
|
||||
#define PCI_DEVICE_ID_RP16SNI 0x0009
|
||||
#define PCI_DEVICE_ID_RP8SNI 0x0008
|
||||
#define PCI_DEVICE_ID_RP16SNI 0x0009
|
||||
#define PCI_DEVICE_ID_RPP4 0x000A
|
||||
#define PCI_DEVICE_ID_RPP8 0x000B
|
||||
#define PCI_DEVICE_ID_RP8M 0x000C
|
||||
@@ -1719,9 +1721,9 @@
|
||||
#define PCI_DEVICE_ID_URP8INTF 0x0802
|
||||
#define PCI_DEVICE_ID_URP16INTF 0x0803
|
||||
#define PCI_DEVICE_ID_URP8OCTA 0x0805
|
||||
#define PCI_DEVICE_ID_UPCI_RM3_8PORT 0x080C
|
||||
#define PCI_DEVICE_ID_UPCI_RM3_8PORT 0x080C
|
||||
#define PCI_DEVICE_ID_UPCI_RM3_4PORT 0x080D
|
||||
#define PCI_DEVICE_ID_CRP16INTF 0x0903
|
||||
#define PCI_DEVICE_ID_CRP16INTF 0x0903
|
||||
|
||||
#define PCI_VENDOR_ID_CYCLADES 0x120e
|
||||
#define PCI_DEVICE_ID_CYCLOM_Y_Lo 0x0100
|
||||
@@ -2143,7 +2145,7 @@
|
||||
#define PCI_DEVICE_ID_RASTEL_2PORT 0x2000
|
||||
|
||||
#define PCI_VENDOR_ID_ZOLTRIX 0x15b0
|
||||
#define PCI_DEVICE_ID_ZOLTRIX_2BD0 0x2bd0
|
||||
#define PCI_DEVICE_ID_ZOLTRIX_2BD0 0x2bd0
|
||||
|
||||
#define PCI_VENDOR_ID_MELLANOX 0x15b3
|
||||
#define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44
|
||||
@@ -2288,8 +2290,8 @@
|
||||
#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221
|
||||
#define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222
|
||||
#define PCI_DEVICE_ID_INTEL_7116 0x1223
|
||||
#define PCI_DEVICE_ID_INTEL_7505_0 0x2550
|
||||
#define PCI_DEVICE_ID_INTEL_7505_1 0x2552
|
||||
#define PCI_DEVICE_ID_INTEL_7505_0 0x2550
|
||||
#define PCI_DEVICE_ID_INTEL_7505_1 0x2552
|
||||
#define PCI_DEVICE_ID_INTEL_7205_0 0x255d
|
||||
#define PCI_DEVICE_ID_INTEL_82596 0x1226
|
||||
#define PCI_DEVICE_ID_INTEL_82865 0x1227
|
||||
|
||||
@@ -8,8 +8,6 @@
|
||||
#ifndef _QUEUE_H_
|
||||
#define _QUEUE_H_
|
||||
|
||||
/********************************************************************/
|
||||
|
||||
/*
|
||||
* Individual queue node
|
||||
*/
|
||||
|
||||
@@ -10,7 +10,9 @@
|
||||
#include "i2c-algo-bit.h"
|
||||
#include "util.h" /* for swpX() */
|
||||
#include "wait.h"
|
||||
|
||||
//#include "radeon_theatre.h"
|
||||
|
||||
#include "radeon_reg.h"
|
||||
|
||||
/* Buffer are aligned on 4096 byte boundaries */
|
||||
|
||||
@@ -31,7 +31,7 @@
|
||||
#define _SD_CARD_H_
|
||||
|
||||
#include <MCF5475.h>
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
extern void sd_card_init(void);
|
||||
|
||||
|
||||
11
include/setjmp.h
Normal file
11
include/setjmp.h
Normal file
@@ -0,0 +1,11 @@
|
||||
#ifndef _SETJMP_H_
|
||||
#define _SETJMP_H_
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
typedef uint32_t jmp_buf[18];
|
||||
|
||||
extern int setjmp(jmp_buf env);
|
||||
extern void longjmp(jmp_buf env, int val);
|
||||
|
||||
#endif /* _SETJMP_H_ */
|
||||
@@ -28,13 +28,17 @@
|
||||
#ifndef __SYSINIT_H__
|
||||
#define __SYSINIT_H__
|
||||
|
||||
#include <stdbool.h>
|
||||
|
||||
/* function(s) from init_fpga.c */
|
||||
extern void init_fpga(void);
|
||||
extern bool init_fpga(void);
|
||||
extern void init_usb(void);
|
||||
|
||||
/* fault_vectors */
|
||||
extern void setup_vectors(void);
|
||||
|
||||
extern bool fpga_configured;
|
||||
|
||||
#endif /* __SYSINIT_H__ */
|
||||
|
||||
|
||||
|
||||
455
include/usb.h
455
include/usb.h
@@ -26,7 +26,6 @@
|
||||
#ifndef _USB_H_
|
||||
#define _USB_H_
|
||||
|
||||
//#include <stdlib.h>
|
||||
#include <bas_string.h>
|
||||
#include "driver_mem.h"
|
||||
#include "pci.h"
|
||||
@@ -37,18 +36,10 @@
|
||||
|
||||
extern long *tab_funcs_pci;
|
||||
|
||||
#define in8(addr) Fast_read_mem_byte(usb_handle,addr)
|
||||
#define in16r(addr) Fast_read_mem_word(usb_handle,addr)
|
||||
#define in32r(addr) Fast_read_mem_longword(usb_handle,addr)
|
||||
#define out8(addr,val) Write_mem_byte(usb_handle,addr,val)
|
||||
#define out16r(addr,val) Write_mem_word(usb_handle,addr,val)
|
||||
#define out32r(addr,val) Write_mem_longword(usb_handle,addr,val)
|
||||
|
||||
|
||||
#define __u8 uint8_t
|
||||
#define __u16 uint16_t
|
||||
#define __u32 uint32_t
|
||||
#define u8 uint8_t
|
||||
//#define u8 uint8_t
|
||||
#define u16 uint16_t
|
||||
#define u32 uint32_t
|
||||
#define uint8_t uint8_t
|
||||
@@ -64,232 +55,241 @@ extern int sprintD(char *s, const char *fmt, ...);
|
||||
#define USB_ALTSETTINGALLOC 4
|
||||
#define USB_MAXALTSETTING 128 /* Hard limit */
|
||||
|
||||
#define USB_MAX_BUS 3
|
||||
#define USB_MAX_DEVICE 16
|
||||
#define USB_MAXCONFIG 8
|
||||
#define USB_MAXINTERFACES 8
|
||||
#define USB_MAXENDPOINTS 16
|
||||
#define USB_MAXCHILDREN 8 /* This is arbitrary */
|
||||
#define USB_MAX_HUB 16
|
||||
#define USB_MAX_BUS 3
|
||||
#define USB_MAX_DEVICE 16
|
||||
#define USB_MAXCONFIG 8
|
||||
#define USB_MAXINTERFACES 8
|
||||
#define USB_MAXENDPOINTS 16
|
||||
#define USB_MAXCHILDREN 8 /* This is arbitrary */
|
||||
#define USB_MAX_HUB 16
|
||||
|
||||
#define USB_CNTL_TIMEOUT 100 /* 100ms timeout */
|
||||
#define USB_CNTL_TIMEOUT 100 /* 100 ms timeout */
|
||||
|
||||
#define USB_BUFSIZ 512
|
||||
|
||||
/* String descriptor */
|
||||
struct usb_string_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t wData[1];
|
||||
struct usb_string_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t wData[1];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* device request (setup) */
|
||||
struct devrequest {
|
||||
uint8_t requesttype;
|
||||
uint8_t request;
|
||||
uint16_t value;
|
||||
uint16_t index;
|
||||
uint16_t length;
|
||||
struct devrequest
|
||||
{
|
||||
uint8_t requesttype;
|
||||
uint8_t request;
|
||||
uint16_t value;
|
||||
uint16_t index;
|
||||
uint16_t length;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* All standard descriptors have these 2 fields in common */
|
||||
struct usb_descriptor_header {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
struct usb_descriptor_header
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* Device descriptor */
|
||||
struct usb_device_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
uint16_t idVendor;
|
||||
uint16_t idProduct;
|
||||
uint16_t bcdDevice;
|
||||
uint8_t iManufacturer;
|
||||
uint8_t iProduct;
|
||||
uint8_t iSerialNumber;
|
||||
uint8_t bNumConfigurations;
|
||||
struct usb_device_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
uint16_t idVendor;
|
||||
uint16_t idProduct;
|
||||
uint16_t bcdDevice;
|
||||
uint8_t iManufacturer;
|
||||
uint8_t iProduct;
|
||||
uint8_t iSerialNumber;
|
||||
uint8_t bNumConfigurations;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* Endpoint descriptor */
|
||||
struct usb_endpoint_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bEndpointAddress;
|
||||
uint8_t bmAttributes;
|
||||
uint16_t wMaxPacketSize;
|
||||
uint8_t bInterval;
|
||||
uint8_t bRefresh;
|
||||
uint8_t bSynchAddress;
|
||||
struct usb_endpoint_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bEndpointAddress;
|
||||
uint8_t bmAttributes;
|
||||
uint16_t wMaxPacketSize;
|
||||
uint8_t bInterval;
|
||||
uint8_t bRefresh;
|
||||
uint8_t bSynchAddress;
|
||||
} __attribute__ ((packed)) __attribute__ ((aligned(2)));
|
||||
|
||||
/* Interface descriptor */
|
||||
struct usb_interface_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bInterfaceNumber;
|
||||
uint8_t bAlternateSetting;
|
||||
uint8_t bNumEndpoints;
|
||||
uint8_t bInterfaceClass;
|
||||
uint8_t bInterfaceSubClass;
|
||||
uint8_t bInterfaceProtocol;
|
||||
uint8_t iInterface;
|
||||
struct usb_interface_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bInterfaceNumber;
|
||||
uint8_t bAlternateSetting;
|
||||
uint8_t bNumEndpoints;
|
||||
uint8_t bInterfaceClass;
|
||||
uint8_t bInterfaceSubClass;
|
||||
uint8_t bInterfaceProtocol;
|
||||
uint8_t iInterface;
|
||||
|
||||
uint8_t no_of_ep;
|
||||
uint8_t num_altsetting;
|
||||
uint8_t act_altsetting;
|
||||
uint8_t no_of_ep;
|
||||
uint8_t num_altsetting;
|
||||
uint8_t act_altsetting;
|
||||
|
||||
struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
|
||||
struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
|
||||
/* Configuration descriptor information.. */
|
||||
struct usb_config_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t wTotalLength;
|
||||
uint8_t bNumInterfaces;
|
||||
uint8_t bConfigurationValue;
|
||||
uint8_t iConfiguration;
|
||||
uint8_t bmAttributes;
|
||||
uint8_t MaxPower;
|
||||
struct usb_config_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t wTotalLength;
|
||||
uint8_t bNumInterfaces;
|
||||
uint8_t bConfigurationValue;
|
||||
uint8_t iConfiguration;
|
||||
uint8_t bmAttributes;
|
||||
uint8_t MaxPower;
|
||||
|
||||
uint8_t no_of_if; /* number of interfaces */
|
||||
struct usb_interface_descriptor if_desc[USB_MAXINTERFACES];
|
||||
uint8_t no_of_if; /* number of interfaces */
|
||||
struct usb_interface_descriptor if_desc[USB_MAXINTERFACES];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
enum {
|
||||
/* Maximum packet size; encoded as 0,1,2,3 = 8,16,32,64 */
|
||||
PACKET_SIZE_8 = 0,
|
||||
PACKET_SIZE_16 = 1,
|
||||
PACKET_SIZE_32 = 2,
|
||||
PACKET_SIZE_64 = 3,
|
||||
enum
|
||||
{
|
||||
/* Maximum packet size; encoded as 0,1,2,3 = 8,16,32,64 */
|
||||
PACKET_SIZE_8 = 0,
|
||||
PACKET_SIZE_16 = 1,
|
||||
PACKET_SIZE_32 = 2,
|
||||
PACKET_SIZE_64 = 3,
|
||||
};
|
||||
|
||||
struct usb_device {
|
||||
int devnum; /* Device number on USB bus */
|
||||
int speed; /* full/low/high */
|
||||
char mf[32]; /* manufacturer */
|
||||
char prod[32]; /* product */
|
||||
char serial[32]; /* serial number */
|
||||
struct usb_device
|
||||
{
|
||||
int devnum; /* Device number on USB bus */
|
||||
int speed; /* full/low/high */
|
||||
char mf[32]; /* manufacturer */
|
||||
char prod[32]; /* product */
|
||||
char serial[32]; /* serial number */
|
||||
|
||||
/* Maximum packet size; one of: PACKET_SIZE_* */
|
||||
int maxpacketsize;
|
||||
/* one bit for each endpoint ([0] = IN, [1] = OUT) */
|
||||
unsigned int toggle[2];
|
||||
/* endpoint halts; one bit per endpoint # & direction;
|
||||
* [0] = IN, [1] = OUT
|
||||
*/
|
||||
unsigned int halted[2];
|
||||
int epmaxpacketin[16]; /* INput endpoint specific maximums */
|
||||
int epmaxpacketout[16]; /* OUTput endpoint specific maximums */
|
||||
/* Maximum packet size; one of: PACKET_SIZE_* */
|
||||
int maxpacketsize;
|
||||
|
||||
int configno; /* selected config number */
|
||||
struct usb_device_descriptor descriptor; /* Device Descriptor */
|
||||
struct usb_config_descriptor config; /* config descriptor */
|
||||
/* one bit for each endpoint ([0] = IN, [1] = OUT) */
|
||||
unsigned int toggle[2];
|
||||
|
||||
int have_langid; /* whether string_langid is valid yet */
|
||||
int string_langid; /* language ID for strings */
|
||||
int (*irq_handle)(struct usb_device *dev);
|
||||
uint32_t irq_status;
|
||||
int irq_act_len; /* transfered bytes */
|
||||
void *privptr;
|
||||
/*
|
||||
* Child devices - if this is a hub device
|
||||
* Each instance needs its own set of data structures.
|
||||
*/
|
||||
uint32_t status;
|
||||
int act_len; /* transfered bytes */
|
||||
int maxchild; /* Number of ports if hub */
|
||||
int portnr;
|
||||
struct usb_device *parent;
|
||||
struct usb_device *children[USB_MAXCHILDREN];
|
||||
void *priv_hcd;
|
||||
int (*deregister)(struct usb_device *dev);
|
||||
/* endpoint halts; one bit per endpoint # & direction;
|
||||
* [0] = IN, [1] = OUT
|
||||
*/
|
||||
unsigned int halted[2];
|
||||
int epmaxpacketin[16]; /* INput endpoint specific maximums */
|
||||
int epmaxpacketout[16]; /* OUTput endpoint specific maximums */
|
||||
|
||||
struct usb_hub_device *hub;
|
||||
int usbnum;
|
||||
int configno; /* selected config number */
|
||||
struct usb_device_descriptor descriptor; /* Device Descriptor */
|
||||
struct usb_config_descriptor config; /* config descriptor */
|
||||
|
||||
int have_langid; /* whether string_langid is valid yet */
|
||||
int string_langid; /* language ID for strings */
|
||||
int (*irq_handle)(struct usb_device *dev);
|
||||
uint32_t irq_status;
|
||||
int irq_act_len; /* transfered bytes */
|
||||
void *privptr;
|
||||
|
||||
/*
|
||||
* Child devices - if this is a hub device
|
||||
* Each instance needs its own set of data structures.
|
||||
*/
|
||||
uint32_t status;
|
||||
int act_len; /* transfered bytes */
|
||||
int maxchild; /* Number of ports if hub */
|
||||
int portnr;
|
||||
struct usb_device *parent;
|
||||
struct usb_device *children[USB_MAXCHILDREN];
|
||||
void *priv_hcd;
|
||||
int (*deregister)(struct usb_device *dev);
|
||||
|
||||
struct usb_hub_device *hub;
|
||||
int usbnum;
|
||||
};
|
||||
|
||||
typedef struct
|
||||
{
|
||||
long ident;
|
||||
union
|
||||
{
|
||||
long l;
|
||||
short i[2];
|
||||
char c[4];
|
||||
} v;
|
||||
long ident;
|
||||
union
|
||||
{
|
||||
long l;
|
||||
short i[2];
|
||||
char c[4];
|
||||
} v;
|
||||
} USB_COOKIE;
|
||||
|
||||
/**********************************************************************
|
||||
/*
|
||||
* this is how the lowlevel part communicate with the outer world
|
||||
*/
|
||||
|
||||
int ohci_usb_lowlevel_init(int32_t handle, const struct pci_device_id *ent, void **priv);
|
||||
int ohci_usb_lowlevel_stop(void *priv);
|
||||
int ohci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
|
||||
int ohci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
|
||||
int ohci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
void ohci_usb_enable_interrupt(int enable);
|
||||
extern int ohci_usb_lowlevel_init(int32_t handle, const struct pci_device_id *ent, void **priv);
|
||||
extern int ohci_usb_lowlevel_stop(void *priv);
|
||||
extern int ohci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
|
||||
extern int ohci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
|
||||
extern int ohci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
extern void ohci_usb_enable_interrupt(int enable);
|
||||
|
||||
int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv);
|
||||
int ehci_usb_lowlevel_stop(void *priv);
|
||||
int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
|
||||
int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
|
||||
int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
void ehci_usb_enable_interrupt(int enable);
|
||||
extern int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv);
|
||||
extern int ehci_usb_lowlevel_stop(void *priv);
|
||||
extern int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
|
||||
extern int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
|
||||
extern int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
extern void ehci_usb_enable_interrupt(int enable);
|
||||
|
||||
void usb_enable_interrupt(int enable);
|
||||
extern void usb_enable_interrupt(int enable);
|
||||
|
||||
extern int usb_new_device(struct usb_device *dev);
|
||||
extern struct usb_device *usb_alloc_new_device(int bus_index, void *priv);
|
||||
extern void usb_disconnect(struct usb_device **pdev);
|
||||
|
||||
#define USB_MAX_STOR_DEV 5
|
||||
block_dev_desc_t *usb_stor_get_dev(int index);
|
||||
int usb_stor_scan(void);
|
||||
int usb_stor_info(void);
|
||||
int usb_stor_register(struct usb_device *dev);
|
||||
int usb_stor_deregister(struct usb_device *dev);
|
||||
|
||||
int drv_usb_kbd_init(void);
|
||||
int usb_kbd_register(struct usb_device *dev);
|
||||
int usb_kbd_deregister(struct usb_device *dev);
|
||||
extern block_dev_desc_t *usb_stor_get_dev(int index);
|
||||
extern int usb_stor_scan(void);
|
||||
extern int usb_stor_info(void);
|
||||
extern int usb_stor_register(struct usb_device *dev);
|
||||
extern int usb_stor_deregister(struct usb_device *dev);
|
||||
|
||||
int drv_usb_mouse_init(void);
|
||||
int usb_mouse_register(struct usb_device *dev);
|
||||
int usb_mouse_deregister(struct usb_device *dev);
|
||||
extern int drv_usb_kbd_init(void);
|
||||
extern int usb_kbd_register(struct usb_device *dev);
|
||||
extern int usb_kbd_deregister(struct usb_device *dev);
|
||||
|
||||
extern char usb_error_str[256];
|
||||
|
||||
/* memory */
|
||||
void *usb_malloc(long amount);
|
||||
int usb_free(void *addr);
|
||||
int usb_mem_init(void);
|
||||
void usb_mem_stop(void);
|
||||
extern int drv_usb_mouse_init(void);
|
||||
extern int usb_mouse_register(struct usb_device *dev);
|
||||
extern int usb_mouse_deregister(struct usb_device *dev);
|
||||
|
||||
/* routines */
|
||||
USB_COOKIE *usb_get_cookie(long id);
|
||||
void usb_error_msg(const char *const fmt, ... );
|
||||
int usb_init(int32_t handle, const struct pci_device_id *ent); /* initialize the USB Controller */
|
||||
int usb_stop(void); /* stop the USB Controller */
|
||||
extern int usb_init(int32_t handle, const struct pci_device_id *ent); /* initialize the USB Controller */
|
||||
extern int usb_stop(void); /* stop the USB Controller */
|
||||
|
||||
int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol);
|
||||
int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id);
|
||||
struct usb_device *usb_get_dev_index(int index, int bus);
|
||||
int usb_control_msg(struct usb_device *dev, unsigned int pipe, uint8_t request, uint8_t requesttype, uint16_t value,
|
||||
uint16_t index, void *data, uint16_t size, int timeout);
|
||||
int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout);
|
||||
int usb_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
void usb_disable_asynch(int disable);
|
||||
int usb_maxpacket(struct usb_device *dev, uint32_t pipe);
|
||||
void wait_ms(uint32_t ms);
|
||||
int usb_get_configuration_no(struct usb_device *dev, uint8_t *buffer, int cfgno);
|
||||
int usb_get_report(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
|
||||
int usb_get_class_descriptor(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
|
||||
int usb_clear_halt(struct usb_device *dev, int pipe);
|
||||
int usb_string(struct usb_device *dev, int index, char *buf, size_t size);
|
||||
int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
||||
extern int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol);
|
||||
extern int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id);
|
||||
extern struct usb_device *usb_get_dev_index(int index, int bus);
|
||||
extern int usb_control_msg(struct usb_device *dev, unsigned int pipe, uint8_t request, uint8_t requesttype,
|
||||
uint16_t value, uint16_t index, void *data, uint16_t size, int timeout);
|
||||
extern int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout);
|
||||
extern int usb_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
extern void usb_disable_asynch(int disable);
|
||||
extern int usb_maxpacket(struct usb_device *dev, uint32_t pipe);
|
||||
|
||||
extern int usb_get_configuration_no(struct usb_device *dev, uint8_t *buffer, int cfgno);
|
||||
extern int usb_get_report(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
|
||||
extern int usb_get_class_descriptor(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
|
||||
extern int usb_clear_halt(struct usb_device *dev, int pipe);
|
||||
extern int usb_string(struct usb_device *dev, int index, char *buf, size_t size);
|
||||
extern int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
||||
|
||||
/*
|
||||
* Calling this entity a "pipe" is glorifying it. A USB pipe
|
||||
@@ -325,44 +325,45 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
||||
* specification, so that much of the uhci driver can just mask the bits
|
||||
* appropriately.
|
||||
*/
|
||||
|
||||
/* Create various pipes... */
|
||||
#define create_pipe(dev,endpoint) \
|
||||
(((dev)->devnum << 8) | (endpoint << 15) | \
|
||||
((dev)->speed << 26) | (dev)->maxpacketsize)
|
||||
#define create_pipe(dev, endpoint) \
|
||||
(((dev)->devnum << 8) | (endpoint << 15) | \
|
||||
((dev)->speed << 26) | (dev)->maxpacketsize)
|
||||
#define default_pipe(dev) ((dev)->speed << 26)
|
||||
|
||||
#define usb_sndctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \
|
||||
create_pipe(dev, endpoint))
|
||||
create_pipe(dev, endpoint))
|
||||
#define usb_rcvctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
#define usb_sndisocpipe(dev, endpoint) ((PIPE_ISOCHRONOUS << 30) | \
|
||||
create_pipe(dev, endpoint))
|
||||
create_pipe(dev, endpoint))
|
||||
#define usb_rcvisocpipe(dev, endpoint) ((PIPE_ISOCHRONOUS << 30) | \
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
#define usb_sndbulkpipe(dev, endpoint) ((PIPE_BULK << 30) | \
|
||||
create_pipe(dev, endpoint))
|
||||
create_pipe(dev, endpoint))
|
||||
#define usb_rcvbulkpipe(dev, endpoint) ((PIPE_BULK << 30) | \
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
#define usb_sndintpipe(dev, endpoint) ((PIPE_INTERRUPT << 30) | \
|
||||
create_pipe(dev, endpoint))
|
||||
create_pipe(dev, endpoint))
|
||||
#define usb_rcvintpipe(dev, endpoint) ((PIPE_INTERRUPT << 30) | \
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
#define usb_snddefctrl(dev) ((PIPE_CONTROL << 30) | \
|
||||
default_pipe(dev))
|
||||
default_pipe(dev))
|
||||
#define usb_rcvdefctrl(dev) ((PIPE_CONTROL << 30) | \
|
||||
default_pipe(dev) | \
|
||||
USB_DIR_IN)
|
||||
default_pipe(dev) | \
|
||||
USB_DIR_IN)
|
||||
|
||||
/* The D0/D1 toggle bits */
|
||||
#define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> ep) & 1)
|
||||
#define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << ep))
|
||||
#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = \
|
||||
((dev)->toggle[out] & \
|
||||
~(1 << ep)) | ((bit) << ep))
|
||||
((dev)->toggle[out] & \
|
||||
~(1 << ep)) | ((bit) << ep))
|
||||
|
||||
/* Endpoint halt control/status */
|
||||
#define usb_endpoint_out(ep_dir) (((ep_dir >> 7) & 1) ^ 1)
|
||||
@@ -371,7 +372,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
||||
#define usb_endpoint_halted(dev, ep, out) ((dev)->halted[out] & (1 << (ep)))
|
||||
|
||||
#define usb_packetid(pipe) (((pipe) & USB_DIR_IN) ? USB_PID_IN : \
|
||||
USB_PID_OUT)
|
||||
USB_PID_OUT)
|
||||
|
||||
#define usb_pipeout(pipe) ((((pipe) >> 7) & 1) ^ 1)
|
||||
#define usb_pipein(pipe) (((pipe) >> 7) & 1)
|
||||
@@ -391,35 +392,39 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
||||
/*************************************************************************
|
||||
* Hub Stuff
|
||||
*/
|
||||
struct usb_port_status {
|
||||
uint16_t wPortStatus;
|
||||
uint16_t wPortChange;
|
||||
struct usb_port_status
|
||||
{
|
||||
uint16_t wPortStatus;
|
||||
uint16_t wPortChange;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
struct usb_hub_status {
|
||||
uint16_t wHubStatus;
|
||||
uint16_t wHubChange;
|
||||
struct usb_hub_status
|
||||
{
|
||||
uint16_t wHubStatus;
|
||||
uint16_t wHubChange;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
|
||||
/* Hub descriptor */
|
||||
struct usb_hub_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bNbrPorts;
|
||||
uint16_t wHubCharacteristics;
|
||||
uint8_t bPwrOn2PwrGood;
|
||||
uint8_t bHubContrCurrent;
|
||||
uint8_t DeviceRemovable[(USB_MAXCHILDREN+1+7)/8];
|
||||
uint8_t PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
|
||||
/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
|
||||
bitmaps that hold max 255 entries. (bit0 is ignored) */
|
||||
struct usb_hub_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bNbrPorts;
|
||||
uint16_t wHubCharacteristics;
|
||||
uint8_t bPwrOn2PwrGood;
|
||||
uint8_t bHubContrCurrent;
|
||||
uint8_t DeviceRemovable[(USB_MAXCHILDREN+1+7)/8];
|
||||
uint8_t PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
|
||||
/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
|
||||
bitmaps that hold max 255 entries. (bit0 is ignored) */
|
||||
} __attribute__ ((packed));
|
||||
|
||||
|
||||
struct usb_hub_device {
|
||||
struct usb_device *pusb_dev;
|
||||
struct usb_hub_descriptor desc;
|
||||
struct usb_hub_device
|
||||
{
|
||||
struct usb_device *pusb_dev;
|
||||
struct usb_hub_descriptor desc;
|
||||
};
|
||||
|
||||
#endif /*_USB_H_ */
|
||||
|
||||
10
include/usb_hub.h
Normal file
10
include/usb_hub.h
Normal file
@@ -0,0 +1,10 @@
|
||||
#ifndef USB_HUB_H
|
||||
#define USB_HUB_H
|
||||
|
||||
extern int bus_index;
|
||||
|
||||
extern void usb_hub_reset(int bus_index);
|
||||
extern int usb_hub_probe(struct usb_device *dev, int ifnum);
|
||||
extern int hub_port_reset(struct usb_device *dev, int port, unsigned short *portstat);
|
||||
|
||||
#endif // USB_HUB_H
|
||||
@@ -25,7 +25,7 @@
|
||||
#ifndef UTIL_H_
|
||||
#define UTIL_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
#define NOP() __asm__ __volatile__("nop\n\t" : : : "memory")
|
||||
|
||||
@@ -59,22 +59,22 @@ static inline uint32_t swpl(uint32_t l)
|
||||
register uint32_t result asm("d0");
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
(
|
||||
"lea %[input],a0\n\t" \
|
||||
"mvz.b 3(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b 2(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b 1(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b (a0),%[output]\n\t" \
|
||||
"mvz.b 3(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b 2(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b 1(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b (a0),%[output]\n\t" \
|
||||
: [output] "=d" (result) /* output */
|
||||
: [input] "o" (l) /* input */
|
||||
: "cc", "a0", "memory" /* clobbered */
|
||||
);
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* WORD swpw2(ULONG val);
|
||||
@@ -85,17 +85,17 @@ static inline uint32_t swpl(uint32_t l)
|
||||
#define swpw2(a) \
|
||||
__extension__ \
|
||||
({unsigned long _tmp; \
|
||||
__asm__ __volatile__ \
|
||||
("move.b (%1),%0\n\t" \
|
||||
"move.b 1(%1),(%1)\n\t" \
|
||||
"move.b %0,1(%1)\n\t" \
|
||||
"move.b 2(%1),%0\n\t" \
|
||||
"move.b 3(%1),2(%1)\n\t" \
|
||||
"move.b %0,3(%1)" \
|
||||
: "=d"(_tmp) /* outputs */ \
|
||||
: "a"(&a) /* inputs */ \
|
||||
: "cc", "memory" /* clobbered */ \
|
||||
); \
|
||||
__asm__ __volatile__ \
|
||||
("move.b (%1),%0\n\t" \
|
||||
"move.b 1(%1),(%1)\n\t" \
|
||||
"move.b %0,1(%1)\n\t" \
|
||||
"move.b 2(%1),%0\n\t" \
|
||||
"move.b 3(%1),2(%1)\n\t" \
|
||||
"move.b %0,3(%1)" \
|
||||
: "=d"(_tmp) /* outputs */ \
|
||||
: "a"(&a) /* inputs */ \
|
||||
: "cc", "memory" /* clobbered */ \
|
||||
); \
|
||||
})
|
||||
|
||||
/*
|
||||
@@ -144,10 +144,10 @@ __extension__ \
|
||||
#define regsafe_call(addr) \
|
||||
__extension__ \
|
||||
({__asm__ volatile ("lea -60(sp),sp\n\t" \
|
||||
"movem.l d0-d7/a0-a6,(sp)"); \
|
||||
((void (*)(void))addr)(); \
|
||||
"movem.l d0-d7/a0-a6,(sp)"); \
|
||||
((void (*) (void)) addr)(); \
|
||||
__asm__ volatile ("movem.l (sp),d0-d7/a0-a6\n\t" \
|
||||
"lea 60(sp),sp"); \
|
||||
"lea 60(sp),sp"); \
|
||||
})
|
||||
|
||||
|
||||
|
||||
@@ -28,8 +28,8 @@
|
||||
* increment version number for release
|
||||
*/
|
||||
|
||||
#define MAJOR_VERSION 0
|
||||
#define MINOR_VERSION 83
|
||||
#define MAJOR_VERSION 0
|
||||
#define MINOR_VERSION 91
|
||||
|
||||
|
||||
#endif /* VERSION_H_ */
|
||||
|
||||
@@ -83,8 +83,8 @@ extern int16_t vsetmode(int16_t mode);
|
||||
extern int16_t vmontype(void);
|
||||
extern int16_t vsetsync(int16_t external);
|
||||
extern int32_t vgetsize(int16_t mode);
|
||||
extern int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb);
|
||||
extern int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb);
|
||||
extern int16_t vsetrgb(int16_t index,int16_t count, uint32_t *rgb);
|
||||
extern int16_t vgetrgb(int16_t index,int16_t count, uint32_t *rgb);
|
||||
|
||||
/* misc routines */
|
||||
extern int16_t get_videl_mode(void);
|
||||
|
||||
@@ -1,9 +1,7 @@
|
||||
#ifndef _VIDEO_H_
|
||||
#define _VIDEO_H_
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <bas_types.h>
|
||||
#include "bas_printf.h"
|
||||
|
||||
extern void video_init(void);
|
||||
|
||||
@@ -29,55 +29,30 @@
|
||||
|
||||
#include <bas_types.h>
|
||||
|
||||
#if MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#elif MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
#error "unknown machine"
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
#include "MCF5475.h"
|
||||
|
||||
typedef bool (*checker_func)(void);
|
||||
|
||||
extern __inline__ void wait(uint32_t) __attribute__((always_inline));
|
||||
extern __inline__ bool waitfor(uint32_t us, checker_func condition) __attribute__((always_inline));
|
||||
extern void wait(uint32_t);
|
||||
extern void wait_us(uint32_t); /* this is just an alias to the above */
|
||||
|
||||
extern __inline__ uint32_t get_timer(void)
|
||||
inline static void udelay(long us)
|
||||
{
|
||||
return MCF_SLT_SCNT(0);
|
||||
}
|
||||
/*
|
||||
* wait for the specified number of us on slice timer 0. Replaces the original routines that had
|
||||
* the number of useconds to wait for hardcoded in their name.
|
||||
*/
|
||||
extern __inline__ void wait(uint32_t us)
|
||||
{
|
||||
int32_t target = MCF_SLT_SCNT(0) - (us * (SYSCLK / 1000));
|
||||
|
||||
while (MCF_SLT_SCNT(0) - target > 0);
|
||||
wait((uint32_t) us);
|
||||
}
|
||||
|
||||
/*
|
||||
* same as above, but with milliseconds wait time
|
||||
*/
|
||||
extern __inline__ void wait_ms(uint32_t ms)
|
||||
{
|
||||
wait(ms * 1000);
|
||||
}
|
||||
/*
|
||||
* the same as above, with a checker function which gets called while
|
||||
* busy waiting and allows for an early return if it returns true
|
||||
*/
|
||||
extern __inline__ bool waitfor(uint32_t us, checker_func condition)
|
||||
{
|
||||
int32_t target = MCF_SLT_SCNT(0) - (us * (SYSCLK / 1000));
|
||||
bool res;
|
||||
extern bool waitfor(uint32_t us, checker_func condition);
|
||||
extern uint32_t get_timer(void);
|
||||
extern void wait_ms(uint32_t ms);
|
||||
|
||||
do
|
||||
{
|
||||
if ((res = (*condition)()))
|
||||
return res;
|
||||
} while (MCF_SLT_SCNT(0) - target > 0);
|
||||
return false;
|
||||
}
|
||||
#endif /* _WAIT_H_ */
|
||||
|
||||
@@ -1,241 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for debug definitions.
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/debug.h,v 1.4 2000/11/21 23:10:27 tsi Exp $ */
|
||||
|
||||
#include <stdint.h>
|
||||
#include "bas_printf.h"
|
||||
|
||||
/*
|
||||
* for the X86 emulator, debug cannot be enabled and disabled on a per-file mode
|
||||
* as with all the other modules. It must be centrally enabled here.
|
||||
*/
|
||||
|
||||
#define DBG_X86EMU
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_X86EMU */
|
||||
|
||||
#ifndef __X86EMU_DEBUG_H
|
||||
#define __X86EMU_DEBUG_H
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
/* checks to be enabled for "runtime" */
|
||||
|
||||
#define CHECK_IP_FETCH_F 0x1
|
||||
#define CHECK_SP_ACCESS_F 0x2
|
||||
#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
|
||||
#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
|
||||
# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
|
||||
# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
|
||||
# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F)
|
||||
#else
|
||||
# define CHECK_IP_FETCH()
|
||||
# define CHECK_SP_ACCESS()
|
||||
# define CHECK_MEM_ACCESS()
|
||||
# define CHECK_DATA_ACCESS()
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
|
||||
# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
|
||||
# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
|
||||
# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
|
||||
# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
|
||||
# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
|
||||
# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
|
||||
# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_IP_CS_F)
|
||||
|
||||
# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
|
||||
# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
|
||||
# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
|
||||
# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F)
|
||||
# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F)
|
||||
# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
|
||||
# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F)
|
||||
# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F)
|
||||
# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
|
||||
#else
|
||||
# define DEBUG_INSTRUMENT() 0
|
||||
# define DEBUG_DECODE() 0
|
||||
# define DEBUG_TRACE() 0
|
||||
# define DEBUG_STEP() 0
|
||||
# define DEBUG_DISASSEMBLE() 0
|
||||
# define DEBUG_BREAK() 0
|
||||
# define DEBUG_SVC() 0
|
||||
# define DEBUG_SAVE_IP_CS() 0
|
||||
# define DEBUG_FS() 0
|
||||
# define DEBUG_PROC() 0
|
||||
# define DEBUG_SYSINT() 0
|
||||
# define DEBUG_TRACECALL() 0
|
||||
# define DEBUG_TRACECALLREGS() 0
|
||||
# define DEBUG_SYS() 0
|
||||
# define DEBUG_MEM_TRACE() 0
|
||||
# define DEBUG_IO_TRACE() 0
|
||||
# define DEBUG_DECODE_NOPRINT() 0
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
|
||||
# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
|
||||
x86emu_decode_printf(x)
|
||||
# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \
|
||||
x86emu_decode_printf2(x,y)
|
||||
|
||||
/*
|
||||
* The following allow us to look at the bytes of an instruction. The
|
||||
* first INCR_INSTRN_LEN, is called everytime bytes are consumed in
|
||||
* the decoding process. The SAVE_IP_CS is called initially when the
|
||||
* major opcode of the instruction is accessed.
|
||||
*/
|
||||
#define INC_DECODED_INST_LEN(x) \
|
||||
if (DEBUG_DECODE()) \
|
||||
x86emu_inc_decoded_inst_len(x)
|
||||
|
||||
#define SAVE_IP_CS(x,y) \
|
||||
if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \
|
||||
| DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
|
||||
M.x86.saved_cs = x; \
|
||||
M.x86.saved_ip = y; \
|
||||
}
|
||||
#else
|
||||
# define INC_DECODED_INST_LEN(x)
|
||||
# define DECODE_PRINTF(x)
|
||||
# define DECODE_PRINTF2(x,y)
|
||||
# define SAVE_IP_CS(x,y)
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define TRACE_REGS() \
|
||||
if (DEBUG_DISASSEMBLE()) { \
|
||||
x86emu_just_disassemble(); \
|
||||
goto EndOfTheInstructionProcedure; \
|
||||
} \
|
||||
if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs()
|
||||
#else
|
||||
# define TRACE_REGS()
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
|
||||
#else
|
||||
# define SINGLE_STEP()
|
||||
#endif
|
||||
|
||||
#define TRACE_AND_STEP() \
|
||||
TRACE_REGS(); \
|
||||
SINGLE_STEP()
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define START_OF_INSTR()
|
||||
# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
|
||||
# define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
|
||||
#else
|
||||
# define START_OF_INSTR()
|
||||
# define END_OF_INSTR()
|
||||
# define END_OF_INSTR_NO_TRACE()
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define CALL_TRACE(u,v,w,x,s) \
|
||||
if (DEBUG_TRACECALLREGS()) \
|
||||
x86emu_dump_regs(); \
|
||||
if (DEBUG_TRACECALL()) { \
|
||||
xprintf("%x", u); \
|
||||
xprintf(":%x", v); \
|
||||
xprintf(": CALL "); \
|
||||
xprintf("%x", s); \
|
||||
xprintf(" %x", w); \
|
||||
xprintf(":%x", x); \
|
||||
xprintf("%s", "\r\n"); \
|
||||
}
|
||||
|
||||
# define RETURN_TRACE(n,u,v) \
|
||||
if (DEBUG_TRACECALLREGS()) \
|
||||
x86emu_dump_regs(); \
|
||||
if (DEBUG_TRACECALL()) \
|
||||
{ \
|
||||
xprintf("%x", (unsigned long)u); \
|
||||
xprintf(":%x", (unsigned long)v); \
|
||||
xprintf(": CALL "); \
|
||||
xprintf("%x", n); \
|
||||
xprintf("\r\n"); \
|
||||
}
|
||||
#else
|
||||
# define CALL_TRACE(u,v,w,x,s)
|
||||
# define RETURN_TRACE(n,u,v)
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define DB(x) x
|
||||
#else
|
||||
#define DB(x)
|
||||
#endif
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
extern void x86emu_inc_decoded_inst_len (int x);
|
||||
extern void x86emu_decode_printf (char *x);
|
||||
extern void x86emu_decode_printf2 (char *x, int y);
|
||||
extern void x86emu_just_disassemble (void);
|
||||
extern void x86emu_single_step (void);
|
||||
extern void x86emu_end_instr (void);
|
||||
extern void x86emu_dump_regs (void);
|
||||
extern void x86emu_dump_xregs (void);
|
||||
extern void x86emu_print_int_vect (uint16_t iv);
|
||||
extern void x86emu_instrument_instruction (void);
|
||||
extern void x86emu_check_ip_access (void);
|
||||
extern void x86emu_check_sp_access (void);
|
||||
extern void x86emu_check_mem_access (uint32_t p);
|
||||
extern void x86emu_check_data_access (unsigned int s, unsigned int o);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_DEBUG_H */
|
||||
@@ -1,89 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for instruction decoding logic.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_DECODE_H
|
||||
#define __X86EMU_DECODE_H
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
/* Instruction Decoding Stuff */
|
||||
|
||||
#define FETCH_DECODE_MODRM(mod,rh,rl) fetch_decode_modrm(&mod,&rh,&rl)
|
||||
#define DECODE_RM_BYTE_REGISTER(r) decode_rm_byte_register(r)
|
||||
#define DECODE_RM_WORD_REGISTER(r) decode_rm_word_register(r)
|
||||
#define DECODE_RM_LONG_REGISTER(r) decode_rm_long_register(r)
|
||||
#define DECODE_CLEAR_SEGOVR() M.x86.mode &= ~SYSMODE_CLRMASK
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
void x86emu_intr_raise(uint8_t type);
|
||||
void fetch_decode_modrm(int *mod, int *regh, int *regl);
|
||||
uint8_t fetch_byte_imm(void);
|
||||
uint16_t fetch_word_imm(void);
|
||||
uint32_t fetch_long_imm(void);
|
||||
uint8_t fetch_data_byte(unsigned int offset);
|
||||
uint8_t fetch_data_byte_abs(unsigned int segment, unsigned int offset);
|
||||
uint16_t fetch_data_word(unsigned int offset);
|
||||
uint16_t fetch_data_word_abs(unsigned int segment, unsigned int offset);
|
||||
uint32_t fetch_data_long(unsigned int offset);
|
||||
uint32_t fetch_data_long_abs(unsigned int segment, unsigned int offset);
|
||||
void store_data_byte(unsigned int offset, uint8_t val);
|
||||
void store_data_byte_abs(unsigned int segment, unsigned int offset, uint8_t val);
|
||||
void store_data_word(unsigned int offset, uint16_t val);
|
||||
void store_data_word_abs(unsigned int segment, unsigned int offset, uint16_t val);
|
||||
void store_data_long(unsigned int offset, uint32_t val);
|
||||
void store_data_long_abs(unsigned int segment, unsigned int offset, uint32_t val);
|
||||
uint8_t *decode_rm_byte_register(int reg);
|
||||
uint16_t *decode_rm_word_register(int reg);
|
||||
uint32_t *decode_rm_long_register(int reg);
|
||||
uint16_t *decode_rm_seg_register(int reg);
|
||||
unsigned decode_rm00_address(int rm);
|
||||
unsigned decode_rm01_address(int rm);
|
||||
unsigned decode_rm10_address(int rm);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_DECODE_H */
|
||||
298
include/x86emu.h
298
include/x86emu.h
@@ -1,192 +1,158 @@
|
||||
/* $NetBSD: x86emu.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */
|
||||
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for public specific functions.
|
||||
* Any application linking against us should only
|
||||
* include this header
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/include/x86emu.h,v 1.2 2000/11/21 23:10:25 tsi Exp $ */
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
* Copyright (C) 2007 Joerg Sonnenberger
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_X86EMU_H
|
||||
#define __X86EMU_X86EMU_H
|
||||
|
||||
#include "bas_types.h"
|
||||
#define X86API
|
||||
#define X86APIP *
|
||||
#include "x86regs.h"
|
||||
#include "setjmp.h"
|
||||
|
||||
typedef uint16_t X86EMU_pioAddr;
|
||||
/*
|
||||
* General EAX, EBX, ECX, EDX type registers. Note that for
|
||||
* portability, and speed, the issue of byte swapping is not addressed
|
||||
* in the registers. All registers are stored in the default format
|
||||
* available on the host machine. The only critical issue is that the
|
||||
* registers should line up EXACTLY in the same manner as they do in
|
||||
* the 386. That is:
|
||||
*
|
||||
* EAX & 0xff === AL
|
||||
* EAX & 0xffff == AX
|
||||
*
|
||||
* etc. The result is that alot of the calculations can then be
|
||||
* done using the native instruction set fully.
|
||||
*/
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
//#pragma pack(1)
|
||||
struct X86EMU_register32 {
|
||||
uint32_t e_reg;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
REMARKS:
|
||||
Data structure containing ponters to programmed I/O functions used by the
|
||||
emulator. This is used so that the user program can hook all programmed
|
||||
I/O for the emulator to handled as necessary by the user program. By
|
||||
default the emulator contains simple functions that do not do access the
|
||||
hardware in any way. To allow the emualtor access the hardware, you will
|
||||
need to override the programmed I/O functions using the X86EMU_setupPioFuncs
|
||||
function.
|
||||
struct X86EMU_register16 {
|
||||
uint16_t filler0;
|
||||
uint16_t x_reg;
|
||||
};
|
||||
|
||||
HEADER:
|
||||
x86emu.h
|
||||
struct X86EMU_register8 {
|
||||
uint8_t filler0, filler1;
|
||||
uint8_t h_reg, l_reg;
|
||||
};
|
||||
|
||||
MEMBERS:
|
||||
inb - Function to read a byte from an I/O port
|
||||
inw - Function to read a word from an I/O port
|
||||
inl - Function to read a dword from an I/O port
|
||||
outb - Function to write a byte to an I/O port
|
||||
outw - Function to write a word to an I/O port
|
||||
outl - Function to write a dword to an I/O port
|
||||
****************************************************************************/
|
||||
typedef struct
|
||||
|
||||
union X86EMU_register {
|
||||
struct X86EMU_register32 I32_reg;
|
||||
struct X86EMU_register16 I16_reg;
|
||||
struct X86EMU_register8 I8_reg;
|
||||
};
|
||||
|
||||
struct X86EMU_regs {
|
||||
uint16_t register_cs;
|
||||
uint16_t register_ds;
|
||||
uint16_t register_es;
|
||||
uint16_t register_fs;
|
||||
uint16_t register_gs;
|
||||
uint16_t register_ss;
|
||||
uint32_t register_flags;
|
||||
union X86EMU_register register_a;
|
||||
union X86EMU_register register_b;
|
||||
union X86EMU_register register_c;
|
||||
union X86EMU_register register_d;
|
||||
|
||||
union X86EMU_register register_sp;
|
||||
union X86EMU_register register_bp;
|
||||
union X86EMU_register register_si;
|
||||
union X86EMU_register register_di;
|
||||
union X86EMU_register register_ip;
|
||||
|
||||
/*
|
||||
* MODE contains information on:
|
||||
* REPE prefix 2 bits repe,repne
|
||||
* SEGMENT overrides 5 bits normal,DS,SS,CS,ES
|
||||
* Delayed flag set 3 bits (zero, signed, parity)
|
||||
* reserved 6 bits
|
||||
* interrupt # 8 bits instruction raised interrupt
|
||||
* BIOS video segregs 4 bits
|
||||
* Interrupt Pending 1 bits
|
||||
* Extern interrupt 1 bits
|
||||
* Halted 1 bits
|
||||
*/
|
||||
uint32_t mode;
|
||||
volatile int intr; /* mask of pending interrupts */
|
||||
uint8_t intno;
|
||||
uint8_t __pad[3];
|
||||
};
|
||||
|
||||
struct X86EMU
|
||||
{
|
||||
uint8_t (X86APIP inb)(X86EMU_pioAddr addr);
|
||||
uint16_t (X86APIP inw)(X86EMU_pioAddr addr);
|
||||
uint32_t (X86APIP inl)(X86EMU_pioAddr addr);
|
||||
void (X86APIP outb)(X86EMU_pioAddr addr, uint8_t val);
|
||||
void (X86APIP outw)(X86EMU_pioAddr addr, uint16_t val);
|
||||
void (X86APIP outl)(X86EMU_pioAddr addr, uint32_t val);
|
||||
} X86EMU_pioFuncs;
|
||||
char *mem_base;
|
||||
size_t mem_size;
|
||||
void *sys_private;
|
||||
struct X86EMU_regs x86;
|
||||
|
||||
/****************************************************************************
|
||||
REMARKS:
|
||||
Data structure containing ponters to memory access functions used by the
|
||||
emulator. This is used so that the user program can hook all memory
|
||||
access functions as necessary for the emulator. By default the emulator
|
||||
contains simple functions that only access the internal memory of the
|
||||
emulator. If you need specialised functions to handle access to different
|
||||
types of memory (ie: hardware framebuffer accesses and BIOS memory access
|
||||
etc), you will need to override this using the X86EMU_setupMemFuncs
|
||||
function.
|
||||
jmp_buf exec_state;
|
||||
|
||||
HEADER:
|
||||
x86emu.h
|
||||
uint64_t cur_cycles;
|
||||
|
||||
MEMBERS:
|
||||
rdb - Function to read a byte from an address
|
||||
rdw - Function to read a word from an address
|
||||
rdl - Function to read a dword from an address
|
||||
wrb - Function to write a byte to an address
|
||||
wrw - Function to write a word to an address
|
||||
wrl - Function to write a dword to an address
|
||||
****************************************************************************/
|
||||
typedef struct {
|
||||
uint8_t (X86APIP rdb)(uint32_t addr);
|
||||
uint16_t (X86APIP rdw)(uint32_t addr);
|
||||
uint32_t (X86APIP rdl)(uint32_t addr);
|
||||
void (X86APIP wrb)(uint32_t addr, uint8_t val);
|
||||
void (X86APIP wrw)(uint32_t addr, uint16_t val);
|
||||
void (X86APIP wrl)(uint32_t addr, uint32_t val);
|
||||
} X86EMU_memFuncs;
|
||||
unsigned int cur_mod:2;
|
||||
unsigned int cur_rl:3;
|
||||
unsigned int cur_rh:3;
|
||||
uint32_t cur_offset;
|
||||
|
||||
/****************************************************************************
|
||||
Here are the default memory read and write
|
||||
function in case they are needed as fallbacks.
|
||||
***************************************************************************/
|
||||
extern uint8_t X86API rdb(uint32_t addr);
|
||||
extern uint16_t X86API rdw(uint32_t addr);
|
||||
extern uint32_t X86API rdl(uint32_t addr);
|
||||
extern void X86API wrb(uint32_t addr, uint8_t val);
|
||||
extern void X86API wrw(uint32_t addr, uint16_t val);
|
||||
extern void X86API wrl(uint32_t addr, uint32_t val);
|
||||
uint8_t (*emu_rdb)(struct X86EMU *, uint32_t addr);
|
||||
uint16_t (*emu_rdw)(struct X86EMU *, uint32_t addr);
|
||||
uint32_t (*emu_rdl)(struct X86EMU *, uint32_t addr);
|
||||
void (*emu_wrb)(struct X86EMU *, uint32_t addr,uint8_t val);
|
||||
void (*emu_wrw)(struct X86EMU *, uint32_t addr, uint16_t val);
|
||||
void (*emu_wrl)(struct X86EMU *, uint32_t addr, uint32_t val);
|
||||
|
||||
//#pragma pack()
|
||||
uint8_t (*emu_inb)(struct X86EMU *, uint16_t addr);
|
||||
uint16_t (*emu_inw)(struct X86EMU *, uint16_t addr);
|
||||
uint32_t (*emu_inl)(struct X86EMU *, uint16_t addr);
|
||||
void (*emu_outb)(struct X86EMU *, uint16_t addr, uint8_t val);
|
||||
void (*emu_outw)(struct X86EMU *, uint16_t addr, uint16_t val);
|
||||
void (*emu_outl)(struct X86EMU *, uint16_t addr, uint32_t val);
|
||||
|
||||
/*--------------------- type definitions -----------------------------------*/
|
||||
void (*_X86EMU_intrTab[256])(struct X86EMU *, int);
|
||||
};
|
||||
|
||||
typedef void (X86APIP X86EMU_intrFuncs)(int num);
|
||||
extern X86EMU_intrFuncs _X86EMU_intrTab[256];
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
void X86EMU_init_default(struct X86EMU *);
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
/* decode.c */
|
||||
|
||||
void X86EMU_setupMemFuncs(X86EMU_memFuncs *funcs);
|
||||
void X86EMU_setupPioFuncs(X86EMU_pioFuncs *funcs);
|
||||
void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
|
||||
void X86EMU_prepareForInt(int num);
|
||||
void X86EMU_exec(struct X86EMU *);
|
||||
void X86EMU_exec_call(struct X86EMU *, uint16_t, uint16_t);
|
||||
void X86EMU_exec_intr(struct X86EMU *, uint8_t);
|
||||
void X86EMU_halt_sys(struct X86EMU *);
|
||||
|
||||
/* decode.c */
|
||||
|
||||
void X86EMU_exec(void);
|
||||
void X86EMU_halt_sys(void);
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define HALT_SYS() \
|
||||
dbg("%s: halt_sys: file %s line %d\r\n", __FUNCTION__, __FILE__, __LINE__);\
|
||||
X86EMU_halt_sys();
|
||||
#else
|
||||
#define HALT_SYS() X86EMU_halt_sys()
|
||||
#endif
|
||||
|
||||
/* Debug options */
|
||||
|
||||
#define DEBUG_DECODE_F 0x000001 /* print decoded instruction */
|
||||
#define DEBUG_TRACE_F 0x000002 /* dump regs before/after execution */
|
||||
#define DEBUG_STEP_F 0x000004
|
||||
#define DEBUG_DISASSEMBLE_F 0x000008
|
||||
#define DEBUG_BREAK_F 0x000010
|
||||
#define DEBUG_SVC_F 0x000020
|
||||
#define DEBUG_FS_F 0x000080
|
||||
#define DEBUG_PROC_F 0x000100
|
||||
#define DEBUG_SYSINT_F 0x000200 /* bios system interrupts. */
|
||||
#define DEBUG_TRACECALL_F 0x000400
|
||||
#define DEBUG_INSTRUMENT_F 0x000800
|
||||
#define DEBUG_MEM_TRACE_F 0x001000
|
||||
#define DEBUG_IO_TRACE_F 0x002000
|
||||
#define DEBUG_TRACECALL_REGS_F 0x004000
|
||||
#define DEBUG_DECODE_NOPRINT_F 0x008000
|
||||
#define DEBUG_SAVE_IP_CS_F 0x010000
|
||||
#define DEBUG_SYS_F (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
|
||||
|
||||
void X86EMU_trace_regs(void);
|
||||
void X86EMU_trace_xregs(void);
|
||||
void X86EMU_dump_memory(uint16_t seg, uint16_t off, uint32_t amt);
|
||||
int X86EMU_trace_on(void);
|
||||
int X86EMU_trace_off(void);
|
||||
int X86EMU_set_debug(int debug);
|
||||
void X86EMU_setMemBase(void *base, unsigned long size);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_X86EMU_H */
|
||||
|
||||
169
include/x86emu_regs.h
Normal file
169
include/x86emu_regs.h
Normal file
@@ -0,0 +1,169 @@
|
||||
/* $NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */
|
||||
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
* Copyright (C) 2007 Joerg Sonnenberger
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_REGS_H
|
||||
#define __X86EMU_REGS_H
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
/* 8 bit registers */
|
||||
#define R_AH register_a.I8_reg.h_reg
|
||||
#define R_AL register_a.I8_reg.l_reg
|
||||
#define R_BH register_b.I8_reg.h_reg
|
||||
#define R_BL register_b.I8_reg.l_reg
|
||||
#define R_CH register_c.I8_reg.h_reg
|
||||
#define R_CL register_c.I8_reg.l_reg
|
||||
#define R_DH register_d.I8_reg.h_reg
|
||||
#define R_DL register_d.I8_reg.l_reg
|
||||
|
||||
/* 16 bit registers */
|
||||
#define R_AX register_a.I16_reg.x_reg
|
||||
#define R_BX register_b.I16_reg.x_reg
|
||||
#define R_CX register_c.I16_reg.x_reg
|
||||
#define R_DX register_d.I16_reg.x_reg
|
||||
|
||||
/* 32 bit extended registers */
|
||||
#define R_EAX register_a.I32_reg.e_reg
|
||||
#define R_EBX register_b.I32_reg.e_reg
|
||||
#define R_ECX register_c.I32_reg.e_reg
|
||||
#define R_EDX register_d.I32_reg.e_reg
|
||||
|
||||
/* special registers */
|
||||
#define R_SP register_sp.I16_reg.x_reg
|
||||
#define R_BP register_bp.I16_reg.x_reg
|
||||
#define R_SI register_si.I16_reg.x_reg
|
||||
#define R_DI register_di.I16_reg.x_reg
|
||||
#define R_IP register_ip.I16_reg.x_reg
|
||||
#define R_FLG register_flags
|
||||
|
||||
/* special registers */
|
||||
#define R_ESP register_sp.I32_reg.e_reg
|
||||
#define R_EBP register_bp.I32_reg.e_reg
|
||||
#define R_ESI register_si.I32_reg.e_reg
|
||||
#define R_EDI register_di.I32_reg.e_reg
|
||||
#define R_EIP register_ip.I32_reg.e_reg
|
||||
#define R_EFLG register_flags
|
||||
|
||||
/* segment registers */
|
||||
#define R_CS register_cs
|
||||
#define R_DS register_ds
|
||||
#define R_SS register_ss
|
||||
#define R_ES register_es
|
||||
#define R_FS register_fs
|
||||
#define R_GS register_gs
|
||||
|
||||
/* flag conditions */
|
||||
#define FB_CF 0x0001 /* CARRY flag */
|
||||
#define FB_PF 0x0004 /* PARITY flag */
|
||||
#define FB_AF 0x0010 /* AUX flag */
|
||||
#define FB_ZF 0x0040 /* ZERO flag */
|
||||
#define FB_SF 0x0080 /* SIGN flag */
|
||||
#define FB_TF 0x0100 /* TRAP flag */
|
||||
#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define FB_DF 0x0400 /* DIR flag */
|
||||
#define FB_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
/* 80286 and above always have bit#1 set */
|
||||
#define F_ALWAYS_ON (0x0002) /* flag bits always on */
|
||||
|
||||
/*
|
||||
* Define a mask for only those flag bits we will ever pass back
|
||||
* (via PUSHF)
|
||||
*/
|
||||
#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
|
||||
|
||||
/* following bits masked in to a 16bit quantity */
|
||||
|
||||
#define F_CF 0x0001 /* CARRY flag */
|
||||
#define F_PF 0x0004 /* PARITY flag */
|
||||
#define F_AF 0x0010 /* AUX flag */
|
||||
#define F_ZF 0x0040 /* ZERO flag */
|
||||
#define F_SF 0x0080 /* SIGN flag */
|
||||
#define F_TF 0x0100 /* TRAP flag */
|
||||
#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define F_DF 0x0400 /* DIR flag */
|
||||
#define F_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
#define SET_FLAG(flag) (emu->x86.R_FLG |= (flag))
|
||||
#define CLEAR_FLAG(flag) (emu->x86.R_FLG &= ~(flag))
|
||||
#define ACCESS_FLAG(flag) (emu->x86.R_FLG & (flag))
|
||||
#define CLEARALL_FLAG(m) (emu->x86.R_FLG = 0)
|
||||
|
||||
#define CONDITIONAL_SET_FLAG(COND,FLAG) \
|
||||
if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
|
||||
|
||||
#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
|
||||
#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
|
||||
#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
|
||||
|
||||
#define F_ALL_CALC 0xff0000 /* All have been calced */
|
||||
|
||||
/*
|
||||
* Emulator machine state.
|
||||
* Segment usage control.
|
||||
*/
|
||||
#define SYSMODE_SEG_DS_SS 0x00000001
|
||||
#define SYSMODE_SEGOVR_CS 0x00000002
|
||||
#define SYSMODE_SEGOVR_DS 0x00000004
|
||||
#define SYSMODE_SEGOVR_ES 0x00000008
|
||||
#define SYSMODE_SEGOVR_FS 0x00000010
|
||||
#define SYSMODE_SEGOVR_GS 0x00000020
|
||||
#define SYSMODE_SEGOVR_SS 0x00000040
|
||||
#define SYSMODE_PREFIX_REPE 0x00000080
|
||||
#define SYSMODE_PREFIX_REPNE 0x00000100
|
||||
#define SYSMODE_PREFIX_DATA 0x00000200
|
||||
#define SYSMODE_PREFIX_ADDR 0x00000400
|
||||
#define SYSMODE_INTR_PENDING 0x10000000
|
||||
#define SYSMODE_EXTRN_INTR 0x20000000
|
||||
#define SYSMODE_HALTED 0x40000000
|
||||
|
||||
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS)
|
||||
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS | \
|
||||
SYSMODE_PREFIX_DATA | \
|
||||
SYSMODE_PREFIX_ADDR)
|
||||
|
||||
#define INTR_SYNCH 0x1
|
||||
|
||||
#endif /* __X86EMU_REGS_H */
|
||||
@@ -1,99 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for system specific functions. These functions
|
||||
* are always compiled and linked in the OS depedent libraries,
|
||||
* and never in a binary portable driver.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/x86emui.h,v 1.4 2001/04/01 13:59:58 tsi Exp $ */
|
||||
|
||||
#ifndef __X86EMU_X86EMUI_H
|
||||
#define __X86EMU_X86EMUI_H
|
||||
|
||||
/*
|
||||
* If we are compiling in C++ mode, we can compile some functions as
|
||||
* inline to increase performance (however the code size increases quite
|
||||
* dramatically in this case).
|
||||
*/
|
||||
|
||||
#if defined(__cplusplus) && !defined(_NO_INLINE)
|
||||
#define _INLINE inline
|
||||
#else
|
||||
#define _INLINE static
|
||||
#endif
|
||||
|
||||
/* Get rid of unused parameters in C++ compilation mode */
|
||||
|
||||
#ifdef __cplusplus
|
||||
#define X86EMU_UNUSED(v)
|
||||
#else
|
||||
#define X86EMU_UNUSED(v) v
|
||||
#endif
|
||||
|
||||
#include "radeonfb.h"
|
||||
|
||||
#include "x86emu.h"
|
||||
#include "x86regs.h"
|
||||
#include "x86decode.h"
|
||||
#include "x86ops.h"
|
||||
#include "x86prim_ops.h"
|
||||
#include "x86fpu.h"
|
||||
|
||||
/*--------------------------- Inline Functions ----------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
extern uint8_t (X86APIP sys_rdb)(uint32_t addr);
|
||||
extern uint16_t (X86APIP sys_rdw)(uint32_t addr);
|
||||
extern uint32_t (X86APIP sys_rdl)(uint32_t addr);
|
||||
extern void (X86APIP sys_wrb)(uint32_t addr,uint8_t val);
|
||||
extern void (X86APIP sys_wrw)(uint32_t addr,uint16_t val);
|
||||
extern void (X86APIP sys_wrl)(uint32_t addr,uint32_t val);
|
||||
|
||||
extern uint8_t (X86APIP sys_inb)(X86EMU_pioAddr addr);
|
||||
extern uint16_t (X86APIP sys_inw)(X86EMU_pioAddr addr);
|
||||
extern uint32_t (X86APIP sys_inl)(X86EMU_pioAddr addr);
|
||||
extern void (X86APIP sys_outb)(X86EMU_pioAddr addr,uint8_t val);
|
||||
extern void (X86APIP sys_outw)(X86EMU_pioAddr addr,uint16_t val);
|
||||
extern void (X86APIP sys_outl)(X86EMU_pioAddr addr,uint32_t val);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_X86EMUI_H */
|
||||
@@ -1,61 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for FPU instruction decoding.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_FPU_H
|
||||
#define __X86EMU_FPU_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
/* these have to be defined, whether 8087 support compiled in or not. */
|
||||
|
||||
extern void x86emuOp_esc_coprocess_d8 (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_d9 (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_da (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_db (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_dc (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_dd (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_de (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_df (uint8_t op1);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_FPU_H */
|
||||
@@ -1,116 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for FPU register definitions.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_FPU_REGS_H
|
||||
#define __X86EMU_FPU_REGS_H
|
||||
|
||||
#ifdef X86_FPU_SUPPORT
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* Basic 8087 register can hold any of the following values: */
|
||||
|
||||
union x86_fpu_reg_u {
|
||||
s8 tenbytes[10];
|
||||
double dval;
|
||||
float fval;
|
||||
s16 sval;
|
||||
s32 lval;
|
||||
};
|
||||
|
||||
struct x86_fpu_reg {
|
||||
union x86_fpu_reg_u reg;
|
||||
char tag;
|
||||
};
|
||||
|
||||
/*
|
||||
* Since we are not going to worry about the problems of aliasing
|
||||
* registers, every time a register is modified, its result type is
|
||||
* set in the tag fields for that register. If some operation
|
||||
* attempts to access the type in a way inconsistent with its current
|
||||
* storage format, then we flag the operation. If common, we'll
|
||||
* attempt the conversion.
|
||||
*/
|
||||
|
||||
#define X86_FPU_VALID 0x80
|
||||
#define X86_FPU_REGTYP(r) ((r) & 0x7F)
|
||||
|
||||
#define X86_FPU_WORD 0x0
|
||||
#define X86_FPU_SHORT 0x1
|
||||
#define X86_FPU_LONG 0x2
|
||||
#define X86_FPU_FLOAT 0x3
|
||||
#define X86_FPU_DOUBLE 0x4
|
||||
#define X86_FPU_LDBL 0x5
|
||||
#define X86_FPU_BSD 0x6
|
||||
|
||||
#define X86_FPU_STKTOP 0
|
||||
|
||||
struct x86_fpu_registers
|
||||
{
|
||||
struct x86_fpu_reg x86_fpu_stack[8];
|
||||
int x86_fpu_flags;
|
||||
int x86_fpu_config; /* rounding modes, etc. */
|
||||
short x86_fpu_tos, x86_fpu_bos;
|
||||
};
|
||||
|
||||
#pragma pack()
|
||||
|
||||
/*
|
||||
* There are two versions of the following macro.
|
||||
*
|
||||
* One version is for opcode D9, for which there are more than 32
|
||||
* instructions encoded in the second byte of the opcode.
|
||||
*
|
||||
* The other version, deals with all the other 7 i87 opcodes, for
|
||||
* which there are only 32 strings needed to describe the
|
||||
* instructions.
|
||||
*/
|
||||
|
||||
#endif /* X86_FPU_SUPPORT */
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define DECODE_PRINTINSTR32(t, mod, rh, rl) \
|
||||
DECODE_PRINTF(t[(mod << 3) + (rh)]);
|
||||
#define DECODE_PRINTINSTR256(t, mod, rh, rl) \
|
||||
DECODE_PRINTF(t[(mod << 6) + (rh << 3) + (rl)]);
|
||||
#else
|
||||
#define DECODE_PRINTINSTR32(t,mod,rh,rl)
|
||||
#define DECODE_PRINTINSTR256(t,mod,rh,rl)
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_FPU_REGS_H */
|
||||
@@ -1,45 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for operand decoding functions.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_OPS_H
|
||||
#define __X86EMU_OPS_H
|
||||
|
||||
extern void (*x86emu_optab[0x100])(uint8_t op1);
|
||||
extern void (*x86emu_optab2[0x100])(uint8_t op2);
|
||||
|
||||
#endif /* __X86EMU_OPS_H */
|
||||
@@ -2,27 +2,27 @@
|
||||
#define PCI_BIOS_H
|
||||
|
||||
enum {
|
||||
PCI_BIOS_PRESENT = 0xB101,
|
||||
FIND_PCI_DEVICE = 0xB102,
|
||||
FIND_PCI_CLASS_CODE = 0xB103,
|
||||
PCI_BIOS_PRESENT = 0xB101,
|
||||
FIND_PCI_DEVICE = 0xB102,
|
||||
FIND_PCI_CLASS_CODE = 0xB103,
|
||||
GENERATE_SPECIAL_CYCLE = 0xB106,
|
||||
READ_CONFIG_BYTE = 0xB108,
|
||||
READ_CONFIG_WORD = 0xB109,
|
||||
READ_CONFIG_DWORD = 0xB10A,
|
||||
WRITE_CONFIG_BYTE = 0xB10B,
|
||||
WRITE_CONFIG_WORD = 0xB10C,
|
||||
WRITE_CONFIG_DWORD = 0xB10D,
|
||||
READ_CONFIG_BYTE = 0xB108,
|
||||
READ_CONFIG_WORD = 0xB109,
|
||||
READ_CONFIG_DWORD = 0xB10A,
|
||||
WRITE_CONFIG_BYTE = 0xB10B,
|
||||
WRITE_CONFIG_WORD = 0xB10C,
|
||||
WRITE_CONFIG_DWORD = 0xB10D,
|
||||
GET_IRQ_ROUTING_OPTIONS = 0xB10E,
|
||||
SET_PCI_IRQ = 0xB10F
|
||||
SET_PCI_IRQ = 0xB10F
|
||||
};
|
||||
|
||||
enum {
|
||||
SUCCESSFUL = 0x00,
|
||||
SUCCESSFUL = 0x00,
|
||||
FUNC_NOT_SUPPORTED = 0x81,
|
||||
BAD_VENDOR_ID = 0x83,
|
||||
DEVICE_NOT_FOUND = 0x86,
|
||||
BAD_REGISTER_NUMBER = 0x87,
|
||||
SET_FAILED = 0x88,
|
||||
SET_FAILED = 0x88,
|
||||
BUFFER_TOO_SMALL = 0x89
|
||||
};
|
||||
#endif /* PCI_BIOS_H */
|
||||
|
||||
@@ -1,971 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: Watcom C++ 10.6 or later
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Inline assembler versions of the primitive operand
|
||||
* functions for faster performance. At the moment this is
|
||||
* x86 inline assembler, but these functions could be replaced
|
||||
* with native inline assembler for each supported processor
|
||||
* platform.
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/prim_asm.h,v 1.3 2000/04/19 15:48:15 tsi Exp $ */
|
||||
|
||||
#ifndef __X86EMU_PRIM_ASM_H
|
||||
#define __X86EMU_PRIM_ASM_H
|
||||
|
||||
#ifdef __WATCOMC__
|
||||
|
||||
#ifndef VALIDATE
|
||||
#define __HAVE_INLINE_ASSEMBLER__
|
||||
#endif
|
||||
|
||||
u32 get_flags_asm(void);
|
||||
#pragma aux get_flags_asm = \
|
||||
"pushf" \
|
||||
"pop eax" \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u16 aaa_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux aaa_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aaa" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u16 aas_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux aas_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aas" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u16 aad_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux aad_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aad" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u16 aam_word_asm(u32 *flags,u8 d);
|
||||
#pragma aux aam_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aam" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u8 adc_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux adc_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"adc al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 adc_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux adc_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"adc ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 adc_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux adc_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"adc eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 add_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux add_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"add al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 add_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux add_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"add ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 add_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux add_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"add eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 and_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux and_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"and al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 and_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux and_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"and ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 and_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux and_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"and eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 cmp_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux cmp_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"cmp al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 cmp_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux cmp_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"cmp ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 cmp_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux cmp_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"cmp eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 daa_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux daa_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"daa" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u8 das_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux das_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"das" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u8 dec_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux dec_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"dec al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 dec_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux dec_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"dec ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 dec_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux dec_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"dec eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 inc_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux inc_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"inc al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 inc_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux inc_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"inc ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 inc_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux inc_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"inc eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 or_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux or_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"or al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 or_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux or_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"or ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 or_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux or_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"or eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 neg_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux neg_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"neg al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 neg_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux neg_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"neg ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 neg_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux neg_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"neg eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 not_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux not_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"not al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 not_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux not_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"not ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 not_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux not_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"not eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 rcl_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux rcl_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcl al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 rcl_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux rcl_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcl ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 rcl_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux rcl_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcl eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 rcr_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux rcr_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcr al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 rcr_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux rcr_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcr ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 rcr_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux rcr_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcr eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 rol_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux rol_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rol al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 rol_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux rol_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rol ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 rol_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux rol_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rol eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 ror_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux ror_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"ror al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 ror_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux ror_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"ror ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 ror_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux ror_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"ror eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 shl_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux shl_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shl al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 shl_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux shl_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shl ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 shl_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux shl_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shl eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 shr_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux shr_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shr al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 shr_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux shr_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shr ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 shr_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux shr_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shr eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 sar_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux sar_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sar al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 sar_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux sar_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sar ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 sar_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux sar_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sar eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u16 shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
|
||||
#pragma aux shld_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shld ax,dx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [dx] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax dx cl];
|
||||
|
||||
u32 shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
|
||||
#pragma aux shld_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shld eax,edx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [edx] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax edx cl];
|
||||
|
||||
u16 shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
|
||||
#pragma aux shrd_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shrd ax,dx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [dx] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax dx cl];
|
||||
|
||||
u32 shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
|
||||
#pragma aux shrd_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shrd eax,edx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [edx] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax edx cl];
|
||||
|
||||
u8 sbb_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux sbb_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sbb al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 sbb_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux sbb_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sbb ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 sbb_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux sbb_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sbb eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 sub_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux sub_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sub al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 sub_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux sub_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sub ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 sub_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux sub_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sub eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
void test_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux test_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"test al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
modify exact [al bl];
|
||||
|
||||
void test_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux test_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"test ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
modify exact [ax bx];
|
||||
|
||||
void test_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux test_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"test eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 xor_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux xor_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"xor al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 xor_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux xor_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"xor ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 xor_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux xor_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"xor eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
void imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
|
||||
#pragma aux imul_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"imul bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
parm [edi] [esi] [al] [bl] \
|
||||
modify exact [esi ax bl];
|
||||
|
||||
void imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
|
||||
#pragma aux imul_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"imul bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [bx]\
|
||||
modify exact [esi edi ax bx dx];
|
||||
|
||||
void imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
|
||||
#pragma aux imul_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"imul ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [ebx] \
|
||||
modify exact [esi edi eax ebx edx];
|
||||
|
||||
void mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
|
||||
#pragma aux mul_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"mul bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
parm [edi] [esi] [al] [bl] \
|
||||
modify exact [esi ax bl];
|
||||
|
||||
void mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
|
||||
#pragma aux mul_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"mul bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [bx]\
|
||||
modify exact [esi edi ax bx dx];
|
||||
|
||||
void mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
|
||||
#pragma aux mul_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"mul ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [ebx] \
|
||||
modify exact [esi edi eax ebx edx];
|
||||
|
||||
void idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
|
||||
#pragma aux idiv_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"idiv bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],al" \
|
||||
"mov [ecx],ah" \
|
||||
parm [edi] [esi] [ecx] [ax] [bl]\
|
||||
modify exact [esi edi ax bl];
|
||||
|
||||
void idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
|
||||
#pragma aux idiv_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"idiv bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [dx] [bx]\
|
||||
modify exact [esi edi ax dx bx];
|
||||
|
||||
void idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
|
||||
#pragma aux idiv_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"idiv ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
|
||||
modify exact [esi edi eax edx ebx];
|
||||
|
||||
void div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
|
||||
#pragma aux div_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"div bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],al" \
|
||||
"mov [ecx],ah" \
|
||||
parm [edi] [esi] [ecx] [ax] [bl]\
|
||||
modify exact [esi edi ax bl];
|
||||
|
||||
void div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
|
||||
#pragma aux div_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"div bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [dx] [bx]\
|
||||
modify exact [esi edi ax dx bx];
|
||||
|
||||
void div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
|
||||
#pragma aux div_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"div ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
|
||||
modify exact [esi edi eax edx ebx];
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_PRIM_ASM_H */
|
||||
@@ -1,232 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for primitive operation functions.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_PRIM_OPS_H
|
||||
#define __X86EMU_PRIM_OPS_H
|
||||
|
||||
#include "x86prim_asm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
uint16_t aaa_word (uint16_t d);
|
||||
uint16_t aas_word (uint16_t d);
|
||||
uint16_t aad_word (uint16_t d);
|
||||
uint16_t aam_word (uint8_t d);
|
||||
uint8_t adc_byte (uint8_t d, uint8_t s);
|
||||
uint16_t adc_word (uint16_t d, uint16_t s);
|
||||
uint32_t adc_long (uint32_t d, uint32_t s);
|
||||
uint8_t add_byte (uint8_t d, uint8_t s);
|
||||
uint16_t add_word (uint16_t d, uint16_t s);
|
||||
uint32_t add_long (uint32_t d, uint32_t s);
|
||||
uint8_t and_byte (uint8_t d, uint8_t s);
|
||||
uint16_t and_word (uint16_t d, uint16_t s);
|
||||
uint32_t and_long (uint32_t d, uint32_t s);
|
||||
uint8_t cmp_byte (uint8_t d, uint8_t s);
|
||||
uint16_t cmp_word (uint16_t d, uint16_t s);
|
||||
uint32_t cmp_long (uint32_t d, uint32_t s);
|
||||
uint8_t daa_byte (uint8_t d);
|
||||
uint8_t das_byte (uint8_t d);
|
||||
uint8_t dec_byte (uint8_t d);
|
||||
uint16_t dec_word (uint16_t d);
|
||||
uint32_t dec_long (uint32_t d);
|
||||
uint8_t inc_byte (uint8_t d);
|
||||
uint16_t inc_word (uint16_t d);
|
||||
uint32_t inc_long (uint32_t d);
|
||||
uint8_t or_byte (uint8_t d, uint8_t s);
|
||||
uint16_t or_word (uint16_t d, uint16_t s);
|
||||
uint32_t or_long (uint32_t d, uint32_t s);
|
||||
uint8_t neg_byte (uint8_t s);
|
||||
uint16_t neg_word (uint16_t s);
|
||||
uint32_t neg_long (uint32_t s);
|
||||
uint8_t not_byte (uint8_t s);
|
||||
uint16_t not_word (uint16_t s);
|
||||
uint32_t not_long (uint32_t s);
|
||||
uint8_t rcl_byte (uint8_t d, uint8_t s);
|
||||
uint16_t rcl_word (uint16_t d, uint8_t s);
|
||||
uint32_t rcl_long (uint32_t d, uint8_t s);
|
||||
uint8_t rcr_byte (uint8_t d, uint8_t s);
|
||||
uint16_t rcr_word (uint16_t d, uint8_t s);
|
||||
uint32_t rcr_long (uint32_t d, uint8_t s);
|
||||
uint8_t rol_byte (uint8_t d, uint8_t s);
|
||||
uint16_t rol_word (uint16_t d, uint8_t s);
|
||||
uint32_t rol_long (uint32_t d, uint8_t s);
|
||||
uint8_t ror_byte (uint8_t d, uint8_t s);
|
||||
uint16_t ror_word (uint16_t d, uint8_t s);
|
||||
uint32_t ror_long (uint32_t d, uint8_t s);
|
||||
uint8_t shl_byte (uint8_t d, uint8_t s);
|
||||
uint16_t shl_word (uint16_t d, uint8_t s);
|
||||
uint32_t shl_long (uint32_t d, uint8_t s);
|
||||
uint8_t shr_byte (uint8_t d, uint8_t s);
|
||||
uint16_t shr_word (uint16_t d, uint8_t s);
|
||||
uint32_t shr_long (uint32_t d, uint8_t s);
|
||||
uint8_t sar_byte (uint8_t d, uint8_t s);
|
||||
uint16_t sar_word (uint16_t d, uint8_t s);
|
||||
uint32_t sar_long (uint32_t d, uint8_t s);
|
||||
uint16_t shld_word (uint16_t d, uint16_t fill, uint8_t s);
|
||||
uint32_t shld_long (uint32_t d, uint32_t fill, uint8_t s);
|
||||
uint16_t shrd_word (uint16_t d, uint16_t fill, uint8_t s);
|
||||
uint32_t shrd_long (uint32_t d, uint32_t fill, uint8_t s);
|
||||
uint8_t sbb_byte (uint8_t d, uint8_t s);
|
||||
uint16_t sbb_word (uint16_t d, uint16_t s);
|
||||
uint32_t sbb_long (uint32_t d, uint32_t s);
|
||||
uint8_t sub_byte (uint8_t d, uint8_t s);
|
||||
uint16_t sub_word (uint16_t d, uint16_t s);
|
||||
uint32_t sub_long (uint32_t d, uint32_t s);
|
||||
void test_byte (uint8_t d, uint8_t s);
|
||||
void test_word (uint16_t d, uint16_t s);
|
||||
void test_long (uint32_t d, uint32_t s);
|
||||
uint8_t xor_byte (uint8_t d, uint8_t s);
|
||||
uint16_t xor_word (uint16_t d, uint16_t s);
|
||||
uint32_t xor_long (uint32_t d, uint32_t s);
|
||||
void imul_byte (uint8_t s);
|
||||
void imul_word (uint16_t s);
|
||||
void imul_long (uint32_t s);
|
||||
void imul_long_direct(uint32_t *res_lo, uint32_t* res_hi,uint32_t d, uint32_t s);
|
||||
void mul_byte (uint8_t s);
|
||||
void mul_word (uint16_t s);
|
||||
void mul_long (uint32_t s);
|
||||
void idiv_byte (uint8_t s);
|
||||
void idiv_word (uint16_t s);
|
||||
void idiv_long (uint32_t s);
|
||||
void div_byte (uint8_t s);
|
||||
void div_word (uint16_t s);
|
||||
void div_long (uint32_t s);
|
||||
void ins (int size);
|
||||
void outs (int size);
|
||||
uint16_t mem_access_word (int addr);
|
||||
void push_word (uint16_t w);
|
||||
void push_long (uint32_t w);
|
||||
uint16_t pop_word (void);
|
||||
uint32_t pop_long (void);
|
||||
|
||||
|
||||
#if defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM)
|
||||
|
||||
#define aaa_word(d) aaa_word_asm(&M.x86.R_EFLG,d)
|
||||
#define aas_word(d) aas_word_asm(&M.x86.R_EFLG,d)
|
||||
#define aad_word(d) aad_word_asm(&M.x86.R_EFLG,d)
|
||||
#define aam_word(d) aam_word_asm(&M.x86.R_EFLG,d)
|
||||
#define adc_byte(d,s) adc_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define adc_word(d,s) adc_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define adc_long(d,s) adc_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define add_byte(d,s) add_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define add_word(d,s) add_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define add_long(d,s) add_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define and_byte(d,s) and_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define and_word(d,s) and_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define and_long(d,s) and_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define cmp_byte(d,s) cmp_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define cmp_word(d,s) cmp_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define cmp_long(d,s) cmp_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define daa_byte(d) daa_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define das_byte(d) das_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define dec_byte(d) dec_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define dec_word(d) dec_word_asm(&M.x86.R_EFLG,d)
|
||||
#define dec_long(d) dec_long_asm(&M.x86.R_EFLG,d)
|
||||
#define inc_byte(d) inc_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define inc_word(d) inc_word_asm(&M.x86.R_EFLG,d)
|
||||
#define inc_long(d) inc_long_asm(&M.x86.R_EFLG,d)
|
||||
#define or_byte(d,s) or_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define or_word(d,s) or_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define or_long(d,s) or_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define neg_byte(s) neg_byte_asm(&M.x86.R_EFLG,s)
|
||||
#define neg_word(s) neg_word_asm(&M.x86.R_EFLG,s)
|
||||
#define neg_long(s) neg_long_asm(&M.x86.R_EFLG,s)
|
||||
#define not_byte(s) not_byte_asm(&M.x86.R_EFLG,s)
|
||||
#define not_word(s) not_word_asm(&M.x86.R_EFLG,s)
|
||||
#define not_long(s) not_long_asm(&M.x86.R_EFLG,s)
|
||||
#define rcl_byte(d,s) rcl_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcl_word(d,s) rcl_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcl_long(d,s) rcl_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcr_byte(d,s) rcr_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcr_word(d,s) rcr_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcr_long(d,s) rcr_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rol_byte(d,s) rol_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rol_word(d,s) rol_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rol_long(d,s) rol_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define ror_byte(d,s) ror_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define ror_word(d,s) ror_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define ror_long(d,s) ror_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shl_byte(d,s) shl_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shl_word(d,s) shl_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shl_long(d,s) shl_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shr_byte(d,s) shr_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shr_word(d,s) shr_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shr_long(d,s) shr_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sar_byte(d,s) sar_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sar_word(d,s) sar_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sar_long(d,s) sar_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shld_word(d,fill,s) shld_word_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define shld_long(d,fill,s) shld_long_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define shrd_word(d,fill,s) shrd_word_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define shrd_long(d,fill,s) shrd_long_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define sbb_byte(d,s) sbb_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sbb_word(d,s) sbb_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sbb_long(d,s) sbb_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sub_byte(d,s) sub_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sub_word(d,s) sub_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sub_long(d,s) sub_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define test_byte(d,s) test_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define test_word(d,s) test_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define test_long(d,s) test_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define xor_byte(d,s) xor_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define xor_word(d,s) xor_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define xor_long(d,s) xor_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define imul_byte(s) imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
|
||||
#define imul_word(s) imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
|
||||
#define imul_long(s) imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
|
||||
#define imul_long_direct(res_lo,res_hi,d,s) imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s)
|
||||
#define mul_byte(s) mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
|
||||
#define mul_word(s) mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
|
||||
#define mul_long(s) mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
|
||||
#define idiv_byte(s) idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
|
||||
#define idiv_word(s) idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
|
||||
#define idiv_long(s) idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
|
||||
#define div_byte(s) div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
|
||||
#define div_word(s) div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
|
||||
#define div_long(s) div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_PRIM_OPS_H */
|
||||
@@ -1,358 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for x86 register definitions.
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/include/x86emu/regs.h,v 1.3 2001/10/28 03:32:25 tsi Exp $ */
|
||||
|
||||
#ifndef __X86EMU_REGS_H
|
||||
#define __X86EMU_REGS_H
|
||||
#include "x86debug.h"
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
//#pragma pack(1)
|
||||
|
||||
/*
|
||||
* General EAX, EBX, ECX, EDX type registers. Note that for
|
||||
* portability, and speed, the issue of byte swapping is not addressed
|
||||
* in the registers. All registers are stored in the default format
|
||||
* available on the host machine. The only critical issue is that the
|
||||
* registers should line up EXACTLY in the same manner as they do in
|
||||
* the 386. That is:
|
||||
*
|
||||
* EAX & 0xff === AL
|
||||
* EAX & 0xffff == AX
|
||||
*
|
||||
* etc. The result is that alot of the calculations can then be
|
||||
* done using the native instruction set fully.
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
uint32_t e_reg;
|
||||
} I32_reg_t;
|
||||
|
||||
typedef struct {
|
||||
uint16_t filler0, x_reg;
|
||||
} I16_reg_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t filler0, filler1, h_reg, l_reg;
|
||||
} I8_reg_t;
|
||||
|
||||
typedef union {
|
||||
I32_reg_t I32_reg;
|
||||
I16_reg_t I16_reg;
|
||||
I8_reg_t I8_reg;
|
||||
} i386_general_register;
|
||||
|
||||
struct i386_general_regs {
|
||||
i386_general_register A, B, C, D;
|
||||
};
|
||||
|
||||
typedef struct i386_general_regs Gen_reg_t;
|
||||
|
||||
struct i386_special_regs {
|
||||
i386_general_register SP, BP, SI, DI, IP;
|
||||
uint32_t FLAGS;
|
||||
};
|
||||
|
||||
/*
|
||||
* Segment registers here represent the 16 bit quantities
|
||||
* CS, DS, ES, SS.
|
||||
*/
|
||||
|
||||
struct i386_segment_regs {
|
||||
uint16_t CS, DS, SS, ES, FS, GS;
|
||||
};
|
||||
|
||||
/* 8 bit registers */
|
||||
#define R_AH gen.A.I8_reg.h_reg
|
||||
#define R_AL gen.A.I8_reg.l_reg
|
||||
#define R_BH gen.B.I8_reg.h_reg
|
||||
#define R_BL gen.B.I8_reg.l_reg
|
||||
#define R_CH gen.C.I8_reg.h_reg
|
||||
#define R_CL gen.C.I8_reg.l_reg
|
||||
#define R_DH gen.D.I8_reg.h_reg
|
||||
#define R_DL gen.D.I8_reg.l_reg
|
||||
|
||||
/* 16 bit registers */
|
||||
#define R_AX gen.A.I16_reg.x_reg
|
||||
#define R_BX gen.B.I16_reg.x_reg
|
||||
#define R_CX gen.C.I16_reg.x_reg
|
||||
#define R_DX gen.D.I16_reg.x_reg
|
||||
|
||||
/* 32 bit extended registers */
|
||||
#define R_EAX gen.A.I32_reg.e_reg
|
||||
#define R_EBX gen.B.I32_reg.e_reg
|
||||
#define R_ECX gen.C.I32_reg.e_reg
|
||||
#define R_EDX gen.D.I32_reg.e_reg
|
||||
|
||||
/* special registers */
|
||||
#define R_SP spc.SP.I16_reg.x_reg
|
||||
#define R_BP spc.BP.I16_reg.x_reg
|
||||
#define R_SI spc.SI.I16_reg.x_reg
|
||||
#define R_DI spc.DI.I16_reg.x_reg
|
||||
#define R_IP spc.IP.I16_reg.x_reg
|
||||
#define R_FLG spc.FLAGS
|
||||
|
||||
/* special registers */
|
||||
#define R_SP spc.SP.I16_reg.x_reg
|
||||
#define R_BP spc.BP.I16_reg.x_reg
|
||||
#define R_SI spc.SI.I16_reg.x_reg
|
||||
#define R_DI spc.DI.I16_reg.x_reg
|
||||
#define R_IP spc.IP.I16_reg.x_reg
|
||||
#define R_FLG spc.FLAGS
|
||||
|
||||
/* special registers */
|
||||
#define R_ESP spc.SP.I32_reg.e_reg
|
||||
#define R_EBP spc.BP.I32_reg.e_reg
|
||||
#define R_ESI spc.SI.I32_reg.e_reg
|
||||
#define R_EDI spc.DI.I32_reg.e_reg
|
||||
#define R_EIP spc.IP.I32_reg.e_reg
|
||||
#define R_EFLG spc.FLAGS
|
||||
|
||||
/* segment registers */
|
||||
#define R_CS seg.CS
|
||||
#define R_DS seg.DS
|
||||
#define R_SS seg.SS
|
||||
#define R_ES seg.ES
|
||||
#define R_FS seg.FS
|
||||
#define R_GS seg.GS
|
||||
|
||||
/* flag conditions */
|
||||
#define FB_CF 0x0001 /* CARRY flag */
|
||||
#define FB_PF 0x0004 /* PARITY flag */
|
||||
#define FB_AF 0x0010 /* AUX flag */
|
||||
#define FB_ZF 0x0040 /* ZERO flag */
|
||||
#define FB_SF 0x0080 /* SIGN flag */
|
||||
#define FB_TF 0x0100 /* TRAP flag */
|
||||
#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define FB_DF 0x0400 /* DIR flag */
|
||||
#define FB_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
/* 80286 and above always have bit#1 set */
|
||||
#define F_ALWAYS_ON (0x0002) /* flag bits always on */
|
||||
|
||||
/*
|
||||
* Define a mask for only those flag bits we will ever pass back
|
||||
* (via PUSHF)
|
||||
*/
|
||||
#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
|
||||
|
||||
/* following bits masked in to a 16bit quantity */
|
||||
|
||||
#define F_CF 0x0001 /* CARRY flag */
|
||||
#define F_PF 0x0004 /* PARITY flag */
|
||||
#define F_AF 0x0010 /* AUX flag */
|
||||
#define F_ZF 0x0040 /* ZERO flag */
|
||||
#define F_SF 0x0080 /* SIGN flag */
|
||||
#define F_TF 0x0100 /* TRAP flag */
|
||||
#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define F_DF 0x0400 /* DIR flag */
|
||||
#define F_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
|
||||
#define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
|
||||
#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
|
||||
#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
|
||||
#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
|
||||
|
||||
#define CONDITIONAL_SET_FLAG(COND,FLAG) \
|
||||
if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
|
||||
|
||||
#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
|
||||
#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
|
||||
#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
|
||||
|
||||
#define F_ALL_CALC 0xff0000 /* All have been calced */
|
||||
|
||||
/*
|
||||
* Emulator machine state.
|
||||
* Segment usage control.
|
||||
*/
|
||||
#define SYSMODE_SEG_DS_SS 0x00000001
|
||||
#define SYSMODE_SEGOVR_CS 0x00000002
|
||||
#define SYSMODE_SEGOVR_DS 0x00000004
|
||||
#define SYSMODE_SEGOVR_ES 0x00000008
|
||||
#define SYSMODE_SEGOVR_FS 0x00000010
|
||||
#define SYSMODE_SEGOVR_GS 0x00000020
|
||||
#define SYSMODE_SEGOVR_SS 0x00000040
|
||||
#define SYSMODE_PREFIX_REPE 0x00000080
|
||||
#define SYSMODE_PREFIX_REPNE 0x00000100
|
||||
#define SYSMODE_PREFIX_DATA 0x00000200
|
||||
#define SYSMODE_PREFIX_ADDR 0x00000400
|
||||
#define SYSMODE_INTR_PENDING 0x10000000
|
||||
#define SYSMODE_EXTRN_INTR 0x20000000
|
||||
#define SYSMODE_HALTED 0x40000000
|
||||
|
||||
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS)
|
||||
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS | \
|
||||
SYSMODE_PREFIX_DATA | \
|
||||
SYSMODE_PREFIX_ADDR)
|
||||
|
||||
#define INTR_SYNCH 0x1
|
||||
#define INTR_ASYNCH 0x2
|
||||
#define INTR_HALTED 0x4
|
||||
|
||||
typedef struct {
|
||||
struct i386_general_regs gen;
|
||||
struct i386_special_regs spc;
|
||||
struct i386_segment_regs seg;
|
||||
/*
|
||||
* MODE contains information on:
|
||||
* REPE prefix 2 bits repe,repne
|
||||
* SEGMENT overrides 5 bits normal,DS,SS,CS,ES
|
||||
* Delayed flag set 3 bits (zero, signed, parity)
|
||||
* reserved 6 bits
|
||||
* interrupt # 8 bits instruction raised interrupt
|
||||
* BIOS video segregs 4 bits
|
||||
* Interrupt Pending 1 bits
|
||||
* Extern interrupt 1 bits
|
||||
* Halted 1 bits
|
||||
*/
|
||||
uint32_t mode;
|
||||
volatile int intr; /* mask of pending interrupts */
|
||||
int debug;
|
||||
#ifdef DBG_X86EMU
|
||||
int check;
|
||||
uint16_t saved_ip;
|
||||
uint16_t saved_cs;
|
||||
int enc_pos;
|
||||
int enc_str_pos;
|
||||
// char decode_buf[32]; /* encoded byte stream */
|
||||
char decoded_buf[256]; /* disassembled strings */
|
||||
#endif
|
||||
uint8_t intno;
|
||||
uint8_t __pad[3];
|
||||
} X86EMU_regs;
|
||||
|
||||
/****************************************************************************
|
||||
REMARKS:
|
||||
Structure maintaining the emulator machine state.
|
||||
|
||||
MEMBERS:
|
||||
mem_base - Base real mode memory for the emulator
|
||||
abseg - Base for the absegment
|
||||
mem_size - Size of the real mode memory block for the emulator
|
||||
private - private data pointer
|
||||
x86 - X86 registers
|
||||
****************************************************************************/
|
||||
typedef struct
|
||||
{
|
||||
unsigned long mem_base;
|
||||
unsigned long mem_size;
|
||||
unsigned long abseg;
|
||||
void* private;
|
||||
X86EMU_regs x86;
|
||||
} X86EMU_sysEnv;
|
||||
|
||||
//#pragma pack()
|
||||
|
||||
/*----------------------------- Global Variables --------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
/* Global emulator machine state.
|
||||
*
|
||||
* We keep it global to avoid pointer dereferences in the code for speed.
|
||||
*/
|
||||
|
||||
extern X86EMU_sysEnv _X86EMU_env;
|
||||
|
||||
#define M _X86EMU_env
|
||||
|
||||
#define X86_EAX M.x86.R_EAX
|
||||
#define X86_EBX M.x86.R_EBX
|
||||
#define X86_ECX M.x86.R_ECX
|
||||
#define X86_EDX M.x86.R_EDX
|
||||
#define X86_ESI M.x86.R_ESI
|
||||
#define X86_EDI M.x86.R_EDI
|
||||
#define X86_EBP M.x86.R_EBP
|
||||
#define X86_EIP M.x86.R_EIP
|
||||
#define X86_ESP M.x86.R_ESP
|
||||
#define X86_EFLAGS M.x86.R_EFLG
|
||||
|
||||
#define X86_FLAGS M.x86.R_FLG
|
||||
#define X86_AX M.x86.R_AX
|
||||
#define X86_BX M.x86.R_BX
|
||||
#define X86_CX M.x86.R_CX
|
||||
#define X86_DX M.x86.R_DX
|
||||
#define X86_SI M.x86.R_SI
|
||||
#define X86_DI M.x86.R_DI
|
||||
#define X86_BP M.x86.R_BP
|
||||
#define X86_IP M.x86.R_IP
|
||||
#define X86_SP M.x86.R_SP
|
||||
#define X86_CS M.x86.R_CS
|
||||
#define X86_DS M.x86.R_DS
|
||||
#define X86_ES M.x86.R_ES
|
||||
#define X86_SS M.x86.R_SS
|
||||
#define X86_FS M.x86.R_FS
|
||||
#define X86_GS M.x86.R_GS
|
||||
|
||||
#define X86_AL M.x86.R_AL
|
||||
#define X86_BL M.x86.R_BL
|
||||
#define X86_CL M.x86.R_CL
|
||||
#define X86_DL M.x86.R_DL
|
||||
|
||||
#define X86_AH M.x86.R_AH
|
||||
#define X86_BH M.x86.R_BH
|
||||
#define X86_CH M.x86.R_CH
|
||||
#define X86_DH M.x86.R_DH
|
||||
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
|
||||
/* Function to log information at runtime */
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_REGS_H */
|
||||
@@ -85,7 +85,7 @@ typedef struct _BPB
|
||||
/* a riddle: how do you typedef a function pointer to a function that returns its own type? ;) */
|
||||
typedef void* (*xhdi_call_fun)(int xhdi_fun, ...);
|
||||
|
||||
extern unsigned long xhdi_call(uint16_t *stack);
|
||||
extern uint32_t xhdi_call(uint16_t *stack);
|
||||
|
||||
extern xhdi_call_fun xhdi_sd_install(xhdi_call_fun old_vector) __attribute__((__interrupt__));
|
||||
|
||||
|
||||
440
kbd/ikbd.c
440
kbd/ikbd.c
@@ -18,7 +18,7 @@
|
||||
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
#include "bas_printf.h"
|
||||
#include "bas_string.h"
|
||||
|
||||
@@ -35,281 +35,305 @@
|
||||
|
||||
#define IKBD_DEFAULT IKBD_STATE_JOYSTICK_EVENT_REPORTING
|
||||
|
||||
#define QUEUE_LEN 16 // power of 2!
|
||||
#define QUEUE_LEN 16 // power of 2!
|
||||
static unsigned char tx_queue[QUEUE_LEN];
|
||||
static unsigned char wptr = 0, rptr = 0;
|
||||
|
||||
// structure to keep track of ikbd state
|
||||
static struct {
|
||||
unsigned char cmd;
|
||||
unsigned char state;
|
||||
unsigned char expect;
|
||||
static struct
|
||||
{
|
||||
unsigned char cmd;
|
||||
unsigned char state;
|
||||
unsigned char expect;
|
||||
|
||||
// joystick state
|
||||
unsigned char joystick[2];
|
||||
// joystick state
|
||||
unsigned char joystick[2];
|
||||
|
||||
// mouse state
|
||||
unsigned short mouse_pos_x, mouse_pos_y;
|
||||
unsigned char mouse_buttons;
|
||||
// mouse state
|
||||
unsigned short mouse_pos_x, mouse_pos_y;
|
||||
unsigned char mouse_buttons;
|
||||
} ikbd;
|
||||
|
||||
// #define IKBD_DEBUG
|
||||
|
||||
void ikbd_init() {
|
||||
// reset ikbd state
|
||||
memset(&ikbd, 0, sizeof(ikbd));
|
||||
ikbd.state = IKBD_DEFAULT;
|
||||
void ikbd_init()
|
||||
{
|
||||
// reset ikbd state
|
||||
memset(&ikbd, 0, sizeof(ikbd));
|
||||
ikbd.state = IKBD_DEFAULT;
|
||||
}
|
||||
|
||||
static void enqueue(unsigned char b) {
|
||||
if(((wptr + 1)&(QUEUE_LEN-1)) == rptr) {
|
||||
xprintf("IKBD: !!!!!!! tx queue overflow !!!!!!!!!\n");
|
||||
return;
|
||||
}
|
||||
static void enqueue(unsigned char b)
|
||||
{
|
||||
if (((wptr + 1)&(QUEUE_LEN-1)) == rptr)
|
||||
{
|
||||
xprintf("IKBD: !!!!!!! tx queue overflow !!!!!!!!!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
tx_queue[wptr] = b;
|
||||
wptr = (wptr+1)&(QUEUE_LEN-1);
|
||||
tx_queue[wptr] = b;
|
||||
wptr = (wptr + 1) & (QUEUE_LEN - 1);
|
||||
}
|
||||
|
||||
// convert internal joystick format into atari ikbd format
|
||||
static unsigned char joystick_map2ikbd(unsigned in) {
|
||||
unsigned char out = 0;
|
||||
static unsigned char joystick_map2ikbd(unsigned in)
|
||||
{
|
||||
unsigned char out = 0;
|
||||
|
||||
if(in & JOY_UP) out |= 0x01;
|
||||
if(in & JOY_DOWN) out |= 0x02;
|
||||
if(in & JOY_LEFT) out |= 0x04;
|
||||
if(in & JOY_RIGHT) out |= 0x08;
|
||||
if(in & JOY_BTN1) out |= 0x80;
|
||||
if (in & JOY_UP) out |= 0x01;
|
||||
if (in & JOY_DOWN) out |= 0x02;
|
||||
if (in & JOY_LEFT) out |= 0x04;
|
||||
if (in & JOY_RIGHT) out |= 0x08;
|
||||
if (in & JOY_BTN1) out |= 0x80;
|
||||
|
||||
return out;
|
||||
return out;
|
||||
}
|
||||
|
||||
// process inout from atari core into ikbd
|
||||
void ikbd_handle_input(unsigned char cmd) {
|
||||
// expecting a second byte for command
|
||||
if(ikbd.expect) {
|
||||
ikbd.expect--;
|
||||
void ikbd_handle_input(unsigned char cmd)
|
||||
{
|
||||
// expecting a second byte for command
|
||||
if (ikbd.expect)
|
||||
{
|
||||
ikbd.expect--;
|
||||
|
||||
// last byte of command received
|
||||
if(!ikbd.expect) {
|
||||
switch(ikbd.cmd) {
|
||||
case 0x07: // set mouse button action
|
||||
xprintf("IKBD: mouse button action = %x\n", cmd);
|
||||
// last byte of command received
|
||||
if (!ikbd.expect)
|
||||
{
|
||||
switch(ikbd.cmd)
|
||||
{
|
||||
case 0x07: // set mouse button action
|
||||
xprintf("IKBD: mouse button action = %x\n", cmd);
|
||||
|
||||
// bit 2: Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
|
||||
if(cmd & 0x04) ikbd.state |= IKBD_STATE_MOUSE_BUTTON_AS_KEY;
|
||||
else ikbd.state &= ~IKBD_STATE_MOUSE_BUTTON_AS_KEY;
|
||||
// bit 2: Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
|
||||
if(cmd & 0x04) ikbd.state |= IKBD_STATE_MOUSE_BUTTON_AS_KEY;
|
||||
else ikbd.state &= ~IKBD_STATE_MOUSE_BUTTON_AS_KEY;
|
||||
|
||||
break;
|
||||
break;
|
||||
|
||||
case 0x80: // ibkd reset
|
||||
// reply "everything is ok"
|
||||
enqueue(0xf0);
|
||||
break;
|
||||
case 0x80: // ibkd reset
|
||||
// reply "everything is ok"
|
||||
enqueue(0xf0);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
ikbd.cmd = cmd;
|
||||
|
||||
ikbd.cmd = cmd;
|
||||
switch(cmd)
|
||||
{
|
||||
case 0x07:
|
||||
xprintf("IKBD: Set mouse button action");
|
||||
ikbd.expect = 1;
|
||||
break;
|
||||
|
||||
switch(cmd) {
|
||||
case 0x07:
|
||||
xprintf("IKBD: Set mouse button action");
|
||||
ikbd.expect = 1;
|
||||
break;
|
||||
case 0x08:
|
||||
xprintf("IKBD: Set relative mouse positioning");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_ABSOLUTE;
|
||||
break;
|
||||
|
||||
case 0x08:
|
||||
xprintf("IKBD: Set relative mouse positioning");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_ABSOLUTE;
|
||||
break;
|
||||
case 0x09:
|
||||
xprintf("IKBD: Set absolute mouse positioning");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
|
||||
ikbd.state |= IKBD_STATE_MOUSE_ABSOLUTE;
|
||||
ikbd.expect = 4;
|
||||
break;
|
||||
|
||||
case 0x09:
|
||||
xprintf("IKBD: Set absolute mouse positioning");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
|
||||
ikbd.state |= IKBD_STATE_MOUSE_ABSOLUTE;
|
||||
ikbd.expect = 4;
|
||||
break;
|
||||
case 0x0b:
|
||||
xprintf("IKBD: Set Mouse threshold");
|
||||
ikbd.expect = 2;
|
||||
break;
|
||||
|
||||
case 0x0b:
|
||||
xprintf("IKBD: Set Mouse threshold");
|
||||
ikbd.expect = 2;
|
||||
break;
|
||||
case 0x0f:
|
||||
xprintf("IKBD: Set Y at bottom");
|
||||
ikbd.state |= IKBD_STATE_MOUSE_Y_BOTTOM;
|
||||
break;
|
||||
|
||||
case 0x0f:
|
||||
xprintf("IKBD: Set Y at bottom");
|
||||
ikbd.state |= IKBD_STATE_MOUSE_Y_BOTTOM;
|
||||
break;
|
||||
case 0x10:
|
||||
xprintf("IKBD: Set Y at top");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_Y_BOTTOM;
|
||||
break;
|
||||
|
||||
case 0x10:
|
||||
xprintf("IKBD: Set Y at top");
|
||||
ikbd.state &= ~IKBD_STATE_MOUSE_Y_BOTTOM;
|
||||
break;
|
||||
case 0x12:
|
||||
xprintf("IKBD: Disable mouse");
|
||||
ikbd.state |= IKBD_STATE_MOUSE_DISABLED;
|
||||
break;
|
||||
|
||||
case 0x12:
|
||||
xprintf("IKBD: Disable mouse");
|
||||
ikbd.state |= IKBD_STATE_MOUSE_DISABLED;
|
||||
break;
|
||||
case 0x14:
|
||||
xprintf("IKBD: Set Joystick event reporting");
|
||||
ikbd.state |= IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
|
||||
case 0x14:
|
||||
xprintf("IKBD: Set Joystick event reporting");
|
||||
ikbd.state |= IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
case 0x15:
|
||||
xprintf("IKBD: Set Joystick interrogation mode");
|
||||
ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
|
||||
case 0x15:
|
||||
xprintf("IKBD: Set Joystick interrogation mode");
|
||||
ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
case 0x16: // interrogate joystick
|
||||
// send reply
|
||||
enqueue(0xfd);
|
||||
enqueue(joystick_map2ikbd(ikbd.joystick[0]));
|
||||
enqueue(joystick_map2ikbd(ikbd.joystick[1]));
|
||||
break;
|
||||
|
||||
case 0x16: // interrogate joystick
|
||||
// send reply
|
||||
enqueue(0xfd);
|
||||
enqueue(joystick_map2ikbd(ikbd.joystick[0]));
|
||||
enqueue(joystick_map2ikbd(ikbd.joystick[1]));
|
||||
break;
|
||||
case 0x1a:
|
||||
xprintf("IKBD: Disable joysticks");
|
||||
ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
|
||||
case 0x1a:
|
||||
xprintf("IKBD: Disable joysticks");
|
||||
ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
|
||||
break;
|
||||
case 0x1c:
|
||||
xprintf("IKBD: Interrogate time of day");
|
||||
|
||||
case 0x1c:
|
||||
xprintf("IKBD: Interrogate time of day");
|
||||
enqueue(0xfc);
|
||||
enqueue(0x13); // year bcd
|
||||
enqueue(0x03); // month bcd
|
||||
enqueue(0x07); // day bcd
|
||||
enqueue(0x20); // hour bcd
|
||||
enqueue(0x58); // minute bcd
|
||||
enqueue(0x00); // second bcd
|
||||
break;
|
||||
|
||||
enqueue(0xfc);
|
||||
enqueue(0x13); // year bcd
|
||||
enqueue(0x03); // month bcd
|
||||
enqueue(0x07); // day bcd
|
||||
enqueue(0x20); // hour bcd
|
||||
enqueue(0x58); // minute bcd
|
||||
enqueue(0x00); // second bcd
|
||||
break;
|
||||
|
||||
|
||||
case 0x80:
|
||||
xprintf("IKBD: Reset");
|
||||
ikbd.expect = 1;
|
||||
ikbd.state = IKBD_DEFAULT;
|
||||
break;
|
||||
case 0x80:
|
||||
xprintf("IKBD: Reset");
|
||||
ikbd.expect = 1;
|
||||
ikbd.state = IKBD_DEFAULT;
|
||||
break;
|
||||
|
||||
default:
|
||||
xprintf("IKBD: unknown command: %x\n", cmd);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
xprintf("IKBD: unknown command: %x\n", cmd);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void ikbd_poll(void) {
|
||||
static int mtimer = 0;
|
||||
if(CheckTimer(mtimer)) {
|
||||
mtimer = GetTimer(10);
|
||||
|
||||
// check for incoming ikbd data
|
||||
static int mtimer = 0;
|
||||
if (CheckTimer(mtimer))
|
||||
{
|
||||
mtimer = GetTimer(10);
|
||||
|
||||
// check for incoming ikbd data
|
||||
EnableIO();
|
||||
SPI(UIO_IKBD_IN);
|
||||
|
||||
while(SPI(0))
|
||||
ikbd_handle_input(SPI(0));
|
||||
|
||||
DisableIO();
|
||||
}
|
||||
|
||||
// send data from queue if present
|
||||
if(rptr == wptr) return;
|
||||
|
||||
// transmit data from queue
|
||||
EnableIO();
|
||||
SPI(UIO_IKBD_IN);
|
||||
|
||||
while(SPI(0))
|
||||
ikbd_handle_input(SPI(0));
|
||||
|
||||
SPI(UIO_IKBD_OUT);
|
||||
SPI(tx_queue[rptr]);
|
||||
DisableIO();
|
||||
}
|
||||
|
||||
// send data from queue if present
|
||||
if(rptr == wptr) return;
|
||||
|
||||
// transmit data from queue
|
||||
EnableIO();
|
||||
SPI(UIO_IKBD_OUT);
|
||||
SPI(tx_queue[rptr]);
|
||||
DisableIO();
|
||||
|
||||
rptr = (rptr+1)&(QUEUE_LEN-1);
|
||||
rptr = (rptr + 1) & (QUEUE_LEN - 1);
|
||||
}
|
||||
|
||||
void ikbd_joystick(unsigned char joystick, unsigned char map) {
|
||||
// todo: suppress events for joystick 0 as long as mouse
|
||||
// is enabled?
|
||||
|
||||
if(ikbd.state & IKBD_STATE_JOYSTICK_EVENT_REPORTING) {
|
||||
void ikbd_joystick(unsigned char joystick, unsigned char map)
|
||||
{
|
||||
// todo: suppress events for joystick 0 as long as mouse
|
||||
// is enabled?
|
||||
|
||||
if (ikbd.state & IKBD_STATE_JOYSTICK_EVENT_REPORTING)
|
||||
{
|
||||
#ifdef IKBD_DEBUG
|
||||
xprintf("IKBD: joy %d %x\n", joystick, map);
|
||||
xprintf("IKBD: joy %d %x\n", joystick, map);
|
||||
#endif
|
||||
|
||||
// only report joystick data for joystick 0 if the mouse is disabled
|
||||
if((ikbd.state & IKBD_STATE_MOUSE_DISABLED) || (joystick == 1)) {
|
||||
enqueue(0xfe + joystick);
|
||||
enqueue(joystick_map2ikbd(map));
|
||||
// only report joystick data for joystick 0 if the mouse is disabled
|
||||
if ((ikbd.state & IKBD_STATE_MOUSE_DISABLED) || (joystick == 1))
|
||||
{
|
||||
enqueue(0xfe + joystick);
|
||||
enqueue(joystick_map2ikbd(map));
|
||||
}
|
||||
|
||||
if (!(ikbd.state & IKBD_STATE_MOUSE_DISABLED))
|
||||
{
|
||||
// the fire button also generates a mouse event if
|
||||
// mouse reporting is enabled
|
||||
if ((map & JOY_BTN1) != (ikbd.joystick[joystick] & JOY_BTN1))
|
||||
{
|
||||
// generate mouse event (ikbd_joystick_buttons is evaluated inside
|
||||
// user_io_mouse)
|
||||
ikbd.joystick[joystick] = map;
|
||||
ikbd_mouse(0, 0, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(!(ikbd.state & IKBD_STATE_MOUSE_DISABLED)) {
|
||||
// the fire button also generates a mouse event if
|
||||
// mouse reporting is enabled
|
||||
if((map & JOY_BTN1) != (ikbd.joystick[joystick] & JOY_BTN1)) {
|
||||
// generate mouse event (ikbd_joystick_buttons is evaluated inside
|
||||
// user_io_mouse)
|
||||
ikbd.joystick[joystick] = map;
|
||||
ikbd_mouse(0, 0, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
#ifdef IKBD_DEBUG
|
||||
else
|
||||
xprintf("IKBD: no monitor, drop joy %d %x\n", joystick, map);
|
||||
else
|
||||
xprintf("IKBD: no monitor, drop joy %d %x\n", joystick, map);
|
||||
#endif
|
||||
|
||||
// save state of joystick for interrogation mode
|
||||
ikbd.joystick[joystick] = map;
|
||||
|
||||
// save state of joystick for interrogation mode
|
||||
ikbd.joystick[joystick] = map;
|
||||
}
|
||||
|
||||
void ikbd_keyboard(unsigned char code) {
|
||||
void ikbd_keyboard(unsigned char code)
|
||||
{
|
||||
#ifdef IKBD_DEBUG
|
||||
xprintf("IKBD: send keycode %x%s\n", code&0x7f, (code&0x80)?" BREAK":"");
|
||||
xprintf("IKBD: send keycode %x%s\n", code&0x7f, (code&0x80)?" BREAK":"");
|
||||
#endif
|
||||
enqueue(code);
|
||||
enqueue(code);
|
||||
}
|
||||
|
||||
void ikbd_mouse(uint8_t b, int8_t x, int8_t y) {
|
||||
if(ikbd.state & IKBD_STATE_MOUSE_DISABLED)
|
||||
return;
|
||||
void ikbd_mouse(uint8_t b, int8_t x, int8_t y)
|
||||
{
|
||||
if (ikbd.state & IKBD_STATE_MOUSE_DISABLED)
|
||||
return;
|
||||
|
||||
// joystick and mouse buttons are wired together in
|
||||
// atari st
|
||||
b |= (ikbd.joystick[0] & JOY_BTN1)?1:0;
|
||||
b |= (ikbd.joystick[1] & JOY_BTN1)?2:0;
|
||||
|
||||
static unsigned char b_old = 0;
|
||||
// monitor state of two mouse buttons
|
||||
if(b != b_old) {
|
||||
// check if mouse buttons are supposed to be treated like keys
|
||||
if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY) {
|
||||
// Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
|
||||
|
||||
// handle left mouse button
|
||||
if((b ^ b_old) & 1) ikbd_keyboard(0x74 | ((b&1)?0x00:0x80));
|
||||
// handle right mouse button
|
||||
if((b ^ b_old) & 2) ikbd_keyboard(0x75 | ((b&2)?0x00:0x80));
|
||||
// joystick and mouse buttons are wired together in
|
||||
// atari st
|
||||
b |= (ikbd.joystick[0] & JOY_BTN1)?1:0;
|
||||
b |= (ikbd.joystick[1] & JOY_BTN1)?2:0;
|
||||
|
||||
static unsigned char b_old = 0;
|
||||
// monitor state of two mouse buttons
|
||||
if (b != b_old)
|
||||
{
|
||||
// check if mouse buttons are supposed to be treated like keys
|
||||
if (ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY)
|
||||
{
|
||||
// Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
|
||||
|
||||
// handle left mouse button
|
||||
if((b ^ b_old) & 1) ikbd_keyboard(0x74 | ((b&1)?0x00:0x80));
|
||||
// handle right mouse button
|
||||
if((b ^ b_old) & 2) ikbd_keyboard(0x75 | ((b&2)?0x00:0x80));
|
||||
}
|
||||
b_old = b;
|
||||
}
|
||||
b_old = b;
|
||||
}
|
||||
|
||||
|
||||
#if 0
|
||||
if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY) {
|
||||
b = 0;
|
||||
// if mouse position is 0/0 quit here
|
||||
if(!x && !y) return;
|
||||
}
|
||||
if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY)
|
||||
{
|
||||
b = 0;
|
||||
// if mouse position is 0/0 quit here
|
||||
if(!x && !y) return;
|
||||
}
|
||||
#endif
|
||||
|
||||
if(ikbd.state & IKBD_STATE_MOUSE_ABSOLUTE) {
|
||||
} else {
|
||||
// atari has mouse button bits swapped
|
||||
enqueue(0xf8|((b&1)?2:0)|((b&2)?1:0));
|
||||
enqueue(x);
|
||||
enqueue((ikbd.state & IKBD_STATE_MOUSE_Y_BOTTOM)?-y:y);
|
||||
}
|
||||
if (ikbd.state & IKBD_STATE_MOUSE_ABSOLUTE)
|
||||
{
|
||||
}
|
||||
else
|
||||
{
|
||||
// atari has mouse button bits swapped
|
||||
enqueue(0xf8|((b&1)?2:0)|((b&2)?1:0));
|
||||
enqueue(x);
|
||||
enqueue((ikbd.state & IKBD_STATE_MOUSE_Y_BOTTOM)?-y:y);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
45
mcf5474.gdb
45
mcf5474.gdb
@@ -5,7 +5,7 @@
|
||||
define addresses
|
||||
set $vbr = 0x00000000
|
||||
#monitor bdm-ctl-set 0x0801 0x00000000
|
||||
|
||||
|
||||
set $mbar = 0xFF000000
|
||||
#monitor bdm-ctl-set 0x0C0F 0xFF000000
|
||||
|
||||
@@ -22,30 +22,30 @@ end
|
||||
|
||||
define setup-dram
|
||||
# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
|
||||
set *((long *) 0xFF000500) = 0xE0000000
|
||||
set *((long *) 0xFF000508) = 0x00041180
|
||||
set *((long *) 0xFF000504) = 0x007F0001
|
||||
set *((long *) 0xFF000500) = 0xE0000000
|
||||
set *((long *) 0xFF000508) = 0x00041180
|
||||
set *((long *) 0xFF000504) = 0x007F0001
|
||||
|
||||
# set *((long *) 0xFF00050C) = 0xFFF00000 # ATARI I/O address
|
||||
|
||||
# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
|
||||
set *((long *) 0xFF000004) = 0x000002AA
|
||||
set *((long *) 0xFF000020) = 0x0000001A
|
||||
set *((long *) 0xFF000024) = 0x0800001A
|
||||
set *((long *) 0xFF000028) = 0x1000001A
|
||||
set *((long *) 0xFF00002C) = 0x1800001A
|
||||
set *((long *) 0xFF000108) = 0x73622830
|
||||
set *((long *) 0xFF00010C) = 0x46770000
|
||||
set *((long *) 0xFF000004) = 0x000002AA
|
||||
set *((long *) 0xFF000020) = 0x0000001A
|
||||
set *((long *) 0xFF000024) = 0x0800001A
|
||||
set *((long *) 0xFF000028) = 0x1000001A
|
||||
set *((long *) 0xFF00002C) = 0x1800001A
|
||||
set *((long *) 0xFF000108) = 0x73622830
|
||||
set *((long *) 0xFF00010C) = 0x46770000
|
||||
|
||||
|
||||
set *((long *) 0xFF000104) = 0xE10D0002
|
||||
set *((long *) 0xFF000100) = 0x40010000
|
||||
set *((long *) 0xFF000100) = 0x048D0000
|
||||
set *((long *) 0xFF000104) = 0xE10D0002
|
||||
set *((long *) 0xFF000104) = 0xE10D0004
|
||||
set *((long *) 0xFF000104) = 0xE10D0004
|
||||
set *((long *) 0xFF000100) = 0x008D0000
|
||||
set *((long *) 0xFF000104) = 0x710D0F00
|
||||
set *((long *) 0xFF000104) = 0xE10D0002
|
||||
set *((long *) 0xFF000100) = 0x40010000
|
||||
set *((long *) 0xFF000100) = 0x048D0000
|
||||
set *((long *) 0xFF000104) = 0xE10D0002
|
||||
set *((long *) 0xFF000104) = 0xE10D0004
|
||||
set *((long *) 0xFF000104) = 0xE10D0004
|
||||
set *((long *) 0xFF000100) = 0x008D0000
|
||||
set *((long *) 0xFF000104) = 0x710D0F00
|
||||
end
|
||||
|
||||
define cu
|
||||
@@ -61,6 +61,11 @@ define ib
|
||||
setup-dram
|
||||
end
|
||||
|
||||
define run
|
||||
continue
|
||||
end
|
||||
|
||||
tr
|
||||
ib
|
||||
load
|
||||
#add-symbol-file ../emutos/emutos2.img 0xe00000
|
||||
#load firebee/ram.elf
|
||||
|
||||
8
memory_map.txt
Normal file
8
memory_map.txt
Normal file
@@ -0,0 +1,8 @@
|
||||
Firebee memory map
|
||||
==================
|
||||
|
||||
Virt. Start Virt. End Phys. Start Phys. End
|
||||
ST-RAM 0x00000000 0x00dfffff 0x60000000 0x60dfffff
|
||||
TOS 0x00e00000 0x00efffff 0x00e00000 0x00efffff
|
||||
ST I/O area 0x00f00000 0x01000000 0xfff00000 0xffffffff
|
||||
TT-RAM 0x01000000 0x20ffffff 0x00000000 0x1fffffff
|
||||
130
net/am79c874.c
130
net/am79c874.c
@@ -13,8 +13,10 @@
|
||||
#include "firebee.h"
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
#error "unknown machine"
|
||||
#error "unknown machine!"
|
||||
#endif
|
||||
|
||||
//#define DBG_AM79
|
||||
@@ -24,13 +26,13 @@
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_AM79 */
|
||||
|
||||
/********************************************************************/
|
||||
|
||||
/* Initialize the AM79C874 PHY
|
||||
*
|
||||
* This function sets up the Auto-Negotiate Advertisement register
|
||||
* within the PHY and then forces the PHY to auto-negotiate for
|
||||
* it's settings.
|
||||
*
|
||||
*
|
||||
* Params:
|
||||
* fec_ch FEC channel
|
||||
* phy_addr Address of the PHY.
|
||||
@@ -43,76 +45,80 @@
|
||||
*/
|
||||
int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex)
|
||||
{
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
if (speed); /* to do */
|
||||
if (duplex); /* to do */
|
||||
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
dbg("%s: PHY reset\r\n", __FUNCTION__);
|
||||
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_RESET))
|
||||
return 0;
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
if (speed); /* to do */
|
||||
if (duplex); /* to do */
|
||||
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_CR, &settings);
|
||||
if (!(settings & MII_AM79C874_CR_RESET))
|
||||
break;
|
||||
}
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: PHY reset failed\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
};
|
||||
dbg("%s: PHY reset OK\r\n", __FUNCTION__);
|
||||
dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
dbg("%s: PHY reset\r\n", __FUNCTION__);
|
||||
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_AUTON | MII_AM79C874_CR_RST_NEG))
|
||||
return 0;
|
||||
|
||||
dbg("%s:PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_RESET))
|
||||
return 0;
|
||||
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
settings = 0;
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_SR, &settings);
|
||||
if ((settings & AUTONEGLINK) == AUTONEGLINK)
|
||||
break;
|
||||
}
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_CR, &settings);
|
||||
if (!(settings & MII_AM79C874_CR_RESET))
|
||||
break;
|
||||
}
|
||||
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: PHY Set the default mode\r\n", __FUNCTION__);
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: PHY reset failed\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
};
|
||||
dbg("%s: PHY reset OK\r\n", __FUNCTION__);
|
||||
dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
|
||||
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX))
|
||||
return 0;
|
||||
}
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_AUTON | MII_AM79C874_CR_RST_NEG))
|
||||
return 0;
|
||||
|
||||
dbg("%s:PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
|
||||
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
settings = 0;
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_SR, &settings);
|
||||
if ((settings & AUTONEGLINK) == AUTONEGLINK)
|
||||
break;
|
||||
}
|
||||
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: Auto-negotiation failed (timeout). Set default mode (100Mbps, full duplex)\r\n", __FUNCTION__);
|
||||
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX))
|
||||
{
|
||||
dbg("%s: forced setting 100Mbps/full failed.\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DBG_AM79
|
||||
settings = 0;
|
||||
settings = 0;
|
||||
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_DR, &settings);
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_DR, &settings);
|
||||
|
||||
dbg("%s: PHY Mode:\r\n", __FUNCTION__);
|
||||
if (settings & MII_AM79C874_DR_DATA_RATE)
|
||||
dbg("%s: 100Mbps", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: 10Mbps ", __FUNCTION__);
|
||||
dbg("%s: PHY Mode:\r\n", __FUNCTION__);
|
||||
if (settings & MII_AM79C874_DR_DATA_RATE)
|
||||
dbg("%s: 100Mbps", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: 10Mbps ", __FUNCTION__);
|
||||
|
||||
if (settings & MII_AM79C874_DR_DPLX)
|
||||
dbg("%s: Full-duplex\r\n", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: Half-duplex\r\n", __FUNCTION__);
|
||||
if (settings & MII_AM79C874_DR_DPLX)
|
||||
dbg("%s: Full-duplex\r\n", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: Half-duplex\r\n", __FUNCTION__);
|
||||
|
||||
dbg("%s:PHY auto-negotiation complete\r\n", __FUNCTION__);
|
||||
dbg("%s:PHY auto-negotiation complete\r\n", __FUNCTION__);
|
||||
#endif /* DBG_AM79 */
|
||||
|
||||
return 1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
778
net/arp.c
778
net/arp.c
@@ -11,9 +11,9 @@
|
||||
#include <stdbool.h>
|
||||
#include <stddef.h>
|
||||
|
||||
#define DBG_ARP
|
||||
//#define DBG_ARP
|
||||
#ifdef DBG_ARP
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_ARP */
|
||||
@@ -22,459 +22,469 @@
|
||||
|
||||
static uint8_t *arp_find_pair(ARP_INFO *arptab, uint16_t protocol, uint8_t *hwa, uint8_t *pa)
|
||||
{
|
||||
/*
|
||||
* This function searches through the ARP table for the
|
||||
* specified <protocol,hwa> or <protocol,pa> address pair.
|
||||
* If it is found, then a a pointer to the non-specified
|
||||
* address is returned. Otherwise NULL is returned.
|
||||
* If you pass in <protocol,pa> then you get <hwa> out.
|
||||
* If you pass in <protocol,hwa> then you get <pa> out.
|
||||
*/
|
||||
int slot, i, match = false;
|
||||
uint8_t *rvalue;
|
||||
/*
|
||||
* This function searches through the ARP table for the
|
||||
* specified <protocol,hwa> or <protocol,pa> address pair.
|
||||
* If it is found, then a a pointer to the non-specified
|
||||
* address is returned. Otherwise NULL is returned.
|
||||
* If you pass in <protocol,pa> then you get <hwa> out.
|
||||
* If you pass in <protocol,hwa> then you get <pa> out.
|
||||
*/
|
||||
int slot, i, match = false;
|
||||
uint8_t *rvalue;
|
||||
|
||||
if (((hwa == 0) && (pa == 0)) || (arptab == 0))
|
||||
return NULL;
|
||||
if (((hwa == 0) && (pa == 0)) || (arptab == 0))
|
||||
return NULL;
|
||||
|
||||
rvalue = NULL;
|
||||
rvalue = NULL;
|
||||
|
||||
/*
|
||||
* Check each protocol address for a match
|
||||
*/
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
|
||||
(arptab->table[slot].protocol == protocol))
|
||||
{
|
||||
match = true;
|
||||
if (hwa != 0)
|
||||
{
|
||||
/*
|
||||
* Check the Hardware Address field
|
||||
*/
|
||||
rvalue = &arptab->table[slot].pa[0];
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].hwa[i] != hwa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/*
|
||||
* Check the Protocol Address field
|
||||
*/
|
||||
rvalue = &arptab->table[slot].hwa[0];
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].pa[i] != pa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (match)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Check each protocol address for a match
|
||||
*/
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
|
||||
(arptab->table[slot].protocol == protocol))
|
||||
{
|
||||
match = true;
|
||||
if (hwa != 0)
|
||||
{
|
||||
/*
|
||||
* Check the Hardware Address field
|
||||
*/
|
||||
rvalue = &arptab->table[slot].pa[0];
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].hwa[i] != hwa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/*
|
||||
* Check the Protocol Address field
|
||||
*/
|
||||
rvalue = &arptab->table[slot].hwa[0];
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].pa[i] != pa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (match)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (match)
|
||||
return rvalue;
|
||||
else
|
||||
return NULL;
|
||||
if (match)
|
||||
return rvalue;
|
||||
else
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void arp_merge(ARP_INFO *arptab, uint16_t protocol, int hwa_size, uint8_t *hwa,
|
||||
int pa_size, uint8_t *pa, int longevity)
|
||||
int pa_size, uint8_t *pa, int longevity)
|
||||
{
|
||||
/*
|
||||
* This function merges an entry into the ARP table. If
|
||||
* either piece is NULL, the function exits, otherwise
|
||||
* the entry is merged or added, provided there is space.
|
||||
*/
|
||||
int i, slot;
|
||||
uint8_t *ta;
|
||||
/*
|
||||
* This function merges an entry into the ARP table. If
|
||||
* either piece is NULL, the function exits, otherwise
|
||||
* the entry is merged or added, provided there is space.
|
||||
*/
|
||||
int i, slot;
|
||||
uint8_t *ta;
|
||||
|
||||
if ((hwa == NULL) || (pa == NULL) || (arptab == NULL) ||
|
||||
((longevity != ARP_ENTRY_TEMP) &&
|
||||
(longevity != ARP_ENTRY_PERM)))
|
||||
{
|
||||
return;
|
||||
}
|
||||
if ((hwa == NULL) || (pa == NULL) || (arptab == NULL) ||
|
||||
((longevity != ARP_ENTRY_TEMP) &&
|
||||
(longevity != ARP_ENTRY_PERM)))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/* First search ARP table for existing entry */
|
||||
if ((ta = arp_find_pair(arptab,protocol,NULL,pa)) != 0)
|
||||
{
|
||||
/* Update hardware address */
|
||||
for (i = 0; i < hwa_size; i++)
|
||||
ta[i] = hwa[i];
|
||||
return;
|
||||
}
|
||||
/* First search ARP table for existing entry */
|
||||
if ((ta = arp_find_pair(arptab,protocol,NULL,pa)) != 0)
|
||||
{
|
||||
/* Update hardware address */
|
||||
for (i = 0; i < hwa_size; i++)
|
||||
ta[i] = hwa[i];
|
||||
return;
|
||||
}
|
||||
|
||||
/* Next try to find an empty slot */
|
||||
slot = -1;
|
||||
for (i = 0; i < MAX_ARP_ENTRY; i++)
|
||||
{
|
||||
if (arptab->table[i].longevity == ARP_ENTRY_EMPTY)
|
||||
{
|
||||
slot = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* Next try to find an empty slot */
|
||||
slot = -1;
|
||||
for (i = 0; i < MAX_ARP_ENTRY; i++)
|
||||
{
|
||||
if (arptab->table[i].longevity == ARP_ENTRY_EMPTY)
|
||||
{
|
||||
slot = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* if no empty slot was found, pick a temp slot */
|
||||
if (slot == -1)
|
||||
{
|
||||
for (i = 0; i < MAX_ARP_ENTRY; i++)
|
||||
{
|
||||
if (arptab->table[i].longevity == ARP_ENTRY_TEMP)
|
||||
{
|
||||
slot = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
/* if no empty slot was found, pick a temp slot */
|
||||
if (slot == -1)
|
||||
{
|
||||
for (i = 0; i < MAX_ARP_ENTRY; i++)
|
||||
{
|
||||
if (arptab->table[i].longevity == ARP_ENTRY_TEMP)
|
||||
{
|
||||
slot = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* if after all this, still no slot found, add in last slot */
|
||||
if (slot == -1)
|
||||
slot = (MAX_ARP_ENTRY - 1);
|
||||
/* if after all this, still no slot found, add in last slot */
|
||||
if (slot == -1)
|
||||
slot = (MAX_ARP_ENTRY - 1);
|
||||
|
||||
/* add the entry into the slot */
|
||||
arptab->table[slot].protocol = protocol;
|
||||
/* add the entry into the slot */
|
||||
arptab->table[slot].protocol = protocol;
|
||||
|
||||
arptab->table[slot].hwa_size = (uint8_t) hwa_size;
|
||||
for (i = 0; i < hwa_size; i++)
|
||||
arptab->table[slot].hwa[i] = hwa[i];
|
||||
arptab->table[slot].hwa_size = (uint8_t) hwa_size;
|
||||
for (i = 0; i < hwa_size; i++)
|
||||
arptab->table[slot].hwa[i] = hwa[i];
|
||||
|
||||
arptab->table[slot].pa_size = (uint8_t) pa_size;
|
||||
for (i = 0; i < pa_size; i++)
|
||||
arptab->table[slot].pa[i] = pa[i];
|
||||
arptab->table[slot].pa_size = (uint8_t) pa_size;
|
||||
for (i = 0; i < pa_size; i++)
|
||||
arptab->table[slot].pa[i] = pa[i];
|
||||
|
||||
arptab->table[slot].longevity = longevity;
|
||||
arptab->table[slot].longevity = longevity;
|
||||
}
|
||||
|
||||
|
||||
void arp_remove(ARP_INFO *arptab, uint16_t protocol, uint8_t *hwa, uint8_t *pa)
|
||||
{
|
||||
/*
|
||||
* This function removes an entry from the ARP table. The
|
||||
* ARP table is searched according to the non-NULL address
|
||||
* that is provided.
|
||||
*/
|
||||
int slot, i, match;
|
||||
/*
|
||||
* This function removes an entry from the ARP table. The
|
||||
* ARP table is searched according to the non-NULL address
|
||||
* that is provided.
|
||||
*/
|
||||
int slot, i, match;
|
||||
|
||||
if (((hwa == 0) && (pa == 0)) || (arptab == 0))
|
||||
return;
|
||||
if (((hwa == 0) && (pa == 0)) || (arptab == 0))
|
||||
return;
|
||||
|
||||
/* check each hardware adress for a match */
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
|
||||
(arptab->table[slot].protocol == protocol))
|
||||
{
|
||||
match = true;
|
||||
if (hwa != 0)
|
||||
{
|
||||
/* Check Hardware Address field */
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].hwa[i] != hwa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check Protocol Address field */
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].pa[i] != pa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (match)
|
||||
{
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
arptab->table[slot].hwa[i] = 0;
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
arptab->table[slot].pa[i] = 0;
|
||||
arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
/* check each hardware adress for a match */
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
|
||||
(arptab->table[slot].protocol == protocol))
|
||||
{
|
||||
match = true;
|
||||
if (hwa != 0)
|
||||
{
|
||||
/* Check Hardware Address field */
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].hwa[i] != hwa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check Protocol Address field */
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].pa[i] != pa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (match)
|
||||
{
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
arptab->table[slot].hwa[i] = 0;
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
arptab->table[slot].pa[i] = 0;
|
||||
arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void arp_request(NIF *nif, uint8_t *pa)
|
||||
{
|
||||
/*
|
||||
* This function broadcasts an ARP request for the protocol
|
||||
* address "pa"
|
||||
*/
|
||||
uint8_t *addr;
|
||||
NBUF *pNbuf;
|
||||
arp_frame_hdr *arpframe;
|
||||
int i, result;
|
||||
/*
|
||||
* This function broadcasts an ARP request for the protocol
|
||||
* address "pa"
|
||||
*/
|
||||
uint8_t *addr;
|
||||
NBUF *pNbuf;
|
||||
arp_frame_hdr *arpframe;
|
||||
int i, result;
|
||||
|
||||
pNbuf = nbuf_alloc();
|
||||
if (pNbuf == NULL)
|
||||
{
|
||||
dbg("could not allocate Tx buffer\n");
|
||||
return;
|
||||
}
|
||||
|
||||
dbg("%s\r\n", __FUNCTION__);
|
||||
arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];
|
||||
|
||||
pNbuf = nbuf_alloc();
|
||||
if (pNbuf == NULL)
|
||||
{
|
||||
dbg("%s: arp_request couldn't allocate Tx buffer\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
/* Build the ARP request packet */
|
||||
arpframe->ar_hrd = ETHERNET;
|
||||
arpframe->ar_pro = ETH_FRM_IP;
|
||||
arpframe->ar_hln = 6;
|
||||
arpframe->ar_pln = 4;
|
||||
arpframe->opcode = ARP_REQUEST;
|
||||
|
||||
arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];
|
||||
addr = &nif->hwa[0];
|
||||
for (i = 0; i < 6; i++)
|
||||
arpframe->ar_sha[i] = addr[i];
|
||||
|
||||
/* Build the ARP request packet */
|
||||
arpframe->ar_hrd = ETHERNET;
|
||||
arpframe->ar_pro = ETH_FRM_IP;
|
||||
arpframe->ar_hln = 6;
|
||||
arpframe->ar_pln = 4;
|
||||
arpframe->opcode = ARP_REQUEST;
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
for (i = 0; i < 4; i++)
|
||||
arpframe->ar_spa[i] = addr[i];
|
||||
|
||||
addr = &nif->hwa[0];
|
||||
for (i = 0; i < 6; i++)
|
||||
arpframe->ar_sha[i] = addr[i];
|
||||
for (i = 0; i < 6; i++)
|
||||
arpframe->ar_tha[i] = 0x00;
|
||||
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
for (i = 0; i < 4; i++)
|
||||
arpframe->ar_spa[i] = addr[i];
|
||||
for (i = 0; i < 4; i++)
|
||||
arpframe->ar_tpa[i] = pa[i];
|
||||
|
||||
for (i = 0; i < 6; i++)
|
||||
arpframe->ar_tha[i] = 0x00;
|
||||
pNbuf->length = ARP_HDR_LEN;
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
arpframe->ar_tpa[i] = pa[i];
|
||||
/* Send the ARP request */
|
||||
dbg("sending ARP request\r\n");
|
||||
result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf);
|
||||
|
||||
pNbuf->length = ARP_HDR_LEN;
|
||||
|
||||
/* Send the ARP request */
|
||||
dbg("%s: sending ARP request\r\n", __FUNCTION__);
|
||||
result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf);
|
||||
|
||||
if (result == 0)
|
||||
nbuf_free(pNbuf);
|
||||
if (result == 0)
|
||||
nbuf_free(pNbuf);
|
||||
}
|
||||
|
||||
static int arp_resolve_pa(NIF *nif, uint16_t protocol, uint8_t *pa, uint8_t **ha)
|
||||
{
|
||||
/*
|
||||
* This function accepts a pointer to a protocol address and
|
||||
* searches the ARP table for a hardware address match. If no
|
||||
* no match found, false is returned.
|
||||
*/
|
||||
ARP_INFO *arptab;
|
||||
/*
|
||||
* This function accepts a pointer to a protocol address and
|
||||
* searches the ARP table for a hardware address match. If no
|
||||
* no match found, false is returned.
|
||||
*/
|
||||
ARP_INFO *arptab;
|
||||
|
||||
if ((pa == NULL) || (nif == NULL) || (protocol == 0))
|
||||
return 0;
|
||||
if ((pa == NULL) || (nif == NULL) || (protocol == 0))
|
||||
return 0;
|
||||
|
||||
arptab = nif_get_protocol_info (nif,ETH_FRM_ARP);
|
||||
*ha = arp_find_pair(arptab,protocol,0,pa);
|
||||
arptab = nif_get_protocol_info (nif,ETH_FRM_ARP);
|
||||
*ha = arp_find_pair(arptab,protocol,0,pa);
|
||||
|
||||
if (*ha == NULL)
|
||||
return 0;
|
||||
else
|
||||
return 1;
|
||||
if (*ha == NULL)
|
||||
return 0;
|
||||
else
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint8_t *arp_resolve(NIF *nif, uint16_t protocol, uint8_t *pa)
|
||||
{
|
||||
int i;
|
||||
uint8_t *hwa;
|
||||
int i;
|
||||
uint8_t *hwa;
|
||||
|
||||
/*
|
||||
* Check to see if the necessary MAC-to-IP translation information
|
||||
* is in table already
|
||||
*/
|
||||
if (arp_resolve_pa(nif, protocol, pa, &hwa))
|
||||
return hwa;
|
||||
/*
|
||||
* Check to see if the necessary MAC-to-IP translation information
|
||||
* is in table already
|
||||
*/
|
||||
if (arp_resolve_pa(nif, protocol, pa, &hwa))
|
||||
return hwa;
|
||||
|
||||
/*
|
||||
* Ok, it's not, so we need to try to obtain it by broadcasting
|
||||
* an ARP request. Hopefully the desired host is listening and
|
||||
* will respond with it's MAC address
|
||||
*/
|
||||
for (i = 0; i < 3; i++)
|
||||
{
|
||||
arp_request(nif, pa);
|
||||
/*
|
||||
* Ok, it's not, so we need to try to obtain it by broadcasting
|
||||
* an ARP request. Hopefully the desired host is listening and
|
||||
* will respond with it's MAC address
|
||||
*/
|
||||
for (i = 0; i < 3; i++)
|
||||
{
|
||||
arp_request(nif, pa);
|
||||
|
||||
timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT);
|
||||
while (timer_get_reference(TIMER_NETWORK))
|
||||
{
|
||||
dbg("%s: try to resolve %d.%d.%d.%d\r\n", __FUNCTION__,
|
||||
pa[0], pa[1], pa[2], pa[3], pa[4]);
|
||||
if (arp_resolve_pa(nif, protocol, pa, &hwa))
|
||||
{
|
||||
dbg("%s: resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n", __FUNCTION__,
|
||||
hwa[0], hwa[1], hwa[2], hwa[3], hwa[4], hwa[5], hwa[6]);
|
||||
|
||||
return hwa;
|
||||
}
|
||||
}
|
||||
}
|
||||
timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT);
|
||||
while (timer_get_reference(TIMER_NETWORK))
|
||||
{
|
||||
dbg("try to resolve %d.%d.%d.%d\r\n",
|
||||
pa[0], pa[1], pa[2], pa[3], pa[4]);
|
||||
if (arp_resolve_pa(nif, protocol, pa, &hwa))
|
||||
{
|
||||
dbg("resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n",
|
||||
hwa[0], hwa[1], hwa[2], hwa[3], hwa[4], hwa[5], hwa[6]);
|
||||
|
||||
return NULL;
|
||||
return hwa;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void arp_init(ARP_INFO *arptab)
|
||||
{
|
||||
int slot, i;
|
||||
int slot, i;
|
||||
|
||||
arptab->tab_size = MAX_ARP_ENTRY;
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
for (i = 0; i < MAX_HWA_SIZE; i++)
|
||||
arptab->table[slot].hwa[i] = 0;
|
||||
for (i = 0; i < MAX_PA_SIZE; i++)
|
||||
arptab->table[slot].pa[i] = 0;
|
||||
arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
|
||||
arptab->table[slot].hwa_size = 0;
|
||||
arptab->table[slot].pa_size = 0;
|
||||
}
|
||||
arptab->tab_size = MAX_ARP_ENTRY;
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
for (i = 0; i < MAX_HWA_SIZE; i++)
|
||||
arptab->table[slot].hwa[i] = 0;
|
||||
for (i = 0; i < MAX_PA_SIZE; i++)
|
||||
arptab->table[slot].pa[i] = 0;
|
||||
arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
|
||||
arptab->table[slot].hwa_size = 0;
|
||||
arptab->table[slot].pa_size = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void arp_handler(NIF *nif, NBUF *pNbuf)
|
||||
{
|
||||
/*
|
||||
* ARP protocol handler
|
||||
*/
|
||||
uint8_t *addr;
|
||||
ARP_INFO *arptab;
|
||||
int longevity;
|
||||
arp_frame_hdr *rx_arpframe, *tx_arpframe;
|
||||
/*
|
||||
* ARP protocol handler
|
||||
*/
|
||||
uint8_t *addr;
|
||||
ARP_INFO *arptab;
|
||||
int longevity;
|
||||
arp_frame_hdr *rx_arpframe, *tx_arpframe;
|
||||
|
||||
arptab = nif_get_protocol_info(nif, ETH_FRM_ARP);
|
||||
rx_arpframe = (arp_frame_hdr *) &pNbuf->data[pNbuf->offset];
|
||||
arptab = nif_get_protocol_info(nif, ETH_FRM_ARP);
|
||||
rx_arpframe = (arp_frame_hdr *) &pNbuf->data[pNbuf->offset];
|
||||
|
||||
/*
|
||||
* Check for an appropriate ARP packet
|
||||
*/
|
||||
if ((pNbuf->length < ARP_HDR_LEN) ||
|
||||
(rx_arpframe->ar_hrd != ETHERNET) ||
|
||||
(rx_arpframe->ar_hln != 6) ||
|
||||
(rx_arpframe->ar_pro != ETH_FRM_IP) ||
|
||||
(rx_arpframe->ar_pln != 4))
|
||||
{
|
||||
nbuf_free(pNbuf);
|
||||
return;
|
||||
}
|
||||
/*
|
||||
* Check for an appropriate ARP packet
|
||||
*/
|
||||
if ((pNbuf->length < ARP_HDR_LEN) ||
|
||||
(rx_arpframe->ar_hrd != ETHERNET) ||
|
||||
(rx_arpframe->ar_hln != 6) ||
|
||||
(rx_arpframe->ar_pro != ETH_FRM_IP) ||
|
||||
(rx_arpframe->ar_pln != 4))
|
||||
{
|
||||
dbg("received packet is not an ARP packet, discard it\r\n");
|
||||
nbuf_free(pNbuf);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Check to see if it was addressed to me - if it was, keep this
|
||||
* ARP entry in the table permanently; if not, mark it so that it
|
||||
* can be displaced later if necessary
|
||||
*/
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
|
||||
(rx_arpframe->ar_tpa[1] == addr[1]) &&
|
||||
(rx_arpframe->ar_tpa[2] == addr[2]) &&
|
||||
(rx_arpframe->ar_tpa[3] == addr[3]) )
|
||||
{
|
||||
longevity = ARP_ENTRY_PERM;
|
||||
}
|
||||
else
|
||||
longevity = ARP_ENTRY_TEMP;
|
||||
/*
|
||||
* Check to see if it was addressed to me - if it was, keep this
|
||||
* ARP entry in the table permanently; if not, mark it so that it
|
||||
* can be displaced later if necessary
|
||||
*/
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
|
||||
(rx_arpframe->ar_tpa[1] == addr[1]) &&
|
||||
(rx_arpframe->ar_tpa[2] == addr[2]) &&
|
||||
(rx_arpframe->ar_tpa[3] == addr[3]) )
|
||||
{
|
||||
dbg("received ARP packet is a permanent one, store it\r\n");
|
||||
longevity = ARP_ENTRY_PERM;
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("received ARP packet was not addressed to us, keep only temporarily\r\n");
|
||||
longevity = ARP_ENTRY_TEMP;
|
||||
}
|
||||
|
||||
/*
|
||||
* Add ARP info into the table
|
||||
*/
|
||||
arp_merge(arptab,
|
||||
rx_arpframe->ar_pro,
|
||||
rx_arpframe->ar_hln,
|
||||
&rx_arpframe->ar_sha[0],
|
||||
rx_arpframe->ar_pln,
|
||||
&rx_arpframe->ar_spa[0],
|
||||
longevity
|
||||
);
|
||||
/*
|
||||
* Add ARP info into the table
|
||||
*/
|
||||
arp_merge(arptab,
|
||||
rx_arpframe->ar_pro,
|
||||
rx_arpframe->ar_hln,
|
||||
&rx_arpframe->ar_sha[0],
|
||||
rx_arpframe->ar_pln,
|
||||
&rx_arpframe->ar_spa[0],
|
||||
longevity
|
||||
);
|
||||
|
||||
switch (rx_arpframe->opcode)
|
||||
{
|
||||
case ARP_REQUEST:
|
||||
/*
|
||||
* Check to see if request is directed to me
|
||||
*/
|
||||
if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
|
||||
(rx_arpframe->ar_tpa[1] == addr[1]) &&
|
||||
(rx_arpframe->ar_tpa[2] == addr[2]) &&
|
||||
(rx_arpframe->ar_tpa[3] == addr[3]) )
|
||||
{
|
||||
/*
|
||||
* Reuse the current network buffer to assemble an ARP reply
|
||||
*/
|
||||
tx_arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];
|
||||
switch (rx_arpframe->opcode)
|
||||
{
|
||||
case ARP_REQUEST:
|
||||
/*
|
||||
* Check to see if request is directed to me
|
||||
*/
|
||||
if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
|
||||
(rx_arpframe->ar_tpa[1] == addr[1]) &&
|
||||
(rx_arpframe->ar_tpa[2] == addr[2]) &&
|
||||
(rx_arpframe->ar_tpa[3] == addr[3]) )
|
||||
{
|
||||
dbg("received arp request directed to us, replying\r\n");
|
||||
/*
|
||||
* Reuse the current network buffer to assemble an ARP reply
|
||||
*/
|
||||
tx_arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];
|
||||
|
||||
/*
|
||||
* Build new ARP frame from the received data
|
||||
*/
|
||||
tx_arpframe->ar_hrd = ETHERNET;
|
||||
tx_arpframe->ar_pro = ETH_FRM_IP;
|
||||
tx_arpframe->ar_hln = 6;
|
||||
tx_arpframe->ar_pln = 4;
|
||||
tx_arpframe->opcode = ARP_REPLY;
|
||||
tx_arpframe->ar_tha[0] = rx_arpframe->ar_sha[0];
|
||||
tx_arpframe->ar_tha[1] = rx_arpframe->ar_sha[1];
|
||||
tx_arpframe->ar_tha[2] = rx_arpframe->ar_sha[2];
|
||||
tx_arpframe->ar_tha[3] = rx_arpframe->ar_sha[3];
|
||||
tx_arpframe->ar_tha[4] = rx_arpframe->ar_sha[4];
|
||||
tx_arpframe->ar_tha[5] = rx_arpframe->ar_sha[5];
|
||||
tx_arpframe->ar_tpa[0] = rx_arpframe->ar_spa[0];
|
||||
tx_arpframe->ar_tpa[1] = rx_arpframe->ar_spa[1];
|
||||
tx_arpframe->ar_tpa[2] = rx_arpframe->ar_spa[2];
|
||||
tx_arpframe->ar_tpa[3] = rx_arpframe->ar_spa[3];
|
||||
/*
|
||||
* Build new ARP frame from the received data
|
||||
*/
|
||||
tx_arpframe->ar_hrd = ETHERNET;
|
||||
tx_arpframe->ar_pro = ETH_FRM_IP;
|
||||
tx_arpframe->ar_hln = 6;
|
||||
tx_arpframe->ar_pln = 4;
|
||||
tx_arpframe->opcode = ARP_REPLY;
|
||||
tx_arpframe->ar_tha[0] = rx_arpframe->ar_sha[0];
|
||||
tx_arpframe->ar_tha[1] = rx_arpframe->ar_sha[1];
|
||||
tx_arpframe->ar_tha[2] = rx_arpframe->ar_sha[2];
|
||||
tx_arpframe->ar_tha[3] = rx_arpframe->ar_sha[3];
|
||||
tx_arpframe->ar_tha[4] = rx_arpframe->ar_sha[4];
|
||||
tx_arpframe->ar_tha[5] = rx_arpframe->ar_sha[5];
|
||||
tx_arpframe->ar_tpa[0] = rx_arpframe->ar_spa[0];
|
||||
tx_arpframe->ar_tpa[1] = rx_arpframe->ar_spa[1];
|
||||
tx_arpframe->ar_tpa[2] = rx_arpframe->ar_spa[2];
|
||||
tx_arpframe->ar_tpa[3] = rx_arpframe->ar_spa[3];
|
||||
|
||||
/*
|
||||
* Now copy in the new information
|
||||
*/
|
||||
addr = &nif->hwa[0];
|
||||
tx_arpframe->ar_sha[0] = addr[0];
|
||||
tx_arpframe->ar_sha[1] = addr[1];
|
||||
tx_arpframe->ar_sha[2] = addr[2];
|
||||
tx_arpframe->ar_sha[3] = addr[3];
|
||||
tx_arpframe->ar_sha[4] = addr[4];
|
||||
tx_arpframe->ar_sha[5] = addr[5];
|
||||
/*
|
||||
* Now copy in the new information
|
||||
*/
|
||||
addr = &nif->hwa[0];
|
||||
tx_arpframe->ar_sha[0] = addr[0];
|
||||
tx_arpframe->ar_sha[1] = addr[1];
|
||||
tx_arpframe->ar_sha[2] = addr[2];
|
||||
tx_arpframe->ar_sha[3] = addr[3];
|
||||
tx_arpframe->ar_sha[4] = addr[4];
|
||||
tx_arpframe->ar_sha[5] = addr[5];
|
||||
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
tx_arpframe->ar_spa[0] = addr[0];
|
||||
tx_arpframe->ar_spa[1] = addr[1];
|
||||
tx_arpframe->ar_spa[2] = addr[2];
|
||||
tx_arpframe->ar_spa[3] = addr[3];
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
tx_arpframe->ar_spa[0] = addr[0];
|
||||
tx_arpframe->ar_spa[1] = addr[1];
|
||||
tx_arpframe->ar_spa[2] = addr[2];
|
||||
tx_arpframe->ar_spa[3] = addr[3];
|
||||
|
||||
/*
|
||||
* Save the length of my packet in the buffer structure
|
||||
*/
|
||||
pNbuf->length = ARP_HDR_LEN;
|
||||
/*
|
||||
* Save the length of my packet in the buffer structure
|
||||
*/
|
||||
pNbuf->length = ARP_HDR_LEN;
|
||||
|
||||
nif->send(nif,
|
||||
&tx_arpframe->ar_tha[0],
|
||||
&tx_arpframe->ar_sha[0],
|
||||
ETH_FRM_ARP,
|
||||
pNbuf);
|
||||
}
|
||||
else
|
||||
nbuf_free(pNbuf);
|
||||
break;
|
||||
case ARP_REPLY:
|
||||
/*
|
||||
* The ARP Reply case is already taken care of
|
||||
*/
|
||||
default:
|
||||
nbuf_free(pNbuf);
|
||||
break;
|
||||
}
|
||||
nif->send(nif,
|
||||
&tx_arpframe->ar_tha[0],
|
||||
&tx_arpframe->ar_sha[0],
|
||||
ETH_FRM_ARP,
|
||||
pNbuf);
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("ARP request not addressed to us, discarding\r\n");
|
||||
nbuf_free(pNbuf);
|
||||
}
|
||||
break;
|
||||
|
||||
return;
|
||||
case ARP_REPLY:
|
||||
/*
|
||||
* The ARP Reply case is already taken care of
|
||||
*/
|
||||
|
||||
/* missing break is intentional */
|
||||
|
||||
default:
|
||||
nbuf_free(pNbuf);
|
||||
break;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
216
net/bcm5222.c
216
net/bcm5222.c
@@ -18,13 +18,15 @@
|
||||
#include "firebee.h"
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
#error "Unknown machine!"
|
||||
#endif
|
||||
|
||||
#define DBG_BCM
|
||||
#ifdef DBG_BCM
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_BCM */
|
||||
@@ -35,7 +37,7 @@
|
||||
* This function sets up the Auto-Negotiate Advertisement register
|
||||
* within the PHY and then forces the PHY to auto-negotiate for
|
||||
* it's settings.
|
||||
*
|
||||
*
|
||||
* Params:
|
||||
* fec_ch FEC channel
|
||||
* phy_addr Address of the PHY.
|
||||
@@ -48,133 +50,133 @@
|
||||
*/
|
||||
int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex)
|
||||
{
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
dbg("%s: PHY reset\r\n", __FUNCTION__);
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
dbg("PHY reset\r\n");
|
||||
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, BCM5222_CTRL_RESET | BCM5222_CTRL_ANE))
|
||||
return 0;
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, BCM5222_CTRL_RESET | BCM5222_CTRL_ANE))
|
||||
return 0;
|
||||
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, BCM5222_CTRL, &settings);
|
||||
if (!(settings & BCM5222_CTRL_RESET))
|
||||
break;
|
||||
}
|
||||
if(timeout >= FEC_MII_TIMEOUT)
|
||||
return 0;
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, BCM5222_CTRL, &settings);
|
||||
if (!(settings & BCM5222_CTRL_RESET))
|
||||
break;
|
||||
}
|
||||
if(timeout >= FEC_MII_TIMEOUT)
|
||||
return 0;
|
||||
|
||||
dbg("%s: PHY reset OK\r\n", __FUNCTION__);
|
||||
dbg("PHY reset OK\r\n");
|
||||
|
||||
settings = (BCM5222_AN_ADV_NEXT_PAGE | BCM5222_AN_ADV_PAUSE);
|
||||
settings = (BCM5222_AN_ADV_NEXT_PAGE | BCM5222_AN_ADV_PAUSE);
|
||||
|
||||
if (speed == FEC_MII_10BASE_T)
|
||||
settings |= (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: BCM5222_AN_ADV_10BT);
|
||||
else /* (speed == FEC_MII_100BASE_TX) */
|
||||
settings = (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_100BTX_FDX | BCM5222_AN_ADV_100BTX
|
||||
| BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: (BCM5222_AN_ADV_100BTX | BCM5222_AN_ADV_10BT));
|
||||
if (speed == FEC_MII_10BASE_T)
|
||||
settings |= (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: BCM5222_AN_ADV_10BT);
|
||||
else /* (speed == FEC_MII_100BASE_TX) */
|
||||
settings = (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_100BTX_FDX | BCM5222_AN_ADV_100BTX
|
||||
| BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: (BCM5222_AN_ADV_100BTX | BCM5222_AN_ADV_10BT));
|
||||
|
||||
/* Set the Auto-Negotiation Advertisement Register */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_AN_ADV, settings))
|
||||
return 0;
|
||||
/* Set the Auto-Negotiation Advertisement Register */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_AN_ADV, settings))
|
||||
return 0;
|
||||
|
||||
dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
|
||||
dbg("PHY Enable Auto-Negotiation\r\n");
|
||||
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, (BCM5222_CTRL_ANE | BCM5222_CTRL_RESTART_AN)))
|
||||
return 0;
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, (BCM5222_CTRL_ANE | BCM5222_CTRL_RESTART_AN)))
|
||||
return 0;
|
||||
|
||||
dbg("%s: PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
|
||||
dbg("PHY Wait for auto-negotiation to complete\r\n");
|
||||
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_STAT, &settings))
|
||||
return 0;
|
||||
if (settings & BCM5222_STAT_AN_COMPLETE)
|
||||
break;
|
||||
}
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_STAT, &settings))
|
||||
return 0;
|
||||
if (settings & BCM5222_STAT_AN_COMPLETE)
|
||||
break;
|
||||
}
|
||||
|
||||
if (timeout < FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: PHY auto-negociation complete\r\n", __FUNCTION__);
|
||||
if (timeout < FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("PHY auto-negociation complete\r\n");
|
||||
|
||||
/* Read Auxiliary Control/Status Register */
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_ACSR, &settings))
|
||||
return 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("%s: auto negotiation failed, PHY Set the default mode\r\n", __FUNCTION__);
|
||||
/* Read Auxiliary Control/Status Register */
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_ACSR, &settings))
|
||||
return 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("auto negotiation failed, PHY Set the default mode\r\n");
|
||||
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_ACSR, settings = (BCM5222_ACSR_100BTX | BCM5222_ACSR_FDX)))
|
||||
return 0;
|
||||
}
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_ACSR, settings = (BCM5222_ACSR_100BTX | BCM5222_ACSR_FDX)))
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Set the proper duplex in the FEC now that we have auto-negotiated */
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
fec_duplex(fec_ch, FEC_MII_FULL_DUPLEX);
|
||||
else
|
||||
fec_duplex(fec_ch, FEC_MII_HALF_DUPLEX);
|
||||
/* Set the proper duplex in the FEC now that we have auto-negotiated */
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
fec_duplex(fec_ch, FEC_MII_FULL_DUPLEX);
|
||||
else
|
||||
fec_duplex(fec_ch, FEC_MII_HALF_DUPLEX);
|
||||
|
||||
dbg("%s: PHY Mode: ", __FUNCTION__);
|
||||
dbg("PHY Mode: ");
|
||||
|
||||
if (settings & BCM5222_ACSR_100BTX)
|
||||
dbg("%s: 100Mbps\r\n", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: 10Mbps\r\n", __FUNCTION__);
|
||||
if (settings & BCM5222_ACSR_100BTX)
|
||||
dbg("100Mbps\r\n");
|
||||
else
|
||||
dbg("10Mbps\r\n");
|
||||
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
dbg("%s: Full-duplex\r\n", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: Half-duplex\r\n", __FUNCTION__);
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
dbg("Full-duplex\r\n");
|
||||
else
|
||||
dbg("Half-duplex\r\n");
|
||||
|
||||
return 1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
void bcm5222_get_reg(uint16_t* status0, uint16_t* status1)
|
||||
{
|
||||
fec_mii_read(0, 0x00, 0x00000000, &status0[0]);
|
||||
fec_mii_read(0, 0x00, 0x00000001, &status0[1]);
|
||||
fec_mii_read(0, 0x00, 0x00000004, &status0[4]);
|
||||
fec_mii_read(0, 0x00, 0x00000005, &status0[5]);
|
||||
fec_mii_read(0, 0x00, 0x00000006, &status0[6]);
|
||||
fec_mii_read(0, 0x00, 0x00000007, &status0[7]);
|
||||
fec_mii_read(0, 0x00, 0x00000008, &status0[8]);
|
||||
fec_mii_read(0, 0x00, 0x00000010, &status0[16]);
|
||||
fec_mii_read(0, 0x00, 0x00000011, &status0[17]);
|
||||
fec_mii_read(0, 0x00, 0x00000012, &status0[18]);
|
||||
fec_mii_read(0, 0x00, 0x00000013, &status0[19]);
|
||||
fec_mii_read(0, 0x00, 0x00000018, &status0[24]);
|
||||
fec_mii_read(0, 0x00, 0x00000019, &status0[25]);
|
||||
fec_mii_read(0, 0x00, 0x0000001B, &status0[27]);
|
||||
fec_mii_read(0, 0x00, 0x0000001C, &status0[28]);
|
||||
fec_mii_read(0, 0x00, 0x0000001E, &status0[30]);
|
||||
fec_mii_read(0, 0x01, 0x00000000, &status1[0]);
|
||||
fec_mii_read(0, 0x01, 0x00000001, &status1[1]);
|
||||
fec_mii_read(0, 0x01, 0x00000004, &status1[4]);
|
||||
fec_mii_read(0, 0x01, 0x00000005, &status1[5]);
|
||||
fec_mii_read(0, 0x01, 0x00000006, &status1[6]);
|
||||
fec_mii_read(0, 0x01, 0x00000007, &status1[7]);
|
||||
fec_mii_read(0, 0x01, 0x00000008, &status1[8]);
|
||||
fec_mii_read(0, 0x01, 0x00000010, &status1[16]);
|
||||
fec_mii_read(0, 0x01, 0x00000011, &status1[17]);
|
||||
fec_mii_read(0, 0x01, 0x00000012, &status1[18]);
|
||||
fec_mii_read(0, 0x01, 0x00000013, &status1[19]);
|
||||
fec_mii_read(0, 0x01, 0x00000018, &status1[24]);
|
||||
fec_mii_read(0, 0x01, 0x00000019, &status1[25]);
|
||||
fec_mii_read(0, 0x01, 0x0000001B, &status1[27]);
|
||||
fec_mii_read(0, 0x01, 0x0000001C, &status1[28]);
|
||||
fec_mii_read(0, 0x01, 0x0000001E, &status1[30]);
|
||||
fec_mii_read(0, 0x00, 0x00000000, &status0[0]);
|
||||
fec_mii_read(0, 0x00, 0x00000001, &status0[1]);
|
||||
fec_mii_read(0, 0x00, 0x00000004, &status0[4]);
|
||||
fec_mii_read(0, 0x00, 0x00000005, &status0[5]);
|
||||
fec_mii_read(0, 0x00, 0x00000006, &status0[6]);
|
||||
fec_mii_read(0, 0x00, 0x00000007, &status0[7]);
|
||||
fec_mii_read(0, 0x00, 0x00000008, &status0[8]);
|
||||
fec_mii_read(0, 0x00, 0x00000010, &status0[16]);
|
||||
fec_mii_read(0, 0x00, 0x00000011, &status0[17]);
|
||||
fec_mii_read(0, 0x00, 0x00000012, &status0[18]);
|
||||
fec_mii_read(0, 0x00, 0x00000013, &status0[19]);
|
||||
fec_mii_read(0, 0x00, 0x00000018, &status0[24]);
|
||||
fec_mii_read(0, 0x00, 0x00000019, &status0[25]);
|
||||
fec_mii_read(0, 0x00, 0x0000001B, &status0[27]);
|
||||
fec_mii_read(0, 0x00, 0x0000001C, &status0[28]);
|
||||
fec_mii_read(0, 0x00, 0x0000001E, &status0[30]);
|
||||
fec_mii_read(0, 0x01, 0x00000000, &status1[0]);
|
||||
fec_mii_read(0, 0x01, 0x00000001, &status1[1]);
|
||||
fec_mii_read(0, 0x01, 0x00000004, &status1[4]);
|
||||
fec_mii_read(0, 0x01, 0x00000005, &status1[5]);
|
||||
fec_mii_read(0, 0x01, 0x00000006, &status1[6]);
|
||||
fec_mii_read(0, 0x01, 0x00000007, &status1[7]);
|
||||
fec_mii_read(0, 0x01, 0x00000008, &status1[8]);
|
||||
fec_mii_read(0, 0x01, 0x00000010, &status1[16]);
|
||||
fec_mii_read(0, 0x01, 0x00000011, &status1[17]);
|
||||
fec_mii_read(0, 0x01, 0x00000012, &status1[18]);
|
||||
fec_mii_read(0, 0x01, 0x00000013, &status1[19]);
|
||||
fec_mii_read(0, 0x01, 0x00000018, &status1[24]);
|
||||
fec_mii_read(0, 0x01, 0x00000019, &status1[25]);
|
||||
fec_mii_read(0, 0x01, 0x0000001B, &status1[27]);
|
||||
fec_mii_read(0, 0x01, 0x0000001C, &status1[28]);
|
||||
fec_mii_read(0, 0x01, 0x0000001E, &status1[30]);
|
||||
}
|
||||
|
||||
|
||||
147
net/bootp.c
147
net/bootp.c
@@ -13,103 +13,106 @@
|
||||
|
||||
#define DBG_BOOTP
|
||||
#ifdef DBG_BOOTP
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_BOOTP */
|
||||
|
||||
#define TIMER_NETWORK 3 /* defines GPT3 as timer for this function */
|
||||
#define TIMER_NETWORK 3 /* defines GPT3 as timer for this function */
|
||||
|
||||
static struct bootp_connection connection;
|
||||
#define XID 0x1234 /* this is arbitrary */
|
||||
#define MAX_TRIES 5 /* since UDP can fail */
|
||||
#define XID 0x1234 /* this is arbitrary */
|
||||
#define MAX_TRIES 5 /* since UDP can fail */
|
||||
|
||||
void bootp_request(NIF *nif, uint8_t *pa)
|
||||
{
|
||||
/*
|
||||
* This function broadcasts a BOOTP request for the protocol
|
||||
* address "pa"
|
||||
*/
|
||||
uint8_t *addr;
|
||||
IP_ADDR broadcast = {255, 255, 255, 255};
|
||||
NBUF *nbuf;
|
||||
struct bootp_packet *p;
|
||||
int i, result;
|
||||
/*
|
||||
* This function broadcasts a BOOTP request for the protocol
|
||||
* address "pa"
|
||||
*/
|
||||
uint8_t *addr;
|
||||
IP_ADDR broadcast = {255, 255, 255, 255};
|
||||
NBUF *nbuf;
|
||||
struct bootp_packet *p;
|
||||
int i, result;
|
||||
|
||||
nbuf = nbuf_alloc();
|
||||
if (nbuf == NULL)
|
||||
{
|
||||
xprintf("%s: couldn't allocate Tx buffer\r\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
nbuf = nbuf_alloc();
|
||||
if (nbuf == NULL)
|
||||
{
|
||||
xprintf("%s: couldn't allocate Tx buffer\r\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
|
||||
p = (struct bootp_packet *) &nbuf->data[BOOTP_HDR_OFFSET];
|
||||
p = (struct bootp_packet *) &nbuf->data[BOOTP_HDR_OFFSET];
|
||||
|
||||
/* Build the BOOTP request packet */
|
||||
p->type = BOOTP_TYPE_BOOTREQUEST;
|
||||
p->htype = BOOTP_HTYPE_ETHERNET;
|
||||
p->hlen = BOOTP_HLEN_ETHERNET;
|
||||
p->hops = 0;
|
||||
p->xid = XID;
|
||||
p->secs = 1;
|
||||
p->flags = BOOTP_FLAGS_BROADCAST;
|
||||
p->cl_addr = 0x0;
|
||||
p->yi_addr = 0x0;
|
||||
p->gi_addr = 0x0;
|
||||
/* Build the BOOTP request packet */
|
||||
p->type = BOOTP_TYPE_BOOTREQUEST;
|
||||
p->htype = BOOTP_HTYPE_ETHERNET;
|
||||
p->hlen = BOOTP_HLEN_ETHERNET;
|
||||
p->hops = 0;
|
||||
p->xid = XID;
|
||||
p->secs = 1;
|
||||
p->flags = BOOTP_FLAGS_BROADCAST;
|
||||
p->cl_addr = 0x0;
|
||||
p->yi_addr = 0x0;
|
||||
p->gi_addr = 0x0;
|
||||
|
||||
connection.nif = nif;
|
||||
addr = &nif->hwa[0];
|
||||
connection.nif = nif;
|
||||
addr = &nif->hwa[0];
|
||||
|
||||
for (i = 0; i < 6; i++)
|
||||
p->ch_addr[i] = addr[i];
|
||||
for (i = 0; i < 6; i++)
|
||||
p->ch_addr[i] = addr[i];
|
||||
|
||||
nbuf->length = BOOTP_PACKET_LEN;
|
||||
nbuf->length = BOOTP_PACKET_LEN;
|
||||
|
||||
/* setup reply handler */
|
||||
udp_bind_port(BOOTP_CLIENT_PORT, bootp_handler);
|
||||
/* setup reply handler */
|
||||
udp_bind_port(BOOTP_CLIENT_PORT, bootp_handler);
|
||||
|
||||
for (i = 0; i < MAX_TRIES; i++)
|
||||
{
|
||||
/* Send the BOOTP request */
|
||||
result = udp_send(connection.nif, broadcast, BOOTP_CLIENT_PORT,
|
||||
BOOTP_SERVER_PORT, nbuf);
|
||||
dbg("sent bootp request\r\n");
|
||||
if (result == true)
|
||||
break;
|
||||
}
|
||||
for (i = 0; i < MAX_TRIES; i++)
|
||||
{
|
||||
/* Send the BOOTP request */
|
||||
result = udp_send(connection.nif, broadcast, BOOTP_CLIENT_PORT,
|
||||
BOOTP_SERVER_PORT, nbuf);
|
||||
dbg("sent bootp request\r\n");
|
||||
if (result == true)
|
||||
break;
|
||||
}
|
||||
|
||||
/* release handler */
|
||||
udp_free_port(BOOTP_CLIENT_PORT);
|
||||
/* release handler */
|
||||
udp_free_port(BOOTP_CLIENT_PORT);
|
||||
|
||||
if (result == 0)
|
||||
nbuf_free(nbuf);
|
||||
if (result == 0)
|
||||
nbuf_free(nbuf);
|
||||
}
|
||||
|
||||
void bootp_handler(NIF *nif, NBUF *nbuf)
|
||||
{
|
||||
/*
|
||||
* BOOTP protocol handler
|
||||
*/
|
||||
uint8_t *addr;
|
||||
struct bootp_packet *rx_p;
|
||||
udp_frame_hdr *udpframe;
|
||||
/*
|
||||
* BOOTP protocol handler
|
||||
*/
|
||||
struct bootp_packet *rx_p;
|
||||
udp_frame_hdr *udpframe;
|
||||
|
||||
dbg("%s\n", __FUNCTION__);
|
||||
(void) udpframe; /* FIXME: just to avoid compiler warning */
|
||||
dbg("\r\n");
|
||||
|
||||
rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
|
||||
udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];
|
||||
rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
|
||||
udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];
|
||||
|
||||
/* check packet if it is valid and if it is really intended for us */
|
||||
/*
|
||||
* check packet if it is valid and if it is really intended for us
|
||||
*/
|
||||
|
||||
if (rx_p->type == BOOTP_TYPE_BOOTREPLY && rx_p->xid == XID)
|
||||
{
|
||||
dbg("received bootp reply\r\n");
|
||||
/* seems to be valid */
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
/* not valid */
|
||||
return;
|
||||
}
|
||||
if (rx_p->type == BOOTP_TYPE_BOOTREPLY && rx_p->xid == XID)
|
||||
{
|
||||
dbg("received bootp reply\r\n");
|
||||
/* seems to be valid */
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("received invalid bootp reply\r\n");
|
||||
/* not valid */
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
206
net/fecbd.c
206
net/fecbd.c
@@ -31,14 +31,14 @@
|
||||
*
|
||||
*/
|
||||
|
||||
FECBD unaligned_bds[(2 * NRXBD) + (2 * NTXBD) + 1];
|
||||
static FECBD unaligned_bds[(2 * NRXBD) + (2 * NTXBD) + 1];
|
||||
|
||||
/*
|
||||
* These pointers are used to reference into the chunck of data set
|
||||
* aside for buffer descriptors
|
||||
*/
|
||||
FECBD *RxBD;
|
||||
FECBD *TxBD;
|
||||
static FECBD *RxBD;
|
||||
static FECBD *TxBD;
|
||||
|
||||
/*
|
||||
* Macros to easier access to the BD ring
|
||||
@@ -62,94 +62,94 @@ static int iRxbd;
|
||||
*/
|
||||
void fecbd_init(uint8_t ch)
|
||||
{
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
|
||||
dbg("%s:\r\n", __FUNCTION__);
|
||||
dbg("\r\n");
|
||||
|
||||
/*
|
||||
* Align Buffer Descriptors to 4-byte boundary
|
||||
*/
|
||||
RxBD = (FECBD *)(((int) unaligned_bds + 3) & 0xFFFFFFFC);
|
||||
TxBD = (FECBD *)((int) RxBD + (sizeof(FECBD) * 2 * NRXBD));
|
||||
/*
|
||||
* Align Buffer Descriptors to 4-byte boundary
|
||||
*/
|
||||
RxBD = (FECBD *)(((int) unaligned_bds + 3) & 0xFFFFFFFC);
|
||||
TxBD = (FECBD *)((int) RxBD + (sizeof(FECBD) * 2 * NRXBD));
|
||||
|
||||
dbg("%s: initialise RX buffer descriptor ring\r\n", __FUNCTION__);
|
||||
dbg("initialise RX buffer descriptor ring\r\n");
|
||||
|
||||
/*
|
||||
* Initialize the Rx Buffer Descriptor ring
|
||||
*/
|
||||
for (i = 0; i < NRXBD; ++i)
|
||||
{
|
||||
/* Grab a network buffer from the free list */
|
||||
nbuf = nbuf_alloc();
|
||||
if (nbuf == NULL)
|
||||
{
|
||||
dbg("%s: could not allocate network buffer\r\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
/*
|
||||
* Initialize the Rx Buffer Descriptor ring
|
||||
*/
|
||||
for (i = 0; i < NRXBD; ++i)
|
||||
{
|
||||
/* Grab a network buffer from the free list */
|
||||
nbuf = nbuf_alloc();
|
||||
if (nbuf == NULL)
|
||||
{
|
||||
dbg("could not allocate network buffer\r\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/* Initialize the BD */
|
||||
RxBD(ch,i).status = RX_BD_E | RX_BD_INTERRUPT;
|
||||
RxBD(ch,i).length = RX_BUF_SZ;
|
||||
RxBD(ch,i).data = nbuf->data;
|
||||
/* Initialize the BD */
|
||||
RxBD(ch,i).status = RX_BD_E | RX_BD_INTERRUPT;
|
||||
RxBD(ch,i).length = RX_BUF_SZ;
|
||||
RxBD(ch,i).data = nbuf->data;
|
||||
|
||||
/* Add the network buffer to the Rx queue */
|
||||
nbuf_add(NBUF_RX_RING, nbuf);
|
||||
}
|
||||
/* Add the network buffer to the Rx queue */
|
||||
nbuf_add(NBUF_RX_RING, nbuf);
|
||||
}
|
||||
|
||||
/*
|
||||
* Set the WRAP bit on the last one
|
||||
*/
|
||||
RxBD(ch, i - 1).status |= RX_BD_W;
|
||||
/*
|
||||
* Set the WRAP bit on the last one
|
||||
*/
|
||||
RxBD(ch, i - 1).status |= RX_BD_W;
|
||||
|
||||
dbg("%s: initialise TX buffer descriptor ring\r\n", __FUNCTION__);
|
||||
dbg("initialise TX buffer descriptor ring\r\n");
|
||||
|
||||
/*
|
||||
* Initialize the Tx Buffer Descriptor ring
|
||||
*/
|
||||
for (i = 0; i < NTXBD; ++i)
|
||||
{
|
||||
TxBD(ch, i).status = TX_BD_INTERRUPT;
|
||||
TxBD(ch, i).length = 0;
|
||||
TxBD(ch, i).data = NULL;
|
||||
}
|
||||
/*
|
||||
* Initialize the Tx Buffer Descriptor ring
|
||||
*/
|
||||
for (i = 0; i < NTXBD; ++i)
|
||||
{
|
||||
TxBD(ch, i).status = TX_BD_INTERRUPT;
|
||||
TxBD(ch, i).length = 0;
|
||||
TxBD(ch, i).data = NULL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Set the WRAP bit on the last one
|
||||
*/
|
||||
TxBD(ch, i - 1).status |= TX_BD_W;
|
||||
/*
|
||||
* Set the WRAP bit on the last one
|
||||
*/
|
||||
TxBD(ch, i - 1).status |= TX_BD_W;
|
||||
|
||||
/*
|
||||
* Initialize the buffer descriptor indexes
|
||||
*/
|
||||
iTxbd_new = iTxbd_old = iRxbd = 0;
|
||||
/*
|
||||
* Initialize the buffer descriptor indexes
|
||||
*/
|
||||
iTxbd_new = iTxbd_old = iRxbd = 0;
|
||||
}
|
||||
|
||||
void fecbd_dump(uint8_t ch)
|
||||
{
|
||||
#ifdef DBG_FECBD
|
||||
int i;
|
||||
int i;
|
||||
|
||||
xprintf("\n------------ FEC%d BDs -----------\n",ch);
|
||||
xprintf("RxBD Ring\n");
|
||||
for (i = 0; i < NRXBD; i++)
|
||||
{
|
||||
xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
|
||||
i, &RxBD(ch, i),
|
||||
RxBD(ch, i).status,
|
||||
RxBD(ch, i).length,
|
||||
RxBD(ch, i).data);
|
||||
}
|
||||
xprintf("TxBD Ring\n");
|
||||
for (i = 0; i < NTXBD; i++)
|
||||
{
|
||||
xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
|
||||
i, &TxBD(ch, i),
|
||||
TxBD(ch, i).status,
|
||||
TxBD(ch, i).length,
|
||||
TxBD(ch, i).data);
|
||||
}
|
||||
xprintf("--------------------------------\n\n");
|
||||
xprintf("\n------------ FEC%d BDs -----------\n",ch);
|
||||
xprintf("RxBD Ring\n");
|
||||
for (i = 0; i < NRXBD; i++)
|
||||
{
|
||||
xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
|
||||
i, &RxBD(ch, i),
|
||||
RxBD(ch, i).status,
|
||||
RxBD(ch, i).length,
|
||||
RxBD(ch, i).data);
|
||||
}
|
||||
xprintf("TxBD Ring\n");
|
||||
for (i = 0; i < NTXBD; i++)
|
||||
{
|
||||
xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
|
||||
i, &TxBD(ch, i),
|
||||
TxBD(ch, i).status,
|
||||
TxBD(ch, i).length,
|
||||
TxBD(ch, i).data);
|
||||
}
|
||||
xprintf("--------------------------------\n\n");
|
||||
#endif /* DBG_FECBD */
|
||||
}
|
||||
|
||||
@@ -165,28 +165,28 @@ void fecbd_dump(uint8_t ch)
|
||||
*/
|
||||
uint32_t fecbd_get_start(uint8_t ch, uint8_t direction)
|
||||
{
|
||||
switch (direction)
|
||||
{
|
||||
case Rx:
|
||||
return (uint32_t)((int)RxBD + (ch * sizeof(FECBD) * NRXBD));
|
||||
case Tx:
|
||||
default:
|
||||
return (uint32_t)((int)TxBD + (ch * sizeof(FECBD) * NTXBD));
|
||||
}
|
||||
switch (direction)
|
||||
{
|
||||
case Rx:
|
||||
return (uint32_t)((int)RxBD + (ch * sizeof(FECBD) * NRXBD));
|
||||
case Tx:
|
||||
default:
|
||||
return (uint32_t)((int)TxBD + (ch * sizeof(FECBD) * NTXBD));
|
||||
}
|
||||
}
|
||||
|
||||
FECBD *fecbd_rx_alloc(uint8_t ch)
|
||||
{
|
||||
int i = iRxbd;
|
||||
int i = iRxbd;
|
||||
|
||||
/* Check to see if the ring of BDs is full */
|
||||
if (RxBD(ch, i).status & RX_BD_E)
|
||||
return NULL;
|
||||
/* Check to see if the ring of BDs is full */
|
||||
if (RxBD(ch, i).status & RX_BD_E)
|
||||
return NULL;
|
||||
|
||||
/* Increment the circular index */
|
||||
iRxbd = (uint8_t)((iRxbd + 1) % NRXBD);
|
||||
/* Increment the circular index */
|
||||
iRxbd = (uint8_t)((iRxbd + 1) % NRXBD);
|
||||
|
||||
return &RxBD(ch, i);
|
||||
return &RxBD(ch, i);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -201,16 +201,16 @@ FECBD *fecbd_rx_alloc(uint8_t ch)
|
||||
*/
|
||||
FECBD *fecbd_tx_alloc(uint8_t ch)
|
||||
{
|
||||
int i = iTxbd_new;
|
||||
int i = iTxbd_new;
|
||||
|
||||
/* Check to see if the ring of BDs is full */
|
||||
if (TxBD(ch, i).status & TX_BD_R)
|
||||
return NULL;
|
||||
/* Check to see if the ring of BDs is full */
|
||||
if (TxBD(ch, i).status & TX_BD_R)
|
||||
return NULL;
|
||||
|
||||
/* Increment the circular index */
|
||||
iTxbd_new = (uint8_t)((iTxbd_new + 1) % NTXBD);
|
||||
/* Increment the circular index */
|
||||
iTxbd_new = (uint8_t)((iTxbd_new + 1) % NTXBD);
|
||||
|
||||
return &TxBD(ch, i);
|
||||
return &TxBD(ch, i);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -226,14 +226,14 @@ FECBD *fecbd_tx_alloc(uint8_t ch)
|
||||
*/
|
||||
FECBD *fecbd_tx_free(uint8_t ch)
|
||||
{
|
||||
int i = iTxbd_old;
|
||||
int i = iTxbd_old;
|
||||
|
||||
/* Check to see if the ring of BDs is empty */
|
||||
if ((TxBD(ch, i).data == NULL) || (TxBD(ch, i).status & TX_BD_R))
|
||||
return NULL;
|
||||
/* Check to see if the ring of BDs is empty */
|
||||
if ((TxBD(ch, i).data == NULL) || (TxBD(ch, i).status & TX_BD_R))
|
||||
return NULL;
|
||||
|
||||
/* Increment the circular index */
|
||||
iTxbd_old = (uint8_t)((iTxbd_old + 1) % NTXBD);
|
||||
/* Increment the circular index */
|
||||
iTxbd_old = (uint8_t)((iTxbd_old + 1) % NTXBD);
|
||||
|
||||
return &TxBD(ch, i);
|
||||
return &TxBD(ch, i);
|
||||
}
|
||||
|
||||
452
net/ip.c
452
net/ip.c
@@ -1,315 +1,317 @@
|
||||
/*
|
||||
* File: ip.c
|
||||
* File: ip.c
|
||||
* Purpose: Internet Protcol device driver
|
||||
*
|
||||
* Notes:
|
||||
*
|
||||
* Modifications:
|
||||
*/
|
||||
#include <bas_types.h>
|
||||
#include "net.h"
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include "bas_printf.h"
|
||||
#include "bas_string.h"
|
||||
|
||||
|
||||
//#define IP_DEBUG
|
||||
#if defined(IP_DEBUG)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif
|
||||
|
||||
void ip_init(IP_INFO *info, IP_ADDR_P myip, IP_ADDR_P gateway, IP_ADDR_P netmask)
|
||||
{
|
||||
int index;
|
||||
int index;
|
||||
|
||||
for (index = 0; index < sizeof(IP_ADDR); index++)
|
||||
{
|
||||
info->myip[index] = myip[index];
|
||||
info->gateway[index] = gateway[index];
|
||||
info->netmask[index] = netmask[index];
|
||||
info->broadcast[index] = 0xFF;
|
||||
}
|
||||
for (index = 0; index < sizeof(IP_ADDR); index++)
|
||||
{
|
||||
info->myip[index] = myip[index];
|
||||
info->gateway[index] = gateway[index];
|
||||
info->netmask[index] = netmask[index];
|
||||
info->broadcast[index] = 0xFF;
|
||||
}
|
||||
|
||||
info->rx = 0;
|
||||
info->rx_unsup = 0;
|
||||
info->tx = 0;
|
||||
info->err = 0;
|
||||
info->rx = 0;
|
||||
info->rx_unsup = 0;
|
||||
info->tx = 0;
|
||||
info->err = 0;
|
||||
}
|
||||
|
||||
uint8_t *ip_get_myip(IP_INFO *info)
|
||||
{
|
||||
if (info != 0)
|
||||
{
|
||||
return (uint8_t *) &info->myip[0];
|
||||
}
|
||||
dbg("%s: info is NULL!\n\t", __FUNCTION__);
|
||||
return 0;
|
||||
if (info != 0)
|
||||
{
|
||||
return (uint8_t *) &info->myip[0];
|
||||
}
|
||||
dbg("info is NULL!\n\t");
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ip_addr_compare(IP_ADDR_P addr1, IP_ADDR_P addr2)
|
||||
{
|
||||
int i;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < sizeof(IP_ADDR); i++)
|
||||
{
|
||||
if (addr1[i] != addr2[i])
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
for (i = 0; i < sizeof(IP_ADDR); i++)
|
||||
{
|
||||
if (addr1[i] != addr2[i])
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint8_t *ip_resolve_route(NIF *nif, IP_ADDR_P destip)
|
||||
{
|
||||
/*
|
||||
* This function determines whether or not an outgoing IP
|
||||
* packet needs to be transmitted on the local net or sent
|
||||
* to the router for transmission.
|
||||
*/
|
||||
IP_INFO *info;
|
||||
IP_ADDR mask, result;
|
||||
IP_ADDR bc = { 255, 255, 255, 255 };
|
||||
int i;
|
||||
/*
|
||||
* This function determines whether or not an outgoing IP
|
||||
* packet needs to be transmitted on the local net or sent
|
||||
* to the router for transmission.
|
||||
*/
|
||||
IP_INFO *info;
|
||||
IP_ADDR mask, result;
|
||||
IP_ADDR bc = { 255, 255, 255, 255 };
|
||||
int i;
|
||||
|
||||
info = nif_get_protocol_info(nif, ETH_FRM_IP);
|
||||
info = nif_get_protocol_info(nif, ETH_FRM_IP);
|
||||
|
||||
if (memcmp(destip, bc) == 0)
|
||||
{
|
||||
dbg("%s: destip is broadcast address, no gateway needed\r\n", __FUNCTION__);
|
||||
return destip;
|
||||
}
|
||||
if (memcmp(destip, bc, 4) == 0)
|
||||
{
|
||||
dbg("destip is broadcast address, no gateway needed\r\n");
|
||||
return destip;
|
||||
}
|
||||
|
||||
/* create mask for local IP */
|
||||
for (i = 0; i < sizeof(IP_ADDR); i++)
|
||||
{
|
||||
mask[i] = info->myip[i] & info->netmask[i];
|
||||
}
|
||||
/* create mask for local IP */
|
||||
for (i = 0; i < sizeof(IP_ADDR); i++)
|
||||
{
|
||||
mask[i] = info->myip[i] & info->netmask[i];
|
||||
}
|
||||
|
||||
/* apply mask to the destination IP */
|
||||
for (i = 0; i < sizeof(IP_ADDR); i++)
|
||||
{
|
||||
result[i] = mask[i] & destip[i];
|
||||
}
|
||||
/* apply mask to the destination IP */
|
||||
for (i = 0; i < sizeof(IP_ADDR); i++)
|
||||
{
|
||||
result[i] = mask[i] & destip[i];
|
||||
}
|
||||
|
||||
/* See if destination IP is local or not */
|
||||
if (ip_addr_compare(mask, result))
|
||||
{
|
||||
/* The destination IP is on the local net */
|
||||
return arp_resolve(nif, ETH_FRM_IP, destip);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* The destination IP is not on the local net */
|
||||
return arp_resolve(nif, ETH_FRM_IP, info->gateway);
|
||||
}
|
||||
/* See if destination IP is local or not */
|
||||
if (ip_addr_compare(mask, result))
|
||||
{
|
||||
/* The destination IP is on the local net */
|
||||
return arp_resolve(nif, ETH_FRM_IP, destip);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* The destination IP is not on the local net */
|
||||
return arp_resolve(nif, ETH_FRM_IP, info->gateway);
|
||||
}
|
||||
}
|
||||
|
||||
int ip_send(NIF *nif, uint8_t *dest, uint8_t *src, uint8_t protocol, NBUF *pNbuf)
|
||||
{
|
||||
/*
|
||||
* This function assembles an IP datagram and passes it
|
||||
* onto the hardware to be sent over the network.
|
||||
*/
|
||||
uint8_t *route;
|
||||
ip_frame_hdr *ipframe;
|
||||
/*
|
||||
* This function assembles an IP datagram and passes it
|
||||
* onto the hardware to be sent over the network.
|
||||
*/
|
||||
uint8_t *route;
|
||||
ip_frame_hdr *ipframe;
|
||||
|
||||
/*
|
||||
* Construct the IP header
|
||||
*/
|
||||
ipframe = (ip_frame_hdr*) &pNbuf->data[IP_HDR_OFFSET];
|
||||
/*
|
||||
* Construct the IP header
|
||||
*/
|
||||
ipframe = (ip_frame_hdr*) &pNbuf->data[IP_HDR_OFFSET];
|
||||
|
||||
/* IP version 4, Internet Header Length of 5 32-bit words */
|
||||
ipframe->version_ihl = 0x45;
|
||||
/* IP version 4, Internet Header Length of 5 32-bit words */
|
||||
ipframe->version_ihl = 0x45;
|
||||
|
||||
/* Type of Service == 0, normal and routine */
|
||||
ipframe->service_type = 0x00;
|
||||
/* Type of Service == 0, normal and routine */
|
||||
ipframe->service_type = 0x00;
|
||||
|
||||
/* Total length of data */
|
||||
ipframe->total_length = (uint16_t) (pNbuf->length + IP_HDR_SIZE);
|
||||
/* Total length of data */
|
||||
ipframe->total_length = (uint16_t) (pNbuf->length + IP_HDR_SIZE);
|
||||
|
||||
/* User defined identification */
|
||||
ipframe->identification = 0x0000;
|
||||
/* User defined identification */
|
||||
ipframe->identification = 0x0000;
|
||||
|
||||
/* Fragment Flags and Offset -- Don't fragment, last frag */
|
||||
ipframe->flags_frag_offset = 0x0000;
|
||||
/* Fragment Flags and Offset -- Don't fragment, last frag */
|
||||
ipframe->flags_frag_offset = 0x0000;
|
||||
|
||||
/* Time To Live */
|
||||
ipframe->ttl = 0xFF;
|
||||
/* Time To Live */
|
||||
ipframe->ttl = 0xFF;
|
||||
|
||||
/* Protocol */
|
||||
ipframe->protocol = protocol;
|
||||
/* Protocol */
|
||||
ipframe->protocol = protocol;
|
||||
|
||||
/* Checksum, computed later, zeroed for computation */
|
||||
ipframe->checksum = 0x0000;
|
||||
/* Checksum, computed later, zeroed for computation */
|
||||
ipframe->checksum = 0x0000;
|
||||
|
||||
/* source IP address */
|
||||
ipframe->source_addr[0] = src[0];
|
||||
ipframe->source_addr[1] = src[1];
|
||||
ipframe->source_addr[2] = src[2];
|
||||
ipframe->source_addr[3] = src[3];
|
||||
/* source IP address */
|
||||
ipframe->source_addr[0] = src[0];
|
||||
ipframe->source_addr[1] = src[1];
|
||||
ipframe->source_addr[2] = src[2];
|
||||
ipframe->source_addr[3] = src[3];
|
||||
|
||||
/* dest IP address */
|
||||
ipframe->dest_addr[0] = dest[0];
|
||||
ipframe->dest_addr[1] = dest[1];
|
||||
ipframe->dest_addr[2] = dest[2];
|
||||
ipframe->dest_addr[3] = dest[3];
|
||||
/* dest IP address */
|
||||
ipframe->dest_addr[0] = dest[0];
|
||||
ipframe->dest_addr[1] = dest[1];
|
||||
ipframe->dest_addr[2] = dest[2];
|
||||
ipframe->dest_addr[3] = dest[3];
|
||||
|
||||
/* Compute checksum */
|
||||
ipframe->checksum = ip_chksum((uint16_t *) ipframe, IP_HDR_SIZE);
|
||||
/* Compute checksum */
|
||||
ipframe->checksum = ip_chksum((uint16_t *) ipframe, IP_HDR_SIZE);
|
||||
|
||||
/* Increment the packet length by the size of the IP header */
|
||||
pNbuf->length += IP_HDR_SIZE;
|
||||
/* Increment the packet length by the size of the IP header */
|
||||
pNbuf->length += IP_HDR_SIZE;
|
||||
|
||||
/*
|
||||
* Determine the hardware address of the recipient
|
||||
*/
|
||||
IP_ADDR bc = { 255, 255, 255, 255};
|
||||
if (memcmp(bc, dest, 4) != 0)
|
||||
{
|
||||
route = ip_resolve_route(nif, dest);
|
||||
if (route == NULL)
|
||||
{
|
||||
dbg("%s: Unable to locate %d.%d.%d.%d\r\n", __FUNCTION__,
|
||||
dest[0], dest[1], dest[2], dest[3]);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
route = bc;
|
||||
dbg("%s: route = broadcast\r\n", __FUNCTION__);
|
||||
dbg("%s: nif = %p\r\n", __FUNCTION__, nif);
|
||||
dbg("%s: nif->send = %p\r\n", __FUNCTION__, nif->send);
|
||||
}
|
||||
/*
|
||||
* Determine the hardware address of the recipient
|
||||
*/
|
||||
IP_ADDR bc = { 255, 255, 255, 255};
|
||||
if (memcmp(bc, dest, 4) != 0)
|
||||
{
|
||||
route = ip_resolve_route(nif, dest);
|
||||
if (route == NULL)
|
||||
{
|
||||
dbg("Unable to locate %d.%d.%d.%d\r\n",
|
||||
dest[0], dest[1], dest[2], dest[3]);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
route = bc;
|
||||
dbg("route = broadcast\r\n");
|
||||
dbg("nif = %p\r\n", nif);
|
||||
dbg("nif->send = %p\r\n", nif->send);
|
||||
}
|
||||
|
||||
return nif->send(nif, route, &nif->hwa[0], ETH_FRM_IP, pNbuf);
|
||||
return nif->send(nif, route, &nif->hwa[0], ETH_FRM_IP, pNbuf);
|
||||
}
|
||||
|
||||
#if defined(DEBUG_PRINT)
|
||||
void dump_ip_frame(ip_frame_hdr *ipframe)
|
||||
{
|
||||
xprintf("Version: %02X\n", ((ipframe->version_ihl & 0x00f0) >> 4));
|
||||
xprintf("IHL: %02X\n", ipframe->version_ihl & 0x000f);
|
||||
xprintf("Service: %02X\n", ipframe->service_type);
|
||||
xprintf("Length: %04X\n", ipframe->total_length);
|
||||
xprintf("Ident: %04X\n", ipframe->identification);
|
||||
xprintf("Flags: %02X\n", ((ipframe->flags_frag_offset & 0xC000) >> 14));
|
||||
xprintf("Frag: %04X\n", ipframe->flags_frag_offset & 0x3FFF);
|
||||
xprintf("TTL: %02X\n", ipframe->ttl);
|
||||
xprintf("Protocol: %02X\n", ipframe->protocol);
|
||||
xprintf("Chksum: %04X\n", ipframe->checksum);
|
||||
xprintf("Source : %d.%d.%d.%d\n",
|
||||
ipframe->source_addr[0],
|
||||
ipframe->source_addr[1],
|
||||
ipframe->source_addr[2],
|
||||
ipframe->source_addr[3]);
|
||||
xprintf("Dest : %d.%d.%d.%d\n",
|
||||
ipframe->dest_addr[0],
|
||||
ipframe->dest_addr[1],
|
||||
ipframe->dest_addr[2],
|
||||
ipframe->dest_addr[3]);
|
||||
xprintf("Options: %08X\n", ipframe->options);
|
||||
xprintf("Version: %02X\n", ((ipframe->version_ihl & 0x00f0) >> 4));
|
||||
xprintf("IHL: %02X\n", ipframe->version_ihl & 0x000f);
|
||||
xprintf("Service: %02X\n", ipframe->service_type);
|
||||
xprintf("Length: %04X\n", ipframe->total_length);
|
||||
xprintf("Ident: %04X\n", ipframe->identification);
|
||||
xprintf("Flags: %02X\n", ((ipframe->flags_frag_offset & 0xC000) >> 14));
|
||||
xprintf("Frag: %04X\n", ipframe->flags_frag_offset & 0x3FFF);
|
||||
xprintf("TTL: %02X\n", ipframe->ttl);
|
||||
xprintf("Protocol: %02X\n", ipframe->protocol);
|
||||
xprintf("Chksum: %04X\n", ipframe->checksum);
|
||||
xprintf("Source : %d.%d.%d.%d\n",
|
||||
ipframe->source_addr[0],
|
||||
ipframe->source_addr[1],
|
||||
ipframe->source_addr[2],
|
||||
ipframe->source_addr[3]);
|
||||
xprintf("Dest : %d.%d.%d.%d\n",
|
||||
ipframe->dest_addr[0],
|
||||
ipframe->dest_addr[1],
|
||||
ipframe->dest_addr[2],
|
||||
ipframe->dest_addr[3]);
|
||||
xprintf("Options: %08X\n", ipframe->options);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
uint16_t ip_chksum(uint16_t *data, int num)
|
||||
{
|
||||
int chksum, ichksum;
|
||||
uint16_t temp;
|
||||
int chksum, ichksum;
|
||||
uint16_t temp;
|
||||
|
||||
chksum = 0;
|
||||
num = num >> 1; /* from bytes to words */
|
||||
for (; num; num--, data++)
|
||||
{
|
||||
temp = *data;
|
||||
ichksum = chksum + temp;
|
||||
ichksum = ichksum & 0x0000FFFF;
|
||||
if ((ichksum < temp) || (ichksum < chksum))
|
||||
{
|
||||
ichksum += 1;
|
||||
ichksum = ichksum & 0x0000FFFF;
|
||||
}
|
||||
chksum = ichksum;
|
||||
}
|
||||
return (uint16_t) ~chksum;
|
||||
chksum = 0;
|
||||
num = num >> 1; /* from bytes to words */
|
||||
for (; num; num--, data++)
|
||||
{
|
||||
temp = *data;
|
||||
ichksum = chksum + temp;
|
||||
ichksum = ichksum & 0x0000FFFF;
|
||||
if ((ichksum < temp) || (ichksum < chksum))
|
||||
{
|
||||
ichksum += 1;
|
||||
ichksum = ichksum & 0x0000FFFF;
|
||||
}
|
||||
chksum = ichksum;
|
||||
}
|
||||
return (uint16_t) ~chksum;
|
||||
}
|
||||
|
||||
static int validate_ip_hdr(NIF *nif, ip_frame_hdr *ipframe)
|
||||
{
|
||||
int index, chksum;
|
||||
IP_INFO *info;
|
||||
int index, chksum;
|
||||
IP_INFO *info;
|
||||
|
||||
/*
|
||||
* Check the IP Version
|
||||
*/
|
||||
if (IP_VERSION(ipframe) != 4)
|
||||
return 0;
|
||||
/*
|
||||
* Check the IP Version
|
||||
*/
|
||||
if (IP_VERSION(ipframe) != 4)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Check Internet Header Length
|
||||
*/
|
||||
if (IP_IHL(ipframe) < 5)
|
||||
return 0;
|
||||
/*
|
||||
* Check Internet Header Length
|
||||
*/
|
||||
if (IP_IHL(ipframe) < 5)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Check the destination IP address
|
||||
*/
|
||||
info = nif_get_protocol_info(nif,ETH_FRM_IP);
|
||||
for (index = 0; index < sizeof(IP_ADDR); index++)
|
||||
if (info->myip[index] != ipframe->dest_addr[index])
|
||||
return 0;
|
||||
/*
|
||||
* Check the destination IP address
|
||||
*/
|
||||
info = nif_get_protocol_info(nif,ETH_FRM_IP);
|
||||
for (index = 0; index < sizeof(IP_ADDR); index++)
|
||||
if (info->myip[index] != ipframe->dest_addr[index])
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Check the checksum
|
||||
*/
|
||||
chksum = (int)((uint16_t) IP_CHKSUM(ipframe));
|
||||
IP_CHKSUM(ipframe) = 0;
|
||||
/*
|
||||
* Check the checksum
|
||||
*/
|
||||
chksum = (int)((uint16_t) IP_CHKSUM(ipframe));
|
||||
IP_CHKSUM(ipframe) = 0;
|
||||
|
||||
if (ip_chksum((uint16_t *) ipframe, IP_IHL(ipframe) * 4) != chksum)
|
||||
return 0;
|
||||
if (ip_chksum((uint16_t *) ipframe, IP_IHL(ipframe) * 4) != chksum)
|
||||
return 0;
|
||||
|
||||
IP_CHKSUM(ipframe) = (uint16_t) chksum;
|
||||
IP_CHKSUM(ipframe) = (uint16_t) chksum;
|
||||
|
||||
return 1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
void ip_handler(NIF *nif, NBUF *pNbuf)
|
||||
{
|
||||
/*
|
||||
* IP packet handler
|
||||
*/
|
||||
ip_frame_hdr *ipframe;
|
||||
/*
|
||||
* IP packet handler
|
||||
*/
|
||||
ip_frame_hdr *ipframe;
|
||||
|
||||
dbg("%s: packet received\r\n", __FUNCTION__);
|
||||
dbg("packet received\r\n");
|
||||
|
||||
ipframe = (ip_frame_hdr *) &pNbuf->data[pNbuf->offset];
|
||||
ipframe = (ip_frame_hdr *) &pNbuf->data[pNbuf->offset];
|
||||
|
||||
/*
|
||||
* Verify valid IP header and destination IP
|
||||
*/
|
||||
if (!validate_ip_hdr(nif, ipframe))
|
||||
{
|
||||
nbuf_free(pNbuf);
|
||||
return;
|
||||
}
|
||||
/*
|
||||
* Verify valid IP header and destination IP
|
||||
*/
|
||||
if (!validate_ip_hdr(nif, ipframe))
|
||||
{
|
||||
dbg("not a valid IP packet!\r\n");
|
||||
|
||||
pNbuf->offset += (IP_IHL(ipframe) * 4);
|
||||
pNbuf->length = (uint16_t)(IP_LENGTH(ipframe) - (IP_IHL(ipframe) * 4));
|
||||
nbuf_free(pNbuf);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Call the appriopriate handler
|
||||
*/
|
||||
switch (IP_PROTOCOL(ipframe))
|
||||
{
|
||||
case IP_PROTO_ICMP:
|
||||
// FIXME: icmp_handler(nif, pNbuf);
|
||||
break;
|
||||
case IP_PROTO_UDP:
|
||||
udp_handler(nif,pNbuf);
|
||||
break;
|
||||
default:
|
||||
nbuf_free(pNbuf);
|
||||
break;
|
||||
}
|
||||
return;
|
||||
/*
|
||||
* Call the appriopriate handler
|
||||
*/
|
||||
switch (IP_PROTOCOL(ipframe))
|
||||
{
|
||||
case IP_PROTO_ICMP:
|
||||
// FIXME: icmp_handler(nif, pNbuf);
|
||||
break;
|
||||
case IP_PROTO_UDP:
|
||||
udp_handler(nif,pNbuf);
|
||||
break;
|
||||
default:
|
||||
dbg("no protocol handler registered for protocol %d\r\n",
|
||||
__FUNCTION__, IP_PROTOCOL(ipframe));
|
||||
nbuf_free(pNbuf);
|
||||
break;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
201
net/nbuf.c
201
net/nbuf.c
@@ -2,7 +2,7 @@
|
||||
* File: nbuf.c
|
||||
* Purpose: Implementation of network buffer scheme.
|
||||
*
|
||||
* Notes:
|
||||
* Notes:
|
||||
*/
|
||||
#include "queue.h"
|
||||
#include "net.h"
|
||||
@@ -12,9 +12,9 @@
|
||||
#include "bas_printf.h"
|
||||
|
||||
|
||||
//#define DBG_NBUF
|
||||
#define DBG_NBUF
|
||||
#if defined(DBG_NBUF)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_NBUF */
|
||||
@@ -39,72 +39,73 @@ uint8_t *unaligned_buffers[NBUF_MAX];
|
||||
*/
|
||||
int nbuf_init(void)
|
||||
{
|
||||
int i;
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
NBUF *nbuf;
|
||||
|
||||
for (i=0; i<NBUF_MAXQ; ++i)
|
||||
{
|
||||
/* Initialize all the queues */
|
||||
queue_init(&nbuf_queue[i]);
|
||||
}
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
/* Initialize all the queues */
|
||||
queue_init(&nbuf_queue[i]);
|
||||
}
|
||||
|
||||
dbg("%s: Creating %d net buffers of %d bytes\r\n", __FUNCTION__, NBUF_MAX, NBUF_SZ);
|
||||
dbg("Creating %d net buffers of %d bytes\r\n", NBUF_MAX, NBUF_SZ);
|
||||
|
||||
for (i = 0; i < NBUF_MAX; ++i)
|
||||
{
|
||||
/* Allocate memory for the network buffer structure */
|
||||
nbuf = (NBUF *) driver_mem_alloc(sizeof(NBUF));
|
||||
if (!nbuf)
|
||||
{
|
||||
xprintf("failed to allocate nbuf\r\n");
|
||||
return 1;
|
||||
}
|
||||
for (i = 0; i < NBUF_MAX; ++i)
|
||||
{
|
||||
/* Allocate memory for the network buffer structure */
|
||||
nbuf = (NBUF *) driver_mem_alloc(sizeof(NBUF));
|
||||
if (!nbuf)
|
||||
{
|
||||
xprintf("failed to allocate nbuf\r\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Allocate memory for the actual data */
|
||||
unaligned_buffers[i] = driver_mem_alloc(NBUF_SZ + 16);
|
||||
nbuf->data = (uint8_t *)((uint32_t)(unaligned_buffers[i] + 15) & 0xFFFFFFF0);
|
||||
if (!nbuf->data)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
/* Allocate memory for the actual data */
|
||||
unaligned_buffers[i] = driver_mem_alloc(NBUF_SZ + 16);
|
||||
nbuf->data = (uint8_t *)((uint32_t)(unaligned_buffers[i] + 15) & 0xFFFFFFF0);
|
||||
if (!nbuf->data)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Initialize the network buffer */
|
||||
nbuf->offset = 0;
|
||||
nbuf->length = 0;
|
||||
/* Initialize the network buffer */
|
||||
nbuf->offset = 0;
|
||||
nbuf->length = 0;
|
||||
|
||||
/* Add the network buffer to the free list */
|
||||
queue_add(&nbuf_queue[NBUF_FREE], (QNODE *)nbuf);
|
||||
}
|
||||
/* Add the network buffer to the free list */
|
||||
queue_add(&nbuf_queue[NBUF_FREE], (QNODE *)nbuf);
|
||||
}
|
||||
|
||||
dbg("%s: NBUF allocation complete\r\n", __FUNCTION__);
|
||||
dbg("NBUF allocation complete\r\n");
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
/*
|
||||
* Return all the allocated memory to the heap
|
||||
*/
|
||||
void nbuf_flush(void)
|
||||
{
|
||||
NBUF *nbuf;
|
||||
int i, level = set_ipl(7);
|
||||
int n = 0;
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
int level = set_ipl(7);
|
||||
int n = 0;
|
||||
|
||||
for (i = 0; i < NBUF_MAX; ++i)
|
||||
driver_mem_free((uint8_t *) unaligned_buffers[i]);
|
||||
for (i = 0; i < NBUF_MAX; ++i)
|
||||
driver_mem_free((uint8_t *) unaligned_buffers[i]);
|
||||
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
while ((nbuf = (NBUF *) queue_remove(&nbuf_queue[i])) != NULL)
|
||||
{
|
||||
driver_mem_free(nbuf);
|
||||
++n;
|
||||
}
|
||||
}
|
||||
set_ipl(level);
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
while ((nbuf = (NBUF *) queue_remove(&nbuf_queue[i])) != NULL)
|
||||
{
|
||||
driver_mem_free(nbuf);
|
||||
++n;
|
||||
}
|
||||
}
|
||||
set_ipl(level);
|
||||
}
|
||||
|
||||
/*
|
||||
/*
|
||||
* Allocate a network buffer from the free list
|
||||
*
|
||||
* Return Value:
|
||||
@@ -113,13 +114,13 @@ void nbuf_flush(void)
|
||||
*/
|
||||
NBUF *nbuf_alloc(void)
|
||||
{
|
||||
NBUF *nbuf;
|
||||
int level = set_ipl(7);
|
||||
NBUF *nbuf;
|
||||
int level = set_ipl(7);
|
||||
|
||||
nbuf = (NBUF *) queue_remove(&nbuf_queue[NBUF_FREE]);
|
||||
set_ipl(level);
|
||||
nbuf = (NBUF *) queue_remove(&nbuf_queue[NBUF_FREE]);
|
||||
set_ipl(level);
|
||||
|
||||
return nbuf;
|
||||
return nbuf;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -130,13 +131,13 @@ NBUF *nbuf_alloc(void)
|
||||
*/
|
||||
void nbuf_free(NBUF *nbuf)
|
||||
{
|
||||
int level = set_ipl(7);
|
||||
int level = set_ipl(7);
|
||||
|
||||
nbuf->offset = 0;
|
||||
nbuf->length = NBUF_SZ;
|
||||
queue_add(&nbuf_queue[NBUF_FREE],(QNODE *) nbuf);
|
||||
nbuf->offset = 0;
|
||||
nbuf->length = NBUF_SZ;
|
||||
queue_add(&nbuf_queue[NBUF_FREE],(QNODE *) nbuf);
|
||||
|
||||
set_ipl(level);
|
||||
set_ipl(level);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -147,13 +148,13 @@ void nbuf_free(NBUF *nbuf)
|
||||
*/
|
||||
NBUF *nbuf_remove(int q)
|
||||
{
|
||||
NBUF *nbuf;
|
||||
int level = set_ipl(7);
|
||||
NBUF *nbuf;
|
||||
int level = set_ipl(7);
|
||||
|
||||
nbuf = (NBUF *) queue_remove(&nbuf_queue[q]);
|
||||
set_ipl(level);
|
||||
nbuf = (NBUF *) queue_remove(&nbuf_queue[q]);
|
||||
set_ipl(level);
|
||||
|
||||
return nbuf;
|
||||
return nbuf;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -164,26 +165,27 @@ NBUF *nbuf_remove(int q)
|
||||
*/
|
||||
void nbuf_add(int q, NBUF *nbuf)
|
||||
{
|
||||
int level = set_ipl(7);
|
||||
int level = set_ipl(7);
|
||||
|
||||
queue_add(&nbuf_queue[q], (QNODE *) nbuf);
|
||||
set_ipl(level);
|
||||
queue_add(&nbuf_queue[q], (QNODE *) nbuf);
|
||||
set_ipl(level);
|
||||
}
|
||||
|
||||
/*
|
||||
* Put all the network buffers back into the free list
|
||||
* Put all the network buffers back into the free list
|
||||
*/
|
||||
void nbuf_reset(void)
|
||||
{
|
||||
NBUF *nbuf;
|
||||
int i, level = set_ipl(7);
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
int level = set_ipl(7);
|
||||
|
||||
for (i = 1; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
while ((nbuf = nbuf_remove(i)) != NULL)
|
||||
nbuf_free(nbuf);
|
||||
}
|
||||
set_ipl(level);
|
||||
for (i = 1; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
while ((nbuf = nbuf_remove(i)) != NULL)
|
||||
nbuf_free(nbuf);
|
||||
}
|
||||
set_ipl(level);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -192,28 +194,31 @@ void nbuf_reset(void)
|
||||
void nbuf_debug_dump(void)
|
||||
{
|
||||
#ifdef DBG_NBUF
|
||||
NBUF *nbuf;
|
||||
int i, j, level;
|
||||
NBUF *nbuf;
|
||||
int i;
|
||||
int j;
|
||||
int level;
|
||||
|
||||
level = set_ipl(7);
|
||||
level = set_ipl(7);
|
||||
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
dbg("\r\n\r\nQueue #%d\r\n\r\n", i);
|
||||
dbg("\tBuffer Location\tOffset\tLength\r\n");
|
||||
dbg("--------------------------------------\r\n");
|
||||
j = 0;
|
||||
nbuf = (NBUF *) queue_peek(&nbuf_queue[i]);
|
||||
while (nbuf != NULL)
|
||||
{
|
||||
dbg("%d\t0x%08x\t0x%04x\t0x%04x\r\n", j++, nbuf->data,
|
||||
nbuf->offset,
|
||||
nbuf->length);
|
||||
nbuf = (NBUF *) nbuf->node.next;
|
||||
}
|
||||
}
|
||||
dbg("\r\n");
|
||||
for (i = 0; i < NBUF_MAXQ; ++i)
|
||||
{
|
||||
dbg("\r\n\r\nQueue #%d\r\n\r\n", i);
|
||||
dbg("\tBuffer Location\tOffset\tLength\r\n");
|
||||
dbg("--------------------------------------\r\n");
|
||||
j = 0;
|
||||
nbuf = (NBUF *) queue_peek(&nbuf_queue[i]);
|
||||
|
||||
set_ipl(level);
|
||||
while (nbuf != NULL)
|
||||
{
|
||||
dbg("%d\t0x%08x\t0x%04x\t0x%04x\r\n", j++, nbuf->data,
|
||||
nbuf->offset,
|
||||
nbuf->length);
|
||||
nbuf = (NBUF *) nbuf->node.next;
|
||||
}
|
||||
}
|
||||
dbg("\r\n");
|
||||
|
||||
set_ipl(level);
|
||||
#endif /* DBG_NBUF */
|
||||
}
|
||||
|
||||
263
net/net_timer.c
263
net/net_timer.c
@@ -5,16 +5,15 @@
|
||||
*
|
||||
* Notes:
|
||||
*/
|
||||
|
||||
#include "net_timer.h"
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "bas_printf.h"
|
||||
#include "MCF5475.h"
|
||||
#include "interrupts.h"
|
||||
|
||||
//#define DBG_TMR
|
||||
#ifdef DBG_TMR
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_TMR */
|
||||
@@ -24,174 +23,180 @@
|
||||
#include "firebee.h"
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
#error unknown machine!
|
||||
#endif
|
||||
|
||||
static NET_TIMER net_timer[4] =
|
||||
{
|
||||
{0, 0, 0, 0, 0, 0, 0},
|
||||
{0, 0, 0, 0, 0, 0, 0},
|
||||
{0, 0, 0, 0, 0, 0, 0},
|
||||
{0, 0, 0, 0, 0, 0, 0}
|
||||
{0, 0, 0, 0, 0, 0, 0},
|
||||
{0, 0, 0, 0, 0, 0, 0},
|
||||
{0, 0, 0, 0, 0, 0, 0},
|
||||
{0, 0, 0, 0, 0, 0, 0}
|
||||
};
|
||||
|
||||
|
||||
int timer_default_isr(void *not_used, NET_TIMER *t)
|
||||
bool timer_default_isr(void *not_used, NET_TIMER *t)
|
||||
{
|
||||
(void) not_used;
|
||||
(void) not_used;
|
||||
|
||||
/*
|
||||
* Clear the pending event
|
||||
*/
|
||||
MCF_GPT_GMS(t->ch) = 0;
|
||||
/*
|
||||
* Clear the pending event
|
||||
*/
|
||||
MCF_GPT_GMS(t->ch) = 0;
|
||||
|
||||
dbg("%s: timer isr called for timer channel %d\r\n", __FUNCTION__);
|
||||
dbg("timer isr called for timer channel %d\r\n");
|
||||
|
||||
/*
|
||||
* Clear the reference - the desired seconds have expired
|
||||
*/
|
||||
t->reference = 0;
|
||||
/*
|
||||
* Clear the reference - the desired seconds have expired
|
||||
*/
|
||||
t->reference = 0;
|
||||
|
||||
return 1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
void timer_irq_enable(uint8_t ch)
|
||||
{
|
||||
/*
|
||||
* Setup the appropriate ICR
|
||||
*/
|
||||
MCF_INTC_ICR(TIMER_VECTOR(ch) - 64) =
|
||||
(uint8_t)(0
|
||||
| MCF_INTC_ICR_IP(net_timer[ch].pri)
|
||||
| MCF_INTC_ICR_IL(net_timer[ch].lvl));
|
||||
/*
|
||||
* Setup the appropriate ICR
|
||||
*/
|
||||
MCF_INTC_ICR(TIMER_VECTOR(ch) - 64) = MCF_INTC_ICR_IP(net_timer[ch].pri) |
|
||||
MCF_INTC_ICR_IL(net_timer[ch].lvl);
|
||||
|
||||
/*
|
||||
* Unmask the FEC interrupt in the interrupt controller
|
||||
*/
|
||||
if (ch == 3)
|
||||
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK59;
|
||||
else if (ch == 2)
|
||||
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK60;
|
||||
else if (ch == 1)
|
||||
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK61;
|
||||
else
|
||||
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK62;
|
||||
/*
|
||||
* Unmask the FEC interrupt in the interrupt controller
|
||||
*/
|
||||
if (ch == 3)
|
||||
{
|
||||
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK59;
|
||||
}
|
||||
else if (ch == 2)
|
||||
{
|
||||
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK60;
|
||||
}
|
||||
else if (ch == 1)
|
||||
{
|
||||
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK61;
|
||||
}
|
||||
else
|
||||
{
|
||||
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK62;
|
||||
}
|
||||
}
|
||||
|
||||
bool timer_set_secs(uint8_t ch, uint32_t secs)
|
||||
{
|
||||
uint16_t timeout;
|
||||
uint16_t timeout;
|
||||
|
||||
/*
|
||||
* Reset the timer
|
||||
*/
|
||||
MCF_GPT_GMS(ch) = 0;
|
||||
/*
|
||||
* Reset the timer
|
||||
*/
|
||||
MCF_GPT_GMS(ch) = 0;
|
||||
|
||||
/*
|
||||
* Get the timeout in seconds
|
||||
*/
|
||||
timeout = (uint16_t)(secs * net_timer[ch].cnt);
|
||||
/*
|
||||
* Get the timeout in seconds
|
||||
*/
|
||||
timeout = (uint16_t)(secs * net_timer[ch].cnt);
|
||||
|
||||
/*
|
||||
* Set the reference indicating that we have not yet reached the
|
||||
* desired timeout
|
||||
*/
|
||||
net_timer[ch].reference = 1;
|
||||
/*
|
||||
* Set the reference indicating that we have not yet reached the
|
||||
* desired timeout
|
||||
*/
|
||||
net_timer[ch].reference = 1;
|
||||
|
||||
/*
|
||||
* Enable timer interrupt to the processor
|
||||
*/
|
||||
timer_irq_enable(ch);
|
||||
/*
|
||||
* Enable timer interrupt to the processor
|
||||
*/
|
||||
timer_irq_enable(ch);
|
||||
|
||||
/*
|
||||
* Enable the timer using the pre-calculated values
|
||||
*/
|
||||
MCF_GPT_GCIR(ch) = (0
|
||||
| MCF_GPT_GCIR_CNT(timeout)
|
||||
| MCF_GPT_GCIR_PRE(net_timer[ch].pre)
|
||||
);
|
||||
MCF_GPT_GMS(ch) = net_timer[ch].gms;
|
||||
/*
|
||||
* Enable the timer using the pre-calculated values
|
||||
*/
|
||||
MCF_GPT_GCIR(ch) = (0
|
||||
| MCF_GPT_GCIR_CNT(timeout)
|
||||
| MCF_GPT_GCIR_PRE(net_timer[ch].pre)
|
||||
);
|
||||
MCF_GPT_GMS(ch) = net_timer[ch].gms;
|
||||
|
||||
return true;
|
||||
return true;
|
||||
}
|
||||
|
||||
uint32_t timer_get_reference(uint8_t ch)
|
||||
{
|
||||
return (uint32_t) net_timer[ch].reference;
|
||||
{
|
||||
return (uint32_t) net_timer[ch].reference;
|
||||
}
|
||||
|
||||
bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
|
||||
{
|
||||
/*
|
||||
* Initialize the timer to expire after one second
|
||||
*
|
||||
* This routine should only be called by the project (board) specific
|
||||
* initialization code.
|
||||
*/
|
||||
if (!((ch <= 3) && (lvl <= 7) && (lvl >= 1) && (pri <= 7)))
|
||||
{
|
||||
dbg("%s: illegal parameters (ch=%d, lvl=%d, pri=%d)\r\n", __FUNCTION__,
|
||||
ch, lvl, pri);
|
||||
/*
|
||||
* Initialize the timer to expire after one second
|
||||
*
|
||||
* This routine should only be called by the project (board) specific
|
||||
* initialization code.
|
||||
*/
|
||||
if (!((ch <= 3) && (lvl <= 7) && (lvl >= 1) && (pri <= 7)))
|
||||
{
|
||||
dbg("illegal parameters (ch=%d, lvl=%d, pri=%d)\r\n", ch, lvl, pri);
|
||||
|
||||
return false;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
/*
|
||||
* Reset the timer
|
||||
*/
|
||||
MCF_GPT_GMS(ch) = 0;
|
||||
/*
|
||||
* Reset the timer
|
||||
*/
|
||||
MCF_GPT_GMS(ch) = 0;
|
||||
|
||||
/*
|
||||
* Save off the channel, and interrupt lvl/pri information
|
||||
*/
|
||||
net_timer[ch].ch = ch;
|
||||
net_timer[ch].lvl = lvl;
|
||||
net_timer[ch].pri = pri;
|
||||
/*
|
||||
* Save off the channel, and interrupt lvl/pri information
|
||||
*/
|
||||
net_timer[ch].ch = ch;
|
||||
net_timer[ch].lvl = lvl;
|
||||
net_timer[ch].pri = pri;
|
||||
|
||||
/*
|
||||
* Register the timer interrupt handler
|
||||
*/
|
||||
if (!isr_register_handler(ISR_DBUG_ISR,
|
||||
TIMER_VECTOR(ch),
|
||||
(int (*)(void *,void *)) timer_default_isr,
|
||||
NULL,
|
||||
(void *) &net_timer[ch])
|
||||
)
|
||||
{
|
||||
dbg("%s: could not register timer interrupt handler\r\n", __FUNCTION__);
|
||||
return false;
|
||||
}
|
||||
dbg("%s: timer handler registered\r\n", __FUNCTION__);
|
||||
/*
|
||||
* Register the timer interrupt handler
|
||||
*/
|
||||
if (!isr_register_handler(TIMER_VECTOR(ch), 3, 0,
|
||||
(bool (*)(void *,void *)) timer_default_isr,
|
||||
NULL,
|
||||
(void *) &net_timer[ch])
|
||||
)
|
||||
{
|
||||
dbg("could not register timer interrupt handler\r\n");
|
||||
return false;
|
||||
}
|
||||
dbg("timer handler registered\r\n", __FUNCTION__);
|
||||
|
||||
/*
|
||||
* Calculate the require CNT value to get a 1 second timeout
|
||||
*
|
||||
* 1 sec = CNT * Clk Period * PRE
|
||||
* CNT = 1 sec / (Clk Period * PRE)
|
||||
* CNT = Clk Freq / PRE
|
||||
*
|
||||
* The system clock frequency is defined as SYSTEM_CLOCK and
|
||||
* is given in MHz. We need to multiple it by 1000000 to get the
|
||||
* true value. If we assume PRE to be the maximum of 0xFFFF,
|
||||
* then the CNT value needed to achieve a 1 second timeout is
|
||||
* given by:
|
||||
*
|
||||
* CNT = SYSTEM_CLOCK * (1000000/0xFFFF)
|
||||
*/
|
||||
net_timer[ch].pre = 0xFFFF;
|
||||
net_timer[ch].cnt = (uint16_t) ((SYSCLK / 1000) * (1000000 / 0xFFFF));
|
||||
/*
|
||||
* Calculate the require CNT value to get a 1 second timeout
|
||||
*
|
||||
* 1 sec = CNT * Clk Period * PRE
|
||||
* CNT = 1 sec / (Clk Period * PRE)
|
||||
* CNT = Clk Freq / PRE
|
||||
*
|
||||
* The system clock frequency is defined as SYSTEM_CLOCK and
|
||||
* is given in MHz. We need to multiple it by 1000000 to get the
|
||||
* true value. If we assume PRE to be the maximum of 0xFFFF,
|
||||
* then the CNT value needed to achieve a 1 second timeout is
|
||||
* given by:
|
||||
*
|
||||
* CNT = SYSTEM_CLOCK * (1000000/0xFFFF)
|
||||
*/
|
||||
net_timer[ch].pre = 0xFFFF;
|
||||
net_timer[ch].cnt = (uint16_t) ((SYSCLK / 1000) * (1000000 / 0xFFFF));
|
||||
|
||||
/*
|
||||
* Save off the appropriate mode select register value
|
||||
*/
|
||||
net_timer[ch].gms = (0
|
||||
| MCF_GPT_GMS_TMS_GPIO
|
||||
| MCF_GPT_GMS_IEN
|
||||
| MCF_GPT_GMS_SC
|
||||
| MCF_GPT_GMS_CE
|
||||
);
|
||||
/*
|
||||
* Save off the appropriate mode select register value
|
||||
*/
|
||||
net_timer[ch].gms = (0
|
||||
| MCF_GPT_GMS_TMS_GPIO
|
||||
| MCF_GPT_GMS_IEN
|
||||
| MCF_GPT_GMS_SC
|
||||
| MCF_GPT_GMS_CE
|
||||
);
|
||||
|
||||
return true;
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
169
net/nif.c
169
net/nif.c
@@ -11,123 +11,120 @@
|
||||
#include "bas_types.h"
|
||||
#include "bas_printf.h"
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#define DBG_NIF
|
||||
#ifdef DBG_NIF
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_NIF */
|
||||
|
||||
int nif_protocol_exist(NIF *nif, uint16_t protocol)
|
||||
{
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and if a protocol handler exists,
|
||||
* true is returned. This function is useful for network cards
|
||||
* that needn't read in the entire frame but can discard frames
|
||||
* arbitrarily.
|
||||
*/
|
||||
int index;
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and if a protocol handler exists,
|
||||
* true is returned. This function is useful for network cards
|
||||
* that needn't read in the entire frame but can discard frames
|
||||
* arbitrarily.
|
||||
*/
|
||||
int index;
|
||||
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return false;
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
void nif_protocol_handler(NIF *nif, uint16_t protocol, NBUF *pNbuf)
|
||||
{
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and if a protocol handler exists,
|
||||
* the protocol handler is invoked. This routine called by
|
||||
* network device driver after receiving a frame.
|
||||
*/
|
||||
int index;
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and if a protocol handler exists,
|
||||
* the protocol handler is invoked. This routine called by
|
||||
* network device driver after receiving a frame.
|
||||
*/
|
||||
int index;
|
||||
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
{
|
||||
dbg("%s: call protocol handler for protocol %d at %p\r\n", __FUNCTION__, protocol,
|
||||
nif->protocol[index].handler);
|
||||
nif->protocol[index].handler(nif,pNbuf);
|
||||
return;
|
||||
}
|
||||
}
|
||||
dbg("%s: no protocol handler found for protocol %d\r\n", __FUNCTION__, protocol);
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
{
|
||||
dbg("call protocol handler for protocol %d at %p\r\n", protocol,
|
||||
nif->protocol[index].handler);
|
||||
nif->protocol[index].handler(nif,pNbuf);
|
||||
return;
|
||||
}
|
||||
}
|
||||
dbg("no protocol handler found for protocol %d\r\n", protocol);
|
||||
}
|
||||
|
||||
void *nif_get_protocol_info(NIF *nif, uint16_t protocol)
|
||||
{
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and returns a pointer to the
|
||||
* config info for 'protocol', otherwise NULL is returned.
|
||||
*/
|
||||
int index;
|
||||
/*
|
||||
* This function searches the list of supported protocols
|
||||
* on the particular NIF and returns a pointer to the
|
||||
* config info for 'protocol', otherwise NULL is returned.
|
||||
*/
|
||||
int index;
|
||||
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
return (void *)nif->protocol[index].info;
|
||||
}
|
||||
return (void *)0;
|
||||
for (index = 0; index < nif->num_protocol; ++index)
|
||||
{
|
||||
if (nif->protocol[index].protocol == protocol)
|
||||
return (void *)nif->protocol[index].info;
|
||||
}
|
||||
return (void *)0;
|
||||
}
|
||||
|
||||
int nif_bind_protocol(NIF *nif, uint16_t protocol, void (*handler)(NIF *,NBUF *),
|
||||
void *info)
|
||||
void *info)
|
||||
{
|
||||
/*
|
||||
* This function registers 'protocol' as a supported
|
||||
* protocol in 'nif'.
|
||||
*/
|
||||
if (nif->num_protocol < (MAX_SUP_PROTO - 1))
|
||||
{
|
||||
nif->protocol[nif->num_protocol].protocol = protocol;
|
||||
nif->protocol[nif->num_protocol].handler = (void(*)(NIF*,NBUF*))handler;
|
||||
nif->protocol[nif->num_protocol].info = info;
|
||||
++nif->num_protocol;
|
||||
/*
|
||||
* This function registers 'protocol' as a supported
|
||||
* protocol in 'nif'.
|
||||
*/
|
||||
if (nif->num_protocol < (MAX_SUP_PROTO - 1))
|
||||
{
|
||||
nif->protocol[nif->num_protocol].protocol = protocol;
|
||||
nif->protocol[nif->num_protocol].handler = (void(*)(NIF *, NBUF *)) handler;
|
||||
nif->protocol[nif->num_protocol].info = info;
|
||||
++nif->num_protocol;
|
||||
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
NIF *nif_init (NIF *nif)
|
||||
{
|
||||
int i;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ETH_ADDR_LEN; ++i)
|
||||
{
|
||||
nif->hwa[i] = 0;
|
||||
nif->broadcast[i] = 0xFF;
|
||||
}
|
||||
for (i = 0; i < ETH_ADDR_LEN; ++i)
|
||||
{
|
||||
nif->hwa[i] = 0;
|
||||
nif->broadcast[i] = 0xFF;
|
||||
}
|
||||
|
||||
for (i = 0; i < MAX_SUP_PROTO; ++i)
|
||||
{
|
||||
nif->protocol[i].protocol = 0;
|
||||
nif->protocol[i].handler = 0;
|
||||
nif->protocol[i].info = 0;
|
||||
}
|
||||
nif->num_protocol = 0;
|
||||
for (i = 0; i < MAX_SUP_PROTO; ++i)
|
||||
{
|
||||
nif->protocol[i].protocol = 0;
|
||||
nif->protocol[i].handler = 0;
|
||||
nif->protocol[i].info = 0;
|
||||
}
|
||||
nif->num_protocol = 0;
|
||||
|
||||
nif->mtu = 0;
|
||||
nif->ch = 0;
|
||||
nif->send = 0;
|
||||
nif->mtu = 0;
|
||||
nif->ch = 0;
|
||||
nif->send = 0;
|
||||
|
||||
nif->f_rx = 0;
|
||||
nif->f_tx = 0;
|
||||
nif->f_rx_err = 0;
|
||||
nif->f_tx_err = 0;
|
||||
nif->f_err = 0;
|
||||
nif->f_rx = 0;
|
||||
nif->f_tx = 0;
|
||||
nif->f_rx_err = 0;
|
||||
nif->f_tx_err = 0;
|
||||
nif->f_err = 0;
|
||||
|
||||
return nif;
|
||||
return nif;
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user