added code to halt machine after a fatal error

refactored struct naming
fixed typo
2015-01-17 08:03:50 +00:00 · 2015-01-16 07:35:35 +00:00 · 2015-01-15 15:16:51 +00:00 · 2015-01-14 18:38:33 +00:00 · 2015-01-13 07:05:08 +00:00 · 2015-01-12 21:37:44 +00:00
186 changed files with 31967 additions and 12888 deletions
--- a/.gdbinit
+++ b/.gdbinit
@@ -1,7 +1,9 @@
 #set disassemble-next-line on
 define tr
-	#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
-	target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
+	#!killall m68k-bdm-gdbserver
+	target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
+	#target remote localhost:1234
+	#target remote | m68k-bdm-gdbserver pipe /dev/tblcf1
 	#target dbug /dev/ttyS0
 	#monitor bdm-reset
 end
--- a/BaS_gcc.config
+++ b/BaS_gcc.config
@@ -0,0 +1 @@
+// ADD PREDEFINED MACROS HERE!
--- a/BaS_gcc.creator
+++ b/BaS_gcc.creator
@@ -0,0 +1 @@
+[General]
--- a/BaS_gcc.files
+++ b/BaS_gcc.files
@@ -0,0 +1,200 @@
+dma/dma.c
+dma/MCD_dmaApi.c
+dma/MCD_tasks.c
+dma/MCD_tasksInit.c
+exe/basflash.c
+exe/basflash_start.c
+flash/flash.c
+flash/s19reader.c
+fs/cc932.c
+fs/cc936.c
+fs/cc949.c
+fs/cc950.c
+fs/ccsbcs.c
+fs/ff.c
+fs/unicode.c
+if/driver_vec.c
+include/acia.h
+include/am79c874.h
+include/arp.h
+include/ati_ids.h
+include/bas_printf.h
+include/bas_string.h
+include/bas_types.h
+include/bas_utils.h
+include/bcm5222.h
+include/bootp.h
+include/cache.h
+include/diskio.h
+include/dma.h
+include/driver_mem.h
+include/driver_vec.h
+include/edid.h
+include/ehci.h
+include/eth.h
+include/exceptions.h
+include/fb.h
+include/fec.h
+include/fecbd.h
+include/ff.h
+include/ffconf.h
+include/firebee.h
+include/font.h
+include/i2c-algo-bit.h
+include/i2c.h
+include/icmp.h
+include/ikbd.h
+include/interrupts.h
+include/ip.h
+include/m54455.h
+include/m5484l.h
+include/MCD_dma.h
+include/mcd_initiators.h
+include/MCD_progCheck.h
+include/MCD_tasksInit.h
+include/MCF5475.h
+include/MCF5475_CLOCK.h
+include/MCF5475_CTM.h
+include/MCF5475_DMA.h
+include/MCF5475_DSPI.h
+include/MCF5475_EPORT.h
+include/MCF5475_FBCS.h
+include/MCF5475_FEC.h
+include/MCF5475_GPIO.h
+include/MCF5475_GPT.h
+include/MCF5475_I2C.h
+include/MCF5475_INTC.h
+include/MCF5475_MMU.h
+include/MCF5475_PAD.h
+include/MCF5475_PCI.h
+include/MCF5475_PCIARB.h
+include/MCF5475_PSC.h
+include/MCF5475_SDRAMC.h
+include/MCF5475_SEC.h
+include/MCF5475_SIU.h
+include/MCF5475_SLT.h
+include/MCF5475_SRAM.h
+include/MCF5475_USB.h
+include/MCF5475_XLB.h
+include/mmu.h
+include/mod_devicetable.h
+include/nbuf.h
+include/net.h
+include/net_timer.h
+include/nif.h
+include/ohci.h
+include/part.h
+include/pci.h
+include/pci_ids.h
+include/queue.h
+include/radeon_reg.h
+include/radeonfb.h
+include/s19reader.h
+include/screen.h
+include/sd_card.h
+include/startcf.h
+include/sysinit.h
+include/tftp.h
+include/udp.h
+include/usb.h
+include/usb_defs.h
+include/usb_hub.h
+include/user_io.h
+include/util.h
+include/version.h
+include/videl.h
+include/video.h
+include/wait.h
+include/x86debug.h
+include/x86decode.h
+include/x86emu.h
+include/x86emui.h
+include/x86fpu.h
+include/x86fpu_regs.h
+include/x86ops.h
+include/x86pcibios.h
+include/x86prim_asm.h
+include/x86prim_ops.h
+include/x86regs.h
+include/xhdi_sd.h
+kbd/ikbd.c
+net/am79c874.c
+net/arp.c
+net/bcm5222.c
+net/bootp.c
+net/fec.c
+net/fecbd.c
+net/ip.c
+net/nbuf.c
+net/net_timer.c
+net/nif.c
+net/queue.c
+net/tftp.c
+net/udp.c
+nutil/s19header.c
+pci/ehci-hcd.c
+pci/ohci-hcd.c
+pci/pci.c
+radeon/radeon_accel.c
+radeon/radeon_base.c
+radeon/radeon_cursor.c
+radeon/radeon_monitor.c
+spi/dspi.c
+spi/mmc.c
+spi/sd_card.c
+sys/BaS.c
+sys/cache.c
+sys/driver_mem.c
+sys/fault_vectors.c
+sys/init_fpga.c
+sys/interrupts.c
+sys/mmu.c
+sys/sysinit.c
+tos/bascook/sources/bascook.c
+tos/jtagwait/include/bas_printf.h
+tos/jtagwait/include/bas_string.h
+tos/jtagwait/include/driver_vec.h
+tos/jtagwait/include/MCF5475.h
+tos/jtagwait/include/MCF5475_CLOCK.h
+tos/jtagwait/include/MCF5475_CTM.h
+tos/jtagwait/include/MCF5475_DMA.h
+tos/jtagwait/include/MCF5475_DSPI.h
+tos/jtagwait/include/MCF5475_EPORT.h
+tos/jtagwait/include/MCF5475_FBCS.h
+tos/jtagwait/include/MCF5475_FEC.h
+tos/jtagwait/include/MCF5475_GPIO.h
+tos/jtagwait/include/MCF5475_GPT.h
+tos/jtagwait/include/MCF5475_I2C.h
+tos/jtagwait/include/MCF5475_INTC.h
+tos/jtagwait/include/MCF5475_MMU.h
+tos/jtagwait/include/MCF5475_PAD.h
+tos/jtagwait/include/MCF5475_PCI.h
+tos/jtagwait/include/MCF5475_PCIARB.h
+tos/jtagwait/include/MCF5475_PSC.h
+tos/jtagwait/include/MCF5475_SDRAMC.h
+tos/jtagwait/include/MCF5475_SEC.h
+tos/jtagwait/include/MCF5475_SIU.h
+tos/jtagwait/include/MCF5475_SLT.h
+tos/jtagwait/include/MCF5475_SRAM.h
+tos/jtagwait/include/MCF5475_USB.h
+tos/jtagwait/include/MCF5475_XLB.h
+tos/jtagwait/sources/jtagwait.c
+usb/usb.c
+usb/usb_hub.c
+usb/usb_kbd.c
+tos/jtagwait/sources/bas_printf.c
+tos/jtagwait/sources/bas_string.c
+tos/vmem_test/Makefile
+tos/vmem_test/sources/bas_printf.c
+tos/vmem_test/sources/bas_string.c
+tos/vmem_test/sources/printf_helper.S
+tos/vmem_test/sources/vmem_test.c
+sys/startcf.S
+sys/exceptions.S
+util/bas_printf.c
+util/bas_string.c
+util/printf_helper.S
+util/wait.c
+bas.lk.in
+i2c/i2c.c
+Makefile
--- a/BaS_gcc.includes
+++ b/BaS_gcc.includes
@@ -0,0 +1,2 @@
+include
+tos/jtagwait/include
--- a/1689
+++ b/1689
--- a/71
+++ b/71
@@ -1,4 +1,4 @@
-# # Makefile for Firebee BaS
+# Makefile for Firebee BaS
 #
 # This Makefile is meant for cross compiling the BaS with Vincent Riviere's cross compilers.
 # If you want to compile native on an Atari (you will need at least GCC 4.6.3), set
@@ -15,7 +15,7 @@ ifeq (Y,$(COMPILE_ELF))
 TCPREFIX=m68k-elf-
 EXE=elf
 FORMAT=elf32-m68k
-else 
+else
 TCPREFIX=m68k-atari-mint-
 EXE=s19
 FORMAT=srec
@@ -31,25 +31,28 @@ NATIVECC=gcc

 INCLUDE=-Iinclude
 CFLAGS=-mcpu=5474 \
+        -g \
 		-Wall \
-		-Os \
 		-fomit-frame-pointer \
 		-ffreestanding \
 		-fleading-underscore \
+		-mno-strict-align \
 		-Wa,--register-prefix-optional
 CFLAGS_OPTIMIZED = -mcpu=5474 \
 		-Wall \
 		-O2 \
+		-g \
 		-fomit-frame-pointer \
 		-ffreestanding \
 		-fleading-underscore \
 		-Wa,--register-prefix-optional
+LDFLAGS=-g

-TRGTDIRS= ./firebee ./m5484lite
+TRGTDIRS= ./firebee ./m5484lite ./m54455
 OBJDIRS=$(patsubst %, %/objs,$(TRGTDIRS))
 TOOLDIR=util

-VPATH=dma exe flash fs if kbd pci spi sys usb net util video radeon x86emu xhdi
+VPATH=dma exe flash fs i2c if kbd pci spi sys usb net util video radeon x86emu xhdi

 # Linker control file. The final $(LDCFILE) is intermediate only (preprocessed version of $(LDCSRC)
 LDCFILE=bas.lk
@@ -82,6 +85,7 @@ CSRCS= \
 	s19reader.c \
 	flash.c \
 	dma.c \
+        i2c.c \
 	xhdi_sd.c \
 	xhdi_interface.c \
 	pci.c \
@@ -94,7 +98,9 @@ CSRCS= \
 	usb.c \
 	ohci-hcd.c \
 	ehci-hcd.c \
+	usb_hub.c \
 	usb_mouse.c \
+	usb_kbd.c \
 	ikbd.c \
 	\
 	nbuf.c \
@@ -123,6 +129,7 @@ CSRCS= \
 	radeon_accel.c \
 	radeon_cursor.c \
 	radeon_monitor.c \
+	fnt_st_8x16.c \
 	\
 	x86decode.c \
 	x86sys.c \
@@ -135,14 +142,15 @@ CSRCS= \
 	x86pcibios.c \
 	\
 	basflash.c \
-	basflash_start.c 
+	basflash_start.c


 ASRCS= \
 	startcf.S \
 	printf_helper.S \
 	exceptions.S \
-	xhdi_vec.S
+	xhdi_vec.S \
+	pci_wrappers.S

 SRCS=$(ASRCS) $(CSRCS)
 COBJS=$(patsubst %.c,%.o,$(CSRCS))
@@ -153,12 +161,18 @@ LIBBAS=libbas.a

 LIBS=$(patsubst %,%/$(LIBBAS),$(TRGTDIRS))

-all: fls ram bfl lib
+all: ver fls ram bfl lib tos
 fls: $(patsubst %,%/$(FLASH_EXEC),$(TRGTDIRS))
 ram: $(patsubst %,%/$(RAM_EXEC),$(TRGTDIRS))
 bfl: $(patsubst %,%/$(BASFLASH_EXEC),$(TRGTDIRS))
 lib: $(LIBS)

+.PHONY: ver
+ver:
+	touch include/version.h
+.PHONY: tos
+tos:
+	(cd tos; make)

 .PHONY: clean
 clean:
@@ -170,32 +184,35 @@ clean:

 # flags for targets
 m5484lite/bas.$(EXE): MACHINE=MACHINE_M5484LITE
+m54455/bas.$(EXE): MACHINE=MACHINE_M54455
 firebee/bas.$(EXE): MACHINE=MACHINE_FIREBEE
 m5484lite/ram.$(EXE): MACHINE=MACHINE_M5484LITE
+m54455/ram.$(EXE): MACHINE=MACHINE_M54455
 firebee/ram.$(EXE): MACHINE=MACHINE_FIREBEE
 m5484lite/basflash.$(EXE): MACHINE=MACHINE_M5484LITE
+m54455/basflash.$(EXE): MACHINE=MACHINE_M54455
 firebee/basflash.$(EXE): MACHINE=MACHINE_FIREBEE

 #
 # generate pattern rules for different object files
 #
 define CC_TEMPLATE
-ifeq (firebee,$(1))
-	MACHINE=MACHINE_FIREBEE
-else
-	MACHINE=MACHINE_M5484LITE
-endif
+#ifeq (firebee,$(1))
+	#MACHINE=MACHINE_FIREBEE
+#else
+	#MACHINE=MACHINE_M5484LITE
+#endif

 # always optimize x86 emulator objects
-$(1)/objs/x86decode.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86sys.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86debug.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86prim_ops.o:CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86ops.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86ops2.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86fpu.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86biosemu.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86pcibios.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86decode.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86sys.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86debug.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86prim_ops.o:CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86ops.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86ops2.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86fpu.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86biosemu.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86pcibios.o:	CFLAGS=$(CFLAGS_OPTIMIZED)

 $(1)/objs/%.o:%.c
 	$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
@@ -257,7 +274,7 @@ endif
 $(1)_MAPFILE_RAM=$(1)/$$(basename $$(RAM_EXEC)).map
 $(1)/$$(RAM_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
 	$(CPP) $(INCLUDE) -DCOMPILE_RAM -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDRFILE)
-	$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) -o $$@
+	$(LD) $(LDFLAGS) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) -o $$@
 ifeq ($(COMPILE_ELF),Y)
 	$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
 else
@@ -280,21 +297,21 @@ $(foreach DIR,$(TRGTDIRS),$(eval $(call EX_TEMPLATE,$(DIR))))

 indent: $(CSRCS)
 	indent $<
-	
+
 .PHONY: tags
 tags:
 	ctags $(patsubst %,%/*,$(VPATH))
-	
+
 .PHONY: printvars
 printvars:
 	@$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
 ifeq (MACHINE_M5484LITE,$$(MACHINE))
 	MNAME=m5484lite
 else ifeq (MACHINE_FIREBEE,$(MACHINE))
-   	MNAME=firebee
+	MNAME=firebee
 endif

 tools:
-	$(NATIVECC) $(INCLUDE) -c $(TOOLDIR)/s19header.c -o $(TOOLDIR)/s19header.o 
+	$(NATIVECC) $(INCLUDE) -c $(TOOLDIR)/s19header.c -o $(TOOLDIR)/s19header.o
 	$(NATIVECC) -o $(TOOLDIR)/s19header $(TOOLDIR)/s19header.o

--- a/bas.lk.in
+++ b/bas.lk.in
@@ -1,251 +1,265 @@
-#ifdef MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
 #include "firebee.h"
-#endif /* MACHINE_FIREBEE */
-
-#ifdef MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
+#else
+#error "unknown machine!"
 #endif /* MACHINE_M5484LITE */

 /* make bas_rom access flags rx if compiling to RAM */
 #ifdef COMPILE_RAM
-#define ROMFLAGS	WX
+#define ROMFLAGS    WX
 #else
-#define ROMFLAGS	RX
+#define ROMFLAGS    RX
 #endif /* COMPILE_RAM */

 MEMORY
 {
   bas_rom (ROMFLAGS) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000
   /*
-	* target to copy BaS data segment to. 1M should be enough for now
-	*/
+    * target to copy BaS data segment to. 1M should be enough for now
+    */
   bas_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00200000, LENGTH = 0x00100000
   /*
    * driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
-	*/
+    */
   driver_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00100000, LENGTH = 0x00100000
 }

 SECTIONS
 {
-	/* BaS in ROM */
-	.text :
-	{
-		OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */
+        /* BaS in ROM */
+        .text :
+        {
+                OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */

-		OBJDIR/sysinit.o(.text)
-		OBJDIR/fault_vectors.o(.text)
+                OBJDIR/sysinit.o(.text)
+                OBJDIR/fault_vectors.o(.text)
 #ifdef MACHINE_FIREBEE
-		OBJDIR/init_fpga.o(.text)
+                OBJDIR/init_fpga.o(.text)
 #endif /* MACHINE_FIREBEE */
-		OBJDIR/wait.o(.text)
-		OBJDIR/exceptions.o(.text)
-		OBJDIR/driver_vec.o(.text)
-		OBJDIR/interrupts.o(.text)
-		OBJDIR/mmu.o(.text)		
-		
-		OBJDIR/BaS.o(.text)
-		OBJDIR/pci.o(.text)
-		OBJDIR/usb.o(.text)
-		OBJDIR/driver_mem.o(.text)
-		OBJDIR/usb_mouse.o(.text)
-		OBJDIR/ohci-hcd.o(.text)
-		OBJDIR/ehci-hcd.o(.text)
-		OBJDIR/wait.o(.text)
+                OBJDIR/wait.o(.text)
+                OBJDIR/exceptions.o(.text)
+                OBJDIR/driver_vec.o(.text)
+                OBJDIR/interrupts.o(.text)
+                OBJDIR/mmu.o(.text)

-		OBJDIR/nbuf.o(.text)
-		OBJDIR/net_timer.o(.text)
-		OBJDIR/queue.o(.text)
-		OBJDIR/nif.o(.text)
-		OBJDIR/fecbd.o(.text)
-		OBJDIR/fec.o(.text)
-		OBJDIR/am79c874.o(.text)
-		OBJDIR/bcm5222.o(.text)
-		OBJDIR/ip.o(.text)
-		OBJDIR/udp.o(text)
-		OBJDIR/bootp.o(text)
-		OBJDIR/tftp.o(text)
-		OBJDIR/arp.o(text)
+                OBJDIR/BaS.o(.text)
+                OBJDIR/pci.o(.text)
+                OBJDIR/pci_wrappers.o(.text)
+                OBJDIR/usb.o(.text)
+                OBJDIR/driver_mem.o(.text)
+                OBJDIR/usb_hub.o(.text)
+                OBJDIR/usb_mouse.o(.text)
+                OBJDIR/usb_kbd.o(.text)
+                OBJDIR/ohci-hcd.o(.text)
+                OBJDIR/ehci-hcd.o(.text)
+                OBJDIR/wait.o(.text)

-		OBJDIR/unicode.o(.text)
-		OBJDIR/mmc.o(.text)
-		OBJDIR/ff.o(.text)
-		OBJDIR/sd_card.o(.text)
-		OBJDIR/s19reader.o(.text)
-		OBJDIR/bas_printf.o(.text)
-		OBJDIR/bas_string.o(.text)
-		OBJDIR/printf_helper.o(.text)
-		OBJDIR/cache.o(.text)
-		OBJDIR/dma.o(.text)
-		OBJDIR/MCD_dmaApi.o(.text)
-		OBJDIR/MCD_tasks.o(.text)
-		OBJDIR/MCD_tasksInit.o(.text)
+                OBJDIR/nbuf.o(.text)
+                OBJDIR/net_timer.o(.text)
+                OBJDIR/queue.o(.text)
+                OBJDIR/nif.o(.text)
+                OBJDIR/fecbd.o(.text)
+                OBJDIR/fec.o(.text)
+                OBJDIR/am79c874.o(.text)
+                OBJDIR/bcm5222.o(.text)
+                OBJDIR/ip.o(.text)
+                OBJDIR/udp.o(text)
+                OBJDIR/bootp.o(text)
+                OBJDIR/tftp.o(text)
+                OBJDIR/arp.o(text)

-		OBJDIR/video.o(.text)
-		OBJDIR/videl.o(.text)
-		OBJDIR/fbmem.o(.text)
-		OBJDIR/fbmon.o(.text)
-		OBJDIR/fbmodedb.o(.text)
-		OBJDIR/offscreen.o(.text)
+                OBJDIR/unicode.o(.text)
+                OBJDIR/mmc.o(.text)
+                OBJDIR/ff.o(.text)
+                OBJDIR/sd_card.o(.text)
+                OBJDIR/s19reader.o(.text)
+                OBJDIR/bas_printf.o(.text)
+                OBJDIR/bas_string.o(.text)
+                OBJDIR/printf_helper.o(.text)
+                OBJDIR/cache.o(.text)
+                OBJDIR/dma.o(.text)
+                OBJDIR/MCD_dmaApi.o(.text)
+                OBJDIR/MCD_tasks.o(.text)
+                OBJDIR/MCD_tasksInit.o(.text)

-		OBJDIR/x86decode.o(.text)
-		OBJDIR/x86ops.o(.text)
-		OBJDIR/x86ops2.o(.text)
-		OBJDIR/x86fpu.o(.text)
-		OBJDIR/x86sys.o(.text)
-		OBJDIR/x86biosemu.o(.text)
-		OBJDIR/x86debug.o(.text)
-		OBJDIR/x86prim_ops.o(.text)
-		OBJDIR/x86pcibios.o(.text)
+                OBJDIR/video.o(.text)
+                OBJDIR/videl.o(.text)
+                OBJDIR/fbmem.o(.text)
+                OBJDIR/fbmon.o(.text)
+                OBJDIR/fbmodedb.o(.text)
+                OBJDIR/offscreen.o(.text)

-		OBJDIR/radeon_base.o(.text)
-		OBJDIR/radeon_accel.o(.text)
-		OBJDIR/radeon_cursor.o(.text)
-		OBJDIR/radeon_monitor.o(.text)
+                OBJDIR/x86decode.o(.text)
+                OBJDIR/x86ops.o(.text)
+                OBJDIR/x86ops2.o(.text)
+                OBJDIR/x86fpu.o(.text)
+                OBJDIR/x86sys.o(.text)
+                OBJDIR/x86biosemu.o(.text)
+                OBJDIR/x86debug.o(.text)
+                OBJDIR/x86prim_ops.o(.text)
+                OBJDIR/x86pcibios.o(.text)
+
+                OBJDIR/radeon_base.o(.text)
+                OBJDIR/radeon_accel.o(.text)
+                OBJDIR/radeon_cursor.o(.text)
+                OBJDIR/radeon_monitor.o(.text)
+
+                OBJDIR/xhdi_sd.o(.text)
+                OBJDIR/xhdi_interface.o(.text)
+                OBJDIR/xhdi_vec.o(.text)

-		OBJDIR/xhdi_sd.o(.text)
-		OBJDIR/xhdi_interface.o(.text)
-		OBJDIR/xhdi_vec.o(.text)
-		
 #ifdef COMPILE_RAM
-		/*
-		 * if we compile to RAM anyway, there is no need to copy anything
-		 */
-		. = ALIGN(4);
-		__BAS_DATA_START = .;
-		*(.data)
-		__BAS_DATA_END = .;
-		__BAS_BSS_START = .;
-		*(.bss)	
-		__BAS_BSS_END = .;
+                /*
+                 * if we compile to RAM anyway, there is no need to copy anything
+                 */
+                . = ALIGN(4);
+                __BAS_DATA_START = .;
+                *(.data)
+                __BAS_DATA_END = .;
+                __BAS_BSS_START = .;
+                *(.bss)
+                __BAS_BSS_END = .;
 #endif /* COMPILE_RAM */

 #if (FORMAT_ELF == 1)
-		*(.rodata)
-		*(.rodata.*)
+                *(.rodata)
+                *(.rodata.*)
 #endif
-	} > bas_rom
+        } > bas_rom

 #if (TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS)
-	/*
-	 * put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
-	 */
-	.bas :
-	AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
-	{
-		. = ALIGN(4);		/* same alignment than AT() statement! */
-		__BAS_DATA_START = .;
-		*(.data)
-		__BAS_DATA_END = .;
-		__BAS_BSS_START = .;
-		*(.bss)	
-		__BAS_BSS_END = .;
+        /*
+         * put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
+         */
+        .bas :
+        AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
+        {
+                . = ALIGN(4);       /* same alignment than AT() statement! */
+                __BAS_DATA_START = .;
+                *(.data)
+                __BAS_DATA_END = .;
+                __BAS_BSS_START = .;
+                *(.bss)
+                __BAS_BSS_END = .;

-		. = ALIGN(16);
-	} > bas_ram
+                . = ALIGN(16);
+        } > bas_ram
 #endif

-	.driver_memory :
-	{
-		. = ALIGN(4);
-		_driver_mem_buffer = .;
-		//. = . + DRIVER_MEM_BUFFER_SIZE;
-	} > driver_ram
-	
-	/*
-	 * Global memory map
-	 */
+        .driver_memory :
+        {
+                . = ALIGN(4);
+                _driver_mem_buffer = .;
+                //. = . + DRIVER_MEM_BUFFER_SIZE;
+        } > driver_ram

-	/* SDRAM Initialization */
- 	___SDRAM                = SDRAM_START;
- 	___SDRAM_SIZE           = SDRAM_SIZE;
-	_SDRAM_VECTOR_TABLE		= ___SDRAM;
-	
-	/* ST-RAM */
-	__STRAM                 = ___SDRAM;
-	__STRAM_END             = __TOS;
+        /*
+         * Global memory map
+         */

-	/* TOS */
-	__TOS                   = 0x00e00000;
+        /* SDRAM Initialization */
+        ___SDRAM                = SDRAM_START;
+        ___SDRAM_SIZE           = SDRAM_SIZE;
+        _SDRAM_VECTOR_TABLE     = ___SDRAM;

-	/* FastRAM */
-	__FASTRAM               = 0x10000000;
-	__TARGET_ADDRESS		= TARGET_ADDRESS;
-	
-#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
-	__FASTRAM_END           = __BAS_IN_RAM;
-#else
-	__FASTRAM_END			= TARGET_ADDRESS;
-#endif
+        /* ST-RAM */
+        __STRAM                 = ___SDRAM;
+        __STRAM_END             = __TOS;

-	/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
-	___BOOT_FLASH           = BOOTFLASH_BASE_ADDRESS;
- 	___BOOT_FLASH_SIZE      = BOOTFLASH_SIZE;
+        /* TOS */
+        __TOS                   = 0x00e00000;
+
+        /* FastRAM */
+        __FASTRAM               = 0x10000000;
+        __TARGET_ADDRESS        = TARGET_ADDRESS;

 #if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
-	/* BaS */
-	__BAS_LMA               = LOADADDR(.bas);
-	__BAS_IN_RAM            = ADDR(.bas);
-	__BAS_SIZE              = SIZEOF(.bas);
+        __FASTRAM_END           = __BAS_IN_RAM;
 #else
-	/* BaS is already in RAM - no need to copy anything */
-	__BAS_IN_RAM			= __FASTRAM_END;
-	__BAS_SIZE				= 0;
-	__BAS_LMA				= __BAS_IN_RAM;
+        __FASTRAM_END           = TARGET_ADDRESS;
+#endif
+        __FASTRAM_SIZE          = __FASTRAM_END - __FASTRAM;
+
+        /* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
+        ___BOOT_FLASH           = BOOTFLASH_BASE_ADDRESS;
+        ___BOOT_FLASH_SIZE      = BOOTFLASH_SIZE;
+
+#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
+        /* BaS */
+        __BAS_LMA               = LOADADDR(.bas);
+        __BAS_IN_RAM            = ADDR(.bas);
+        __BAS_SIZE              = SIZEOF(.bas);
+#else
+        /* BaS is already in RAM - no need to copy anything */
+        __BAS_IN_RAM            = __FASTRAM_END;
+        __BAS_SIZE              = 0;
+        __BAS_LMA               = __BAS_IN_RAM;
 #endif

-	/* Other flash components */
-	__FIRETOS               = 0xe0400000;
-	__EMUTOS                = EMUTOS_BASE_ADDRESS;
-	__EMUTOS_SIZE           = 0x00100000;
+        /* Other flash components */
+        __FIRETOS               = 0xe0400000;
+        __EMUTOS                = EMUTOS_BASE_ADDRESS;
+        __EMUTOS_SIZE           = 0x00100000;

-	/* where FPGA data lives in flash */
-	__FPGA_FLASH_DATA 		= 0xe0700000;
-	__FPGA_FLASH_DATA_SIZE 	= 0x100000;
+        /* where FPGA data lives in flash */
+        __FPGA_CONFIG       = 0xe0700000;
+        __FPGA_CONFIG_SIZE  = 0x100000;

-	/* VIDEO RAM BASIS */
-	__VRAM                  = 0x60000000;
+        /* VIDEO RAM BASIS */
+        __VRAM                  = 0x60000000;

-	/* Memory mapped registers */
- 	__MBAR                  = 0xFF000000;
-	
-	/* 32KB on-chip System SRAM */
- 	__SYS_SRAM              = __MBAR + 0x10000;
-	__SYS_SRAM_SIZE         = 0x00008000;
+        /* Memory mapped registers */
+        __MBAR                  = 0xFF000000;

-	/* MMU memory mapped registers */
- 	__MMUBAR                = 0xFF040000;
+        /* 32KB on-chip System SRAM */
+        __SYS_SRAM              = __MBAR + 0x10000;
+        __SYS_SRAM_SIZE         = 0x00008000;

-	/*
-	 * 4KB on-chip Core SRAM0: -> exception table 
-	 */
- 	__RAMBAR0               = 0xFF100000;
- 	__RAMBAR0_SIZE          = 0x00001000;
+        /* MMU memory mapped registers */
+        __MMUBAR                = 0xFF040000;

-	/* 4KB on-chip Core SRAM1 */
- 	__RAMBAR1               = 0xFF101000;
- 	__RAMBAR1_SIZE          = 0x00001000;
- 	__SUP_SP                = __RAMBAR0 + __RAMBAR0_SIZE - 4;
+        /*
+         * 4KB on-chip Core SRAM0: -> exception table
+         */
+        __RAMBAR0               = 0xFF100000;
+        __RAMBAR0_SIZE          = 0x00001000;

-	/* system variables */
-	
-	/* RAMBAR0 0 to 0x7FF -> exception vectors */
-	_rt_mod    = __RAMBAR0 + 0x800;
-	_rt_ssp    = __RAMBAR0 + 0x804;
-	_rt_usp    = __RAMBAR0 + 0x808;
-	_rt_vbr    = __RAMBAR0 + 0x80C;  	/* (8)01 */
-	_rt_cacr   = __RAMBAR0 + 0x810;   	/* 002 */
-	_rt_asid   = __RAMBAR0 + 0x814;   	/* 003 */
-	_rt_acr0   = __RAMBAR0 + 0x818;   	/* 004 */
-	_rt_acr1   = __RAMBAR0 + 0x81c;   	/* 005 */
-	_rt_acr2   = __RAMBAR0 + 0x820;   	/* 006 */
-	_rt_acr3   = __RAMBAR0 + 0x824;   	/* 007 */
-	_rt_mmubar = __RAMBAR0 + 0x828;		/* 008 */
-	_rt_sr     = __RAMBAR0 + 0x82c;
-	_d0_save   = __RAMBAR0 + 0x830;
-	_a7_save   = __RAMBAR0 + 0x834;
-	_video_tlb = __RAMBAR0 + 0x838;
-	_video_sbt = __RAMBAR0 + 0x83C;
-	_rt_mbar   = __RAMBAR0 + 0x844;   	/* (c)0f */
+        /* 4KB on-chip Core SRAM1 */
+        __RAMBAR1               = 0xFF101000;
+        __RAMBAR1_SIZE          = 0x00001000;
+        __SUP_SP                = __RAMBAR1 + __RAMBAR1_SIZE - 4;
+
+    /*
+     * this flag (if 1) indicates that FPGA configuration has been loaded through JTAG
+     * and shouldn't be overwritten on boot
+     */
+    __FPGA_JTAG_LOADED      = __RAMBAR1;
+    __FPGA_JTAG_VALID       = __RAMBAR1 + 4;
+    /* system variables */
+
+        /* system variables */
+
+        /* RAMBAR0 0 to 0x7FF -> exception vectors */
+        _rt_mod    = __RAMBAR0 + 0x800;
+        _rt_ssp    = __RAMBAR0 + 0x804;
+        _rt_usp    = __RAMBAR0 + 0x808;
+        _rt_vbr    = __RAMBAR0 + 0x80C;     /* (8)01 */
+        _rt_cacr   = __RAMBAR0 + 0x810;     /* 002 */
+        _rt_asid   = __RAMBAR0 + 0x814;     /* 003 */
+        _rt_acr0   = __RAMBAR0 + 0x818;     /* 004 */
+        _rt_acr1   = __RAMBAR0 + 0x81c;     /* 005 */
+        _rt_acr2   = __RAMBAR0 + 0x820;     /* 006 */
+        _rt_acr3   = __RAMBAR0 + 0x824;     /* 007 */
+        _rt_mmubar = __RAMBAR0 + 0x828;     /* 008 */
+        _rt_sr     = __RAMBAR0 + 0x82c;
+        _d0_save   = __RAMBAR0 + 0x830;
+        _a7_save   = __RAMBAR0 + 0x834;
+        _video_tlb = __RAMBAR0 + 0x838;
+        _video_sbt = __RAMBAR0 + 0x83C;
+        _rt_mbar   = __RAMBAR0 + 0x844;     /* (c)0f */

 }
--- a/bas_firebee.bdm
+++ b/bas_firebee.bdm
@@ -63,10 +63,6 @@ write 0xFF000104 0x710D0F00 4	# SDCR (lock SDMR and enable refresh)
 sleep 100

 load -v firebee/ram.elf
-write-ctrl 0x80e	0x2700
-write-ctrl 0x2	0xa50c8120
-dump-register SR
-dump-register CACR
-dump-register MBAR
+
 execute
 wait
--- a/dma/MCD_dmaApi.c
+++ b/dma/MCD_dmaApi.c
--- a/dma/MCD_tasks.c
+++ b/dma/MCD_tasks.c
@@ -7,253 +7,253 @@

 #include "MCD_dma.h"

-uint32_t MCD_varTab0[];
-uint32_t MCD_varTab1[];
-uint32_t MCD_varTab2[];
-uint32_t MCD_varTab3[];
-uint32_t MCD_varTab4[];
-uint32_t MCD_varTab5[];
-uint32_t MCD_varTab6[];
-uint32_t MCD_varTab7[];
-uint32_t MCD_varTab8[];
-uint32_t MCD_varTab9[];
-uint32_t MCD_varTab10[];
-uint32_t MCD_varTab11[];
-uint32_t MCD_varTab12[];
-uint32_t MCD_varTab13[];
-uint32_t MCD_varTab14[];
-uint32_t MCD_varTab15[];
+u32 MCD_varTab0[];
+u32 MCD_varTab1[];
+u32 MCD_varTab2[];
+u32 MCD_varTab3[];
+u32 MCD_varTab4[];
+u32 MCD_varTab5[];
+u32 MCD_varTab6[];
+u32 MCD_varTab7[];
+u32 MCD_varTab8[];
+u32 MCD_varTab9[];
+u32 MCD_varTab10[];
+u32 MCD_varTab11[];
+u32 MCD_varTab12[];
+u32 MCD_varTab13[];
+u32 MCD_varTab14[];
+u32 MCD_varTab15[];

-uint32_t MCD_funcDescTab0[];
+u32 MCD_funcDescTab0[];
 #ifdef MCD_INCLUDE_EU
-uint32_t MCD_funcDescTab1[];
-uint32_t MCD_funcDescTab2[];
-uint32_t MCD_funcDescTab3[];
-uint32_t MCD_funcDescTab4[];
-uint32_t MCD_funcDescTab5[];
-uint32_t MCD_funcDescTab6[];
-uint32_t MCD_funcDescTab7[];
-uint32_t MCD_funcDescTab8[];
-uint32_t MCD_funcDescTab9[];
-uint32_t MCD_funcDescTab10[];
-uint32_t MCD_funcDescTab11[];
-uint32_t MCD_funcDescTab12[];
-uint32_t MCD_funcDescTab13[];
-uint32_t MCD_funcDescTab14[];
-uint32_t MCD_funcDescTab15[];
+u32 MCD_funcDescTab1[];
+u32 MCD_funcDescTab2[];
+u32 MCD_funcDescTab3[];
+u32 MCD_funcDescTab4[];
+u32 MCD_funcDescTab5[];
+u32 MCD_funcDescTab6[];
+u32 MCD_funcDescTab7[];
+u32 MCD_funcDescTab8[];
+u32 MCD_funcDescTab9[];
+u32 MCD_funcDescTab10[];
+u32 MCD_funcDescTab11[];
+u32 MCD_funcDescTab12[];
+u32 MCD_funcDescTab13[];
+u32 MCD_funcDescTab14[];
+u32 MCD_funcDescTab15[];
 #endif

-uint32_t MCD_contextSave0[];
-uint32_t MCD_contextSave1[];
-uint32_t MCD_contextSave2[];
-uint32_t MCD_contextSave3[];
-uint32_t MCD_contextSave4[];
-uint32_t MCD_contextSave5[];
-uint32_t MCD_contextSave6[];
-uint32_t MCD_contextSave7[];
-uint32_t MCD_contextSave8[];
-uint32_t MCD_contextSave9[];
-uint32_t MCD_contextSave10[];
-uint32_t MCD_contextSave11[];
-uint32_t MCD_contextSave12[];
-uint32_t MCD_contextSave13[];
-uint32_t MCD_contextSave14[];
-uint32_t MCD_contextSave15[];
+u32 MCD_contextSave0[];
+u32 MCD_contextSave1[];
+u32 MCD_contextSave2[];
+u32 MCD_contextSave3[];
+u32 MCD_contextSave4[];
+u32 MCD_contextSave5[];
+u32 MCD_contextSave6[];
+u32 MCD_contextSave7[];
+u32 MCD_contextSave8[];
+u32 MCD_contextSave9[];
+u32 MCD_contextSave10[];
+u32 MCD_contextSave11[];
+u32 MCD_contextSave12[];
+u32 MCD_contextSave13[];
+u32 MCD_contextSave14[];
+u32 MCD_contextSave15[];

-uint32_t MCD_realTaskTableSrc[] =
+u32 MCD_realTaskTableSrc[] =
 {
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab0,   /* Task 0 Variable Table */
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_varTab0,   /* Task 0 Variable Table */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave0,  /* Task 0 context save space */
+    (u32)MCD_contextSave0,  /* Task 0 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab1,   /* Task 1 Variable Table */
+    (u32)MCD_varTab1,   /* Task 1 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab1,  /* Task 1 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab1,  /* Task 1 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave1,  /* Task 1 context save space */
+    (u32)MCD_contextSave1,  /* Task 1 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab2,   /* Task 2 Variable Table */
+    (u32)MCD_varTab2,   /* Task 2 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab2,  /* Task 2 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab2,  /* Task 2 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave2,  /* Task 2 context save space */
+    (u32)MCD_contextSave2,  /* Task 2 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab3,   /* Task 3 Variable Table */
+    (u32)MCD_varTab3,   /* Task 3 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab3,  /* Task 3 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab3,  /* Task 3 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave3,  /* Task 3 context save space */
+    (u32)MCD_contextSave3,  /* Task 3 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab4,   /* Task 4 Variable Table */
+    (u32)MCD_varTab4,   /* Task 4 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab4,  /* Task 4 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab4,  /* Task 4 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave4,  /* Task 4 context save space */
+    (u32)MCD_contextSave4,  /* Task 4 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab5,   /* Task 5 Variable Table */
+    (u32)MCD_varTab5,   /* Task 5 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab5,  /* Task 5 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab5,  /* Task 5 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave5,  /* Task 5 context save space */
+    (u32)MCD_contextSave5,  /* Task 5 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab6,   /* Task 6 Variable Table */
+    (u32)MCD_varTab6,   /* Task 6 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab6,  /* Task 6 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab6,  /* Task 6 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave6,  /* Task 6 context save space */
+    (u32)MCD_contextSave6,  /* Task 6 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab7,   /* Task 7 Variable Table */
+    (u32)MCD_varTab7,   /* Task 7 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab7,  /* Task 7 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab7,  /* Task 7 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave7,  /* Task 7 context save space */
+    (u32)MCD_contextSave7,  /* Task 7 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab8,   /* Task 8 Variable Table */
+    (u32)MCD_varTab8,   /* Task 8 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab8,  /* Task 8 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab8,  /* Task 8 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave8,  /* Task 8 context save space */
+    (u32)MCD_contextSave8,  /* Task 8 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab9,   /* Task 9 Variable Table */
+    (u32)MCD_varTab9,   /* Task 9 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab9,  /* Task 9 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab9,  /* Task 9 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave9,  /* Task 9 context save space */
+    (u32)MCD_contextSave9,  /* Task 9 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab10,  /* Task 10 Variable Table */
+    (u32)MCD_varTab10,  /* Task 10 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave10, /* Task 10 context save space */
+    (u32)MCD_contextSave10, /* Task 10 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab11,  /* Task 11 Variable Table */
+    (u32)MCD_varTab11,  /* Task 11 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave11, /* Task 11 context save space */
+    (u32)MCD_contextSave11, /* Task 11 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab12,  /* Task 12 Variable Table */
+    (u32)MCD_varTab12,  /* Task 12 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave12, /* Task 12 context save space */
+    (u32)MCD_contextSave12, /* Task 12 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab13,  /* Task 13 Variable Table */
+    (u32)MCD_varTab13,  /* Task 13 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave13, /* Task 13 context save space */
+    (u32)MCD_contextSave13, /* Task 13 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab14,  /* Task 14 Variable Table */
+    (u32)MCD_varTab14,  /* Task 14 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave14, /* Task 14 context save space */
+    (u32)MCD_contextSave14, /* Task 14 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab15,  /* Task 15 Variable Table */
+    (u32)MCD_varTab15,  /* Task 15 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave15, /* Task 15 context save space */
+    (u32)MCD_contextSave15, /* Task 15 context save space */
    0x00000000,
 };


-uint32_t MCD_varTab0[] =
+u32 MCD_varTab0[] =
 {   /* Task 0 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -290,7 +290,7 @@ uint32_t MCD_varTab0[] =
 };


-uint32_t MCD_varTab1[] =
+u32 MCD_varTab1[] =
 {   /* Task 1 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -326,7 +326,7 @@ uint32_t MCD_varTab1[] =
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab2[]=
+u32 MCD_varTab2[]=
 {   /* Task 2 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -362,7 +362,7 @@ uint32_t MCD_varTab2[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab3[]=
+u32 MCD_varTab3[]=
 {   /* Task 3 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -398,7 +398,7 @@ uint32_t MCD_varTab3[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab4[]=
+u32 MCD_varTab4[]=
 {   /* Task 4 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -434,7 +434,7 @@ uint32_t MCD_varTab4[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab5[]=
+u32 MCD_varTab5[]=
 {   /* Task 5 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -470,7 +470,7 @@ uint32_t MCD_varTab5[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab6[]=
+u32 MCD_varTab6[]=
 {   /* Task 6 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -506,7 +506,7 @@ uint32_t MCD_varTab6[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab7[]=
+u32 MCD_varTab7[]=
 {   /* Task 7 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -542,7 +542,7 @@ uint32_t MCD_varTab7[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab8[]=
+u32 MCD_varTab8[]=
 {   /* Task 8 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -578,7 +578,7 @@ uint32_t MCD_varTab8[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab9[]=
+u32 MCD_varTab9[]=
 {   /* Task 9 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -614,7 +614,7 @@ uint32_t MCD_varTab9[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab10[]=
+u32 MCD_varTab10[]=
 {   /* Task 10 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -650,7 +650,7 @@ uint32_t MCD_varTab10[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab11[]=
+u32 MCD_varTab11[]=
 {   /* Task 11 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -686,7 +686,7 @@ uint32_t MCD_varTab11[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab12[]=
+u32 MCD_varTab12[]=
 {   /* Task 12 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -722,7 +722,7 @@ uint32_t MCD_varTab12[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab13[]=
+u32 MCD_varTab13[]=
 {   /* Task 13 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -758,7 +758,7 @@ uint32_t MCD_varTab13[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab14[]=
+u32 MCD_varTab14[]=
 {   /* Task 14 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -794,7 +794,7 @@ uint32_t MCD_varTab14[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab15[]=
+u32 MCD_varTab15[]=
 {   /* Task 15 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -830,7 +830,7 @@ uint32_t MCD_varTab15[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_funcDescTab0[]=
+u32 MCD_funcDescTab0[]=
 {   /* Task 0 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -899,7 +899,7 @@ uint32_t MCD_funcDescTab0[]=
 };

 #ifdef MCD_INCLUDE_EU
-uint32_t MCD_funcDescTab1[]=
+u32 MCD_funcDescTab1[]=
 {   /* Task 1 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -967,7 +967,7 @@ uint32_t MCD_funcDescTab1[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab2[]=
+u32 MCD_funcDescTab2[]=
 {   /* Task 2 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1035,7 +1035,7 @@ uint32_t MCD_funcDescTab2[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab3[]=
+u32 MCD_funcDescTab3[]=
 {   /* Task 3 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1103,7 +1103,7 @@ uint32_t MCD_funcDescTab3[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab4[]=
+u32 MCD_funcDescTab4[]=
 {   /* Task 4 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1171,7 +1171,7 @@ uint32_t MCD_funcDescTab4[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab5[]=
+u32 MCD_funcDescTab5[]=
 {   /* Task 5 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1239,7 +1239,7 @@ uint32_t MCD_funcDescTab5[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab6[]=
+u32 MCD_funcDescTab6[]=
 {   /* Task 6 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1307,7 +1307,7 @@ uint32_t MCD_funcDescTab6[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab7[]=
+u32 MCD_funcDescTab7[]=
 {   /* Task 7 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1375,7 +1375,7 @@ uint32_t MCD_funcDescTab7[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab8[]=
+u32 MCD_funcDescTab8[]=
 {   /* Task 8 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1443,7 +1443,7 @@ uint32_t MCD_funcDescTab8[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab9[]=
+u32 MCD_funcDescTab9[]=
 {   /* Task 9 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1511,7 +1511,7 @@ uint32_t MCD_funcDescTab9[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab10[]=
+u32 MCD_funcDescTab10[]=
 {   /* Task 10 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1579,7 +1579,7 @@ uint32_t MCD_funcDescTab10[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab11[]=
+u32 MCD_funcDescTab11[]=
 {   /* Task 11 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1647,7 +1647,7 @@ uint32_t MCD_funcDescTab11[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab12[]=
+u32 MCD_funcDescTab12[]=
 {   /* Task 12 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1715,7 +1715,7 @@ uint32_t MCD_funcDescTab12[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab13[]=
+u32 MCD_funcDescTab13[]=
 {   /* Task 13 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1783,7 +1783,7 @@ uint32_t MCD_funcDescTab13[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab14[]=
+u32 MCD_funcDescTab14[]=
 {   /* Task 14 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1851,7 +1851,7 @@ uint32_t MCD_funcDescTab14[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab15[]=
+u32 MCD_funcDescTab15[]=
 {   /* Task 15 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1920,45 +1920,45 @@ uint32_t MCD_funcDescTab15[]=
 };
 #endif /*MCD_INCLUDE_EU*/

-uint32_t MCD_contextSave0[128];  /* Task 0 context save space */
-uint32_t MCD_contextSave1[128];  /* Task 1 context save space */
-uint32_t MCD_contextSave2[128];  /* Task 2 context save space */
-uint32_t MCD_contextSave3[128];  /* Task 3 context save space */
-uint32_t MCD_contextSave4[128];  /* Task 4 context save space */
-uint32_t MCD_contextSave5[128];  /* Task 5 context save space */
-uint32_t MCD_contextSave6[128];  /* Task 6 context save space */
-uint32_t MCD_contextSave7[128];  /* Task 7 context save space */
-uint32_t MCD_contextSave8[128];  /* Task 8 context save space */
-uint32_t MCD_contextSave9[128];  /* Task 9 context save space */
-uint32_t MCD_contextSave10[128]; /* Task 10 context save space */
-uint32_t MCD_contextSave11[128]; /* Task 11 context save space */
-uint32_t MCD_contextSave12[128]; /* Task 12 context save space */
-uint32_t MCD_contextSave13[128]; /* Task 13 context save space */
-uint32_t MCD_contextSave14[128]; /* Task 14 context save space */
-uint32_t MCD_contextSave15[128]; /* Task 15 context save space */
+u32 MCD_contextSave0[128];  /* Task 0 context save space */
+u32 MCD_contextSave1[128];  /* Task 1 context save space */
+u32 MCD_contextSave2[128];  /* Task 2 context save space */
+u32 MCD_contextSave3[128];  /* Task 3 context save space */
+u32 MCD_contextSave4[128];  /* Task 4 context save space */
+u32 MCD_contextSave5[128];  /* Task 5 context save space */
+u32 MCD_contextSave6[128];  /* Task 6 context save space */
+u32 MCD_contextSave7[128];  /* Task 7 context save space */
+u32 MCD_contextSave8[128];  /* Task 8 context save space */
+u32 MCD_contextSave9[128];  /* Task 9 context save space */
+u32 MCD_contextSave10[128]; /* Task 10 context save space */
+u32 MCD_contextSave11[128]; /* Task 11 context save space */
+u32 MCD_contextSave12[128]; /* Task 12 context save space */
+u32 MCD_contextSave13[128]; /* Task 13 context save space */
+u32 MCD_contextSave14[128]; /* Task 14 context save space */
+u32 MCD_contextSave15[128]; /* Task 15 context save space */


-uint32_t MCD_ChainNoEu_TDT[];
-uint32_t MCD_SingleNoEu_TDT[];
+u32 MCD_ChainNoEu_TDT[];
+u32 MCD_SingleNoEu_TDT[];
 #ifdef MCD_INCLUDE_EU
-uint32_t MCD_ChainEu_TDT[];
-uint32_t MCD_SingleEu_TDT[];
+u32 MCD_ChainEu_TDT[];
+u32 MCD_SingleEu_TDT[];
 #endif
-uint32_t MCD_ENetRcv_TDT[];
-uint32_t MCD_ENetXmit_TDT[];
+u32 MCD_ENetRcv_TDT[];
+u32 MCD_ENetXmit_TDT[];

-uint32_t MCD_modelTaskTableSrc[]=
+u32 MCD_modelTaskTableSrc[]=
 {
-    (uint32_t)MCD_ChainNoEu_TDT,
-    (uint32_t)&((uint8_t*)MCD_ChainNoEu_TDT)[0x0000016c],
+    (u32)MCD_ChainNoEu_TDT,
+    (u32)&((u8*)MCD_ChainNoEu_TDT)[0x0000016c],
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_SingleNoEu_TDT,
-    (uint32_t)&((uint8_t*)MCD_SingleNoEu_TDT)[0x000000d4],
+    (u32)MCD_SingleNoEu_TDT,
+    (u32)&((u8*)MCD_SingleNoEu_TDT)[0x000000d4],
    0x00000000,
    0x00000000,
    0x00000000,
@@ -1966,16 +1966,16 @@ uint32_t MCD_modelTaskTableSrc[]=
    0x00000000,
    0x00000000,
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_ChainEu_TDT,
-    (uint32_t)&((uint8_t*)MCD_ChainEu_TDT)[0x000001b4],
+    (u32)MCD_ChainEu_TDT,
+    (u32)&((u8*)MCD_ChainEu_TDT)[0x000001b4],
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_SingleEu_TDT,
-    (uint32_t)&((uint8_t*)MCD_SingleEu_TDT)[0x00000124],
+    (u32)MCD_SingleEu_TDT,
+    (u32)&((u8*)MCD_SingleEu_TDT)[0x00000124],
    0x00000000,
    0x00000000,
    0x00000000,
@@ -1983,16 +1983,16 @@ uint32_t MCD_modelTaskTableSrc[]=
    0x00000000,
    0x00000000,
 #endif    
-    (uint32_t)MCD_ENetRcv_TDT,
-    (uint32_t)&((uint8_t*)MCD_ENetRcv_TDT)[0x0000009c],
+    (u32)MCD_ENetRcv_TDT,
+    (u32)&((u8*)MCD_ENetRcv_TDT)[0x0000009c],
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_ENetXmit_TDT,
-    (uint32_t)&((uint8_t*)MCD_ENetXmit_TDT)[0x000000d0],
+    (u32)MCD_ENetXmit_TDT,
+    (u32)&((u8*)MCD_ENetXmit_TDT)[0x000000d0],
    0x00000000,
    0x00000000,
    0x00000000,
@@ -2000,7 +2000,7 @@ uint32_t MCD_modelTaskTableSrc[]=
    0x00000000,
    0x00000000,
 };
-uint32_t MCD_ChainNoEu_TDT[]=
+u32 MCD_ChainNoEu_TDT[]=
 {
    0x80004000, /* 0000(:370):  LCDEXT: idx0 = 0x00000000; ; */
    0x8118801b, /* 0004(:370):  LCD: idx1 = var2; idx1 once var0; idx1 += inc3 */
@@ -2095,7 +2095,7 @@ uint32_t MCD_ChainNoEu_TDT[]=
    0x000001f8, /* 0168(:0):      NOP */
    0x000001f8, /* 016C(:0):    NOP */
 };
-uint32_t MCD_SingleNoEu_TDT[]=
+u32 MCD_SingleNoEu_TDT[]=
 {
    0x8198001b, /* 0000(:657):  LCD: idx0 = var3; idx0 once var0; idx0 += inc3 */
    0x7000000d, /* 0004(:658):    DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */
@@ -2153,7 +2153,7 @@ uint32_t MCD_SingleNoEu_TDT[]=
    0x040001f8, /* 00D4(:713):    DRD1A: FN=0 INT init=0 WS=0 RS=0 */
 };
 #ifdef MCD_INCLUDE_EU
-uint32_t MCD_ChainEu_TDT[]=
+u32 MCD_ChainEu_TDT[]=
 {
    0x80004000, /* 0000(:947):  LCDEXT: idx0 = 0x00000000; ; */
    0x8198801b, /* 0004(:947):  LCD: idx1 = var3; idx1 once var0; idx1 += inc3 */
@@ -2266,7 +2266,7 @@ uint32_t MCD_ChainEu_TDT[]=
    0x000001f8, /* 01B0(:0):      NOP */
    0x000001f8, /* 01B4(:0):    NOP */
 };
-uint32_t MCD_SingleEu_TDT[]=
+u32 MCD_SingleEu_TDT[]=
 {
    0x8218001b, /* 0000(:1248):  LCD: idx0 = var4; idx0 once var0; idx0 += inc3 */
    0x7000000d, /* 0004(:1249):    DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */
@@ -2344,7 +2344,7 @@ uint32_t MCD_SingleEu_TDT[]=
    0x040001f8, /* 0124(:1316):    DRD1A: FN=0 INT init=0 WS=0 RS=0 */
 };
 #endif
-uint32_t MCD_ENetRcv_TDT[]=
+u32 MCD_ENetRcv_TDT[]=
 {
    0x80004000, /* 0000(:1389):  LCDEXT: idx0 = 0x00000000; ; */
    0x81988000, /* 0004(:1389):  LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
@@ -2387,7 +2387,7 @@ uint32_t MCD_ENetRcv_TDT[]=
    0x040001f8, /* 0098(:1441):      DRD1A: FN=0 INT init=0 WS=0 RS=0 */
    0x000001f8, /* 009C(:0):    NOP */
 };
-uint32_t MCD_ENetXmit_TDT[]=
+u32 MCD_ENetXmit_TDT[]=
 {
    0x80004000, /* 0000(:1516):  LCDEXT: idx0 = 0x00000000; ; */
    0x81988000, /* 0004(:1516):  LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
--- a/dma/MCD_tasksInit.c
+++ b/dma/MCD_tasksInit.c
@@ -11,7 +11,6 @@
 */

 #include "MCD_dma.h"
-#include "MCD_tasksInit.h"

 extern dmaRegs *MCD_dmaBar;

@@ -23,33 +22,33 @@ extern dmaRegs *MCD_dmaBar;
 void  MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)currBD); /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 11, (uint32_t)xferSize);  /* var[11] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave);  /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)0x00000000); /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000000);    /* var[12] */
-    MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x80000000);    /* var[13] */
-    MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0x00000010);    /* var[14] */
-    MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000004);    /* var[15] */
-    MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x08000000);    /* var[16] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000);    /* inc[3] */
-    MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000000);    /* inc[4] */
-    MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000001);    /* inc[5] */
-    MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x40000000);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)xferSize);  /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)0x00000000); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 13, (u32)0x80000000);    /* var[13] */
+    MCD_SET_VAR(taskTable+channel, 14, (u32)0x00000010);    /* var[14] */
+    MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004);    /* var[15] */
+    MCD_SET_VAR(taskTable+channel, 16, (u32)0x08000000);    /* var[16] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000001);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x40000000);    /* inc[6] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }


@@ -57,29 +56,29 @@ void  MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer
 * Task 1
 */
 
-void  MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
+void  MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)srcAddr);    /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)destAddr);   /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)dmaSize);    /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)flags);  /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)currBD); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave);  /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000004); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x08000000);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000);    /* inc[3] */
-    MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000001);    /* inc[4] */
-    MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x40000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)srcAddr);    /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)destAddr);   /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)dmaSize);    /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)flags);  /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)currBD); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000004); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x08000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000001);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x40000000);    /* inc[5] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }


@@ -90,36 +89,36 @@ void  MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, s
 void  MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 12, (uint32_t)xferSize);  /* var[12] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave);  /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x00000000);    /* var[11] */
-    MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x00000000);    /* var[13] */
-    MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0x80000000);    /* var[14] */
-    MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000010);    /* var[15] */
-    MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x00000001);    /* var[16] */
-    MCD_SET_VAR(taskTable+channel, 17, (uint32_t)0x00000004);    /* var[17] */
-    MCD_SET_VAR(taskTable+channel, 18, (uint32_t)0x08000000);    /* var[18] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000);    /* inc[3] */
-    MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000000);    /* inc[4] */
-    MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0xc0000000);    /* inc[5] */
-    MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x80000001);    /* inc[6] */
-    MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0x40000000);    /* inc[7] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)xferSize);  /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000000);    /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 13, (u32)0x00000000);    /* var[13] */
+    MCD_SET_VAR(taskTable+channel, 14, (u32)0x80000000);    /* var[14] */
+    MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000010);    /* var[15] */
+    MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000001);    /* var[16] */
+    MCD_SET_VAR(taskTable+channel, 17, (u32)0x00000004);    /* var[17] */
+    MCD_SET_VAR(taskTable+channel, 18, (u32)0x08000000);    /* var[18] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0xc0000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000);    /* inc[7] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }


@@ -127,33 +126,33 @@ void  MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi
 * Task 3
 */
 
-void  MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
+void  MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)srcAddr);    /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)destAddr);   /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)dmaSize);    /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)flags);  /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)currBD); /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave);  /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000001);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x00000004);    /* var[11] */
-    MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x08000000);    /* var[12] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000);    /* inc[3] */
-    MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0xc0000000);    /* inc[4] */
-    MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000000);    /* inc[5] */
-    MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x80000001);    /* inc[6] */
-    MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0x40000000);    /* inc[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)srcAddr);    /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)destAddr);   /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)dmaSize);    /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)flags);  /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000001);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000004);    /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x08000000);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0xc0000000);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000);    /* inc[7] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }


@@ -161,29 +160,29 @@ void  MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, sho
 * Task 4
 */
 
-void  MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel)
+void  MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)bDBase); /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)rcvFifoPtr); /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x0000ffff); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x30000000);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x0fffffff);    /* var[11] */
-    MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000008);    /* var[12] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)0x00000000);    /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)0x60000000);    /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)0x20000004);    /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x40000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)rcvFifoPtr); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x0000ffff); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x30000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)0x0fffffff);    /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000008);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000);    /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000);    /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)0x20000004);    /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x40000000);    /* inc[3] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }


@@ -191,35 +190,35 @@ void  MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, vo
 * Task 5
 */
 
-void  MCD_startDmaENetXmit(int8_t *bDBase, int8_t *currBD, int8_t *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel)
+void  MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)bDBase); /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 11, (uint32_t)xmitFifoPtr);   /* var[11] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000000);    /* var[12] */
-    MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x0000ffff);    /* var[13] */
-    MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0xffffffff);    /* var[14] */
-    MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000004);    /* var[15] */
-    MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x00000008);    /* var[16] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)0x00000000);    /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)0x60000000);    /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)0x40000000);    /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0xc000fffc);    /* inc[3] */
-    MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0xe0000004);    /* inc[4] */
-    MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000000);    /* inc[5] */
-    MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x4000ffff);    /* inc[6] */
-    MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0xe0000001);    /* inc[7] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)xmitFifoPtr);   /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 13, (u32)0x0000ffff);    /* var[13] */
+    MCD_SET_VAR(taskTable+channel, 14, (u32)0xffffffff);    /* var[14] */
+    MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004);    /* var[15] */
+    MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000008);    /* var[16] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000);    /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000);    /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)0x40000000);    /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0xc000fffc);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0xe0000004);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x4000ffff);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 31, (u32)0xe0000001);    /* inc[7] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }
--- a/dma/dma.c
+++ b/dma/dma.c
--- a/exe/basflash.c
+++ b/exe/basflash.c
@@ -21,10 +21,9 @@
 *      Author: Markus Fröschle
 */

-#include <stdint.h>
-#include <stdbool.h>
-#include "bas_string.h"
+#include <bas_types.h>
 #include "bas_printf.h"
+#include "bas_string.h"
 #include "diskio.h"
 #include "ff.h"
 #include "s19reader.h"
@@ -220,190 +219,190 @@ static const int num_flash_areas = sizeof(flash_areas) / sizeof(struct romram);
 */
 void amd_flash_sector_erase(int n)
 {
-    volatile AMD_FLASH_CELL status;
+	volatile AMD_FLASH_CELL status;

-    pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80);
-    pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[SADDR(n)] = AMD_FLASH_CMD_DATA(0x30);
+	pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80);
+	pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[SADDR(n)] = AMD_FLASH_CMD_DATA(0x30);

-    do
-        status = pFlash[SADDR(n)];
-    while ((status & AMD_FLASH_CMD_DATA(0x80)) != AMD_FLASH_CMD_DATA(0x80));
+	do
+		status = pFlash[SADDR(n)];
+	while ((status & AMD_FLASH_CMD_DATA(0x80)) != AMD_FLASH_CMD_DATA(0x80));

-    /*
-     * Place device in read mode
-     */
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
+	/*
+	 * Place device in read mode
+	 */
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
 }

 int amd_flash_erase(void *start, int bytes, void (*putchar)(int))
 {
-    int i, ebytes = 0;
+	int i, ebytes = 0;

-    if (bytes == 0)
-        return 0;
+	if (bytes == 0)
+		return 0;

-    for (i = 0; i < AMD_FLASH_SECTORS; i++)
-    {
-        if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
-            start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
-        {
-            break;
-        }
-    }
+	for (i = 0; i < AMD_FLASH_SECTORS; i++)
+	{
+		if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
+			start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
+		{
+			break;
+		}
+	}

-    while (ebytes < bytes)
-    {
-        if (putchar != NULL)
-        {
-            putchar('.');
-        }
-        amd_flash_sector_erase(i);
-        ebytes += SSIZE(i);
-        i++;
-    }
+	while (ebytes < bytes)
+	{
+		if (putchar != NULL)
+		{
+			putchar('.');
+		}
+		amd_flash_sector_erase(i);
+		ebytes += SSIZE(i);
+		i++;
+	}

-    if (putchar != NULL)
-    {
-        putchar(10);    /* LF */
-        putchar(13);    /* CR */
-    }
+	if (putchar != NULL)
+	{
+		putchar(10);    /* LF */
+		putchar(13);    /* CR */
+	}

-    return ebytes;
+	return ebytes;
 }

 void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
 {
-    volatile AMD_FLASH_CELL status;
-    int retry;
+	volatile AMD_FLASH_CELL status;
+	int retry;

-    pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[0x555] = AMD_FLASH_CMD_DATA(0xA0);
-    *dst = data;
+	pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[0x555] = AMD_FLASH_CMD_DATA(0xA0);
+	*dst = data;

-    /*
-     * Wait for program operation to finish
-     *  (Data# Polling Algorithm)
-     */
-    retry = 0;
-    while (1)
-    {
-        status = *dst;
-        if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
-            (data & AMD_FLASH_CMD_DATA(0x80)))
-        {
-            break;
-        }
-        if (status & AMD_FLASH_CMD_DATA(0x20))
-        {
-            status = *dst;
-            if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
-                (data & AMD_FLASH_CMD_DATA(0x80)))
-            {
-                break;
-            }
-            if (++retry > 1024)
-            {
-                break;
-            }
-        }
-    }
+	/*
+	 * Wait for program operation to finish
+	 *  (Data# Polling Algorithm)
+	 */
+	retry = 0;
+	while (1)
+	{
+		status = *dst;
+		if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
+			(data & AMD_FLASH_CMD_DATA(0x80)))
+		{
+			break;
+		}
+		if (status & AMD_FLASH_CMD_DATA(0x20))
+		{
+			status = *dst;
+			if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
+				(data & AMD_FLASH_CMD_DATA(0x80)))
+			{
+				break;
+			}
+			if (++retry > 1024)
+			{
+				break;
+			}
+		}
+	}
 }


 int amd_flash_program(void *dest, void *source, int bytes, int erase, void (*func)(void), void (*putchar)(int))
 {
-    AMD_FLASH_CELL *src, *dst;
-    int hashi=1,hashj=0;
-    char hash[5];
+	AMD_FLASH_CELL *src, *dst;
+	int hashi=1,hashj=0;
+	char hash[5];

-    hash[0]=8;  /* Backspace */
-    hash[1]=124;/* "|" */
-    hash[2]=47; /* "/" */
-    hash[3]=45; /* "-" */
-    hash[4]=92; /* "\" */
+	hash[0]=8;  /* Backspace */
+	hash[1]=124;/* "|" */
+	hash[2]=47; /* "/" */
+	hash[3]=45; /* "-" */
+	hash[4]=92; /* "\" */

-    src = (AMD_FLASH_CELL *)source;
-    dst = (AMD_FLASH_CELL *)dest;
+	src = (AMD_FLASH_CELL *)source;
+	dst = (AMD_FLASH_CELL *)dest;

-    /*
-     * Place device in read mode
-     */
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
+	/*
+	 * Place device in read mode
+	 */
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);

-    /*
-     * Erase device if necessary
-     */
-    if (erase)
-    {
-        amd_flash_erase(dest, bytes, putchar);
-    }
+	/*
+	 * Erase device if necessary
+	 */
+	if (erase)
+	{
+		amd_flash_erase(dest, bytes, putchar);
+	}

-    /*
-     * Program device
-     */
-    while (bytes > 0)
-    {
-        amd_flash_program_cell(dst,*src);
+	/*
+	 * Program device
+	 */
+	while (bytes > 0)
+	{
+		amd_flash_program_cell(dst,*src);

-        /* Verify Write */
-        if (*dst == *src)
-        {
-            bytes -= AMD_FLASH_CELL_BYTES;
-            *dst++, *src++;
+		/* Verify Write */
+		if (*dst == *src)
+		{
+			bytes -= AMD_FLASH_CELL_BYTES;
+			*dst++, *src++;

-            if ((putchar != NULL))
-            {
-                /* Hash marks to indicate progress */
-                if (hashj == 0x1000)
-                {
-                    hashj = -1;
-                    putchar(hash[0]);
-                    putchar(hash[hashi]);
+			if ((putchar != NULL))
+			{
+				/* Hash marks to indicate progress */
+				if (hashj == 0x1000)
+				{
+					hashj = -1;
+					putchar(hash[0]);
+					putchar(hash[hashi]);

-                    hashi++;
-                    if (hashi == 5)
-                    {
-                        hashi=1;
-                    }
+					hashi++;
+					if (hashi == 5)
+					{
+						hashi=1;
+					}

-                }
-                hashj++;
-            }
-        }
-        else
-            break;
-    }
+				}
+				hashj++;
+			}
+		}
+		else
+			break;
+	}

-    /*
-     * Place device in read mode
-     */
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
+	/*
+	 * Place device in read mode
+	 */
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);

-    if (putchar != NULL)
-    {
-        putchar(hash[0]);
-    }
+	if (putchar != NULL)
+	{
+		putchar(hash[0]);
+	}

-    /*
-     * If a function was passed in, call it now
-     */
-    if ((func != NULL))
-    {
-        func();
-    }
+	/*
+	 * If a function was passed in, call it now
+	 */
+	if ((func != NULL))
+	{
+		func();
+	}

-    return ((int)src - (int)source);
+	return ((int)src - (int)source);
 }

 /*
@@ -635,7 +634,7 @@ void basflash(void)
 						if (strlen(fileinfo.fname) >= 4
 								&& strncmp(
 										&fileinfo.fname[strlen(fileinfo.fname)
-										                - 4], srec_ext, 4) == 0) /* we have a .S19 file */
+														- 4], srec_ext, 4) == 0) /* we have a .S19 file */
 						{
 							/*
 							 * build path + filename
--- a/exe/basflash_start.c
+++ b/exe/basflash_start.c
@@ -21,7 +21,7 @@
 *      Author: Markus Fröschle
 */

-#include <stdint.h>
+#include <bas_types.h>

 static uint32_t ownstack[4096];
 static uint32_t *stackptr = &ownstack[4095];
--- a/flash/flash.c
+++ b/flash/flash.c
@@ -1,4 +1,3 @@
-#include <stdint.h>
 #include <stddef.h>
 #include "bas_types.h"

@@ -192,191 +191,191 @@ static const int num_flash_areas = sizeof(flash_areas) / sizeof(struct romram);
 */
 void amd_flash_sector_erase(int n)
 {
-    volatile AMD_FLASH_CELL status;
+	volatile AMD_FLASH_CELL status;

-    pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80);
-    pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[SADDR(n)] = AMD_FLASH_CMD_DATA(0x30);
+	pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80);
+	pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[SADDR(n)] = AMD_FLASH_CMD_DATA(0x30);

-    do
-        status = pFlash[SADDR(n)];
-    while ((status & AMD_FLASH_CMD_DATA(0x80)) != AMD_FLASH_CMD_DATA(0x80));
+	do
+		status = pFlash[SADDR(n)];
+	while ((status & AMD_FLASH_CMD_DATA(0x80)) != AMD_FLASH_CMD_DATA(0x80));

-    /*
-     * Place device in read mode
-     */
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
+	/*
+	 * Place device in read mode
+	 */
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
 }

 int amd_flash_erase(void *start, int bytes, void (*putchar)(int))
 {
-    int i, ebytes = 0;
+	int i, ebytes = 0;

-    if (bytes == 0)
-        return 0;
+	if (bytes == 0)
+		return 0;

-    for (i = 0; i < AMD_FLASH_SECTORS; i++)
-    {
-        if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
-            start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
-        {
-            break;
-        }
-    }
+	for (i = 0; i < AMD_FLASH_SECTORS; i++)
+	{
+		if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
+			start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
+		{
+			break;
+		}
+	}

-    while (ebytes < bytes)
-    {
-        if (putchar != NULL)
-        {
-            putchar('.');
-        }
-        amd_flash_sector_erase(i);
-        ebytes += SSIZE(i);
-        i++;
-    }
+	while (ebytes < bytes)
+	{
+		if (putchar != NULL)
+		{
+			putchar('.');
+		}
+		amd_flash_sector_erase(i);
+		ebytes += SSIZE(i);
+		i++;
+	}

-    if (putchar != NULL)
-    {
-        putchar(10);    /* LF */
-        putchar(13);    /* CR */
-    }
+	if (putchar != NULL)
+	{
+		putchar(10);    /* LF */
+		putchar(13);    /* CR */
+	}

-    return ebytes;
+	return ebytes;
 }

 void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
 {
-    volatile AMD_FLASH_CELL status;
-    int retry;
+	volatile AMD_FLASH_CELL status;
+	int retry;

-    pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[0x555] = AMD_FLASH_CMD_DATA(0xA0);
-    *dst = data;
+	pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[0x555] = AMD_FLASH_CMD_DATA(0xA0);
+	*dst = data;

-    /*
-     * Wait for program operation to finish
-     *  (Data# Polling Algorithm)
-     */
-    retry = 0;
-    while (1)
-    {
-        status = *dst;
-        if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
-            (data & AMD_FLASH_CMD_DATA(0x80)))
-        {
-            break;
-        }
-        if (status & AMD_FLASH_CMD_DATA(0x20))
-        {
-            status = *dst;
-            if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
-                (data & AMD_FLASH_CMD_DATA(0x80)))
-            {
-                break;
-            }
-            if (++retry > 1024)
-            {
-                break;
-            }
-        }
-    }
+	/*
+	 * Wait for program operation to finish
+	 *  (Data# Polling Algorithm)
+	 */
+	retry = 0;
+	while (1)
+	{
+		status = *dst;
+		if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
+			(data & AMD_FLASH_CMD_DATA(0x80)))
+		{
+			break;
+		}
+		if (status & AMD_FLASH_CMD_DATA(0x20))
+		{
+			status = *dst;
+			if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
+				(data & AMD_FLASH_CMD_DATA(0x80)))
+			{
+				break;
+			}
+			if (++retry > 1024)
+			{
+				break;
+			}
+		}
+	}
 }


 int amd_flash_program(void *dest, void *source, int bytes, int erase, void (*func)(void), void (*putchar)(int))
 {
-    AMD_FLASH_CELL *src;
+	AMD_FLASH_CELL *src;
 	AMD_FLASH_CELL *dst;
-    int hashi = 1;
+	int hashi = 1;
 	int hashj = 0;
-    char hash[5];
+	char hash[5];

-    hash[0] = 8;  /* Backspace */
-    hash[1] = 124;/* "|" */
-    hash[2] = 47; /* "/" */
-    hash[3] = 45; /* "-" */
-    hash[4] = 92; /* "\" */
+	hash[0] = 8;  /* Backspace */
+	hash[1] = 124;/* "|" */
+	hash[2] = 47; /* "/" */
+	hash[3] = 45; /* "-" */
+	hash[4] = 92; /* "\" */

-    src = (AMD_FLASH_CELL *)source;
-    dst = (AMD_FLASH_CELL *)dest;
+	src = (AMD_FLASH_CELL *)source;
+	dst = (AMD_FLASH_CELL *)dest;

-    /*
-     * Place device in read mode
-     */
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
+	/*
+	 * Place device in read mode
+	 */
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);

-    /*
-     * Erase device if necessary
-     */
-    if (erase)
-    {
-        amd_flash_erase(dest, bytes, putchar);
-    }
+	/*
+	 * Erase device if necessary
+	 */
+	if (erase)
+	{
+		amd_flash_erase(dest, bytes, putchar);
+	}

-    /*
-     * Program device
-     */
-    while (bytes > 0)
-    {
-        amd_flash_program_cell(dst, *src);
+	/*
+	 * Program device
+	 */
+	while (bytes > 0)
+	{
+		amd_flash_program_cell(dst, *src);

-        /* Verify Write */
-        if (*dst == *src)
-        {
-            bytes -= AMD_FLASH_CELL_BYTES;
-            *dst++, *src++;
+		/* Verify Write */
+		if (*dst == *src)
+		{
+			bytes -= AMD_FLASH_CELL_BYTES;
+			*dst++, *src++;

-            if ((putchar != NULL))
-            {
-                /* Hash marks to indicate progress */
-                if (hashj == 0x1000)
-                {
-                    hashj = -1;
-                    putchar(hash[0]);
-                    putchar(hash[hashi]);
+			if ((putchar != NULL))
+			{
+				/* Hash marks to indicate progress */
+				if (hashj == 0x1000)
+				{
+					hashj = -1;
+					putchar(hash[0]);
+					putchar(hash[hashi]);

-                    hashi++;
-                    if (hashi == 5)
-                    {
-                        hashi = 1;
-                    }
+					hashi++;
+					if (hashi == 5)
+					{
+						hashi = 1;
+					}

-                }
-                hashj++;
-            }
-        }
-        else
-            break;
-    }
+				}
+				hashj++;
+			}
+		}
+		else
+			break;
+	}

-    /*
-     * Place device in read mode
-     */
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
-    pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);
+	/*
+	 * Place device in read mode
+	 */
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xAA);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0x55);
+	pFlash[0] = AMD_FLASH_CMD_DATA(0xF0);

-    if (putchar != NULL)
-    {
-        putchar(hash[0]);
-    }
+	if (putchar != NULL)
+	{
+		putchar(hash[0]);
+	}

-    /*
-     * If a function was passed in, call it now
-     */
-    if ((func != NULL))
-    {
-        func();
-    }
+	/*
+	 * If a function was passed in, call it now
+	 */
+	if ((func != NULL))
+	{
+		func();
+	}

-    return ((int)src - (int)source);
+	return ((int)src - (int)source);
 }

--- a/flash/s19reader.c
+++ b/flash/s19reader.c
@@ -23,8 +23,7 @@
 * Copyright 2012        M. Froeschle
 */

-#include <stdint.h>
-#include <stdbool.h>
+#include <bas_types.h>

 #include "bas_printf.h"
 #include "bas_string.h"
@@ -340,6 +339,17 @@ static err_t verify(uint8_t *dst, uint8_t *src, uint32_t length)
 	return OK;
 }

+/*
+ * needed to avoid missing type cast warning below
+ */
+static inline err_t srec_memcpy(uint8_t *dst, uint8_t *src, size_t n)
+{
+	err_t e = OK;
+
+	memcpy((void *) dst, (void *) src, n);
+	return e;
+}
+
 void srec_execute(char *flasher_filename)
 {
 	DRESULT res;
@@ -372,7 +382,7 @@ void srec_execute(char *flasher_filename)
 				{
 					/* next pass: copy data to destination */
 					xprintf("OK.\r\ncopy/flash data: ");
-					err = read_srecords(flasher_filename, &start_address, &length, memcpy);
+					err = read_srecords(flasher_filename, &start_address, &length, srec_memcpy);
 					if (err == OK)
 					{
 						/* next pass: verify data */
--- a/flash_scripts/flash_firebee_bas.bdm
+++ b/flash_scripts/flash_firebee_bas.bdm
@@ -1,71 +1,53 @@
-#!/usr/local/bin/bdmctrl 
+#!/usr/local/bin/bdmctrl -D2
 #
 # firebee board initialization for bdmctrl 
 #
 open $1
 reset
-sleep 10
+sleep 1

 wait

-# Turn on MBAR at 0xFF00_0000
-write-ctrl 0x0C0F 0xFF000000
-
-# set VBR
-write-ctrl 0x0801 0x00000000
-
-#
-# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
-write 0xFF000500 0xE0000000 4
-write 0xFF000508 0x00001180 4
-write 0xFF000504 0x007F0001 4
-
-# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
-write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
-write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
-write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
-write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
-write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
-write 0xFF000108 0x73622830 4 # SDCFG1
-write 0xFF00010C 0x46770000 4 # SDCFG2
-
-write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
-write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
-write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
-sleep 100
-write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
-write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
-write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
-write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
-write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
-sleep 10
-
-
 # use system sdram as flashlib scratch area.
 # TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
 # This seems to be related to large flash buffers and PC-relative adressing of the plugin
-flash-plugin 0x1000 0xf000 flash29.plugin
+#flash-plugin 0x1000 0xf000 flash29-5475.plugin
 # notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
-flash 0xE0000000
+flash 0xe0000000

 # Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS)
 #
 # Caution: sector offset numbers need to be the ones from the x16 address range
 # column and they vary in size - needs to be exactly as in the data sheet (p. 9)
 #
-# contrary to documentation, it seems we need to erase-wait after each sector

-erase 0xE0000000 0
-erase 0xE0000000 1
-erase 0xE0000000 2
-erase 0xE0000000 3
-erase 0xE0000000 4
-erase 0xE0000000 5
-erase 0xE0000000 7
-erase 0xE0000000 8
-erase 0xE0000000 9
-erase 0xE0000000 10
-erase-wait 0xE0000000
+erase 0xe0000000 0
+erase 0xe0000000 0x1000
+erase 0xe0000000 0x2000
+erase 0xe0000000 0x3000
+erase 0xe0000000 0x4000
+erase 0xe0000000 0x5000
+erase 0xe0000000 0x6000
+erase 0xe0000000 0x7000
+erase 0xe0000000 0x8000
+erase 0xe0000000 0x10000
+erase 0xe0000000 0x18000
+erase 0xe0000000 0x20000
+erase 0xe0000000 0x28000
+erase 0xe0000000 0x30000
+erase 0xe0000000 0x38000
+erase 0xe0000000 0x40000
+erase 0xe0000000 0x48000
+erase 0xe0000000 0x50000
+erase 0xe0000000 0x58000
+erase 0xe0000000 0x60000
+erase 0xe0000000 0x70000
+erase 0xe0000000 0x78000
+
+erase-wait 0xe0000000
+# should now have erased from 0xe0000000 to 0xe00fffff
+
+dump-mem 0xe0010000 0x20 b

 load -v ../firebee/bas.elf
 wait
--- a/flash_scripts/flash_m548x_etos.bdm
+++ b/flash_scripts/flash_m548x_etos.bdm
@@ -63,4 +63,4 @@ erase 0xe0000000 37
 erase 0xe0000000 38
 erase 0xe0000000 39

-load ../../emutos/emutos-m548x_bas.elf
+load ../../emutos/emutos-m548x-bas_gcc.elf
--- a/fs/ccsbcs.c
+++ b/fs/ccsbcs.c
@@ -26,7 +26,7 @@
 */

 #include <ff.h>
-#include <stdint.h>
+#include <bas_types.h>

 #if _CODE_PAGE == 437
 #define _TBLDEF 1
--- a/fs/ff.c
+++ b/fs/ff.c
@@ -95,7 +95,7 @@
 /                   Changed option name _FS_SHARE to _FS_LOCK.
 /---------------------------------------------------------------------------*/

-#include <stdint.h>
+#include <bas_types.h>
 #include <ff.h>			/* FatFs configurations and declarations */
 #include <diskio.h>		/* Declarations of low level disk I/O functions */

@@ -356,11 +356,11 @@ typedef struct {
 uint32_t get_fattime (void)
 {
   return     ((uint32_t)(2012 - 1980) << 25)   /* Year = 2012 */
-         | ((uint32_t)1 << 21)            /* Month = 1 */
-         | ((uint32_t)1 << 16)            /* Day_m = 1*/
-         | ((uint32_t)0 << 11)            /* Hour = 0 */
-         | ((uint32_t)0 << 5)          /* Min = 0 */
-         | ((uint32_t)0 >> 1);            /* Sec = 0 */
+		 | ((uint32_t)1 << 21)            /* Month = 1 */
+		 | ((uint32_t)1 << 16)            /* Day_m = 1*/
+		 | ((uint32_t)0 << 11)            /* Hour = 0 */
+		 | ((uint32_t)0 << 5)          /* Min = 0 */
+		 | ((uint32_t)0 >> 1);            /* Sec = 0 */
 }

 /* Character code support macros */
@@ -970,7 +970,7 @@ FRESULT remove_chain (
 #if _USE_ERASE
 			if (ecl + 1 == nxt) {	/* Is next cluster contiguous? */
 				ecl = nxt;
-			} else {				/* End of contiguous clusters */ 
+			} else {				/* End of contiguous clusters */
 				rt[0] = clust2sect(fs, scl);					/* Start sector */
 				rt[1] = clust2sect(fs, ecl) + fs->csize - 1;	/* End sector */
 				disk_ioctl(fs->drv, CTRL_ERASE_SECTOR, rt);		/* Erase the block */
@@ -2190,7 +2190,7 @@ FRESULT chk_mounted (	/* FR_OK(0): successful, !=0: any error occurred */

 	/* Get fsinfo if available */
 	if (fmt == FS_FAT32) {
-	 	fs->fsi_flag = 0;
+		fs->fsi_flag = 0;
 		fs->fsi_sector = bsect + LD_WORD(fs->win+BPB_FSInfo);
 		if (disk_read(fs->drv, fs->win, fs->fsi_sector, 1) == RES_OK &&
 			LD_WORD(fs->win+BS_55AA) == 0xAA55 &&
@@ -2721,7 +2721,7 @@ FRESULT f_close (
 		FATFS *fs = fp->fs;;
 		res = validate(fp);
 		if (res == FR_OK) {
-			res = dec_lock(fp->lockid);	
+			res = dec_lock(fp->lockid);
 			unlock_fs(fs, FR_OK);
 		}
 #else
@@ -2820,7 +2820,7 @@ FRESULT f_getcwd (
 				res = dir_read(&dj);
 				if (res != FR_OK) break;
 				if (ccl == ld_clust(dj.fs, dj.dir)) break;	/* Found the entry */
-				res = dir_next(&dj, 0);	
+				res = dir_next(&dj, 0);
 			} while (res == FR_OK);
 			if (res == FR_NO_FILE) res = FR_INT_ERR;/* It cannot be 'not found'. */
 			if (res != FR_OK) break;
--- a/i2c/i2c.c
+++ b/i2c/i2c.c
@@ -0,0 +1,41 @@
+
+#include <bas_types.h>
+
+void i2c_init(void)
+{
+
+}
+
+void i2c_set_frequency(int hz)
+{
+}
+
+int i2c_read(int address, char *data, int length, bool repeated)
+{
+    return 0;
+}
+
+int i2c_read_byte(int ack)
+{
+    return 0;
+}
+
+int i2c_write(int address, const char *data, int length, bool repeated)
+{
+    return 0;
+}
+
+int i2c_write_byte(int data)
+{
+    return 0;
+}
+
+void i2c_start(void)
+{
+
+}
+
+void i2c_stop(void)
+{
+
+}
--- a/if/driver_vec.c
+++ b/if/driver_vec.c
@@ -23,20 +23,21 @@
 *      Author: Markus Fröschle
 */

-#include <stdint.h>
-#include <stddef.h>
+#include <bas_types.h>
 #include "version.h"
 #include "xhdi_sd.h"
 #include "dma.h"
 #include "driver_vec.h"
 #include "driver_mem.h"
+#include "pci.h"
+#include "mmu.h"

 /*
 * driver interface struct for the SD card BaS driver
 */
-static struct xhdi_driver_interface xhdi_call_interface = 
+static struct xhdi_driver_interface xhdi_call_interface =
 {
-	xhdi_call
+    xhdi_call
 };

 /*
@@ -46,90 +47,204 @@ static struct xhdi_driver_interface xhdi_call_interface =
 */
 static struct dma_driver_interface dma_interface =
 {
-	.version = 0x0101,
-	.magic = 'DMAC',
-	.dma_set_initiator = &dma_set_initiator,
-	.dma_get_initiator = dma_get_initiator,
-	.dma_free_initiator = dma_free_initiator,
-	.dma_set_channel = dma_set_channel,
-	.dma_get_channel = dma_get_channel,
-	.dma_free_channel = dma_free_channel,
-	.dma_clear_channel = dma_clear_channel,
-	.MCD_startDma = MCD_startDma,
-	.MCD_dmaStatus = MCD_dmaStatus,
-	.MCD_XferProgrQuery = MCD_XferProgrQuery,
-	.MCD_killDma = MCD_killDma,
-	.MCD_continDma = MCD_continDma,
-	.MCD_pauseDma = MCD_pauseDma,
-	.MCD_resumeDma = MCD_resumeDma,
-	.MCD_csumQuery = MCD_csumQuery,
-	.dma_malloc = driver_mem_alloc,
-	.dma_free = driver_mem_free
+    .version = 0x0101,
+    .magic = 0x444d4143, 						/* 'DMAC' */
+    .dma_set_initiator = dma_set_initiator,
+    .dma_get_initiator = dma_get_initiator,
+    .dma_free_initiator = dma_free_initiator,
+    .dma_set_channel = dma_set_channel,
+    .dma_get_channel = dma_get_channel,
+    .dma_free_channel = dma_free_channel,
+    .dma_clear_channel = dma_clear_channel,
+    .MCD_startDma = (int (*)(long, int8_t *, unsigned int, int8_t *, unsigned int,
+                    unsigned int, unsigned int, unsigned int, int,
+                    unsigned int, unsigned int)) MCD_startDma,
+    .MCD_dmaStatus = (int32_t (*)(int32_t)) MCD_dmaStatus,
+    .MCD_XferProgrQuery = (int32_t (*)(int32_t, MCD_XferProg *)) MCD_XferProgrQuery,
+    .MCD_killDma = (int32_t (*)(int32_t)) MCD_killDma,
+    .MCD_continDma = (int32_t (*)(int32_t)) MCD_continDma,
+    .MCD_pauseDma = (int32_t (*)(int32_t)) MCD_pauseDma,
+    .MCD_resumeDma = (int32_t (*)(int32_t)) MCD_resumeDma,
+    .MCD_csumQuery = (int32_t (*)(int32_t, uint32_t *)) MCD_csumQuery,
+    .dma_malloc = driver_mem_alloc,
+    .dma_free = driver_mem_free
 };

-extern const struct fb_info *info_fb;
+extern struct fb_info *info_fb;
+
+/*
+ * driver interface struct for the PCI_BIOS BaS driver
+ */
+static struct pci_bios_interface pci_interface =
+{
+    .subjar = 0,
+    .version = 0x00010000,
+    .find_pci_device = wrapper_find_pci_device,
+    .find_pci_classcode = wrapper_find_pci_classcode,
+    .read_config_byte = wrapper_read_config_byte,
+    .read_config_word = wrapper_read_config_word,
+    .read_config_longword = wrapper_read_config_longword,
+    .fast_read_config_byte = wrapper_fast_read_config_byte,
+    .fast_read_config_word = wrapper_fast_read_config_word,
+    .fast_read_config_longword = wrapper_fast_read_config_longword,
+    .write_config_byte = wrapper_write_config_byte,
+    .write_config_word = wrapper_write_config_word,
+    .write_config_longword = wrapper_write_config_longword,
+    .hook_interrupt = wrapper_hook_interrupt,
+    .unhook_interrupt = wrapper_unhook_interrupt,
+    .special_cycle = wrapper_special_cycle,
+    .get_routing = wrapper_get_routing,
+    .set_interrupt = wrapper_set_interrupt,
+    .get_resource = wrapper_get_resource,
+    .get_card_used = wrapper_get_card_used,
+    .set_card_used = wrapper_set_card_used,
+    .read_mem_byte = wrapper_read_mem_byte,
+    .read_mem_word = wrapper_read_mem_word,
+    .read_mem_longword = wrapper_read_mem_longword,
+    .fast_read_mem_byte = wrapper_fast_read_mem_byte,
+    .fast_read_mem_word = wrapper_fast_read_mem_word,
+    .fast_read_mem_longword = wrapper_fast_read_mem_longword,
+    .write_mem_byte = wrapper_write_mem_byte,
+    .write_mem_word = wrapper_write_mem_word,
+    .write_mem_longword = wrapper_write_mem_longword,
+    .read_io_byte = wrapper_read_io_byte,
+    .read_io_word = wrapper_read_io_word,
+    .read_io_longword = wrapper_read_io_longword,
+    .fast_read_io_byte = wrapper_fast_read_io_byte,
+    .fast_read_io_word = wrapper_fast_read_io_word,
+    .fast_read_io_longword = wrapper_fast_read_io_longword,
+    .write_io_byte = wrapper_write_io_byte,
+    .write_io_word = wrapper_write_io_word,
+    .write_io_longword = wrapper_write_io_longword,
+    .get_machine_id = wrapper_get_machine_id,
+    .get_pagesize = wrapper_get_pagesize,
+    .virt_to_bus = wrapper_virt_to_bus,
+    .bus_to_virt = wrapper_bus_to_virt,
+    .virt_to_phys = wrapper_virt_to_phys,
+    .phys_to_virt = wrapper_phys_to_virt,
+};

 /*
 * driver interface struct for the BaS framebuffer video driver
 */
 static struct framebuffer_driver_interface framebuffer_interface =
 {
-	.framebuffer_info = &info_fb
+    .framebuffer_info = &info_fb
+};
+
+/*
+ * driver interface struct for the BaS MMU driver
+ */
+static struct mmu_driver_interface mmu_interface =
+{
+    .map_page_locked = &mmu_map_data_page_locked,
+    .unlock_page = &mmu_unlock_data_page,
+    .report_locked_pages = &mmu_report_locked_pages,
+    .report_pagesize = &mmu_report_pagesize
 };

 static struct generic_interface interfaces[] =
 {
-	{
-		/* BaS SD-card driver interface */
+    {
+        /* BaS SD-card driver interface */

-		.type = XHDI_DRIVER,
-		.name = "SDCARD",
-		.description = "BaS SD Card driver",
-		.version = 0,
-		.revision = 1,
-		.interface.xhdi = &xhdi_call_interface 
-	},
-	{
-		.type = MCD_DRIVER,
-		.name = "MCDDMA",
-		.description = "BaS Multichannel DMA driver",
-		.version = 0,
-		.revision = 1,
-		.interface.dma = &dma_interface,
-	},
-	{
-		.type = VIDEO_DRIVER,
-		.name = "RADEON",
-		.description = "BaS RADEON framebuffer driver",
-		.version = 0,
-		.revision = 1,
-		.interface.fb = &framebuffer_interface,
-	},
+        .type = XHDI_DRIVER,
+        .name = "SDCARD",
+        .description = "BaS SD Card driver",
+        .version = 0,
+        .revision = 1,
+        .interface.xhdi = &xhdi_call_interface
+    },
+    {
+        .type = MCD_DRIVER,
+        .name = "MCDDMA",
+        .description = "BaS Multichannel DMA driver",
+        .version = 0,
+        .revision = 1,
+        .interface.dma = &dma_interface,
+    },
+    {
+        .type = VIDEO_DRIVER,
+        .name = "RADEON",
+        .description = "BaS RADEON framebuffer driver",
+        .version = 0,
+        .revision = 1,
+        .interface.fb = &framebuffer_interface,
+    },
+    {
+        .type = PCI_DRIVER,
+        .name = "PCI",
+        .description = "BaS PCI_BIOS driver",
+        .version = 0,
+        .revision = 1,
+        .interface.pci = &pci_interface,
+    },
+    {
+        .type = MMU_DRIVER,
+        .name = "MMU",
+        .description = "BaS MMU driver",
+        .version = 0,
+        .revision = 1,
+        .interface.mmu = &mmu_interface,
+    },
+    /* insert new drivers here */

-	/* insert new drivers here */
-
-	{
-		.type = END_OF_DRIVERS
-	}
+    {
+        .type = END_OF_DRIVERS
+    }
 };

+extern void remove_handler(void);   /* forward declaration */
+
 /*
 * this is the driver table we expose to the OS
 */
 static struct driver_table bas_drivers =
 {
-	.bas_version = MAJOR_VERSION,
-	.bas_revision = MINOR_VERSION,
-	.remove_handler = NULL,
-	.interfaces = { interfaces }
+    .bas_version = MAJOR_VERSION,
+    .bas_revision = MINOR_VERSION,
+    .remove_handler = remove_handler,
+    .interfaces = interfaces
 };

+void remove_handler(void)
+{
+    extern void std_exc_vec(void);
+    uint32_t *trap_0_vector = (uint32_t *) 0x80;
+
+    *trap_0_vector = (uint32_t) std_exc_vec;
+}
+
 void __attribute__((interrupt)) get_bas_drivers(void)
 {
-	__asm__ __volatile__(
-		"move.l	#%[drivers],d0\n\t"
-		:	                            /* no output */
-		:	[drivers] "o" (bas_drivers)		/* input */
-		:									/* clobber */
-	);
+    __asm__ __volatile(
+        /*
+         * sp should now point to the next instruction after the trap
+         * The trap itself is 2 bytes, the four bytes before that must
+         * read '_BAS' or we are not meant by this call
+         */
+        "		move.l	a0,-(sp)				\n\t"	// save registers
+        "       move.l  d0,-(sp)                \n\t"
+        "		move.l	12(sp),a0         		\n\t"	// get return address
+        "       move.l  -6(a0),d0               \n\t"   //
+        "		cmp.l	#0x5f424153,d0			\n\t"	// is it '_BAS'?
+        "		beq		fetch_drivers			\n\t"	// yes
+        /*
+         * This seems indeed a "normal" trap #0. Better pass control to "normal" trap #0 processing
+         * If trap #0 isn't set to something sensible, we'll probably crash here, but this must be
+         * prevented on the caller side.
+         */
+        "		move.l	(sp)+,d0				\n\t"	// restore registers
+        "		move.l	(sp)+,a0				\n\t"
+        "		move.l	0x80,-(sp)				\n\t"	// fetch vector
+        "		rts								\n\t"	// and jump through it
+
+        "fetch_drivers:							\n\t"
+        "		move.l	#%[drivers],d0			\n\t"	// return driver struct in d0
+        "		addq.l	#4,sp					\n\t"	// adjust stack
+        "       move.l  (sp)+,a0                \n\t"   // restore register
+        :	                            /* no output */
+        :	[drivers] "o" (bas_drivers)		/* input */
+        :									/* clobber */
+    );
 }
--- a/include/MCD_dma.h
+++ b/include/MCD_dma.h
@@ -7,14 +7,11 @@
 #ifndef _MCD_API_H
 #define _MCD_API_H

-#include "bas_types.h"
-
 /*
 * Turn Execution Unit tasks ON (#define) or OFF (#undef)
 */
 #undef MCD_INCLUDE_EU
 //#define MCD_INCLUDE_EU
-
 /*
 * Number of DMA channels
 */
@@ -49,33 +46,39 @@
 /*
 * Portability typedefs
 */
+typedef int s32;
+typedef unsigned int u32;
+typedef short s16;
+typedef unsigned short u16;
+typedef char s8;
+typedef unsigned char u8;

 /*
 * These structures represent the internal registers of the
 * multi-channel DMA
 */
 struct dmaRegs_s {
-   uint32_t taskbar;         /* task table base address register */
-   uint32_t currPtr;
-   uint32_t endPtr;
-   uint32_t varTablePtr;
-   uint16_t dma_rsvd0;
-   uint16_t ptdControl;      /* ptd control */
-   uint32_t intPending;      /* interrupt pending register */
-   uint32_t intMask;         /* interrupt mask register */
-   uint16_t taskControl[16]; /* task control registers */
-   uint8_t  priority[32];    /* priority registers */
-   uint32_t initiatorMux;    /* initiator mux control */
-   uint32_t taskSize0;       /* task size control register 0. */
-   uint32_t taskSize1;       /* task size control register 1. */
-   uint32_t dma_rsvd1;       /* reserved */
-   uint32_t dma_rsvd2;       /* reserved */
-   uint32_t debugComp1;      /* debug comparator 1 */
-   uint32_t debugComp2;      /* debug comparator 2 */
-   uint32_t debugControl;    /* debug control */
-   uint32_t debugStatus;     /* debug status */
-   uint32_t ptdDebug;        /* priority task decode debug */
-   uint32_t dma_rsvd3[31];   /* reserved */
+   u32 taskbar;         /* task table base address register */
+   u32 currPtr;
+   u32 endPtr;
+   u32 varTablePtr;
+   u16 dma_rsvd0;
+   u16 ptdControl;      /* ptd control */
+   u32 intPending;      /* interrupt pending register */
+   u32 intMask;         /* interrupt mask register */
+   u16 taskControl[16]; /* task control registers */
+   u8  priority[32];    /* priority registers */
+   u32 initiatorMux;    /* initiator mux control */
+   u32 taskSize0;       /* task size control register 0. */
+   u32 taskSize1;       /* task size control register 1. */
+   u32 dma_rsvd1;       /* reserved */
+   u32 dma_rsvd2;       /* reserved */
+   u32 debugComp1;      /* debug comparator 1 */
+   u32 debugComp2;      /* debug comparator 2 */
+   u32 debugControl;    /* debug control */
+   u32 debugStatus;     /* debug status */
+   u32 ptdDebug;        /* priority task decode debug */
+   u32 dma_rsvd3[31];   /* reserved */
 };
 typedef volatile struct dmaRegs_s dmaRegs;

@@ -161,7 +164,7 @@ typedef volatile struct dmaRegs_s dmaRegs;
 */
 /* Byte swapping: */
 #define MCD_NO_BYTE_SWAP    0x00045670  /* to disable byte swapping. */
-#define MCD_BYTE_REVERSE    0x00076540  /* to reverse the bytes of each uint32_t of the DMAed data. */
+#define MCD_BYTE_REVERSE    0x00076540  /* to reverse the bytes of each u32 of the DMAed data. */
 #define MCD_U16_REVERSE     0x00067450  /* to reverse the 16-bit halves of
                                           each 32-bit data value being DMAed.*/
 #define MCD_U16_BYTE_REVERSE    0x00054760 /* to reverse the byte halves of each
@@ -228,44 +231,44 @@ typedef volatile struct dmaRegs_s dmaRegs;

 /* Task Table Entry struct*/
 typedef struct {
-    uint32_t TDTstart;   /* task descriptor table start */
-    uint32_t TDTend;     /* task descriptor table end */
-    uint32_t varTab;     /* variable table start */
-    uint32_t FDTandFlags;    /* function descriptor table start and flags */
-    volatile uint32_t descAddrAndStatus;
-    volatile uint32_t modifiedVarTab;
-    uint32_t contextSaveSpace;   /* context save space start */
-    uint32_t literalBases;
+    u32 TDTstart;   /* task descriptor table start */
+    u32 TDTend;     /* task descriptor table end */
+    u32 varTab;     /* variable table start */
+    u32 FDTandFlags;    /* function descriptor table start and flags */
+    volatile u32 descAddrAndStatus;
+    volatile u32 modifiedVarTab;
+    u32 contextSaveSpace;   /* context save space start */
+    u32 literalBases;
 } TaskTableEntry;


 /* Chained buffer descriptor */
 typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
 struct MCD_bufDesc_struct {
-   uint32_t flags;         /* flags describing the DMA */
-   uint32_t csumResult;    /* checksum from checksumming performed since last checksum reset */
-   int8_t  *srcAddr;      /* the address to move data from */
-   int8_t  *destAddr;     /* the address to move data to */
-   int8_t  *lastDestAddr; /* the last address written to */
-   uint32_t dmaSize;       /* the number of bytes to transfer independent of the transfer size */
+   u32 flags;         /* flags describing the DMA */
+   u32 csumResult;    /* checksum from checksumming performed since last checksum reset */
+   s8  *srcAddr;      /* the address to move data from */
+   s8  *destAddr;     /* the address to move data to */
+   s8  *lastDestAddr; /* the last address written to */
+   u32 dmaSize;       /* the number of bytes to transfer independent of the transfer size */
   MCD_bufDesc *next; /* next buffer descriptor in chain */
-   uint32_t info;          /* private information about this descriptor;  DMA does not affect it */
+   u32 info;          /* private information about this descriptor;  DMA does not affect it */
 };

 /* Progress Query struct */
 typedef volatile struct MCD_XferProg_struct {
-   int8_t *lastSrcAddr;         /* the most-recent or last, post-increment source address */
-   int8_t *lastDestAddr;        /* the most-recent or last, post-increment destination address */
-   uint32_t  dmaSize;            /* the amount of data transferred for the current buffer */
+   s8 *lastSrcAddr;         /* the most-recent or last, post-increment source address */
+   s8 *lastDestAddr;        /* the most-recent or last, post-increment destination address */
+   u32  dmaSize;            /* the amount of data transferred for the current buffer */
   MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */
 } MCD_XferProg;


 /* FEC buffer descriptor */
 typedef volatile struct MCD_bufDescFec_struct {
-    uint16_t statCtrl;
-    uint16_t length;
-    uint32_t dataPointer;
+    u16 statCtrl;
+    u16 length;
+    u32 dataPointer;
 } MCD_bufDescFec;


@@ -279,65 +282,65 @@ typedef volatile struct MCD_bufDescFec_struct {
 */
 int MCD_startDma (
   int channel,   /* the channel on which to run the DMA */
-   int8_t  *srcAddr,  /* the address to move data from, or buffer-descriptor address */
-   int16_t srcIncr,   /* the amount to increment the source address per transfer */
-   int8_t  *destAddr, /* the address to move data to */
-   int16_t destIncr,  /* the amount to increment the destination address per transfer */
-   uint32_t dmaSize,   /* the number of bytes to transfer independent of the transfer size */
-   uint32_t xferSize,  /* the number bytes in of each data movement (1, 2, or 4) */
-   uint32_t initiator, /* what device initiates the DMA */
+   s8  *srcAddr,  /* the address to move data from, or buffer-descriptor address */
+   s16 srcIncr,   /* the amount to increment the source address per transfer */
+   s8  *destAddr, /* the address to move data to */
+   s16 destIncr,  /* the amount to increment the destination address per transfer */
+   u32 dmaSize,   /* the number of bytes to transfer independent of the transfer size */
+   u32 xferSize,  /* the number bytes in of each data movement (1, 2, or 4) */
+   u32 initiator, /* what device initiates the DMA */
   int priority,  /* priority of the DMA */
-   uint32_t flags,     /* flags describing the DMA */
-   uint32_t funcDesc   /* a description of byte swapping, bit swapping, and CRC actions */
+   u32 flags,     /* flags describing the DMA */
+   u32 funcDesc   /* a description of byte swapping, bit swapping, and CRC actions */
 );

-/* 
- * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA 
- * registers, relocating and creating the appropriate task structures, and 
+/*
+ * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
+ * registers, relocating and creating the appropriate task structures, and
 * setting up some global settings
 */
-int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, uint32_t flags);
+int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags);

-/* 
+/*
 * MCD_dmaStatus() returns the status of the DMA on the requested channel.
 */
 int MCD_dmaStatus (int channel);

-/* 
+/*
 * MCD_XferProgrQuery() returns progress of DMA on requested channel
 */
 int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep);

-/* 
+/*
 * MCD_killDma() halts the DMA on the requested channel, without any
 * intention of resuming the DMA.
 */
 int MCD_killDma (int channel);

-/* 
+/*
 * MCD_continDma() continues a DMA which as stopped due to encountering an
 * unready buffer descriptor.
 */
 int MCD_continDma (int channel);

-/* 
+/*
 * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
- * running on that channel). 
+ * running on that channel).
 */
 int MCD_pauseDma (int channel);

-/* 
+/*
 * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
 * running on that channel).
 */
 int MCD_resumeDma (int channel);

-/* 
+/*
 * MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
 */
-int MCD_csumQuery (int channel, uint32_t *csum);
+int MCD_csumQuery (int channel, u32 *csum);

-/* 
+/*
 * MCD_getCodeSize provides the packed size required by the microcoded task
 * and structures.
 */
@@ -350,7 +353,7 @@ int MCD_getCodeSize(void);
 int MCD_getVersion(char **longVersion);

 /* macro for setting a location in the variable table */
-#define MCD_SET_VAR(taskTab,idx,value) ((uint32_t *)(taskTab)->varTab)[idx] = value
+#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value
   /* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
      so I'm avoiding surrounding it with "do {} while(0)" */

--- a/include/MCD_tasksInit.h
+++ b/include/MCD_tasksInit.h
@@ -15,7 +15,7 @@ void  MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer
 /*
 * Task 1
 */
-void  MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
+void  MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);


 /*
@@ -27,18 +27,18 @@ void  MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi
 /*
 * Task 3
 */
-void  MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
+void  MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);


 /*
 * Task 4
 */
-void  MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel);
+void  MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel);


 /*
 * Task 5
 */
-void  MCD_startDmaENetXmit(int8_t *bDBase, int8_t *currBD, int8_t *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel);
+void  MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel);

 #endif  /* MCD_TSK_INIT_H */
--- a/include/MCF5475.h
+++ b/include/MCF5475.h
@@ -16,7 +16,7 @@
 #ifndef __MCF5475_H__
 #define __MCF5475_H__

-#include <stdint.h>
+#include <bas_types.h>
 /***
 * MCF5475 Derivative Memory map definitions from linker command files:
 * __MBAR, __MMUBAR, __RAMBAR0, __RAMBAR0_SIZE, __RAMBAR1, __RAMBAR1_SIZE
--- a/include/MCF5475_INTC.h
+++ b/include/MCF5475_INTC.h
@@ -107,7 +107,6 @@
 #define MCF_INTC_LIACK(x)                    (*(volatile uint8_t *)(&_MBAR[0x7E4 + ((x-1)*0x4)]))


-
 /* Bit definitions and macros for MCF_INTC_IPRH */
 #define MCF_INTC_IPRH_INT32                  (0x1)
 #define MCF_INTC_IPRH_INT33                  (0x2)
--- a/include/MCF5475_MMU.h
+++ b/include/MCF5475_MMU.h
@@ -62,7 +62,7 @@
 /* Bit definitions and macros for MCF_MMU_MMUTR */
 #define MCF_MMU_MMUTR_V                      (0x1)
 #define MCF_MMU_MMUTR_SG                     (0x2)
-#define MCF_MMU_MMUTR_ID(x)                  (((x)&0xFF)<<0x2)
+#define MCF_MMU_MMUTR_ID(x)                  (((x) & 0xFF) << 0x2)
 #define MCF_MMU_MMUTR_VA(x)                  (((x)&0x3FFFFF)<<0xA)

 /* Bit definitions and macros for MCF_MMU_MMUDR */
@@ -71,9 +71,9 @@
 #define MCF_MMU_MMUDR_W                      (0x8)
 #define MCF_MMU_MMUDR_R                      (0x10)
 #define MCF_MMU_MMUDR_SP                     (0x20)
-#define MCF_MMU_MMUDR_CM(x)                  (((x)&0x3)<<0x6)
-#define MCF_MMU_MMUDR_SZ(x)                  (((x)&0x3)<<0x8)
-#define MCF_MMU_MMUDR_PA(x)                  (((x)&0x3FFFFF)<<0xA)
+#define MCF_MMU_MMUDR_CM(x)                  (((x) & 0x3) << 0x6)
+#define MCF_MMU_MMUDR_SZ(x)                  (((x) & 0x3) << 0x8)
+#define MCF_MMU_MMUDR_PA(x)                  (((x) & 0x3FFFFF) << 0xA)


 #endif /* __MCF5475_MMU_H__ */
--- a/include/bas_string.h
+++ b/include/bas_string.h
@@ -35,6 +35,7 @@ extern char *strncat(char *dst, const char *src, size_t max);
 extern int atoi(const char *c);
 extern void *memcpy(void *dst, const void *src, size_t n);
 extern void *memset(void *s, int c, size_t n);
+extern int memcmp(const void *s1, const void *s2, size_t max);
 extern void bzero(void *s, size_t n);

 #define isdigit(c)	(((c) >= '0') && ((c) <= '9'))
--- a/include/bas_types.h
+++ b/include/bas_types.h
@@ -30,5 +30,6 @@

 #include <stdint.h>
 #include <stdbool.h>
+#include <stddef.h>		/* for sizeof() etc. */

 #endif /* BAS_TYPES_H_ */
--- a/include/cache.h
+++ b/include/cache.h
@@ -25,8 +25,7 @@
 *
 */

-#include <stdint.h>
-#include <stddef.h>
+#include <bas_types.h>

 /*
 * CACR Cache Control Register
@@ -54,6 +53,7 @@
 #define CF_CACR_ICINVA      (0x00000100) /* Instr Cache Invalidate All       */
 #define CF_CACR_IDSP        (0x00000080) /* Ins default supervisor-protect   */
 #define CF_CACR_EUSP        (0x00000020) /* Switch stacks in user mode       */
+#define CF_CACR_DF          (0x00000010) /* Disable FPU                      */

 #define _DCACHE_SET_MASK ((DCACHE_SIZE/64-1)<<CACHE_WAYS)
 #define _ICACHE_SET_MASK ((ICACHE_SIZE/64-1)<<CACHE_WAYS)
@@ -83,7 +83,7 @@ extern uint32_t cacr_get(void);
 extern void cacr_set(uint32_t);
 extern void flush_icache_range(void *address, size_t size);
 extern void flush_dcache_range(void *address, size_t size);
-
+extern void flush_cache_range(void *address, size_t size);


 #endif /* _CACHE_H_ */
--- a/include/diskio.h
+++ b/include/diskio.h
@@ -12,7 +12,7 @@ extern "C" {
 #define _USE_WRITE	1	/* 1: Enable disk_write function */
 #define _USE_IOCTL	1	/* 1: Enable disk_ioctl fucntion */

-#include <stdint.h>
+#include <bas_types.h>


 /* Status of Disk Functions */
--- a/include/dma.h
+++ b/include/dma.h
@@ -26,10 +26,6 @@
 #include "MCD_dma.h"
 #include "bas_string.h"

-#define DMA_INTC_LVL        6
-#define DMA_INTC_PRI        0
-
-
 void *dma_memcpy(void *dst, void *src, size_t n);
 extern int dma_init(void);
 extern int dma_get_channel(int requestor);
@@ -39,9 +35,9 @@ extern void dma_clear_channel(int channel);
 extern uint32_t dma_get_initiator(int requestor);
 extern int dma_set_initiator(int initiator);
 extern void dma_free_initiator(int initiator);
-extern void dma_irq_enable(uint8_t lvl, uint8_t pri);
+extern void dma_irq_enable(void);
 extern void dma_irq_disable(void);
-extern int dma_interrupt_handler(void *arg1, void *arg2);
+extern bool dma_interrupt_handler(void *arg1, void *arg2);


 #endif /* _DMA_H_ */
--- a/include/driver_vec.h
+++ b/include/driver_vec.h
@@ -27,57 +27,61 @@

 #include "xhdi_sd.h"
 #include "MCD_dma.h"
+#include "pci.h"

 enum driver_type
 {
-	END_OF_DRIVERS,		/* marks end of driver list */
-	BLOCKDEV_DRIVER,
-	CHARDEV_DRIVER,
-	VIDEO_DRIVER,
-	XHDI_DRIVER,
-	MCD_DRIVER,
+    BLOCKDEV_DRIVER,
+    CHARDEV_DRIVER,
+    XHDI_DRIVER,
+    MCD_DRIVER,
+    VIDEO_DRIVER,
+    PCI_DRIVER,
+    MMU_DRIVER,
+    END_OF_DRIVERS = 0xffffffff,        /* marks end of driver list */
 };

 struct generic_driver_interface
 {
-	uint32_t (*init)(void);
-	uint32_t (*read)(void *buf, size_t count);
-	uint32_t (*write)(const void *buf, size_t count);
-	uint32_t (*ioctl)(uint32_t request, ...);
+    uint32_t (*init)(void);
+    uint32_t (*read)(void *buf, size_t count);
+    uint32_t (*write)(const void *buf, size_t count);
+    uint32_t (*ioctl)(uint32_t request, ...);
 };

 struct dma_driver_interface
 {
-	int32_t version;
-	int32_t magic;
-	int32_t (*dma_set_initiator)(int32_t initiator);
-	uint32_t (*dma_get_initiator)(int32_t requestor);
-	void (*dma_free_initiator)(int32_t requestor);
-	int32_t (*dma_set_channel)(int32_t requestor, void (*handler)(void));
-	int32_t (*dma_get_channel)(int32_t requestor);
-	void (*dma_free_channel)(int32_t requestor);
-	void (*dma_clear_channel)(int32_t channel);
-	int32_t (*MCD_startDma)(long channel,
-						int8_t *srcAddr, uint32_t srcIncr, int8_t *destAddr, uint32_t destIncr,
-						uint32_t dmaSize, uint32_t xferSize, uint32_t initiator, int32_t priority,
-						uint32_t flags, uint32_t funcDesc);
-	int32_t (*MCD_dmaStatus)(int32_t channel);
-	int32_t (*MCD_XferProgrQuery)(int32_t channel, MCD_XferProg *progRep);
-	int32_t (*MCD_killDma)(int32_t channel);
-	int32_t (*MCD_continDma)(int32_t channel);
-	int32_t (*MCD_pauseDma)(int32_t channel);
-	int32_t (*MCD_resumeDma)(int32_t channel);
-	int32_t (*MCD_csumQuery)(int32_t channel, uint32_t *csum);
-	void *(*dma_malloc)(uint32_t amount);
-	int32_t (*dma_free)(void *addr);
-};
-	
-struct xhdi_driver_interface
-{
-	uint32_t (*xhdivec)();
+    int32_t version;
+    int32_t magic;
+    int (*dma_set_initiator)(int initiator);
+    uint32_t (*dma_get_initiator)(int requestor);
+    void (*dma_free_initiator)(int requestor);
+    int (*dma_set_channel)(int requestor, void (*handler)(void));
+    int (*dma_get_channel)(int requestor);
+    void (*dma_free_channel)(int requestor);
+    void (*dma_clear_channel)(int channel);
+    int (*MCD_startDma)(long channel,
+                        int8_t *srcAddr, unsigned int srcIncr, int8_t *destAddr, unsigned int destIncr,
+                        unsigned int dmaSize, unsigned int xferSize, unsigned int initiator, int priority,
+                        unsigned int flags, unsigned int funcDesc);
+    int32_t (*MCD_dmaStatus)(int32_t channel);
+    int32_t (*MCD_XferProgrQuery)(int32_t channel, MCD_XferProg *progRep);
+    int32_t (*MCD_killDma)(int32_t channel);
+    int32_t (*MCD_continDma)(int32_t channel);
+    int32_t (*MCD_pauseDma)(int32_t channel);
+    int32_t (*MCD_resumeDma)(int32_t channel);
+    int32_t (*MCD_csumQuery)(int32_t channel, uint32_t *csum);
+    void *(*dma_malloc)(uint32_t amount);
+    int32_t (*dma_free)(void *addr);
 };

-/* Interpretation of offset for color fields: All offsets are from the right,
+struct xhdi_driver_interface
+{
+    uint32_t (*xhdivec)();
+};
+
+/*
+ * Interpretation of offset for color fields: All offsets are from the right,
 * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
 * can use the offset as right argument to <<). A pixel afterwards is a bit
 * stream and is written to video memory as that unmodified. This implies
@@ -88,7 +92,7 @@ struct fb_bitfield
    unsigned long offset;           /* beginning of bitfield    */
    unsigned long length;           /* length of bitfield       */
    unsigned long msb_right;        /* != 0 : Most significant bit is */
-				                    /* right */
+    /* right */
 };

 /*
@@ -139,7 +143,7 @@ struct fb_fix_screeninfo
 {
    char id[16];                    /* identification string eg "TT Builtin" */
    unsigned long smem_start;       /* Start of frame buffer mem */
-                                    /* (physical address) */
+    /* (physical address) */
    unsigned long smem_len;         /* Length of frame buffer mem */
    unsigned long type;             /* see FB_TYPE_*        */
    unsigned long type_aux;         /* Interleave for interleaved Planes */
@@ -149,16 +153,16 @@ struct fb_fix_screeninfo
    unsigned short ywrapstep;       /* zero if no hardware ywrap    */
    unsigned long line_length;      /* length of a line in bytes    */
    unsigned long mmio_start;       /* Start of Memory Mapped I/O   */
-                                    /* (physical address) */
+    /* (physical address) */
    unsigned long mmio_len;         /* Length of Memory Mapped I/O  */
    unsigned long accel;            /* Indicate to driver which */
-                                    /*  specific chip/card we have  */
+    /*  specific chip/card we have  */
    unsigned short reserved[3];     /* Reserved for future compatibility */
 };

 struct fb_chroma
 {
-    unsigned long redx; /* in fraction of 1024 */
+    unsigned long redx;             /* in fraction of 1024 */
    unsigned long greenx;
    unsigned long bluex;
    unsigned long whitex;
@@ -201,33 +205,97 @@ struct fb_monspecs

 struct framebuffer_driver_interface
 {
-	struct fb_info **framebuffer_info;	/* pointer to an fb_info struct (defined in include/fb.h) */
+    struct fb_info **framebuffer_info;  /* pointer to an fb_info struct (defined in include/fb.h) */
+};
+
+struct pci_bios_interface
+{
+    uint32_t subjar;
+    uint32_t version;
+    /* Although we declare this functions as standard gcc functions (cdecl),
+     * they expect parameters inside registers (fastcall) unsupported by gcc m68k.
+     * Caller will take care of parameters passing convention.
+     */
+    int32_t (*find_pci_device)(uint32_t id, uint16_t index);
+    int32_t (*find_pci_classcode)(uint32_t class, uint16_t index);
+    int32_t (*read_config_byte)(int32_t handle, uint16_t reg, uint8_t *address);
+    int32_t (*read_config_word)(int32_t handle, uint16_t reg, uint16_t *address);
+    int32_t (*read_config_longword)(int32_t handle, uint16_t reg, uint32_t *address);
+    uint8_t (*fast_read_config_byte)(int32_t handle, uint16_t reg);
+    uint16_t (*fast_read_config_word)(int32_t handle, uint16_t reg);
+    uint32_t (*fast_read_config_longword)(int32_t handle, uint16_t reg);
+    int32_t (*write_config_byte)(int32_t handle, uint16_t reg, uint16_t val);
+    int32_t (*write_config_word)(int32_t handle, uint16_t reg, uint16_t val);
+    int32_t (*write_config_longword)(int32_t handle, uint16_t reg, uint32_t val);
+    int32_t (*hook_interrupt)(int32_t handle, uint32_t *routine, uint32_t *parameter);
+    int32_t (*unhook_interrupt)(int32_t handle);
+    int32_t (*special_cycle)(uint16_t bus, uint32_t data);
+    int32_t (*get_routing)(int32_t handle);
+    int32_t (*set_interrupt)(int32_t handle);
+    int32_t (*get_resource)(int32_t handle);
+    int32_t (*get_card_used)(int32_t handle, uint32_t *address);
+    int32_t (*set_card_used)(int32_t handle, uint32_t *callback);
+    int32_t (*read_mem_byte)(int32_t handle, uint32_t offset, uint8_t *address);
+    int32_t (*read_mem_word)(int32_t handle, uint32_t offset, uint16_t *address);
+    int32_t (*read_mem_longword)(int32_t handle, uint32_t offset, uint32_t *address);
+    uint8_t (*fast_read_mem_byte)(int32_t handle, uint32_t offset);
+    uint16_t (*fast_read_mem_word)(int32_t handle, uint32_t offset);
+    uint32_t (*fast_read_mem_longword)(int32_t handle, uint32_t offset);
+    int32_t (*write_mem_byte)(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_mem_word)(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_mem_longword)(int32_t handle, uint32_t offset, uint32_t val);
+    int32_t (*read_io_byte)(int32_t handle, uint32_t offset, uint8_t *address);
+    int32_t (*read_io_word)(int32_t handle, uint32_t offset, uint16_t *address);
+    int32_t (*read_io_longword)(int32_t handle, uint32_t offset, uint32_t *address);
+    uint8_t (*fast_read_io_byte)(int32_t handle, uint32_t offset);
+    uint16_t (*fast_read_io_word)(int32_t handle, uint32_t offset);
+    uint32_t (*fast_read_io_longword)(int32_t handle, uint32_t offset);
+    int32_t (*write_io_byte)(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_io_word)(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_io_longword)(int32_t handle, uint32_t offset, uint32_t val);
+    int32_t (*get_machine_id)(void);
+    int32_t (*get_pagesize)(void);
+    int32_t (*virt_to_bus)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+    int32_t (*bus_to_virt)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+    int32_t (*virt_to_phys)(uint32_t address, PCI_CONV_ADR *pointer);
+    int32_t (*phys_to_virt)(uint32_t address, PCI_CONV_ADR *pointer);
+    //  int32_t reserved[2];
+};
+
+struct mmu_driver_interface
+{
+    int32_t (*map_page_locked)(uint32_t address, uint32_t length, int asid);
+    int32_t (*unlock_page)(uint32_t address, uint32_t length, int asid);
+    int32_t (*report_locked_pages)(uint32_t *num_itlb, uint32_t *num_dtlb);
+    uint32_t (*report_pagesize)(void);
 };

 union interface
 {
-	struct generic_driver_interface *gdi;
-	struct xhdi_driver_interface *xhdi;
-	struct dma_driver_interface *dma;
-	struct framebuffer_driver_interface *fb;
+    struct generic_driver_interface *gdi;
+    struct xhdi_driver_interface *xhdi;
+    struct dma_driver_interface *dma;
+    struct framebuffer_driver_interface *fb;
+    struct pci_bios_interface *pci;
+    struct mmu_driver_interface *mmu;
 };

 struct generic_interface
 {
-	enum driver_type type;
-	char name[16];
-	char description[64];
-	int version;
-	int revision;
-	union interface interface;
+    enum driver_type type;
+    char name[16];
+    char description[64];
+    int version;
+    int revision;
+    union interface interface;
 };

 struct driver_table
 {
-	uint32_t bas_version;
-	uint32_t bas_revision;
-	uint32_t (*remove_handler)();			/* calling this will disable the BaS' hook into trap #0 */
-	struct generic_interface *interfaces[];
+    uint32_t bas_version;
+    uint32_t bas_revision;
+    void (*remove_handler)(void);           /* calling this will disable the BaS' hook into trap #0 */
+    struct generic_interface *interfaces;
 };


--- a/include/ehci.h
+++ b/include/ehci.h
@@ -23,43 +23,42 @@
 #define USB_EHCI_H

 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	5
-#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
-#endif

 /* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
 #define DeviceRequest \
-	((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
+    ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)

 #define DeviceOutRequest \
-	((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
+    ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)

 #define InterfaceRequest \
-	((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+    ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)

 #define EndpointRequest \
-	((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+    ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)

 #define EndpointOutRequest \
-	((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+    ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)

 /*
 * Register Space.
 */
-struct ehci_hccr {
-	uint32_t cr_capbase;
+struct ehci_hccr
+{
+    uint32_t cr_capbase;
 #define HC_LENGTH(p)		(((p) >> 0) & 0x00ff)
 #define HC_VERSION(p)		(((p) >> 16) & 0xffff)
-	uint32_t cr_hcsparams;
-#define HCS_PPC(p)		((p) & (1 << 4))
+    uint32_t cr_hcsparams;
+#define HCS_PPC(p)			((p) & (1 << 4))
 #define HCS_INDICATOR(p)	((p) & (1 << 16)) /* Port indicators */
 #define HCS_N_PORTS(p)		(((p) >> 0) & 0xf)
-	uint32_t cr_hccparams;
-	uint8_t cr_hcsp_portrt[8];
+    uint32_t cr_hccparams;
+    uint8_t cr_hcsp_portrt[8];
 } __attribute__ ((packed));

-struct ehci_hcor {
-	uint32_t or_usbcmd;
+struct ehci_hcor
+{
+    uint32_t or_usbcmd;
 #define CMD_PARK	(1 << 11)		/* enable "park" */
 #define CMD_PARK_CNT(c)	(((c) >> 8) & 3)	/* how many transfers to park */
 #define CMD_ASE		(1 << 5)		/* async schedule enable */
@@ -68,72 +67,74 @@ struct ehci_hcor {
 #define CMD_PSE		(1 << 4)		/* periodic schedule enable */
 #define CMD_RESET	(1 << 1)		/* reset HC not bus */
 #define CMD_RUN		(1 << 0)		/* start/stop HC */
-	uint32_t or_usbsts;
+    uint32_t or_usbsts;
 #define	STD_ASS		(1 << 15)
-#define STS_PSSTAT (1 << 14)
-#define STS_RECL  ( 1 << 13)
+#define STS_PSSTAT	(1 << 14)
+#define STS_RECL	(1 << 13)
 #define STS_HALT	(1 << 12)
-#define STS_IAA (1 << 5)
-#define STS_HSE (1 << 4)
-#define STS_FLR (1 << 3)
-#define STS_PCD (1 << 2)
+#define STS_IAA		(1 << 5)
+#define STS_HSE		(1 << 4)
+#define STS_FLR		(1 << 3)
+#define STS_PCD		(1 << 2)
 #define STS_USBERRINT (1 << 1)
-#define STS_USBINT (1 << 0)
-	uint32_t or_usbintr;
-#define INTR_IAAE (1 << 5)
-#define INTR_HSEE (1 << 4)
-#define INTR_FLRE (1 << 3)
-#define INTR_PCDE (1 << 2)
+#define STS_USBINT	(1 << 0)
+    uint32_t or_usbintr;
+#define INTR_IAAE	(1 << 5)
+#define INTR_HSEE	(1 << 4)
+#define INTR_FLRE	(1 << 3)
+#define INTR_PCDE	(1 << 2)
 #define INTR_USBERRINTE (1 << 1)
 #define INTR_USBINTE (1 << 0)
-	uint32_t or_frindex;
-	uint32_t or_ctrldssegment;
-	uint32_t or_periodiclistbase;
-	uint32_t or_asynclistaddr;
-	uint32_t _reserved_[9];
-	uint32_t or_configflag;
+    uint32_t or_frindex;
+    uint32_t or_ctrldssegment;
+    uint32_t or_periodiclistbase;
+    uint32_t or_asynclistaddr;
+    uint32_t _reserved_[9];
+    uint32_t or_configflag;
 #define FLAG_CF		(1 << 0)	/* true:  we'll support "high speed" */
-	uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
-	uint32_t or_systune;
+    uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
+    uint32_t or_systune;
 } __attribute__ ((packed));

-#define USBMODE		0x68		/* USB Device mode */
+#define USBMODE         0x68		/* USB Device mode */
 #define USBMODE_SDIS	(1 << 3)	/* Stream disable */
-#define USBMODE_BE	(1 << 2)	/* BE/LE endiannes select */
+#define USBMODE_BE      (1 << 2)	/* BE/LE endiannes select */
 #define USBMODE_CM_HC	(3 << 0)	/* host controller mode */
 #define USBMODE_CM_IDLE	(0 << 0)	/* idle state */

 /* Interface descriptor */
-struct usb_linux_interface_descriptor {
-	unsigned char	bLength;
-	unsigned char	bDescriptorType;
-	unsigned char	bInterfaceNumber;
-	unsigned char	bAlternateSetting;
-	unsigned char	bNumEndpoints;
-	unsigned char	bInterfaceClass;
-	unsigned char	bInterfaceSubClass;
-	unsigned char	bInterfaceProtocol;
-	unsigned char	iInterface;
+struct usb_linux_interface_descriptor
+{
+    unsigned char	bLength;
+    unsigned char	bDescriptorType;
+    unsigned char	bInterfaceNumber;
+    unsigned char	bAlternateSetting;
+    unsigned char	bNumEndpoints;
+    unsigned char	bInterfaceClass;
+    unsigned char	bInterfaceSubClass;
+    unsigned char	bInterfaceProtocol;
+    unsigned char	iInterface;
 } __attribute__ ((packed));

 /* Configuration descriptor information.. */
-struct usb_linux_config_descriptor {
-	unsigned char	bLength;
-	unsigned char	bDescriptorType;
-	unsigned short	wTotalLength;
-	unsigned char	bNumInterfaces;
-	unsigned char	bConfigurationValue;
-	unsigned char	iConfiguration;
-	unsigned char	bmAttributes;
-	unsigned char	MaxPower;
+struct usb_linux_config_descriptor
+{
+    unsigned char	bLength;
+    unsigned char	bDescriptorType;
+    unsigned short	wTotalLength;
+    unsigned char	bNumInterfaces;
+    unsigned char	bConfigurationValue;
+    unsigned char	iConfiguration;
+    unsigned char	bmAttributes;
+    unsigned char	MaxPower;
 } __attribute__ ((packed));

 #if defined CONFIG_EHCI_DESC_BIG_ENDIAN
-#define	ehci_readl(x)		(*((volatile u32 *)(x)))
-#define ehci_writel(a, b)	(*((volatile u32 *)(a)) = ((volatile u32)b))
+#define	ehci_readl(x)		(*((volatile uint32_t *)(x)))
+#define ehci_writel(a, b)	(*((volatile uint32_t *)(a)) = ((volatile uint32_t) b))
 #else
-#define ehci_readl(x)		swpl((*((volatile u32 *)(x))))
-#define ehci_writel(a, b)	(*((volatile u32 *)(a)) = swpl(((volatile u32)b)))
+#define ehci_readl(x)		swpl((*((volatile uint32_t *)(x))))
+#define ehci_writel(a, b)	(*((volatile uint32_t *)(a)) = swpl(((volatile uint32_t) b)))
 #endif

 #if defined CONFIG_EHCI_MMIO_BIG_ENDIAN
@@ -147,18 +148,18 @@ struct usb_linux_config_descriptor {
 #define EHCI_PS_WKOC_E		(1 << 22)	/* RW wake on over current */
 #define EHCI_PS_WKDSCNNT_E	(1 << 21)	/* RW wake on disconnect */
 #define EHCI_PS_WKCNNT_E	(1 << 20)	/* RW wake on connect */
-#define EHCI_PS_PO		(1 << 13)	/* RW port owner */
-#define EHCI_PS_PP		(1 << 12)	/* RW,RO port power */
-#define EHCI_PS_LS		(3 << 10)	/* RO line status */
-#define EHCI_PS_PR		(1 << 8)	/* RW port reset */
-#define EHCI_PS_SUSP	(1 << 7)	/* RW suspend */
-#define EHCI_PS_FPR		(1 << 6)	/* RW force port resume */
-#define EHCI_PS_OCC		(1 << 5)	/* RWC over current change */
-#define EHCI_PS_OCA		(1 << 4)	/* RO over current active */
-#define EHCI_PS_PEC		(1 << 3)	/* RWC port enable change */
-#define EHCI_PS_PE		(1 << 2)	/* RW port enable */
-#define EHCI_PS_CSC		(1 << 1)	/* RWC connect status change */
-#define EHCI_PS_CS		(1 << 0)	/* RO connect status */
+#define EHCI_PS_PO			(1 << 13)	/* RW port owner */
+#define EHCI_PS_PP			(1 << 12)	/* RW,RO port power */
+#define EHCI_PS_LS			(3 << 10)	/* RO line status */
+#define EHCI_PS_PR			(1 << 8)	/* RW port reset */
+#define EHCI_PS_SUSP		(1 << 7)	/* RW suspend */
+#define EHCI_PS_FPR			(1 << 6)	/* RW force port resume */
+#define EHCI_PS_OCC			(1 << 5)	/* RWC over current change */
+#define EHCI_PS_OCA			(1 << 4)	/* RO over current active */
+#define EHCI_PS_PEC			(1 << 3)	/* RWC port enable change */
+#define EHCI_PS_PE			(1 << 2)	/* RW port enable */
+#define EHCI_PS_CSC			(1 << 1)	/* RWC connect status change */
+#define EHCI_PS_CS			(1 << 0)	/* RO connect status */
 #define EHCI_PS_CLEAR		(EHCI_PS_OCC | EHCI_PS_PEC | EHCI_PS_CSC)

 #define EHCI_PS_IS_LOWSPEED(x)	(((x) & EHCI_PS_LS) == (1 << 10))
@@ -174,31 +175,33 @@ struct usb_linux_config_descriptor {
 */

 /* Queue Element Transfer Descriptor (qTD). */
-struct qTD {
-	uint32_t qt_next;
+struct qTD
+{
+    uint32_t qt_next;
 #define	QT_NEXT_TERMINATE	1
-	uint32_t qt_altnext;
-	uint32_t qt_token;
-	uint32_t qt_buffer[5];
+    uint32_t qt_altnext;
+    uint32_t qt_token;
+    uint32_t qt_buffer[5];
 };

 /* Queue Head (QH). */
-struct QH {
-	uint32_t qh_link;
+struct QH
+{
+    uint32_t qh_link;
 #define	QH_LINK_TERMINATE	1
 #define	QH_LINK_TYPE_ITD	0
 #define	QH_LINK_TYPE_QH		2
 #define	QH_LINK_TYPE_SITD	4
 #define	QH_LINK_TYPE_FSTN	6
-	uint32_t qh_endpt1;
-	uint32_t qh_endpt2;
-	uint32_t qh_curtd;
-	struct qTD qh_overlay;
-	/*
-	 * Add dummy fill value to make the size of this struct
-	 * aligned to 32 bytes
-	 */
-	uint8_t fill[16];
+    uint32_t qh_endpt1;
+    uint32_t qh_endpt2;
+    uint32_t qh_curtd;
+    struct qTD qh_overlay;
+    /*
+     * Add dummy fill value to make the size of this struct
+     * aligned to 32 bytes
+     */
+    uint8_t fill[16];
 };

 /* Low level init functions */
--- a/include/exceptions.h
+++ b/include/exceptions.h
@@ -1,7 +1,7 @@
 #ifndef _EXCEPTIONS_H_
 #define _EXCEPTIONS_H_

-#include <stdint.h>
+#include <bas_types.h>

 static inline uint32_t set_ipl(uint32_t ipl)
 {
@@ -19,7 +19,7 @@ static inline uint32_t set_ipl(uint32_t ipl)
 		"		lsr.l	#8,%[ret]\r\n"			/* shift them to position */
 		: [ret] "=&d" (ret)		/* output */
 		: [ipl] "d" (ipl)		/* input */
-		: "d0"	/* clobber */
+		: "cc", "d0"	/* clobber */
 	);

 	return ret;
--- a/include/fb.h
+++ b/include/fb.h
@@ -528,7 +528,6 @@ struct fb_videomode {
 extern const struct fb_videomode vesa_modes[];

 /* timer */
-extern void udelay(long usec);
 #ifdef COLDFIRE
 #ifdef MCF5445X
 #define US_TO_TIMER(a) (a)
@@ -541,6 +540,7 @@ extern void udelay(long usec);
 #define US_TO_TIMER(a) (((a)*256)/5000)
 #define TIMER_TO_US(a) (((a)*5000)/256)
 #endif
+
 extern void start_timeout(void);
 extern int end_timeout(long msec);
 extern void mdelay(long msec);
--- a/include/fec.h
+++ b/include/fec.h
@@ -2,7 +2,7 @@
 * File:    fec.h
 * Purpose: Driver for the Fast Ethernet Controller (FEC)
 *
- * Notes:       
+ * Notes:
 */

 #ifndef _FEC_H_
@@ -30,30 +30,30 @@
 */
 typedef struct
 {
-	int total;      /* total count of errors   */
-	int hberr;      /* heartbeat error         */
-	int babr;       /* babbling receiver       */
-	int babt;       /* babbling transmitter    */
-	int gra;        /* graceful stop complete  */
-	int txf;        /* transmit frame          */
-	int mii;        /* MII                     */
-	int lc;         /* late collision          */
-	int rl;         /* collision retry limit   */
-	int xfun;       /* transmit FIFO underrrun */
-	int xferr;      /* transmit FIFO error     */
-	int rferr;      /* receive FIFO error      */
-	int dtxf;       /* DMA transmit frame      */
-	int drxf;       /* DMA receive frame       */
-	int rfsw_inv;   /* Invalid bit in RFSW     */
-	int rfsw_l;     /* RFSW Last in Frame      */
-	int rfsw_m;     /* RFSW Miss               */
-	int rfsw_bc;    /* RFSW Broadcast          */
-	int rfsw_mc;    /* RFSW Multicast          */
-	int rfsw_lg;    /* RFSW Length Violation   */
-	int rfsw_no;    /* RFSW Non-octet          */
-	int rfsw_cr;    /* RFSW Bad CRC            */
-	int rfsw_ov;    /* RFSW Overflow           */
-	int rfsw_tr;    /* RFSW Truncated          */
+        int total;      /* total count of errors   */
+        int hberr;      /* heartbeat error         */
+        int babr;       /* babbling receiver       */
+        int babt;       /* babbling transmitter    */
+        int gra;        /* graceful stop complete  */
+        int txf;        /* transmit frame          */
+        int mii;        /* MII                     */
+        int lc;         /* late collision          */
+        int rl;         /* collision retry limit   */
+        int xfun;       /* transmit FIFO underrrun */
+        int xferr;      /* transmit FIFO error     */
+        int rferr;      /* receive FIFO error      */
+        int dtxf;       /* DMA transmit frame      */
+        int drxf;       /* DMA receive frame       */
+        int rfsw_inv;   /* Invalid bit in RFSW     */
+        int rfsw_l;     /* RFSW Last in Frame      */
+        int rfsw_m;     /* RFSW Miss               */
+        int rfsw_bc;    /* RFSW Broadcast          */
+        int rfsw_mc;    /* RFSW Multicast          */
+        int rfsw_lg;    /* RFSW Length Violation   */
+        int rfsw_no;    /* RFSW Non-octet          */
+        int rfsw_cr;    /* RFSW Bad CRC            */
+        int rfsw_ov;    /* RFSW Overflow           */
+        int rfsw_tr;    /* RFSW Truncated          */
 } FEC_EVENT_LOG;


@@ -87,8 +87,8 @@ extern int fec1_send(NIF *, uint8_t *, uint8_t *, uint16_t , NBUF *);
 extern void fec_irq_enable(uint8_t, uint8_t, uint8_t);
 extern void fec_irq_disable(uint8_t);
 extern void fec_interrupt_handler(uint8_t);
-extern int fec0_interrupt_handler(void *, void *);
-extern int fec1_interrupt_handler(void *, void *);
+extern bool fec0_interrupt_handler(void *, void *);
+extern bool fec1_interrupt_handler(void *, void *);
 extern void fec_eth_setup(uint8_t, uint8_t, uint8_t, uint8_t, const uint8_t *);
 extern void fec_eth_reset(uint8_t);
 extern void fec_eth_stop(uint8_t);
--- a/include/ff.h
+++ b/include/ff.h
@@ -21,7 +21,7 @@
 extern "C" {
 #endif

-#include <stdint.h>
+#include <bas_types.h>
 #include <ffconf.h>		/* FatFs configuration options */

 #if _FATFS != _FFCONF
--- a/include/firebee.h
+++ b/include/firebee.h
@@ -27,7 +27,7 @@
 *      Author: Markus Fröschle
 */

-#define SYSCLK			132000
+#define SYSCLK			132000		/* NOTE: 132 _is_ correct. 133 _is_ wrong. Do not change! */

 #define BOOTFLASH_BASE_ADDRESS		0xE0000000
 #define BOOTFLASH_SIZE				0x800000		/* FireBee has 8 MByte Flash */
--- a/include/font.h
+++ b/include/font.h
@@ -0,0 +1,98 @@
+/*
+ * font.h - font specific definitions
+ *
+ * Copyright (c) 2001 Lineo, Inc.
+ * Copyright (c) 2004 by Authors:
+ *
+ * Authors:
+ *  MAD     Martin Doering
+ *
+ * This file is distributed under the GPL, version 2 or at your
+ * option any later version.  See doc/license.txt for details.
+ */
+
+#ifndef FONT_H
+#define FONT_H
+
+#include <stdint.h>
+
+/* font header flags */
+
+#define F_DEFAULT 1     /* this is the default font (face and size) */
+#define F_HORZ_OFF  2   /* there are left and right offset tables */
+#define F_STDFORM  4    /* is the font in standard format */
+#define F_MONOSPACE 8   /* is the font monospaced */
+
+/* font style bits */
+
+#define F_THICKEN 1
+#define F_LIGHT 2
+#define F_SKEW  4
+#define F_UNDER 8
+#define F_OUTLINE 16
+#define F_SHADOW        32
+
+/* font specific linea variables */
+
+extern const uint16_t *v_fnt_ad;   /* address of current monospace font */
+extern const uint16_t *v_off_ad;   /* address of font offset table */
+extern uint16_t v_fnt_nd;          /* ascii code of last cell in font */
+extern uint16_t v_fnt_st;          /* ascii code of first cell in font */
+extern uint16_t v_fnt_wr;          /* font cell wrap */
+
+/* character cell specific linea variables */
+
+extern uint16_t    v_cel_ht;       /* cell height (width is 8) */
+extern uint16_t    v_cel_mx;       /* needed by MiNT: columns on the screen minus 1 */
+extern uint16_t    v_cel_my;       /* needed by MiNT: rows on the screen minus 1 */
+extern uint16_t    v_cel_wr;       /* needed by MiNT: length (in int8_ts) of a line of characters */
+
+/*
+ * font_ring is a struct of four pointers, each of which points to
+ * a list of font headers linked together to form a string.
+ */
+
+extern struct font_head *font_ring[4];  /* Ring of available fonts */
+extern int16_t font_count;                 /* all three fonts and NULL */
+
+/* the font header descibes a font */
+
+struct font_head {
+    int16_t font_id;
+    int16_t point;
+    int8_t name[32];
+    uint16_t first_ade;
+    uint16_t last_ade;
+    uint16_t top;
+    uint16_t ascent;
+    uint16_t half;
+    uint16_t descent;
+    uint16_t bottom;
+    uint16_t max_char_width;
+    uint16_t max_cell_width;
+    uint16_t left_offset;          /* amount character slants left when skewed */
+    uint16_t right_offset;         /* amount character slants right */
+    uint16_t thicken;              /* number of pixels to smear */
+    uint16_t ul_size;              /* size of the underline */
+    uint16_t lighten;              /* mask to and with to lighten  */
+    uint16_t skew;                 /* mask for skewing */
+    uint16_t flags;
+
+    const uint8_t *hor_table;     /* horizontal offsets */
+    const uint16_t *off_table;     /* character offsets  */
+    const uint16_t *dat_table;     /* character definitions */
+    uint16_t form_width;
+    uint16_t form_height;
+
+    struct font_head *next_font;/* pointer to next font */
+    uint16_t font_seg;
+};
+
+
+
+/* prototypes */
+
+void font_init(void);           /* initialize BIOS font ring */
+void font_set_default(void);    /* choose the default font */
+
+#endif /* FONT_H */
--- a/include/i2c-algo-bit.h
+++ b/include/i2c-algo-bit.h
@@ -32,18 +32,19 @@
 * manipulate the line states, and to init any hw-specific features. This is
 * only used if you have more than one hw-type of adapter running. 
 */
-struct i2c_algo_bit_data {
-	void *data;		/* private data for lowlevel routines */
-	void (*setsda) (void *data, int state);
-	void (*setscl) (void *data, int state);
-	int  (*getsda) (void *data);
-	int  (*getscl) (void *data);
+struct i2c_algo_bit_data
+{
+    void *data;		/* private data for lowlevel routines */
+    void (*setsda) (void *data, int state);
+    void (*setscl) (void *data, int state);
+    int  (*getsda) (void *data);
+    int  (*getscl) (void *data);

-	/* local settings */
-	int udelay;		/* half-clock-cycle time in microsecs */
-				/* i.e. clock is (500 / udelay) KHz */
-	int mdelay;		/* in millisecs, unused */
-	int timeout;		/* in jiffies */
+    /* local settings */
+    int udelay;     /* half-clock-cycle time in microsecs */
+                    /* i.e. clock is (500 / udelay) KHz */
+    int mdelay;     /* in millisecs, unused */
+    int timeout;    /* in jiffies */
 };

 #define I2C_BIT_ADAP_MAX	16
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -28,6 +28,8 @@
 #ifndef _I2C_H
 #define _I2C_H

+#include "bas_types.h"
+
 /* --- General options ------------------------------------------------	*/

 struct i2c_msg;
@@ -44,39 +46,51 @@ extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
 * be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584
 * to name two of the most common.
 */
-struct i2c_algorithm {
-	unsigned int id;
-	int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num);
-	/* --- ioctl like call to set div. parameters. */
-	int (*algo_control)(struct i2c_adapter *, unsigned int, unsigned long);
+struct i2c_algorithm
+{
+    unsigned int id;
+    int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num);
+    /* --- ioctl like call to set div. parameters. */
+    int (*algo_control)(struct i2c_adapter *, unsigned int, unsigned long);
 };

 /*
 * i2c_adapter is the structure used to identify a physical i2c bus along
 * with the access algorithms necessary to access it.
 */
-struct i2c_adapter {
-	struct i2c_algorithm *algo;/* the algorithm to access the bus	*/
-	void *algo_data;
-	int timeout;
-	int retries;
-	int nr;
+struct i2c_adapter
+{
+    struct i2c_algorithm *algo;     /* the algorithm to access the bus	*/
+    void *algo_data;
+    int timeout;
+    int retries;
+    int nr;
 };

 /*
 * I2C Message - used for pure i2c transaction, also from /dev interface
 */
-struct i2c_msg {
-	unsigned short addr;	/* slave address			*/
- 	unsigned short flags;		
-#define I2C_M_TEN	0x10	/* we have a ten bit chip address	*/
-#define I2C_M_RD	0x01
-#define I2C_M_NOSTART	0x4000
-#define I2C_M_REV_DIR_ADDR	0x2000
-#define I2C_M_IGNORE_NAK	0x1000
-#define I2C_M_NO_RD_ACK		0x0800
- 	unsigned short len;		/* msg length				*/
- 	unsigned char *buf;		/* pointer to msg data			*/
+struct i2c_msg
+{
+    unsigned short addr;	/* slave address			*/
+    unsigned short flags;
+#define I2C_M_TEN           0x10	/* we have a ten bit chip address	*/
+#define I2C_M_RD            0x01
+#define I2C_M_NOSTART       0x4000
+#define I2C_M_REV_DIR_ADDR  0x2000
+#define I2C_M_IGNORE_NAK    0x1000
+#define I2C_M_NO_RD_ACK     0x0800
+    unsigned short len;     /* msg length				*/
+    unsigned char *buf;     /* pointer to msg data			*/
 };

+extern void i2c_init(void);
+extern void i2c_set_frequency(int hz);
+extern int i2c_read(int address, char *data, int lengt, bool repeated);
+extern int i2c_read_byte(int ack);
+extern int i2c_write(int address, const char *data, int length, bool repeated);
+extern int i2c_write_byte(int data);
+extern void i2c_start(void);
+extern void i2c_stop(void);
+
 #endif /* _I2C_H */
--- a/include/interrupts.h
+++ b/include/interrupts.h
@@ -27,81 +27,123 @@
 #include <stdbool.h>

 /* interrupt sources */
-#define INT_SOURCE_EPORT_EPF1		1	// edge port flag 1
-#define	INT_SOURCE_EPORT_EPF2		2	// edge port flag 2
-#define	INT_SOURCE_EPORT_EPF3		3	// edge port flag 3
-#define	INT_SOURCE_EPORT_EPF4		4	// edge port flag 4
-#define	INT_SOURCE_EPORT_EPF5		5	// edge port flag 5
-#define	INT_SOURCE_EPORT_EPF6		6	// edge port flag 6
-#define	INT_SOURCE_EPORT_EPF7		7	// edge port flag 7
-#define	INT_SOURCE_USB_EP0ISR		15	// USB endpoint 0 interrupt
-#define	INT_SOURCE_USB_EP1ISR		16	// USB endpoint 1 interrupt
-#define	INT_SOURCE_USB_EP2ISR		17	// USB endpoint 2 interrupt
-#define	INT_SOURCE_USB_EP3ISR		18	// USB endpoint 3 interrupt
-#define	INT_SOURCE_USB_EP4ISR		19	// USB endpoint 4 interrupt
-#define	INT_SOURCE_USB_EP5ISR		20	// USB endpoint 5 interrupt
-#define	INT_SOURCE_USB_EP6ISR		21	// USB endpoint 6 interrupt
-#define	INT_SOURCE_USB_USBISR		22	// USB general interrupt
-#define	INT_SOURCE_USB_USBAISR		23	// USB core interrupt
-#define	INT_SOURCE_USB_ANY			24	// OR of all USB interrupts
-#define	INT_SOURCE_USB_DSPI_OVF		25	// DSPI overflow or underflow
-#define	INT_SOURCE_USB_DSPI_RFOF	26	// receive FIFO overflow interrupt
-#define	INT_SOURCE_USB_DSPI_RFDF	27	// receive FIFO drain interrupt
-#define	INT_SOURCE_USB_DSPI_TFUF	28	// transmit FIFO underflow interrupt
-#define	INT_SOURCE_USB_DSPI_TCF		29	// transfer complete interrupt
-#define	INT_SOURCE_USB_DSPI_TFFF	30	// transfer FIFO fill interrupt
-#define	INT_SOURCE_USB_DSPI_EOQF	31	// end of queue interrupt
-#define	INT_SOURCE_PSC3				32	// PSC3 interrupt
-#define	INT_SOURCE_PSC2				33	// PSC2 interrupt
-#define	INT_SOURCE_PSC1				34	// PSC1 interrupt
-#define	INT_SOURCE_PSC0				35	// PSC0 interrupt
-#define	INT_SOURCE_CTIMERS			36	// combined source for comm timers
-#define	INT_SOURCE_SEC				37	// SEC interrupt
-#define	INT_SOURCE_FEC1				38	// FEC1 interrupt
-#define	INT_SOURCE_FEC0				39	// FEC0 interrupt
-#define	INT_SOURCE_I2C				40	// I2C interrupt
-#define	INT_SOURCE_PCIARB			41	// PCI arbiter interrupt
-#define	INT_SOURCE_CBPCI			42	// COMM bus PCI interrupt
-#define	INT_SOURCE_XLBPCI			43	// XLB PCI interrupt
-#define	INT_SOURCE_XLBARB			47	// XLBARB to PCI interrupt
-#define	INT_SOURCE_DMA				48	// multichannel DMA interrupt
-#define	INT_SOURCE_CAN0_ERROR		49	// FlexCAN error interrupt
-#define	INT_SOURCE_CAN0_BUSOFF		50	// FlexCAN bus off interrupt
-#define	INT_SOURCE_CAN0_MBOR		51	// message buffer ORed interrupt
-#define	INT_SOURCE_SLT1				53	// slice timer 1 interrupt
-#define	INT_SOURCE_SLT0				54	// slice timer 0 interrupt
-#define	INT_SOURCE_CAN1_ERROR		55	// FlexCAN error interrupt
-#define	INT_SOURCE_CAN1_BUSOFF		56	// FlexCAN bus off interrupt
-#define	INT_SOURCE_CAN1_MBOR		57	// message buffer ORed interrupt
-#define	INT_SOURCE_GPT3				59	// GPT3 timer interrupt
-#define	INT_SOURCE_GPT2				60	// GPT2 timer interrupt
-#define	INT_SOURCE_GPT1				61	// GPT1 timer interrupt
-#define	INT_SOURCE_GPT0				62	// GPT0 timer interrupt
+#define INT_SOURCE_EPORT_EPF1       1   // edge port flag 1
+#define INT_SOURCE_EPORT_EPF2       2   // edge port flag 2
+#define INT_SOURCE_EPORT_EPF3       3   // edge port flag 3
+#define INT_SOURCE_EPORT_EPF4       4   // edge port flag 4
+#define INT_SOURCE_EPORT_EPF5       5   // edge port flag 5
+#define INT_SOURCE_EPORT_EPF6       6   // edge port flag 6
+#define INT_SOURCE_EPORT_EPF7       7   // edge port flag 7
+#define INT_SOURCE_USB_EP0ISR       15  // USB endpoint 0 interrupt
+#define INT_SOURCE_USB_EP1ISR       16  // USB endpoint 1 interrupt
+#define INT_SOURCE_USB_EP2ISR       17  // USB endpoint 2 interrupt
+#define INT_SOURCE_USB_EP3ISR       18  // USB endpoint 3 interrupt
+#define INT_SOURCE_USB_EP4ISR       19  // USB endpoint 4 interrupt
+#define INT_SOURCE_USB_EP5ISR       20  // USB endpoint 5 interrupt
+#define INT_SOURCE_USB_EP6ISR       21  // USB endpoint 6 interrupt
+#define INT_SOURCE_USB_USBISR       22  // USB general interrupt
+#define INT_SOURCE_USB_USBAISR      23  // USB core interrupt
+#define INT_SOURCE_USB_ANY          24  // OR of all USB interrupts
+#define INT_SOURCE_USB_DSPI_OVF     25  // DSPI overflow or underflow
+#define INT_SOURCE_USB_DSPI_RFOF    26  // receive FIFO overflow interrupt
+#define INT_SOURCE_USB_DSPI_RFDF    27  // receive FIFO drain interrupt
+#define INT_SOURCE_USB_DSPI_TFUF    28  // transmit FIFO underflow interrupt
+#define INT_SOURCE_USB_DSPI_TCF     29  // transfer complete interrupt
+#define INT_SOURCE_USB_DSPI_TFFF    30  // transfer FIFO fill interrupt
+#define INT_SOURCE_USB_DSPI_EOQF    31  // end of queue interrupt
+#define INT_SOURCE_PSC3             32  // PSC3 interrupt
+#define INT_SOURCE_PSC2             33  // PSC2 interrupt
+#define INT_SOURCE_PSC1             34  // PSC1 interrupt
+#define INT_SOURCE_PSC0             35  // PSC0 interrupt
+#define INT_SOURCE_CTIMERS          36  // combined source for comm timers
+#define INT_SOURCE_SEC              37  // SEC interrupt
+#define INT_SOURCE_FEC1             38  // FEC1 interrupt
+#define INT_SOURCE_FEC0             39  // FEC0 interrupt
+#define INT_SOURCE_I2C              40  // I2C interrupt
+#define INT_SOURCE_PCIARB           41  // PCI arbiter interrupt
+#define INT_SOURCE_CBPCI            42  // COMM bus PCI interrupt
+#define INT_SOURCE_XLBPCI           43  // XLB PCI interrupt
+#define INT_SOURCE_XLBARB           47  // XLBARB to PCI interrupt
+#define INT_SOURCE_DMA              48  // multichannel DMA interrupt
+#define INT_SOURCE_CAN0_ERROR       49  // FlexCAN error interrupt
+#define INT_SOURCE_CAN0_BUSOFF      50  // FlexCAN bus off interrupt
+#define INT_SOURCE_CAN0_MBOR        51  // message buffer ORed interrupt
+#define INT_SOURCE_SLT1             53  // slice timer 1 interrupt
+#define INT_SOURCE_SLT0             54  // slice timer 0 interrupt
+#define INT_SOURCE_CAN1_ERROR       55  // FlexCAN error interrupt
+#define INT_SOURCE_CAN1_BUSOFF      56  // FlexCAN bus off interrupt
+#define INT_SOURCE_CAN1_MBOR        57  // message buffer ORed interrupt
+#define INT_SOURCE_GPT3             59  // GPT3 timer interrupt
+#define INT_SOURCE_GPT2             60  // GPT2 timer interrupt
+#define INT_SOURCE_GPT1             61  // GPT1 timer interrupt
+#define INT_SOURCE_GPT0             62  // GPT0 timer interrupt


-#define FEC0_INTC_LVL	5			/* interrupt level for FEC0 */
-#define FEC0_INTC_PRI	7			/* interrupt priority for FEC0 */
+#define FEC0_INTC_LVL   6           /* interrupt level for FEC0 */
+#define FEC0_INTC_PRI   7           /* interrupt priority for FEC0 */

-#define FEC1_INTC_LVL	5			/* interrupt level for FEC1 */
-#define FEC1_INTC_PRI	7			/* interrupt priority for FEC1 */
+#define FEC1_INTC_LVL   6           /* interrupt level for FEC1 */
+#define FEC1_INTC_PRI   6           /* interrupt priority for FEC1 */

-#define FEC_INTC_LVL(x)		((x == 0) ? FEC0_INTC_LVL : FEC1_INTC_LVL)
-#define FEC_INTC_PRI(x)		((x == 0) ? FEC0_INTC_PRI : FEC1_INTC_PRI)
+#define FEC_INTC_LVL(x)     ((x == 0) ? FEC0_INTC_LVL : FEC1_INTC_LVL)
+#define FEC_INTC_PRI(x)     ((x == 0) ? FEC0_INTC_PRI : FEC1_INTC_PRI)

 #define FEC0RX_DMA_PRI      5
-#define FEC1RX_DMA_PRI      5
+#define FEC1RX_DMA_PRI      4
 #define FECRX_DMA_PRI(x)    ((x == 0) ? FEC0RX_DMA_PRI : FEC1RX_DMA_PRI)
-#define FEC0TX_DMA_PRI      6
-#define FEC1TX_DMA_PRI      6
+#define FEC0TX_DMA_PRI      2
+#define FEC1TX_DMA_PRI      1
 #define FECTX_DMA_PRI(x)    ((x == 0) ? FEC0TX_DMA_PRI : FEC1TX_DMA_PRI)

-extern int register_interrupt_handler(uint8_t source, uint8_t level, uint8_t priority, uint8_t intr, void (*handler)(void));
+#if defined(MACHINE_FIREBEE)

-#define ISR_DBUG_ISR	0x01
-#define ISR_USER_ISR 	0x02
+/* Firebee FPGA interrupt controller */
+#define FBEE_INTR_CONTROL   * ((volatile uint32_t *) 0xf0010000)
+#define FBEE_INTR_ENABLE    * ((volatile uint32_t *) 0xf0010004)
+#define FBEE_INTR_CLEAR     * ((volatile uint32_t *) 0xf0010008)
+#define FBEE_INTR_PENDING   * ((volatile uint32_t *) 0xff01000c)
+
+/* register bits for Firebee FPGA-based interrupt controller */
+#define FBEE_INTR_PIC               (1 << 0)        /* PIC interrupt enable/pending/clear bit */
+#define FBEE_INTR_ETHERNET          (1 << 1)        /* ethernet PHY interrupt enable/pending/clear bit */
+#define FBEE_INTR_DVI               (1 << 2)        /* TFP410 monitor sense interrupt enable/pending/clear bit */
+#define FBEE_INTR_PCI_INTA          (1 << 3)        /* /PCIINTA enable/pending clear bit */
+#define FBEE_INTR_PCI_INTB          (1 << 4)        /* /PCIINTB enable/pending clear bit */
+#define FBEE_INTR_PCI_INTC          (1 << 5)        /* /PCIINTC enable/pending clear bit */
+#define FBEE_INTR_PCI_INTD          (1 << 6)        /* /PCIINTD enable/pending clear bit */
+#define FBEE_INTR_DSP               (1 << 7)        /* DSP interrupt enable/pending/clear bit */
+#define FBEE_INTR_VSYNC             (1 << 8)        /* VSYNC interrupt enable/pending/clear bit */
+#define FBEE_INTR_HSYNC             (1 << 9)        /* HSYNC interrupt enable/pending/clear bit */
+
+#define FBEE_INTR_INT_HSYNC_IRQ2    (1 << 26)       /* these bits are only meaningful for the FBEE_INTR_ENABLE register */
+#define FBEE_INTR_INT_CTR0_IRQ3     (1 << 27)
+#define FBEE_INTR_INT_VSYNC_IRQ4    (1 << 28)
+#define FBEE_INTR_INT_FPGA_IRQ5     (1 << 29)
+#define FBEE_INTR_INT_MFP_IRQ6      (1 << 30)
+#define FBEE_INTR_INT_IRQ7          (1 << 31)
+
+/*
+ * Atari MFP interrupt registers.
+ */
+
+#define FALCON_MFP_IERA     *((volatile uint8_t *) 0xfffffa07)
+#define FALCON_MFP_IERB     *((volatile uint8_t *) 0xfffffa09)
+#define FALCON_MFP_IPRA     *((volatile uint8_t *) 0xfffffa0b)
+#define FALCON_MFP_IPRB     *((volatile uint8_t *) 0xfffffa0d)
+#define FALCON_MFP_IMRA     *((volatile uint8_t *) 0xfffffa13)
+#define FALCON_MFP_IMRB     *((volatile uint8_t *) 0xfffffa15)
+
+#endif /* MACHINE_FIREBEE */

 extern void isr_init(void);
-extern int isr_register_handler(int type, int vector, int (*handler)(void *, void *), void *hdev, void *harg);
-extern void isr_remove_handler(int type ,int (*handler)(void *, void *));
+extern bool isr_set_prio_and_level(int int_source, int priority, int level);
+extern bool isr_enable_int_source(int int_source);
+extern bool isr_register_handler(int vector, int level, int priority, bool (*handler)(void *, void *), void *hdev, void *harg);
+extern void isr_remove_handler(bool (*handler)(void *, void *));
 extern bool isr_execute_handler(int vector);
+extern bool pic_interrupt_handler(void *arg1, void *arg2);
+extern bool xlbpci_interrupt_handler(void *arg1, void *arg2);
+extern bool pciarb_interrupt_handler(void *arg1, void *arg2);
+extern bool gpt0_interrupt_handler(void *arg1, void *arg2);
+extern bool irq5_handler(void *arg1, void *arg2);
 #endif /* _INTERRUPTS_H_ */
--- a/include/ip.h
+++ b/include/ip.h
@@ -9,7 +9,6 @@
 #ifndef _IP_H
 #define _IP_H

-/********************************************************************/

 /* 32-bit IP Addresses */
 typedef uint8_t IP_ADDR[4];
@@ -57,7 +56,6 @@ typedef struct
 #define IP_HDR_OFFSET   ETH_HDR_LEN
 #define IP_HDR_SIZE     20  /* no options */

-/********************************************************************/

 typedef struct
 {
@@ -71,7 +69,6 @@ typedef struct
 	unsigned int    err;
 } IP_INFO;

-/********************************************************************/

 extern void ip_handler(NIF *nif, NBUF *nbf);
 uint16_t ip_chksum(uint16_t *data, int num);
--- a/include/m54455.h
+++ b/include/m54455.h
@@ -0,0 +1,49 @@
+#ifndef _M54455_H_
+#define _M54455_H_
+
+/*
+ * m54455.h
+ *
+ * preprocessor definitions for the M54455 Freescale machine. This file should contain nothing but preprocessor
+ * definition that evaluate to numbers. It is intended for use in C sources as well as in linker control
+ * files, so care must be taken to not break the syntax of either one.
+ * 
+ * This file is part of BaS_gcc.
+ *
+ * BaS_gcc is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * BaS_gcc is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *  Created on: 26.02.2013
+ *      Author: Markus Fröschle
+ */
+
+#define SYSCLK			133000
+
+#define BOOTFLASH_BASE_ADDRESS		0xe0000000
+#define BOOTFLASH_SIZE				0x800000
+#define BOOTFLASH_BAM				(BOOTFLASH_SIZE - 1)
+
+#define SDRAM_START					0x00000000	/* start at address 0 */
+#define SDRAM_SIZE					0x8000000
+
+#ifdef COMPILE_RAM
+#define TARGET_ADDRESS	(SDRAM_START + SDRAM_SIZE - 0x200000)
+#else
+#define TARGET_ADDRESS	BOOTFLASH_BASE_ADDRESS
+#endif /* COMPILE_RAM */
+
+#define DRIVER_MEM_BUFFER_SIZE	0x100000
+
+#define EMUTOS_BASE_ADDRESS 	0xe0100000
+
+#endif /* _M54455_H_ */
--- a/include/mmu.h
+++ b/include/mmu.h
@@ -24,17 +24,89 @@
 #ifndef _MMU_H_
 #define _MMU_H_

+#include <stddef.h>
 #include "bas_types.h"

+/*
+ * ACR register handling macros
+ */
+#define ACR_BA(x)                   ((x) & 0xffff0000)
+#define ACR_ADMSK(x)                (((x) & 0xffff) << 16)
+#define ACR_E(x)                    (((x) & 1) << 15)
+
+#define ACR_S(x)                    (((x) & 3) << 13)
+#define ACR_S_USERMODE              0
+#define ACR_S_SUPERVISOR_MODE       1
+#define ACR_S_ALL                   2
+
+#define ACR_ADDRESS_MASK_MODE(x)	(((x) & 1) << 10)
+
+#define ACR_CACHE_MODE(x)			(((x) & 3) << 5)
+#define ACR_SUPERVISOR_PROTECT(x)	(((x) & 1) << 3)
+#define ACR_WRITE_PROTECT(x)		(((x) & 1) << 2)
+
+
+/*
+ * MMU register handling macros
+ */
+
 #define SCA_PAGE_ID		6	/* indicates video memory page */

+/*
+ * MMU page sizes
+ */
+
+enum mmu_page_size
+{
+    MMU_PAGE_SIZE_1M	= 0,
+    MMU_PAGE_SIZE_4K	= 1,
+    MMU_PAGE_SIZE_8K	= 2,
+    MMU_PAGE_SIZE_1K	= 3
+};
+
+#define SIZE_1M             0x100000        /* 1 Megabyte */
+#define SIZE_4K             0x1000          /* 4 KB */
+#define SIZE_8K             0x2000          /* 8 KB */
+#define SIZE_1K             0x400           /* 1 KB */
+
+#define DEFAULT_PAGE_SIZE   0x00100000      /* 1M pagesize */
+
+/*
+ * cache modes
+ */
+#define CACHE_WRITETHROUGH		0
+#define CACHE_COPYBACK			1
+#define CACHE_NOCACHE_PRECISE	2
+#define CACHE_NOCACHE_IMPRECISE	3
+
+
+/*
+ * page flags
+ */
+#define SV_PROTECT				1
+#define SV_USER					0
+
+#define ACCESS_READ		(1 << 0)
+#define	ACCESS_WRITE	(1 << 1)
+#define ACCESS_EXECUTE	(1 << 2)
+
+
 /*
 * global variables from linker script
 */
 extern long video_tlb;
 extern long video_sbt;

-extern void mmu_init(void);
-extern void mmutr_miss(uint32_t addresss);
+struct mmu_page_descriptor;

+extern void mmu_init(void);
+extern int mmu_map_page(int32_t virt, int32_t phys, enum mmu_page_size sz, uint8_t page_id, const struct mmu_page_descriptor *flags);
+
+/*
+ * API functions for the BaS driver interface
+ */
+extern int32_t mmu_map_data_page_locked(uint32_t address, uint32_t length, int asid);
+extern int32_t mmu_unlock_data_page(uint32_t address, uint32_t length, int asid);
+extern int32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb);
+extern uint32_t mmu_report_pagesize(void);
 #endif /* _MMU_H_ */
--- a/include/mod_devicetable.h
+++ b/include/mod_devicetable.h
@@ -3,10 +3,14 @@

 #define PCI_ANY_ID (~0)

-struct pci_device_id {
-	unsigned long vendor, device;		/* Vendor and device ID or PCI_ANY_ID*/
-	unsigned long subvendor, subdevice;	/* Subsystem ID's or PCI_ANY_ID */
-	unsigned long class, class_mask;	/* (class,subclass,prog-if) triplet */
+struct pci_device_id
+{
+    unsigned long vendor;       /* Vendor and device ID or PCI_ANY_ID*/
+    unsigned long device;
+    unsigned long subvendor;    /* Subsystem ID's or PCI_ANY_ID */
+    unsigned long subdevice;
+    unsigned long class;        /* (class,subclass,prog-if) triplet */
+    unsigned long class_mask;
 	unsigned long driver_data;	/* Data private to the driver */
 };

@@ -15,7 +19,8 @@ struct pci_device_id {
 #define IEEE1394_MATCH_SPECIFIER_ID	0x0004
 #define IEEE1394_MATCH_VERSION		0x0008

-struct ieee1394_device_id {
+struct ieee1394_device_id
+{
 	unsigned long match_flags;
 	unsigned long vendor_id;
 	unsigned long model_id;
@@ -81,7 +86,8 @@ struct ieee1394_device_id {
 * matches towards the beginning of your table, so that driver_info can
 * record quirks of specific products.
 */
-struct usb_device_id {
+struct usb_device_id
+{
 	/* which fields to match against? */
 	unsigned short		match_flags;

@@ -106,10 +112,10 @@ struct usb_device_id {
 };

 /* Some useful macros to use to create struct usb_device_id */
-#define USB_DEVICE_ID_MATCH_VENDOR		0x0001
-#define USB_DEVICE_ID_MATCH_PRODUCT		0x0002
-#define USB_DEVICE_ID_MATCH_DEV_LO		0x0004
-#define USB_DEVICE_ID_MATCH_DEV_HI		0x0008
+#define USB_DEVICE_ID_MATCH_VENDOR          0x0001
+#define USB_DEVICE_ID_MATCH_PRODUCT         0x0002
+#define USB_DEVICE_ID_MATCH_DEV_LO          0x0004
+#define USB_DEVICE_ID_MATCH_DEV_HI          0x0008
 #define USB_DEVICE_ID_MATCH_DEV_CLASS		0x0010
 #define USB_DEVICE_ID_MATCH_DEV_SUBCLASS	0x0020
 #define USB_DEVICE_ID_MATCH_DEV_PROTOCOL	0x0040
@@ -118,18 +124,19 @@ struct usb_device_id {
 #define USB_DEVICE_ID_MATCH_INT_PROTOCOL	0x0200

 /* s390 CCW devices */
-struct ccw_device_id {
+struct ccw_device_id
+{
 	unsigned short	match_flags;	/* which fields to match against */

-	unsigned short	cu_type;	/* control unit type     */
-	unsigned short	dev_type;	/* device type           */
-	unsigned char	cu_model;	/* control unit model    */
-	unsigned char	dev_model;	/* device model          */
+    unsigned short	cu_type;        /* control unit type     */
+    unsigned short	dev_type;       /* device type           */
+    unsigned char	cu_model;       /* control unit model    */
+    unsigned char	dev_model;      /* device model          */

 	unsigned long driver_info;
 };

-#define CCW_DEVICE_ID_MATCH_CU_TYPE		0x01
+#define CCW_DEVICE_ID_MATCH_CU_TYPE         0x01
 #define CCW_DEVICE_ID_MATCH_CU_MODEL		0x02
 #define CCW_DEVICE_ID_MATCH_DEVICE_TYPE		0x04
 #define CCW_DEVICE_ID_MATCH_DEVICE_MODEL	0x08
@@ -138,15 +145,18 @@ struct ccw_device_id {
 #define PNP_ID_LEN	8
 #define PNP_MAX_DEVICES	8

-struct pnp_device_id {
+struct pnp_device_id
+{
 	unsigned char id[PNP_ID_LEN];
 	unsigned long driver_data;
 };

-struct pnp_card_device_id {
+struct pnp_card_device_id
+{
 	unsigned char id[PNP_ID_LEN];
 	unsigned long driver_data;
-	struct {
+    struct
+    {
 		unsigned char id[PNP_ID_LEN];
 	} devs[PNP_MAX_DEVICES];
 };
@@ -154,7 +164,8 @@ struct pnp_card_device_id {

 #define SERIO_ANY	0xff

-struct serio_device_id {
+struct serio_device_id
+{
 	unsigned char type;
 	unsigned char extra;
 	unsigned char id;
--- a/include/nbuf.h
+++ b/include/nbuf.h
@@ -10,7 +10,6 @@

 #include "bas_types.h"

-/********************************************************************/
 /*
 * Include the Queue structure definitions
 */
--- a/include/net_timer.h
+++ b/include/net_timer.h
@@ -8,9 +8,7 @@
 #ifndef _TIMER_H_
 #define _TIMER_H_

-#include <stdint.h>
-#include <stdbool.h>
-#include <stddef.h>
+#include <bas_types.h>

 typedef struct
 {
--- a/include/ohci.h
+++ b/include/ohci.h
@@ -6,63 +6,63 @@
 *
 * usb-ohci.h
 */
- 
+
 #define USB_OHCI_MAX_ROOT_PORTS	4

-static int cc_to_error[16] = {
+static int cc_to_error[16] =
+{

 /* mapping of the OHCI CC status to error codes */
-	/* No  Error  */	       0,
-	/* CRC Error  */	       USB_ST_CRC_ERR,
-	/* Bit Stuff  */	       USB_ST_BIT_ERR,
-	/* Data Togg  */	       USB_ST_CRC_ERR,
-	/* Stall      */	       USB_ST_STALLED,
-	/* DevNotResp */	       -1,
-	/* PIDCheck   */	       USB_ST_BIT_ERR,
-	/* UnExpPID   */	       USB_ST_BIT_ERR,
-	/* DataOver   */	       USB_ST_BUF_ERR,
-	/* DataUnder  */	       USB_ST_BUF_ERR,
-	/* reservd    */	       -1,
-	/* reservd    */	       -1,
-	/* BufferOver */	       USB_ST_BUF_ERR,
-	/* BuffUnder  */	       USB_ST_BUF_ERR,
-	/* Not Access */	       -1,
-	/* Not Access */	       -1
+    /* No  Error  */	       0,
+    /* CRC Error  */	       USB_ST_CRC_ERR,
+    /* Bit Stuff  */	       USB_ST_BIT_ERR,
+    /* Data Togg  */	       USB_ST_CRC_ERR,
+    /* Stall      */	       USB_ST_STALLED,
+    /* DevNotResp */	       -1,
+    /* PIDCheck   */	       USB_ST_BIT_ERR,
+    /* UnExpPID   */	       USB_ST_BIT_ERR,
+    /* DataOver   */	       USB_ST_BUF_ERR,
+    /* DataUnder  */	       USB_ST_BUF_ERR,
+    /* reservd    */	       -1,
+    /* reservd    */	       -1,
+    /* BufferOver */	       USB_ST_BUF_ERR,
+    /* BuffUnder  */	       USB_ST_BUF_ERR,
+    /* Not Access */	       -1,
+    /* Not Access */	       -1
 };

-#ifdef DEBUG
-static const char *cc_to_string[16] = {
-	"No Error",
-	"CRC: Last data packet from endpoint contained a CRC error.",
-	"BITSTUFFING:\r\nLast data packet from endpoint contained a bit stuffing violation",
-	"DATATOGGLEMISMATCH:\r\n Last packet from endpoint had data toggle PID\r\n" \
-		     "that did not match the expected value.",
-	"STALL: TD was moved to the Done Queue because the endpoint returned a STALL PID",
-	"DEVICENOTRESPONDING:\r\nDevice did not respond to token (IN) or did\r\n" \
-		     "not provide a handshake (OUT)",
-	"PIDCHECKFAILURE:\r\nCheck bits on PID from endpoint failed on data PID\r\n"\
-		     "(IN) or handshake (OUT)",
-	"UNEXPECTEDPID:\r\nReceive PID was not valid when encountered or PID\r\n" \
-		     "value is not defined.",
-	"DATAOVERRUN:\r\nThe amount of data returned by the endpoint exceeded\r\n" \
-		     "either the size of the maximum data packet allowed\r\n" \
-		     "from the endpoint (found in MaximumPacketSize field\r\n" \
-		     "of ED) or the remaining buffer size.",
-	"DATAUNDERRUN:\r\nThe endpoint returned less than MaximumPacketSize\r\n" \
-		     "and that amount was not sufficient to fill the\r\n" \
-		     "specified buffer",
-	"reserved1",
-	"reserved2",
-	"BUFFEROVERRUN:\r\nDuring an IN, HC received data from endpoint faster\r\n" \
-		     "than it could be written to system memory",
-	"BUFFERUNDERRUN:\r\nDuring an OUT, HC could not retrieve data from\r\n" \
-		     "system memory fast enough to keep up with data USB data rate.",
-	"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
-		     "on a list to be processed by the HC.(1)",
-	"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
-		     "on a list to be processed by the HC.(2)",
+static const char *cc_to_string[16] =
+{
+    "No Error",
+    "CRC: Last data packet from endpoint contained a CRC error.",
+    "BITSTUFFING:\r\nLast data packet from endpoint contained a bit stuffing violation",
+    "DATATOGGLEMISMATCH:\r\n Last packet from endpoint had data toggle PID\r\n" \
+             "that did not match the expected value.",
+    "STALL: TD was moved to the Done Queue because the endpoint returned a STALL PID",
+    "DEVICENOTRESPONDING:\r\nDevice did not respond to token (IN) or did\r\n" \
+             "not provide a handshake (OUT)",
+    "PIDCHECKFAILURE:\r\nCheck bits on PID from endpoint failed on data PID\r\n"\
+             "(IN) or handshake (OUT)",
+    "UNEXPECTEDPID:\r\nReceive PID was not valid when encountered or PID\r\n" \
+             "value is not defined.",
+    "DATAOVERRUN:\r\nThe amount of data returned by the endpoint exceeded\r\n" \
+             "either the size of the maximum data packet allowed\r\n" \
+             "from the endpoint (found in MaximumPacketSize field\r\n" \
+             "of ED) or the remaining buffer size.",
+    "DATAUNDERRUN:\r\nThe endpoint returned less than MaximumPacketSize\r\n" \
+             "and that amount was not sufficient to fill the\r\n" \
+             "specified buffer",
+    "reserved1",
+    "reserved2",
+    "BUFFEROVERRUN:\r\nDuring an IN, HC received data from endpoint faster\r\n" \
+             "than it could be written to system memory",
+    "BUFFERUNDERRUN:\r\nDuring an OUT, HC could not retrieve data from\r\n" \
+             "system memory fast enough to keep up with data USB data rate.",
+    "NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
+             "on a list to be processed by the HC.(1)",
+    "NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
+             "on a list to be processed by the HC.(2)",
 };
-#endif /* DEBUG */

 /* ED States */

@@ -73,25 +73,26 @@ static const char *cc_to_string[16] = {
 #define ED_URB_DEL	0x08

 /* usb_ohci_ed */
-struct ed {
-	uint32_t hwINFO;
-	uint32_t hwTailP;
-	uint32_t hwHeadP;
-	uint32_t hwNextED;
+struct ed
+{
+    uint32_t hwINFO;
+    uint32_t hwTailP;
+    uint32_t hwHeadP;
+    uint32_t hwNextED;

-	struct ed *ed_prev;
-	uint8_t int_period;
-	uint8_t int_branch;
-	uint8_t int_load;
-	uint8_t int_interval;
-	uint8_t state;
-	uint8_t type;
-	uint16_t last_iso;
-	struct ed *ed_rm_list;
+    struct ed *ed_prev;
+    uint8_t int_period;
+    uint8_t int_branch;
+    uint8_t int_load;
+    uint8_t int_interval;
+    uint8_t state;
+    uint8_t type;
+    uint16_t last_iso;
+    struct ed *ed_rm_list;

-	struct usb_device *usb_dev;
-	void *purb;
-	uint32_t unused[2];
+    struct usb_device *usb_dev;
+    void *purb;
+    uint32_t unused[2];
 } __attribute__((aligned(16)));
 typedef struct ed ed_t;

@@ -134,22 +135,23 @@ typedef struct ed ed_t;

 #define MAXPSW 1

-struct td {
-	uint32_t hwINFO;
-	uint32_t hwCBP;		/* Current Buffer Pointer */
-	uint32_t hwNextTD;		/* Next TD Pointer */
-	uint32_t hwBE;		/* Memory Buffer End Pointer */
+struct td
+{
+    uint32_t hwINFO;
+    uint32_t hwCBP;		/* Current Buffer Pointer */
+    uint32_t hwNextTD;		/* Next TD Pointer */
+    uint32_t hwBE;		/* Memory Buffer End Pointer */

-	uint16_t hwPSW[MAXPSW];
-	uint8_t unused;
-	uint8_t index;
-	struct ed *ed;
-	struct td *next_dl_td;
-	struct usb_device *usb_dev;
-	int transfer_len;
-	uint32_t data;
+    uint16_t hwPSW[MAXPSW];
+    uint8_t unused;
+    uint8_t index;
+    struct ed *ed;
+    struct td *next_dl_td;
+    struct usb_device *usb_dev;
+    int transfer_len;
+    uint32_t data;

-	uint32_t unused2[2];
+    uint32_t unused2[2];
 } __attribute__((aligned(32)));
 typedef struct td td_t;

@@ -162,17 +164,18 @@ typedef struct td td_t;
 */

 #define NUM_INTS 32	/* part of the OHCI standard */
-struct ohci_hcca {
-	uint32_t	int_table[NUM_INTS];	/* Interrupt ED table */
+struct ohci_hcca
+{
+    uint32_t	int_table[NUM_INTS];	/* Interrupt ED table */
 #if defined(CONFIG_MPC5200)
-	uint16_t	pad1;			/* set to 0 on each frame_no change */
-	uint16_t	frame_no;		/* current frame number */
+    uint16_t	pad1;			/* set to 0 on each frame_no change */
+    uint16_t	frame_no;		/* current frame number */
 #else
-	uint16_t	frame_no;		/* current frame number */
-	uint16_t	pad1;			/* set to 0 on each frame_no change */
+    uint16_t	frame_no;		/* current frame number */
+    uint16_t	pad1;			/* set to 0 on each frame_no change */
 #endif
-	uint32_t	done_head;		/* info returned for an interrupt */
-	uint8_t		reserved_for_hc[116];
+    uint32_t	done_head;		/* info returned for an interrupt */
+    uint8_t		reserved_for_hc[116];
 } __attribute__((aligned(256)));

 /*
@@ -180,35 +183,37 @@ struct ohci_hcca {
 * region.  This is Memory Mapped I/O.	You must use the readl() and
 * writel() macros defined in asm/io.h to access these!!
 */
-struct ohci_regs {
-	/* control and status registers */
-	uint32_t	revision;
-	uint32_t	control;
-	uint32_t	cmdstatus;
-	uint32_t	intrstatus;
-	uint32_t	intrenable;
-	uint32_t	intrdisable;
-	/* memory pointers */
-	uint32_t	hcca;
-	uint32_t	ed_periodcurrent;
-	uint32_t	ed_controlhead;
-	uint32_t	ed_controlcurrent;
-	uint32_t	ed_bulkhead;
-	uint32_t	ed_bulkcurrent;
-	uint32_t	donehead;
-	/* frame counters */
-	uint32_t	fminterval;
-	uint32_t	fmremaining;
-	uint32_t	fmnumber;
-	uint32_t	periodicstart;
-	uint32_t	lsthresh;
-	/* Root hub ports */
-	struct	ohci_roothub_regs {
-		uint32_t	a;
-		uint32_t	b;
-		uint32_t	status;
-		uint32_t	portstatus[USB_OHCI_MAX_ROOT_PORTS];
-	} roothub;
+struct ohci_regs
+{
+    /* control and status registers */
+    uint32_t	revision;
+    uint32_t	control;
+    uint32_t	cmdstatus;
+    uint32_t	intrstatus;
+    uint32_t	intrenable;
+    uint32_t	intrdisable;
+    /* memory pointers */
+    uint32_t	hcca;
+    uint32_t	ed_periodcurrent;
+    uint32_t	ed_controlhead;
+    uint32_t	ed_controlcurrent;
+    uint32_t	ed_bulkhead;
+    uint32_t	ed_bulkcurrent;
+    uint32_t	donehead;
+    /* frame counters */
+    uint32_t	fminterval;
+    uint32_t	fmremaining;
+    uint32_t	fmnumber;
+    uint32_t	periodicstart;
+    uint32_t	lsthresh;
+    /* Root hub ports */
+    struct	ohci_roothub_regs
+    {
+        uint32_t	a;
+        uint32_t	b;
+        uint32_t	status;
+        uint32_t	portstatus[USB_OHCI_MAX_ROOT_PORTS];
+    } roothub;
 } __attribute__((aligned(32)));

 /* Some EHCI controls */
@@ -263,12 +268,13 @@ struct ohci_regs {


 /* Virtual Root HUB */
-struct virt_root_hub {
-	int devnum; /* Address of Root Hub endpoint */
-	void *dev;  /* was urb */
-	void *int_addr;
-	int send;
-	int interval;
+struct virt_root_hub
+{
+    int devnum; /* Address of Root Hub endpoint */
+    void *dev;  /* was urb */
+    void *int_addr;
+    int send;
+    int interval;
 };

 /* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */
@@ -366,26 +372,27 @@ struct virt_root_hub {
 #define N_URB_TD 48
 typedef struct
 {
-	ed_t *ed;
-	uint16_t length;	/* number of tds associated with this request */
-	uint16_t td_cnt;	/* number of tds already serviced */
-	struct usb_device *dev;
-	int   state;
-	uint32_t pipe;
-	void *transfer_buffer;
-	int transfer_buffer_length;
-	int interval;
-	int actual_length;
-	int finished;
-	td_t *td[N_URB_TD];	/* list pointer to all corresponding TDs associated with this request */
+    ed_t *ed;
+    uint16_t length;	/* number of tds associated with this request */
+    uint16_t td_cnt;	/* number of tds already serviced */
+    struct usb_device *dev;
+    int   state;
+    uint32_t pipe;
+    void *transfer_buffer;
+    int transfer_buffer_length;
+    int interval;
+    int actual_length;
+    int finished;
+    td_t *td[N_URB_TD];	/* list pointer to all corresponding TDs associated with this request */
 } urb_priv_t;
 #define URB_DEL 1

 #define NUM_EDS 8		/* num of preallocated endpoint descriptors */

-struct ohci_device {
-	ed_t	ed[NUM_EDS];
-	int ed_cnt;
+struct ohci_device
+{
+    ed_t	ed[NUM_EDS];
+    int ed_cnt;
 };

 /*
@@ -395,46 +402,47 @@ struct ohci_device {
 * a subset of what the full implementation needs. (Linus)
 */

-typedef struct ohci {
-	/* ------- common part -------- */
-	long handle;              /* PCI BIOS */
-	const struct pci_device_id *ent;
-	int usbnum;
+typedef struct ohci
+{
+    /* ------- common part -------- */
+    long handle;              /* PCI BIOS */
+    const struct pci_device_id *ent;
+    int usbnum;
  /* ---- end of common part ---- */
-	int big_endian;           /* PCI BIOS */
-	int controller;
-	struct ohci_hcca *hcca_unaligned;
-	struct ohci_hcca *hcca;		/* hcca */
-	td_t *td_unaligned;
-	struct ohci_device *ohci_dev_unaligned;
-	/* this allocates EDs for all possible endpoints */
-	struct ohci_device *ohci_dev;
+    int big_endian;           /* PCI BIOS */
+    int controller;
+    struct ohci_hcca *hcca_unaligned;
+    struct ohci_hcca *hcca;		/* hcca */
+    td_t *td_unaligned;
+    struct ohci_device *ohci_dev_unaligned;
+    /* this allocates EDs for all possible endpoints */
+    struct ohci_device *ohci_dev;

-	int irq_enabled;
-	int stat_irq;
-	int irq;
-	int disabled;			/* e.g. got a UE, we're hung */
-	int sleeping;
+    int irq_enabled;
+    int stat_irq;
+    int irq;
+    int disabled;			/* e.g. got a UE, we're hung */
+    int sleeping;
 #define OHCI_FLAGS_NEC 0x80000000
-	uint32_t flags;		/* for HC bugs */
+    uint32_t flags;		/* for HC bugs */

-	uint32_t offset;
-	uint32_t dma_offset;
-	struct ohci_regs *regs; /* OHCI controller's memory */
+    uint32_t offset;
+    uint32_t dma_offset;
+    struct ohci_regs *regs; /* OHCI controller's memory */

-	int ohci_int_load[32];	 /* load of the 32 Interrupt Chains (for load balancing)*/
-	ed_t *ed_rm_list[2];	 /* lists of all endpoints to be removed */
-	ed_t *ed_bulktail;	 /* last endpoint of bulk list */
-	ed_t *ed_controltail;	 /* last endpoint of control list */
-	int intrstatus;
-	uint32_t hc_control;		/* copy of the hc control reg */
-	uint32_t ndp;          /* copy NDP from roothub_a */
-	struct virt_root_hub rh;
+    int ohci_int_load[32];	 /* load of the 32 Interrupt Chains (for load balancing)*/
+    ed_t *ed_rm_list[2];	 /* lists of all endpoints to be removed */
+    ed_t *ed_bulktail;	 /* last endpoint of bulk list */
+    ed_t *ed_controltail;	 /* last endpoint of control list */
+    int intrstatus;
+    uint32_t hc_control;		/* copy of the hc control reg */
+    uint32_t ndp;          /* copy NDP from roothub_a */
+    struct virt_root_hub rh;

-	const char *slot_name;
+    const char *slot_name;

-	/* device which was disconnected */
-	struct usb_device *devgone;
+    /* device which was disconnected */
+    struct usb_device *devgone;
 } ohci_t;

 /* hcd */
@@ -443,7 +451,6 @@ static int ep_link(ohci_t * ohci, ed_t * ed);
 static int ep_unlink(ohci_t * ohci, ed_t * ed);
 static ed_t * ep_add_ed(ohci_t * ohci, struct usb_device * usb_dev, uint32_t pipe, int interval, int load);

-/*-------------------------------------------------------------------------*/

 /* we need more TDs than EDs */
 #define NUM_TD 64
@@ -451,7 +458,7 @@ static ed_t * ep_add_ed(ohci_t * ohci, struct usb_device * usb_dev, uint32_t pip

 static inline void ed_free(struct ed *ed)
 {
-	ed->usb_dev = NULL;
+    ed->usb_dev = NULL;
 }


--- a/include/part.h
+++ b/include/part.h
@@ -26,7 +26,8 @@
 typedef unsigned long long uint64_t;
 typedef unsigned long lbaint_t;

-typedef struct block_dev_desc {
+typedef struct block_dev_desc
+{
 	int		if_type;	/* type of the interface */
 	int		dev;		/* device number */
 	unsigned char	part_type;	/* partition type */
--- a/include/pci.h
+++ b/include/pci.h
@@ -21,7 +21,7 @@
 *      Author: Markus Fröschle
 */

-#include <stdint.h>
+#include <bas_types.h>
 #include "util.h" 	/* for swpX() */

 #define	 PCI_MEMORY_OFFSET	(0x80000000)
@@ -50,7 +50,7 @@
 #define PCIBAR2               0x18   /* PCI Base Address Register for Memory
                                        Accesses to Local Address Space 0   */
 #define PCIBAR3               0x1C   /* PCI Base Address Register for Memory
-                                        Accesses to Local Address Space 1   */ 
+                                        Accesses to Local Address Space 1   */
 #define PCIBAR4               0x20   /* PCI Base Address Register, reserved */
 #define PCIBAR5               0x24   /* PCI Base Address Register, reserved */
 #define PCICIS                0x28   /* PCI Cardbus CIS Pointer, not support*/
@@ -91,9 +91,12 @@
 #define PCICSR_STEPPING		(1 << 7)	/* if set: stepping enabled */
 #define PCICSR_SERR			(1 << 8)	/* if set: SERR pin enabled */
 #define PCICSR_FAST_BTOB_E	(1 << 9)	/* if set: fast back-to-back enabled */
+#define PCICSR_INT_DISABLE  (1 << 10)   /* if set: disable interrupts from this device */
 /*
 * bit definitions for PCICSR upper half (Status Register)
 */
+#define PCICSR_INTERRUPT    (1 << 3)    /* device requested interrupt */
+#define PCICSR_CAPABILITIES (1 << 4)    /* if set, capabilities pointer is valid */
 #define PCICSR_66MHZ		(1 << 5)	/* 66 MHz capable */
 #define PCICSR_UDF			(1 << 6)	/* UDF supported */
 #define PCICSR_FAST_BTOB	(1 << 7)	/* Fast back-to-back enabled */
@@ -191,8 +194,8 @@ typedef struct                       /* structure of address conversion     */
 #define PCI_COMMAND(i)		(((i) >> 16) & 0xffff)

 /* register 0x08 macros */
-#define PCI_CLASS_CODE(i)	((swpl((i)) & 0xff000000) >> 24)
-#define PCI_SUBCLASS(i)		((swpl((i)) & 0x00ff0000) >> 16)
+#define PCI_CLASS_CODE(i)	((swpl((i)) & 0xffff0000) >> 16)
+#define PCI_SUBCLASS(i)		((swpl((i)) & 0xffffff00) >> 8)
 #define PCI_PROG_IF(i)		((swpl((i)) & 0x0000ff00) >> 8)
 #define PCI_REVISION_ID(i)	((swpl((i)) & 0x000000ff))

@@ -224,10 +227,14 @@ typedef struct                       /* structure of address conversion     */
 extern void init_eport(void);
 extern void init_xlbus_arbiter(void);
 extern void init_pci(void);
+extern int pci_handle2index(int32_t handle);

 extern int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index);
 extern int32_t pci_find_classcode(uint32_t classcode, int index);

+extern int32_t pci_get_interrupt_cause(void);
+extern int32_t pci_call_interrupt_chain(int32_t handle, int32_t data);
+
 /*
 * match bits for pci_find_classcode()
 */
@@ -243,19 +250,104 @@ extern int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t va
 extern int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value);
 extern int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value);

-extern struct pci_rd *pci_get_resource(int32_t handle);
-extern int32_t pci_hook_interrupt(int32_t handle, void *interrupt_handler, void *parameter);
+typedef int (*pci_interrupt_handler)(int param);
+
+extern int32_t pci_hook_interrupt(int32_t handle, void *handler, void *parameter);
 extern int32_t pci_unhook_interrupt(int32_t handle);

+extern struct pci_rd *pci_get_resource(int32_t handle);
+
+/*
+ * Not implemented PCI_BIOS functions
+ */
+extern uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg);
+extern uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg);
+extern uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg);
+extern int32_t pci_special_cycle(uint16_t bus, uint32_t data);
+extern int32_t pci_get_routing(int32_t handle);
+extern int32_t pci_set_interrupt(int32_t handle);
+extern int32_t pci_get_card_used(int32_t handle, uint32_t *address);
+extern int32_t pci_set_card_used(int32_t handle, uint32_t *callback);
+extern int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset);
+extern uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset);
+extern uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset);
+extern int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset);
+extern uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset);
+extern uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset);
+extern int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t pci_get_machine_id(void);
+extern int32_t pci_get_pagesize(void);
+extern int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
+
+/*
+ * prototypes for PCI wrapper routines
+ */
+extern int32_t wrapper_find_pci_device(uint32_t id, uint16_t index);
+extern int32_t wrapper_find_pci_classcode(uint32_t class, uint16_t index);
+extern int32_t wrapper_read_config_byte(int32_t handle, uint16_t reg, uint8_t *address);
+extern int32_t wrapper_read_config_word(int32_t handle, uint16_t reg, uint16_t *address);
+extern int32_t wrapper_read_config_longword(int32_t handle, uint16_t reg, uint32_t *address);
+extern uint8_t wrapper_fast_read_config_byte(int32_t handle, uint16_t reg);
+extern uint16_t wrapper_fast_read_config_word(int32_t handle, uint16_t reg);
+extern uint32_t wrapper_fast_read_config_longword(int32_t handle, uint16_t reg);
+extern int32_t wrapper_write_config_byte(int32_t handle, uint16_t reg, uint16_t val);
+extern int32_t wrapper_write_config_word(int32_t handle, uint16_t reg, uint16_t val);
+extern int32_t wrapper_write_config_longword(int32_t handle, uint16_t reg, uint32_t val);
+extern int32_t wrapper_hook_interrupt(int32_t handle, uint32_t *routine, uint32_t *parameter);
+extern int32_t wrapper_unhook_interrupt(int32_t handle);
+extern int32_t wrapper_special_cycle(uint16_t bus, uint32_t data);
+extern int32_t wrapper_get_routing(int32_t handle);
+extern int32_t wrapper_set_interrupt(int32_t handle);
+extern int32_t wrapper_get_resource(int32_t handle);
+extern int32_t wrapper_get_card_used(int32_t handle, uint32_t *address);
+extern int32_t wrapper_set_card_used(int32_t handle, uint32_t *callback);
+extern int32_t wrapper_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t wrapper_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t wrapper_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t wrapper_fast_read_mem_byte(int32_t handle, uint32_t offset);
+extern uint16_t wrapper_fast_read_mem_word(int32_t handle, uint32_t offset);
+extern uint32_t wrapper_fast_read_mem_longword(int32_t handle, uint32_t offset);
+extern int32_t wrapper_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t wrapper_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t wrapper_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t wrapper_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t wrapper_fast_read_io_byte(int32_t handle, uint32_t offset);
+extern uint16_t wrapper_fast_read_io_word(int32_t handle, uint32_t offset);
+extern uint32_t wrapper_fast_read_io_longword(int32_t handle, uint32_t offset);
+extern int32_t wrapper_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t wrapper_get_machine_id(void);
+extern int32_t wrapper_get_pagesize(void);
+extern int32_t wrapper_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
+
 #define PCI_MK_CONF_ADDR(bus, device, function)	(MCF_PCI_PCICAR_E | \
-												((bus) << 16) | \
-												((device << 8) | \
-												(function)) 
+                                                ((bus) << 16) | \
+                                                ((device << 8) | \
+                                                (function))

 #define PCI_HANDLE(bus, slot, function)	(0 | ((bus & 0xff) << 10 | (slot & 0x1f) << 3 | (function & 7)))
 #define PCI_BUS_FROM_HANDLE(h)				(((h) & 0xff00) >> 10)
 #define PCI_DEVICE_FROM_HANDLE(h)			(((h) & 0xf8) >> 3)
 #define PCI_FUNCTION_FROM_HANDLE(h)			(((h) & 0x7))

-extern void chip_errata_135(void); /* needed in ohci-hcd.c */
 #endif /* _PCI_H_ */
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -598,8 +598,10 @@
 #define PCI_DEVICE_ID_NEC_VL		0x0016 /* PCI-VL Bridge */
 #define PCI_DEVICE_ID_NEC_STARALPHA2	0x002c /* STAR ALPHA2 */
 #define PCI_DEVICE_ID_NEC_CBUS_2	0x002d /* PCI-Cbus Bridge */
+#define PCI_DEVICE_ID_NEC_USB_A     0x0031
 #define PCI_DEVICE_ID_NEC_USB		0x0035 /* PCI-USB Host */
 #define PCI_DEVICE_ID_NEC_USB_2		0x00e0 /* PCI-USB 2 Host */
+#define PCI_DEVICE_ID_NEC_USB_3     0x00f0
 #define PCI_DEVICE_ID_NEC_CBUS_3	0x003b
 #define PCI_DEVICE_ID_NEC_NAPCCARD	0x003e
 #define PCI_DEVICE_ID_NEC_PCX2		0x0046 /* PowerVR */
@@ -798,7 +800,7 @@

 #define PCI_VENDOR_ID_ANIGMA		0x1051
 #define PCI_DEVICE_ID_ANIGMA_MC145575	0x0100
-  
+
 #define PCI_VENDOR_ID_EFAR		0x1055
 #define PCI_DEVICE_ID_EFAR_SLC90E66_1	0x9130
 #define PCI_DEVICE_ID_EFAR_SLC90E66_0	0x9460
@@ -1507,7 +1509,7 @@

 #define PCI_VENDOR_ID_ZIATECH		0x1138
 #define PCI_DEVICE_ID_ZIATECH_5550_HC	0x5550
- 
+
 #define PCI_VENDOR_ID_CYCLONE		0x113c
 #define PCI_DEVICE_ID_CYCLONE_SDK	0x0001

@@ -1707,8 +1709,8 @@
 #define PCI_DEVICE_ID_RP8OCTA		0x0005
 #define PCI_DEVICE_ID_RP8J		0x0006
 #define PCI_DEVICE_ID_RP4J		0x0007
-#define PCI_DEVICE_ID_RP8SNI		0x0008	
-#define PCI_DEVICE_ID_RP16SNI		0x0009	
+#define PCI_DEVICE_ID_RP8SNI		0x0008
+#define PCI_DEVICE_ID_RP16SNI		0x0009
 #define PCI_DEVICE_ID_RPP4		0x000A
 #define PCI_DEVICE_ID_RPP8		0x000B
 #define PCI_DEVICE_ID_RP8M		0x000C
@@ -1719,9 +1721,9 @@
 #define PCI_DEVICE_ID_URP8INTF		0x0802
 #define PCI_DEVICE_ID_URP16INTF		0x0803
 #define PCI_DEVICE_ID_URP8OCTA		0x0805
-#define PCI_DEVICE_ID_UPCI_RM3_8PORT	0x080C       
+#define PCI_DEVICE_ID_UPCI_RM3_8PORT	0x080C
 #define PCI_DEVICE_ID_UPCI_RM3_4PORT	0x080D
-#define PCI_DEVICE_ID_CRP16INTF		0x0903       
+#define PCI_DEVICE_ID_CRP16INTF		0x0903

 #define PCI_VENDOR_ID_CYCLADES		0x120e
 #define PCI_DEVICE_ID_CYCLOM_Y_Lo	0x0100
@@ -2143,7 +2145,7 @@
 #define PCI_DEVICE_ID_RASTEL_2PORT	0x2000

 #define PCI_VENDOR_ID_ZOLTRIX		0x15b0
-#define PCI_DEVICE_ID_ZOLTRIX_2BD0	0x2bd0 
+#define PCI_DEVICE_ID_ZOLTRIX_2BD0	0x2bd0

 #define PCI_VENDOR_ID_MELLANOX		0x15b3
 #define PCI_DEVICE_ID_MELLANOX_TAVOR	0x5a44
@@ -2288,8 +2290,8 @@
 #define PCI_DEVICE_ID_INTEL_82092AA_0	0x1221
 #define PCI_DEVICE_ID_INTEL_82092AA_1	0x1222
 #define PCI_DEVICE_ID_INTEL_7116	0x1223
-#define PCI_DEVICE_ID_INTEL_7505_0	0x2550  
-#define PCI_DEVICE_ID_INTEL_7505_1	0x2552  
+#define PCI_DEVICE_ID_INTEL_7505_0	0x2550
+#define PCI_DEVICE_ID_INTEL_7505_1	0x2552
 #define PCI_DEVICE_ID_INTEL_7205_0	0x255d
 #define PCI_DEVICE_ID_INTEL_82596	0x1226
 #define PCI_DEVICE_ID_INTEL_82865	0x1227
--- a/include/queue.h
+++ b/include/queue.h
@@ -8,8 +8,6 @@
 #ifndef _QUEUE_H_
 #define _QUEUE_H_

-/********************************************************************/
-
 /* 
 * Individual queue node
 */
--- a/include/radeonfb.h
+++ b/include/radeonfb.h
@@ -10,7 +10,9 @@
 #include "i2c-algo-bit.h"
 #include "util.h"			/* for swpX() */
 #include "wait.h"
+
 //#include "radeon_theatre.h"
+
 #include "radeon_reg.h"

 /* Buffer are aligned on 4096 byte boundaries */
--- a/include/sd_card.h
+++ b/include/sd_card.h
@@ -31,7 +31,7 @@
 #define _SD_CARD_H_

 #include <MCF5475.h>
-#include <stdint.h>
+#include <bas_types.h>

 extern void sd_card_init(void);

--- a/include/sysinit.h
+++ b/include/sysinit.h
@@ -28,13 +28,17 @@
 #ifndef __SYSINIT_H__
 #define __SYSINIT_H__

+#include <stdbool.h>
+
 /* function(s) from init_fpga.c */
-extern void init_fpga(void);
+extern bool init_fpga(void);
 extern void init_usb(void);

 /* fault_vectors */
 extern void setup_vectors(void);

+extern bool fpga_configured;
+
 #endif /* __SYSINIT_H__ */


--- a/include/usb.h
+++ b/include/usb.h
@@ -26,7 +26,6 @@
 #ifndef _USB_H_
 #define _USB_H_

-//#include <stdlib.h>
 #include <bas_string.h>
 #include "driver_mem.h"
 #include "pci.h"
@@ -37,18 +36,10 @@

 extern long *tab_funcs_pci;

-#define in8(addr)		Fast_read_mem_byte(usb_handle,addr)
-#define in16r(addr)		Fast_read_mem_word(usb_handle,addr)
-#define in32r(addr)		Fast_read_mem_longword(usb_handle,addr)
-#define out8(addr,val)	Write_mem_byte(usb_handle,addr,val)
-#define out16r(addr,val)	Write_mem_word(usb_handle,addr,val)
-#define out32r(addr,val)	Write_mem_longword(usb_handle,addr,val)
-
-
 #define __u8 uint8_t
 #define __u16 uint16_t
 #define __u32 uint32_t
-#define u8 uint8_t
+//#define u8 uint8_t
 #define u16 uint16_t
 #define u32 uint32_t
 #define uint8_t uint8_t
@@ -64,232 +55,241 @@ extern int sprintD(char *s, const char *fmt, ...);
 #define USB_ALTSETTINGALLOC		4
 #define USB_MAXALTSETTING		128	/* Hard limit */

-#define USB_MAX_BUS           3
-#define USB_MAX_DEVICE       16
-#define USB_MAXCONFIG         8
-#define USB_MAXINTERFACES     8
-#define USB_MAXENDPOINTS     16
-#define USB_MAXCHILDREN       8	/* This is arbitrary */
-#define USB_MAX_HUB          16
+#define USB_MAX_BUS             3
+#define USB_MAX_DEVICE          16
+#define USB_MAXCONFIG           8
+#define USB_MAXINTERFACES       8
+#define USB_MAXENDPOINTS        16
+#define USB_MAXCHILDREN         8	/* This is arbitrary */
+#define USB_MAX_HUB             16

-#define USB_CNTL_TIMEOUT 100 /* 100ms timeout */
+#define USB_CNTL_TIMEOUT 100    /* 100 ms timeout */
+
+#define USB_BUFSIZ	512

 /* String descriptor */
-struct usb_string_descriptor {
-	uint8_t	bLength;
-	uint8_t	bDescriptorType;
-	uint16_t	wData[1];
+struct usb_string_descriptor
+{
+    uint8_t	bLength;
+    uint8_t	bDescriptorType;
+    uint16_t	wData[1];
 } __attribute__ ((packed));

 /* device request (setup) */
-struct devrequest {
-	uint8_t	requesttype;
-	uint8_t	request;
-	uint16_t	value;
-	uint16_t	index;
-	uint16_t	length;
+struct devrequest
+{
+    uint8_t	requesttype;
+    uint8_t	request;
+    uint16_t	value;
+    uint16_t	index;
+    uint16_t	length;
 } __attribute__ ((packed));

 /* All standard descriptors have these 2 fields in common */
-struct usb_descriptor_header {
-	uint8_t	bLength;
-	uint8_t	bDescriptorType;
+struct usb_descriptor_header
+{
+    uint8_t	bLength;
+    uint8_t	bDescriptorType;
 } __attribute__ ((packed));

 /* Device descriptor */
-struct usb_device_descriptor {
-	uint8_t	bLength;
-	uint8_t	bDescriptorType;
-	uint16_t	bcdUSB;
-	uint8_t	bDeviceClass;
-	uint8_t	bDeviceSubClass;
-	uint8_t	bDeviceProtocol;
-	uint8_t	bMaxPacketSize0;
-	uint16_t	idVendor;
-	uint16_t	idProduct;
-	uint16_t	bcdDevice;
-	uint8_t	iManufacturer;
-	uint8_t	iProduct;
-	uint8_t	iSerialNumber;
-	uint8_t	bNumConfigurations;
+struct usb_device_descriptor
+{
+    uint8_t	bLength;
+    uint8_t	bDescriptorType;
+    uint16_t bcdUSB;
+    uint8_t	bDeviceClass;
+    uint8_t	bDeviceSubClass;
+    uint8_t	bDeviceProtocol;
+    uint8_t	bMaxPacketSize0;
+    uint16_t idVendor;
+    uint16_t idProduct;
+    uint16_t bcdDevice;
+    uint8_t	iManufacturer;
+    uint8_t	iProduct;
+    uint8_t	iSerialNumber;
+    uint8_t	bNumConfigurations;
 } __attribute__ ((packed));

 /* Endpoint descriptor */
-struct usb_endpoint_descriptor {
-	uint8_t	bLength;
-	uint8_t	bDescriptorType;
-	uint8_t	bEndpointAddress;
-	uint8_t	bmAttributes;
-	uint16_t	wMaxPacketSize;
-	uint8_t	bInterval;
-	uint8_t	bRefresh;
-	uint8_t	bSynchAddress;
+struct usb_endpoint_descriptor
+{
+    uint8_t	bLength;
+    uint8_t	bDescriptorType;
+    uint8_t	bEndpointAddress;
+    uint8_t	bmAttributes;
+    uint16_t wMaxPacketSize;
+    uint8_t	bInterval;
+    uint8_t	bRefresh;
+    uint8_t	bSynchAddress;
 } __attribute__ ((packed)) __attribute__ ((aligned(2)));

 /* Interface descriptor */
-struct usb_interface_descriptor {
-	uint8_t	bLength;
-	uint8_t	bDescriptorType;
-	uint8_t	bInterfaceNumber;
-	uint8_t	bAlternateSetting;
-	uint8_t	bNumEndpoints;
-	uint8_t	bInterfaceClass;
-	uint8_t	bInterfaceSubClass;
-	uint8_t	bInterfaceProtocol;
-	uint8_t	iInterface;
+struct usb_interface_descriptor
+{
+    uint8_t	bLength;
+    uint8_t	bDescriptorType;
+    uint8_t	bInterfaceNumber;
+    uint8_t	bAlternateSetting;
+    uint8_t	bNumEndpoints;
+    uint8_t	bInterfaceClass;
+    uint8_t	bInterfaceSubClass;
+    uint8_t	bInterfaceProtocol;
+    uint8_t	iInterface;

-	uint8_t	no_of_ep;
-	uint8_t	num_altsetting;
-	uint8_t	act_altsetting;
+    uint8_t	no_of_ep;
+    uint8_t	num_altsetting;
+    uint8_t	act_altsetting;

-	struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
+    struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
 } __attribute__ ((packed));


 /* Configuration descriptor information.. */
-struct usb_config_descriptor {
-	uint8_t	bLength;
-	uint8_t	bDescriptorType;
-	uint16_t	wTotalLength;
-	uint8_t	bNumInterfaces;
-	uint8_t	bConfigurationValue;
-	uint8_t	iConfiguration;
-	uint8_t	bmAttributes;
-	uint8_t	MaxPower;
+struct usb_config_descriptor
+{
+    uint8_t	bLength;
+    uint8_t	bDescriptorType;
+    uint16_t	wTotalLength;
+    uint8_t	bNumInterfaces;
+    uint8_t	bConfigurationValue;
+    uint8_t	iConfiguration;
+    uint8_t	bmAttributes;
+    uint8_t	MaxPower;

-	uint8_t	no_of_if;	/* number of interfaces */
-	struct usb_interface_descriptor if_desc[USB_MAXINTERFACES];
+    uint8_t	no_of_if;	/* number of interfaces */
+    struct usb_interface_descriptor if_desc[USB_MAXINTERFACES];
 } __attribute__ ((packed));

-enum {
-	/* Maximum packet size; encoded as 0,1,2,3 = 8,16,32,64 */
-	PACKET_SIZE_8   = 0,
-	PACKET_SIZE_16  = 1,
-	PACKET_SIZE_32  = 2,
-	PACKET_SIZE_64  = 3,
+enum
+{
+    /* Maximum packet size; encoded as 0,1,2,3 = 8,16,32,64 */
+    PACKET_SIZE_8   = 0,
+    PACKET_SIZE_16  = 1,
+    PACKET_SIZE_32  = 2,
+    PACKET_SIZE_64  = 3,
 };

-struct usb_device {
-	int	devnum;			/* Device number on USB bus */
-	int	speed;			/* full/low/high */
-	char mf[32];			/* manufacturer */
-	char prod[32];		/* product */
-	char serial[32];		/* serial number */
+struct usb_device
+{
+    int	devnum;             /* Device number on USB bus */
+    int	speed;              /* full/low/high */
+    char mf[32];			/* manufacturer */
+    char prod[32];          /* product */
+    char serial[32];		/* serial number */

-	/* Maximum packet size; one of: PACKET_SIZE_* */
-	int maxpacketsize;
-	/* one bit for each endpoint ([0] = IN, [1] = OUT) */
-	unsigned int toggle[2];
-	/* endpoint halts; one bit per endpoint # & direction;
-	 * [0] = IN, [1] = OUT
-	 */
-	unsigned int halted[2];
-	int epmaxpacketin[16];		/* INput endpoint specific maximums */
-	int epmaxpacketout[16];		/* OUTput endpoint specific maximums */
+    /* Maximum packet size; one of: PACKET_SIZE_* */
+    int maxpacketsize;

-	int configno;			/* selected config number */
-	struct usb_device_descriptor descriptor; /* Device Descriptor */
-	struct usb_config_descriptor config; /* config descriptor */
+    /* one bit for each endpoint ([0] = IN, [1] = OUT) */
+    unsigned int toggle[2];

-	int have_langid;		/* whether string_langid is valid yet */
-	int string_langid;		/* language ID for strings */
-	int (*irq_handle)(struct usb_device *dev);
-	uint32_t irq_status;
-	int irq_act_len;		/* transfered bytes */
-	void *privptr;
-	/*
-	 * Child devices -  if this is a hub device
-	 * Each instance needs its own set of data structures.
-	 */
-	uint32_t status;
-	int act_len;			/* transfered bytes */
-	int maxchild;			/* Number of ports if hub */
-	int portnr;
-	struct usb_device *parent;
-	struct usb_device *children[USB_MAXCHILDREN];
-	void *priv_hcd;
-	int (*deregister)(struct usb_device *dev);
+    /* endpoint halts; one bit per endpoint # & direction;
+     * [0] = IN, [1] = OUT
+     */
+    unsigned int halted[2];
+    int epmaxpacketin[16];		/* INput endpoint specific maximums */
+    int epmaxpacketout[16];		/* OUTput endpoint specific maximums */

-	struct usb_hub_device *hub;
-	int usbnum;
+    int configno;               /* selected config number */
+    struct usb_device_descriptor descriptor;    /* Device Descriptor */
+    struct usb_config_descriptor config;        /* config descriptor */
+
+    int have_langid;            /* whether string_langid is valid yet */
+    int string_langid;          /* language ID for strings */
+    int (*irq_handle)(struct usb_device *dev);
+    uint32_t irq_status;
+    int irq_act_len;            /* transfered bytes */
+    void *privptr;
+
+    /*
+     * Child devices -  if this is a hub device
+     * Each instance needs its own set of data structures.
+     */
+    uint32_t status;
+    int act_len;			/* transfered bytes */
+    int maxchild;			/* Number of ports if hub */
+    int portnr;
+    struct usb_device *parent;
+    struct usb_device *children[USB_MAXCHILDREN];
+    void *priv_hcd;
+    int (*deregister)(struct usb_device *dev);
+
+    struct usb_hub_device *hub;
+    int usbnum;
 };

 typedef struct
 {
-	long ident;
-	union
-	{
-		long l;
-		short i[2];
-		char c[4];
-	} v;
+    long ident;
+    union
+    {
+        long l;
+        short i[2];
+        char c[4];
+    } v;
 } USB_COOKIE;

-/**********************************************************************
+/*
 * this is how the lowlevel part communicate with the outer world
 */

-int ohci_usb_lowlevel_init(int32_t handle, const struct pci_device_id *ent, void **priv);
-int ohci_usb_lowlevel_stop(void *priv);
-int ohci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
-int ohci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
-int ohci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
-void ohci_usb_enable_interrupt(int enable);
+extern int ohci_usb_lowlevel_init(int32_t handle, const struct pci_device_id *ent, void **priv);
+extern int ohci_usb_lowlevel_stop(void *priv);
+extern int ohci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
+extern int ohci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
+extern int ohci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
+extern void ohci_usb_enable_interrupt(int enable);

-int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv);
-int ehci_usb_lowlevel_stop(void *priv);
-int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
-int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
-int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
-void ehci_usb_enable_interrupt(int enable);
+extern int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv);
+extern int ehci_usb_lowlevel_stop(void *priv);
+extern int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
+extern int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
+extern int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
+extern void ehci_usb_enable_interrupt(int enable);

-void usb_enable_interrupt(int enable);
+extern void usb_enable_interrupt(int enable);
+
+extern int usb_new_device(struct usb_device *dev);
+extern struct usb_device *usb_alloc_new_device(int bus_index, void *priv);
+extern void usb_disconnect(struct usb_device **pdev);

 #define USB_MAX_STOR_DEV 5
-block_dev_desc_t *usb_stor_get_dev(int index);
-int usb_stor_scan(void);
-int usb_stor_info(void);
-int usb_stor_register(struct usb_device *dev);
-int usb_stor_deregister(struct usb_device *dev);

-int drv_usb_kbd_init(void);
-int usb_kbd_register(struct usb_device *dev);
-int usb_kbd_deregister(struct usb_device *dev);
+extern block_dev_desc_t *usb_stor_get_dev(int index);
+extern int usb_stor_scan(void);
+extern int usb_stor_info(void);
+extern int usb_stor_register(struct usb_device *dev);
+extern int usb_stor_deregister(struct usb_device *dev);

-int drv_usb_mouse_init(void);
-int usb_mouse_register(struct usb_device *dev);
-int usb_mouse_deregister(struct usb_device *dev);
+extern int drv_usb_kbd_init(void);
+extern int usb_kbd_register(struct usb_device *dev);
+extern int usb_kbd_deregister(struct usb_device *dev);

-extern char usb_error_str[256];
-
-/* memory */
-void *usb_malloc(long amount);
-int usb_free(void *addr);
-int usb_mem_init(void);
-void usb_mem_stop(void);
+extern int drv_usb_mouse_init(void);
+extern int usb_mouse_register(struct usb_device *dev);
+extern int usb_mouse_deregister(struct usb_device *dev);

 /* routines */
-USB_COOKIE *usb_get_cookie(long id);
-void usb_error_msg(const char *const fmt, ... );
-int usb_init(int32_t handle, const struct pci_device_id *ent); /* initialize the USB Controller */
-int usb_stop(void); /* stop the USB Controller */
+extern int usb_init(int32_t handle, const struct pci_device_id *ent); /* initialize the USB Controller */
+extern int usb_stop(void); /* stop the USB Controller */

-int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol);
-int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id);
-struct usb_device *usb_get_dev_index(int index, int bus);
-int usb_control_msg(struct usb_device *dev, unsigned int pipe, uint8_t request, uint8_t requesttype, uint16_t value, 
- uint16_t index, void *data, uint16_t size, int timeout);
-int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout);
-int usb_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
-void usb_disable_asynch(int disable);
-int usb_maxpacket(struct usb_device *dev, uint32_t pipe);
-void wait_ms(uint32_t ms);
-int usb_get_configuration_no(struct usb_device *dev, uint8_t *buffer, int cfgno);
-int usb_get_report(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
-int usb_get_class_descriptor(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
-int usb_clear_halt(struct usb_device *dev, int pipe);
-int usb_string(struct usb_device *dev, int index, char *buf, size_t size);
-int usb_set_interface(struct usb_device *dev, int interface, int alternate);
+extern int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol);
+extern int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id);
+extern struct usb_device *usb_get_dev_index(int index, int bus);
+extern int usb_control_msg(struct usb_device *dev, unsigned int pipe, uint8_t request, uint8_t requesttype,
+                           uint16_t value, uint16_t index, void *data, uint16_t size, int timeout);
+extern int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout);
+extern int usb_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
+extern void usb_disable_asynch(int disable);
+extern int usb_maxpacket(struct usb_device *dev, uint32_t pipe);
+
+extern int usb_get_configuration_no(struct usb_device *dev, uint8_t *buffer, int cfgno);
+extern int usb_get_report(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
+extern int usb_get_class_descriptor(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
+extern int usb_clear_halt(struct usb_device *dev, int pipe);
+extern int usb_string(struct usb_device *dev, int index, char *buf, size_t size);
+extern int usb_set_interface(struct usb_device *dev, int interface, int alternate);

 /*
 * Calling this entity a "pipe" is glorifying it. A USB pipe
@@ -325,44 +325,45 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
 * specification, so that much of the uhci driver can just mask the bits
 * appropriately.
 */
+
 /* Create various pipes... */
-#define create_pipe(dev,endpoint) \
-		(((dev)->devnum << 8) | (endpoint << 15) | \
-		((dev)->speed << 26) | (dev)->maxpacketsize)
+#define create_pipe(dev, endpoint) \
+        (((dev)->devnum << 8) | (endpoint << 15) | \
+        ((dev)->speed << 26) | (dev)->maxpacketsize)
 #define default_pipe(dev) ((dev)->speed << 26)

 #define usb_sndctrlpipe(dev, endpoint)	((PIPE_CONTROL << 30) | \
-					 create_pipe(dev, endpoint))
+                     create_pipe(dev, endpoint))
 #define usb_rcvctrlpipe(dev, endpoint)	((PIPE_CONTROL << 30) | \
-					 create_pipe(dev, endpoint) | \
-					 USB_DIR_IN)
+                     create_pipe(dev, endpoint) | \
+                     USB_DIR_IN)
 #define usb_sndisocpipe(dev, endpoint)	((PIPE_ISOCHRONOUS << 30) | \
-					 create_pipe(dev, endpoint))
+                     create_pipe(dev, endpoint))
 #define usb_rcvisocpipe(dev, endpoint)	((PIPE_ISOCHRONOUS << 30) | \
-					 create_pipe(dev, endpoint) | \
-					 USB_DIR_IN)
+                     create_pipe(dev, endpoint) | \
+                     USB_DIR_IN)
 #define usb_sndbulkpipe(dev, endpoint)	((PIPE_BULK << 30) | \
-					 create_pipe(dev, endpoint))
+                     create_pipe(dev, endpoint))
 #define usb_rcvbulkpipe(dev, endpoint)	((PIPE_BULK << 30) | \
-					 create_pipe(dev, endpoint) | \
-					 USB_DIR_IN)
+                     create_pipe(dev, endpoint) | \
+                     USB_DIR_IN)
 #define usb_sndintpipe(dev, endpoint)	((PIPE_INTERRUPT << 30) | \
-					 create_pipe(dev, endpoint))
+                     create_pipe(dev, endpoint))
 #define usb_rcvintpipe(dev, endpoint)	((PIPE_INTERRUPT << 30) | \
-					 create_pipe(dev, endpoint) | \
-					 USB_DIR_IN)
+                     create_pipe(dev, endpoint) | \
+                     USB_DIR_IN)
 #define usb_snddefctrl(dev)		((PIPE_CONTROL << 30) | \
-					 default_pipe(dev))
+                     default_pipe(dev))
 #define usb_rcvdefctrl(dev)		((PIPE_CONTROL << 30) | \
-					 default_pipe(dev) | \
-					 USB_DIR_IN)
+                     default_pipe(dev) | \
+                     USB_DIR_IN)

 /* The D0/D1 toggle bits */
 #define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> ep) & 1)
 #define usb_dotoggle(dev, ep, out)  ((dev)->toggle[out] ^= (1 << ep))
 #define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = \
-						((dev)->toggle[out] & \
-						 ~(1 << ep)) | ((bit) << ep))
+                        ((dev)->toggle[out] & \
+                         ~(1 << ep)) | ((bit) << ep))

 /* Endpoint halt control/status */
 #define usb_endpoint_out(ep_dir)	(((ep_dir >> 7) & 1) ^ 1)
@@ -371,7 +372,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
 #define usb_endpoint_halted(dev, ep, out) ((dev)->halted[out] & (1 << (ep)))

 #define usb_packetid(pipe)	(((pipe) & USB_DIR_IN) ? USB_PID_IN : \
-				 USB_PID_OUT)
+                 USB_PID_OUT)

 #define usb_pipeout(pipe)	((((pipe) >> 7) & 1) ^ 1)
 #define usb_pipein(pipe)	(((pipe) >> 7) & 1)
@@ -391,35 +392,39 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
 /*************************************************************************
 * Hub Stuff
 */
-struct usb_port_status {
-	uint16_t wPortStatus;
-	uint16_t wPortChange;
+struct usb_port_status
+{
+    uint16_t wPortStatus;
+    uint16_t wPortChange;
 } __attribute__ ((packed));

-struct usb_hub_status {
-	uint16_t wHubStatus;
-	uint16_t wHubChange;
+struct usb_hub_status
+{
+    uint16_t wHubStatus;
+    uint16_t wHubChange;
 } __attribute__ ((packed));


 /* Hub descriptor */
-struct usb_hub_descriptor {
-	uint8_t  bLength;
-	uint8_t  bDescriptorType;
-	uint8_t  bNbrPorts;
-	uint16_t wHubCharacteristics;
-	uint8_t  bPwrOn2PwrGood;
-	uint8_t  bHubContrCurrent;
-	uint8_t  DeviceRemovable[(USB_MAXCHILDREN+1+7)/8];
-	uint8_t  PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
-	/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
-	   bitmaps that hold max 255 entries. (bit0 is ignored) */
+struct usb_hub_descriptor
+{
+    uint8_t  bLength;
+    uint8_t  bDescriptorType;
+    uint8_t  bNbrPorts;
+    uint16_t wHubCharacteristics;
+    uint8_t  bPwrOn2PwrGood;
+    uint8_t  bHubContrCurrent;
+    uint8_t  DeviceRemovable[(USB_MAXCHILDREN+1+7)/8];
+    uint8_t  PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
+    /* DeviceRemovable and PortPwrCtrlMask want to be variable-length
+       bitmaps that hold max 255 entries. (bit0 is ignored) */
 } __attribute__ ((packed));


-struct usb_hub_device {
-	struct usb_device *pusb_dev;
-	struct usb_hub_descriptor desc;
+struct usb_hub_device
+{
+    struct usb_device *pusb_dev;
+    struct usb_hub_descriptor desc;
 };

 #endif /*_USB_H_ */
--- a/include/usb_hub.h
+++ b/include/usb_hub.h
@@ -0,0 +1,10 @@
+#ifndef USB_HUB_H
+#define USB_HUB_H
+
+extern int bus_index;
+
+extern void usb_hub_reset(int bus_index);
+extern int usb_hub_probe(struct usb_device *dev, int ifnum);
+extern int hub_port_reset(struct usb_device *dev, int port, unsigned short *portstat);
+
+#endif // USB_HUB_H
--- a/include/util.h
+++ b/include/util.h
@@ -25,7 +25,7 @@
 #ifndef UTIL_H_
 #define UTIL_H_

-#include <stdint.h>
+#include <bas_types.h>

 #define NOP() __asm__ __volatile__("nop\n\t" : : : "memory")

@@ -59,7 +59,7 @@ static inline uint32_t swpl(uint32_t l)
 	register uint32_t result asm("d0");

 	__asm__ __volatile__
-	(						
+	(
 		"lea		%[input],a0\n\t"				\
 		"mvz.b	3(a0),%[output]\n\t"			\
 		"lsl.l	#8,%[output]\n\t"				\
@@ -74,7 +74,7 @@ static inline uint32_t swpl(uint32_t l)
 	);
 	return result;
 }
-	
+

 /*
 * WORD swpw2(ULONG val);
@@ -85,17 +85,17 @@ static inline uint32_t swpl(uint32_t l)
 #define swpw2(a)                          \
  __extension__                           \
  ({unsigned long _tmp;                   \
-    __asm__ __volatile__                  \
-    ("move.b  (%1),%0\n\t"                \
-     "move.b  1(%1),(%1)\n\t"             \
-     "move.b  %0,1(%1)\n\t"               \
-     "move.b  2(%1),%0\n\t"               \
-     "move.b  3(%1),2(%1)\n\t"            \
-     "move.b  %0,3(%1)"                   \
-    : "=d"(_tmp)     /* outputs */        \
-    : "a"(&a)        /* inputs  */        \
-    : "cc", "memory" /* clobbered */      \
-    );                                    \
+	__asm__ __volatile__                  \
+	("move.b  (%1),%0\n\t"                \
+	 "move.b  1(%1),(%1)\n\t"             \
+	 "move.b  %0,1(%1)\n\t"               \
+	 "move.b  2(%1),%0\n\t"               \
+	 "move.b  3(%1),2(%1)\n\t"            \
+	 "move.b  %0,3(%1)"                   \
+	: "=d"(_tmp)     /* outputs */        \
+	: "a"(&a)        /* inputs  */        \
+	: "cc", "memory" /* clobbered */      \
+	);                                    \
  })

 /*
@@ -144,10 +144,10 @@ __extension__                             \
 #define regsafe_call(addr)                         \
 __extension__                                      \
 ({__asm__ volatile ("lea     -60(sp),sp\n\t"       \
-                    "movem.l d0-d7/a0-a6,(sp)");   \
-  ((void (*)(void))addr)();                        \
+					"movem.l d0-d7/a0-a6,(sp)");   \
+  ((void (*) (void)) addr)();                      \
  __asm__ volatile ("movem.l (sp),d0-d7/a0-a6\n\t" \
-                    "lea     60(sp),sp");          \
+					"lea     60(sp),sp");          \
 })


--- a/include/version.h
+++ b/include/version.h
@@ -29,7 +29,7 @@
 */

 #define MAJOR_VERSION	0
-#define MINOR_VERSION	83
+#define MINOR_VERSION	87


 #endif /* VERSION_H_ */
--- a/include/video.h
+++ b/include/video.h
@@ -1,9 +1,7 @@
 #ifndef _VIDEO_H_
 #define _VIDEO_H_

-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
+#include <bas_types.h>
 #include "bas_printf.h"

 extern void video_init(void);
--- a/include/wait.h
+++ b/include/wait.h
@@ -29,55 +29,30 @@

 #include <bas_types.h>

-#if MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
 #include "firebee.h"
-#elif MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
+#else
+#error "unknown machine"
 #endif /* MACHINE_FIREBEE */

 #include "MCF5475.h"

 typedef bool (*checker_func)(void);

-extern __inline__ void wait(uint32_t) __attribute__((always_inline));
-extern __inline__ bool waitfor(uint32_t us, checker_func condition) __attribute__((always_inline));
+extern void wait(uint32_t);
+extern void wait_us(uint32_t);  /* this is just an alias to the above */

-extern __inline__ uint32_t get_timer(void)
+inline static void udelay(long us)
 {
-	return MCF_SLT_SCNT(0);
-}
-/*
- * wait for the specified number of us on slice timer 0. Replaces the original routines that had
- * the number of useconds to wait for hardcoded in their name.
- */
-extern __inline__ void wait(uint32_t us)
-{
-	int32_t target = MCF_SLT_SCNT(0) - (us * (SYSCLK / 1000));
-
-	while (MCF_SLT_SCNT(0) - target > 0);
+    wait((uint32_t) us);
 }

-/*
- * same as above, but with milliseconds wait time
- */
-extern __inline__ void wait_ms(uint32_t ms)
-{
-	wait(ms * 1000);
-}
-/*
- * the same as above, with a checker function which gets called while
- * busy waiting and allows for an early return if it returns true
- */
-extern __inline__ bool waitfor(uint32_t us, checker_func condition)
-{
-	int32_t target = MCF_SLT_SCNT(0) - (us * (SYSCLK / 1000));
-	bool res;
+extern bool waitfor(uint32_t us, checker_func condition);
+extern uint32_t get_timer(void);
+extern void wait_ms(uint32_t ms);

-	do
-	{
-		if ((res = (*condition)()))
-			return res;
-	} while (MCF_SLT_SCNT(0) - target > 0);
-	return false;
-}
 #endif /* _WAIT_H_ */
--- a/include/x86debug.h
+++ b/include/x86debug.h
@@ -37,7 +37,7 @@
 ****************************************************************************/
 /* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/debug.h,v 1.4 2000/11/21 23:10:27 tsi Exp $ */

-#include <stdint.h>
+#include <bas_types.h>
 #include "bas_printf.h"

 /*
@@ -135,7 +135,7 @@

 #define SAVE_IP_CS(x,y)                               			\
 	if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \
-              | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
+			  | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
 		M.x86.saved_cs = x;                          			\
 		M.x86.saved_ip = y;                          			\
 	}
--- a/include/xhdi_sd.h
+++ b/include/xhdi_sd.h
@@ -85,7 +85,7 @@ typedef struct _BPB
 /* a riddle: how do you typedef a function pointer to a function that returns its own type? ;) */
 typedef void* (*xhdi_call_fun)(int xhdi_fun, ...);

-extern unsigned long xhdi_call(uint16_t *stack);
+extern uint32_t xhdi_call(uint16_t *stack);

 extern xhdi_call_fun xhdi_sd_install(xhdi_call_fun old_vector) __attribute__((__interrupt__));

--- a/kbd/ikbd.c
+++ b/kbd/ikbd.c
@@ -18,7 +18,7 @@

 */

-#include <stdint.h>
+#include <bas_types.h>
 #include "bas_printf.h"
 #include "bas_string.h"

@@ -40,276 +40,300 @@ static unsigned char tx_queue[QUEUE_LEN];
 static unsigned char wptr = 0, rptr = 0;

 // structure to keep track of ikbd state
-static struct {
-  unsigned char cmd;
-  unsigned char state;
-  unsigned char expect;
+static struct
+{
+	unsigned char cmd;
+	unsigned char state;
+	unsigned char expect;

-  // joystick state
-  unsigned char joystick[2];
+	// joystick state
+	unsigned char joystick[2];

-  // mouse state
-  unsigned short mouse_pos_x, mouse_pos_y;
-  unsigned char mouse_buttons;
+	// mouse state
+	unsigned short mouse_pos_x, mouse_pos_y;
+	unsigned char mouse_buttons;
 } ikbd;

 // #define IKBD_DEBUG

-void ikbd_init() {
-  // reset ikbd state
-  memset(&ikbd, 0, sizeof(ikbd));
-  ikbd.state = IKBD_DEFAULT;
+void ikbd_init()
+{
+	// reset ikbd state
+	memset(&ikbd, 0, sizeof(ikbd));
+	ikbd.state = IKBD_DEFAULT;
 }

-static void enqueue(unsigned char b) {
-  if(((wptr + 1)&(QUEUE_LEN-1)) == rptr) {
-    xprintf("IKBD: !!!!!!! tx queue overflow !!!!!!!!!\n");
-    return;
-  }
+static void enqueue(unsigned char b)
+{
+	if (((wptr + 1)&(QUEUE_LEN-1)) == rptr)
+	{
+		xprintf("IKBD: !!!!!!! tx queue overflow !!!!!!!!!\n");
+		return;
+	}

-  tx_queue[wptr] = b;
-  wptr = (wptr+1)&(QUEUE_LEN-1);
+	tx_queue[wptr] = b;
+	wptr = (wptr + 1) & (QUEUE_LEN - 1);
 }

 // convert internal joystick format into atari ikbd format
-static unsigned char joystick_map2ikbd(unsigned in) {
-  unsigned char out = 0;
+static unsigned char joystick_map2ikbd(unsigned in)
+{
+	unsigned char out = 0;

-  if(in & JOY_UP)    out |= 0x01;
-  if(in & JOY_DOWN)  out |= 0x02;
-  if(in & JOY_LEFT)  out |= 0x04;
-  if(in & JOY_RIGHT) out |= 0x08;
-  if(in & JOY_BTN1)  out |= 0x80;
+	if (in & JOY_UP)    out |= 0x01;
+	if (in & JOY_DOWN)  out |= 0x02;
+	if (in & JOY_LEFT)  out |= 0x04;
+	if (in & JOY_RIGHT) out |= 0x08;
+	if (in & JOY_BTN1)  out |= 0x80;

-  return out;
+	return out;
 }

 // process inout from atari core into ikbd
-void ikbd_handle_input(unsigned char cmd) {
-  // expecting a second byte for command
-  if(ikbd.expect) {
-    ikbd.expect--;
+void ikbd_handle_input(unsigned char cmd)
+{
+	// expecting a second byte for command
+	if (ikbd.expect)
+	{
+		ikbd.expect--;

-    // last byte of command received
-    if(!ikbd.expect) {
-      switch(ikbd.cmd) {
-      case 0x07: // set mouse button action
-        xprintf("IKBD: mouse button action = %x\n", cmd);
+		// last byte of command received
+		if (!ikbd.expect)
+		{
+			switch(ikbd.cmd)
+			{
+				case 0x07: // set mouse button action
+					xprintf("IKBD: mouse button action = %x\n", cmd);

-        // bit 2: Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
-        if(cmd & 0x04) ikbd.state |=  IKBD_STATE_MOUSE_BUTTON_AS_KEY;
-        else           ikbd.state &= ~IKBD_STATE_MOUSE_BUTTON_AS_KEY;
+					// bit 2: Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
+					if(cmd & 0x04) ikbd.state |=  IKBD_STATE_MOUSE_BUTTON_AS_KEY;
+					else           ikbd.state &= ~IKBD_STATE_MOUSE_BUTTON_AS_KEY;

-        break;
+					break;

-      case 0x80: // ibkd reset
-        // reply "everything is ok"
-        enqueue(0xf0);
-        break;
+				case 0x80: // ibkd reset
+					// reply "everything is ok"
+					enqueue(0xf0);
+					break;

-      default:
-        break;
-      }
-    }
+				default:
+					break;
+			}
+		}

-    return;
-  }
+		return;
+	}

-  ikbd.cmd = cmd;
+	ikbd.cmd = cmd;

-  switch(cmd) {
-  case 0x07:
-    xprintf("IKBD: Set mouse button action");
-    ikbd.expect = 1;
-    break;
+	switch(cmd)
+	{
+		case 0x07:
+			xprintf("IKBD: Set mouse button action");
+			ikbd.expect = 1;
+			break;

-  case 0x08:
-    xprintf("IKBD: Set relative mouse positioning");
-    ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
-    ikbd.state &= ~IKBD_STATE_MOUSE_ABSOLUTE;
-    break;
+		case 0x08:
+			xprintf("IKBD: Set relative mouse positioning");
+			ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
+			ikbd.state &= ~IKBD_STATE_MOUSE_ABSOLUTE;
+			break;

-  case 0x09:
-    xprintf("IKBD: Set absolute mouse positioning");
-    ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
-    ikbd.state |=  IKBD_STATE_MOUSE_ABSOLUTE;
-    ikbd.expect = 4;
-    break;
+		case 0x09:
+			xprintf("IKBD: Set absolute mouse positioning");
+			ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
+			ikbd.state |=  IKBD_STATE_MOUSE_ABSOLUTE;
+			ikbd.expect = 4;
+			break;

-  case 0x0b:
-    xprintf("IKBD: Set Mouse threshold");
-    ikbd.expect = 2;
-    break;
+		case 0x0b:
+			xprintf("IKBD: Set Mouse threshold");
+			ikbd.expect = 2;
+			break;

-  case 0x0f:
-    xprintf("IKBD: Set Y at bottom");
-    ikbd.state |= IKBD_STATE_MOUSE_Y_BOTTOM;
-    break;
+		case 0x0f:
+			xprintf("IKBD: Set Y at bottom");
+			ikbd.state |= IKBD_STATE_MOUSE_Y_BOTTOM;
+			break;

-  case 0x10:
-    xprintf("IKBD: Set Y at top");
-    ikbd.state &= ~IKBD_STATE_MOUSE_Y_BOTTOM;
-    break;
+		case 0x10:
+			xprintf("IKBD: Set Y at top");
+			ikbd.state &= ~IKBD_STATE_MOUSE_Y_BOTTOM;
+			break;

-  case 0x12:
-    xprintf("IKBD: Disable mouse");
-    ikbd.state |= IKBD_STATE_MOUSE_DISABLED;
-    break;
+		case 0x12:
+			xprintf("IKBD: Disable mouse");
+			ikbd.state |= IKBD_STATE_MOUSE_DISABLED;
+			break;

-  case 0x14:
-    xprintf("IKBD: Set Joystick event reporting");
-    ikbd.state |= IKBD_STATE_JOYSTICK_EVENT_REPORTING;
-    break;
+		case 0x14:
+			xprintf("IKBD: Set Joystick event reporting");
+			ikbd.state |= IKBD_STATE_JOYSTICK_EVENT_REPORTING;
+			break;

-  case 0x15:
-    xprintf("IKBD: Set Joystick interrogation mode");
-    ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
-    break;
+		case 0x15:
+			xprintf("IKBD: Set Joystick interrogation mode");
+			ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
+			break;

-  case 0x16: // interrogate joystick
-    // send reply
-    enqueue(0xfd);
-    enqueue(joystick_map2ikbd(ikbd.joystick[0]));
-    enqueue(joystick_map2ikbd(ikbd.joystick[1]));
-    break;
+		case 0x16: // interrogate joystick
+			// send reply
+			enqueue(0xfd);
+			enqueue(joystick_map2ikbd(ikbd.joystick[0]));
+			enqueue(joystick_map2ikbd(ikbd.joystick[1]));
+			break;

-  case 0x1a:
-    xprintf("IKBD: Disable joysticks");
-    ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
-    break;
+		case 0x1a:
+			xprintf("IKBD: Disable joysticks");
+			ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
+			break;

-  case 0x1c:
-    xprintf("IKBD: Interrogate time of day");
+		case 0x1c:
+			xprintf("IKBD: Interrogate time of day");

-    enqueue(0xfc);
-    enqueue(0x13);  // year bcd
-    enqueue(0x03);  // month bcd
-    enqueue(0x07);  // day bcd
-    enqueue(0x20);  // hour bcd
-    enqueue(0x58);  // minute bcd
-    enqueue(0x00);  // second bcd
-    break;
-   
+			enqueue(0xfc);
+			enqueue(0x13);  // year bcd
+			enqueue(0x03);  // month bcd
+			enqueue(0x07);  // day bcd
+			enqueue(0x20);  // hour bcd
+			enqueue(0x58);  // minute bcd
+			enqueue(0x00);  // second bcd
+			break;

-  case 0x80:
-    xprintf("IKBD: Reset");
-    ikbd.expect = 1;
-    ikbd.state = IKBD_DEFAULT;
-    break;

-  default:
-    xprintf("IKBD: unknown command: %x\n", cmd);
-    break;
-  }
+		case 0x80:
+			xprintf("IKBD: Reset");
+			ikbd.expect = 1;
+			ikbd.state = IKBD_DEFAULT;
+			break;
+
+		default:
+			xprintf("IKBD: unknown command: %x\n", cmd);
+			break;
+	}
 }

 void ikbd_poll(void) {
-  static int mtimer = 0;
-  if(CheckTimer(mtimer)) {
-    mtimer = GetTimer(10);
-   
-    // check for incoming ikbd data
-    EnableIO();
-    SPI(UIO_IKBD_IN);
-   
-    while(SPI(0))
-      ikbd_handle_input(SPI(0));
-   
-    DisableIO();
-  }
+	static int mtimer = 0;
+	if (CheckTimer(mtimer))
+	{
+		mtimer = GetTimer(10);

-  // send data from queue if present
-  if(rptr == wptr) return;
-   
-  // transmit data from queue
-  EnableIO();
-  SPI(UIO_IKBD_OUT);
-  SPI(tx_queue[rptr]);
-  DisableIO();
- 
-  rptr = (rptr+1)&(QUEUE_LEN-1);  
+		// check for incoming ikbd data
+		EnableIO();
+		SPI(UIO_IKBD_IN);
+
+		while(SPI(0))
+			ikbd_handle_input(SPI(0));
+
+		DisableIO();
+	}
+
+	// send data from queue if present
+	if(rptr == wptr) return;
+
+	// transmit data from queue
+	EnableIO();
+	SPI(UIO_IKBD_OUT);
+	SPI(tx_queue[rptr]);
+	DisableIO();
+
+	rptr = (rptr + 1) & (QUEUE_LEN - 1);
 }

-void ikbd_joystick(unsigned char joystick, unsigned char map) {
-  // todo: suppress events for joystick 0 as long as mouse
-  // is enabled?
- 
-  if(ikbd.state & IKBD_STATE_JOYSTICK_EVENT_REPORTING) {
+void ikbd_joystick(unsigned char joystick, unsigned char map)
+{
+	// todo: suppress events for joystick 0 as long as mouse
+	// is enabled?
+
+	if (ikbd.state & IKBD_STATE_JOYSTICK_EVENT_REPORTING)
+	{
 #ifdef IKBD_DEBUG
-    xprintf("IKBD: joy %d %x\n", joystick, map);
+		xprintf("IKBD: joy %d %x\n", joystick, map);
 #endif

-    // only report joystick data for joystick 0 if the mouse is disabled
-    if((ikbd.state & IKBD_STATE_MOUSE_DISABLED) || (joystick == 1)) {    
-      enqueue(0xfe + joystick);
-      enqueue(joystick_map2ikbd(map));
-    }
-   
-    if(!(ikbd.state & IKBD_STATE_MOUSE_DISABLED)) {
-      // the fire button also generates a mouse event if
-      // mouse reporting is enabled
-      if((map & JOY_BTN1) != (ikbd.joystick[joystick] & JOY_BTN1)) {
-        // generate mouse event (ikbd_joystick_buttons is evaluated inside
-        // user_io_mouse)
-        ikbd.joystick[joystick] = map;
-        ikbd_mouse(0, 0, 0);
-      }
-    }
-  }
+		// only report joystick data for joystick 0 if the mouse is disabled
+		if ((ikbd.state & IKBD_STATE_MOUSE_DISABLED) || (joystick == 1))
+		{
+			enqueue(0xfe + joystick);
+			enqueue(joystick_map2ikbd(map));
+		}
+
+		if (!(ikbd.state & IKBD_STATE_MOUSE_DISABLED))
+		{
+			// the fire button also generates a mouse event if
+			// mouse reporting is enabled
+			if ((map & JOY_BTN1) != (ikbd.joystick[joystick] & JOY_BTN1))
+			{
+				// generate mouse event (ikbd_joystick_buttons is evaluated inside
+				// user_io_mouse)
+				ikbd.joystick[joystick] = map;
+				ikbd_mouse(0, 0, 0);
+			}
+		}
+	}
 #ifdef IKBD_DEBUG
-  else
-    xprintf("IKBD: no monitor, drop joy %d %x\n", joystick, map);
+	else
+		xprintf("IKBD: no monitor, drop joy %d %x\n", joystick, map);
 #endif
- 
-  // save state of joystick for interrogation mode
-  ikbd.joystick[joystick] = map;
+
+	// save state of joystick for interrogation mode
+	ikbd.joystick[joystick] = map;
 }

-void ikbd_keyboard(unsigned char code) {
+void ikbd_keyboard(unsigned char code)
+{
 #ifdef IKBD_DEBUG
-  xprintf("IKBD: send keycode %x%s\n", code&0x7f, (code&0x80)?" BREAK":"");
+	xprintf("IKBD: send keycode %x%s\n", code&0x7f, (code&0x80)?" BREAK":"");
 #endif
-  enqueue(code);
+	enqueue(code);
 }

-void ikbd_mouse(uint8_t b, int8_t x, int8_t y) {
-  if(ikbd.state & IKBD_STATE_MOUSE_DISABLED)
-    return;
+void ikbd_mouse(uint8_t b, int8_t x, int8_t y)
+{
+	if (ikbd.state & IKBD_STATE_MOUSE_DISABLED)
+		return;
+
+	// joystick and mouse buttons are wired together in
+	// atari st
+	b |= (ikbd.joystick[0] & JOY_BTN1)?1:0;
+	b |= (ikbd.joystick[1] & JOY_BTN1)?2:0;
+
+	static unsigned char b_old = 0;
+	// monitor state of two mouse buttons
+	if (b != b_old)
+	{
+		// check if mouse buttons are supposed to be treated like keys
+		if (ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY)
+		{
+			// Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
+
+			// handle left mouse button
+			if((b ^ b_old) & 1) ikbd_keyboard(0x74 | ((b&1)?0x00:0x80));
+			// handle right mouse button
+			if((b ^ b_old) & 2) ikbd_keyboard(0x75 | ((b&2)?0x00:0x80));
+		}
+		b_old = b;
+	}

-  // joystick and mouse buttons are wired together in
-  // atari st
-  b |= (ikbd.joystick[0] & JOY_BTN1)?1:0;
-  b |= (ikbd.joystick[1] & JOY_BTN1)?2:0;
- 
-  static unsigned char b_old = 0;
-  // monitor state of two mouse buttons
-  if(b != b_old) {
-    // check if mouse buttons are supposed to be treated like keys
-    if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY) {
-      // Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
-     
-      // handle left mouse button
-      if((b ^ b_old) & 1) ikbd_keyboard(0x74 | ((b&1)?0x00:0x80));
-      // handle right mouse button
-      if((b ^ b_old) & 2) ikbd_keyboard(0x75 | ((b&2)?0x00:0x80));
-    }
-    b_old = b;
-  }
- 
 #if 0
-  if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY) {
-    b = 0;
-    // if mouse position is 0/0 quit here
-    if(!x && !y) return;
-  }
+	if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY)
+	{
+		b = 0;
+		// if mouse position is 0/0 quit here
+		if(!x && !y) return;
+	}
 #endif

-  if(ikbd.state & IKBD_STATE_MOUSE_ABSOLUTE) {
-  } else {
-    // atari has mouse button bits swapped
-    enqueue(0xf8|((b&1)?2:0)|((b&2)?1:0));
-    enqueue(x);
-    enqueue((ikbd.state & IKBD_STATE_MOUSE_Y_BOTTOM)?-y:y);
-  }
+	if (ikbd.state & IKBD_STATE_MOUSE_ABSOLUTE)
+	{
+	}
+	else
+	{
+		// atari has mouse button bits swapped
+		enqueue(0xf8|((b&1)?2:0)|((b&2)?1:0));
+		enqueue(x);
+		enqueue((ikbd.state & IKBD_STATE_MOUSE_Y_BOTTOM)?-y:y);
+	}
 }

--- a/mcf5474.gdb
+++ b/mcf5474.gdb
@@ -5,7 +5,7 @@
 define addresses
 set $vbr   = 0x00000000
 #monitor bdm-ctl-set 0x0801 0x00000000
- 
+
 set $mbar  = 0xFF000000
 #monitor bdm-ctl-set 0x0C0F 0xFF000000

@@ -22,30 +22,30 @@ end

 define setup-dram
 # Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
-set *((long *) 0xFF000500) = 0xE0000000		
-set *((long *) 0xFF000508) = 0x00041180		
-set *((long *) 0xFF000504) = 0x007F0001		
+set *((long *) 0xFF000500) = 0xE0000000
+set *((long *) 0xFF000508) = 0x00041180
+set *((long *) 0xFF000504) = 0x007F0001

 # set *((long *) 0xFF00050C) = 0xFFF00000		# ATARI I/O address

 # SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
-set *((long *) 0xFF000004) = 0x000002AA		
-set *((long *) 0xFF000020) = 0x0000001A		
-set *((long *) 0xFF000024) = 0x0800001A		
-set *((long *) 0xFF000028) = 0x1000001A		
-set *((long *) 0xFF00002C) = 0x1800001A		
-set *((long *) 0xFF000108) = 0x73622830		
-set *((long *) 0xFF00010C) = 0x46770000		
+set *((long *) 0xFF000004) = 0x000002AA
+set *((long *) 0xFF000020) = 0x0000001A
+set *((long *) 0xFF000024) = 0x0800001A
+set *((long *) 0xFF000028) = 0x1000001A
+set *((long *) 0xFF00002C) = 0x1800001A
+set *((long *) 0xFF000108) = 0x73622830
+set *((long *) 0xFF00010C) = 0x46770000


-set *((long *) 0xFF000104) = 0xE10D0002		
-set *((long *) 0xFF000100) = 0x40010000		
-set *((long *) 0xFF000100) = 0x048D0000		
-set *((long *) 0xFF000104) = 0xE10D0002		
-set *((long *) 0xFF000104) = 0xE10D0004		
-set *((long *) 0xFF000104) = 0xE10D0004		
-set *((long *) 0xFF000100) = 0x008D0000		
-set *((long *) 0xFF000104) = 0x710D0F00		
+set *((long *) 0xFF000104) = 0xE10D0002
+set *((long *) 0xFF000100) = 0x40010000
+set *((long *) 0xFF000100) = 0x048D0000
+set *((long *) 0xFF000104) = 0xE10D0002
+set *((long *) 0xFF000104) = 0xE10D0004
+set *((long *) 0xFF000104) = 0xE10D0004
+set *((long *) 0xFF000100) = 0x008D0000
+set *((long *) 0xFF000104) = 0x710D0F00
 end

 define cu
@@ -61,6 +61,11 @@ define ib
 	setup-dram
 end

+define run
+	continue
+end
+
 tr
 ib
-load
+add-symbol-file ../emutos/emutos2.img 0xe00000
+load firebee/ram.elf
--- a/net/am79c874.c
+++ b/net/am79c874.c
@@ -13,8 +13,10 @@
 #include "firebee.h"
 #elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
 #else
-#error "unknown machine"
+#error "unknown machine!"
 #endif

 //#define DBG_AM79
@@ -24,7 +26,7 @@
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_AM79 */

-/********************************************************************/
+
 /* Initialize the AM79C874 PHY
 *
 * This function sets up the Auto-Negotiate Advertisement register
@@ -63,6 +65,7 @@ int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duple
 		if (!(settings & MII_AM79C874_CR_RESET))
 			break;
 	}
+
 	if (timeout >= FEC_MII_TIMEOUT)
 	{
 		dbg("%s: PHY reset failed\r\n", __FUNCTION__);
@@ -88,11 +91,14 @@ int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duple

 	if (timeout >= FEC_MII_TIMEOUT)
 	{
-		dbg("%s: PHY Set the default mode\r\n", __FUNCTION__);
+		dbg("%s: Auto-negotiation failed (timeout). Set default mode (100Mbps, full duplex)\r\n", __FUNCTION__);

 		/* Set the default mode (Full duplex, 100 Mbps) */
 		if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX))
+		{
+			dbg("%s: forced setting 100Mbps/full failed.\r\n", __FUNCTION__);
 			return 0;
+		}
 	}

 #ifdef DBG_AM79
--- a/net/arp.c
+++ b/net/arp.c
@@ -11,9 +11,9 @@
 #include <stdbool.h>
 #include <stddef.h>

-#define DBG_ARP
+//#define DBG_ARP
 #ifdef DBG_ARP
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_ARP */
@@ -22,459 +22,469 @@

 static uint8_t *arp_find_pair(ARP_INFO *arptab, uint16_t protocol, uint8_t *hwa, uint8_t *pa)
 {
-	/*
-	 * This function searches through the ARP table for the
-	 * specified <protocol,hwa> or <protocol,pa> address pair.
-	 * If it is found, then a a pointer to the non-specified
-	 * address is returned.  Otherwise NULL is returned.
-	 * If you pass in <protocol,pa> then you get <hwa> out.
-	 * If you pass in <protocol,hwa> then you get <pa> out.
-	 */
-	int slot, i, match = false;
-	uint8_t *rvalue;
+    /*
+     * This function searches through the ARP table for the
+     * specified <protocol,hwa> or <protocol,pa> address pair.
+     * If it is found, then a a pointer to the non-specified
+     * address is returned.  Otherwise NULL is returned.
+     * If you pass in <protocol,pa> then you get <hwa> out.
+     * If you pass in <protocol,hwa> then you get <pa> out.
+     */
+    int slot, i, match = false;
+    uint8_t *rvalue;

-	if (((hwa == 0) && (pa == 0)) || (arptab == 0))
-		return NULL;
+    if (((hwa == 0) && (pa == 0)) || (arptab == 0))
+        return NULL;

-	rvalue = NULL;
+    rvalue = NULL;

-	/* 
-	 * Check each protocol address for a match 
-	 */
-	for (slot = 0; slot < arptab->tab_size; slot++)
-	{
-		if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
-				(arptab->table[slot].protocol == protocol))
-		{
-			match = true;
-			if (hwa != 0)
-			{
-				/* 
-				 * Check the Hardware Address field 
-				 */
-				rvalue = &arptab->table[slot].pa[0];
-				for (i = 0; i < arptab->table[slot].hwa_size; i++)
-				{
-					if (arptab->table[slot].hwa[i] != hwa[i])
-					{
-						match = false;
-						break;
-					}
-				}
-			}
-			else
-			{
-				/* 
-				 * Check the Protocol Address field 
-				 */
-				rvalue = &arptab->table[slot].hwa[0];
-				for (i = 0; i < arptab->table[slot].pa_size; i++)
-				{
-					if (arptab->table[slot].pa[i] != pa[i])
-					{
-						match = false;
-						break;
-					}
-				}
-			}
-			if (match)
-			{
-				break;
-			}
-		}
-	}
+    /*
+     * Check each protocol address for a match
+     */
+    for (slot = 0; slot < arptab->tab_size; slot++)
+    {
+        if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
+                (arptab->table[slot].protocol == protocol))
+        {
+            match = true;
+            if (hwa != 0)
+            {
+                /*
+                 * Check the Hardware Address field
+                 */
+                rvalue = &arptab->table[slot].pa[0];
+                for (i = 0; i < arptab->table[slot].hwa_size; i++)
+                {
+                    if (arptab->table[slot].hwa[i] != hwa[i])
+                    {
+                        match = false;
+                        break;
+                    }
+                }
+            }
+            else
+            {
+                /*
+                 * Check the Protocol Address field
+                 */
+                rvalue = &arptab->table[slot].hwa[0];
+                for (i = 0; i < arptab->table[slot].pa_size; i++)
+                {
+                    if (arptab->table[slot].pa[i] != pa[i])
+                    {
+                        match = false;
+                        break;
+                    }
+                }
+            }
+            if (match)
+            {
+                break;
+            }
+        }
+    }

-	if (match)
-		return rvalue;
-	else
-		return NULL;
+    if (match)
+        return rvalue;
+    else
+        return NULL;
 }

 void arp_merge(ARP_INFO *arptab, uint16_t protocol, int hwa_size, uint8_t *hwa,
-		int pa_size, uint8_t *pa, int longevity)
+        int pa_size, uint8_t *pa, int longevity)
 {
-	/*
-	 * This function merges an entry into the ARP table.  If
-	 * either piece is NULL, the function exits, otherwise
-	 * the entry is merged or added, provided there is space.
-	 */
-	int i, slot;
-	uint8_t *ta;
+    /*
+     * This function merges an entry into the ARP table.  If
+     * either piece is NULL, the function exits, otherwise
+     * the entry is merged or added, provided there is space.
+     */
+    int i, slot;
+    uint8_t *ta;

-	if ((hwa == NULL) || (pa == NULL) || (arptab == NULL) ||
-			((longevity != ARP_ENTRY_TEMP) &&
-			 (longevity != ARP_ENTRY_PERM)))
-	{
-		return;
-	}
+    if ((hwa == NULL) || (pa == NULL) || (arptab == NULL) ||
+            ((longevity != ARP_ENTRY_TEMP) &&
+             (longevity != ARP_ENTRY_PERM)))
+    {
+        return;
+    }

-	/* First search ARP table for existing entry */
-	if ((ta = arp_find_pair(arptab,protocol,NULL,pa)) != 0)
-	{
-		/* Update hardware address */
-		for (i = 0; i < hwa_size; i++)
-			ta[i] = hwa[i];
-		return;
-	}
+    /* First search ARP table for existing entry */
+    if ((ta = arp_find_pair(arptab,protocol,NULL,pa)) != 0)
+    {
+        /* Update hardware address */
+        for (i = 0; i < hwa_size; i++)
+            ta[i] = hwa[i];
+        return;
+    }

-	/* Next try to find an empty slot */
-	slot = -1;
-	for (i = 0; i < MAX_ARP_ENTRY; i++)
-	{
-		if (arptab->table[i].longevity == ARP_ENTRY_EMPTY)
-		{
-			slot = i;
-			break;
-		}
-	}
+    /* Next try to find an empty slot */
+    slot = -1;
+    for (i = 0; i < MAX_ARP_ENTRY; i++)
+    {
+        if (arptab->table[i].longevity == ARP_ENTRY_EMPTY)
+        {
+            slot = i;
+            break;
+        }
+    }

-	/* if no empty slot was found, pick a temp slot */
-	if (slot == -1)
-	{
-		for (i = 0; i < MAX_ARP_ENTRY; i++)
-		{
-			if (arptab->table[i].longevity == ARP_ENTRY_TEMP)
-			{
-				slot = i;
-				break;
-			}
-		}
-	}
+    /* if no empty slot was found, pick a temp slot */
+    if (slot == -1)
+    {
+        for (i = 0; i < MAX_ARP_ENTRY; i++)
+        {
+            if (arptab->table[i].longevity == ARP_ENTRY_TEMP)
+            {
+                slot = i;
+                break;
+            }
+        }
+    }

-	/* if after all this, still no slot found, add in last slot */
-	if (slot == -1)
-		slot = (MAX_ARP_ENTRY - 1);
+    /* if after all this, still no slot found, add in last slot */
+    if (slot == -1)
+        slot = (MAX_ARP_ENTRY - 1);

-	/* add the entry into the slot */
-	arptab->table[slot].protocol = protocol;
+    /* add the entry into the slot */
+    arptab->table[slot].protocol = protocol;

-	arptab->table[slot].hwa_size = (uint8_t) hwa_size;
-	for (i = 0; i < hwa_size; i++)
-		arptab->table[slot].hwa[i] = hwa[i];
+    arptab->table[slot].hwa_size = (uint8_t) hwa_size;
+    for (i = 0; i < hwa_size; i++)
+        arptab->table[slot].hwa[i] = hwa[i];

-	arptab->table[slot].pa_size = (uint8_t) pa_size;
-	for (i = 0; i < pa_size; i++)
-		arptab->table[slot].pa[i] = pa[i];
+    arptab->table[slot].pa_size = (uint8_t) pa_size;
+    for (i = 0; i < pa_size; i++)
+        arptab->table[slot].pa[i] = pa[i];

-	arptab->table[slot].longevity = longevity;
+    arptab->table[slot].longevity = longevity;
 }


 void arp_remove(ARP_INFO *arptab, uint16_t protocol, uint8_t *hwa, uint8_t *pa)
 {
-	/*
-	 * This function removes an entry from the ARP table.  The
-	 * ARP table is searched according to the non-NULL address
-	 * that is provided.
-	 */
-	int slot, i, match;
+    /*
+     * This function removes an entry from the ARP table.  The
+     * ARP table is searched according to the non-NULL address
+     * that is provided.
+     */
+    int slot, i, match;

-	if (((hwa == 0) && (pa == 0)) || (arptab == 0))
-		return;
+    if (((hwa == 0) && (pa == 0)) || (arptab == 0))
+        return;

-	/* check each hardware adress for a match */
-	for (slot = 0; slot < arptab->tab_size; slot++)
-	{
-		if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
-				(arptab->table[slot].protocol == protocol))
-		{
-			match = true;
-			if (hwa != 0)
-			{
-				/* Check Hardware Address field */
-				for (i = 0; i < arptab->table[slot].hwa_size; i++)
-				{
-					if (arptab->table[slot].hwa[i] != hwa[i])
-					{
-						match = false;
-						break;
-					}
-				}
-			}
-			else
-			{
-				/* Check Protocol Address field */
-				for (i = 0; i < arptab->table[slot].pa_size; i++)
-				{
-					if (arptab->table[slot].pa[i] != pa[i])
-					{
-						match = false;
-						break;
-					}
-				}
-			}
-			if (match)
-			{
-				for (i = 0; i < arptab->table[slot].hwa_size; i++)
-					arptab->table[slot].hwa[i] = 0;
-				for (i = 0; i < arptab->table[slot].pa_size; i++)
-					arptab->table[slot].pa[i] = 0;
-				arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
-				break;
-			}
-		}
-	}
+    /* check each hardware adress for a match */
+    for (slot = 0; slot < arptab->tab_size; slot++)
+    {
+        if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
+                (arptab->table[slot].protocol == protocol))
+        {
+            match = true;
+            if (hwa != 0)
+            {
+                /* Check Hardware Address field */
+                for (i = 0; i < arptab->table[slot].hwa_size; i++)
+                {
+                    if (arptab->table[slot].hwa[i] != hwa[i])
+                    {
+                        match = false;
+                        break;
+                    }
+                }
+            }
+            else
+            {
+                /* Check Protocol Address field */
+                for (i = 0; i < arptab->table[slot].pa_size; i++)
+                {
+                    if (arptab->table[slot].pa[i] != pa[i])
+                    {
+                        match = false;
+                        break;
+                    }
+                }
+            }
+            if (match)
+            {
+                for (i = 0; i < arptab->table[slot].hwa_size; i++)
+                    arptab->table[slot].hwa[i] = 0;
+                for (i = 0; i < arptab->table[slot].pa_size; i++)
+                    arptab->table[slot].pa[i] = 0;
+                arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
+                break;
+            }
+        }
+    }
 }

 void arp_request(NIF *nif, uint8_t *pa)
 {
-	/*
-	 * This function broadcasts an ARP request for the protocol
-	 * address "pa"
-	 */
-	uint8_t *addr;
-	NBUF *pNbuf;
-	arp_frame_hdr *arpframe;
-	int i, result;
+    /*
+     * This function broadcasts an ARP request for the protocol
+     * address "pa"
+     */
+    uint8_t *addr;
+    NBUF *pNbuf;
+    arp_frame_hdr *arpframe;
+    int i, result;

+    pNbuf = nbuf_alloc();
+    if (pNbuf == NULL)
+    {
+        dbg("could not allocate Tx buffer\n");
+        return;
+    }

-	dbg("%s\r\n", __FUNCTION__);
+    arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];

-	pNbuf = nbuf_alloc();
-	if (pNbuf == NULL)
-	{
-		dbg("%s: arp_request couldn't allocate Tx buffer\n", __FUNCTION__);
-		return;
-	}
+    /* Build the ARP request packet */
+    arpframe->ar_hrd = ETHERNET;
+    arpframe->ar_pro = ETH_FRM_IP;
+    arpframe->ar_hln = 6;
+    arpframe->ar_pln = 4;
+    arpframe->opcode = ARP_REQUEST;

-	arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];
+    addr = &nif->hwa[0];
+    for (i = 0; i < 6; i++)
+        arpframe->ar_sha[i] = addr[i];

-	/* Build the ARP request packet */
-	arpframe->ar_hrd = ETHERNET;
-	arpframe->ar_pro = ETH_FRM_IP;
-	arpframe->ar_hln = 6;
-	arpframe->ar_pln = 4;
-	arpframe->opcode = ARP_REQUEST;
+    addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
+    for (i = 0; i < 4; i++)
+        arpframe->ar_spa[i] = addr[i];

-	addr = &nif->hwa[0];
-	for (i = 0; i < 6; i++)
-		arpframe->ar_sha[i] = addr[i];
+    for (i = 0; i < 6; i++)
+        arpframe->ar_tha[i] = 0x00;

-	addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
-	for (i = 0; i < 4; i++)
-		arpframe->ar_spa[i] = addr[i];
+    for (i = 0; i < 4; i++)
+        arpframe->ar_tpa[i] = pa[i];

-	for (i = 0; i < 6; i++)
-		arpframe->ar_tha[i] = 0x00;
+    pNbuf->length = ARP_HDR_LEN;

-	for (i = 0; i < 4; i++)
-		arpframe->ar_tpa[i] = pa[i];
+    /* Send the ARP request */
+    dbg("sending ARP request\r\n");
+    result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf);

-	pNbuf->length = ARP_HDR_LEN;
-
-	/* Send the ARP request */
-	dbg("%s: sending ARP request\r\n", __FUNCTION__);
-	result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf);
-
-	if (result == 0)
-		nbuf_free(pNbuf);
+    if (result == 0)
+        nbuf_free(pNbuf);
 }

 static int arp_resolve_pa(NIF *nif, uint16_t protocol, uint8_t *pa, uint8_t **ha)
 {
-	/*
-	 * This function accepts a pointer to a protocol address and
-	 * searches the ARP table for a hardware address match.  If no
-	 * no match found, false is returned.
-	 */
-	ARP_INFO *arptab;
+    /*
+     * This function accepts a pointer to a protocol address and
+     * searches the ARP table for a hardware address match.  If no
+     * no match found, false is returned.
+     */
+    ARP_INFO *arptab;

-	if ((pa == NULL) || (nif == NULL) || (protocol == 0))
-		return 0;
+    if ((pa == NULL) || (nif == NULL) || (protocol == 0))
+        return 0;

-	arptab = nif_get_protocol_info (nif,ETH_FRM_ARP);
-	*ha = arp_find_pair(arptab,protocol,0,pa);
+    arptab = nif_get_protocol_info (nif,ETH_FRM_ARP);
+    *ha = arp_find_pair(arptab,protocol,0,pa);

-	if (*ha == NULL)
-		return 0;
-	else
-		return 1;
+    if (*ha == NULL)
+        return 0;
+    else
+        return 1;
 }

 uint8_t *arp_resolve(NIF *nif, uint16_t protocol, uint8_t *pa)
 {
-	int i;
-	uint8_t *hwa;
+    int i;
+    uint8_t *hwa;

-	/* 
-	 * Check to see if the necessary MAC-to-IP translation information
-	 * is in table already 
-	 */
-	if (arp_resolve_pa(nif, protocol, pa, &hwa))
-		return hwa;
+    /*
+     * Check to see if the necessary MAC-to-IP translation information
+     * is in table already
+     */
+    if (arp_resolve_pa(nif, protocol, pa, &hwa))
+        return hwa;

-	/* 
-	 * Ok, it's not, so we need to try to obtain it by broadcasting
-	 * an ARP request.  Hopefully the desired host is listening and
-	 * will respond with it's MAC address
-	 */
-	for (i = 0; i < 3; i++)
-	{
-		arp_request(nif, pa);
+    /*
+     * Ok, it's not, so we need to try to obtain it by broadcasting
+     * an ARP request.  Hopefully the desired host is listening and
+     * will respond with it's MAC address
+     */
+    for (i = 0; i < 3; i++)
+    {
+        arp_request(nif, pa);

-		timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT);
-		while (timer_get_reference(TIMER_NETWORK))
-		{
-			dbg("%s: try to resolve %d.%d.%d.%d\r\n", __FUNCTION__,
-				pa[0], pa[1], pa[2], pa[3], pa[4]);
-			if (arp_resolve_pa(nif, protocol, pa, &hwa))
-			{
-				dbg("%s: resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n", __FUNCTION__,
-					hwa[0], hwa[1], hwa[2], hwa[3], hwa[4], hwa[5], hwa[6]);
-					
-				return hwa;
-			}
-		}
-	}
+        timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT);
+        while (timer_get_reference(TIMER_NETWORK))
+        {
+            dbg("try to resolve %d.%d.%d.%d\r\n",
+                pa[0], pa[1], pa[2], pa[3], pa[4]);
+            if (arp_resolve_pa(nif, protocol, pa, &hwa))
+            {
+                dbg("resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n",
+                    hwa[0], hwa[1], hwa[2], hwa[3], hwa[4], hwa[5], hwa[6]);

-	return NULL;
+                return hwa;
+            }
+        }
+    }
+
+    return NULL;
 }

 void arp_init(ARP_INFO *arptab)
 {
-	int slot, i;
+    int slot, i;

-	arptab->tab_size = MAX_ARP_ENTRY;
-	for (slot = 0; slot < arptab->tab_size; slot++)
-	{
-		for (i = 0; i < MAX_HWA_SIZE; i++)
-			arptab->table[slot].hwa[i] = 0;
-		for (i = 0; i < MAX_PA_SIZE; i++)
-			arptab->table[slot].pa[i] = 0;
-		arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
-		arptab->table[slot].hwa_size = 0;
-		arptab->table[slot].pa_size = 0;
-	}
+    arptab->tab_size = MAX_ARP_ENTRY;
+    for (slot = 0; slot < arptab->tab_size; slot++)
+    {
+        for (i = 0; i < MAX_HWA_SIZE; i++)
+            arptab->table[slot].hwa[i] = 0;
+        for (i = 0; i < MAX_PA_SIZE; i++)
+            arptab->table[slot].pa[i] = 0;
+        arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
+        arptab->table[slot].hwa_size = 0;
+        arptab->table[slot].pa_size = 0;
+    }
 }

 void arp_handler(NIF *nif, NBUF *pNbuf)
 {
-	/* 
-	 * ARP protocol handler 
-	 */
-	uint8_t *addr;
-	ARP_INFO *arptab;
-	int longevity;
-	arp_frame_hdr *rx_arpframe, *tx_arpframe;
+    /*
+     * ARP protocol handler
+     */
+    uint8_t *addr;
+    ARP_INFO *arptab;
+    int longevity;
+    arp_frame_hdr *rx_arpframe, *tx_arpframe;

-	arptab = nif_get_protocol_info(nif, ETH_FRM_ARP);
-	rx_arpframe = (arp_frame_hdr *) &pNbuf->data[pNbuf->offset];
+    arptab = nif_get_protocol_info(nif, ETH_FRM_ARP);
+    rx_arpframe = (arp_frame_hdr *) &pNbuf->data[pNbuf->offset];

-	/* 
-	 * Check for an appropriate ARP packet 
-	 */
-	if ((pNbuf->length < ARP_HDR_LEN)       ||  
-			(rx_arpframe->ar_hrd != ETHERNET)   ||
-			(rx_arpframe->ar_hln != 6)          ||
-			(rx_arpframe->ar_pro != ETH_FRM_IP) ||
-			(rx_arpframe->ar_pln != 4))
-	{
-		nbuf_free(pNbuf);
-		return;
-	}
+    /*
+     * Check for an appropriate ARP packet
+     */
+    if ((pNbuf->length < ARP_HDR_LEN)       ||
+            (rx_arpframe->ar_hrd != ETHERNET)   ||
+            (rx_arpframe->ar_hln != 6)          ||
+            (rx_arpframe->ar_pro != ETH_FRM_IP) ||
+            (rx_arpframe->ar_pln != 4))
+    {
+        dbg("received packet is not an ARP packet, discard it\r\n");
+        nbuf_free(pNbuf);
+        return;
+    }

-	/* 
-	 * Check to see if it was addressed to me - if it was, keep this
-	 * ARP entry in the table permanently; if not, mark it so that it
-	 * can be displaced later if necessary
-	 */
-	addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
-	if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
-			(rx_arpframe->ar_tpa[1] == addr[1]) &&
-			(rx_arpframe->ar_tpa[2] == addr[2]) &&
-			(rx_arpframe->ar_tpa[3] == addr[3]) )
-	{
-		longevity = ARP_ENTRY_PERM;
-	}
-	else 
-		longevity = ARP_ENTRY_TEMP;
+    /*
+     * Check to see if it was addressed to me - if it was, keep this
+     * ARP entry in the table permanently; if not, mark it so that it
+     * can be displaced later if necessary
+     */
+    addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
+    if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
+            (rx_arpframe->ar_tpa[1] == addr[1]) &&
+            (rx_arpframe->ar_tpa[2] == addr[2]) &&
+            (rx_arpframe->ar_tpa[3] == addr[3]) )
+    {
+        dbg("received ARP packet is a permanent one, store it\r\n");
+        longevity = ARP_ENTRY_PERM;
+    }
+    else
+    {
+        dbg("received ARP packet was not addressed to us, keep only temporarily\r\n");
+        longevity = ARP_ENTRY_TEMP;
+    }

-	/* 
-	 * Add ARP info into the table
-	 */
-	arp_merge(arptab,
-			rx_arpframe->ar_pro,
-			rx_arpframe->ar_hln,
-			&rx_arpframe->ar_sha[0],
-			rx_arpframe->ar_pln,
-			&rx_arpframe->ar_spa[0],
-			longevity
-			);
+    /*
+     * Add ARP info into the table
+     */
+    arp_merge(arptab,
+            rx_arpframe->ar_pro,
+            rx_arpframe->ar_hln,
+            &rx_arpframe->ar_sha[0],
+            rx_arpframe->ar_pln,
+            &rx_arpframe->ar_spa[0],
+            longevity
+            );

-	switch (rx_arpframe->opcode)
-	{
-		case ARP_REQUEST:
-			/* 
-			 * Check to see if request is directed to me
-			 */
-			if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
-					(rx_arpframe->ar_tpa[1] == addr[1]) &&
-					(rx_arpframe->ar_tpa[2] == addr[2]) &&
-					(rx_arpframe->ar_tpa[3] == addr[3]) )
-			{
-				/*
-				 * Reuse the current network buffer to assemble an ARP reply
-				 */
-				tx_arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];
+    switch (rx_arpframe->opcode)
+    {
+        case ARP_REQUEST:
+            /*
+             * Check to see if request is directed to me
+             */
+            if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
+                    (rx_arpframe->ar_tpa[1] == addr[1]) &&
+                    (rx_arpframe->ar_tpa[2] == addr[2]) &&
+                    (rx_arpframe->ar_tpa[3] == addr[3]) )
+            {
+                dbg("received arp request directed to us, replying\r\n");
+                /*
+                 * Reuse the current network buffer to assemble an ARP reply
+                 */
+                tx_arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];

-				/*
-				 * Build new ARP frame from the received data
-				 */
-				tx_arpframe->ar_hrd = ETHERNET;
-				tx_arpframe->ar_pro = ETH_FRM_IP;
-				tx_arpframe->ar_hln = 6;
-				tx_arpframe->ar_pln = 4;
-				tx_arpframe->opcode = ARP_REPLY;
-				tx_arpframe->ar_tha[0] = rx_arpframe->ar_sha[0];
-				tx_arpframe->ar_tha[1] = rx_arpframe->ar_sha[1];
-				tx_arpframe->ar_tha[2] = rx_arpframe->ar_sha[2];
-				tx_arpframe->ar_tha[3] = rx_arpframe->ar_sha[3];
-				tx_arpframe->ar_tha[4] = rx_arpframe->ar_sha[4];
-				tx_arpframe->ar_tha[5] = rx_arpframe->ar_sha[5];
-				tx_arpframe->ar_tpa[0] = rx_arpframe->ar_spa[0];
-				tx_arpframe->ar_tpa[1] = rx_arpframe->ar_spa[1];
-				tx_arpframe->ar_tpa[2] = rx_arpframe->ar_spa[2];
-				tx_arpframe->ar_tpa[3] = rx_arpframe->ar_spa[3];
+                /*
+                 * Build new ARP frame from the received data
+                 */
+                tx_arpframe->ar_hrd = ETHERNET;
+                tx_arpframe->ar_pro = ETH_FRM_IP;
+                tx_arpframe->ar_hln = 6;
+                tx_arpframe->ar_pln = 4;
+                tx_arpframe->opcode = ARP_REPLY;
+                tx_arpframe->ar_tha[0] = rx_arpframe->ar_sha[0];
+                tx_arpframe->ar_tha[1] = rx_arpframe->ar_sha[1];
+                tx_arpframe->ar_tha[2] = rx_arpframe->ar_sha[2];
+                tx_arpframe->ar_tha[3] = rx_arpframe->ar_sha[3];
+                tx_arpframe->ar_tha[4] = rx_arpframe->ar_sha[4];
+                tx_arpframe->ar_tha[5] = rx_arpframe->ar_sha[5];
+                tx_arpframe->ar_tpa[0] = rx_arpframe->ar_spa[0];
+                tx_arpframe->ar_tpa[1] = rx_arpframe->ar_spa[1];
+                tx_arpframe->ar_tpa[2] = rx_arpframe->ar_spa[2];
+                tx_arpframe->ar_tpa[3] = rx_arpframe->ar_spa[3];

-				/* 
-				 * Now copy in the new information 
-				 */
-				addr = &nif->hwa[0];
-				tx_arpframe->ar_sha[0] = addr[0];
-				tx_arpframe->ar_sha[1] = addr[1];
-				tx_arpframe->ar_sha[2] = addr[2];
-				tx_arpframe->ar_sha[3] = addr[3];
-				tx_arpframe->ar_sha[4] = addr[4];
-				tx_arpframe->ar_sha[5] = addr[5];
+                /*
+                 * Now copy in the new information
+                 */
+                addr = &nif->hwa[0];
+                tx_arpframe->ar_sha[0] = addr[0];
+                tx_arpframe->ar_sha[1] = addr[1];
+                tx_arpframe->ar_sha[2] = addr[2];
+                tx_arpframe->ar_sha[3] = addr[3];
+                tx_arpframe->ar_sha[4] = addr[4];
+                tx_arpframe->ar_sha[5] = addr[5];

-				addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
-				tx_arpframe->ar_spa[0] = addr[0];
-				tx_arpframe->ar_spa[1] = addr[1];
-				tx_arpframe->ar_spa[2] = addr[2];
-				tx_arpframe->ar_spa[3] = addr[3];
+                addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
+                tx_arpframe->ar_spa[0] = addr[0];
+                tx_arpframe->ar_spa[1] = addr[1];
+                tx_arpframe->ar_spa[2] = addr[2];
+                tx_arpframe->ar_spa[3] = addr[3];

-				/* 
-				 * Save the length of my packet in the buffer structure 
-				 */
-				pNbuf->length = ARP_HDR_LEN;
+                /*
+                 * Save the length of my packet in the buffer structure
+                 */
+                pNbuf->length = ARP_HDR_LEN;

-				nif->send(nif, 
-						&tx_arpframe->ar_tha[0], 
-						&tx_arpframe->ar_sha[0], 
-						ETH_FRM_ARP, 
-						pNbuf);
-			}
-			else 
-				nbuf_free(pNbuf);
-			break;
-		case ARP_REPLY:
-			/*
-			 * The ARP Reply case is already taken care of
-			 */
-		default:
-			nbuf_free(pNbuf);
-			break;
-	}
+                nif->send(nif,
+                        &tx_arpframe->ar_tha[0],
+                        &tx_arpframe->ar_sha[0],
+                        ETH_FRM_ARP,
+                        pNbuf);
+            }
+            else
+            {
+                dbg("ARP request not addressed to us, discarding\r\n");
+                nbuf_free(pNbuf);
+            }
+            break;

-	return;
+        case ARP_REPLY:
+            /*
+             * The ARP Reply case is already taken care of
+             */
+
+            /* missing break is intentional */
+
+        default:
+            nbuf_free(pNbuf);
+            break;
+    }
+
+    return;
 }
--- a/net/bcm5222.c
+++ b/net/bcm5222.c
@@ -18,13 +18,15 @@
 #include "firebee.h"
 #elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
 #else
 #error "Unknown machine!"
 #endif

 #define DBG_BCM
 #ifdef DBG_BCM
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_BCM */
@@ -53,7 +55,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex

 	/* Initialize the MII interface */
 	fec_mii_init(fec_ch, SYSCLK / 1000);
-	dbg("%s: PHY reset\r\n", __FUNCTION__);
+    dbg("PHY reset\r\n");

 	/* Reset the PHY */
 	if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, BCM5222_CTRL_RESET | BCM5222_CTRL_ANE))
@@ -69,7 +71,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
 	if(timeout >= FEC_MII_TIMEOUT)
 		return 0;

-	dbg("%s: PHY reset OK\r\n", __FUNCTION__);
+    dbg("PHY reset OK\r\n");

 	settings = (BCM5222_AN_ADV_NEXT_PAGE | BCM5222_AN_ADV_PAUSE);

@@ -87,13 +89,13 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
 	if (!fec_mii_write(fec_ch, phy_addr, BCM5222_AN_ADV, settings))
 		return 0;

-	dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
+    dbg("PHY Enable Auto-Negotiation\r\n");

 	/* Enable Auto-Negotiation */
 	if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, (BCM5222_CTRL_ANE | BCM5222_CTRL_RESTART_AN)))
 		return 0;

-	dbg("%s: PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
+    dbg("PHY Wait for auto-negotiation to complete\r\n");

 	/* Wait for auto-negotiation to complete */
 	for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
@@ -106,7 +108,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex

 	if (timeout < FEC_MII_TIMEOUT)
 	{
-		dbg("%s: PHY auto-negociation complete\r\n", __FUNCTION__);
+        dbg("PHY auto-negociation complete\r\n");

 		/* Read Auxiliary Control/Status Register */
 		if (!fec_mii_read(fec_ch, phy_addr, BCM5222_ACSR, &settings))
@@ -114,7 +116,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
 	}
 	else
 	{
-		dbg("%s: auto negotiation failed, PHY Set the default mode\r\n", __FUNCTION__);
+        dbg("auto negotiation failed, PHY Set the default mode\r\n");

 		/* Set the default mode (Full duplex, 100 Mbps) */
 		if (!fec_mii_write(fec_ch, phy_addr, BCM5222_ACSR, settings = (BCM5222_ACSR_100BTX | BCM5222_ACSR_FDX)))
@@ -127,17 +129,17 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
 	else
 		fec_duplex(fec_ch, FEC_MII_HALF_DUPLEX);

-	dbg("%s: PHY Mode: ", __FUNCTION__);
+    dbg("PHY Mode: ");

 	if (settings & BCM5222_ACSR_100BTX)
-		dbg("%s: 100Mbps\r\n", __FUNCTION__);
+        dbg("100Mbps\r\n");
 	else
-		dbg("%s: 10Mbps\r\n", __FUNCTION__);
+        dbg("10Mbps\r\n");

 	if (settings & BCM5222_ACSR_FDX)
-		dbg("%s: Full-duplex\r\n", __FUNCTION__);
+        dbg("Full-duplex\r\n");
 	else
-		dbg("%s: Half-duplex\r\n", __FUNCTION__);
+        dbg("Half-duplex\r\n");

 	return 1;
 }
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -13,7 +13,7 @@

 #define DBG_BOOTP
 #ifdef DBG_BOOTP
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_BOOTP */
@@ -94,12 +94,14 @@ void bootp_handler(NIF *nif, NBUF *nbuf)
 	struct bootp_packet *rx_p;
 	udp_frame_hdr *udpframe;

-	dbg("%s\n", __FUNCTION__);
+    dbg("\r\n");

 	rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
 	udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];

-	/* check packet if it is valid and if it is really intended for us */
+    /*
+     * check packet if it is valid and if it is really intended for us
+     */

 	if (rx_p->type == BOOTP_TYPE_BOOTREPLY && rx_p->xid == XID)
 	{
@@ -109,6 +111,7 @@ void bootp_handler(NIF *nif, NBUF *nbuf)
 	}
 	else
 	{
+        dbg("received invalid bootp reply\r\n");
 		/* not valid */
 		return;
 	}
--- a/net/fec.c
+++ b/net/fec.c
--- a/net/fecbd.c
+++ b/net/fecbd.c
@@ -31,14 +31,14 @@
 * 
 */

-FECBD unaligned_bds[(2 * NRXBD) + (2 * NTXBD) + 1];
+static FECBD unaligned_bds[(2 * NRXBD) + (2 * NTXBD) + 1];

 /*
 * These pointers are used to reference into the chunck of data set 
 * aside for buffer descriptors
 */
-FECBD *RxBD;
-FECBD *TxBD;
+static FECBD *RxBD;
+static FECBD *TxBD;

 /*
 * Macros to easier access to the BD ring
@@ -62,94 +62,94 @@ static int iRxbd;
 */
 void fecbd_init(uint8_t ch)
 {
-	NBUF *nbuf;
-	int i;
+    NBUF *nbuf;
+    int i;

-	dbg("%s:\r\n", __FUNCTION__);
+    dbg("\r\n");

-	/* 
-	 * Align Buffer Descriptors to 4-byte boundary 
-	 */
-	RxBD = (FECBD *)(((int) unaligned_bds + 3) & 0xFFFFFFFC);
-	TxBD = (FECBD *)((int) RxBD + (sizeof(FECBD) * 2 * NRXBD));
+    /* 
+     * Align Buffer Descriptors to 4-byte boundary 
+     */
+    RxBD = (FECBD *)(((int) unaligned_bds + 3) & 0xFFFFFFFC);
+    TxBD = (FECBD *)((int) RxBD + (sizeof(FECBD) * 2 * NRXBD));

-	dbg("%s: initialise RX buffer descriptor ring\r\n", __FUNCTION__);
+    dbg("initialise RX buffer descriptor ring\r\n");

-	/* 
-	 * Initialize the Rx Buffer Descriptor ring 
-	 */
-	for (i = 0; i < NRXBD; ++i)
-	{
-		/* Grab a network buffer from the free list */
-		nbuf = nbuf_alloc();
-		if (nbuf == NULL)
-		{
-			dbg("%s: could not allocate network buffer\r\n", __FUNCTION__);
-			return;
-		}
+    /* 
+     * Initialize the Rx Buffer Descriptor ring 
+     */
+    for (i = 0; i < NRXBD; ++i)
+    {
+        /* Grab a network buffer from the free list */
+        nbuf = nbuf_alloc();
+        if (nbuf == NULL)
+        {
+            dbg("could not allocate network buffer\r\n");
+            return;
+        }

-		/* Initialize the BD */
-		RxBD(ch,i).status = RX_BD_E | RX_BD_INTERRUPT;
-		RxBD(ch,i).length = RX_BUF_SZ;
-		RxBD(ch,i).data =  nbuf->data;
+        /* Initialize the BD */
+        RxBD(ch,i).status = RX_BD_E | RX_BD_INTERRUPT;
+        RxBD(ch,i).length = RX_BUF_SZ;
+        RxBD(ch,i).data =  nbuf->data;

-		/* Add the network buffer to the Rx queue */
-		nbuf_add(NBUF_RX_RING, nbuf);
-	}
+        /* Add the network buffer to the Rx queue */
+        nbuf_add(NBUF_RX_RING, nbuf);
+    }

-	/*
-	 * Set the WRAP bit on the last one
-	 */
-	RxBD(ch, i - 1).status |= RX_BD_W;
+    /*
+     * Set the WRAP bit on the last one
+     */
+    RxBD(ch, i - 1).status |= RX_BD_W;

-	dbg("%s: initialise TX buffer descriptor ring\r\n", __FUNCTION__);
+    dbg("initialise TX buffer descriptor ring\r\n");

-	/* 
-	 * Initialize the Tx Buffer Descriptor ring 
-	 */
-	for (i = 0; i < NTXBD; ++i)
-	{
-		TxBD(ch, i).status = TX_BD_INTERRUPT;
-		TxBD(ch, i).length = 0;
-		TxBD(ch, i).data = NULL;
-	}
+    /* 
+     * Initialize the Tx Buffer Descriptor ring 
+     */
+    for (i = 0; i < NTXBD; ++i)
+    {
+        TxBD(ch, i).status = TX_BD_INTERRUPT;
+        TxBD(ch, i).length = 0;
+        TxBD(ch, i).data = NULL;
+    }

-	/*
-	 * Set the WRAP bit on the last one
-	 */
-	TxBD(ch, i - 1).status |= TX_BD_W;
+    /*
+     * Set the WRAP bit on the last one
+     */
+    TxBD(ch, i - 1).status |= TX_BD_W;

-	/* 
-	 * Initialize the buffer descriptor indexes 
-	 */
-	iTxbd_new = iTxbd_old = iRxbd = 0;
+    /* 
+     * Initialize the buffer descriptor indexes 
+     */
+    iTxbd_new = iTxbd_old = iRxbd = 0;
 }

 void fecbd_dump(uint8_t ch)
 {
 #ifdef DBG_FECBD
-	int i;
+    int i;

-	xprintf("\n------------ FEC%d BDs -----------\n",ch);
-	xprintf("RxBD Ring\n");
-	for (i = 0; i < NRXBD; i++)
-	{
-		xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
-				i, &RxBD(ch, i), 
-				RxBD(ch, i).status, 
-				RxBD(ch, i).length, 
-				RxBD(ch, i).data);
-	}
-	xprintf("TxBD Ring\n");
-	for (i = 0; i < NTXBD; i++)
-	{
-		xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
-				i, &TxBD(ch, i), 
-				TxBD(ch, i).status, 
-				TxBD(ch, i).length, 
-				TxBD(ch, i).data);
-	}
-	xprintf("--------------------------------\n\n");
+    xprintf("\n------------ FEC%d BDs -----------\n",ch);
+    xprintf("RxBD Ring\n");
+    for (i = 0; i < NRXBD; i++)
+    {
+        xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
+                i, &RxBD(ch, i), 
+                RxBD(ch, i).status, 
+                RxBD(ch, i).length, 
+                RxBD(ch, i).data);
+    }
+    xprintf("TxBD Ring\n");
+    for (i = 0; i < NTXBD; i++)
+    {
+        xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
+                i, &TxBD(ch, i), 
+                TxBD(ch, i).status, 
+                TxBD(ch, i).length, 
+                TxBD(ch, i).data);
+    }
+    xprintf("--------------------------------\n\n");
 #endif /* DBG_FECBD */
 }

@@ -165,28 +165,28 @@ void fecbd_dump(uint8_t ch)
 */
 uint32_t fecbd_get_start(uint8_t ch, uint8_t direction)
 {
-	switch (direction)
-	{
-		case Rx:
-			return (uint32_t)((int)RxBD + (ch * sizeof(FECBD) * NRXBD));
-		case Tx:
-		default:
-			return (uint32_t)((int)TxBD + (ch * sizeof(FECBD) * NTXBD));
-	}
+    switch (direction)
+    {
+        case Rx:
+            return (uint32_t)((int)RxBD + (ch * sizeof(FECBD) * NRXBD));
+        case Tx:
+        default:
+            return (uint32_t)((int)TxBD + (ch * sizeof(FECBD) * NTXBD));
+    }
 }

 FECBD *fecbd_rx_alloc(uint8_t ch)
 {
-	int i = iRxbd;
+    int i = iRxbd;

-	/* Check to see if the ring of BDs is full */
-	if (RxBD(ch, i).status & RX_BD_E)
-		return NULL;
+    /* Check to see if the ring of BDs is full */
+    if (RxBD(ch, i).status & RX_BD_E)
+        return NULL;

-	/* Increment the circular index */
-	iRxbd = (uint8_t)((iRxbd + 1) % NRXBD);
+    /* Increment the circular index */
+    iRxbd = (uint8_t)((iRxbd + 1) % NRXBD);

-	return &RxBD(ch, i);
+    return &RxBD(ch, i);
 }

 /*
@@ -201,16 +201,16 @@ FECBD *fecbd_rx_alloc(uint8_t ch)
 */
 FECBD *fecbd_tx_alloc(uint8_t ch)
 {
-	int i = iTxbd_new;
+    int i = iTxbd_new;

-	/* Check to see if the ring of BDs is full */
-	if (TxBD(ch, i).status & TX_BD_R)
-		return NULL;
+    /* Check to see if the ring of BDs is full */
+    if (TxBD(ch, i).status & TX_BD_R)
+        return NULL;

-	/* Increment the circular index */
-	iTxbd_new = (uint8_t)((iTxbd_new + 1) % NTXBD);
+    /* Increment the circular index */
+    iTxbd_new = (uint8_t)((iTxbd_new + 1) % NTXBD);

-	return &TxBD(ch, i);
+    return &TxBD(ch, i);
 }

 /*
@@ -226,14 +226,14 @@ FECBD *fecbd_tx_alloc(uint8_t ch)
 */
 FECBD *fecbd_tx_free(uint8_t ch)
 {
-	int i = iTxbd_old;
+    int i = iTxbd_old;

-	/* Check to see if the ring of BDs is empty */
-	if ((TxBD(ch, i).data == NULL) || (TxBD(ch, i).status & TX_BD_R))
-		return NULL;
+    /* Check to see if the ring of BDs is empty */
+    if ((TxBD(ch, i).data == NULL) || (TxBD(ch, i).status & TX_BD_R))
+        return NULL;

-	/* Increment the circular index */
-	iTxbd_old = (uint8_t)((iTxbd_old + 1) % NTXBD);
+    /* Increment the circular index */
+    iTxbd_old = (uint8_t)((iTxbd_old + 1) % NTXBD);

-	return &TxBD(ch, i);
+    return &TxBD(ch, i);
 }
--- a/net/ip.c
+++ b/net/ip.c
@@ -1,315 +1,317 @@
 /*
- * File:        ip.c
+ * File:    ip.c
 * Purpose:     Internet Protcol device driver
 *
 * Notes:
 *
 * Modifications:
 */
+#include <bas_types.h>
 #include "net.h"
-#include <stdint.h>
-#include <stddef.h>
+#include "bas_printf.h"
+#include "bas_string.h"


 //#define IP_DEBUG
 #if defined(IP_DEBUG)
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif

 void ip_init(IP_INFO *info, IP_ADDR_P myip, IP_ADDR_P gateway, IP_ADDR_P netmask)
 {
-	int index;
+    int index;

-	for (index = 0; index < sizeof(IP_ADDR); index++)
-	{
-		info->myip[index] = myip[index];
-		info->gateway[index] = gateway[index];
-		info->netmask[index] = netmask[index];
-		info->broadcast[index] = 0xFF;
-	}
+    for (index = 0; index < sizeof(IP_ADDR); index++)
+    {
+        info->myip[index] = myip[index];
+        info->gateway[index] = gateway[index];
+        info->netmask[index] = netmask[index];
+        info->broadcast[index] = 0xFF;
+    }

-	info->rx = 0;
-	info->rx_unsup = 0;
-	info->tx = 0;
-	info->err = 0;
+    info->rx = 0;
+    info->rx_unsup = 0;
+    info->tx = 0;
+    info->err = 0;
 }

 uint8_t *ip_get_myip(IP_INFO *info)
 {
-	if (info != 0)
-	{
-		return (uint8_t *) &info->myip[0];
-	}
-	dbg("%s: info is NULL!\n\t", __FUNCTION__);
-	return 0;
+    if (info != 0)
+    {
+        return (uint8_t *) &info->myip[0];
+    }
+    dbg("info is NULL!\n\t");
+    return 0;
 }

 int ip_addr_compare(IP_ADDR_P addr1, IP_ADDR_P addr2)
 {
-	int i;
+    int i;

-	for (i = 0; i < sizeof(IP_ADDR); i++)
-	{
-		if (addr1[i] != addr2[i])
-			return 0;
-	}
-	return 1;
+    for (i = 0; i < sizeof(IP_ADDR); i++)
+    {
+        if (addr1[i] != addr2[i])
+            return 0;
+    }
+    return 1;
 }

 uint8_t *ip_resolve_route(NIF *nif, IP_ADDR_P destip)
 {
-	/*
-	 * This function determines whether or not an outgoing IP
-	 * packet needs to be transmitted on the local net or sent
-	 * to the router for transmission.
-	 */
-	IP_INFO *info;
-	IP_ADDR mask, result;
-	IP_ADDR bc = { 255, 255, 255, 255 };
-	int i;
+    /*
+     * This function determines whether or not an outgoing IP
+     * packet needs to be transmitted on the local net or sent
+     * to the router for transmission.
+     */
+    IP_INFO *info;
+    IP_ADDR mask, result;
+    IP_ADDR bc = { 255, 255, 255, 255 };
+    int i;

-	info = nif_get_protocol_info(nif, ETH_FRM_IP);
+    info = nif_get_protocol_info(nif, ETH_FRM_IP);

-	if (memcmp(destip, bc) == 0)
-	{
-		dbg("%s: destip is broadcast address, no gateway needed\r\n", __FUNCTION__);
-		return destip;
-	}
+    if (memcmp(destip, bc, 4) == 0)
+    {
+        dbg("destip is broadcast address, no gateway needed\r\n");
+        return destip;
+    }

-	/* create mask for local IP */
-	for (i = 0; i < sizeof(IP_ADDR); i++)
-	{
-		mask[i] = info->myip[i] & info->netmask[i];
-	}
+    /* create mask for local IP */
+    for (i = 0; i < sizeof(IP_ADDR); i++)
+    {
+        mask[i] = info->myip[i] & info->netmask[i];
+    }

-	/* apply mask to the destination IP */
-	for (i = 0; i < sizeof(IP_ADDR); i++)
-	{
-		result[i] = mask[i] & destip[i];
-	}
+    /* apply mask to the destination IP */
+    for (i = 0; i < sizeof(IP_ADDR); i++)
+    {
+        result[i] = mask[i] & destip[i];
+    }

-	/* See if destination IP is local or not */
-	if (ip_addr_compare(mask, result))
-	{
-		/* The destination IP is on the local net */
-		return arp_resolve(nif, ETH_FRM_IP, destip);
-	}
-	else
-	{
-		/* The destination IP is not on the local net */
-		return arp_resolve(nif, ETH_FRM_IP, info->gateway);
-	}
+    /* See if destination IP is local or not */
+    if (ip_addr_compare(mask, result))
+    {
+        /* The destination IP is on the local net */
+        return arp_resolve(nif, ETH_FRM_IP, destip);
+    }
+    else
+    {
+        /* The destination IP is not on the local net */
+        return arp_resolve(nif, ETH_FRM_IP, info->gateway);
+    }
 }

 int ip_send(NIF *nif, uint8_t *dest, uint8_t *src, uint8_t protocol, NBUF *pNbuf)
 {
-	/*
-	 * This function assembles an IP datagram and passes it
-	 * onto the hardware to be sent over the network.
-	 */
-	uint8_t *route;
-	ip_frame_hdr *ipframe;
+    /*
+     * This function assembles an IP datagram and passes it
+     * onto the hardware to be sent over the network.
+     */
+    uint8_t *route;
+    ip_frame_hdr *ipframe;

-	/*
-	 * Construct the IP header
-	 */
-	ipframe = (ip_frame_hdr*) &pNbuf->data[IP_HDR_OFFSET];
+    /*
+     * Construct the IP header
+     */
+    ipframe = (ip_frame_hdr*) &pNbuf->data[IP_HDR_OFFSET];

-	/* IP version 4, Internet Header Length of 5 32-bit words */
-	ipframe->version_ihl = 0x45;
+    /* IP version 4, Internet Header Length of 5 32-bit words */
+    ipframe->version_ihl = 0x45;

-	/* Type of Service == 0, normal and routine */
-	ipframe->service_type = 0x00;
+    /* Type of Service == 0, normal and routine */
+    ipframe->service_type = 0x00;

-	/* Total length of data */
-	ipframe->total_length = (uint16_t) (pNbuf->length + IP_HDR_SIZE);
+    /* Total length of data */
+    ipframe->total_length = (uint16_t) (pNbuf->length + IP_HDR_SIZE);

-	/* User defined identification */
-	ipframe->identification = 0x0000;
+    /* User defined identification */
+    ipframe->identification = 0x0000;

-	/* Fragment Flags and Offset -- Don't fragment, last frag */
-	ipframe->flags_frag_offset = 0x0000;
+    /* Fragment Flags and Offset -- Don't fragment, last frag */
+    ipframe->flags_frag_offset = 0x0000;

-	/* Time To Live */
-	ipframe->ttl = 0xFF;
+    /* Time To Live */
+    ipframe->ttl = 0xFF;

-	/* Protocol */
-	ipframe->protocol = protocol;
+    /* Protocol */
+    ipframe->protocol = protocol;

-	/* Checksum, computed later, zeroed for computation */
-	ipframe->checksum = 0x0000;
+    /* Checksum, computed later, zeroed for computation */
+    ipframe->checksum = 0x0000;

-	/* source IP address */
-	ipframe->source_addr[0] = src[0];
-	ipframe->source_addr[1] = src[1];
-	ipframe->source_addr[2] = src[2];
-	ipframe->source_addr[3] = src[3];
+    /* source IP address */
+    ipframe->source_addr[0] = src[0];
+    ipframe->source_addr[1] = src[1];
+    ipframe->source_addr[2] = src[2];
+    ipframe->source_addr[3] = src[3];

-	/* dest IP address */
-	ipframe->dest_addr[0] = dest[0];
-	ipframe->dest_addr[1] = dest[1];
-	ipframe->dest_addr[2] = dest[2];
-	ipframe->dest_addr[3] = dest[3];
+    /* dest IP address */
+    ipframe->dest_addr[0] = dest[0];
+    ipframe->dest_addr[1] = dest[1];
+    ipframe->dest_addr[2] = dest[2];
+    ipframe->dest_addr[3] = dest[3];

-	/* Compute checksum */
-	ipframe->checksum = ip_chksum((uint16_t *) ipframe, IP_HDR_SIZE);
+    /* Compute checksum */
+    ipframe->checksum = ip_chksum((uint16_t *) ipframe, IP_HDR_SIZE);

-	/* Increment the packet length by the size of the IP header */
-	pNbuf->length += IP_HDR_SIZE;
+    /* Increment the packet length by the size of the IP header */
+    pNbuf->length += IP_HDR_SIZE;

-	/*
-	 * Determine the hardware address of the recipient
-	 */
-	IP_ADDR bc = { 255, 255, 255, 255};
-	if (memcmp(bc, dest, 4) != 0)
-	{
-		route = ip_resolve_route(nif, dest);
-		if (route == NULL)
-		{
-			dbg("%s: Unable to locate %d.%d.%d.%d\r\n", __FUNCTION__,
-					dest[0], dest[1], dest[2], dest[3]);
-			return 0;
-		}
-	}
-	else
-	{
-		route = bc;
-		dbg("%s: route = broadcast\r\n", __FUNCTION__);
-		dbg("%s: nif = %p\r\n", __FUNCTION__, nif);
-		dbg("%s: nif->send = %p\r\n", __FUNCTION__, nif->send);
-	}
+    /*
+     * Determine the hardware address of the recipient
+     */
+    IP_ADDR bc = { 255, 255, 255, 255};
+    if (memcmp(bc, dest, 4) != 0)
+    {
+        route = ip_resolve_route(nif, dest);
+        if (route == NULL)
+        {
+            dbg("Unable to locate %d.%d.%d.%d\r\n",
+                    dest[0], dest[1], dest[2], dest[3]);
+            return 0;
+        }
+    }
+    else
+    {
+        route = bc;
+        dbg("route = broadcast\r\n");
+        dbg("nif = %p\r\n", nif);
+        dbg("nif->send = %p\r\n", nif->send);
+    }

-	return nif->send(nif, route, &nif->hwa[0], ETH_FRM_IP, pNbuf);
+    return nif->send(nif, route, &nif->hwa[0], ETH_FRM_IP, pNbuf);
 }

 #if defined(DEBUG_PRINT)
 void dump_ip_frame(ip_frame_hdr *ipframe)
 {
-	xprintf("Version:  %02X\n", ((ipframe->version_ihl & 0x00f0) >> 4));
-	xprintf("IHL:      %02X\n", ipframe->version_ihl & 0x000f);
-	xprintf("Service:  %02X\n", ipframe->service_type);
-	xprintf("Length:   %04X\n", ipframe->total_length);
-	xprintf("Ident:    %04X\n", ipframe->identification);
-	xprintf("Flags:    %02X\n", ((ipframe->flags_frag_offset & 0xC000) >> 14));
-	xprintf("Frag:     %04X\n", ipframe->flags_frag_offset & 0x3FFF);
-	xprintf("TTL:      %02X\n", ipframe->ttl);
-	xprintf("Protocol: %02X\n", ipframe->protocol);
-	xprintf("Chksum:   %04X\n", ipframe->checksum);
-	xprintf("Source  : %d.%d.%d.%d\n",
-			ipframe->source_addr[0],
-			ipframe->source_addr[1],
-			ipframe->source_addr[2],
-			ipframe->source_addr[3]);
-	xprintf("Dest    : %d.%d.%d.%d\n",
-			ipframe->dest_addr[0],
-			ipframe->dest_addr[1],
-			ipframe->dest_addr[2],
-			ipframe->dest_addr[3]);
-	xprintf("Options: %08X\n", ipframe->options);
+    xprintf("Version:  %02X\n", ((ipframe->version_ihl & 0x00f0) >> 4));
+    xprintf("IHL:      %02X\n", ipframe->version_ihl & 0x000f);
+    xprintf("Service:  %02X\n", ipframe->service_type);
+    xprintf("Length:   %04X\n", ipframe->total_length);
+    xprintf("Ident:    %04X\n", ipframe->identification);
+    xprintf("Flags:    %02X\n", ((ipframe->flags_frag_offset & 0xC000) >> 14));
+    xprintf("Frag:     %04X\n", ipframe->flags_frag_offset & 0x3FFF);
+    xprintf("TTL:      %02X\n", ipframe->ttl);
+    xprintf("Protocol: %02X\n", ipframe->protocol);
+    xprintf("Chksum:   %04X\n", ipframe->checksum);
+    xprintf("Source  : %d.%d.%d.%d\n",
+            ipframe->source_addr[0],
+            ipframe->source_addr[1],
+            ipframe->source_addr[2],
+            ipframe->source_addr[3]);
+    xprintf("Dest    : %d.%d.%d.%d\n",
+            ipframe->dest_addr[0],
+            ipframe->dest_addr[1],
+            ipframe->dest_addr[2],
+            ipframe->dest_addr[3]);
+    xprintf("Options: %08X\n", ipframe->options);
 }
 #endif


 uint16_t ip_chksum(uint16_t *data, int num)
 {
-	int chksum, ichksum;
-	uint16_t temp;
+    int chksum, ichksum;
+    uint16_t temp;

-	chksum = 0;
-	num = num >> 1; /* from bytes to words */
-	for (; num; num--, data++)
-	{
-		temp = *data;
-		ichksum = chksum + temp;
-		ichksum = ichksum & 0x0000FFFF;
-		if ((ichksum < temp) || (ichksum < chksum))
-		{
-			ichksum += 1;
-			ichksum = ichksum & 0x0000FFFF;
-		}
-		chksum = ichksum;
-	}
-	return (uint16_t) ~chksum;
+    chksum = 0;
+    num = num >> 1; /* from bytes to words */
+    for (; num; num--, data++)
+    {
+        temp = *data;
+        ichksum = chksum + temp;
+        ichksum = ichksum & 0x0000FFFF;
+        if ((ichksum < temp) || (ichksum < chksum))
+        {
+            ichksum += 1;
+            ichksum = ichksum & 0x0000FFFF;
+        }
+        chksum = ichksum;
+    }
+    return (uint16_t) ~chksum;
 }

 static int validate_ip_hdr(NIF *nif, ip_frame_hdr *ipframe)
 {
-	int index, chksum;
-	IP_INFO *info;
+    int index, chksum;
+    IP_INFO *info;

-	/*
-	 * Check the IP Version
-	 */
-	if (IP_VERSION(ipframe) != 4)
-		return 0;
+    /*
+     * Check the IP Version
+     */
+    if (IP_VERSION(ipframe) != 4)
+        return 0;

-	/*
-	 * Check Internet Header Length
-	 */
-	if (IP_IHL(ipframe) < 5)
-		return 0;
+    /*
+     * Check Internet Header Length
+     */
+    if (IP_IHL(ipframe) < 5)
+        return 0;

-	/*
-	 * Check the destination IP address
-	 */
-	info = nif_get_protocol_info(nif,ETH_FRM_IP);
-	for (index = 0; index < sizeof(IP_ADDR); index++)
-		if (info->myip[index] != ipframe->dest_addr[index])
-			return 0;
+    /*
+     * Check the destination IP address
+     */
+    info = nif_get_protocol_info(nif,ETH_FRM_IP);
+    for (index = 0; index < sizeof(IP_ADDR); index++)
+        if (info->myip[index] != ipframe->dest_addr[index])
+            return 0;

-	/*
-	 * Check the checksum
-	 */
-	chksum = (int)((uint16_t) IP_CHKSUM(ipframe));
-	IP_CHKSUM(ipframe) = 0;
+    /*
+     * Check the checksum
+     */
+    chksum = (int)((uint16_t) IP_CHKSUM(ipframe));
+    IP_CHKSUM(ipframe) = 0;

-	if (ip_chksum((uint16_t *) ipframe, IP_IHL(ipframe) * 4) != chksum)
-		return 0;
+    if (ip_chksum((uint16_t *) ipframe, IP_IHL(ipframe) * 4) != chksum)
+        return 0;

-	IP_CHKSUM(ipframe) = (uint16_t) chksum;
+    IP_CHKSUM(ipframe) = (uint16_t) chksum;

-	return 1;
+    return 1;
 }

 void ip_handler(NIF *nif, NBUF *pNbuf)
 {
-	/*
-	 * IP packet handler
-	 */
-	ip_frame_hdr *ipframe;
+    /*
+     * IP packet handler
+     */
+    ip_frame_hdr *ipframe;

-	dbg("%s: packet received\r\n", __FUNCTION__);
+    dbg("packet received\r\n");

-	ipframe = (ip_frame_hdr *) &pNbuf->data[pNbuf->offset];
+    ipframe = (ip_frame_hdr *) &pNbuf->data[pNbuf->offset];

-	/*
-	 * Verify valid IP header and destination IP
-	 */
-	if (!validate_ip_hdr(nif, ipframe))
-	{
-		nbuf_free(pNbuf);
-		return;
-	}
+    /*
+     * Verify valid IP header and destination IP
+     */
+    if (!validate_ip_hdr(nif, ipframe))
+    {
+        dbg("not a valid IP packet!\r\n");

-	pNbuf->offset += (IP_IHL(ipframe) * 4);
-	pNbuf->length = (uint16_t)(IP_LENGTH(ipframe) - (IP_IHL(ipframe) * 4));
+        nbuf_free(pNbuf);
+        return;
+    }

-	/*
-	 * Call the appriopriate handler
-	 */
-	switch (IP_PROTOCOL(ipframe))
-	{
-		case IP_PROTO_ICMP:
-			// FIXME: icmp_handler(nif, pNbuf);
-			break;
-		case IP_PROTO_UDP:
-			udp_handler(nif,pNbuf);
-			break;
-		default:
-			nbuf_free(pNbuf);
-			break;
-	}
-	return;
+    /*
+     * Call the appriopriate handler
+     */
+    switch (IP_PROTOCOL(ipframe))
+    {
+        case IP_PROTO_ICMP:
+            // FIXME: icmp_handler(nif, pNbuf);
+            break;
+        case IP_PROTO_UDP:
+            udp_handler(nif,pNbuf);
+            break;
+        default:
+            dbg("no protocol handler registered for protocol %d\r\n",
+                    __FUNCTION__, IP_PROTOCOL(ipframe));
+            nbuf_free(pNbuf);
+            break;
+    }
+    return;
 }
--- a/net/nbuf.c
+++ b/net/nbuf.c
@@ -2,7 +2,7 @@
 * File:    nbuf.c
 * Purpose: Implementation of network buffer scheme.
 *
- * Notes:   
+ * Notes:
 */
 #include "queue.h"
 #include "net.h"
@@ -12,9 +12,9 @@
 #include "bas_printf.h"


-//#define DBG_NBUF
+#define DBG_NBUF
 #if defined(DBG_NBUF)
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_NBUF */
@@ -42,13 +42,13 @@ int nbuf_init(void)
 	int i;
 	NBUF *nbuf;

-	for (i=0; i<NBUF_MAXQ; ++i)
+	for (i = 0; i < NBUF_MAXQ; ++i)
 	{
 		/* Initialize all the queues */
 		queue_init(&nbuf_queue[i]);
 	}

-	dbg("%s: Creating %d net buffers of %d bytes\r\n", __FUNCTION__, NBUF_MAX, NBUF_SZ);
+	dbg("Creating %d net buffers of %d bytes\r\n", NBUF_MAX, NBUF_SZ);

 	for (i = 0; i < NBUF_MAX; ++i)
 	{
@@ -76,18 +76,19 @@ int nbuf_init(void)
 		queue_add(&nbuf_queue[NBUF_FREE], (QNODE *)nbuf);
 	}

-	dbg("%s: NBUF allocation complete\r\n", __FUNCTION__);
+	dbg("NBUF allocation complete\r\n");

 	return 0;
 }

-/* 
+/*
 * Return all the allocated memory to the heap
 */
 void nbuf_flush(void)
 {
 	NBUF *nbuf;
-	int i, level = set_ipl(7);
+	int i;
+	int level = set_ipl(7);
 	int n = 0;

 	for (i = 0; i < NBUF_MAX; ++i)
@@ -104,7 +105,7 @@ void nbuf_flush(void)
 	set_ipl(level);
 }

-/* 
+/*
 * Allocate a network buffer from the free list
 *
 * Return Value:
@@ -171,12 +172,13 @@ void nbuf_add(int q, NBUF *nbuf)
 }

 /*
- * Put all the network buffers back into the free list 
+ * Put all the network buffers back into the free list
 */
 void nbuf_reset(void)
 {
 	NBUF *nbuf;
-	int i, level = set_ipl(7);
+	int i;
+	int level = set_ipl(7);

 	for (i = 1; i < NBUF_MAXQ; ++i)
 	{
@@ -193,7 +195,9 @@ void nbuf_debug_dump(void)
 {
 #ifdef DBG_NBUF
 	NBUF *nbuf;
-	int i, j, level;
+	int i;
+	int j;
+	int level;

 	level = set_ipl(7);

@@ -204,6 +208,7 @@ void nbuf_debug_dump(void)
 		dbg("--------------------------------------\r\n");
 		j = 0;
 		nbuf = (NBUF *) queue_peek(&nbuf_queue[i]);
+
 		while (nbuf != NULL)
 		{
 			dbg("%d\t0x%08x\t0x%04x\t0x%04x\r\n", j++, nbuf->data,
--- a/net/net_timer.c
+++ b/net/net_timer.c
@@ -5,16 +5,15 @@
 *
 * Notes:
 */
+
 #include "net_timer.h"
-#include <stdint.h>
-#include <stdbool.h>
 #include "bas_printf.h"
 #include "MCF5475.h"
 #include "interrupts.h"

 //#define DBG_TMR
 #ifdef DBG_TMR
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_TMR */
@@ -24,174 +23,180 @@
 #include "firebee.h"
 #elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
 #else
 #error unknown machine!
 #endif

 static NET_TIMER net_timer[4] =
 {
-	{0, 0, 0, 0, 0, 0, 0},
-	{0, 0, 0, 0, 0, 0, 0},
-	{0, 0, 0, 0, 0, 0, 0},
-	{0, 0, 0, 0, 0, 0, 0}
+    {0, 0, 0, 0, 0, 0, 0},
+    {0, 0, 0, 0, 0, 0, 0},
+    {0, 0, 0, 0, 0, 0, 0},
+    {0, 0, 0, 0, 0, 0, 0}
 };


-int timer_default_isr(void *not_used, NET_TIMER *t)
+bool timer_default_isr(void *not_used, NET_TIMER *t)
 {
-	(void) not_used;
+    (void) not_used;

-	/* 
-	 * Clear the pending event 
-	 */
-	MCF_GPT_GMS(t->ch) = 0;
+    /*
+     * Clear the pending event
+     */
+    MCF_GPT_GMS(t->ch) = 0;

-	dbg("%s: timer isr called for timer channel %d\r\n", __FUNCTION__);
+    dbg("timer isr called for timer channel %d\r\n");

-	/*
-	 * Clear the reference - the desired seconds have expired
-	 */
-	t->reference = 0;
+    /*
+     * Clear the reference - the desired seconds have expired
+     */
+    t->reference = 0;

-	return 1;
+    return 1;
 }

 void timer_irq_enable(uint8_t ch)
 {
-	/*
-	 * Setup the appropriate ICR
-	 */
-	MCF_INTC_ICR(TIMER_VECTOR(ch) - 64) =
-		(uint8_t)(0
-				| MCF_INTC_ICR_IP(net_timer[ch].pri)
-				| MCF_INTC_ICR_IL(net_timer[ch].lvl));
+    /*
+     * Setup the appropriate ICR
+     */
+    MCF_INTC_ICR(TIMER_VECTOR(ch) - 64) = MCF_INTC_ICR_IP(net_timer[ch].pri) |
+                                          MCF_INTC_ICR_IL(net_timer[ch].lvl);

-	/*
-	 * Unmask the FEC interrupt in the interrupt controller
-	 */
-	if (ch == 3)
-		MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK59;
-	else if (ch == 2)
-		MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK60;
-	else if (ch == 1)
-		MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK61;
-	else
-		MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK62;
+    /*
+     * Unmask the FEC interrupt in the interrupt controller
+     */
+    if (ch == 3)
+    {
+        MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK59;
+    }
+    else if (ch == 2)
+    {
+        MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK60;
+    }
+    else if (ch == 1)
+    {
+        MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK61;
+    }
+    else
+    {
+        MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK62;
+    }
 }

 bool timer_set_secs(uint8_t ch, uint32_t secs)
 {
-	uint16_t timeout;
+    uint16_t timeout;

-	/*
-	 * Reset the timer
-	 */
-	MCF_GPT_GMS(ch) = 0;
+    /*
+     * Reset the timer
+     */
+    MCF_GPT_GMS(ch) = 0;

-	/* 
-	 * Get the timeout in seconds 
-	 */
-	timeout = (uint16_t)(secs * net_timer[ch].cnt);
+    /*
+     * Get the timeout in seconds
+     */
+    timeout = (uint16_t)(secs * net_timer[ch].cnt);

-	/*
-	 * Set the reference indicating that we have not yet reached the
-	 * desired timeout
-	 */
-	net_timer[ch].reference = 1;
+    /*
+     * Set the reference indicating that we have not yet reached the
+     * desired timeout
+     */
+    net_timer[ch].reference = 1;

-	/*
-	 * Enable timer interrupt to the processor
-	 */
-	timer_irq_enable(ch);
+    /*
+     * Enable timer interrupt to the processor
+     */
+    timer_irq_enable(ch);

-	/*
-	 * Enable the timer using the pre-calculated values
-	 */
-	MCF_GPT_GCIR(ch) = (0
-			| MCF_GPT_GCIR_CNT(timeout)
-			| MCF_GPT_GCIR_PRE(net_timer[ch].pre)
-			);
-	MCF_GPT_GMS(ch) = net_timer[ch].gms;
+    /*
+     * Enable the timer using the pre-calculated values
+     */
+    MCF_GPT_GCIR(ch) = (0
+            | MCF_GPT_GCIR_CNT(timeout)
+            | MCF_GPT_GCIR_PRE(net_timer[ch].pre)
+            );
+    MCF_GPT_GMS(ch) = net_timer[ch].gms;

-	return true;
+    return true;
 }

 uint32_t timer_get_reference(uint8_t ch)
-{   
-	return (uint32_t) net_timer[ch].reference;
+{
+    return (uint32_t) net_timer[ch].reference;
 }

 bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
 {
-	/* 
-	 * Initialize the timer to expire after one second
-	 * 
-	 * This routine should only be called by the project (board) specific
-	 * initialization code.
-	 */
-	if (!((ch <= 3) && (lvl <= 7) && (lvl >= 1) && (pri <= 7)))
-	{
-		dbg("%s: illegal parameters (ch=%d, lvl=%d, pri=%d)\r\n", __FUNCTION__,
-				ch, lvl, pri);
+    /*
+     * Initialize the timer to expire after one second
+     *
+     * This routine should only be called by the project (board) specific
+     * initialization code.
+     */
+    if (!((ch <= 3) && (lvl <= 7) && (lvl >= 1) && (pri <= 7)))
+    {
+        dbg("illegal parameters (ch=%d, lvl=%d, pri=%d)\r\n", ch, lvl, pri);

-		return false;
-	}
+        return false;
+    }

-	/*
-	 * Reset the timer
-	 */
-	MCF_GPT_GMS(ch) = 0;
+    /*
+     * Reset the timer
+     */
+    MCF_GPT_GMS(ch) = 0;

-	/* 
-	 * Save off the channel, and interrupt lvl/pri information
-	 */
-	net_timer[ch].ch = ch;
-	net_timer[ch].lvl = lvl;
-	net_timer[ch].pri = pri;
+    /*
+     * Save off the channel, and interrupt lvl/pri information
+     */
+    net_timer[ch].ch = ch;
+    net_timer[ch].lvl = lvl;
+    net_timer[ch].pri = pri;

-	/*
-	 * Register the timer interrupt handler
-	 */
-	if (!isr_register_handler(ISR_DBUG_ISR, 
-				TIMER_VECTOR(ch), 
-				(int (*)(void *,void *)) timer_default_isr,
-				NULL, 
-				(void *) &net_timer[ch])
-	   )
-	{
-		dbg("%s: could not register timer interrupt handler\r\n", __FUNCTION__);
-		return false;
-	}
-	dbg("%s: timer handler registered\r\n", __FUNCTION__);
+    /*
+     * Register the timer interrupt handler
+     */
+    if (!isr_register_handler(TIMER_VECTOR(ch), 3, 0,
+                (bool (*)(void *,void *)) timer_default_isr,
+                NULL,
+                (void *) &net_timer[ch])
+       )
+    {
+        dbg("could not register timer interrupt handler\r\n");
+        return false;
+    }
+    dbg("timer handler registered\r\n", __FUNCTION__);

-	/*
-	 * Calculate the require CNT value to get a 1 second timeout
-	 *
-	 * 1 sec = CNT * Clk Period * PRE
-	 * CNT = 1 sec / (Clk Period * PRE)
-	 * CNT = Clk Freq / PRE
-	 *
-	 * The system clock frequency is defined as SYSTEM_CLOCK and
-	 * is given in MHz. We need to multiple it by 1000000 to get the 
-	 * true value.  If we assume PRE to be the maximum of 0xFFFF, 
-	 * then the CNT value needed to achieve a 1 second timeout is 
-	 * given by:
-	 *
-	 * CNT = SYSTEM_CLOCK * (1000000/0xFFFF)
-	 */
-	net_timer[ch].pre = 0xFFFF;
-	net_timer[ch].cnt = (uint16_t) ((SYSCLK / 1000) * (1000000 / 0xFFFF));
+    /*
+     * Calculate the require CNT value to get a 1 second timeout
+     *
+     * 1 sec = CNT * Clk Period * PRE
+     * CNT = 1 sec / (Clk Period * PRE)
+     * CNT = Clk Freq / PRE
+     *
+     * The system clock frequency is defined as SYSTEM_CLOCK and
+     * is given in MHz. We need to multiple it by 1000000 to get the
+     * true value.  If we assume PRE to be the maximum of 0xFFFF,
+     * then the CNT value needed to achieve a 1 second timeout is
+     * given by:
+     *
+     * CNT = SYSTEM_CLOCK * (1000000/0xFFFF)
+     */
+    net_timer[ch].pre = 0xFFFF;
+    net_timer[ch].cnt = (uint16_t) ((SYSCLK / 1000) * (1000000 / 0xFFFF));

-	/* 
-	 * Save off the appropriate mode select register value 
-	 */
-	net_timer[ch].gms = (0 
-			| MCF_GPT_GMS_TMS_GPIO
-			| MCF_GPT_GMS_IEN
-			| MCF_GPT_GMS_SC
-			| MCF_GPT_GMS_CE
-			);
+    /*
+     * Save off the appropriate mode select register value
+     */
+    net_timer[ch].gms = (0
+            | MCF_GPT_GMS_TMS_GPIO
+            | MCF_GPT_GMS_IEN
+            | MCF_GPT_GMS_SC
+            | MCF_GPT_GMS_CE
+            );

-	return true;
+    return true;
 }

--- a/net/nif.c
+++ b/net/nif.c
@@ -11,12 +11,9 @@
 #include "bas_types.h"
 #include "bas_printf.h"

-#include <stdint.h>
-#include <stdbool.h>
-
 #define DBG_NIF
 #ifdef DBG_NIF
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_NIF */
@@ -56,13 +53,13 @@ void nif_protocol_handler(NIF *nif, uint16_t protocol, NBUF *pNbuf)
 	{
 		if (nif->protocol[index].protocol == protocol)
 		{
-			dbg("%s: call protocol handler for protocol %d at %p\r\n", __FUNCTION__, protocol,
+			dbg("call protocol handler for protocol %d at %p\r\n", protocol,
 						nif->protocol[index].handler);
 			nif->protocol[index].handler(nif,pNbuf);
 			return;
 		}
 	}
-	dbg("%s: no protocol handler found for protocol %d\r\n", __FUNCTION__, protocol);
+	dbg("no protocol handler found for protocol %d\r\n", protocol);
 }

 void *nif_get_protocol_info(NIF *nif, uint16_t protocol)
@@ -87,12 +84,12 @@ int nif_bind_protocol(NIF *nif, uint16_t protocol, void (*handler)(NIF *,NBUF *)
 {
 	/*
 	 * This function registers 'protocol' as a supported
-	 * protocol in 'nif'.  
+	 * protocol in 'nif'.
 	 */
 	if (nif->num_protocol < (MAX_SUP_PROTO - 1))
 	{
 		nif->protocol[nif->num_protocol].protocol = protocol;
-		nif->protocol[nif->num_protocol].handler = (void(*)(NIF*,NBUF*))handler;
+		nif->protocol[nif->num_protocol].handler = (void(*)(NIF *, NBUF *)) handler;
 		nif->protocol[nif->num_protocol].info = info;
 		++nif->num_protocol;

--- a/net/tftp.c
+++ b/net/tftp.c
@@ -9,10 +9,7 @@
 *
 */

-#include <stdint.h>
-#include <stdbool.h>
-#include <stddef.h>
-
+#include "bas_types.h"
 #include "bas_printf.h"
 #include "bas_string.h"
 #include "net.h"
@@ -103,7 +100,7 @@ static int tftp_ack(uint16_t blocknum)
 		nbuf_free(pNbuf);

 	return result;
-} 
+}

 static int tftp_error(uint16_t error_code, uint16_t server_port)
 {
@@ -172,7 +169,7 @@ void tftp_handler(NIF *nif, NBUF *pNbuf)
 					cnt = 0;
 				}
 				else
-				{   
+				{
 					/* Check the server's transfer ID */
 					if (tcxn.server_port != UDP_SOURCE(udpframe))
 					{
@@ -274,10 +271,10 @@ void tftp_handler(NIF *nif, NBUF *pNbuf)

 void tftp_end(int success)
 {
-	/* 
-	 * Following a successful transfer the caller should pass in 
-	 * true, there should have been no ERROR packets received, and 
-	 * the connection should have been marked as closed by the 
+	/*
+	 * Following a successful transfer the caller should pass in
+	 * true, there should have been no ERROR packets received, and
+	 * the connection should have been marked as closed by the
 	 * tftp_in_char() routine.
 	 */
 	if (success && !tcxn.error && (tcxn.open == false))
@@ -411,10 +408,10 @@ int tftp_write(NIF *nif, char *fn, IP_ADDR_P server, uint32_t begin, uint32_t en
 		/* Attempt to send the packet */
 		for (i = 0; i < 3; ++i)
 		{
-			result = udp_send(tcxn.nif, 
-					tcxn.server_ip, 
-					tcxn.my_port, 
-					tcxn.server_port, 
+			result = udp_send(tcxn.nif,
+					tcxn.server_ip,
+					tcxn.my_port,
+					tcxn.server_port,
 					pNbuf);

 			if (result == 1)
@@ -552,8 +549,8 @@ int tftp_in_char(void)

 	if (tcxn.next_char != NULL)
 	{
-		/* 
-		 * A buffer is already being worked on - grab next 
+		/*
+		 * A buffer is already being worked on - grab next
 		 * byte from it
 		 */
 		retval = *tcxn.next_char++;
@@ -561,7 +558,7 @@ int tftp_in_char(void)
 		{
 			/* The buffer is depleted; add it back to the free queue */
 			pNbuf = (NBUF *)queue_remove(&tcxn.queue);
-			
+
 			nbuf_free(pNbuf);
 			tcxn.next_char = NULL;
 		}
--- a/net/udp.c
+++ b/net/udp.c
@@ -14,15 +14,15 @@

 //#define DBG_UDP
 #if defined(DBG_UDP)
-#define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_UDP */

 typedef struct
 {
-	uint16_t port;
-	void (*handler)(NIF *, NBUF *);
+    uint16_t port;
+    void (*handler)(NIF *, NBUF *);
 } UDP_BOUND_PORT;

 #define UDP_MAX_PORTS   (5)     /* plenty for this implementation */
@@ -34,150 +34,151 @@ static uint16_t udp_port;

 void udp_init(void)
 {
-	int index;
+    int index;

-	for (index = 0; index < UDP_MAX_PORTS; ++index)
-	{
-		udp_port_table[index].port = 0;
-	}
+    for (index = 0; index < UDP_MAX_PORTS; ++index)
+    {
+        udp_port_table[index].port = 0;
+        udp_port_table[index].handler = 0;
+    }

-	udp_port = DEFAULT_UDP_PORT;    /* next free port */
+    udp_port = DEFAULT_UDP_PORT;    /* next free port */
 }

 void udp_prime_port(uint16_t init_port)
 {
-	udp_port = init_port;
+    udp_port = init_port;
 }

 void udp_bind_port(uint16_t port, void (*handler)(NIF *, NBUF *))
 {
-	int index;
+    int index;

-	for (index = 0; index < UDP_MAX_PORTS; ++index)
-	{
-		if (udp_port_table[index].port == 0)
-		{
-			udp_port_table[index].port = port;
-			udp_port_table[index].handler = handler;
+    for (index = 0; index < UDP_MAX_PORTS; ++index)
+    {
+        if (udp_port_table[index].port == 0)
+        {
+            udp_port_table[index].port = port;
+            udp_port_table[index].handler = handler;

-			return;
-		}
-	}
+            return;
+        }
+    }
 }

 void udp_free_port(uint16_t port)
 {
-	int index;
+    int index;

-	for (index = 0; index < UDP_MAX_PORTS; ++index)
-	{
-		if (udp_port_table[index].port == port)
-		{
-			udp_port_table[index].port = 0;
+    for (index = 0; index < UDP_MAX_PORTS; ++index)
+    {
+        if (udp_port_table[index].port == port)
+        {
+            udp_port_table[index].port = 0;

-			return;
-		}
-	}
+            return;
+        }
+    }
 }

 static void *udp_port_handler(uint16_t port)
 {
-	int index;
+    int index;

-	for (index = 0; index < UDP_MAX_PORTS; ++index)
-	{
-		if (udp_port_table[index].port == port)
-		{
-			return (void *)udp_port_table[index].handler;
-		}
-	}
-	return NULL;
+    for (index = 0; index < UDP_MAX_PORTS; ++index)
+    {
+        if (udp_port_table[index].port == port)
+        {
+            return (void *) udp_port_table[index].handler;
+        }
+    }
+    return NULL;
 }

 uint16_t udp_obtain_free_port(void)
 {
-	uint16_t port;
+    uint16_t port;

-	port = udp_port;
-	if (--udp_port <= 255)
-		udp_port = DEFAULT_UDP_PORT;
+    port = udp_port;
+    if (--udp_port <= 255)
+        udp_port = DEFAULT_UDP_PORT;

-	return port;
+    return port;
 }

 int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf)
 {
-	uint8_t *myip;
+    uint8_t *myip;

-	if (nif == NULL)
-	{
-		dbg("%s: nif is NULL\r\n", __FUNCTION__);
-		return 0;
-	}
+    if (nif == NULL)
+    {
+        dbg("nif is NULL\r\n");
+        return 0;
+    }

-	/*
-	 * This function takes data and creates a UDP frame and
-	 * passes it onto the IP layer
-	 */
-	udp_frame_hdr *udpframe;
+    /*
+     * This function takes data, creates a UDP frame from it and
+     * passes it onto the IP layer
+     */
+    udp_frame_hdr *udpframe;

-	udpframe = (udp_frame_hdr *) &pNbuf->data[UDP_HDR_OFFSET];
+    udpframe = (udp_frame_hdr *) &pNbuf->data[UDP_HDR_OFFSET];

-	/* Set UDP source port */
-	udpframe->src_port = (uint16_t) sport;
+    /* Set UDP source port */
+    udpframe->src_port = (uint16_t) sport;

-	/* Set UDP destination port */
-	udpframe->dest_port = (uint16_t) dport;
+    /* Set UDP destination port */
+    udpframe->dest_port = (uint16_t) dport;

-	/* Set length */
-	udpframe->length = (uint16_t) (pNbuf->length + UDP_HDR_SIZE);
+    /* Set length */
+    udpframe->length = (uint16_t) (pNbuf->length + UDP_HDR_SIZE);

-	/* No checksum calcualation needed */
-	udpframe->chksum = (uint16_t) 0;
+    /* No checksum calcualation needed */
+    udpframe->chksum = (uint16_t) 0;

-	/* Add the length of the UDP packet to the total length of the packet */
-	pNbuf->length += 8;
+    /* Add the length of the UDP packet to the total length of the packet */
+    pNbuf->length += 8;

-	myip = ip_get_myip(nif_get_protocol_info(nif, ETH_FRM_IP));
+    myip = ip_get_myip(nif_get_protocol_info(nif, ETH_FRM_IP));

-	dbg("%s: sent UDP request to %d.%d.%d.%d from %d.%d.%d.%d\r\n", __FUNCTION__,
-			dest[0], dest[1], dest[2], dest[3],
-			myip[0], myip[1], myip[2], myip[3]);
+    dbg("sent UDP request to %d.%d.%d.%d from %d.%d.%d.%d\r\n",
+            dest[0], dest[1], dest[2], dest[3],
+            myip[0], myip[1], myip[2], myip[3]);

-	return (ip_send(nif, dest, myip, IP_PROTO_UDP, pNbuf));
+    return (ip_send(nif, dest, myip, IP_PROTO_UDP, pNbuf));

 }

 void udp_handler(NIF *nif, NBUF *pNbuf)
 {
-	/*
-	 * This function handles incoming UDP packets
-	 */
-	udp_frame_hdr *udpframe;
-	void (*handler)(NIF *, NBUF *);
+    /*
+     * This function handles incoming UDP packets
+     */
+    udp_frame_hdr *udpframe;
+    void (*handler)(NIF *, NBUF *);

-	udpframe = (udp_frame_hdr *) &pNbuf->data[pNbuf->offset];
+    udpframe = (udp_frame_hdr *) &pNbuf->data[pNbuf->offset];

-	dbg("%s: packet received\r\n", __FUNCTION__);
+    dbg("packet received\r\n",);

-	/*
-	 * Adjust the length and valid data offset of the packet we are
-	 * passing on
-	 */
-	pNbuf->length -= UDP_HDR_SIZE;
-	pNbuf->offset += UDP_HDR_SIZE;
+    /*
+     * Adjust the length and valid data offset of the packet we are
+     * passing on
+     */
+    pNbuf->length -= UDP_HDR_SIZE;
+    pNbuf->offset += UDP_HDR_SIZE;

-	/*
-	 * Traverse the list of bound ports to see if there is a higher
-	 * level protocol to pass the packet on to
-	 */
-	if ((handler = (void(*)(NIF*, NBUF*)) udp_port_handler(UDP_DEST(udpframe))) != NULL)
-		handler(nif, pNbuf);
-	else
-	{
-		dbg("%s: received UDP packet for non-supported port\n", __FUNCTION__);
-		nbuf_free(pNbuf);
-	}
+    /*
+     * Traverse the list of bound ports to see if there is a higher
+     * level protocol to pass the packet on to
+     */
+    if ((handler = (void(*)(NIF*, NBUF*)) udp_port_handler(UDP_DEST(udpframe))) != NULL)
+        handler(nif, pNbuf);
+    else
+    {
+        dbg("received UDP packet for non-supported port\n");
+        nbuf_free(pNbuf);
+    }

-	return;
+    return;
 }
--- a/pci/ehci-hcd.c
+++ b/pci/ehci-hcd.c
--- a/pci/ohci-hcd.c
+++ b/pci/ohci-hcd.c
--- a/pci/pci.c
+++ b/pci/pci.c
--- a/pci/pci_wrappers.S
+++ b/pci/pci_wrappers.S
@@ -0,0 +1,469 @@
+/*
+ * pci.S
+ *
+ * Purpose:		PCI configuration for the Coldfire builtin PCI bridge.
+ *
+ * Notes:
+ *
+ * This file is part of BaS_gcc.
+ *
+ * BaS_gcc is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * BaS_gcc is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *  Created on: 08.05.2014
+ *      Author: David Galvez
+ */
+
+.global _wrapper_find_pci_device
+.global _wrapper_find_pci_classcode
+
+.global _wrapper_read_config_longword
+.global _wrapper_read_config_word
+.global _wrapper_read_config_byte
+
+.global _wrapper_fast_read_config_byte
+.global _wrapper_fast_read_config_word
+.global _wrapper_fast_read_config_longword
+
+.global _wrapper_write_config_longword
+.global _wrapper_write_config_word
+.global _wrapper_write_config_byte
+
+.global _wrapper_get_resource
+.global _wrapper_hook_interrupt
+.global _wrapper_unhook_interrupt
+
+.global _wrapper_special_cycle
+.global _wrapper_get_routing
+.global _wrapper_set_interrupt
+.global _wrapper_get_resource
+.global _wrapper_get_card_used
+.global _wrapper_set_card_used
+
+.global _wrapper_read_mem_byte
+.global _wrapper_read_mem_word
+.global _wrapper_read_mem_longword
+
+.global _wrapper_fast_read_mem_byte
+.global _wrapper_fast_read_mem_word
+.global _wrapper_fast_read_mem_longword
+
+.global _wrapper_write_mem_byte
+.global _wrapper_write_mem_word
+.global _wrapper_write_mem_longword
+
+.global _wrapper_read_io_byte
+.global _wrapper_read_io_word
+.global _wrapper_read_io_longword
+
+.global _wrapper_fast_read_io_byte
+.global _wrapper_fast_read_io_word
+.global _wrapper_fast_read_io_longword
+
+.global _wrapper_write_io_byte
+.global _wrapper_write_io_word
+.global _wrapper_write_io_longword
+
+.global _wrapper_get_machine_id
+.global _wrapper_get_pagesize
+
+.global _wrapper_virt_to_bus
+.global _wrapper_bus_to_virt
+.global _wrapper_virt_to_phys
+.global _wrapper_phys_to_virt
+
+
+_wrapper_find_pci_device:
+	move.l D1,-(SP)			// index
+	move.l D0,-(SP)			// Vendor ID
+	move.l #16,D1
+	lsr.l D1,D0
+	move.l D0,-(SP)			// Device ID
+	jsr _pci_find_device
+	add.l #12,SP
+	rts
+
+_wrapper_find_pci_classcode:
+	move.l D1,-(SP)			// index
+	move.l D0,-(SP)			// ID
+	jsr _pci_find_classcode
+	addq.l #8,SP
+	rts
+
+_wrapper_read_config_byte:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_byte
+	move.l 8(SP),A0			// PCI_BIOS expects value in memory
+	move.l D0,(A0)
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+_wrapper_read_config_word:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_word
+	move.l 8(SP),A0			// little to big endian
+	move.l D0,(A0)
+	mvz.b 1(A0),D0
+	lsl.l #8,D0
+	move.b (A0),D0
+	move.l D0,(A0)			// PCI_BIOS expects value in memory, not in D0
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+_wrapper_read_config_longword:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_longword
+	move.l 8(SP),A0			// little to big endian
+	move.l D0,(A0)
+	mvz.b 3(A0),D0
+	lsl.l #8,D0
+	move.b 2(A0),D0
+	lsl.l #8,D0
+	move.b 1(A0),D0
+	lsl.l #8,D0
+	move.b (A0),D0
+	move.l D0,(A0)			// PCI_BIOS expects value in memory, not in D0
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_byte:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_word:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_longword:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_longword
+	addq.l #8,SP
+	rts
+
+_wrapper_write_config_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_byte
+	add.l #12,SP
+	rts
+
+_wrapper_write_config_word:
+	move.l D0,-(SP)			// make data little endian
+	moveq #0,D1
+	move.w D2,D1
+	lsr.l #8,D1
+	asl.l #8,D2
+	or.l D1,D2
+	move.l (SP)+,D0
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_word
+	add.l #12,SP
+	rts
+
+_wrapper_write_config_longword:
+	move.l D0,-(SP)
+	move.l D2,D0			// make data little endian
+	lsr.l #8,D0
+	asl.l #8,D2
+	and.l #0x00FF00FF,D0
+	and.l #0xFF00FF00,D2
+	or.l D0,D2
+	swap D2
+	move.l (SP)+,D0
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_longword
+	add.l #12,SP
+	rts
+
+_wrapper_hook_interrupt:
+	move.l A1,-(SP)			// parameter for interrupt handler
+	move.l A0,-(SP)			// pointer to interrupt handler
+	move.l D0,-(SP)			// handle
+	jsr _pci_hook_interrupt
+	add.l #12,SP
+	rts
+
+_wrapper_unhook_interrupt:
+	move.l D0,-(SP)			// handle
+	jsr _pci_unhook_interrupt
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_special_cycle:
+	move.l D1,-(SP)			// special cycle data
+	move.l D0,-(SP)			// bus number
+	jsr _pci_special_cycle
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_routing:
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_routing
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_set_interrupt:
+	move.l D1,-(SP)			// mode
+	move.l D0,-(SP)			// handle
+	jsr _pci_set_interrupt
+	addq.l #8,SP
+	rts
+
+_wrapper_get_resource:
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_resource
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_card_used:
+	move.l D1,-(SP)			// address
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_card_used
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_set_card_used:
+	move.l A0,-(SP)			// callback
+	move.l D0,-(SP)			// handle
+	jsr _pci_set_card_used
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_byte:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_word:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_longword:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_byte:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_word:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_longword:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_longword
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_word:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_longword:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_byte:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_word:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_longword:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_byte:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_word:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_longword:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_longword
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_word:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_longword:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_machine_id:
+	jsr _pci_get_machine_id
+	rts
+
+/* Not implemented */
+_wrapper_get_pagesize:
+	jsr _pci_get_pagesize
+	rts
+
+/* Not implemented */
+_wrapper_virt_to_bus:
+	move.l A0,-(SP)			// ptr
+	move.l D1,-(SP)			// address in virtual CPU space
+	move.l D0,-(SP)			// handle
+	jsr _pci_virt_to_bus
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_bus_to_virt:
+	move.l A0,-(SP)			// ptr
+	move.l D1,-(SP)			// PCI bus address
+	move.l D0,-(SP)			// handle
+	jsr _pci_bus_to_virt
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_virt_to_phys:
+	move.l A0,-(SP)			// ptr
+	move.l D0,-(SP)			// address in virtual CPU space
+	jsr _pci_virt_to_phys
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_phys_to_virt:
+	move.l A0,-(SP)			// ptr
+	move.l D0,-(SP)			// physical CPU address 
+	jsr _pci_phys_to_virt
+	addq.l #8,SP
+	rts
--- a/radeon/radeon_base.c
+++ b/radeon/radeon_base.c
@@ -74,7 +74,15 @@ extern void run_bios(struct radeonfb_info *rinfo);
 #define MIN_MAPPED_VRAM	(1024*768*4)

 #define CHIP_DEF(id, family, flags)					\
-	{ PCI_VENDOR_ID_ATI, id, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (flags) | (CHIP_FAMILY_##family) }
+{													\
+	PCI_VENDOR_ID_ATI, 								\
+	id,												\
+	PCI_ANY_ID,										\
+	PCI_ANY_ID,										\
+	0,												\
+	0,												\
+	(flags) | (CHIP_FAMILY_##family)				\
+}

 struct pci_device_id radeonfb_pci_table[] = 
 {
@@ -231,7 +239,7 @@ extern struct fb_info *info_fb;
 #define rinfo ((struct radeonfb_info *) info_fb->par)
 static uint32_t inreg(uint32_t addr)
 {
-	return(INREG(addr));
+	return INREG(addr);
 }

 static void outreg(uint32_t addr, uint32_t val)
@@ -332,12 +340,10 @@ static int round_div(int num, int den)
 	return(num + (den / 2)) / den;
 }

-#ifndef MCF5445X
 static uint32_t read_vline_crnt(struct radeonfb_info *rinfo)
 {
 	return((INREG(CRTC_VLINE_CRNT_VLINE) >> 16) & 0x3FF);
 }
-#endif

 static int radeon_map_ROM(struct radeonfb_info *rinfo)
 {
@@ -510,10 +516,12 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)

 	hz = US_TO_TIMER(1000000.0) / (double)(stop_tv - start_tv);
 	dbg("%s:hz %d\r\n", __FUNCTION__, (int32_t) hz);
+
 	hTotal = ((INREG(CRTC_H_TOTAL_DISP) & 0x1ff) + 1) * 8;
 	vTotal = ((INREG(CRTC_V_TOTAL_DISP) & 0x3ff) + 1);
 	dbg("%s:hTotal=%d\r\n", __FUNCTION__, hTotal);
 	dbg("%s:vTotal=%d\r\n", __FUNCTION__, vTotal);
+
 	vclk = (double) hTotal * (double) vTotal * hz;
 	dbg("%s:vclk=%d\r\n", __FUNCTION__, (int) vclk);

@@ -525,41 +533,52 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)
 			num = 2 * n;
 			denom = 2 * m;
 			break;
+
 		case 2:
 			n = ((INPLL(M_SPLL_REF_FB_DIV) >> 8) & 0xff);
 			m = (INPLL(M_SPLL_REF_FB_DIV) & 0xff);
 			num = 2 * n;
 			denom = 2 * m;
 			break;
+
 		case 0:
 		default:
 			num = 1;
 			denom = 1;
 			break;
 	}
+
 	ppll_div_sel = INREG8(CLOCK_CNTL_INDEX + 1) & 0x3;
 	radeon_pll_errata_after_index(rinfo);
+
 	n = (INPLL(PPLL_DIV_0 + ppll_div_sel) & 0x7ff);
 	m = (INPLL(PPLL_REF_DIV) & 0x3ff);
+
 	num *= n;
 	denom *= m;
+
 	switch((INPLL(PPLL_DIV_0 + ppll_div_sel) >> 16) & 0x7)
 	{
 		case 1:
 			denom *= 2;
 			break;
+
 		case 2:
 			denom *= 4;
 			break;
+			
 		case 3:
 			denom *= 8;
 			break;
+
 		case 4:
 			denom *= 3;
 			break;
+
 		case 6:
 			denom *= 6;   
 			break;
+
 		case 7:
 			denom *= 12;
 			break;
@@ -567,6 +586,7 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)
 	vclk *= (double) denom;
 	vclk /= (double) (1000 * num);
 	xtal = (int32_t) vclk;
+
 	if ((xtal > 26900) && (xtal < 27100))
 		xtal = 2700;   /* 27 MHz */
 	else if ((xtal > 14200) && (xtal < 14400))
@@ -578,6 +598,7 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)
 		dbg("%s: xtal calculation failed: %d\r\n", __FUNCTION__, xtal);
 		return -1; /* error */
 	}
+
 	tmp = INPLL(M_SPLL_REF_FB_DIV);
 	ref_div = INPLL(PPLL_REF_DIV) & 0x3ff;

@@ -619,6 +640,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
 			rinfo->pll.sclk = 23000;
 			rinfo->pll.ref_clk = 2700;
 			break;
+
 		case PCI_DEVICE_ID_ATI_RADEON_QL:
 		case PCI_DEVICE_ID_ATI_RADEON_QN:
 		case PCI_DEVICE_ID_ATI_RADEON_QO:
@@ -630,6 +652,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
 			rinfo->pll.sclk = 27500;
 			rinfo->pll.ref_clk = 2700;
 			break;
+
 		case PCI_DEVICE_ID_ATI_RADEON_Id:
 		case PCI_DEVICE_ID_ATI_RADEON_Ie:
 		case PCI_DEVICE_ID_ATI_RADEON_If:
@@ -640,6 +663,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
 			rinfo->pll.sclk = 25000;
 			rinfo->pll.ref_clk = 2700;
 			break;
+
 		case PCI_DEVICE_ID_ATI_RADEON_ND:
 		case PCI_DEVICE_ID_ATI_RADEON_NE:
 		case PCI_DEVICE_ID_ATI_RADEON_NF:
@@ -650,6 +674,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
 			rinfo->pll.sclk = 27000;
 			rinfo->pll.ref_clk = 2700;
 			break;
+
 		case PCI_DEVICE_ID_ATI_RADEON_QD:
 		case PCI_DEVICE_ID_ATI_RADEON_QE:
 		case PCI_DEVICE_ID_ATI_RADEON_QF:
@@ -690,10 +715,12 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
 		dbg("%s: Retreived PLL infos from registers\r\n", __FUNCTION__);
 		goto found;
 	}
+
 	/*
 	 * Fall back to already-set defaults...
 	 */
 	dbg("%s: Used default PLL infos\r\n", __FUNCTION__);
+
 found:
 	/*
 	 * Some methods fail to retreive SCLK and MCLK values, we apply default
@@ -707,13 +734,15 @@ found:

 	dbg("%s: Reference=%d MHz (RefDiv=0x%x) Memory=%d MHz\r\n", __FUNCTION__,
 			rinfo->pll.ref_clk / 100, rinfo->pll.ref_div, rinfo->pll.mclk / 100);
-	dbg("%s: System=%d MHz PLL min %d, max %d\r\n", __FUNCTION__, rinfo->pll.sclk / 100, rinfo->pll.ppll_min, rinfo->pll.ppll_max);
+	dbg("%s: System=%d MHz PLL min %d, max %d\r\n", __FUNCTION__,
+			rinfo->pll.sclk / 100, rinfo->pll.ppll_min, rinfo->pll.ppll_max);
 }

 static int var_to_depth(const struct fb_var_screeninfo *var)
 {
 	if (var->bits_per_pixel != 16)
 		return var->bits_per_pixel;
+
 	return(var->green.length == 5) ? 15 : 16;
 }

@@ -723,6 +752,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 	struct fb_var_screeninfo v;
 	int nom, den;
 	uint32_t pitch;
+
 	dbg("%s:\r\n", __FUNCTION__);

 	/* clocks over 135 MHz have heat isues with DVI on RV100 */
@@ -742,9 +772,11 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 		case 0 ... 8:
 			v.bits_per_pixel = 8;
 			break;
+
 		case 9 ... 16:
 			v.bits_per_pixel = 16;
 			break;
+
 #if 0 /* Doesn't seem to work */
 		case 17 ... 24:
 			v.bits_per_pixel = 24;
@@ -753,6 +785,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 		case 25 ... 32:
 			v.bits_per_pixel = 32;
 			break;
+
 		default:
 			return -1; //-EINVAL;
 	}
@@ -765,6 +798,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 			v.red.length = v.green.length = v.blue.length = 8;
 			v.transp.offset = v.transp.length = 0;
 			break;
+
 		case 15:
 			nom = 2;
 			den = 1;
@@ -774,6 +808,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 			v.red.length = v.green.length = v.blue.length = 5;
 			v.transp.offset = v.transp.length = 0;
 			break;
+
 		case 16:
 			nom = 2;
 			den = 1;
@@ -785,6 +820,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 			v.blue.length = 5;
 			v.transp.offset = v.transp.length = 0;
 			break;                          
+
 		case 24:
 			nom = 4;
 			den = 1;
@@ -794,6 +830,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 			v.red.length = v.blue.length = v.green.length = 8;
 			v.transp.offset = v.transp.length = 0;
 			break;
+
 		case 32:
 			nom = 4;
 			den = 1;
@@ -804,6 +841,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 			v.transp.offset = 24;
 			v.transp.length = 8;
 			break;
+
    default:
 			dbg("radeonfb: mode %d x %d x %d rejected, color depth invalid\r\n ",
 					var->xres, var->yres, var->bits_per_pixel);
@@ -814,6 +852,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 		v.yres_virtual = v.yres;
 	if (v.xres_virtual < v.xres)
 		v.xres_virtual = v.xres;
+
 	/*
 	 * XXX I'm adjusting xres_virtual to the pitch, that may help XFree
 	 * with some panels, though I don't quite like this solution
@@ -848,6 +887,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 	dbg("%s: using mode %d x %d \r\n", __FUNCTION__, v.xres, v.yres);

 	memcpy(var, &v, sizeof(v));
+
 	return 0;
 }

@@ -857,16 +897,20 @@ int radeonfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 //	DPRINT("radeonfb: radeonfb_pan_display\r\n");
 	if ((var->xoffset + var->xres) > var->xres_virtual)
 		return -1; //-EINVAL;
+
 	if (((var->yoffset * var->xres_virtual) + var->xoffset) >=
 	 (rinfo->mapped_vram - (var->yres * var->xres * (var->bits_per_pixel / 8))))
 		return -1; //-EINVAL;
+
 	if (rinfo->asleep)
 		return 0;
+
 	radeon_wait_for_fifo(rinfo, 2);
 	rinfo->fb_offset = ((var->yoffset * var->xres_virtual + var->xoffset) * var->bits_per_pixel / 8) & ~7;
 	rinfo->dst_pitch_offset = (rinfo->pitch << 22) | ((rinfo->fb_local_base + rinfo->fb_offset) >> 10);
 	OUTREG(CRTC_OFFSET, rinfo->fb_offset);
-  return 0;
+
+	return 0;
 }

 short mirror;
@@ -876,6 +920,7 @@ int radeonfb_ioctl(unsigned int cmd, unsigned long arg, struct fb_info *info)
 	struct radeonfb_info *rinfo = info->par;
 	uint32_t tmp;
 	uint32_t value = 0;
+
 	switch(cmd)
 	{
 		/*
@@ -899,6 +944,7 @@ int radeonfb_ioctl(unsigned int cmd, unsigned long arg, struct fb_info *info)
 				tmp &= ~(LVDS_ON | LVDS_BLON);
 			}
 			OUTREG(LVDS_GEN_CNTL, tmp);
+
 			if (value & 0x02)
 			{
 				tmp = INREG(CRTC_EXT_CNTL);
@@ -913,6 +959,7 @@ int radeonfb_ioctl(unsigned int cmd, unsigned long arg, struct fb_info *info)
 			}
 			OUTREG(CRTC_EXT_CNTL, tmp);
 			return 0;
+
 		case FBIO_RADEON_GET_MIRROR:
 			if (!rinfo->is_mobility)
 				return -1; //-EINVAL;
@@ -923,6 +970,7 @@ int radeonfb_ioctl(unsigned int cmd, unsigned long arg, struct fb_info *info)
 			if (CRTC_CRT_ON & tmp)
 				value |= 0x02;
 			return 0;
+
 		default:
 			return -1; //-EINVAL;
 	}
@@ -937,24 +985,30 @@ int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t

 	if (rinfo->lock_blank)
 		return 0;
+
 	dbg("radeonfb: radeon_screen_blank\r\n");
 	radeon_engine_idle();
 	val = INREG(CRTC_EXT_CNTL);
 	val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | CRTC_VSYNC_DIS);
+
 	switch(blank)
 	{
 		case FB_BLANK_VSYNC_SUSPEND:
 			val |= (CRTC_DISPLAY_DIS | CRTC_VSYNC_DIS);
 			break;
+
 		case FB_BLANK_HSYNC_SUSPEND:
 			val |= (CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS);
 			break;
+
 		case FB_BLANK_POWERDOWN:
 			val |= (CRTC_DISPLAY_DIS | CRTC_VSYNC_DIS | CRTC_HSYNC_DIS);
 			break;
+
 		case FB_BLANK_NORMAL:
 			val |= CRTC_DISPLAY_DIS;
 			break;
+
 		case FB_BLANK_UNBLANK:
 		default:
 			unblank = 1;
@@ -974,6 +1028,7 @@ int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t
 				OUTREGP(FP_GEN_CNTL, 0, ~(FP_FPON | FP_TMDS_EN));
 			}
 			break;
+
 		case MT_LCD:
 			rinfo->lvds_timer = 0;
 			val = INREG(LVDS_GEN_CNTL);
@@ -1007,15 +1062,19 @@ int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t
 				/* We don't do a full switch-off on a simple mode switch */
 				if (mode_switch || blank == FB_BLANK_NORMAL)
 					break;
+
 				/* Asic bug, when turning off LVDS_ON, we have to make sure
 				 * RADEON_PIXCLK_LVDS_ALWAYS_ON bit is off
 				 */
 				tmp_pix_clks = INPLL(PIXCLKS_CNTL);
 				if (rinfo->is_mobility || rinfo->is_IGP)
 					OUTPLLP(PIXCLKS_CNTL, 0, ~PIXCLK_LVDS_ALWAYS_ONb);
+
 				val &= ~(LVDS_BL_MOD_EN);
 				OUTREG(LVDS_GEN_CNTL, val);
+
 				wait(100);
+
 				val &= ~(LVDS_ON | LVDS_EN);
 				OUTREG(LVDS_GEN_CNTL, val);
 				val &= ~LVDS_DIGON;
@@ -1023,6 +1082,7 @@ int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t
 				rinfo->lvds_timer = (int32_t)rinfo->panel_info.pwr_delay;
 				rinfo->init_state.lvds_gen_cntl &= ~LVDS_STATE_MASK;
 				rinfo->init_state.lvds_gen_cntl |= val & LVDS_STATE_MASK;
+
 				if (rinfo->is_mobility || rinfo->is_IGP)
 					OUTPLL(PIXCLKS_CNTL, tmp_pix_clks);
 			}
@@ -1039,8 +1099,10 @@ int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t
 int radeonfb_blank(int blank, struct fb_info *info)
 {
 	struct radeonfb_info *rinfo = info->par;
+
 	if (rinfo->asleep)
 		return 0;
+
 	return radeon_screen_blank(rinfo, blank, 0);
 }

@@ -1049,14 +1111,18 @@ static int radeon_setcolreg(unsigned regno, unsigned red, unsigned green,
 {
 	struct radeonfb_info *rinfo = info->par;
 	uint32_t pindex;
+
 	if (regno > 255)
 		return 1;
+
 	red >>= 8;
 	green >>= 8;
 	blue >>= 8;
+
 	rinfo->palette[regno].red = red;
 	rinfo->palette[regno].green = green;
 	rinfo->palette[regno].blue = blue;
+
 	/* default */
 	pindex = regno;
 	if (!rinfo->asleep)
@@ -1069,7 +1135,9 @@ static int radeon_setcolreg(unsigned regno, unsigned red, unsigned green,
 				return 1;
 			if (rinfo->depth == 15 && regno > 31)
 				return 1;
-			/* For 565, the green component is mixed one order
+
+			/*
+			 * For 565, the green component is mixed one order
 			 * below
 			 */
 			if (rinfo->depth == 16)
@@ -1095,6 +1163,7 @@ int radeonfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 	struct radeonfb_info *rinfo = info->par;
 	uint32_t dac_cntl2, vclk_cntl = 0;
 	int rc;
+
 	if (!rinfo->asleep)
 	{
 		if (rinfo->is_mobility)
@@ -1102,6 +1171,7 @@ int radeonfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 			vclk_cntl = INPLL(VCLK_ECP_CNTL);
 			OUTPLL(VCLK_ECP_CNTL, vclk_cntl & ~PIXCLK_DAC_ALWAYS_ONb);
 		}
+
 		/* Make sure we are on first palette */
 		if (rinfo->has_CRTC2)
 		{
@@ -1113,6 +1183,7 @@ int radeonfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 	rc = radeon_setcolreg(regno, red, green, blue, transp, info);
 	if (!rinfo->asleep && rinfo->is_mobility)
 		OUTPLL(VCLK_ECP_CNTL, vclk_cntl);
+
 	return rc;
 }

@@ -1129,6 +1200,7 @@ static void radeon_save_state(struct radeonfb_info *rinfo, struct radeon_regs *s
 	save->crtc_v_sync_strt_wid = INREG(CRTC_V_SYNC_STRT_WID);
 	save->crtc_pitch = INREG(CRTC_PITCH);
 	save->surface_cntl = INREG(SURFACE_CNTL);
+
 	/* FP regs */
 	save->fp_crtc_h_total_disp = INREG(FP_CRTC_H_TOTAL_DISP);
 	save->fp_crtc_v_total_disp = INREG(FP_CRTC_V_TOTAL_DISP);
@@ -1143,6 +1215,7 @@ static void radeon_save_state(struct radeonfb_info *rinfo, struct radeon_regs *s
 	save->tmds_transmitter_cntl = INREG(TMDS_TRANSMITTER_CNTL);
 	save->vclk_ecp_cntl = INPLL(VCLK_ECP_CNTL);
 	/* PLL regs */
+
 	save->clk_cntl_index = INREG(CLOCK_CNTL_INDEX) & ~0x3f;
 	radeon_pll_errata_after_index(rinfo);
 	save->ppll_div_3 = INPLL(PPLL_DIV_3);
@@ -1152,8 +1225,10 @@ static void radeon_save_state(struct radeonfb_info *rinfo, struct radeon_regs *s
 static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *mode)
 {
 	int i;
+
 	dbg("radeonfb: radeon_write_pll_regs\r\n");
 	radeon_wait_for_fifo(rinfo, 20);
+
 #if 0
 	/* Workaround from XFree */
 	if (rinfo->is_mobility)
@@ -1180,22 +1255,27 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
 		}
 	}
 #endif
+
 	/* Swich VCKL clock input to CPUCLK so it stays fed while PPLL updates*/
 	OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_CPUCLK, ~VCLK_SRC_SEL_MASK);
+
 	/* Reset PPLL & enable atomic update */
 	OUTPLLP(PPLL_CNTL, PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN,
 	 ~(PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN));
+
 	/* Switch to selected PPLL divider */
 	OUTREGP(CLOCK_CNTL_INDEX,	mode->clk_cntl_index & PPLL_DIV_SEL_MASK, ~PPLL_DIV_SEL_MASK);
 	radeon_pll_errata_after_index(rinfo);
 	radeon_pll_errata_after_data(rinfo);
+
 	/* Set PPLL ref. div */
 	if (rinfo->family == CHIP_FAMILY_R300 || rinfo->family == CHIP_FAMILY_RS300
 	 || rinfo->family == CHIP_FAMILY_R350 || rinfo->family == CHIP_FAMILY_RV350)
 	{
 		if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK)
 		{
-			/* When restoring console mode, use saved PPLL_REF_DIV
+			/*
+			 * When restoring console mode, use saved PPLL_REF_DIV
 			 * setting.
 			 */
 			OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, 0);
@@ -1216,17 +1296,22 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
 	/* Write update */
 	while (INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R);
 	OUTPLLP(PPLL_REF_DIV, PPLL_ATOMIC_UPDATE_W, ~PPLL_ATOMIC_UPDATE_W);
+
 	/* Wait read update complete */
 	/* FIXME: Certain revisions of R300 can't recover here.  Not sure of
 	   the cause yet, but this workaround will mask the problem for now.
 	   Other chips usually will pass at the very first test, so the
 	   workaround shouldn't have any effect on them. */
-	for(i = 0; (i < 10000 && INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R); i++);
+
+	for (i = 0; (i < 10000 && INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R); i++);
 	OUTPLL(HTOTAL_CNTL, 0);
+
 	/* Clear reset & atomic update */
 	OUTPLLP(PPLL_CNTL, 0, ~(PPLL_RESET | PPLL_SLEEP | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN));
+
 	/* We may want some locking ... oh well */
 	radeon_msleep(5);
+
 	/* Switch back VCLK source to PPLL */
 	OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_PPLLCLK, ~VCLK_SRC_SEL_MASK);
 }
@@ -1248,6 +1333,7 @@ static void radeon_timer_func(void)

 #ifdef FIXME_LATER
 	static int32_t start_timer;
+
 	/* delayed LVDS panel power up/down */
 	if (rinfo->lvds_timer)
 	{
@@ -1263,10 +1349,11 @@ static void radeon_timer_func(void)
 	}
 	else
 		start_timer = 0;
-#endif
+#endif /* FIXME_LATER */

 	if (rinfo->RenderCallback != NULL)
 		rinfo->RenderCallback(rinfo);
+
 	if ((info->screen_mono != NULL) && info->update_mono)
 	{
 		int32_t foreground = 255, background = 0;
@@ -1275,21 +1362,25 @@ static void radeon_timer_func(void)
 		int dst_x = 0;
 		int w = (int)info->var.xres_virtual;
 		int h = (int)info->var.yres_virtual;
+
 //		info->fbops->SetClippingRectangle(info,0,0,w-1,h-1);
 		src_buf = (uint8_t*)((int32_t)src_buf & ~3);
 		dst_x -= (int32_t)skipleft;
 		w += (int32_t)skipleft;
 		info->fbops->SetupForScanlineCPUToScreenColorExpandFill(info,(int)foreground,(int)background,3,0xffffffff);
 		info->fbops->SubsequentScanlineCPUToScreenColorExpandFill(info,(int)dst_x,0,w,h,skipleft);
+
 		while (--h >= 0)
 		{
 			info->fbops->SubsequentScanline(info, (unsigned long *) src_buf);
 			src_buf += (info->var.xres_virtual >> 3);
 		}
+
 //		info->fbops->DisableClipping(info);
 		if (info->update_mono > 0)
 			info->update_mono = 0;
 	}
+
 	if ((info->var.xres_virtual != info->var.xres)
 	 || (info->var.yres_virtual != info->var.yres))
 	{
@@ -1310,6 +1401,7 @@ static void radeon_timer_func(void)
 			x -= 8;
 			chg = 1;
 		}
+
 		if (((y + info->var.yres) < info->var.yres_virtual) && (rinfo->cursor_y >= (info->var.yres - 8)))
 		{
 			y += 8;
@@ -1329,7 +1421,9 @@ static void radeon_timer_func(void)
 			disp = rinfo->cursor_show;
 			if (disp)
 				info->fbops->HideCursor(info);
+
 			fb_pan_display(info,&var);
+
 			if (disp)
 				info->fbops->ShowCursor(info);
 		}
@@ -1345,14 +1439,19 @@ void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, in
 {
 	int i;
 	int primary_mon = PRIMARY_MONITOR(rinfo);
+
 	dbg("radeonfb: radeon_write_mode\r\n");
+
 	if (!regs_only)
 		radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0);
+
 	radeon_wait_for_fifo(rinfo, 31);
-	for(i=0; i<10; i++)
+
+	for (i = 0; i < 10; i++)
 		OUTREG(common_regs[i].reg, common_regs[i].val);
+
 	/* Apply surface registers */
-	for(i=0; i<8; i++)
+	for (i = 0; i < 8; i++)
 	{
 		OUTREG(SURFACE0_LOWER_BOUND + 0x10*i, mode->surf_lower_bound[i]);
 		OUTREG(SURFACE0_UPPER_BOUND + 0x10*i, mode->surf_upper_bound[i]);
@@ -1380,9 +1479,11 @@ void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, in
 	else
 #endif
 		OUTREG(CRTC_OFFSET_CNTL, 0);
+
 	OUTREG(CRTC_PITCH, mode->crtc_pitch);
 	OUTREG(SURFACE_CNTL, mode->surface_cntl);
 	radeon_write_pll_regs(rinfo, mode);
+
 	if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD))
 	{
 		radeon_wait_for_fifo(rinfo, 10);
@@ -1396,6 +1497,7 @@ void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, in
 		OUTREG(TMDS_CRC, mode->tmds_crc);
 		OUTREG(TMDS_TRANSMITTER_CNTL, mode->tmds_transmitter_cntl);
 	}
+
 	if (!regs_only)
 		radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0);
 	radeon_wait_for_fifo(rinfo, 2);
@@ -1407,11 +1509,13 @@ void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, in
 */
 static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *regs, uint32_t freq)
 {
-	static const struct {
+	static const struct
+	{
 		int divider;
 		int bitvalue;
 	} *post_div,
-	post_divs[] = {
+	post_divs[] =
+	{
 		{ 1,  0 },
 		{ 2,  1 },
 		{ 4,  2 },
@@ -1424,6 +1528,7 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
 	};
 	int fb_div, pll_output_freq = 0;
 	int uses_dvo = 0;
+
 	/* Check if the DVO port is enabled and sourced from the primary CRTC. I'm
 	 * not sure which model starts having FP2_GEN_CNTL, I assume anything more
 	 * recent than an r(v)100...
@@ -1443,9 +1548,11 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
 		uint32_t fp2_gen_cntl = INREG(FP2_GEN_CNTL);
 		uint32_t disp_output_cntl;
 		int source;
+
 		/* FP2 path not enabled */
 		if ((fp2_gen_cntl & FP2_ON) == 0)
 			break;
+
 		/* Not all chip revs have the same format for this register,
 		 * extract the source selection
 		 */
@@ -1464,9 +1571,11 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
 		}
 		else
 			source = (fp2_gen_cntl >> 13) & 0x1;
+
 		/* sourced from CRTC2 -> exit */
 		if (source == 1)
 			break;
+
 		/* so we end up on CRTC1, let's set uses_dvo to 1 now */
 		uses_dvo = 1;
 		break;
@@ -1476,27 +1585,32 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
 #endif
 	if (freq > rinfo->pll.ppll_max)
 		freq = rinfo->pll.ppll_max;
-	if (freq*12 < rinfo->pll.ppll_min)
+	if (freq * 12 < rinfo->pll.ppll_min)
 		freq = rinfo->pll.ppll_min / 12;
-	for(post_div = &post_divs[0]; post_div->divider; ++post_div)
+	for (post_div = &post_divs[0]; post_div->divider; ++post_div)
 	{
 		pll_output_freq = post_div->divider * freq;
-		/* If we output to the DVO port (external TMDS), we don't allow an
+
+		/*
+		 * If we output to the DVO port (external TMDS), we don't allow an
 		 * odd PLL divider as those aren't supported on this path
 		 */
 		if (uses_dvo && (post_div->divider & 1))
 			continue;
+
 		if (pll_output_freq >= rinfo->pll.ppll_min  &&
 		    pll_output_freq <= rinfo->pll.ppll_max)
 			break;
 	}
+
 	/* If we fall through the bottom, try the "default value"
 	   given by the terminal post_div->bitvalue */
-	if ( !post_div->divider )
+	if (!post_div->divider)
 	{
 		post_div = &post_divs[post_div->bitvalue];
 		pll_output_freq = post_div->divider * freq;
 	}
+
 	/* If we fall through the bottom, try the "default value"
 	   given by the terminal post_div->bitvalue */
 	if ( !post_div->divider )
@@ -1535,6 +1649,7 @@ int radeonfb_set_par(struct fb_info *info)
 	newmode = (struct radeon_regs *) driver_mem_alloc(sizeof(struct radeon_regs));
 	if (!newmode)
 		return -1; //-ENOMEM;
+
 	/* We always want engine to be idle on a mode switch, even
 	 * if we won't actually change the mode
 	 */
@@ -1582,24 +1697,29 @@ int radeonfb_set_par(struct fb_info *info)
 			newmode->ppll_ref_div = rinfo->panel_info.ref_divider;
 		}
 	}
+
 	dotClock = 1000000000 / pixClock;
 	freq = dotClock / 10; /* x100 */
 	hsync_wid = (hSyncEnd - hSyncStart) / 8;
+
 	if (hsync_wid == 0)
 		hsync_wid = 1;
 	else if (hsync_wid > 0x3f)	/* max */
 		hsync_wid = 0x3f;
+
 	if (mode->vmode & FB_VMODE_DOUBLE)
 	{
 		vSyncStart <<= 1;
 		vSyncEnd <<= 1;
 		vTotal <<= 1;
 	}
+
 	vsync_wid = vSyncEnd - vSyncStart;
 	if (vsync_wid == 0)
 		vsync_wid = 1;
 	else if (vsync_wid > 0x1f)	/* max */
 		vsync_wid = 0x1f;
+
 	// FIXME: this doesn't seem to be used anywhere hSyncPol = mode->sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
 	// FIXME: this doesn't seem to be used anywhere vSyncPol = mode->sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
 	// FIXME: this doesn't seem to be used anywhere cSync = mode->sync & FB_SYNC_COMP_HIGH_ACT ? (1 << 4) : 0;
@@ -1624,6 +1744,7 @@ int radeonfb_set_par(struct fb_info *info)
 	/* Clear auto-center etc... */
 	newmode->crtc_more_cntl = rinfo->init_state.crtc_more_cntl;
 	newmode->crtc_more_cntl &= 0xfffffff0;
+
 	if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD))
 	{
 		newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN;
@@ -1633,13 +1754,16 @@ int radeonfb_set_par(struct fb_info *info)
 	}
 	else
 		newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN | CRTC_CRT_ON;
+
 	newmode->dac_cntl = /* INREG(DAC_CNTL) | */ DAC_MASK_ALL | DAC_VGA_ADR_EN | DAC_8BIT_EN;
 	newmode->crtc_h_total_disp = ((((hTotal / 8) - 1) & 0x3ff) | (((mode->xres / 8) - 1) << 16));
 	newmode->crtc_h_sync_strt_wid = ((hsync_start & 0x1fff) | (hsync_wid << 16) | (h_sync_pol << 23));
+
 	if (mode->vmode & FB_VMODE_DOUBLE)
 		newmode->crtc_v_total_disp = ((vTotal - 1) & 0xffff) | (((mode->yres << 1) - 1) << 16);
 	else
 		newmode->crtc_v_total_disp = ((vTotal - 1) & 0xffff) | ((mode->yres - 1) << 16);
+
 	newmode->crtc_v_sync_strt_wid = (((vSyncStart - 1) & 0xfff) | (vsync_wid << 16) | (v_sync_pol << 23));
 	/* We first calculate the engine pitch */
 	rinfo->pitch = ((mode->xres_virtual * ((mode->bits_per_pixel + 1) / 8) + 0x3f) & ~(0x3f)) >> 6;
@@ -1653,6 +1777,7 @@ int radeonfb_set_par(struct fb_info *info)
 	 * swapper as well, so we leave it unset now.
 	 */
 	newmode->surface_cntl = 0;
+
 	if (rinfo->big_endian)
 	{
 		/* Setup swapping on both apertures, though we currently
@@ -1674,12 +1799,13 @@ int radeonfb_set_par(struct fb_info *info)
 	}

 	/* Clear surface registers */
-	for(i = 0; i < 8; i++)
+	for (i = 0; i < 8; i++)
 	{
 		newmode->surf_lower_bound[i] = 0;
 		newmode->surf_upper_bound[i] = 0x1f;
 		newmode->surf_info[i] = 0;
 	}
+
 	rinfo->bpp = mode->bits_per_pixel;
 	rinfo->depth = depth;

@@ -1724,6 +1850,7 @@ int radeonfb_set_par(struct fb_info *info)
 		 & ~(FP_SEL_CRTC2 | FP_RMX_HVSYNC_CONTROL_EN | FP_DFP_SYNC_SEL | FP_CRT_SYNC_SEL
 		  | FP_CRTC_LOCK_8DOT | FP_USE_SHADOW_EN | FP_CRTC_USE_SHADOW_VEND | FP_CRT_SYNC_ALT));
 		newmode->fp_gen_cntl |= (FP_CRTC_DONT_SHADOW_VPAR | FP_CRTC_DONT_SHADOW_HEND | FP_PANEL_FORMAT);
+
 		if (IS_R300_VARIANT(rinfo) || (rinfo->family == CHIP_FAMILY_R200))
 		{
 			newmode->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
@@ -1734,10 +1861,12 @@ int radeonfb_set_par(struct fb_info *info)
 		}
 		else
 			newmode->fp_gen_cntl |= FP_SEL_CRTC1;
+
 		newmode->lvds_gen_cntl = rinfo->init_state.lvds_gen_cntl;
 		newmode->lvds_pll_cntl = rinfo->init_state.lvds_pll_cntl;
 		newmode->tmds_crc = rinfo->init_state.tmds_crc;
 		newmode->tmds_transmitter_cntl = rinfo->init_state.tmds_transmitter_cntl;
+
 		if (primary_mon == MT_LCD)
 		{
 			newmode->lvds_gen_cntl |= (LVDS_ON | LVDS_BLON);
@@ -1755,11 +1884,13 @@ int radeonfb_set_par(struct fb_info *info)
 				newmode->tmds_transmitter_cntl |= TMDS_PLL_EN;
 			newmode->crtc_ext_cntl &= ~CRTC_CRT_ON;
 		}
+
 		newmode->fp_crtc_h_total_disp = (((rinfo->panel_info.hblank / 8) & 0x3ff) | (((mode->xres / 8) - 1) << 16));
 		newmode->fp_crtc_v_total_disp = (rinfo->panel_info.vblank & 0xffff) | ((mode->yres - 1) << 16);
 		newmode->fp_h_sync_strt_wid = ((rinfo->panel_info.hOver_plus & 0x1fff) | (hsync_wid << 16) | (h_sync_pol << 23));
 		newmode->fp_v_sync_strt_wid = ((rinfo->panel_info.vOver_plus & 0xfff) | (vsync_wid << 16) | (v_sync_pol  << 23));
 	}
+
 	/* do it! */
 	if (!rinfo->asleep)
 	{
@@ -1778,10 +1909,12 @@ int radeonfb_set_par(struct fb_info *info)
 		/* (re)initialize the engine */
 		radeon_engine_init(rinfo);
 	}
+
 	/* Update fix */
 	info->fix.line_length = rinfo->pitch*64;
 	info->fix.visual = rinfo->depth == 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
 	driver_mem_free(newmode);
+
 	return 0;
 }

--- a/radeon/radeon_cursor.c
+++ b/radeon/radeon_cursor.c
@@ -44,11 +44,13 @@
 *
 */

+#include "bas_types.h"
+#include "bas_printf.h"
 #include "radeonfb.h"

 #define DBG_RADEON
 #ifdef DBG_RADEON
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_RADEON */
@@ -66,20 +68,20 @@
 #define CURSOR_SWAPPING_DECL_MMIO
 #define CURSOR_SWAPPING_DECL	    unsigned long  __surface_cntl=0;
 #define CURSOR_SWAPPING_START() \
-	if(rinfo->big_endian) \
+    if (rinfo->big_endian) \
    OUTREG(SURFACE_CNTL, \
 	   ((__surface_cntl = INREG(SURFACE_CNTL)) | \
 	    NONSURF_AP0_SWP_32BPP) & \
 	   ~NONSURF_AP0_SWP_16BPP);
 #define CURSOR_SWAPPING_END() \
-	if(rinfo->big_endian) \
+    if (rinfo->big_endian) \
 	(OUTREG(SURFACE_CNTL, __surface_cntl));

 /* Set cursor foreground and background colors */
 void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
 {
 	struct radeonfb_info *rinfo = info->par;
-	unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base+rinfo->cursor_start);
+    unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base + rinfo->cursor_start);
 	int pixel, i;
 	CURSOR_SWAPPING_DECL_MMIO
 	CURSOR_SWAPPING_DECL
@@ -88,15 +90,17 @@ void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
 	fg |= 0xff000000;
 	bg |= 0xff000000;
 	/* Don't recolour the image if we don't have to. */
-	if(fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
+    if (fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
 		return;
 	CURSOR_SWAPPING_START();
-	/* Note: We assume that the pixels are either fully opaque or fully
+
+    /*
+     * Note: We assume that the pixels are either fully opaque or fully
 	 * transparent, so we won't premultiply them, and we can just
 	 * check for non-zero pixel values; those are either fg or bg
 	 */
-	for(i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
-		if((pixel = *pixels))
+    for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
+        if ((pixel = *pixels))
 			*pixels = (pixel == rinfo->cursor_fg) ? fg : bg;
 	CURSOR_SWAPPING_END();
 	rinfo->cursor_fg = fg;
@@ -112,27 +116,30 @@ void radeon_set_cursor_position(struct fb_info *info, int x, int y)
 	struct fb_var_screeninfo *mode = &info->var;
 	int xorigin = 0;
 	int yorigin = 0;
-	if(mode->vmode & FB_VMODE_DOUBLE)
+    if (mode->vmode & FB_VMODE_DOUBLE)
 		y <<= 1;
-	if(x < 0)
+    if (x < 0)
 		xorigin = 1 - x;
-	if(y < 0)
+    if (y < 0)
 	  yorigin = 1 - y;
+
 //	DPRINTVALHEX("radeonfb: RADEONSetCursorPosition: cursor_start ",rinfo->cursor_start);
 //	DPRINTVAL(" x ",x);
 //	DPRINTVAL(" y ",y);
 //	DPRINT("\r\n");
+
 	OUTREG(CUR_HORZ_VERT_OFF, (CUR_LOCK  | (xorigin << 16) | yorigin));
 	OUTREG(CUR_HORZ_VERT_POSN, (CUR_LOCK | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y)));
 	OUTREG(CUR_OFFSET, rinfo->cursor_start + yorigin * 256);
 	rinfo->cursor_x = (unsigned long)x;
-	if(mode->vmode & FB_VMODE_DOUBLE)
-		rinfo->cursor_y = (unsigned long)y >> 1;
+    if (mode->vmode & FB_VMODE_DOUBLE)
+        rinfo->cursor_y = (unsigned long) y >> 1;
 	else
-		rinfo->cursor_y = (unsigned long)y;
+        rinfo->cursor_y = (unsigned long) y;
 }

-/* Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
+/*
+ * Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
 * will be called after this, so we can ignore xorigin and yorigin.
 */
 void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom)
@@ -143,11 +150,14 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 	unsigned short chunk, mchunk;
 	unsigned long i, j, k;
 	CURSOR_SWAPPING_DECL
+
 //	DPRINTVALHEX("radeonfb: RADEONLoadCursorImage: cursor_start ",rinfo->cursor_start);
-//	DPRINT("\r\n");	
+//	DPRINT("\r\n");
+
 	save = INREG(CRTC_GEN_CNTL) & ~(unsigned long) (3 << 20);
 	save |= (unsigned long) (2 << 20);
 	OUTREG(CRTC_GEN_CNTL, save & (unsigned long)~CRTC_CUR_EN);
+
 	/*
 	 * Convert the bitmap to ARGB32.
 	 */
@@ -157,22 +167,22 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 	{
 	case 1:
 	default:
-		for(i = 0; i < CURSOR_HEIGHT; i++)
+        for (i = 0; i < CURSOR_HEIGHT; i++)
 		{
-			if(i < 16)
+            if (i < 16)
 			{
 				mchunk = *mask++;
 				chunk = *data++;
 			}
 			else
 				mchunk = chunk = 0;
-			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
+            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
 			{
-				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-					if(mchunk & 0x8000)
+                    if (mchunk & 0x8000)
 					{
-						if(chunk & 0x8000)
+                        if (chunk & 0x8000)
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 						else
 							*d++ = 0xffffffff; /* White, fully opaque. */
@@ -184,13 +194,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 		}
 		break;
 	case 2:
-		for(i = 0; i < CURSOR_HEIGHT; i++)
+        for (i = 0; i < CURSOR_HEIGHT; i++)
 		{
-			if(i < 16*2)
+            if (i < 16*2)
 			{
 				mchunk = *mask;
 				chunk = *data;
-				if((i & 1) == 1)
+                if ((i & 1) == 1)
 				{
 					mask++;
 					data++;
@@ -198,13 +208,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 			}
 			else
 				mchunk = chunk = 0;
-			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
+            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
 			{
-				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-					if(mchunk & 0x8000)
+                    if (mchunk & 0x8000)
 					{
-						if(chunk & 0x8000)
+                        if (chunk & 0x8000)
 						{
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 							*d++ = 0xff000000; 
@@ -225,13 +235,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 		}
 		break;
 	case 4:
-		for(i = 0; i < CURSOR_HEIGHT; i++)
+        for (i = 0; i < CURSOR_HEIGHT; i++)
 		{
-			if(i < 16*4)
+            if (i < 16 * 4)
 			{
 				mchunk = *mask;
 				chunk = *data;
-				if((i & 3) == 3)
+                if ((i & 3) == 3)
 				{
 					mask++;
 					data++;
@@ -239,13 +249,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 			}
 			else
 				mchunk = chunk = 0;
-			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
+            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
 			{
-				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-					if(mchunk & 0x8000)
+                    if (mchunk & 0x8000)
 					{
-						if(chunk & 0x8000)
+                        if (chunk & 0x8000)
 						{
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 							*d++ = 0xff000000; 
@@ -282,6 +292,7 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 void radeon_hide_cursor(struct fb_info *info)
 {
 	struct radeonfb_info *rinfo = info->par;
+
 //	DPRINT("radeonfb: RADEONHideCursor\r\n");
 	OUTREGP(CRTC_GEN_CNTL, 0, ~CRTC_CUR_EN);
 	rinfo->cursor_show = 0;
@@ -291,6 +302,7 @@ void radeon_hide_cursor(struct fb_info *info)
 void radeon_show_cursor(struct fb_info *info)
 {
 	struct radeonfb_info *rinfo = info->par;
+
 //	DPRINT("radeonfb: RADEONShowCursor\r\n");
 	OUTREGP(CRTC_GEN_CNTL, CRTC_CUR_EN, ~CRTC_CUR_EN);
 	rinfo->cursor_show = 1;
@@ -303,9 +315,9 @@ long radeon_cursor_init(struct fb_info *info)
 	int size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
 	unsigned long fbarea = offscreen_alloc(rinfo->info, size_bytes + 256);

-	dbg("radeonfb: %s: fbarea: %p\r\n", __FUNCTION__, fbarea);
+    dbg("radeonfb: %s: fbarea: %p\r\n", fbarea);

-	if(!fbarea)
+    if (!fbarea)
 		rinfo->cursor_start = 0;
 	else
 	{
--- a/spi/dspi.c
+++ b/spi/dspi.c
@@ -25,7 +25,6 @@
 *      Author: mfro
 */

-#include <stdint.h>
 #include <bas_types.h>
 #include <MCF5475.h>

@@ -36,7 +35,7 @@ struct baudrate
 	int	divider;
 };

-static const int system_clock = 133000000;	/* System clock in Hz */
+static const int system_clock = 132000000;	/* System clock in Hz */

 struct baudrate baudrates[] =
 {
--- a/spi/mmc.c
+++ b/spi/mmc.c
@@ -1,4 +1,3 @@
-#include <stdint.h>
 #include <bas_types.h>
 #include <sd_card.h>
 #include <bas_printf.h>
@@ -466,7 +465,7 @@ DSTATUS disk_initialize(uint8_t drv)
 	{
 		uint8_t buff[16];
 		res = disk_ioctl(0, MMC_GET_CSD, buff);
-		
+
 		if (res == RES_OK)
 		{
 			debug_printf("CSD of card:\r\n");
--- a/sys/BaS.c
+++ b/sys/BaS.c
@@ -21,8 +21,7 @@
 * Copyright 2012        M. Froeschle
 */

-#include <stdint.h>
-#include <stdbool.h>
+#include <bas_types.h>

 #include "MCF5475.h"
 #include "startcf.h"
@@ -48,13 +47,17 @@
 #include "bootp.h"
 #include "interrupts.h"
 #include "exceptions.h"
+#include "net_timer.h"
+#include "pci.h"
+#include "video.h"

 //#define BAS_DEBUG
 #if defined(BAS_DEBUG)
-#define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif
+#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0)

 /* imported routines */
 extern int vec_init();
@@ -76,10 +79,12 @@ extern uint8_t _EMUTOS_SIZE[];
 */
 static inline bool pic_txready(void)
 {
-	if (MCF_PSC3_PSCSR & MCF_PSC_PSCSR_TXRDY)
-		return true;
+    if (MCF_PSC3_PSCSR & MCF_PSC_PSCSR_TXRDY)
+    {
+        return true;
+    }

-	return false;
+    return false;
 }

 /*
@@ -87,372 +92,367 @@ static inline bool pic_txready(void)
 */
 static inline bool pic_rxready(void)
 {
-	if (MCF_PSC3_PSCSR & MCF_PSC_PSCSR_RXRDY)
-		return true;
+    if (MCF_PSC3_PSCSR & MCF_PSC_PSCSR_RXRDY)
+    {
+        return true;
+    }

-	return false;
+    return false;
 }

 void write_pic_byte(uint8_t value)
 {
-    /* Wait until the transmitter is ready or 1000us are passed */
-	waitfor(1000, pic_txready);
+    /*
+     * Wait until the transmitter is ready or 1000us are passed
+     */
+    waitfor(1000, pic_txready);

-    /* Transmit the byte */
+    /*
+     * Transmit the byte
+     */
    *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT) = value; // Really 8-bit
 }

 uint8_t read_pic_byte(void)
 {
-    /* Wait until a byte has been received or 1000us are passed */
-	waitfor(1000, pic_rxready);
+    /*
+     * Wait until a byte has been received or 1000us are passed
+     */
+    waitfor(1000, pic_rxready);

-    /* Return the received byte */
-    return *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT); // Really 8-bit
+    /*
+     * Return the received byte
+     */
+    return * (volatile uint8_t *) (&MCF_PSC3_PSCTB_8BIT); // Really 8-bit
 }

 void pic_init(void)
 {
-	char answer[4] = "OLD";
+    char answer[4] = "OLD";

-	xprintf("initialize the PIC: ");
+    xprintf("initialize the PIC: ");

-	/* Send the PIC initialization string */
-	write_pic_byte('A');
-	write_pic_byte('C');
-	write_pic_byte('P');
-	write_pic_byte('F');
+    /*
+     * Send the PIC initialization string
+     */
+    write_pic_byte('A');
+    write_pic_byte('C');
+    write_pic_byte('P');
+    write_pic_byte('F');

-	/* Read the 3-char answer string. Should be "OK!". */
-	answer[0] = read_pic_byte();
-	answer[1] = read_pic_byte();
-	answer[2] = read_pic_byte();
-	answer[3] = '\0';
+    /*
+     * Read the 3-char answer string. Should be "OK!".
+     */
+    answer[0] = read_pic_byte();
+    answer[1] = read_pic_byte();
+    answer[2] = read_pic_byte();
+    answer[3] = '\0';

-	if (answer[0] != 'O' || answer[1] != 'K' || answer[2] != '!')
-	{
-		dbg("%s: PIC initialization failed. Already initialized?\r\n", __FUNCTION__);
-	}
-	else
-	{
-		xprintf("%s\r\n", answer);
-	}
+    if (answer[0] != 'O' || answer[1] != 'K' || answer[2] != '!')
+    {
+        dbg("PIC initialization failed. Already initialized?\r\n");
+    }
+    else
+    {
+        xprintf("%s\r\n", answer);
+    }
 }

 void nvram_init(void)
 {
-	int i;
+    int i;

-	xprintf("Restore the NVRAM data: ");
+    xprintf("Restore the NVRAM data: ");

-	/* Request for NVRAM backup data */
-	write_pic_byte(0x01);
+    /* Request for NVRAM backup data */
+    write_pic_byte(0x01);

-	/* Check answer type */
-	if (read_pic_byte() != 0x81)
-	{
-		// FIXME: PIC protocol error
-		xprintf("FAILED\r\n");
-		return;
-	}
+    /* Check answer type */
+    if (read_pic_byte() != 0x81)
+    {
+        // FIXME: PIC protocol error
+        xprintf("FAILED\r\n");
+        return;
+    }

-	/* Restore the NVRAM backup to the FPGA */
-	for (i = 0; i < 64; i++)
-	{
-		uint8_t data = read_pic_byte();
-		*(volatile uint8_t*)0xffff8961 = i;
-		*(volatile uint8_t*)0xffff8963 = data;
-	}
+    /* Restore the NVRAM backup to the FPGA */
+    for (i = 0; i < 64; i++)
+    {
+        uint8_t data = read_pic_byte();
+        *(volatile uint8_t*)0xffff8961 = i;
+        *(volatile uint8_t*)0xffff8963 = data;
+    }

-	xprintf("finished\r\n");
+    xprintf("finished\r\n");
 }

-#define KBD_ACIA_CONTROL		((uint8_t *) 0xfffffc00)
-#define MIDI_ACIA_CONTROL		((uint8_t *) 0xfffffc04)
-#define MFP_INTR_IN_SERVICE_A	((uint8_t *) 0xfffffa0f)
-#define MFP_INTR_IN_SERVICE_B	((uint8_t *) 0xfffffa11)
+#define KBD_ACIA_CONTROL        * ((uint8_t *) 0xfffffc00)
+#define MIDI_ACIA_CONTROL       * ((uint8_t *) 0xfffffc04)
+#define MFP_INTR_IN_SERVICE_A   * ((uint8_t *) 0xfffffa0f)
+#define MFP_INTR_IN_SERVICE_B   * ((uint8_t *) 0xfffffa11)

 void acia_init()
 {
-	xprintf("init ACIA: ");
-	/* init ACIA */
-	* KBD_ACIA_CONTROL = 3;		/* master reset */
-	NOP();
+    xprintf("init ACIA: ");
+    /* init ACIA */
+    KBD_ACIA_CONTROL = 3;       /* master reset */
+    NOP();

-	* MIDI_ACIA_CONTROL = 3;	/* master reset */
-	NOP();
+    MIDI_ACIA_CONTROL = 3;      /* master reset */
+    NOP();

-	* KBD_ACIA_CONTROL = 0x96;	/* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */
-	NOP();
+    KBD_ACIA_CONTROL = 0x96;    /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */
+    NOP();

-	* MFP_INTR_IN_SERVICE_A = -1;
-	NOP();
+    MFP_INTR_IN_SERVICE_A = 0xff;
+    NOP();

-	* MFP_INTR_IN_SERVICE_B = -1;
-	NOP();
+    MFP_INTR_IN_SERVICE_B = 0xff;
+    NOP();

-	xprintf("finished\r\n");
+    xprintf("finished\r\n");
 }

-/* ACP interrupt controller */
-#define FPGA_INTR_CONTRL	(volatile uint32_t *) 0xf0010000
-#define FPGA_INTR_ENABLE	(volatile uint8_t *)  0xf0010004
-#define FPGA_INTR_PENDIN	(volatile uint32_t *) 0xf0010008
-
 void enable_coldfire_interrupts()
 {
-	xprintf("enable interrupts: ");
-#if MACHINE_FIREBEE
-	*FPGA_INTR_CONTRL = 0L;				/* disable all interrupts */
+    xprintf("enable interrupts: ");
+#if defined(MACHINE_FIREBEE)
+    FBEE_INTR_CONTROL = 0L;                /* disable all interrupts */
 #endif /* MACHINE_FIREBEE */
-	MCF_EPORT_EPPAR = 0xaaa8;			/* all interrupts on falling edge */

-#if MACHINE_FIREBEE
-	/*
-	 * TIN0 on the Coldfire is connected to the FPGA. TIN0 triggers every write
-	 * access to 0xff8201 (vbasehi), i.e. everytime the video base address is written
-	 */
-	MCF_GPT0_GMS = MCF_GPT_GMS_ICT(1) |	/* timer 0 on, video change capture on rising edge */
-			MCF_GPT_GMS_IEN |
-			MCF_GPT_GMS_TMS(1);
-										/* route GPT0 interrupt on interrupt controller */
-	MCF_INTC_ICR62 = 0x3f;				/* interrupt level 7, interrupt priority 7 */
+    MCF_EPORT_EPPAR = 0xaaa8;               /* all interrupts on falling edge */

-	*FPGA_INTR_ENABLE  = 0xfe;	/* enable int 1-7 */
-	MCF_EPORT_EPIER = 0xfe;				/* int 1-7 on */
-	MCF_EPORT_EPFR = 0xff;				/* clear all pending interrupts */
-	MCF_INTC_IMRL = 0xffffff00;			/* int 1-7 on */
-	MCF_INTC_IMRH = 0xbffffffe;			/* psc3 and timer 0 int on */
+#if defined(MACHINE_FIREBEE)
+    /*
+     * TIN0 on the Coldfire is connected to the FPGA. TIN0 triggers every write
+     * access to 0xff8201 (vbasehi), i.e. everytime the video base address is written
+     */
+    MCF_GPT0_GMS = MCF_GPT_GMS_ICT(1) |     /* timer 0 on, video change capture on rising edge */
+            MCF_GPT_GMS_IEN |
+            MCF_GPT_GMS_TMS(1);             /* route GPT0 interrupt on interrupt controller */
+    MCF_INTC_ICR62 = MCF_INTC_ICR_IL(7) |
+                     MCF_INTC_ICR_IP(6);    /* interrupt level 7, interrupt priority 7 */
+
+
+    MCF_EPORT_EPIER = 0xfe;                 /* int 1-7 on */
+    MCF_EPORT_EPFR = 0xff;                  /* clear all pending interrupts */
+    MCF_INTC_IMRL = 0xffffff00;             /* int 1-7 on */
+    //MCF_INTC_IMRH = 0xbffffffe;             /* psc3 and timer 0 int on */
+    MCF_INTC_IMRH = 0;
+    FBEE_INTR_ENABLE = FBEE_INTR_INT_IRQ7 | /* enable pseudo bus error */
+            FBEE_INTR_INT_MFP_IRQ6 |        /* enable MFP interrupts */
+            FBEE_INTR_INT_FPGA_IRQ5 |       /* enable Firebee (PIC, PCI, ETH PHY, DVI, DSP) interrupts */
+            FBEE_INTR_INT_VSYNC_IRQ4 |      /* enable vsync interrupts */
+            FBEE_INTR_PCI_INTA |            /* enable PCI interrupts */
+            FBEE_INTR_PCI_INTB |
+            FBEE_INTR_PCI_INTC |
+            FBEE_INTR_PCI_INTD;
 #endif

-	xprintf("finished\r\n");
+    xprintf("finished\r\n");
 }

 void disable_coldfire_interrupts()
 {
-#ifdef MACHINE_FIREBEE
-	*FPGA_INTR_ENABLE = 0;		/* disable all interrupts */
+#if defined(MACHINE_FIREBEE)
+    FBEE_INTR_ENABLE = 0;      /* disable all interrupts */
 #endif /* MACHINE_FIREBEE */
-	MCF_EPORT_EPIER = 0x0;
-	MCF_EPORT_EPFR = 0x0;
-	MCF_INTC_IMRL = 0xfffffffe;
-	MCF_INTC_IMRH = 0xffffffff;
+
+    MCF_EPORT_EPIER = 0x0;
+    MCF_INTC_IMRL = 0xfffffffe;
+    MCF_INTC_IMRH = 0xffffffff;
 }



 NIF nif1;
-#ifdef MACHINE_M5484LITE
+#if defined(MACHINE_M5484LITE)
 NIF nif2;
 #endif
-static IP_INFO ip_info;
-static ARP_INFO	arp_info;

-
-void network_init(void)
+/*
+ * initialize the interrupt handler tables to dispatch interrupt requests from Coldfire devices
+ */
+void init_isr(void)
 {
-	uint8_t mac[6] = {0x00, 0xcf, 0x54, 0x12, 0x34, 0x56};
-	uint8_t bc[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; /* this is our broadcast MAC address */
-	IP_ADDR myip = {192, 168, 1, 100};
-	IP_ADDR gateway = {192, 168, 1, 1};
-	IP_ADDR netmask = {255, 255, 255, 0};
-	int vector;
-	int (*handler)(void *, void *);
+    isr_init();     /* need to call that explicitely, otherwise isr table might be full */

-	handler = fec0_interrupt_handler;
-	vector = 103;
-
-	isr_init();		/* need to call that explicitely, otherwise isr table might be full */
-
-	if (!isr_register_handler(ISR_DBUG_ISR, vector, handler, NULL, (void *) &nif1))
-	{
-		dbg("%s: unable to register handler for vector %d\r\n", __FUNCTION__, vector);
-		return;
-	}
+    /*
+     * register the FEC interrupt handler
+     */
+    if (!isr_register_handler(64 + INT_SOURCE_FEC0, 5, 1, fec0_interrupt_handler, NULL, (void *) &nif1))
+    {
+        err("unable to register isr for FEC0\r\n");
+    }

    /*
     * Register the DMA interrupt handler
     */
-    handler = dma_interrupt_handler;
-    vector = 112;

-    if (!isr_register_handler(ISR_DBUG_ISR, vector, handler, NULL,NULL))
-	{
-		dbg("%s: Error: Unable to register handler for vector %s\r\n", __FUNCTION__, vector);
-		return;
-	}
+    if (!isr_register_handler(64 + INT_SOURCE_DMA, 5, 3, dma_interrupt_handler, NULL, NULL))
+    {
+        err("unable to register isr for DMA\r\n");
+    }

-	nif_init(&nif1);
-	nif1.mtu = ETH_MTU;
-	nif1.send = fec0_send;
-	fec_eth_setup(0, FEC_MODE_MII, FEC_MII_100BASE_TX, FEC_MII_FULL_DUPLEX, mac);
-	// fec_eth_setup(1, FEC_MODE_MII, FEC_MII_100BASE_TX, FEC_MII_FULL_DUPLEX, mac);
-	memcpy(nif1.hwa, mac, 6);
-	memcpy(nif1.broadcast, bc, 6);
+#ifdef MACHINE_FIREBEE
+    /*
+     * register GPT0 timer interrupt vector
+     */
+    if (!isr_register_handler(64 + INT_SOURCE_GPT0, 5, 2, gpt0_interrupt_handler, NULL, NULL))
+    {
+        err("unable to register isr for GPT0 timer\r\n");
+    }

-	dbg("%s: ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n", __FUNCTION__, 
-				nif1.hwa[0], nif1.hwa[1], nif1.hwa[2],
-				nif1.hwa[3], nif1.hwa[4], nif1.hwa[5]);
-	
-	timer_init(TIMER_NETWORK, TMR_INTC_LVL, TMR_INTC_PRI);
+    /*
+     * register the PIC interrupt handler
+     */
+    if (!isr_register_handler(64 + INT_SOURCE_PSC3, 5, 5, pic_interrupt_handler, NULL, NULL))
+    {
+        err("Error: unable to register ISR for PSC3\r\n");
+    }
+#endif /* MACHINE_FIREBEE */

-	arp_init(&arp_info);
-	nif_bind_protocol(&nif1, ETH_FRM_ARP, arp_handler, (void *) &arp_info);
+    /*
+     * register the XLB PCI interrupt handler
+     */
+    if (!isr_register_handler(64 + INT_SOURCE_XLBPCI, 7, 0, xlbpci_interrupt_handler, NULL, NULL))
+    {
+        err("Error: unable to register isr for XLB PCI interrupts\r\n");
+    }

-	ip_init(&ip_info, myip, gateway, netmask);
-	nif_bind_protocol(&nif1, ETH_FRM_IP, ip_handler, (void *) &ip_info);
+    MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE |      /* slave error acknowledge interrupt */
+                       MCF_XLB_XARB_IMR_MME |       /* multiple master at prio 0 interrupt */
+                       MCF_XLB_XARB_IMR_TTAE |      /* TT address only interrupt */
+                       MCF_XLB_XARB_IMR_TTRE |      /* TT reserved interrupt enable */
+                       MCF_XLB_XARB_IMR_ECWE |      /* external control word interrupt */
+                       MCF_XLB_XARB_IMR_TTME |      /* TBST/TSIZ mismatch interrupt */
+                       MCF_XLB_XARB_IMR_BAE;        /* bus activity tenure timeout interrupt */

-	udp_init();
+    if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 7, 1, pciarb_interrupt_handler, NULL, NULL))
+    {
+        err("Error: unable to register isr for PCIARB interrupts\r\n");

-	dma_irq_enable(6, 6);
-
-	set_ipl(0);
-
-	bootp_request(&nif1, 0);
-
-	fec_eth_stop(0);
+        return;
+    }
+    MCF_PCIARB_PACR = MCF_PCIARB_PACR_EXTMINTEN(0x1f) | /* external master broken interrupt */
+                      MCF_PCIARB_PACR_INTMINTEN;        /* internal master broken interrupt */
 }

 void BaS(void)
 {
-	uint8_t *src;
-	uint8_t *dst = (uint8_t *) TOS;
+    uint8_t *src;
+    uint8_t *dst = (uint8_t *) TOS;

-#if MACHINE_FIREBEE	/* LITE board has no pic and (currently) no nvram */
-	pic_init();
-	nvram_init();
+#if defined(MACHINE_FIREBEE)        /* LITE board has no pic and (currently) no nvram */
+    pic_init();
+    nvram_init();
 #endif /* MACHINE_FIREBEE */

-	xprintf("copy EmuTOS: ");
+    xprintf("initialize MMU: ");
+    mmu_init();
+    xprintf("finished\r\n");

-	/* copy EMUTOS */
-	src = (uint8_t *) EMUTOS;
-	dma_memcpy(dst, src, EMUTOS_SIZE);
-	xprintf("finished\r\n");
+    xprintf("copy EmuTOS: ");

-	xprintf("initialize MMU: ");
-	mmu_init();
-	xprintf("finished\r\n");
+    dma_init();

-	xprintf("initialize exception vector table: ");
-	vec_init();
-	xprintf("finished\r\n");
+    /* copy EMUTOS */
+    src = (uint8_t *) EMUTOS;
+    dma_memcpy(dst, src, EMUTOS_SIZE);
+    xprintf("finished\r\n");

-	xprintf("flush caches: ");
-	flush_and_invalidate_caches();
-	xprintf("finished\r\n");
-	xprintf("enable MMU: ");
-	MCF_MMU_MMUCR = MCF_MMU_MMUCR_EN;			/* MMU on */
-	NOP();										/* force pipeline sync */
-	xprintf("finished\r\n");
-	
-	#ifdef MACHINE_FIREBEE
-	xprintf("IDE reset: ");
-	/* IDE reset */
-	* (volatile uint8_t *) (0xffff8802 - 2) = 14;
-	* (volatile uint8_t *) (0xffff8802 - 0) = 0x80;
-	wait(1);
-	
-	* (volatile uint8_t *) (0xffff8802 - 0) = 0;
-	
-	xprintf("finished\r\n");
-	xprintf("enable video: ");
-	/*
-	 * video setup (25MHz)
-	 */
-	* (volatile uint32_t *) (0xf0000410 + 0) = 0x032002ba;	/* horizontal 640x480 */
-	* (volatile uint32_t *) (0xf0000410 + 4) = 0x020c020a;	/* vertical 640x480 */
-	* (volatile uint32_t *) (0xf0000410 + 8) = 0x0190015d;	/* horizontal 320x240 */
-	* (volatile uint32_t *) (0xf0000410 + 12) = 0x020C020A;	/* vertical 320x230 */
+    xprintf("initialize exception vector table: ");
+    vec_init();
+    xprintf("finished\r\n");

-#ifdef _NOT_USED_
-//  32MHz
-	* (volatile uint32_t *) (0xf0000410 + 0) = 0x037002ba;	/* horizontal 640x480 */
-	* (volatile uint32_t *) (0xf0000410 + 4) = 0x020d020a;	/* vertical 640x480 */
-	* (volatile uint32_t *) (0xf0000410 + 8) = 0x02a001e0;	/* horizontal 320x240 */
-	* (volatile uint32_t *) (0xf0000410 + 12) = 0x05a00160;	/* vertical 320x230 */
-#endif /* _NOT_USED_ */
+    xprintf("flush caches: ");
+    flush_and_invalidate_caches();
+    xprintf("finished\r\n");
+    xprintf("enable MMU: ");
+    MCF_MMU_MMUCR = MCF_MMU_MMUCR_EN;           /* MMU on */
+    NOP();                                      /* force pipeline sync */
+    xprintf("finished\r\n");

-	/* fifo on, refresh on, ddrcs and cke on, video dac on */
-	* (volatile uint32_t *) (0xf0000410 - 0x20) = 0x01070002;
+    #ifdef MACHINE_FIREBEE
+    xprintf("IDE reset: ");
+    /* IDE reset */
+    * (volatile uint8_t *) (0xffff8802 - 2) = 14;
+    * (volatile uint8_t *) (0xffff8802 - 0) = 0x80;
+    wait(1);

-	xprintf("finished\r\n");
+    * (volatile uint8_t *) (0xffff8802 - 0) = 0;

-	enable_coldfire_interrupts();
+    xprintf("finished\r\n");
+    xprintf("enable video: ");
+    /*
+     * video setup (25MHz)
+     */
+    * (volatile uint32_t *) (0xf0000410 + 0) = 0x032002ba;  /* horizontal 640x480 */
+    * (volatile uint32_t *) (0xf0000410 + 4) = 0x020c020a;  /* vertical 640x480 */
+    * (volatile uint32_t *) (0xf0000410 + 8) = 0x0190015d;  /* horizontal 320x240 */
+    * (volatile uint32_t *) (0xf0000410 + 12) = 0x020C020A; /* vertical 320x230 */

-#ifdef _NOT_USED_
-	screen_init();
+    /* fifo on, refresh on, ddrcs and cke on, video dac on */
+    * (volatile uint32_t *) (0xf0000410 - 0x20) = 0x01070002;

-	    /* experimental */
+    xprintf("finished\r\n");
+#endif /* MACHINE_FIREBEE */
+
+    sd_card_init();
+
+    /*
+     * memory setup
+     */
+    memset((void *) 0x400, 0, 0x400);
+
+#if defined(MACHINE_FIREBEE)
+    /* set Falcon bus control register */
+    /* sets bit 3 and 6. Both are undefined on an original Falcon? */
+
+    * (volatile uint8_t *) 0xffff8007 = 0x48;
+#endif /* MACHINE_FIREBEE */
+
+    /* ST RAM */
+
+    * (uint32_t *) 0x42e = STRAM_END;   /* phystop TOS system variable */
+    * (uint32_t *) 0x420 = 0x752019f3;  /* memvalid TOS system variable */
+    * (uint32_t *) 0x43a = 0x237698aa;  /* memval2 TOS system variable */
+    * (uint32_t *) 0x51a = 0x5555aaaa;  /* memval3 TOS system variable */
+
+    /* TT-RAM */
+
+    * (uint32_t *) 0x5a4 = FASTRAM_END; /* ramtop TOS system variable */
+    * (uint32_t *) 0x5a8 = 0x1357bd13;  /* ramvalid TOS system variable */
+
+#if defined(MACHINE_FIREBEE) /* m5484lite has no ACIA and no dip switch... */
+    acia_init();
+#endif /* MACHINE_FIREBEE */
+
+    srec_execute("BASFLASH.S19");
+
+    /* Jump into the OS */
+    typedef void void_func(void);
+    struct rom_header
    {
-        int i;
-        uint32_t *scradr = 0xd00000;
+        void *initial_sp;
+        void_func *initial_pc;
+    };

-        for (i = 0; i < 100; i++)
-        {
-            uint32_t *p = scradr;
+    xprintf("BaS initialization finished, enable interrupts\r\n");
+    init_isr();

-            for (p = scradr; p < scradr + 1024 * 150L; p++)
-            {
-				*p = 0xffffffff;
-		    }
+    enable_coldfire_interrupts();
+    dma_irq_enable();

-			for (p = scradr; p < scradr + 1024 * 150L; p++)
-		    {
-				*p = 0x0;
-			}
-		}
-	}
-#endif /* _NOT_USED_ */
+    init_pci();
+    // video_init();

-#endif /* MACHINE_FIREBEE */
+    /* initialize USB devices */
+    //init_usb();

-	sd_card_init();
+    set_ipl(7);     /* disable interrupts */

-	/*
-	 * memory setup
-	 */
-	memset((void *) 0x400, 0, 0x400);
-
-#ifdef MACHINE_FIREBEE
-	/* set Falcon bus control register */
-	/* sets bit 3 and 6. Both are undefined on an original Falcon? */
-
-	* (volatile uint8_t *) 0xffff8007 = 0x48;
-#endif /* MACHINE_FIREBEE */
-
-	/* ST RAM */
-
-	* (uint32_t *) 0x42e = STRAM_END;	/* phystop TOS system variable */
-	* (uint32_t *) 0x420 = 0x752019f3;	/* memvalid TOS system variable */
-	* (uint32_t *) 0x43a = 0x237698aa;	/* memval2 TOS system variable */
-	* (uint32_t *) 0x51a = 0x5555aaaa;	/* memval3 TOS system variable */
-
-	/* TT-RAM */
-
-	* (uint32_t *) 0x5a4 = FASTRAM_END;	/* ramtop TOS system variable */
-	* (uint32_t *) 0x5a8 = 0x1357bd13;	/* ramvalid TOS system variable */
-
-#ifdef MACHINE_FIREBEE /* m5484lite has no ACIA and no dip switch... */
-	acia_init();
-#endif /* MACHINE_FIREBEE */
-
-	srec_execute("BASFLASH.S19");
-
-	/* Jump into the OS */
-	typedef void void_func(void);
-	typedef struct {
-		void *initial_sp;
-		void_func *initial_pc;
-	} ROM_HEADER;
-
-	xprintf("BaS initialization finished, enable interrupts\r\n");
-	enable_coldfire_interrupts();
-
-	//set_ipl(0);
-	network_init();
-
-	xprintf("call EmuTOS\r\n");
-	ROM_HEADER* os_header = (ROM_HEADER*)TOS;
-	os_header->initial_pc();
+    xprintf("call EmuTOS\r\n");
+    struct rom_header *os_header = (struct rom_header *) TOS;
+    os_header->initial_pc();
 }
--- a/sys/cache.c
+++ b/sys/cache.c
@@ -32,7 +32,7 @@ void cacr_set(uint32_t value)
 	__asm__ __volatile__("movec	%0, cacr\n\t"
 						 : /* output */
 						 : "r" (rt_cacr)
-						 : /* clobbers */);
+						 : "memory" /* clobbers */);
 }

 uint32_t cacr_get(void)
@@ -42,26 +42,43 @@ uint32_t cacr_get(void)
 	return rt_cacr;
 }

+void disable_data_cache(void)
+{
+	flush_and_invalidate_caches();
+	cacr_set((cacr_get() | CF_CACR_DCINVA) & ~CF_CACR_DEC);
+}
+
+void disable_instruction_cache(void)
+{
+	flush_and_invalidate_caches();
+	cacr_set((cacr_get() | CF_CACR_ICINVA) & ~CF_CACR_IEC);
+}
+
+void enable_data_cache(void)
+{
+	cacr_set(cacr_get() & ~CF_CACR_DCINVA);
+}
+
 void flush_and_invalidate_caches(void)
 {
-	__asm__ (
-	"	clr.l		d0\n\t"
-	"	clr.l		d1\n\t"
-	"	move.l		d0,a0\n\t"
-	"cfa_setloop:\n\t"
-	"	cpushl		bc,(a0)				| flush\n\t"
-	"	lea			0x10(a0),a0			| index+1\n\t"
-	"	addq.l		#1,d1				| index+1\n\t"
-	"	cmpi.w		#512,d1				| all sets?\n\t"
-	"	bne.s		cfa_setloop			| no->\n\t"
-	"	clr.l		d1\n\t"
-	"	addq.l		#1,d0\n\t"
-	"	move.l		d0,a0\n\t"
-	"	cmpi.w		#4,d0				| all ways?\n\t"
-	"	bne.s		cfa_setloop			| no->\n\t"
-	/* input */	:
-	/* output */	:
-	/* clobber */	: "d0", "d1", "a0"
+	__asm__ __volatile__(
+			"	clr.l		d0                  \n\t"
+			"	clr.l		d1                  \n\t"
+			"	move.l		d0,a0               \n\t"
+			"cfa_setloop:                       \n\t"
+			"	cpushl		bc,(a0)				| flush\n\t"
+			"	lea			0x10(a0),a0			| index+1\n\t"
+			"	addq.l		#1,d1				| index+1\n\t"
+			"	cmpi.w		#512,d1				| all sets?\n\t"
+			"	bne.s		cfa_setloop			| no->\n\t"
+			"	clr.l		d1                  \n\t"
+			"	addq.l		#1,d0               \n\t"
+			"	move.l		d0,a0               \n\t"
+			"	cmpi.w		#4,d0				| all ways?\n\t"
+			"	bne.s		cfa_setloop			| no->\n\t"
+			/* input */	:
+			/* output */	:
+			/* clobber */	: "cc", "d0", "d1", "a0"
 	);
 }

@@ -80,26 +97,37 @@ void flush_icache_range(void *address, size_t size)

 	if (start_set > end_set) {
 		/* from the begining to the lowest address */
-		for (set = 0; set <= end_set; set += (0x10 - 3)) {
-			asm volatile("cpushl ic,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl ic,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl ic,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl ic,(%0)" : "=a" (set) : "a" (set));
+        for (set = 0; set <= end_set; set += (0x10 - 3))
+        {
+			__asm__ __volatile__(
+						"       cpushl  ic,(%[set])         \n\t"
+						"       addq.l  #1,%[set]           \n\t"
+						"       cpushl  ic,(%[set])         \n\t"
+						"       addq.l  #1,%[set]           \n\t"
+						"       cpushl  ic,(%[set])         \n\t"
+						"       addq.l  #1,%[set]           \n\t"
+						"       cpushl  ic,(%[set])         \n\t"
+				 : /* output parameters  */
+				 : [set] "a" (set)  /* input parameters */
+				 : "cc"             /* clobbered registers */
+			);
 		}
 		/* next loop will finish the cache ie pass the hole */
 		end_set = LAST_ICACHE_ADDR;
 	}
 	for (set = start_set; set <= end_set; set += (0x10 - 3)) {
-		asm volatile("cpushl ic,(%0)\n\t"
-					"addq.l #1,%0\n\t"
-					"cpushl ic,(%0)\n\t"
-					"addq%.l #1,%0\n\t"
-					"cpushl ic,(%0)\n\t"
-					"addq.l #1,%0\n\t"
-					"cpushl ic,(%0)" : "=a" (set) : "a" (set));
+		__asm__ __volatile__(
+					"       cpushl  ic,(%[set])             \n\t"
+					"       addq.l  #1,%[set]               \n\t"
+					"       cpushl  ic,(%[set])             \n\t"
+					"       addq.l  #1,%[set]               \n\t"
+					"       cpushl  ic,(%[set])             \n\t"
+					"       addq.l  #1,%[set]               \n\t"
+					"       cpushl  ic,(%[set])"
+					: /* output parameters */
+					: [set] "a" (set)
+					: "cc"
+		 );
 	}
 }

@@ -121,25 +149,91 @@ void flush_dcache_range(void *address, size_t size)

 	if (start_set > end_set) {
 		/* from the begining to the lowest address */
-		for (set = 0; set <= end_set; set += (0x10 - 3)) {
-			asm volatile("cpushl dc,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl dc,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl dc,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl dc,(%0)" : "=a" (set) : "a" (set));
+		for (set = 0; set <= end_set; set += (0x10 - 3))
+		{
+			__asm__ __volatile__(
+						"       cpushl  dc,(%[set])         \n\t"
+						"       addq.l  #1,%[set]           \n\t"
+						"       cpushl  dc,(%[set])         \n\t"
+						"       addq.l  #1,%[set]           \n\t"
+						"       cpushl  dc,(%[set])         \n\t"
+						"       addq.l  #1,%[set]           \n\t"
+						"       cpushl  dc,(%[set])         \n\t"
+						: /* output parameters */
+						: [set] "a" (set)
+						: "cc" /* clobbered registers */
+			);
 		}
 		/* next loop will finish the cache ie pass the hole */
 		end_set = LAST_DCACHE_ADDR;
 	}
-	for (set = start_set; set <= end_set; set += (0x10 - 3)) {
-		asm volatile("cpushl dc,(%0)\n\t"
-					"addq.l #1,%0\n\t"
-					"cpushl dc,(%0)\n\t"
-					"addq%.l #1,%0\n\t"
-					"cpushl dc,(%0)\n\t"
-					"addq.l #1,%0\n\t"
-					"cpushl dc,(%0)" : "=a" (set) : "a" (set));
+	for (set = start_set; set <= end_set; set += (0x10 - 3))
+	{
+		__asm__ __volatile__(
+					"       cpushl      dc,(%[set])     \n\t"
+					"       addq.l      #1,%[set]       \n\t"
+					"       cpushl      dc,(%[set])     \n\t"
+					"       addq%.l     #1,%[set]       \n\t"
+					"       cpushl      dc,(%[set])     \n\t"
+					"       addq.l      #1,%[set]       \n\t"
+					"       cpushl      dc,(%[set])     \n\t"
+					: /* output parameters */
+					: [set] "a" (set)
+					: "cc" /* clobbered registers */
+		);
 	}
 }
+
+/*
+ * flush and invalidate a specific region from the both caches. We do not know if the area is cached
+ * at all, we do not know in which of the four ways it is cached, but we know the index where they
+ * would be cached if they are, so we only need to flush and invalidate only a subset of the 512 index
+ * entries, but all four ways.
+ */
+void flush_cache_range(void *address, size_t size)
+{
+    unsigned long set;
+    unsigned long start_set;
+    unsigned long end_set;
+    void *endaddr;
+
+    endaddr = address + size;
+    start_set = (uint32_t) address & _DCACHE_SET_MASK;
+    end_set = (uint32_t) endaddr & _DCACHE_SET_MASK;
+
+    if (start_set > end_set) {
+        /* from the begining to the lowest address */
+        for (set = 0; set <= end_set; set += (0x10 - 3))
+        {
+            __asm__ __volatile__(
+                        "       cpushl  bc,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  bc,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  bc,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  bc,(%[set])         \n\t"
+                        : /* output parameters */
+                        : [set] "a" (set)
+                        : "cc" /* clobbered registers */
+            );
+        }
+        /* next loop will finish the cache ie pass the hole */
+        end_set = LAST_DCACHE_ADDR;
+    }
+    for (set = start_set; set <= end_set; set += (0x10 - 3))
+    {
+        __asm__ __volatile__(
+                    "       cpushl      bc,(%[set])     \n\t"
+                    "       addq.l      #1,%[set]       \n\t"
+                    "       cpushl      bc,(%[set])     \n\t"
+                    "       addq%.l     #1,%[set]       \n\t"
+                    "       cpushl      bc,(%[set])     \n\t"
+                    "       addq.l      #1,%[set]       \n\t"
+                    "       cpushl      bc,(%[set])     \n\t"
+                    : /* output parameters */
+                    : [set] "a" (set)
+                    : "cc" /* clobbered registers */
+        );
+    }
+}
--- a/sys/driver_mem.c
+++ b/sys/driver_mem.c
@@ -2,7 +2,7 @@
 *	driver_mem.c
 *
 * based from Emutos / BDOS
- * 
+ *
 * Copyright (c) 2001 Lineo, Inc.
 *
 * Authors: Karl T. Braun, Martin Doering, Laurent Vogel
@@ -11,21 +11,23 @@
 * option any later version.
 */

-#include <stdint.h>
-#include <stdbool.h>
+#include <bas_types.h>
 #include "bas_string.h"
 #include "bas_printf.h"
 #include "usb.h"
 #include "exceptions.h"		/* set_ipl() */

-#if MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
 #include "firebee.h"
-#elif MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
+#else
+#error "unknown machine!"
 #endif

 //#define DBG_DM
-
 #ifdef	DBG_DM
 #define	dbg(fmt, args...)	xprintf(fmt, ##args)
 #else
@@ -42,10 +44,10 @@ extern uint8_t driver_mem_buffer[DRIVER_MEM_BUFFER_SIZE];	/* defined in linker c

 MD
 {
-	MD *m_link;
-	long m_start;
-	long m_length;
-	void *m_own;
+    MD *m_link;
+    long m_start;
+    long m_length;
+    void *m_own;
 };

 /* MPB - Memory Partition Block */
@@ -54,9 +56,9 @@ MD

 MPB
 {
-	MD *mp_mfl;
-	MD *mp_mal;
-	MD *mp_rover;
+    MD *mp_mfl;
+    MD *mp_mal;
+    MD *mp_rover;
 };

 #define MAXMD 256
@@ -66,272 +68,273 @@ static MPB pmd;

 static void *xmgetblk(void)
 {
-	int i;
-	
-	for (i = 0; i < MAXMD; i++)
-	{
-		if (tab_md[i].m_own == NULL)
-		{
-			tab_md[i].m_own = (void*)1L;
-			return(&tab_md[i]);
-		}
-	}			   
-	return NULL;
+    int i;
+
+    for (i = 0; i < MAXMD; i++)
+    {
+        if (tab_md[i].m_own == NULL)
+        {
+            tab_md[i].m_own = (void*)1L;
+            return(&tab_md[i]);
+        }
+    }
+    return NULL;
 }

 static void xmfreblk(void *m)
 {
-	int i = (int)(((long) m - (long) tab_md) / sizeof(MD));
-	if ((i > 0) && (i < MAXMD))
-	{
-		tab_md[i].m_own = NULL;
-	}
+    int i = (int)(((long) m - (long) tab_md) / sizeof(MD));
+    if ((i > 0) && (i < MAXMD))
+    {
+        tab_md[i].m_own = NULL;
+    }
 }

 static MD *ffit(long amount, MPB *mp)
 {
-	MD *p, *q, *p1;                    /* free list is composed of MD's */
-	int maxflg;
-	long maxval;
-	
-	if (amount != -1)
-	{
-		amount += 15;                  /* 16 bytes alignment */
-		amount &= 0xFFFFFFF0;
-	}
-	
-	if ((q = mp->mp_rover) == 0)      /* get rotating pointer */
-	{
-		return 0;
-	}
-	
-	maxval = 0;
-	maxflg = ((amount == -1) ? true : false) ;
-	p = q->m_link;                   /* start with next MD */
-	do /* search the list for an MD with enough space */
-	{
-		if (p == 0)
-		{
-			/*  at end of list, wrap back to start  */
-			q = (MD *) &mp->mp_mfl;      /*  q => mfl field  */
-			p = q->m_link;               /*  p => 1st MD     */
-		}
-		if ((!maxflg) && (p->m_length >= amount))
-		{
-			/*  big enough */
-			if (p->m_length == amount)
-			{
-				q->m_link = p->m_link;     /* take the whole thing */
-			}
-			else
-			{
-				/*
-				 * break it up - 1st allocate a new
-				 * MD to describe the remainder
-				 */
-				p1 = xmgetblk();
-				if (p1 == NULL)
-				{
-					return(NULL);
-				}
-				
-				/* init new MD */
-				p1->m_length = p->m_length - amount;
-				p1->m_start = p->m_start + amount;
-				p1->m_link = p->m_link;
-				p->m_length = amount;      /* adjust allocated block */
-				q->m_link = p1;
-			}
-			/* link allocate block into allocated list,
-			    mark owner of block, & adjust rover  */
-			p->m_link = mp->mp_mal;
-			mp->mp_mal = p;
-			mp->mp_rover = (q == (MD *) &mp->mp_mfl ? q->m_link : q);
-			return(p);                   /* got some */
-		}
-		else if (p->m_length > maxval)
-			maxval = p->m_length;
-		p = ( q=p )->m_link;
-	} while(q != mp->mp_rover);
-	
-	/*
-	 * return either the max, or 0 (error)
-	 */
-	if (maxflg)
-	{
-		maxval -= 15;		/* 16 bytes alignment */
-		if (maxval < 0)
-		{
-			maxval = 0;
-		}
-		else
-		{
-			maxval &= 0xFFFFFFF0;
-		}
-	}
-	return(maxflg ? (MD *) maxval : 0);
+    MD *p, *q, *p1;                    /* free list is composed of MD's */
+    int maxflg;
+    long maxval;
+
+    if (amount != -1)
+    {
+        amount += 15;                  /* 16 bytes alignment */
+        amount &= 0xFFFFFFF0;
+    }
+
+    if ((q = mp->mp_rover) == 0)      /* get rotating pointer */
+    {
+        return 0;
+    }
+
+    maxval = 0;
+    maxflg = ((amount == -1) ? true : false) ;
+    p = q->m_link;                   /* start with next MD */
+    do /* search the list for an MD with enough space */
+    {
+        if (p == 0)
+        {
+            /*  at end of list, wrap back to start  */
+            q = (MD *) &mp->mp_mfl;      /*  q => mfl field  */
+            p = q->m_link;               /*  p => 1st MD     */
+        }
+        if ((!maxflg) && (p->m_length >= amount))
+        {
+            /*  big enough */
+            if (p->m_length == amount)
+            {
+                q->m_link = p->m_link;     /* take the whole thing */
+            }
+            else
+            {
+                /*
+                 * break it up - 1st allocate a new
+                 * MD to describe the remainder
+                 */
+                p1 = xmgetblk();
+                if (p1 == NULL)
+                {
+                    return(NULL);
+                }
+
+                /* init new MD */
+                p1->m_length = p->m_length - amount;
+                p1->m_start = p->m_start + amount;
+                p1->m_link = p->m_link;
+                p->m_length = amount;      /* adjust allocated block */
+                q->m_link = p1;
+            }
+            /* link allocate block into allocated list,
+                mark owner of block, & adjust rover  */
+            p->m_link = mp->mp_mal;
+            mp->mp_mal = p;
+            mp->mp_rover = (q == (MD *) &mp->mp_mfl ? q->m_link : q);
+            return(p);                   /* got some */
+        }
+        else if (p->m_length > maxval)
+            maxval = p->m_length;
+        p = ( q=p )->m_link;
+    } while(q != mp->mp_rover);
+
+    /*
+     * return either the max, or 0 (error)
+     */
+    if (maxflg)
+    {
+        maxval -= 15;		/* 16 bytes alignment */
+        if (maxval < 0)
+        {
+            maxval = 0;
+        }
+        else
+        {
+            maxval &= 0xFFFFFFF0;
+        }
+    }
+    return(maxflg ? (MD *) maxval : 0);
 }

 static void freeit(MD *m, MPB *mp)
 {
-	MD *p, *q;
-	
-	q = 0;
-	for (p = mp->mp_mfl; p ; p = (q = p) -> m_link)
-	{
-		if (m->m_start <= p->m_start)
-		{
-			break;
-		}
-	}
-	m->m_link = p;
-	
-	if (q)
-	{
-		q->m_link = m;
-	}
-	else
-	{
-		mp->mp_mfl = m;
-	}
-	
-	if (!mp->mp_rover)
-	{
-		mp->mp_rover = m;
-	}
-	
-	if (p)
-	{
-		if (m->m_start + m->m_length == p->m_start)
-		{
-			/* join to higher neighbor */
-			m->m_length += p->m_length;
-			m->m_link = p->m_link;
-			if (p == mp->mp_rover)
-			{
-				mp->mp_rover = m;
-			}
-			xmfreblk(p);
-		}
-	}
-	if (q)
-	{
-		if (q->m_start + q->m_length == m->m_start)
-		{
-			/* join to lower neighbor */
-			q->m_length += m->m_length;
-			q->m_link = m->m_link;
-			if (m == mp->mp_rover)
-			{
-				mp->mp_rover = q;
-			}
-			xmfreblk(m);
-		}
-	}
+    MD *p, *q;
+
+    q = 0;
+    for (p = mp->mp_mfl; p ; p = (q = p) -> m_link)
+    {
+        if (m->m_start <= p->m_start)
+        {
+            break;
+        }
+    }
+    m->m_link = p;
+
+    if (q)
+    {
+        q->m_link = m;
+    }
+    else
+    {
+        mp->mp_mfl = m;
+    }
+
+    if (!mp->mp_rover)
+    {
+        mp->mp_rover = m;
+    }
+
+    if (p)
+    {
+        if (m->m_start + m->m_length == p->m_start)
+        {
+            /* join to higher neighbor */
+            m->m_length += p->m_length;
+            m->m_link = p->m_link;
+            if (p == mp->mp_rover)
+            {
+                mp->mp_rover = m;
+            }
+            xmfreblk(p);
+        }
+    }
+    if (q)
+    {
+        if (q->m_start + q->m_length == m->m_start)
+        {
+            /* join to lower neighbor */
+            q->m_length += m->m_length;
+            q->m_link = m->m_link;
+            if (m == mp->mp_rover)
+            {
+                mp->mp_rover = q;
+            }
+            xmfreblk(m);
+        }
+    }
 }

 int32_t driver_mem_free(void *addr)
 {
-	int level;
-	MD *p, **q;
-	MPB *mpb;
-	mpb = &pmd;
-	level = set_ipl(7);
-	
-	for(p = *(q = &mpb->mp_mal); p; p = *(q = &p->m_link))
-	{
-		if ((long) addr == p->m_start)
-		{
-			break;
-		}
-	}
-	
-	if (!p)
-	{
-		set_ipl(level);
-		return(-1);
-	}
-	
-	*q = p->m_link;
-	freeit(p, mpb);
-	set_ipl(level);
-	
-	dbg("%s: driver_mem_free(0x%08X)\r\n", __FUNCTION__, addr);
-	
-	return(0);
+    int level;
+    MD *p, **q;
+    MPB *mpb;
+    mpb = &pmd;
+    level = set_ipl(7);
+
+    for(p = *(q = &mpb->mp_mal); p; p = *(q = &p->m_link))
+    {
+        if ((long) addr == p->m_start)
+        {
+            break;
+        }
+    }
+
+    if (!p)
+    {
+        set_ipl(level);
+        return(-1);
+    }
+
+    *q = p->m_link;
+    freeit(p, mpb);
+    set_ipl(level);
+
+    dbg("%s: driver_mem_free(0x%08X)\r\n", __FUNCTION__, addr);
+
+    return(0);
 }

 void *driver_mem_alloc(uint32_t amount)
 {
-	void *ret = NULL;
-	int level;
-	MD *m;
-	
-	if (amount == -1L)
-	{
-		return((void *)ffit(-1L, &pmd));
-	}
-	
-	if (amount <= 0 )
-	{
-		return(0);
-	}
-	
-	if ((amount & 1))
-	{
-		amount++;
-	}
-	
-	level = set_ipl(7);
-	m = ffit(amount, &pmd);
-	
-	if (m != NULL)
-	{
-		ret = (void *)m->m_start;
-	}
-	set_ipl(level);
-	dbg("%s: driver_mem_alloc(%d) = 0x%08X\r\n", __FUNCTION__, amount, ret);
-	
-	return(ret);
+    void *ret = NULL;
+    int level;
+    MD *m;
+
+    if (amount == -1L)
+    {
+        return (void *) ffit(-1L, &pmd);
+    }
+
+    if (amount <= 0 )
+    {
+        return(0);
+    }
+
+    if ((amount & 1))
+    {
+        amount++;
+    }
+
+    level = set_ipl(7);
+    m = ffit(amount, &pmd);
+
+    if (m != NULL)
+    {
+        ret = (void *) m->m_start;
+    }
+    set_ipl(level);
+    dbg("%s: driver_mem_alloc(%d) = 0x%08X\r\n", __FUNCTION__, amount, ret);
+
+    return ret;
 }

 static int use_count = 0;

 int driver_mem_init(void)
 {
-	if (use_count == 0)
-	{
-		dbg("%s: initialise driver_mem_buffer[] at %p, size 0x%x\r\n", __FUNCTION__, driver_mem_buffer, DRIVER_MEM_BUFFER_SIZE);
-		memset(driver_mem_buffer, 0, DRIVER_MEM_BUFFER_SIZE);
-	
-		pmd.mp_mfl = pmd.mp_rover = &tab_md[0];
-		tab_md[0].m_link = (MD *) NULL;
-		tab_md[0].m_start = ((long) driver_mem_buffer + 15) & ~15;
-		tab_md[0].m_length = DRIVER_MEM_BUFFER_SIZE;	
-		tab_md[0].m_own = (void *) 1L;
-		pmd.mp_mal = (MD *) NULL;
-		memset(driver_mem_buffer, 0, tab_md[0].m_length);
+    if (use_count == 0)
+    {
+        dbg("%s: initialise driver_mem_buffer[] at %p, size 0x%x\r\n", __FUNCTION__, driver_mem_buffer, DRIVER_MEM_BUFFER_SIZE);
+        memset(driver_mem_buffer, 0, DRIVER_MEM_BUFFER_SIZE);

-		dbg("%s: uncached driver memory buffer at 0x%08X size %d\r\n", __FUNCTION__, tab_md[0].m_start, tab_md[0].m_length);
-	}
-	use_count++;
-	dbg("%s: driver_mem now has a use count of %d\r\n", __FUNCTION__, use_count);
-	return(0);
+        pmd.mp_mfl = pmd.mp_rover = &tab_md[0];
+        tab_md[0].m_link = (MD *) NULL;
+        tab_md[0].m_start = ((long) driver_mem_buffer + 15) & ~15;
+        tab_md[0].m_length = DRIVER_MEM_BUFFER_SIZE;
+        tab_md[0].m_own = (void *) 1L;
+        pmd.mp_mal = (MD *) NULL;
+        memset(driver_mem_buffer, 0, tab_md[0].m_length);
+
+        dbg("%s: uncached driver memory buffer at 0x%08X size %d\r\n", __FUNCTION__, tab_md[0].m_start, tab_md[0].m_length);
+    }
+    use_count++;
+    dbg("%s: driver_mem now has a use count of %d\r\n", __FUNCTION__, use_count);
+
+    return 0;
 }

 void driver_mem_release(void)
 {
-	if (use_count-- == 0)
-	{
+    if (use_count-- == 0)
+    {
 #ifndef CONFIG_USB_MEM_NO_CACHE
 #ifdef USE_RADEON_MEMORY
-		if (driver_mem_buffer == (void *) offscren_reserved())
-			return;
+        if (driver_mem_buffer == (void *) offscren_reserved())
+            return;

 #endif
 #endif
-	}
-	dbg("%s: driver_mem use count now %d\r\n", __FUNCTION__, use_count);
+    }
+    dbg("%s: driver_mem use count now %d\r\n", __FUNCTION__, use_count);
 }


--- a/sys/exceptions.S
+++ b/sys/exceptions.S
--- a/sys/fault_vectors.c
+++ b/sys/fault_vectors.c
@@ -30,169 +30,181 @@ extern exception_handler SDRAM_VECTOR_TABLE[];
 */
 void fault_handler(uint32_t pc, uint32_t format_status)
 {
-	int format;
-	int fault_status;
-	int vector;
-	int sr;
+    int format;
+    int fault_status;
+    int vector;
+    int sr;

-	xprintf("\007\007exception! Processor halted.\r\n");
-	xprintf("format_status: %lx\r\n", format_status);
-	xprintf("pc: %lx\r\n", pc);
+    xprintf("\007\007exception! Processor halted.\r\n");
+    xprintf("format_status: %lx\r\n", format_status);
+    xprintf("pc: %lx\r\n", pc);

-	/*
-	 * extract info from format-/status word
-	 */
-	format = 	    (format_status & 0b11110000000000000000000000000000) >> 28;
-	fault_status = ((format_status & 0b00001100000000000000000000000000) >> 26) |
-			       ((format_status & 0b00000000000000110000000000000000) >> 16);
-	vector       =  (format_status & 0b00000011111111000000000000000000) >> 18;
-	sr           =  (format_status & 0b00000000000000001111111111111111);
+    /*
+     * extract info from format-/status word
+     */
+    format =        (format_status & 0b11110000000000000000000000000000) >> 28;
+    fault_status = ((format_status & 0b00001100000000000000000000000000) >> 26) |
+                   ((format_status & 0b00000000000000110000000000000000) >> 16);
+    vector       =  (format_status & 0b00000011111111000000000000000000) >> 18;
+    sr           =  (format_status & 0b00000000000000001111111111111111);

-	xprintf("format: %x\r\n", format);
-	xprintf("fault_status: %x (", fault_status);
-	switch (fault_status)
-	{
-	case 0:
-		xprintf("not an access or address error nor an interrupted debug service routine");
-		break;
-	case 1:
-	case 3:
-	case 11:
-		xprintf("reserved");
-		break;
-	case 2:
-		xprintf("interrupt during a debug service routine for faults other than access errors");
-		break;
-	case 4:
-		xprintf("error (for example, protection fault) on instruction fetch");
-		break;
-	case 5:
-		xprintf("TLB miss on opword or instruction fetch");
-		break;
-	case 6:
-		xprintf("TLB miss on extension word of instruction fetch");
-		break;
-	case 7:
-		xprintf("IFP access error while executing in emulator mode");
-		break;
-	case 8:
-		xprintf("error on data write");
-		break;
-	case 9:
-		xprintf("error on attempted write to write-protected space");
-		break;
-	case 10:
-		xprintf("TLB miss on data write");
-		break;
-	case 12:
-		xprintf("error on data read");
-		break;
-	case 13:
-		xprintf("attempted read, read-modify-write of protected space");
-		break;
-	case 14:
-		xprintf("TLB miss on data read or read-modify-write");
-		break;
-	case 15:
-		xprintf("OEP access error while executing in emulator mode");
-	}
-	xprintf(")\r\n");
+    xprintf("format: %x\r\n", format);
+    xprintf("fault_status: %x (", fault_status);
+    switch (fault_status)
+    {
+    case 0:
+        xprintf("not an access or address error nor an interrupted debug service routine");
+        break;
+    case 1:
+    case 3:
+    case 11:
+        xprintf("reserved");
+        break;
+    case 2:
+        xprintf("interrupt during a debug service routine for faults other than access errors");
+        break;
+    case 4:
+        xprintf("error (for example, protection fault) on instruction fetch");
+        break;
+    case 5:
+        xprintf("TLB miss on opword or instruction fetch");
+        break;
+    case 6:
+        xprintf("TLB miss on extension word of instruction fetch");
+        break;
+    case 7:
+        xprintf("IFP access error while executing in emulator mode");
+        break;
+    case 8:
+        xprintf("error on data write");
+        break;
+    case 9:
+        xprintf("error on attempted write to write-protected space");
+        break;
+    case 10:
+        xprintf("TLB miss on data write");
+        break;
+    case 12:
+        xprintf("error on data read");
+        break;
+    case 13:
+        xprintf("attempted read, read-modify-write of protected space");
+        break;
+    case 14:
+        xprintf("TLB miss on data read or read-modify-write");
+        break;
+    case 15:
+        xprintf("OEP access error while executing in emulator mode");
+    }
+    xprintf(")\r\n");

-	xprintf("vector = %02x (", vector);
-	switch (vector)
-	{
-	case 2:
-		xprintf("access error");
-		break;
-	case 3:
-		xprintf("address error");
-		break;
-	case 4:
-		xprintf("illegal instruction");
-		break;
-	case 5:
-		xprintf("divide by zero");
-		break;
-	case 8:
-		xprintf("privilege violation");
-		break;
-	case 9:
-		xprintf("trace");
-		break;
-	case 10:
-		xprintf("unimplemented line-a opcode");
-		break;
-	case 11:
-		xprintf("unimplemented line-f opcode");
-		break;
-	case 12:
-		xprintf("non-PC breakpoint debug interrupt");
-		break;
-	case 13:
-		xprintf("PC breakpoint debug interrupt");
-		break;
-	case 14:
-		xprintf("format error");
-		break;
-	case 24:
-		xprintf("spurious interrupt");
-		break;
-	default:
-		if ( ((fault_status >= 6) && (fault_status <= 7)) ||
-			 ((fault_status >= 16) && (fault_status <= 23)))
-		{
-			xprintf("reserved");
-		}
-		else if ((fault_status >= 25) && (fault_status <= 31))
-		{
-			xprintf("level %d autovectored interrupt", fault_status - 24);
-		}
-		else if ((fault_status >= 32) && (fault_status <= 47))
-		{
-			xprintf("trap #%d", fault_status - 32);
-		}
-		else
-		{
-			xprintf("unknown fault status");
-		}
-	}
-	xprintf(")\r\n");
-	xprintf("sr=%4x\r\n", sr);
+    xprintf("vector = %02x (", vector);
+    switch (vector)
+    {
+    case 2:
+        xprintf("access error");
+        break;
+    case 3:
+        xprintf("address error");
+        break;
+    case 4:
+        xprintf("illegal instruction");
+        break;
+    case 5:
+        xprintf("divide by zero");
+        break;
+    case 8:
+        xprintf("privilege violation");
+        break;
+    case 9:
+        xprintf("trace");
+        break;
+    case 10:
+        xprintf("unimplemented line-a opcode");
+        break;
+    case 11:
+        xprintf("unimplemented line-f opcode");
+        break;
+    case 12:
+        xprintf("non-PC breakpoint debug interrupt");
+        break;
+    case 13:
+        xprintf("PC breakpoint debug interrupt");
+        break;
+    case 14:
+        xprintf("format error");
+        break;
+    case 24:
+        xprintf("spurious interrupt");
+        break;
+    default:
+        if ( ((vector >= 6) && (vector <= 7)) ||
+             ((vector >= 16) && (vector <= 23)))
+        {
+            xprintf("reserved");
+        }
+        else if ((vector >= 25) && (vector <= 31))
+        {
+            xprintf("level %d autovectored interrupt", fault_status - 24);
+        }
+        else if ((vector >= 32) && (vector <= 47))
+        {
+            xprintf("trap #%d", vector - 32);
+        }
+        else
+        {
+            xprintf("unknown vector\r\n");
+        }
+    }
+    xprintf(")\r\n");
+    xprintf("sr=%4x\r\n", sr);
+
+    __asm__ __volatile__(
+        " move.w    0x2700,d0       \r\n"       // disable interrupts
+        " move.w    d0,sr           \r\n"
+        " halt                      \r\n"       // stop processor
+        : /* no output */
+        : /* no input */
+        : "memory");
 }

 void __attribute__((interrupt)) handler(void)
 {
-	/*
-	 * Prepare exception stack contents so it can be handled by a C routine.
-	 *
-	 * For standard routines, we'd have to save registers here.
-	 * Since we do not intend to return anyway, we just ignore that requirement.
-	 */
-	__asm__ __volatile__("move.l	(sp),-(sp)\n\t"\
-						 "move.l	8(sp),-(sp)\n\t"\
-						 "bsr		_fault_handler\n\t"\
-						 "halt\n\t"\
-							: : : "memory");
+    /*
+     * Prepare exception stack contents so it can be handled by a C routine.
+     *
+     * For standard routines, we'd have to save registers here.
+     * Since we do not intend to return anyway, we just ignore that requirement.
+     */
+    __asm__ __volatile__("move.l    (sp),-(sp)\n\t"\
+                         "move.l    8(sp),-(sp)\n\t"\
+                         "bsr       _fault_handler\n\t"\
+                         "halt\n\t"\
+                            : : : "memory");
 }

 void setup_vectors(void)
 {
-	int i;
+    int i;

-	xprintf("\r\ninstall early exception vector table:");
+    xprintf("\r\ninstall early exception vector table:");

-	for (i = 8; i < 256; i++)
-	{
-		SDRAM_VECTOR_TABLE[i] = &handler;
-	}
+    for (i = 8; i < 256; i++)
+    {
+        SDRAM_VECTOR_TABLE[i] = &handler;
+    }

-	/*
-	 * make sure VBR points to our table
-	 */
-	__asm__ __volatile__("clr.l		d0\n\t"\
-						 "movec.l	d0,VBR\n\t"\
-						 "nop\n\t"\
-						 "move.l	d0,_rt_vbr" ::: "d0", "memory");
+    /*
+     * make sure VBR points to our table
+     */
+    __asm__ __volatile__("clr.l     d0\n\t"\
+                         "movec.l   d0,VBR\n\t"\
+                         "nop\n\t"\
+                         "move.l    d0,_rt_vbr"
+                         :                      /* outputs */
+                         :                      /* inputs */
+                         : "d0", "memory", "cc" /* clobbered registers */
+                        );

-	xprintf("finished.\r\n");
+    xprintf("finished.\r\n");
 }
--- a/sys/init_fpga.c
+++ b/sys/init_fpga.c
@@ -27,143 +27,163 @@
 #include "bas_printf.h"
 #include "wait.h"

-#define FPGA_STATUS		(1 << 0)
-#define FPGA_CLOCK		(1 << 1)
-#define FPGA_CONFIG		(1 << 2)
-#define FPGA_DATA0		(1 << 3)
-#define FPGA_CONF_DONE	(1 << 5)
+// #define FPGA_DEBUG
+#if defined(FPGA_DEBUG)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
+#else
+#define dbg(format, arg...) do { ; } while (0)
+#endif

-extern uint8_t _FPGA_FLASH_DATA[];
-#define FPGA_FLASH_DATA	&_FPGA_FLASH_DATA[0]
-extern uint8_t _FPGA_FLASH_DATA_SIZE[];
-#define FPGA_FLASH_DATA_SIZE	((uint32_t) &_FPGA_FLASH_DATA_SIZE[0])
+#define FPGA_STATUS     (1 << 0)
+#define FPGA_CLOCK      (1 << 1)
+#define FPGA_CONFIG     (1 << 2)
+#define FPGA_DATA0      (1 << 3)
+#define FPGA_CONF_DONE  (1 << 5)

+extern uint8_t _FPGA_CONFIG[];
+#define FPGA_FLASH_DATA &_FPGA_CONFIG[0]
+extern uint8_t _FPGA_CONFIG_SIZE[];
+#define FPGA_FLASH_DATA_SIZE    ((uint32_t) &_FPGA_CONFIG_SIZE[0])

-#ifdef _NOT_USED_
-void test_longword(void)
+/*
+ * flag located in processor SRAM1 that indicates that the FPGA configuration has
+ * been loaded through the onboard JTAG interface.
+ * init_fpga() will honour this and not overwrite config.
+ */
+extern bool _FPGA_JTAG_LOADED;
+extern int32_t _FPGA_JTAG_VALID;
+#define VALID_JTAG 0xaffeaffe
+
+void config_gpio_for_fpga_config(void)
 {
-	uint32_t *fpga_data = (uint32_t *) FPGA_FLASH_DATA;
-	const uint32_t *fpga_flash_data_end = (uint32_t *) FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE;
-	do
-	{
-		uint32_t value = *fpga_data++;
-		xprintf("LONGWORDS: addr=%p, value=%08x\r", fpga_data, value);
-	} while (fpga_data < fpga_flash_data_end);
-	xprintf("finished. \r\n");
+#if defined(MACHINE_FIREBEE)
+    /*
+     * Configure GPIO FEC1L port directions (needed to load FPGA configuration)
+     */
+    MCF_GPIO_PDDR_FEC1L = 0 |                   /* bit 7 = input */
+            0   |                               /* bit 6 = input */
+            0 |                                 /* bit 5 = input */
+            MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4 |   /* bit 4 = LED => output */
+            MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L3 |   /* bit 3 = PRG_DQ0 => output */
+            MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L2 |   /* bit 2 = FPGA_CONFIG => output */
+            MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L1 |   /* bit 1 = PRG_CLK (FPGA) => output */
+            0;                                  /* bit 0 => input */
+#endif /* MACHINE_FIREBEE */
 }

-void test_word(void)
+void config_gpio_for_jtag_config(void)
 {
-	uint16_t *fpga_data = (uint16_t *) FPGA_FLASH_DATA;
-	const uint16_t *fpga_flash_data_end = (uint16_t *) FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE;
-
-	do
-	{
-		uint16_t value = *fpga_data++;
-		xprintf("WORDS: addr=%p, value=%04x\r", fpga_data, value);
-	} while (fpga_data < fpga_flash_data_end);
-	xprintf("finished. \r\n");
+    /*
+     * configure FEC1L port directions to enable external JTAG configuration download to FPGA
+     */
+    MCF_GPIO_PDDR_FEC1L = 0 |
+                          MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4;  /* bit 4 = LED => output */
+                                                            /* all other bits = input */
+    /*
+     * unfortunately, the GPIO module cannot trigger interrupts. That means CONF_DONE needs to be polled to detect
+     * external FPGA (re)configuration and reset the system in that case. Could be done from the OS as well...
+     */
 }

-void test_byte(void)
-{
-	uint8_t *fpga_data = (uint8_t *) FPGA_FLASH_DATA;
-	const uint8_t *fpga_flash_data_end = (uint8_t *) FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE;
-
-	do
-	{
-		uint8_t value = *fpga_data++;
-		xprintf("LONGWORDS: addr=%p, value=%08x\r", fpga_data, value);
-	} while (fpga_data < fpga_flash_data_end);
-	xprintf("finished. \r\n");
-}
-#endif /* _NOT_USED_ */
-
 /*
 * load FPGA
 */
-void init_fpga(void)
+bool init_fpga(void)
 {
-	uint8_t *fpga_data;
-	volatile int32_t time, start, end;
-	int i;
+    uint8_t *fpga_data;
+    volatile int32_t time, start, end;
+    int i;

-	xprintf("FPGA load config... ");
-	start = MCF_SLT0_SCNT; 
+    dbg("FPGA load config\r\n(_FPGA_JTAG_LOADED = %x, _FPGA_JTAG_VALID = %x)...\r\n", _FPGA_JTAG_LOADED, _FPGA_JTAG_VALID);
+    if (_FPGA_JTAG_LOADED == true && _FPGA_JTAG_VALID == VALID_JTAG)
+    {
+        dbg("detected _FPGA_JTAG_LOADED flag. Not overwriting FPGA config.\r\n");

-	MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;		/* FPGA clock => low */
+        /* reset the flag so that next boot will load config again from flash */
+        _FPGA_JTAG_LOADED = 0;
+        _FPGA_JTAG_VALID = 0;

-	/* pulling FPGA_CONFIG to low resets the FPGA */
-	MCF_GPIO_PODR_FEC1L &= ~FPGA_CONFIG;	/* FPGA config => low */
-	wait(10);			/* give it some time to do its reset stuff */
+        return true;
+    }
+    start = MCF_SLT0_SCNT;

-	while ((MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS) && (MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE));
+    config_gpio_for_fpga_config();
+    MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;                 /* FPGA clock => low */

-	MCF_GPIO_PODR_FEC1L |= FPGA_CONFIG;				/* pull FPGA_CONFIG high to start config cycle */
-	while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS));	/* wait until status becomes high */
+    /* pulling FPGA_CONFIG to low resets the FPGA */
+    MCF_GPIO_PODR_FEC1L &= ~FPGA_CONFIG;                /* FPGA config => low */
+    wait(10);                                           /* give it some time to do its reset stuff */

-	/*
-	 * excerpt from an Altera configuration manual:
-	 *
-	 * The low-to-high transition of nCONFIG on the FPGA begins the configuration cycle. The
-	 * configuration cycle consists of 3 stages<65>reset, configuration, and initialization.
-	 * While nCONFIG is low, the device is in reset. When the device comes out of reset,
-	 * nCONFIG must be at a logic high level in order for the device to release the open-drain
- 	 * nSTATUS pin. After nSTATUS is released, it is pulled high by a pull-up resistor and the FPGA
-	 * is ready to receive configuration data. Before and during configuration, all user I/O pins
-	 * are tri-stated. Stratix series, Arria series, and Cyclone series have weak pull-up resistors
-	 * on the I/O pins which are on, before and during configuration.
-	 *
-	 * To begin configuration, nCONFIG and nSTATUS must be at a logic high level. You can delay
-	 * configuration by holding the nCONFIG low. The device receives configuration data on its
-	 * DATA0 pins. Configuration data is latched into the FPGA on the rising edge of DCLK. After
-	 * the FPGA has received all configuration data successfully, it releases the CONF_DONE pin,
-	 * which is pulled high by a pull-up resistor. A low to high transition on CONF_DONE indicates
-	 * configuration is complete and initialization of the device can begin.
-	 */
+    while ((MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS) && (MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE));

-	const uint8_t *fpga_flash_data_end = FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE;
+    MCF_GPIO_PODR_FEC1L |= FPGA_CONFIG;                 /* pull FPGA_CONFIG high to start config cycle */
+    while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS))
+        ;                                               /* wait until status becomes high */

-	fpga_data = (uint8_t *) FPGA_FLASH_DATA;
-	do
-	{
-		uint8_t value = *fpga_data++;
-		for (i = 0; i < 8; i++, value >>= 1)
-		{
+    /*
+     * excerpt from an Altera configuration manual:
+     *
+     * The low-to-high transition of nCONFIG on the FPGA begins the configuration cycle. The
+     * configuration cycle consists of 3 stages<65>reset, configuration, and initialization.
+     * While nCONFIG is low, the device is in reset. When the device comes out of reset,
+     * nCONFIG must be at a logic high level in order for the device to release the open-drain
+     * nSTATUS pin. After nSTATUS is released, it is pulled high by a pull-up resistor and the FPGA
+     * is ready to receive configuration data. Before and during configuration, all user I/O pins
+     * are tri-stated. Stratix series, Arria series, and Cyclone series have weak pull-up resistors
+     * on the I/O pins which are on, before and during configuration.
+     *
+     * To begin configuration, nCONFIG and nSTATUS must be at a logic high level. You can delay
+     * configuration by holding the nCONFIG low. The device receives configuration data on its
+     * DATA0 pins. Configuration data is latched into the FPGA on the rising edge of DCLK. After
+     * the FPGA has received all configuration data successfully, it releases the CONF_DONE pin,
+     * which is pulled high by a pull-up resistor. A low to high transition on CONF_DONE indicates
+     * configuration is complete and initialization of the device can begin.
+     */

-			if (value & 1)
-			{
-				/* bit set -> toggle DATA0 to high */
-				MCF_GPIO_PODR_FEC1L |= FPGA_DATA0;
-			}
-			else
-			{
-				/* bit is cleared -> toggle DATA0 to low */
-				MCF_GPIO_PODR_FEC1L &= ~FPGA_DATA0;
-			}
-			/* toggle DCLK -> FPGA reads the bit */
-			MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
-			MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
-		}
-	} while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) && (fpga_data < fpga_flash_data_end));
+    const uint8_t *fpga_flash_data_end = FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE;

-	if (fpga_data < fpga_flash_data_end)
-	{
+    fpga_data = (uint8_t *) FPGA_FLASH_DATA;
+    do
+    {
+        uint8_t value = *fpga_data++;
+        for (i = 0; i < 8; i++, value >>= 1)
+        {
+
+            if (value & 1)
+            {
+                /* bit set -> toggle DATA0 to high */
+                MCF_GPIO_PODR_FEC1L |= FPGA_DATA0;
+            }
+            else
+            {
+                /* bit is cleared -> toggle DATA0 to low */
+                MCF_GPIO_PODR_FEC1L &= ~FPGA_DATA0;
+            }
+            /* toggle DCLK -> FPGA reads the bit */
+            MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
+            MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
+        }
+    } while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) && (fpga_data < fpga_flash_data_end));
+
+    if (fpga_data < fpga_flash_data_end)
+    {
 #ifdef _NOT_USED_
-		while (fpga_data++ < fpga_flash_data_end)
-		{
-			/* toggle a little more since it's fun ;) */
-			MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
-			MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
-		}
+        while (fpga_data++ < fpga_flash_data_end)
+        {
+            /* toggle a little more since it's fun ;) */
+            MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
+            MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
+        }
 #endif /* _NOT_USED_ */
-		end = MCF_SLT0_SCNT;
-		time = (start - end) / (SYSCLK / 1000) / 1000;
-		
-		xprintf("finished (took %f seconds).\r\n", time / 1000.0);
-	}
-	else
-	{
-		xprintf("FAILED!\r\n");
-	}
+        end = MCF_SLT0_SCNT;
+        time = (start - end) / (SYSCLK / 1000) / 1000;
+
+        xprintf("finished (took %f seconds).\r\n", time / 1000.0);
+        config_gpio_for_jtag_config();
+        return true;
+    }
+    xprintf("FAILED!\r\n");
+    config_gpio_for_jtag_config();
+
+    return false;
 }
--- a/sys/interrupts.c
+++ b/sys/interrupts.c
@@ -3,6 +3,7 @@
 *
 * Handle interrupts, the levels.
 *
+ *
 * This file is part of BaS_gcc.
 *
 * BaS_gcc is free software: you can redistribute it and/or modify
@@ -22,203 +23,463 @@
 *      Author: Markus Fröschle
 */

-#include <stdint.h>
-#include <stdbool.h>
+#include <bas_types.h>
 #include "MCF5475.h"
 #include "bas_utils.h"
 #include "bas_printf.h"
+#include "bas_string.h"
 #include "exceptions.h"
 #include "interrupts.h"
 #include "bas_printf.h"
+#include "startcf.h"
+#include "cache.h"
+#include "util.h"
+#include "dma.h"
+#include "pci.h"

-extern void (*rt_vbr[])(void);
-#define VBR	rt_vbr
-
-#define IRQ_DEBUG
+//#define IRQ_DEBUG
 #if defined(IRQ_DEBUG)
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif
+#define err(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)

-/*
- * register an interrupt handler at the Coldfire interrupt controller and add the handler to
- * the interrupt vector table
- */
-int register_interrupt_handler(uint8_t source, uint8_t level, uint8_t priority, uint8_t intr, void (*handler)(void))
-{
-	int ipl;
-	int i;
-	volatile uint8_t *ICR = &MCF_INTC_ICR01 - 1;
-	uint8_t lp;

-	source &= 63;
-	priority &= 7;
-
-	if (source < 1 || source > 63)
-	{
-		dbg("%s: interrupt source %d not defined\r\n", __FUNCTION__, source);
-		return -1;
-	}
-
-	lp = MCF_INTC_ICR_IL(level) | MCF_INTC_ICR_IP(priority);
-
-	/* check if this combination is already set somewhere */
-	for (i = 1; i < 64; i++)
-	{
-		if (ICR[i] == lp)
-		{
-			dbg("%s: level %d and priority %d already used for interrupt source %d!\r\n", __FUNCTION__,
-					level, priority, i);
-			return -1;
-		}
-	}
-
-	/* disable interrupts */
-	ipl = set_ipl(7);
-
-	VBR[64 + source] = handler;	/* first 64 vectors are system exceptions */
-
-	/* set level and priority in interrupt controller */
-	ICR[source] = lp;
-
-	/* set interrupt mask to where it was before */
-	set_ipl(ipl);
-
-	return 0;
-}
-
-#ifndef UIF_MAX_ISR_ENTRY
-#define UIF_MAX_ISR_ENTRY   (20)
+#ifndef MAX_ISR_ENTRY
+#define MAX_ISR_ENTRY   (20)
 #endif


-typedef struct
+struct isrentry
 {
-	int     vector;
-	int     type;
-	int     (*handler)(void *, void *);
-	void    *hdev;
-	void    *harg;
-} ISRENTRY;
-
-ISRENTRY isrtab[UIF_MAX_ISR_ENTRY];
+    int vector;
+    bool (*handler)(void *, void *);
+    void *hdev;
+    void *harg;
+};

+static struct isrentry isrtab[MAX_ISR_ENTRY];      /* list of interrupt service routines */

+/*
+ * clear the table of interrupt service handlers
+ */
 void isr_init(void)
 {
-	int index;
-
-	for (index = 0; index < UIF_MAX_ISR_ENTRY; index++)
-	{
-		isrtab[index].vector = 0;
-		isrtab[index].type = 0;
-		isrtab[index].handler = 0;
-		isrtab[index].hdev = 0;
-		isrtab[index].harg = 0;
-	}
+    memset(isrtab, 0, sizeof(isrtab));
 }

-
-int isr_register_handler(int type, int vector, 
-		int (*handler)(void *, void *), void *hdev, void *harg)
+bool isr_set_prio_and_level(int int_source, int priority, int level)
 {
-	/*
-	 * This function places an interrupt handler in the ISR table,
-	 * thereby registering it so that the low-level handler may call it.
-	 *
-	 * The two parameters are intended for the first arg to be a 
-	 * pointer to the device itself, and the second a pointer to a data 
-	 * structure used by the device driver for that particular device.
-	 */
-	int index;
+    if (int_source > 8 && int_source <= 62)
+    {
+        /*
+        * preset interrupt control registers with level and priority
+        */
+        dbg("set MCF_INTC_ICR(%d) to priority %d, level %d\r\n",
+            int_source, priority, level);
+        MCF_INTC_ICR(int_source) = MCF_INTC_ICR_IP(priority) |
+                                   MCF_INTC_ICR_IL(level);
+    }
+    else if (int_source >= 1 && int_source <= 8)
+    {
+        dbg("interrrupt control register for vector %d is read only!\r\n");
+    }
+    else
+    {
+        err("invalid vector - interrupt control register not set.\r\n");
+        return false;
+    }

-	if ((vector == 0) || 
-			((type != ISR_DBUG_ISR) && (type != ISR_USER_ISR)) ||
-			(handler == NULL))
-	{
-		dbg("%s: illegal type, vector or handler!\r\n", __FUNCTION__);
-		return false;
-	}
-
-	for (index = 0; index < UIF_MAX_ISR_ENTRY; index++)
-	{
-		if ((isrtab[index].vector == vector) &&
-				(isrtab[index].type == type))
-		{
-			/* only one entry of each type per vector */
-			dbg("%s: already set handler with this type and vector (%d, %d)\r\n", __FUNCTION__, type, vector);
-			return false;
-		}
-
-		if (isrtab[index].vector == 0)
-		{
-			isrtab[index].vector = vector;
-			isrtab[index].type = type;
-			isrtab[index].handler = handler;
-			isrtab[index].hdev = hdev;
-			isrtab[index].harg = harg;
-
-			return true;
-		}
-	}
-	dbg("%s: no available slots to register handler for vector %d\n\r", __FUNCTION__, vector);
-
-	return false;   /* no available slots */
+    return true;
 }

-void isr_remove_handler(int type, int (*handler)(void *, void *))
+/*
+ * enable internal int source in interrupt controller
+ */
+bool isr_enable_int_source(int int_source)
 {
-	/*
-	 * This routine removes from the ISR table all
-	 * entries that matches 'type' and 'handler'.
-	 */
-	int index;
+    dbg("anding int_source %d, MCF_INTC_IMR%c = 0x%08x, now 0x%08x\r\n",
+        int_source,
+        int_source < 32 && int_source > 0 ? 'L' :
+                    int_source >= 32 && int_source <= 62 ? 'H' : 'U',
+        int_source < 32 && int_source > 0 ? ~(1 << int_source) :
+                    int_source >= 32 && int_source <= 62 ? ~(1 << (int_source - 32)) : 0,
+        MCF_INTC_IMRH);

-	for (index = 0; index < UIF_MAX_ISR_ENTRY; index++)
-	{
-		if ((isrtab[index].handler == handler) && 
-				(isrtab[index].type == type))
-		{
-			isrtab[index].vector = 0;
-			isrtab[index].type = 0;
-			isrtab[index].handler = 0;
-			isrtab[index].hdev = 0;
-			isrtab[index].harg = 0;
+    if (int_source < 32 && int_source > 0)
+    {
+        MCF_INTC_IMRL &= ~(1 << int_source);
+    }
+    else if (int_source >= 32 && int_source <= 62)
+    {
+        MCF_INTC_IMRH &= ~(1 << (int_source - 32));
+    }
+    else
+    {
+        err("vector %d does not correspond to an internal interrupt source\r\n");
+        return false;
+    }

-			return;
-		}
-	}
-	dbg("%s: no such handler registered (type=%d, handler=%p\r\n", __FUNCTION__, type, handler);
+    return true;
 }

+/*
+ * This function places an interrupt handler in the ISR table,
+ * thereby registering it so that the low-level handler may call it.
+ *
+ * The two parameters are intended for the first arg to be a
+ * pointer to the device itself, and the second a pointer to a data
+ * structure used by the device driver for that particular device.
+ */
+bool isr_register_handler(int vector, int level, int priority, bool (*handler)(void *, void *), void *hdev, void *harg)
+{
+    int index;
+    int int_source;

+    if ((vector == 0) || (handler == NULL))
+    {
+        dbg("illegal vector or handler!\r\n");
+
+        return false;
+    }
+
+    for (index = 0; index < MAX_ISR_ENTRY; index++)
+    {
+        if (isrtab[index].vector == vector)
+        {
+            /* one cross each, only! */
+            dbg("already set handler with this vector (%d, %d)\r\n", vector);
+
+            return false;
+        }
+
+        if (isrtab[index].vector == 0)
+        {
+            isrtab[index].vector = vector;
+            isrtab[index].handler = handler;
+            isrtab[index].hdev = hdev;
+            isrtab[index].harg = harg;
+
+            int_source = vector - 64;
+
+            if (!isr_enable_int_source(int_source))
+            {
+                err("failed to enable internal interrupt souce %d in IMRL/IMRH\r\n", int_source);
+                return false;
+            }
+
+            if (!isr_set_prio_and_level(int_source, priority, level))
+            {
+                err("failed to set priority and level for interrupt source %d\r\n", int_source);
+                return false;
+            }
+
+            return true;
+        }
+    }
+    dbg("no available slots to register handler for vector %d\n\r", vector);
+
+    return false;   /* no available slots */
+}
+
+void isr_remove_handler(bool (*handler)(void *, void *))
+{
+    /*
+     * This routine removes from the ISR table all
+     * entries that matches 'handler'.
+     */
+    int index;
+
+    for (index = 0; index < MAX_ISR_ENTRY; index++)
+    {
+        if (isrtab[index].handler == handler)
+        {
+            memset(&isrtab[index], 0, sizeof(struct isrentry));
+
+            return;
+        }
+    }
+    dbg("no such handler registered (handler=%p\r\n", handler);
+}
+
+/*
+ * This routine searches the ISR table for an entry that matches
+ * 'vector'. If one is found, then 'handler' is executed.
+ *
+ * This routine returns either true or false where
+ *  true = interrupt has been handled, return to caller
+ *  false= interrupt has been handled or hasn't, but needs to be forwarded to TOS
+ */
 bool isr_execute_handler(int vector)
 {
-	/*
-	 * This routine searches the ISR table for an entry that matches
-	 * 'vector'.  If one is found, then 'handler' is executed.
-	 */
-	int index;
-	bool retval = false;
+    int index;

-	/*
-	 * First locate a BaS Interrupt Service Routine handler.
-	 */
-	for (index = 0; index < UIF_MAX_ISR_ENTRY; index++)
-	{
-		if ((isrtab[index].vector == vector) &&
-				(isrtab[index].type == ISR_DBUG_ISR))
-		{
-			retval = true;
-		
-			if (isrtab[index].handler(isrtab[index].hdev, isrtab[index].harg))
-			{
-				return retval;
-			}
-		}
-	}
-	dbg("%s: no BaS isr handler for vector %d found\r\n", __FUNCTION__, vector);
-	return retval;
+    dbg("vector = %d\r\n", vector);
+
+    /*
+     * locate an interrupt service routine handler.
+     */
+    for (index = 0; index < MAX_ISR_ENTRY; index++)
+    {
+        if (isrtab[index].vector == vector)
+        {
+            isrtab[index].handler(isrtab[index].hdev, isrtab[index].harg);
+            return true;
+        }
+    }
+    err("no isr handler for vector %d found. Spurious?\r\n", vector);
+
+    return true;
 }

+/*
+ * PIC interrupt handler for Firebee
+ *
+ * Handles PIC requests that come in from PSC3 serial interface. Currently, that
+ * is RTC/NVRAM requests only
+ */
+bool pic_interrupt_handler(void *arg1, void *arg2)
+{
+    uint8_t rcv_byte;
+
+    rcv_byte = MCF_PSC3_PSCRB_8BIT;
+    if (rcv_byte == 2)                  /* PIC requests RTC data */
+    {
+        uint8_t *rtc_reg = (uint8_t *) 0xffff8961;
+        uint8_t *rtc_data = (uint8_t *) 0xffff8963;
+        int index = 0;
+
+        err("PIC interrupt: requesting RTC data\r\n");
+
+        MCF_PSC3_PSCTB_8BIT = 0x82;     // header byte to PIC
+        do
+        {
+            *rtc_reg = 0;
+            MCF_PSC3_PSCTB_8BIT = *rtc_data;
+        } while (index++ < 64);
+    }
+    return true;
+}
+
+bool xlbpci_interrupt_handler(void *arg1, void *arg2)
+{
+    uint32_t reason;
+
+    dbg("XLB PCI interrupt\r\n");
+
+    reason = MCF_PCI_PCIISR;
+
+    if (reason & MCF_PCI_PCIISR_RE)
+    {
+        dbg("Retry error. Retry terminated or max retries reached. Cleared\r\n");
+        MCF_PCI_PCIISR |= MCF_PCI_PCIISR_RE;
+    }
+
+    if (reason & MCF_PCI_PCIISR_IA)
+    {
+        dbg("Initiator abort. No target answered in time. Cleared.\r\n");
+        MCF_PCI_PCIISR |= MCF_PCI_PCIISR_IA;
+    }
+
+    if (reason & MCF_PCI_PCIISR_TA)
+    {
+        dbg("Target abort. Cleared.\r\n");
+        MCF_PCI_PCIISR |= MCF_PCI_PCIISR_TA;
+    }
+
+    return true;
+}
+
+bool pciarb_interrupt_handler(void *arg1, void *arg2)
+{
+    dbg("PCI ARB interrupt\r\n");
+
+    return true;
+}
+
+#if defined(MACHINE_FIREBEE)
+/*
+ * This gets called from irq5 in exceptions.S
+ *
+ * IRQ5 are the "FBEE" (PIC, ETH PHY, PCI, DVI monitor sense and DSP) interrupts multiplexed by the FPGA interrupt handler
+ */
+bool irq5_handler(void *arg1, void *arg2)
+{
+    uint32_t pending_interrupts = FBEE_INTR_PENDING;
+
+    dbg("IRQ5!\r\n");
+    if (pending_interrupts & FBEE_INTR_PIC)
+    {
+        dbg("PIC interrupt\r\n");
+        FBEE_INTR_CLEAR = FBEE_INTR_PIC;
+    }
+
+    if (pending_interrupts & FBEE_INTR_ETHERNET)
+    {
+        dbg("ethernet 0 PHY interrupt\r\n");
+        FBEE_INTR_CLEAR = FBEE_INTR_ETHERNET;
+    }
+
+    if (pending_interrupts & FBEE_INTR_DVI)
+    {
+        dbg("DVI monitor sense interrupt\r\n");
+        FBEE_INTR_CLEAR = FBEE_INTR_DVI;
+    }
+
+    if (pending_interrupts & FBEE_INTR_PCI_INTA ||
+        pending_interrupts & FBEE_INTR_PCI_INTB ||
+        pending_interrupts & FBEE_INTR_PCI_INTC ||
+        pending_interrupts & FBEE_INTR_PCI_INTD)
+    {
+        dbg("PCI interrupt IRQ5\r\n");
+        FBEE_INTR_CLEAR = FBEE_INTR_PCI_INTA |
+                          FBEE_INTR_PCI_INTB |
+                          FBEE_INTR_PCI_INTC |
+                          FBEE_INTR_PCI_INTD;
+    }
+
+    if (pending_interrupts & FBEE_INTR_DSP)
+    {
+        dbg("DSP interrupt\r\n");
+        FBEE_INTR_CLEAR = FBEE_INTR_DSP;
+    }
+
+    if (pending_interrupts & FBEE_INTR_VSYNC || pending_interrupts & FBEE_INTR_HSYNC)
+    {
+        dbg("vsync or hsync interrupt!\r\n");
+        FBEE_INTR_CLEAR = FBEE_INTR_VSYNC | FBEE_INTR_HSYNC;
+        /* hsync and vsync should go to TOS unhandled */
+        return false;
+    }
+
+    MCF_EPORT_EPFR |= (1 << 5);             /* clear interrupt from edge port */
+
+    return true;
+}
+
+/*
+ * blink the Firebee's LED to show we are still alive
+ */
+void blink_led(void)
+{
+    static uint16_t blinker = 0;
+
+    if ((blinker++ & 0x80) > 0)
+    {
+        MCF_GPIO_PODR_FEC1L |= (1 << 4);    /* LED off */
+    }
+    else
+    {
+        MCF_GPIO_PODR_FEC1L &= ~(1 << 4);   /* LED on */
+    }
+}
+
+/*
+ * Atari MFP interrupt registers.
+ *
+ * TODO: should go into a header file
+ */
+
+#define FALCON_MFP_IERA     *((volatile uint8_t *) 0xfffffa07)
+#define FALCON_MFP_IERB     *((volatile uint8_t *) 0xfffffa09)
+#define FALCON_MFP_IPRA     *((volatile uint8_t *) 0xfffffa0b)
+#define FALCON_MFP_IPRB     *((volatile uint8_t *) 0xfffffa0d)
+#define FALCON_MFP_IMRA     *((volatile uint8_t *) 0xfffffa13)
+#define FALCON_MFP_IMRB     *((volatile uint8_t *) 0xfffffa15)
+
+bool irq6_acsi_dma_interrupt(void)
+{
+    dbg("ACSI DMA interrupt\r\n");
+
+    /*
+     * TODO: implement handler
+     */
+
+    return false;
+}
+
+bool irq6_handler(uint32_t sf1, uint32_t sf2)
+{
+    //err("IRQ6!\r\n");
+
+    if (FALCON_MFP_IPRA || FALCON_MFP_IPRB)
+    {
+        blink_led();
+    }
+
+    MCF_EPORT_EPFR |= (1 << 6); /* clear int6 from edge port */
+
+    return false;               /* always forward IRQ6 to TOS */
+}
+
+#else /* MACHINE_FIREBEE */
+
+bool irq5_handler(void *arg1, void *arg2)
+{
+    MCF_EPORT_EPFR |= (1 << 5); /* clear int5 from edge port */
+
+    return true;
+}
+
+bool irq6_handler(void *arg1, void *arg2)
+{
+    err("IRQ6!\r\n");
+
+    MCF_EPORT_EPFR |= (1 << 6); /* clear int6 from edge port */
+
+    return false;       /* always forward IRQ6 to TOS */
+}
+
+/*
+ * This gets called from irq7 in exceptions.S
+ * Once we arrive here, the SR has been set to disable interrupts and the gcc scratch registers have been saved
+ */
+bool irq7_handler(void)
+{
+    int32_t handle;
+    int32_t value = 0;
+    int32_t newvalue;
+
+    MCF_EPORT_EPFR |= (1 << 7);
+    dbg("IRQ7!\r\n");
+    if ((handle = pci_get_interrupt_cause()) > 0)
+    {
+        newvalue = pci_call_interrupt_chain(handle, value);
+        if (newvalue == value)
+        {
+            dbg("interrupt not handled!\r\n");
+        }
+    }
+    MCF_EPORT_EPFR |= (1 << 7); /* clear int7 from edge port */
+
+    return true;
+}
+#endif /* MACHINE_M548X */
+
+#if defined(MACHINE_FIREBEE)
+/*
+ * this is the higlevel interrupt service routine for gpt0 timer interrupts.
+ *
+ * It is called from handler_gpt0 in exceptions.S
+ *
+ * The gpt0 timer is not used as a timer, but as interrupt trigger by the FPGA which fires
+ * everytime the video base address high byte (0xffff8201) gets written by user code (i.e.
+ * everytime the video base address is set).
+ * The interrupt service routine checks if that page was already set as a video page (in that
+ * case it does nothing), if not (if we have a newly set page), it sets up an MMU mapping for
+ * that page (effectively rerouting any further access to Falcon video RAM to Firebee FPGA
+ * video RAM starting at 0x60000000) and copies SDRAM contents of that page to the video
+ * RAM page.
+ */
+bool gpt0_interrupt_handler(void *arg0, void *arg1)
+{
+    dbg("handler called\n\r");
+
+    MCF_GPT0_GMS &= ~1;     /* rearm trigger */
+    NOP();
+    MCF_GPT0_GMS |= 1;
+
+    return true;
+}
+#endif /* MACHINE_FIREBEE */
--- a/sys/mmu.c
+++ b/sys/mmu.c
--- a/sys/startcf.S
+++ b/sys/startcf.S
@@ -1,3 +1,4 @@
+
 /*
 * This object file must be the first to be linked,
 * so it will be placed at the very beginning of the ROM.
@@ -49,7 +50,8 @@ _rom_entry:
 		lea 	__SUP_SP,a7
 		move.l	#0,(sp)

-		/* Initialize the processor caches.
+		/*
+		 * Initialize the processor caches.
 		 * The instruction cache is fully enabled.
 		 * The data cache is enabled, but cache-inhibited by default.
 		 * Later, the MMU will fully activate the data cache for specific areas.
--- a/sys/sysinit.c
+++ b/sys/sysinit.c
--- a/tos/Makefile
+++ b/tos/Makefile
@@ -0,0 +1,15 @@
+.PHONY: tos
+.PHONY: jtagwait
+.PHONY: bascook
+.PHONY: vmem_test
+tos: jtagwait bascook vmem_test
+
+jtagwait:
+	(cd $@; make)
+
+bascook:
+	(cd $@; make)
+
+vmem_test:
+	(cd $@; make)
+
--- a/tos/bascook/Makefile
+++ b/tos/bascook/Makefile
@@ -0,0 +1,97 @@
+CROSS=Y
+
+CROSSBINDIR_IS_Y=m68k-atari-mint-
+CROSSBINDIR_IS_N=
+
+CROSSBINDIR=$(CROSSBINDIR_IS_$(CROSS))
+
+UNAME := $(shell uname)
+ifeq ($(CROSS), Y)
+ifeq ($(UNAME),Linux)
+PREFIX=m68k-atari-mint
+HATARI=hatari
+else
+PREFIX=m68k-atari-mint
+HATARI=/usr/local/bin/hatari
+endif
+else
+PREFIX=/usr
+endif
+
+DEPEND=depend
+TOPDIR= ../..
+
+BAS_INCLUDE=-I$(TOPDIR)/../BaS_gcc/include
+
+INCLUDE=-I$(TOPDIR)/../libcmini/include $(BAS_INCLUDE) -nostdlib
+LIBS=-lcmini -nostdlib -lgcc
+CC=$(PREFIX)/bin/gcc
+
+CC=$(CROSSBINDIR)gcc
+STRIP=$(CROSSBINDIR)strip
+STACK=$(CROSSBINDIR)stack
+
+APP=bascook.prg
+TEST_APP=$(APP)
+
+CFLAGS=\
+	-Os\
+	-g\
+	-Wl,-Map,mapfile\
+	-Wall
+
+SRCDIR=sources
+
+CSRCS=\
+	$(SRCDIR)/bascook.c
+ASRCS=
+
+COBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.c,%.o,$(CSRCS)))
+AOBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.S,%.o,$(ASRCS)))
+OBJS=$(COBJS) $(AOBJS)
+
+TRGTDIRS=.
+OBJDIRS=$(patsubst %,%/objs,$(TRGTDIRS))
+
+#
+# multilib flags. These must match m68k-atari-mint-gcc -print-multi-lib output
+#
+$(APP):CFLAGS += -mcpu=5475
+
+all: $(TEST_APP)
+
+#
+# generate pattern rules for multilib object files.
+#
+define CC_TEMPLATE
+$(1)/objs/%.o:$(SRCDIR)/%.c
+	$(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@
+
+$(1)/objs/%.o:$(SRCDIR)/%.S
+	$(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@
+
+$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS))
+$(1)/$(APP): $$($(1)_OBJS)
+	$(CC) $$(CFLAGS) -o $$@ $(TOPDIR)/../libcmini/m5475/startup.o $$($(1)_OBJS) -L$(TOPDIR)/../libcmini/m5475 $(LIBS)
+	$(STRIP) $$@
+endef
+$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR))))
+
+$(DEPEND): $(ASRCS) $(CSRCS)
+	-rm -f $(DEPEND)
+	for d in $(TRGTDIRS);\
+		do $(CC) $(CFLAGS) $(INCLUDE) -M $(ASRCS) $(CSRCS) | sed -e "s#^\(.*\).o:#$$d/objs/\1.o:#" >> $(DEPEND); \
+    done
+
+
+clean:
+	@rm -f $(patsubst %,%/objs/*.o,$(TRGTDIRS)) $(patsubst %,%/$(APP),$(TRGTDIRS))
+	@rm -f $(DEPEND) mapfile
+
+.PHONY: printvars
+printvars:
+	@$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
+
+ifneq (clean,$(MAKECMDGOALS))
+-include $(DEPEND)
+endif
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Markus Fröschle	e0293fd1d8	added code to halt machine after a fatal error	2015-01-17 08:03:50 +00:00
Markus Fröschle	cc4263ef02	refactored struct naming	2015-01-16 07:35:35 +00:00
Markus Fröschle	2d529ecd9d	fixed typo	2015-01-15 15:16:51 +00:00
Markus Fröschle	d598d9ac65	networking looks good?	2015-01-14 18:38:33 +00:00
Markus Fröschle	d4bf8a7c2b	video DDR RAM initialization seems to use an octal number???	2015-01-13 07:05:08 +00:00
Markus Fröschle	4a68850481	successfully compiled BaS_gcc over NFS on a Linux host from the Firebee: network test passed	2015-01-12 21:37:44 +00:00
Markus Fröschle	fe0a0ceb1b	added skeleton for planned i2c API	2015-01-12 14:00:20 +00:00
Markus Fröschle	fe7075dfa5	fixed missing unmask of DMA task interrupts	2015-01-12 10:49:01 +00:00
Markus Fröschle	68b309d37a	implemented initial version of XLB PCI interrupt handler. For now it just reports and clears errors.	2015-01-12 07:25:16 +00:00
Markus Fröschle	f73e602a80	activated more Coldfire interrupt sources	2015-01-11 17:02:40 +00:00
Markus Fröschle	d860191121	replaced DMA API routines by fresh download with originals moved more interrupt handlers to generalized handler cleaned up lowlevel interrupt handling fixed wrong assignment of interrupt masks reformatted	2015-01-11 10:27:36 +00:00
Markus Fröschle	df28a267da	changed return type of interrupt handlers	2015-01-10 17:44:04 +00:00
Markus Fröschle	b56f40fc98	did more changes to interrupt code, but still crashes in networking	2015-01-10 17:19:56 +00:00
Markus Fröschle	cb5bd09713	This version is working again, except network. For some reason, the DMA interrupts don't seem to be triggered.	2015-01-09 20:12:03 +00:00
Markus Fröschle	a9d62f28fb	(re) implemented irq1-4 + irq7	2015-01-09 16:01:58 +00:00
Markus Fröschle	1dfb34d8cf	(re)implemented irq1-irq4+irq7 handlers	2015-01-09 15:57:42 +00:00
Markus Fröschle	a96e42ba3d	fixed wrong offset on MFP interrupt	2015-01-09 15:08:44 +00:00
Markus Fröschle	44bdd93e74	Not tested. Hopefully fixed interrupts.	2015-01-08 16:36:55 +00:00
Markus Fröschle	19c8636eae	fixed formatting	2015-01-07 13:54:35 +00:00
Markus Fröschle	1ca15ed48b	reformatted	2014-12-30 22:25:36 +00:00
Markus Fröschle	7a4037eb24	reduced wait times	2014-12-30 14:21:05 +00:00
Markus Fröschle	c90a6e58f9	merged latest fixes from R_0_8_6 branch	2014-12-29 14:44:55 +00:00
Markus Fröschle	550572d2d3	vmem_ctrl cannot be read on the current FPGA version	2014-12-29 14:37:39 +00:00
Markus Fröschle	825eb66023	added more tests	2014-12-27 20:22:09 +00:00
Markus Fröschle	b3f899a1fb	disabled caches for tests to work reliably	2014-12-27 16:49:57 +00:00
Markus Fröschle	a628e686cc	compile ELF by default	2014-12-26 22:15:38 +00:00
Markus Fröschle	eb47f0ae06	reformatted	2014-12-26 22:14:57 +00:00
Markus Fröschle	a68d0dbc60	more FPGA tests	2014-12-26 20:01:03 +00:00
Markus Fröschle	a522fccc80	added more FPGA tests	2014-12-26 15:35:01 +00:00
Markus Fröschle	31cd70c66d	do first tests with FPGA config. SDRAM doesn't seem to work, reading and writing of Firebee CLUT does work, hovever.	2014-12-26 12:31:44 +00:00
Markus Fröschle	0bd0b02c3c	added test program for FPGA	2014-12-26 11:38:27 +00:00
Markus Fröschle	5fe664c290	fixed to support bugfix from 0.8.6	2014-12-26 10:33:53 +00:00
Markus Fröschle	645aca7228	merged fixes from 0.8.6.1 (errornous skip of FPGA load)	2014-12-26 09:36:45 +00:00
Markus Fröschle	732956830f	start merging R_0.8.6.1 (jtag load bug fix)	2014-12-26 09:07:22 +00:00
Markus Fröschle	f871794760	fixed bug that prevented proper detection of FPGA load skip request	2014-12-26 08:56:30 +00:00
Markus Fröschle	88c1bd2373	fixed errornous deactivation of FPGA load	2014-12-26 07:26:10 +00:00
Markus Fröschle	dce24ff7c7	fixed comments	2014-12-16 20:33:51 +00:00
Markus Fröschle	764e089806	improved error handling	2014-11-24 16:12:35 +00:00
Markus Fröschle	2453a4abfc	disable DSPICS3 (switch to GPIO) to avoid driving the PIN against FPGA blink attempts.	2014-11-24 16:06:38 +00:00
Markus Fröschle	ca3db41081	modified interrupt structure	2014-10-11 18:43:02 +00:00
Markus Fröschle	44a2234ed2	added interrupt controller initialization for PCI error interrupts	2014-10-09 18:59:35 +00:00
Markus Fröschle	1cbd86f7e9	fixed function prototype for pci_hook_interrupt()	2014-10-09 17:54:33 +00:00
Markus Fröschle	35b111ef91	added function prototype for irq5_handler()	2014-10-09 17:53:09 +00:00
Markus Fröschle	3caa3bca85	fixed parameters of irq5_handler()	2014-10-09 17:51:58 +00:00
Markus Fröschle	b20525ca24	fixed parameters of pci_hook_interrupt()	2014-10-09 17:50:14 +00:00
Markus Fröschle	ab7371532f	implemented hook_interrupt() in PCI code enabled PCI interrupts ohci seems to damage something in PCI config -> PCI device enumeration does not top with latest device networking in EmuTOS lost (probably a result of PCI interrupt implementation)	2014-10-05 17:50:15 +00:00
Markus Fröschle	2ee1ddf58d	working on USB device scan	2014-10-03 09:58:45 +00:00
Markus Fröschle	69941141f7	tried to fix PCI - sometimes all three USB controllers are detected, sometimes not, sometimes there is even a PCI bus hang	2014-10-03 07:29:42 +00:00
Markus Fröschle	4990704e99	called PCI errata for all pci_write_...() functions	2014-10-02 14:21:43 +00:00
Markus Fröschle	16b2e35a2b	implemented pci_hook_interrupt() formatted USB sources	2014-10-01 15:39:16 +00:00
Markus Fröschle	c3cccfbae1	fixed formatting	2014-10-01 06:43:17 +00:00
Markus Fröschle	b3d152b705	removed debug output	2014-09-30 19:32:26 +00:00
Markus Fröschle	b857519ea5	fixed wrong stack address offset for "magic number"	2014-09-30 19:29:46 +00:00
Markus Fröschle	66dff57624	fixed wrong EmuTOS detection	2014-09-30 17:10:58 +00:00
Markus Fröschle	ab31128d42	added mmu_report_pagesize()	2014-09-30 15:42:32 +00:00
Markus Fröschle	b94f129d70	implemented remove_handler()	2014-09-30 15:41:05 +00:00
Markus Fröschle	a28a443547	implemented check if running on EmuTOS	2014-09-29 22:43:49 +00:00
Markus Fröschle	2da664e571	implemented check if running on EmuTOS	2014-09-29 22:42:38 +00:00
Markus Fröschle	465cb67109	fixed driver_vec retrieval. Sholdn't crash anymore on FireTOS.	2014-09-29 22:26:25 +00:00
Markus Fröschle	76d2a1c9b7	fixed typo	2014-09-29 21:11:16 +00:00
Markus Fröschle	a0763b000a	added cleartext for the MMU interface	2014-09-29 20:52:02 +00:00
Markus Fröschle	317d2a3a65	Fixed ACRs for running BaS in flash (hang on MMU enable)	2014-09-29 19:08:38 +00:00
Markus Fröschle	8e2fe53fab	first (untested) version of the modified MMU handling and API	2014-09-29 12:32:19 +00:00
Markus Fröschle	37dfe6b7c5	added API driver interface for MMU	2014-09-29 06:10:19 +00:00
Markus Fröschle	c0d21a104f	consistantly use bas_types.h instead of standard headers	2014-09-25 06:24:55 +00:00
Markus Fröschle	4fc208c67d	updated comments	2014-09-25 05:54:26 +00:00
Markus Fröschle	8949a8456e	added function to flush only a portion of the caches	2014-09-24 16:02:20 +00:00
Markus Fröschle	37037b1e4c	now flashes BaS again	2014-09-21 13:30:55 +00:00
Markus Fröschle	e0f6d035a9	Screen address change now handled entirely in C (handler_gpt0/	2014-09-19 17:41:00 +00:00
Markus Fröschle	8bdb21c73f	updated comments	2014-09-19 06:02:16 +00:00
Markus Fröschle	b8df5c654f	replace "a7" with "sp" for consistancy	2014-09-19 04:59:21 +00:00
Markus Fröschle	77f641a959	fixed and completed comments	2014-09-18 20:13:54 +00:00
Markus Fröschle	02ab73f2cc	fixed a few MMU quirks	2014-09-17 05:28:16 +00:00
Markus Fröschle	01141f4251	check for supervisor protection fault and issue a bus error	2014-09-07 19:29:11 +00:00
Markus Fröschle	85798de684	rewritten mmu_map_page() and put into production	2014-09-07 19:01:19 +00:00
Markus Fröschle	fd8992cec5	removed warnings with some ugly casts...	2014-09-07 17:12:44 +00:00
Markus Fröschle	baa68901b8	moved more functionality from exceptions.S to interrupts.c. Added debug printouts to MMU page fault handler	2014-09-07 10:57:58 +00:00
Markus Fröschle	4c154978c9	modified to always update build date/time	2014-09-07 07:02:26 +00:00
Markus Fröschle	4b9a5bdbcd	minor changes	2014-09-07 06:55:37 +00:00
Markus Fröschle	9aac73896f	moved PSC3 interrupt handler to BaS dispatcher	2014-09-07 06:55:00 +00:00
Markus Fröschle	ebd8bd8e47	disabled USB init for now	2014-09-07 06:53:40 +00:00
Markus Fröschle	d147ef2625	moved IRQ service handler for PSC3 interrupt to the BaS ISR dispatcher	2014-09-07 06:53:01 +00:00
Markus Fröschle	1791a1bfaa	removed BaS network stuff and introduced a function to initialize BaS' ISR dispatcher	2014-09-07 06:50:23 +00:00
Markus Fröschle	0ced2c74f9	refactored	2014-09-06 21:29:55 +00:00
Markus Fröschle	d29c41022f	fixed a bug with LINK instruction not saving address register	2014-09-06 19:27:11 +00:00
Markus Fröschle	e6d81d461a	temporarily disabled interrupts to make debug printouts readable	2014-09-06 18:45:21 +00:00
Markus Fröschle	d4167ad98a	lowered DMA interrupt level	2014-09-06 18:43:03 +00:00
Markus Fröschle	5950f3651b	set interrupt and level to same values MiNT driver expects	2014-09-06 18:40:36 +00:00
Markus Fröschle	646768185b	disabled debug printouts	2014-09-06 18:39:42 +00:00
Markus Fröschle	5fae525781	disabled (unnecessary?) cache flush	2014-09-06 18:37:13 +00:00
Markus Fröschle	14186c8651	disabled USB initialization for now	2014-09-06 18:35:51 +00:00
Markus Fröschle	18fb66344d	reformatted	2014-09-06 18:35:06 +00:00
Markus Fröschle	ed13b05209	disabled USB debug printouts	2014-09-06 18:34:35 +00:00
Markus Fröschle	adc375f99a	disabled USB debug printouts	2014-09-06 18:33:46 +00:00
Markus Fröschle	81960712f7	disabled USB debug printouts	2014-09-06 18:33:00 +00:00
Markus Fröschle	e98a3aed3a	reformatted	2014-09-05 05:55:03 +00:00
Markus Fröschle	609d805c07	beautified formatting and fixed some (minor) typos	2014-09-03 06:16:55 +00:00
Markus Fröschle	c453b2e180	fixed a few typos	2014-09-02 19:58:19 +00:00
Markus Fröschle	7921199e9b	refactored, reformatted, added missing clobber registers to __asm__ statements	2014-09-02 13:51:00 +00:00
Markus Fröschle	56cbd17373	refactored USB driver code, enabled debug printouts everywhere	2014-09-01 19:22:26 +00:00
Markus Fröschle	3cac91e754	fixed some compiler warnings	2014-09-01 14:23:33 +00:00
Markus Fröschle	f2aae64892	more generalization of the dbg() diagnostic message prints	2014-09-01 07:20:22 +00:00
Markus Fröschle	df57613c13	added debug statements. Apparently, the code is trying to initialize the hub as mouse (which obviously can't work).	2014-09-01 06:41:07 +00:00
Markus Fröschle	1f02b270f7	(re)enabled debugging statements	2014-09-01 06:26:19 +00:00
Markus Fröschle	f170349879	(re)enabled USB bus scan. It takes an eternity to finish, but finally returns. Hub found, but no mouse yet.	2014-09-01 06:19:45 +00:00
Markus Fröschle	8c5ea67b00	added debugging statements for PCI enumeration	2014-09-01 05:37:43 +00:00
Markus Fröschle	1e74148353	fixed wrong intermediate Makefile which was forgotten to change after the rename	2014-08-31 12:35:54 +00:00
Markus Fröschle	986ed13f07	renamed tos/mcdcook to tos/bascook	2014-08-31 11:42:32 +00:00
Markus Fröschle	d422f8926e	renamed to bascook	2014-08-31 11:40:55 +00:00
Markus Fröschle	9da962b98a	renamed	2014-08-31 11:39:41 +00:00
Markus Fröschle	1590804dfa	removed unused files. Modifed MCDCOOK build process to use BaS_gcc includes (no need to sync includes anymore)	2014-08-31 11:36:59 +00:00
Markus Fröschle	47b25119ba	added missing files	2014-08-10 18:23:55 +00:00
Markus Fröschle	5c0ec291d8	fixed dbg() printout macro	2014-08-10 18:22:59 +00:00
Markus Fröschle	8a887fae45	added additional functions for cache handling	2014-08-10 18:21:49 +00:00
Markus Fröschle	4d79841c12	fixed warning regarding incompatible pointers	2014-08-10 18:20:15 +00:00
Markus Fröschle	699ae1917b	made stack location symbolic	2014-08-10 17:19:10 +00:00
Markus Fröschle	6befb6fc46	modified jtagwait to allow to set reset start address when renamed to .TTP	2014-08-10 14:39:06 +00:00
Markus Fröschle	2560f26f99	added missing check for _FPGA_JTAG_VALID	2014-08-09 13:56:28 +00:00
Markus Fröschle	2c870a639d	added missing files forgot on last commit	2014-08-09 13:10:13 +00:00
Markus Fröschle	d842254b36	support for JTAGWAIT.PRG (configure FPGA from JTAG port) implemented	2014-08-09 13:07:28 +00:00
Markus Fröschle	6dbe795815	simplified PLL initialization	2014-08-08 19:52:07 +00:00
Markus Fröschle	bd14381192	simplified pll initialization	2014-08-08 16:13:14 +00:00
Markus Fröschle	5163fd5813	file release to officially support m548x with EmuTOS	2014-08-06 06:25:41 +00:00
Markus Fröschle	1e471ec8cd	bumped version for release	2014-08-06 06:23:30 +00:00
Markus Fröschle	e3e202a7cc	added tos programs that are used to interface to BaS_gcc from TOS. These programs are currently not build by default (need to call make in their respective directory for now). They expect to find a libcmini copy on the same directory level than you have your BaS_gcc folder.	2014-08-02 08:25:07 +00:00
David Gálvez	8b8206cf97	Add format specifier to fix debug messages format	2014-07-13 15:18:23 +00:00
David Gálvez	77d134150a	Make PCI memory space uncachable	2014-07-10 16:46:21 +00:00
David Gálvez	8d62eb705f	Merge pci_BaS_gcc branch to trunk	2014-07-10 15:45:45 +00:00
Markus Fröschle	68aac6bf71	fixed formatting	2014-06-23 18:23:44 +00:00
Markus Fröschle	067b31c31d	fixed formatting	2014-06-23 05:46:13 +00:00
Markus Fröschle	53644425ea	fixed compiler warnings	2014-06-23 05:37:51 +00:00
Markus Fröschle	2ba3d52843	fixed a few compiler warnings	2014-06-23 05:32:49 +00:00
Markus Fröschle	7fd0c0c663	modified init_fpga() to honour JTAG configuration. Does not work currently and needs support from the TOS side (program not finished yet)	2014-06-22 16:00:49 +00:00
Markus Fröschle	ae44abc952	added Doxyfile for doxygen documentation	2014-06-21 19:53:54 +00:00
Markus Fröschle	1dc12f4b05	added BaS includes	2014-06-21 19:52:23 +00:00
Markus Fröschle	49e3eb31e4	added ST fonts	2014-06-21 19:48:22 +00:00
Markus Fröschle	6c006454be	version bump	2014-06-21 06:33:45 +00:00
Markus Fröschle	f61e97a7e0	some minor cosmetic fixes	2014-06-21 06:32:25 +00:00
Markus Fröschle	bc478f0e0a	reverted to last released to make it work again	2014-06-21 06:21:41 +00:00
Markus Fröschle	be773a7d0c	removed (now wrong) comment	2014-06-21 05:50:43 +00:00
Markus Fröschle	2bef4a39a5	completed locked TLB list	2014-06-20 20:24:37 +00:00
Markus Fröschle	291d3ad5bf	added locked TLB entries	2014-06-20 19:50:49 +00:00
Markus Fröschle	4a6987e3bb	started to revert to previous functionality	2014-06-20 18:35:08 +00:00
Markus Fröschle	69c982c795	moved FPGA config GPIO initialization into init_fpga.c to enable external JTAG FPGA configuration	2014-06-20 12:02:11 +00:00
David Gálvez	4d40bd775a	make PCI memory non-cacheable	2014-05-25 19:13:45 +00:00
David Gálvez	d98727a182	add missing parameter initialization	2014-05-25 17:00:19 +00:00
David Gálvez	73f75895bc	Add driver interface for PCI	2014-05-21 08:40:50 +00:00
David Gálvez	f0d0af7add	Create new branch for PCI development	2014-05-21 07:38:47 +00:00
Markus Fröschle	927833d601	eliminated wrong types warning when calling memcpy()	2014-05-12 07:40:55 +00:00
Markus Fröschle	65a7986e34	reformatted	2014-05-11 20:38:33 +00:00
Markus Fröschle	ccec42e55c	modified dbg() in several files	2014-05-11 20:31:57 +00:00
Markus Fröschle	dc646c75ad	reformatted assembler code	2014-05-11 14:08:27 +00:00
Markus Fröschle	b0fb7b8df3	fixed wrong MMU mapping of emulated Falcon video memory (phys and virt where the wrong way round)	2014-05-11 06:57:09 +00:00
Markus Fröschle	fb9c4aaa1d	modified project to support Qt Creator inferior debugging through BDM.	2014-05-11 06:40:48 +00:00
Markus Fröschle	2f311aedbf	modified dbg() macro corrected irq6 handler reimplemented MFP interrupt LED blinker in C	2014-05-10 13:21:11 +00:00
Markus Fröschle	5a836c6ca7	reformatted assembly	2014-04-22 10:47:36 +00:00
Markus Fröschle	e94becff75	added to QtCreator	2014-04-22 10:44:56 +00:00
Markus Fröschle	dee448549c	translated copy loop to C	2014-02-04 20:06:29 +00:00
Markus Fröschle	fcd3b885ce	started "translating" MMU update code for video pages	2014-02-04 07:17:51 +00:00
Markus Fröschle	91ae86a487	completed page loop	2014-02-03 21:42:25 +00:00
Markus Fröschle	25f66ae7f9	more conversion to C	2014-02-02 22:27:10 +00:00
Markus Fröschle	fe5b7d466d	translated more of the assembler code into C	2014-02-02 21:35:46 +00:00
Markus Fröschle	ff3514c2d0	added missing include file to SVN	2014-02-02 10:16:16 +00:00
Markus Fröschle	90371bb3c9	optimized for size - reduces codesize by half	2014-02-01 23:54:32 +00:00
Markus Fröschle	5a557524b0	moved PSC3 interrupt handler to C code	2014-02-01 23:37:30 +00:00
Markus Fröschle	1fb6c756ae	modified to throw errors if an unknown machine type is detected	2014-01-28 15:49:05 +00:00
Markus Fröschle	8a1da417e7	modified ACR settings	2014-01-28 14:11:08 +00:00
Markus Fröschle	703352fc9d	added m54455 (Freescale EVB) platform	2014-01-21 14:52:46 +00:00
Markus Fröschle	6a6e7cf84e	fixed: compare virtual address instead of physical in lookup_mapping()	2014-01-21 12:43:32 +00:00
Markus Fröschle	430f03a8ed	fixed bug in determining if access error hit in TLB (checked bit 0 instead of 1).	2014-01-20 14:23:55 +00:00
Markus Fröschle	d3fb521ad1	modified MMU mapping table to use symbolic constants from include file	2014-01-19 19:26:52 +00:00
Markus Fröschle	bf8cea26ab	simplified MMU code. Still hangs somewhere in EmuTOS	2014-01-19 18:27:05 +00:00
Markus Fröschle	0f5942436a	removed locked MMU pages	2014-01-18 20:59:42 +00:00
Markus Fröschle	8544307830	removed inlining in wait.c, added (simple) map-based MMU handling	2014-01-18 14:03:25 +00:00
Markus Fröschle	386a921f84	modified to map memory dynamically based on a static memory map	2014-01-18 08:04:44 +00:00
Markus Fröschle	58418f2436	moved ACR register handling macros to include file	2014-01-17 06:45:33 +00:00
Markus Fröschle	8025af85dd	modified access_error to do all MMU mappings dynamically	2014-01-16 20:42:04 +00:00
Markus Fröschle	1c316ec11b	extended mmu_map_page() by size and flags args	2014-01-16 16:29:29 +00:00
Markus Fröschle	3779d1cb2e	modified ACRs to cover complete SDRAM	2014-01-16 16:18:43 +00:00
Markus Fröschle	c9c76a4757	test using ACR0 & ACR2 to provide supervisor stack access	2014-01-15 16:03:54 +00:00
Markus Fröschle	afa9490c1e	fixed typo in strcmp()	2014-01-15 07:17:21 +00:00
Markus Fröschle	26cadc699a	fixed formatting	2014-01-14 21:39:05 +00:00
Markus Fröschle	9da82d046b	modified comments	2014-01-14 21:15:56 +00:00
Markus Fröschle	4112590363	moved page alignment responsibility to caller	2014-01-14 20:28:13 +00:00
Markus Fröschle	fdf945c702	fixed missing parameter in debug print	2014-01-14 18:18:20 +00:00
Markus Fröschle	9b89377caf	removed type field from isr_register_handler() and friends	2014-01-14 07:48:38 +00:00
Markus Fröschle	3966bfd6ec	fixed comments	2014-01-13 22:05:20 +00:00
Markus Fröschle	bdf5cd6c0d	added vim modeline to asm sources. Needs "set modeline:set modeline=5" in .vimrc	2014-01-13 21:34:24 +00:00
Markus Fröschle	ba1a951952	cleaned up debug printouts	2014-01-13 21:30:39 +00:00
Markus Fröschle	fcb5204fc8	renamed mmutr_miss() to mmu_map_page() (that's what its doing)	2014-01-13 21:26:42 +00:00
Markus Fröschle	63b19853a9	corrected FASTRAM_END comparision	2014-01-13 21:20:24 +00:00
Markus Fröschle	be94d72097	refactored assembler routines from exceptions.S into mmu.c (access exception handler). Seems to be better, but still hang.	2014-01-13 19:39:42 +00:00
Markus Fröschle	9b099d935c	implemented safe stack for access exception handler	2014-01-13 15:13:29 +00:00
Markus Fröschle	a97469a53d	switch to a safe stack in access_exception. Assembles, but not tested yet.	2014-01-13 07:19:09 +00:00
Markus Fröschle	3a1c07a2e8	added better matching descriptive text to debug messages	2014-01-08 13:57:35 +00:00
Markus Fröschle	4f29f6af80	FEC interrupts to level 1	2014-01-08 09:59:44 +00:00
Markus Fröschle	8d53a1feb9	fixed - carelessly choosen - interrupt level for FEC interrupts	2014-01-08 09:01:43 +00:00
Markus Fröschle	99e5352807	changed MAC address to original address dbug assigns	2014-01-07 10:50:22 +00:00
Markus Fröschle	785ca43b11	cleaned up	2014-01-07 05:57:17 +00:00
Markus Fröschle	a23abf0b5d	corresponds to the equivalent file release. Contains networking code for EmuTOS, PCI bus scan and card configuration. X86emu included but deactivated.	2014-01-06 19:50:52 +00:00