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289 Commits
R_0_8_6
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R_0_9_3@16
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7
.gdbinit
7
.gdbinit
@@ -1,13 +1,14 @@
|
||||
#set disassemble-next-line on
|
||||
define tr
|
||||
!killall m68k-bdm-gdbserver
|
||||
#!killall m68k-bdm-gdbserver
|
||||
target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
|
||||
#target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
|
||||
#target remote localhost:1234
|
||||
#target remote | m68k-bdm-gdbserver pipe /dev/tblcf2
|
||||
#target dbug /dev/ttyS0
|
||||
#monitor bdm-reset
|
||||
end
|
||||
define tbtr
|
||||
target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
|
||||
target remote | m68k-bdm-gdbserver pipe /dev/tblcf2
|
||||
end
|
||||
source mcf5474.gdb
|
||||
set breakpoint auto-hw
|
||||
|
||||
@@ -1 +1,3 @@
|
||||
// ADD PREDEFINED MACROS HERE!
|
||||
//#define MACHINE_FIREBEE
|
||||
#define MACHINE_M5484LITE
|
||||
|
||||
1128
BaS_gcc.files
1128
BaS_gcc.files
File diff suppressed because it is too large
Load Diff
@@ -1,2 +1,55 @@
|
||||
include
|
||||
/usr/m68k-elf/include
|
||||
include
|
||||
tos/jtagwait/include
|
||||
tos/pci_test/include
|
||||
/usr/m68k-atari-mint/include
|
||||
/opt/cross-mint/m68k-atari-mint/include
|
||||
/opt/gygwin/opt/cross-mint/m68k-atari-mint/include
|
||||
/opt/m68k-elf/include
|
||||
/opt/cygwin/opt/m68k-elf/include
|
||||
/opt/cygwin/opt/m68k-elf/lib/gcc/m68k-elf/4.6.4/include
|
||||
dma
|
||||
m54455
|
||||
sys
|
||||
pci
|
||||
tos/pci_test
|
||||
tos/jtagwait/m5475/mshort
|
||||
m5484lite
|
||||
tos/pci_test/include
|
||||
tos/bascook
|
||||
tos/vmem_test/m5475/mshort
|
||||
i2c
|
||||
fs
|
||||
tos/vmem_test/m5475
|
||||
tos/pci_test/m5475
|
||||
spi
|
||||
if
|
||||
tos/jtagwait/m5475
|
||||
util
|
||||
kbd
|
||||
flash_scripts
|
||||
video
|
||||
usb
|
||||
exe
|
||||
tos/vmem_test/sources
|
||||
tos
|
||||
nutil
|
||||
tos/jtagwait/sources
|
||||
x86emu
|
||||
flash
|
||||
tos/vmem_test/include
|
||||
tos/bascook/sources
|
||||
tos/pci_test/m5475/mshort
|
||||
.
|
||||
radeon
|
||||
net
|
||||
xhdi
|
||||
tos/vmem_test
|
||||
tos/pci_test/sources
|
||||
firebee
|
||||
tos/jtagwait
|
||||
tos/fpga_test/include
|
||||
tos/fpga_test
|
||||
tos/fpga_test/sources
|
||||
tos/pci_mem
|
||||
tos/pci_mem/include
|
||||
tos/pci_mem/sources
|
||||
|
||||
176
Makefile
176
Makefile
@@ -1,12 +1,21 @@
|
||||
# # Makefile for Firebee BaS
|
||||
# Makefile for Firebee BaS
|
||||
#
|
||||
# This Makefile is meant for cross compiling the BaS with Vincent Riviere's cross compilers.
|
||||
# If you want to compile native on an Atari (you will need at least GCC 4.6.3), set
|
||||
# TCPREFIX to be empty.
|
||||
#
|
||||
# If you want to compile with the m68k-elf- toolchain, set TCPREFIX accordingly. Requires an extra
|
||||
# installation, but allows source level debugging over BDM with a recent gdb (tested with 7.5),
|
||||
# the m68k BDM tools from sourceforge (http://bdm.sourceforge.net) and a BDM pod (TBLCF and P&E tested).
|
||||
|
||||
VERBOSE=N
|
||||
|
||||
ifneq (Y,$(VERBOSE))
|
||||
Q=@
|
||||
else
|
||||
Q=
|
||||
endif
|
||||
|
||||
# can be either "Y" or "N" (without quotes). "Y" for using the m68k-elf-, "N" for using the m68k-atari-mint
|
||||
# toolchain
|
||||
COMPILE_ELF=Y
|
||||
@@ -29,35 +38,43 @@ AR=$(TCPREFIX)ar
|
||||
RANLIB=$(TCPREFIX)ranlib
|
||||
NATIVECC=gcc
|
||||
|
||||
ifeq (Y,$(COMPILE_ELF))
|
||||
LDLIBS=-lgcc
|
||||
else
|
||||
LDLIBS=-lgcc
|
||||
endif
|
||||
|
||||
INCLUDE=-Iinclude
|
||||
CFLAGS=-mcpu=5474 \
|
||||
-Wall \
|
||||
-g3 \
|
||||
-fomit-frame-pointer \
|
||||
-ffreestanding \
|
||||
-fleading-underscore \
|
||||
-Wa,--register-prefix-optional
|
||||
CFLAGS= -Wall \
|
||||
-O2 \
|
||||
-fomit-frame-pointer \
|
||||
-ffreestanding \
|
||||
-fno-strict-aliasing \
|
||||
-fleading-underscore \
|
||||
-Winline \
|
||||
-Wa,--register-prefix-optional
|
||||
|
||||
CFLAGS_OPTIMIZED = -mcpu=5474 \
|
||||
-Wall \
|
||||
-g3 \
|
||||
-O2 \
|
||||
-fomit-frame-pointer \
|
||||
-ffreestanding \
|
||||
-fleading-underscore \
|
||||
-Wa,--register-prefix-optional
|
||||
LDFLAGS=
|
||||
|
||||
TRGTDIRS= ./firebee ./m5484lite ./m54455
|
||||
TRGTDIRS= ./firebee ./m54455 ./m5484lite
|
||||
OBJDIRS=$(patsubst %, %/objs,$(TRGTDIRS))
|
||||
TOOLDIR=util
|
||||
|
||||
VPATH=dma exe flash fs if kbd pci spi sys usb net util video radeon x86emu xhdi
|
||||
VPATH=dma exe flash fs i2c if kbd pci spi sys usb net util video radeon x86emu xhdi
|
||||
|
||||
# Linker control file. The final $(LDCFILE) is intermediate only (preprocessed version of $(LDCSRC)
|
||||
LDCFILE=bas.lk
|
||||
LDRFILE=ram.lk
|
||||
LDCSRC=bas.lk.in
|
||||
LDCBSRC=basflash.lk.in
|
||||
LDCBFS=bashflash.lk
|
||||
LDCBFS=basflash.lk
|
||||
|
||||
# this Makefile can create the BaS to flash or an arbitrary ram address (for BDM debugging). See
|
||||
# below for the definition of TARGET_ADDRESS
|
||||
@@ -70,8 +87,11 @@ CSRCS= \
|
||||
init_fpga.c \
|
||||
fault_vectors.c \
|
||||
interrupts.c \
|
||||
\
|
||||
bas_printf.c \
|
||||
bas_string.c \
|
||||
conout.c \
|
||||
\
|
||||
BaS.c \
|
||||
cache.c \
|
||||
mmu.c \
|
||||
@@ -83,19 +103,25 @@ CSRCS= \
|
||||
s19reader.c \
|
||||
flash.c \
|
||||
dma.c \
|
||||
i2c.c \
|
||||
xhdi_sd.c \
|
||||
xhdi_interface.c \
|
||||
pci.c \
|
||||
pci_errata.c \
|
||||
dspi.c \
|
||||
driver_vec.c \
|
||||
driver_mem.c \
|
||||
\
|
||||
MCD_dmaApi.c \
|
||||
MCD_tasks.c \
|
||||
MCD_tasksInit.c \
|
||||
\
|
||||
usb.c \
|
||||
ohci-hcd.c \
|
||||
ehci-hcd.c \
|
||||
usb_hub.c \
|
||||
usb_mouse.c \
|
||||
usb_kbd.c \
|
||||
ikbd.c \
|
||||
\
|
||||
nbuf.c \
|
||||
@@ -120,21 +146,19 @@ CSRCS= \
|
||||
videl.c \
|
||||
video.c \
|
||||
\
|
||||
i2c-algo-bit.c \
|
||||
\
|
||||
radeon_base.c \
|
||||
radeon_accel.c \
|
||||
radeon_cursor.c \
|
||||
radeon_monitor.c \
|
||||
radeon_i2c.c \
|
||||
fnt_st_8x16.c \
|
||||
\
|
||||
x86decode.c \
|
||||
x86sys.c \
|
||||
x86debug.c \
|
||||
x86prim_ops.c \
|
||||
x86ops.c \
|
||||
x86ops2.c \
|
||||
x86fpu.c \
|
||||
x86biosemu.c \
|
||||
x86emu.c \
|
||||
x86pcibios.c \
|
||||
x86biosemu.c \
|
||||
x86emu_util.c \
|
||||
\
|
||||
basflash.c \
|
||||
basflash_start.c
|
||||
@@ -142,11 +166,15 @@ CSRCS= \
|
||||
|
||||
ASRCS= \
|
||||
startcf.S \
|
||||
printf_helper.S \
|
||||
exceptions.S \
|
||||
setjmp.S \
|
||||
xhdi_vec.S \
|
||||
pci_wrappers.S
|
||||
|
||||
ifeq (Y,$(COMPILE_ELF)) # needed for __ vs ___ kludge
|
||||
ASRCS += libgcc_helper.S
|
||||
endif
|
||||
|
||||
SRCS=$(ASRCS) $(CSRCS)
|
||||
COBJS=$(patsubst %.c,%.o,$(CSRCS))
|
||||
AOBJS=$(patsubst %.S,%.o,$(ASRCS))
|
||||
@@ -156,58 +184,66 @@ LIBBAS=libbas.a
|
||||
|
||||
LIBS=$(patsubst %,%/$(LIBBAS),$(TRGTDIRS))
|
||||
|
||||
all: fls ram bfl lib
|
||||
all: ver fls ram bfl lib tos
|
||||
fls: $(patsubst %,%/$(FLASH_EXEC),$(TRGTDIRS))
|
||||
ram: $(patsubst %,%/$(RAM_EXEC),$(TRGTDIRS))
|
||||
bfl: $(patsubst %,%/$(BASFLASH_EXEC),$(TRGTDIRS))
|
||||
lib: $(LIBS)
|
||||
|
||||
.PHONY: ver
|
||||
ver:
|
||||
touch include/version.h
|
||||
|
||||
.PHONY: tos
|
||||
tos:
|
||||
$(Q)(cd tos; $(MAKE) -s)
|
||||
|
||||
.PHONY: clean
|
||||
clean:
|
||||
for d in $(TRGTDIRS);\
|
||||
$(Q)for d in $(TRGTDIRS);\
|
||||
do rm -f $$d/*.map $$d/*.s19 $$d/*.elf $$d/*.lk $$d/*.a $$d/objs/* $$d/depend;\
|
||||
done
|
||||
rm -f tags
|
||||
$(Q)rm -f tags
|
||||
$(Q)(cd tos; make -s clean)
|
||||
|
||||
|
||||
|
||||
# flags for targets
|
||||
m5484lite/bas.$(EXE): MACHINE=MACHINE_M5484LITE
|
||||
m54455/bas.$(EXE): MACHINE=MACHINE_M54455
|
||||
firebee/bas.$(EXE): MACHINE=MACHINE_FIREBEE
|
||||
|
||||
m5484lite/ram.$(EXE): MACHINE=MACHINE_M5484LITE
|
||||
m54455/ram.$(EXE): MACHINE=MACHINE_M54455
|
||||
firebee/ram.$(EXE): MACHINE=MACHINE_FIREBEE
|
||||
|
||||
m5484lite/basflash.$(EXE): MACHINE=MACHINE_M5484LITE
|
||||
m54455/basflash.$(EXE): MACHINE=MACHINE_M54455
|
||||
firebee/basflash.$(EXE): MACHINE=MACHINE_FIREBEE
|
||||
|
||||
m5484lite/bas.$(EXE): CFLAGS += -mcpu=5484
|
||||
m54455/bas.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
|
||||
firebee/bas.$(EXE): CFLAGS += -mcpu=5474
|
||||
|
||||
m5484lite/ram.$(EXE): CFLAGS += -mcpu=5484
|
||||
m54455/ram.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
|
||||
firebee/ram.$(EXE): CFLAGS += -mcpu=5474
|
||||
|
||||
m5484lite/basflash.$(EXE): CFLAGS += -mcpu=5484
|
||||
m54455/basflash.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
|
||||
firebee/basflash.$(EXE): CFLAGS += -mcpu=5474
|
||||
|
||||
#
|
||||
# generate pattern rules for different object files
|
||||
#
|
||||
define CC_TEMPLATE
|
||||
#ifeq (firebee,$(1))
|
||||
#MACHINE=MACHINE_FIREBEE
|
||||
#else
|
||||
#MACHINE=MACHINE_M5484LITE
|
||||
#endif
|
||||
|
||||
# always optimize x86 emulator objects
|
||||
#$(1)/objs/x86decode.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86sys.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86debug.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86prim_ops.o:CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86ops.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86ops2.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86fpu.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86biosemu.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
#$(1)/objs/x86pcibios.o: CFLAGS=$(CFLAGS_OPTIMIZED)
|
||||
|
||||
$(1)/objs/%.o:%.c
|
||||
$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
|
||||
$(Q)echo CC $$<
|
||||
$(Q)$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
|
||||
|
||||
$(1)/objs/%.o:%.S
|
||||
$(CC) $$(CFLAGS) -Wa,--bitwise-or -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
|
||||
$(Q)echo CC $$<
|
||||
$(Q)$(CC) $$(CFLAGS) -Wa,--bitwise-or -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
|
||||
endef
|
||||
$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR))))
|
||||
|
||||
@@ -223,7 +259,8 @@ else
|
||||
MACHINE=MACHINE_M5484LITE
|
||||
endif
|
||||
$(1)/depend:$(SRCS)
|
||||
$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -M $$^ | sed -e "s#^\(.*\).o:#"$(1)"/objs/\1.o:#" > $$@
|
||||
$(Q)echo DEPEND
|
||||
$(Q)$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -M $$^ | sed -e "s#^\(.*\).o:#"$(1)"/objs/\1.o:#" > $$@
|
||||
endef
|
||||
$(foreach DIR,$(TRGTDIRS),$(eval $(call DEP_TEMPLATE,$(DIR))))
|
||||
|
||||
@@ -234,8 +271,9 @@ $(foreach DIR,$(TRGTDIRS),$(eval $(call DEP_TEMPLATE,$(DIR))))
|
||||
define AR_TEMPLATE
|
||||
$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS))
|
||||
$(1)/$(LIBBAS): $$($(1)_OBJS)
|
||||
$(AR) rv $$@ $$?
|
||||
$(RANLIB) $$@
|
||||
$(Q)echo AR $$@
|
||||
$(Q)$(AR) r $$@ $$?
|
||||
$(Q)$(RANLIB) $$@
|
||||
endef
|
||||
$(foreach DIR,$(TRGTDIRS),$(eval $(call AR_TEMPLATE,$(DIR))))
|
||||
|
||||
@@ -244,41 +282,59 @@ ifeq ($(COMPILE_ELF),Y)
|
||||
else
|
||||
FORMAT_ELF=0
|
||||
endif
|
||||
|
||||
define LK_TEMPLATE
|
||||
$(1)/$$(LDCFILE): $(LDCSRC)
|
||||
$(Q)echo CPP $$<
|
||||
$(Q)$(CPP) $(INCLUDE) -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $$< -o $$@
|
||||
endef
|
||||
$(foreach DIR,$(TRGTDIRS),$(eval $(call LK_TEMPLATE,$(DIR))))
|
||||
|
||||
#
|
||||
# define pattern rules for binaries
|
||||
#
|
||||
define EX_TEMPLATE
|
||||
# pattern rule for flash
|
||||
$(1)_MAPFILE=$(1)/$$(basename $$(FLASH_EXEC)).map
|
||||
$(1)/$$(FLASH_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
|
||||
$(CPP) $(INCLUDE) -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDCFILE)
|
||||
$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE) --cref -T $(1)/$$(LDCFILE) -o $$@
|
||||
$(1)/$$(FLASH_EXEC): $(1)/$(LIBBAS) $(1)/$$(LDCFILE)
|
||||
$(Q)echo CC $$@
|
||||
$(Q)$(CC) $$(CFLAGS) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDCFILE) $(LDLIBS) -o $$@
|
||||
ifeq ($(COMPILE_ELF),Y)
|
||||
$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
$(Q)echo OBJCOPY $$@
|
||||
$(Q)$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
else
|
||||
objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
$(Q)echo OBJCOPY $$@
|
||||
$(Q)objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
endif
|
||||
|
||||
# pattern rule for RAM
|
||||
$(1)_MAPFILE_RAM=$(1)/$$(basename $$(RAM_EXEC)).map
|
||||
$(1)/$$(RAM_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
|
||||
$(CPP) $(INCLUDE) -DCOMPILE_RAM -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDRFILE)
|
||||
$(LD) -g --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) -o $$@
|
||||
$(1)/$$(RAM_EXEC): $(1)/$(LIBBAS) $(1)/$$(LDCFILE)
|
||||
$(Q)echo CPP $$@
|
||||
$(Q)$(CPP) $(INCLUDE) -DCOMPILE_RAM -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDRFILE)
|
||||
$(Q)echo CC $$@
|
||||
$(Q)$(CC) $$(CFLAGS) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE_RAM) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDRFILE) $(LDLIBS) -o $$@
|
||||
ifeq ($(COMPILE_ELF),Y)
|
||||
$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
$(Q)echo OBJCOPY $$@
|
||||
$(Q)$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
else
|
||||
objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
$(Q)echo OBJCOPY $$<
|
||||
$(Q)objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
endif
|
||||
|
||||
# pattern rule for basflash
|
||||
$(1)_MAPFILE_BFL=$(1)/$$(basename $$(BASFLASH_EXEC)).map
|
||||
$(1)/$$(BASFLASH_EXEC): $(1)/objs/basflash.o $(1)/objs/basflash_start.o $(1)/$(LIBBAS) $(LDCBFL)
|
||||
$(Q)echo CPP $$<
|
||||
$(CPP) $(INCLUDE) -P -DOBJDIR=$(1)/objs -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCBSRC) -o $(1)/$$(LDCBFS)
|
||||
$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_BFL) --cref -T $(1)/$$(LDCFILE) -L$(1) -lbas -o $$@
|
||||
$(Q)echo CC $$<
|
||||
$(Q)$(CC) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE_BFL) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDCBFS) -L$(1) -lbas $(LDLIBS) -o $$@
|
||||
ifeq ($(COMPILE_ELF),Y)
|
||||
$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
$(Q)echo OBJCOPY $$<
|
||||
$(Q)$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
|
||||
else
|
||||
objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
$(Q)echo OBJCOPY $$<
|
||||
$(Q)objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf
|
||||
endif
|
||||
endef
|
||||
$(foreach DIR,$(TRGTDIRS),$(eval $(call EX_TEMPLATE,$(DIR))))
|
||||
@@ -293,7 +349,7 @@ tags:
|
||||
|
||||
.PHONY: printvars
|
||||
printvars:
|
||||
@$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
|
||||
$(Q)$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
|
||||
ifeq (MACHINE_M5484LITE,$$(MACHINE))
|
||||
MNAME=m5484lite
|
||||
else ifeq (MACHINE_FIREBEE,$(MACHINE))
|
||||
|
||||
126
bas.lk.in
126
bas.lk.in
@@ -1,7 +1,7 @@
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
# include "m5484l.h"
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
@@ -10,21 +10,21 @@
|
||||
|
||||
/* make bas_rom access flags rx if compiling to RAM */
|
||||
#ifdef COMPILE_RAM
|
||||
#define ROMFLAGS WX
|
||||
#define ROMFLAGS WX
|
||||
#else
|
||||
#define ROMFLAGS RX
|
||||
#define ROMFLAGS RX
|
||||
#endif /* COMPILE_RAM */
|
||||
|
||||
MEMORY
|
||||
{
|
||||
bas_rom (ROMFLAGS) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000
|
||||
/*
|
||||
* target to copy BaS data segment to. 1M should be enough for now
|
||||
*/
|
||||
* target to copy BaS data segment to. 1M should be enough for now
|
||||
*/
|
||||
bas_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00200000, LENGTH = 0x00100000
|
||||
/*
|
||||
* driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
|
||||
*/
|
||||
* driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
|
||||
*/
|
||||
driver_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00100000, LENGTH = 0x00100000
|
||||
}
|
||||
|
||||
@@ -42,16 +42,21 @@ SECTIONS
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
OBJDIR/wait.o(.text)
|
||||
OBJDIR/exceptions.o(.text)
|
||||
OBJDIR/setjmp.o(.text)
|
||||
OBJDIR/driver_vec.o(.text)
|
||||
OBJDIR/interrupts.o(.text)
|
||||
OBJDIR/mmu.o(.text)
|
||||
|
||||
OBJDIR/BaS.o(.text)
|
||||
OBJDIR/pci.o(.text)
|
||||
. = ALIGN(16);
|
||||
OBJDIR/pci_errata.o(.text)
|
||||
OBJDIR/pci_wrappers.o(.text)
|
||||
OBJDIR/usb.o(.text)
|
||||
OBJDIR/driver_mem.o(.text)
|
||||
OBJDIR/usb_hub.o(.text)
|
||||
OBJDIR/usb_mouse.o(.text)
|
||||
OBJDIR/usb_kbd.o(.text)
|
||||
OBJDIR/ohci-hcd.o(.text)
|
||||
OBJDIR/ehci-hcd.o(.text)
|
||||
OBJDIR/wait.o(.text)
|
||||
@@ -77,7 +82,10 @@ SECTIONS
|
||||
OBJDIR/s19reader.o(.text)
|
||||
OBJDIR/bas_printf.o(.text)
|
||||
OBJDIR/bas_string.o(.text)
|
||||
OBJDIR/printf_helper.o(.text)
|
||||
OBJDIR/conout.o(.text)
|
||||
#if (FORMAT_ELF == 1)
|
||||
OBJDIR/libgcc_helper.o(.text)
|
||||
#endif
|
||||
OBJDIR/cache.o(.text)
|
||||
OBJDIR/dma.o(.text)
|
||||
OBJDIR/MCD_dmaApi.o(.text)
|
||||
@@ -89,22 +97,21 @@ SECTIONS
|
||||
OBJDIR/fbmem.o(.text)
|
||||
OBJDIR/fbmon.o(.text)
|
||||
OBJDIR/fbmodedb.o(.text)
|
||||
OBJDIR/fnt_st_8x16.o(.text)
|
||||
OBJDIR/offscreen.o(.text)
|
||||
|
||||
OBJDIR/x86decode.o(.text)
|
||||
OBJDIR/x86ops.o(.text)
|
||||
OBJDIR/x86ops2.o(.text)
|
||||
OBJDIR/x86fpu.o(.text)
|
||||
OBJDIR/x86sys.o(.text)
|
||||
OBJDIR/x86biosemu.o(.text)
|
||||
OBJDIR/x86debug.o(.text)
|
||||
OBJDIR/x86prim_ops.o(.text)
|
||||
OBJDIR/x86emu.o(.text)
|
||||
OBJDIR/x86emu_util.o(.text)
|
||||
OBJDIR/x86pcibios.o(.text)
|
||||
OBJDIR/x86biosemu.o(.text)
|
||||
|
||||
OBJDIR/i2c-algo-bit.o(.text)
|
||||
|
||||
OBJDIR/radeon_base.o(.text)
|
||||
OBJDIR/radeon_accel.o(.text)
|
||||
OBJDIR/radeon_cursor.o(.text)
|
||||
OBJDIR/radeon_monitor.o(.text)
|
||||
OBJDIR/radeon_i2c.o(.text)
|
||||
|
||||
OBJDIR/xhdi_sd.o(.text)
|
||||
OBJDIR/xhdi_interface.o(.text)
|
||||
@@ -124,11 +131,13 @@ SECTIONS
|
||||
#endif /* COMPILE_RAM */
|
||||
|
||||
#if (FORMAT_ELF == 1)
|
||||
*(.eh_frame)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
#endif
|
||||
} > bas_rom
|
||||
|
||||
|
||||
#if (TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS)
|
||||
/*
|
||||
* put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
|
||||
@@ -136,7 +145,7 @@ SECTIONS
|
||||
.bas :
|
||||
AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
|
||||
{
|
||||
. = ALIGN(4); /* same alignment than AT() statement! */
|
||||
. = ALIGN(4); /* same alignment than AT() statement! */
|
||||
__BAS_DATA_START = .;
|
||||
*(.data)
|
||||
__BAS_DATA_END = .;
|
||||
@@ -162,7 +171,7 @@ SECTIONS
|
||||
/* SDRAM Initialization */
|
||||
___SDRAM = SDRAM_START;
|
||||
___SDRAM_SIZE = SDRAM_SIZE;
|
||||
_SDRAM_VECTOR_TABLE = ___SDRAM;
|
||||
_SDRAM_VECTOR_TABLE = ___SDRAM;
|
||||
|
||||
/* ST-RAM */
|
||||
__STRAM = ___SDRAM;
|
||||
@@ -173,14 +182,14 @@ SECTIONS
|
||||
|
||||
/* FastRAM */
|
||||
__FASTRAM = 0x10000000;
|
||||
__TARGET_ADDRESS = TARGET_ADDRESS;
|
||||
__TARGET_ADDRESS = TARGET_ADDRESS;
|
||||
|
||||
#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
|
||||
__FASTRAM_END = __BAS_IN_RAM;
|
||||
#else
|
||||
__FASTRAM_END = TARGET_ADDRESS;
|
||||
__FASTRAM_END = TARGET_ADDRESS;
|
||||
#endif
|
||||
__FASTRAM_SIZE = __FASTRAM_END - __FASTRAM;
|
||||
__FASTRAM_SIZE = __FASTRAM_END - __FASTRAM;
|
||||
|
||||
/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
|
||||
___BOOT_FLASH = BOOTFLASH_BASE_ADDRESS;
|
||||
@@ -193,9 +202,9 @@ SECTIONS
|
||||
__BAS_SIZE = SIZEOF(.bas);
|
||||
#else
|
||||
/* BaS is already in RAM - no need to copy anything */
|
||||
__BAS_IN_RAM = __FASTRAM_END;
|
||||
__BAS_SIZE = 0;
|
||||
__BAS_LMA = __BAS_IN_RAM;
|
||||
__BAS_IN_RAM = __FASTRAM_END;
|
||||
__BAS_SIZE = 0;
|
||||
__BAS_LMA = __BAS_IN_RAM;
|
||||
#endif
|
||||
|
||||
/* Other flash components */
|
||||
@@ -204,8 +213,8 @@ SECTIONS
|
||||
__EMUTOS_SIZE = 0x00100000;
|
||||
|
||||
/* where FPGA data lives in flash */
|
||||
__FPGA_CONFIG = 0xe0700000;
|
||||
__FPGA_CONFIG_SIZE = 0x100000;
|
||||
__FPGA_CONFIG = 0xe0700000;
|
||||
__FPGA_CONFIG_SIZE = 0x100000;
|
||||
|
||||
/* VIDEO RAM BASIS */
|
||||
__VRAM = 0x60000000;
|
||||
@@ -220,6 +229,7 @@ SECTIONS
|
||||
/* MMU memory mapped registers */
|
||||
__MMUBAR = 0xFF040000;
|
||||
|
||||
#if !defined(MACHINE_M54455) /* MCF54455 does not have RAMBAR0 and RAMBAR1 registers */
|
||||
/*
|
||||
* 4KB on-chip Core SRAM0: -> exception table
|
||||
*/
|
||||
@@ -230,33 +240,43 @@ SECTIONS
|
||||
__RAMBAR1 = 0xFF101000;
|
||||
__RAMBAR1_SIZE = 0x00001000;
|
||||
__SUP_SP = __RAMBAR1 + __RAMBAR1_SIZE - 4;
|
||||
#else
|
||||
__RAMBAR0 = 0x80000000; /* RAMBAR must be between 0x80000000 on MCF54455 */
|
||||
__RAMBAR0_SIZE = 0x1000;
|
||||
__SUP_SP = __RAMBAR0 + __RAMBAR0_SIZE + 0x1000 - 4;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* this flag (if 1) indicates that FPGA configuration has been loaded through JTAG
|
||||
* and shouldn't be overwritten on boot
|
||||
*/
|
||||
__FPGA_JTAG_LOADED = __RAMBAR1;
|
||||
__FPGA_JTAG_VALID = __FPGA_JTAG_LOADED + 4;
|
||||
|
||||
/* system variables */
|
||||
|
||||
/* RAMBAR0 0 to 0x7FF -> exception vectors */
|
||||
_rt_mod = __RAMBAR0 + 0x800;
|
||||
_rt_ssp = __RAMBAR0 + 0x804;
|
||||
_rt_usp = __RAMBAR0 + 0x808;
|
||||
_rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */
|
||||
_rt_cacr = __RAMBAR0 + 0x810; /* 002 */
|
||||
_rt_asid = __RAMBAR0 + 0x814; /* 003 */
|
||||
_rt_acr0 = __RAMBAR0 + 0x818; /* 004 */
|
||||
_rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */
|
||||
_rt_acr2 = __RAMBAR0 + 0x820; /* 006 */
|
||||
_rt_acr3 = __RAMBAR0 + 0x824; /* 007 */
|
||||
_rt_mmubar = __RAMBAR0 + 0x828; /* 008 */
|
||||
_rt_sr = __RAMBAR0 + 0x82c;
|
||||
_d0_save = __RAMBAR0 + 0x830;
|
||||
_a7_save = __RAMBAR0 + 0x834;
|
||||
_video_tlb = __RAMBAR0 + 0x838;
|
||||
_video_sbt = __RAMBAR0 + 0x83C;
|
||||
_rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */
|
||||
/*
|
||||
* FPGA_JTAG_LOADED (if 1) indicates that FPGA configuration has been loaded through JTAG
|
||||
* and shouldn't be overwritten on boot. For this to work (and not let us be faked
|
||||
* by a random uninitialised value), __FPGA_JTAG_VALID is used as a "magic value" and must be
|
||||
* 0xaffeaffe to make this work.
|
||||
*/
|
||||
#if !defined(MACHINE_M54455) /* MCF54455 does not have RAMBAR0 and RAMBAR1 */
|
||||
__FPGA_JTAG_LOADED = __RAMBAR1;
|
||||
__FPGA_JTAG_VALID = __RAMBAR1 + 4;
|
||||
#else
|
||||
__FPGA_JTAG_LOADED = __RAMBAR0 + 0x1000;
|
||||
__FPGA_JTAG_VALID = __RAMBAR0 + 0x1000 + 4;
|
||||
#endif
|
||||
|
||||
/* system variables */
|
||||
/* RAMBAR0 0 to 0x7FF -> exception vectors */
|
||||
_rt_mod = __RAMBAR0 + 0x800;
|
||||
_rt_ssp = __RAMBAR0 + 0x804;
|
||||
_rt_usp = __RAMBAR0 + 0x808;
|
||||
_rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */
|
||||
_rt_cacr = __RAMBAR0 + 0x810; /* 002 */
|
||||
_rt_asid = __RAMBAR0 + 0x814; /* 003 */
|
||||
_rt_acr0 = __RAMBAR0 + 0x818; /* 004 */
|
||||
_rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */
|
||||
_rt_acr2 = __RAMBAR0 + 0x820; /* 006 */
|
||||
_rt_acr3 = __RAMBAR0 + 0x824; /* 007 */
|
||||
_rt_mmubar = __RAMBAR0 + 0x828; /* 008 */
|
||||
_rt_sr = __RAMBAR0 + 0x82c;
|
||||
_d0_save = __RAMBAR0 + 0x830;
|
||||
_a7_save = __RAMBAR0 + 0x834;
|
||||
_video_tlb = __RAMBAR0 + 0x838;
|
||||
_video_sbt = __RAMBAR0 + 0x83C;
|
||||
_rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */
|
||||
}
|
||||
|
||||
@@ -63,10 +63,6 @@ write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
|
||||
sleep 100
|
||||
|
||||
load -v firebee/ram.elf
|
||||
write-ctrl 0x80e 0x2700
|
||||
write-ctrl 0x2 0xa50c8120
|
||||
dump-register SR
|
||||
dump-register CACR
|
||||
dump-register MBAR
|
||||
|
||||
execute
|
||||
wait
|
||||
|
||||
@@ -1,14 +1,16 @@
|
||||
#ifdef MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
#ifdef MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#endif /* MACHINE_M5484LITE */
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
#error unknown machine
|
||||
#endif
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flasher (WX) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000 /* target to load basflash */
|
||||
flasher (WX) : ORIGIN = BFL_TARGET_ADDRESS, LENGTH = 0x00100000 /* target to load basflash */
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
|
||||
1069
dma/MCD_dmaApi.c
1069
dma/MCD_dmaApi.c
File diff suppressed because it is too large
Load Diff
370
dma/MCD_tasks.c
370
dma/MCD_tasks.c
@@ -7,253 +7,253 @@
|
||||
|
||||
#include "MCD_dma.h"
|
||||
|
||||
uint32_t MCD_varTab0[];
|
||||
uint32_t MCD_varTab1[];
|
||||
uint32_t MCD_varTab2[];
|
||||
uint32_t MCD_varTab3[];
|
||||
uint32_t MCD_varTab4[];
|
||||
uint32_t MCD_varTab5[];
|
||||
uint32_t MCD_varTab6[];
|
||||
uint32_t MCD_varTab7[];
|
||||
uint32_t MCD_varTab8[];
|
||||
uint32_t MCD_varTab9[];
|
||||
uint32_t MCD_varTab10[];
|
||||
uint32_t MCD_varTab11[];
|
||||
uint32_t MCD_varTab12[];
|
||||
uint32_t MCD_varTab13[];
|
||||
uint32_t MCD_varTab14[];
|
||||
uint32_t MCD_varTab15[];
|
||||
u32 MCD_varTab0[];
|
||||
u32 MCD_varTab1[];
|
||||
u32 MCD_varTab2[];
|
||||
u32 MCD_varTab3[];
|
||||
u32 MCD_varTab4[];
|
||||
u32 MCD_varTab5[];
|
||||
u32 MCD_varTab6[];
|
||||
u32 MCD_varTab7[];
|
||||
u32 MCD_varTab8[];
|
||||
u32 MCD_varTab9[];
|
||||
u32 MCD_varTab10[];
|
||||
u32 MCD_varTab11[];
|
||||
u32 MCD_varTab12[];
|
||||
u32 MCD_varTab13[];
|
||||
u32 MCD_varTab14[];
|
||||
u32 MCD_varTab15[];
|
||||
|
||||
uint32_t MCD_funcDescTab0[];
|
||||
u32 MCD_funcDescTab0[];
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
uint32_t MCD_funcDescTab1[];
|
||||
uint32_t MCD_funcDescTab2[];
|
||||
uint32_t MCD_funcDescTab3[];
|
||||
uint32_t MCD_funcDescTab4[];
|
||||
uint32_t MCD_funcDescTab5[];
|
||||
uint32_t MCD_funcDescTab6[];
|
||||
uint32_t MCD_funcDescTab7[];
|
||||
uint32_t MCD_funcDescTab8[];
|
||||
uint32_t MCD_funcDescTab9[];
|
||||
uint32_t MCD_funcDescTab10[];
|
||||
uint32_t MCD_funcDescTab11[];
|
||||
uint32_t MCD_funcDescTab12[];
|
||||
uint32_t MCD_funcDescTab13[];
|
||||
uint32_t MCD_funcDescTab14[];
|
||||
uint32_t MCD_funcDescTab15[];
|
||||
u32 MCD_funcDescTab1[];
|
||||
u32 MCD_funcDescTab2[];
|
||||
u32 MCD_funcDescTab3[];
|
||||
u32 MCD_funcDescTab4[];
|
||||
u32 MCD_funcDescTab5[];
|
||||
u32 MCD_funcDescTab6[];
|
||||
u32 MCD_funcDescTab7[];
|
||||
u32 MCD_funcDescTab8[];
|
||||
u32 MCD_funcDescTab9[];
|
||||
u32 MCD_funcDescTab10[];
|
||||
u32 MCD_funcDescTab11[];
|
||||
u32 MCD_funcDescTab12[];
|
||||
u32 MCD_funcDescTab13[];
|
||||
u32 MCD_funcDescTab14[];
|
||||
u32 MCD_funcDescTab15[];
|
||||
#endif
|
||||
|
||||
uint32_t MCD_contextSave0[];
|
||||
uint32_t MCD_contextSave1[];
|
||||
uint32_t MCD_contextSave2[];
|
||||
uint32_t MCD_contextSave3[];
|
||||
uint32_t MCD_contextSave4[];
|
||||
uint32_t MCD_contextSave5[];
|
||||
uint32_t MCD_contextSave6[];
|
||||
uint32_t MCD_contextSave7[];
|
||||
uint32_t MCD_contextSave8[];
|
||||
uint32_t MCD_contextSave9[];
|
||||
uint32_t MCD_contextSave10[];
|
||||
uint32_t MCD_contextSave11[];
|
||||
uint32_t MCD_contextSave12[];
|
||||
uint32_t MCD_contextSave13[];
|
||||
uint32_t MCD_contextSave14[];
|
||||
uint32_t MCD_contextSave15[];
|
||||
u32 MCD_contextSave0[];
|
||||
u32 MCD_contextSave1[];
|
||||
u32 MCD_contextSave2[];
|
||||
u32 MCD_contextSave3[];
|
||||
u32 MCD_contextSave4[];
|
||||
u32 MCD_contextSave5[];
|
||||
u32 MCD_contextSave6[];
|
||||
u32 MCD_contextSave7[];
|
||||
u32 MCD_contextSave8[];
|
||||
u32 MCD_contextSave9[];
|
||||
u32 MCD_contextSave10[];
|
||||
u32 MCD_contextSave11[];
|
||||
u32 MCD_contextSave12[];
|
||||
u32 MCD_contextSave13[];
|
||||
u32 MCD_contextSave14[];
|
||||
u32 MCD_contextSave15[];
|
||||
|
||||
uint32_t MCD_realTaskTableSrc[] =
|
||||
u32 MCD_realTaskTableSrc[] =
|
||||
{
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab0, /* Task 0 Variable Table */
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_varTab0, /* Task 0 Variable Table */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave0, /* Task 0 context save space */
|
||||
(u32)MCD_contextSave0, /* Task 0 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab1, /* Task 1 Variable Table */
|
||||
(u32)MCD_varTab1, /* Task 1 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab1, /* Task 1 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab1, /* Task 1 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave1, /* Task 1 context save space */
|
||||
(u32)MCD_contextSave1, /* Task 1 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab2, /* Task 2 Variable Table */
|
||||
(u32)MCD_varTab2, /* Task 2 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab2, /* Task 2 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab2, /* Task 2 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave2, /* Task 2 context save space */
|
||||
(u32)MCD_contextSave2, /* Task 2 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab3, /* Task 3 Variable Table */
|
||||
(u32)MCD_varTab3, /* Task 3 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab3, /* Task 3 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab3, /* Task 3 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave3, /* Task 3 context save space */
|
||||
(u32)MCD_contextSave3, /* Task 3 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab4, /* Task 4 Variable Table */
|
||||
(u32)MCD_varTab4, /* Task 4 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab4, /* Task 4 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab4, /* Task 4 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave4, /* Task 4 context save space */
|
||||
(u32)MCD_contextSave4, /* Task 4 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab5, /* Task 5 Variable Table */
|
||||
(u32)MCD_varTab5, /* Task 5 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab5, /* Task 5 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab5, /* Task 5 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave5, /* Task 5 context save space */
|
||||
(u32)MCD_contextSave5, /* Task 5 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab6, /* Task 6 Variable Table */
|
||||
(u32)MCD_varTab6, /* Task 6 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab6, /* Task 6 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab6, /* Task 6 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave6, /* Task 6 context save space */
|
||||
(u32)MCD_contextSave6, /* Task 6 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab7, /* Task 7 Variable Table */
|
||||
(u32)MCD_varTab7, /* Task 7 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab7, /* Task 7 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab7, /* Task 7 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave7, /* Task 7 context save space */
|
||||
(u32)MCD_contextSave7, /* Task 7 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab8, /* Task 8 Variable Table */
|
||||
(u32)MCD_varTab8, /* Task 8 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab8, /* Task 8 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab8, /* Task 8 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave8, /* Task 8 context save space */
|
||||
(u32)MCD_contextSave8, /* Task 8 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab9, /* Task 9 Variable Table */
|
||||
(u32)MCD_varTab9, /* Task 9 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab9, /* Task 9 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab9, /* Task 9 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave9, /* Task 9 context save space */
|
||||
(u32)MCD_contextSave9, /* Task 9 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab10, /* Task 10 Variable Table */
|
||||
(u32)MCD_varTab10, /* Task 10 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave10, /* Task 10 context save space */
|
||||
(u32)MCD_contextSave10, /* Task 10 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab11, /* Task 11 Variable Table */
|
||||
(u32)MCD_varTab11, /* Task 11 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave11, /* Task 11 context save space */
|
||||
(u32)MCD_contextSave11, /* Task 11 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab12, /* Task 12 Variable Table */
|
||||
(u32)MCD_varTab12, /* Task 12 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave12, /* Task 12 context save space */
|
||||
(u32)MCD_contextSave12, /* Task 12 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab13, /* Task 13 Variable Table */
|
||||
(u32)MCD_varTab13, /* Task 13 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave13, /* Task 13 context save space */
|
||||
(u32)MCD_contextSave13, /* Task 13 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab14, /* Task 14 Variable Table */
|
||||
(u32)MCD_varTab14, /* Task 14 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave14, /* Task 14 context save space */
|
||||
(u32)MCD_contextSave14, /* Task 14 context save space */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_varTab15, /* Task 15 Variable Table */
|
||||
(u32)MCD_varTab15, /* Task 15 Variable Table */
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */
|
||||
#else
|
||||
(uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
(u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */
|
||||
#endif
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_contextSave15, /* Task 15 context save space */
|
||||
(u32)MCD_contextSave15, /* Task 15 context save space */
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
|
||||
uint32_t MCD_varTab0[] =
|
||||
u32 MCD_varTab0[] =
|
||||
{ /* Task 0 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -290,7 +290,7 @@ uint32_t MCD_varTab0[] =
|
||||
};
|
||||
|
||||
|
||||
uint32_t MCD_varTab1[] =
|
||||
u32 MCD_varTab1[] =
|
||||
{ /* Task 1 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -326,7 +326,7 @@ uint32_t MCD_varTab1[] =
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab2[]=
|
||||
u32 MCD_varTab2[]=
|
||||
{ /* Task 2 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -362,7 +362,7 @@ uint32_t MCD_varTab2[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab3[]=
|
||||
u32 MCD_varTab3[]=
|
||||
{ /* Task 3 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -398,7 +398,7 @@ uint32_t MCD_varTab3[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab4[]=
|
||||
u32 MCD_varTab4[]=
|
||||
{ /* Task 4 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -434,7 +434,7 @@ uint32_t MCD_varTab4[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab5[]=
|
||||
u32 MCD_varTab5[]=
|
||||
{ /* Task 5 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -470,7 +470,7 @@ uint32_t MCD_varTab5[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab6[]=
|
||||
u32 MCD_varTab6[]=
|
||||
{ /* Task 6 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -506,7 +506,7 @@ uint32_t MCD_varTab6[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab7[]=
|
||||
u32 MCD_varTab7[]=
|
||||
{ /* Task 7 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -542,7 +542,7 @@ uint32_t MCD_varTab7[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab8[]=
|
||||
u32 MCD_varTab8[]=
|
||||
{ /* Task 8 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -578,7 +578,7 @@ uint32_t MCD_varTab8[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab9[]=
|
||||
u32 MCD_varTab9[]=
|
||||
{ /* Task 9 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -614,7 +614,7 @@ uint32_t MCD_varTab9[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab10[]=
|
||||
u32 MCD_varTab10[]=
|
||||
{ /* Task 10 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -650,7 +650,7 @@ uint32_t MCD_varTab10[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab11[]=
|
||||
u32 MCD_varTab11[]=
|
||||
{ /* Task 11 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -686,7 +686,7 @@ uint32_t MCD_varTab11[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab12[]=
|
||||
u32 MCD_varTab12[]=
|
||||
{ /* Task 12 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -722,7 +722,7 @@ uint32_t MCD_varTab12[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab13[]=
|
||||
u32 MCD_varTab13[]=
|
||||
{ /* Task 13 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -758,7 +758,7 @@ uint32_t MCD_varTab13[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab14[]=
|
||||
u32 MCD_varTab14[]=
|
||||
{ /* Task 14 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -794,7 +794,7 @@ uint32_t MCD_varTab14[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_varTab15[]=
|
||||
u32 MCD_varTab15[]=
|
||||
{ /* Task 15 Variable Table */
|
||||
0x00000000, /* var[0] */
|
||||
0x00000000, /* var[1] */
|
||||
@@ -830,7 +830,7 @@ uint32_t MCD_varTab15[]=
|
||||
0x00000000, /* inc[7] */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab0[]=
|
||||
u32 MCD_funcDescTab0[]=
|
||||
{ /* Task 0 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -899,7 +899,7 @@ uint32_t MCD_funcDescTab0[]=
|
||||
};
|
||||
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
uint32_t MCD_funcDescTab1[]=
|
||||
u32 MCD_funcDescTab1[]=
|
||||
{ /* Task 1 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -967,7 +967,7 @@ uint32_t MCD_funcDescTab1[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab2[]=
|
||||
u32 MCD_funcDescTab2[]=
|
||||
{ /* Task 2 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1035,7 +1035,7 @@ uint32_t MCD_funcDescTab2[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab3[]=
|
||||
u32 MCD_funcDescTab3[]=
|
||||
{ /* Task 3 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1103,7 +1103,7 @@ uint32_t MCD_funcDescTab3[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab4[]=
|
||||
u32 MCD_funcDescTab4[]=
|
||||
{ /* Task 4 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1171,7 +1171,7 @@ uint32_t MCD_funcDescTab4[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab5[]=
|
||||
u32 MCD_funcDescTab5[]=
|
||||
{ /* Task 5 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1239,7 +1239,7 @@ uint32_t MCD_funcDescTab5[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab6[]=
|
||||
u32 MCD_funcDescTab6[]=
|
||||
{ /* Task 6 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1307,7 +1307,7 @@ uint32_t MCD_funcDescTab6[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab7[]=
|
||||
u32 MCD_funcDescTab7[]=
|
||||
{ /* Task 7 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1375,7 +1375,7 @@ uint32_t MCD_funcDescTab7[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab8[]=
|
||||
u32 MCD_funcDescTab8[]=
|
||||
{ /* Task 8 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1443,7 +1443,7 @@ uint32_t MCD_funcDescTab8[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab9[]=
|
||||
u32 MCD_funcDescTab9[]=
|
||||
{ /* Task 9 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1511,7 +1511,7 @@ uint32_t MCD_funcDescTab9[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab10[]=
|
||||
u32 MCD_funcDescTab10[]=
|
||||
{ /* Task 10 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1579,7 +1579,7 @@ uint32_t MCD_funcDescTab10[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab11[]=
|
||||
u32 MCD_funcDescTab11[]=
|
||||
{ /* Task 11 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1647,7 +1647,7 @@ uint32_t MCD_funcDescTab11[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab12[]=
|
||||
u32 MCD_funcDescTab12[]=
|
||||
{ /* Task 12 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1715,7 +1715,7 @@ uint32_t MCD_funcDescTab12[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab13[]=
|
||||
u32 MCD_funcDescTab13[]=
|
||||
{ /* Task 13 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1783,7 +1783,7 @@ uint32_t MCD_funcDescTab13[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab14[]=
|
||||
u32 MCD_funcDescTab14[]=
|
||||
{ /* Task 14 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1851,7 +1851,7 @@ uint32_t MCD_funcDescTab14[]=
|
||||
0x202f2000, /* andCrcRestartBit(), EU# 3 */
|
||||
};
|
||||
|
||||
uint32_t MCD_funcDescTab15[]=
|
||||
u32 MCD_funcDescTab15[]=
|
||||
{ /* Task 15 Function Descriptor Table */
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1920,45 +1920,45 @@ uint32_t MCD_funcDescTab15[]=
|
||||
};
|
||||
#endif /*MCD_INCLUDE_EU*/
|
||||
|
||||
uint32_t MCD_contextSave0[128]; /* Task 0 context save space */
|
||||
uint32_t MCD_contextSave1[128]; /* Task 1 context save space */
|
||||
uint32_t MCD_contextSave2[128]; /* Task 2 context save space */
|
||||
uint32_t MCD_contextSave3[128]; /* Task 3 context save space */
|
||||
uint32_t MCD_contextSave4[128]; /* Task 4 context save space */
|
||||
uint32_t MCD_contextSave5[128]; /* Task 5 context save space */
|
||||
uint32_t MCD_contextSave6[128]; /* Task 6 context save space */
|
||||
uint32_t MCD_contextSave7[128]; /* Task 7 context save space */
|
||||
uint32_t MCD_contextSave8[128]; /* Task 8 context save space */
|
||||
uint32_t MCD_contextSave9[128]; /* Task 9 context save space */
|
||||
uint32_t MCD_contextSave10[128]; /* Task 10 context save space */
|
||||
uint32_t MCD_contextSave11[128]; /* Task 11 context save space */
|
||||
uint32_t MCD_contextSave12[128]; /* Task 12 context save space */
|
||||
uint32_t MCD_contextSave13[128]; /* Task 13 context save space */
|
||||
uint32_t MCD_contextSave14[128]; /* Task 14 context save space */
|
||||
uint32_t MCD_contextSave15[128]; /* Task 15 context save space */
|
||||
u32 MCD_contextSave0[128]; /* Task 0 context save space */
|
||||
u32 MCD_contextSave1[128]; /* Task 1 context save space */
|
||||
u32 MCD_contextSave2[128]; /* Task 2 context save space */
|
||||
u32 MCD_contextSave3[128]; /* Task 3 context save space */
|
||||
u32 MCD_contextSave4[128]; /* Task 4 context save space */
|
||||
u32 MCD_contextSave5[128]; /* Task 5 context save space */
|
||||
u32 MCD_contextSave6[128]; /* Task 6 context save space */
|
||||
u32 MCD_contextSave7[128]; /* Task 7 context save space */
|
||||
u32 MCD_contextSave8[128]; /* Task 8 context save space */
|
||||
u32 MCD_contextSave9[128]; /* Task 9 context save space */
|
||||
u32 MCD_contextSave10[128]; /* Task 10 context save space */
|
||||
u32 MCD_contextSave11[128]; /* Task 11 context save space */
|
||||
u32 MCD_contextSave12[128]; /* Task 12 context save space */
|
||||
u32 MCD_contextSave13[128]; /* Task 13 context save space */
|
||||
u32 MCD_contextSave14[128]; /* Task 14 context save space */
|
||||
u32 MCD_contextSave15[128]; /* Task 15 context save space */
|
||||
|
||||
|
||||
uint32_t MCD_ChainNoEu_TDT[];
|
||||
uint32_t MCD_SingleNoEu_TDT[];
|
||||
u32 MCD_ChainNoEu_TDT[];
|
||||
u32 MCD_SingleNoEu_TDT[];
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
uint32_t MCD_ChainEu_TDT[];
|
||||
uint32_t MCD_SingleEu_TDT[];
|
||||
u32 MCD_ChainEu_TDT[];
|
||||
u32 MCD_SingleEu_TDT[];
|
||||
#endif
|
||||
uint32_t MCD_ENetRcv_TDT[];
|
||||
uint32_t MCD_ENetXmit_TDT[];
|
||||
u32 MCD_ENetRcv_TDT[];
|
||||
u32 MCD_ENetXmit_TDT[];
|
||||
|
||||
uint32_t MCD_modelTaskTableSrc[]=
|
||||
u32 MCD_modelTaskTableSrc[]=
|
||||
{
|
||||
(uint32_t)MCD_ChainNoEu_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_ChainNoEu_TDT)[0x0000016c],
|
||||
(u32)MCD_ChainNoEu_TDT,
|
||||
(u32)&((u8*)MCD_ChainNoEu_TDT)[0x0000016c],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_SingleNoEu_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_SingleNoEu_TDT)[0x000000d4],
|
||||
(u32)MCD_SingleNoEu_TDT,
|
||||
(u32)&((u8*)MCD_SingleNoEu_TDT)[0x000000d4],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1966,16 +1966,16 @@ uint32_t MCD_modelTaskTableSrc[]=
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
(uint32_t)MCD_ChainEu_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_ChainEu_TDT)[0x000001b4],
|
||||
(u32)MCD_ChainEu_TDT,
|
||||
(u32)&((u8*)MCD_ChainEu_TDT)[0x000001b4],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_SingleEu_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_SingleEu_TDT)[0x00000124],
|
||||
(u32)MCD_SingleEu_TDT,
|
||||
(u32)&((u8*)MCD_SingleEu_TDT)[0x00000124],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -1983,16 +1983,16 @@ uint32_t MCD_modelTaskTableSrc[]=
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
#endif
|
||||
(uint32_t)MCD_ENetRcv_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_ENetRcv_TDT)[0x0000009c],
|
||||
(u32)MCD_ENetRcv_TDT,
|
||||
(u32)&((u8*)MCD_ENetRcv_TDT)[0x0000009c],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
(uint32_t)MCD_ENetXmit_TDT,
|
||||
(uint32_t)&((uint8_t*)MCD_ENetXmit_TDT)[0x000000d0],
|
||||
(u32)MCD_ENetXmit_TDT,
|
||||
(u32)&((u8*)MCD_ENetXmit_TDT)[0x000000d0],
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
@@ -2000,7 +2000,7 @@ uint32_t MCD_modelTaskTableSrc[]=
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
uint32_t MCD_ChainNoEu_TDT[]=
|
||||
u32 MCD_ChainNoEu_TDT[]=
|
||||
{
|
||||
0x80004000, /* 0000(:370): LCDEXT: idx0 = 0x00000000; ; */
|
||||
0x8118801b, /* 0004(:370): LCD: idx1 = var2; idx1 once var0; idx1 += inc3 */
|
||||
@@ -2095,7 +2095,7 @@ uint32_t MCD_ChainNoEu_TDT[]=
|
||||
0x000001f8, /* 0168(:0): NOP */
|
||||
0x000001f8, /* 016C(:0): NOP */
|
||||
};
|
||||
uint32_t MCD_SingleNoEu_TDT[]=
|
||||
u32 MCD_SingleNoEu_TDT[]=
|
||||
{
|
||||
0x8198001b, /* 0000(:657): LCD: idx0 = var3; idx0 once var0; idx0 += inc3 */
|
||||
0x7000000d, /* 0004(:658): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */
|
||||
@@ -2153,7 +2153,7 @@ uint32_t MCD_SingleNoEu_TDT[]=
|
||||
0x040001f8, /* 00D4(:713): DRD1A: FN=0 INT init=0 WS=0 RS=0 */
|
||||
};
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
uint32_t MCD_ChainEu_TDT[]=
|
||||
u32 MCD_ChainEu_TDT[]=
|
||||
{
|
||||
0x80004000, /* 0000(:947): LCDEXT: idx0 = 0x00000000; ; */
|
||||
0x8198801b, /* 0004(:947): LCD: idx1 = var3; idx1 once var0; idx1 += inc3 */
|
||||
@@ -2266,7 +2266,7 @@ uint32_t MCD_ChainEu_TDT[]=
|
||||
0x000001f8, /* 01B0(:0): NOP */
|
||||
0x000001f8, /* 01B4(:0): NOP */
|
||||
};
|
||||
uint32_t MCD_SingleEu_TDT[]=
|
||||
u32 MCD_SingleEu_TDT[]=
|
||||
{
|
||||
0x8218001b, /* 0000(:1248): LCD: idx0 = var4; idx0 once var0; idx0 += inc3 */
|
||||
0x7000000d, /* 0004(:1249): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */
|
||||
@@ -2344,7 +2344,7 @@ uint32_t MCD_SingleEu_TDT[]=
|
||||
0x040001f8, /* 0124(:1316): DRD1A: FN=0 INT init=0 WS=0 RS=0 */
|
||||
};
|
||||
#endif
|
||||
uint32_t MCD_ENetRcv_TDT[]=
|
||||
u32 MCD_ENetRcv_TDT[]=
|
||||
{
|
||||
0x80004000, /* 0000(:1389): LCDEXT: idx0 = 0x00000000; ; */
|
||||
0x81988000, /* 0004(:1389): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
|
||||
@@ -2387,7 +2387,7 @@ uint32_t MCD_ENetRcv_TDT[]=
|
||||
0x040001f8, /* 0098(:1441): DRD1A: FN=0 INT init=0 WS=0 RS=0 */
|
||||
0x000001f8, /* 009C(:0): NOP */
|
||||
};
|
||||
uint32_t MCD_ENetXmit_TDT[]=
|
||||
u32 MCD_ENetXmit_TDT[]=
|
||||
{
|
||||
0x80004000, /* 0000(:1516): LCDEXT: idx0 = 0x00000000; ; */
|
||||
0x81988000, /* 0004(:1516): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
|
||||
|
||||
@@ -11,7 +11,6 @@
|
||||
*/
|
||||
|
||||
#include "MCD_dma.h"
|
||||
#include "MCD_tasksInit.h"
|
||||
|
||||
extern dmaRegs *MCD_dmaBar;
|
||||
|
||||
@@ -23,33 +22,33 @@ extern dmaRegs *MCD_dmaBar;
|
||||
void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)currBD); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (uint32_t)xferSize); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)0x00000000); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x80000000); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0x00000010); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000004); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x08000000); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000001); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x40000000); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)xferSize); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)0x00000000); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (u32)0x80000000); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (u32)0x00000010); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (u32)0x08000000); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000001); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x40000000); /* inc[6] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
@@ -57,29 +56,29 @@ void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer
|
||||
* Task 1
|
||||
*/
|
||||
|
||||
void MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)srcAddr); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)destAddr); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)dmaSize); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)flags); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)currBD); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000004); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x08000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000001); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x40000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)srcAddr); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)destAddr); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)dmaSize); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)flags); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)currBD); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000004); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x08000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000001); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x40000000); /* inc[5] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
@@ -90,36 +89,36 @@ void MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, s
|
||||
void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (uint32_t)xferSize); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x00000000); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x00000000); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0x80000000); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000010); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x00000001); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 17, (uint32_t)0x00000004); /* var[17] */
|
||||
MCD_SET_VAR(taskTable+channel, 18, (uint32_t)0x08000000); /* var[18] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0xc0000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x80000001); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0x40000000); /* inc[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)xferSize); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000000); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (u32)0x00000000); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (u32)0x80000000); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000010); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000001); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 17, (u32)0x00000004); /* var[17] */
|
||||
MCD_SET_VAR(taskTable+channel, 18, (u32)0x08000000); /* var[18] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0xc0000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
@@ -127,33 +126,33 @@ void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi
|
||||
* Task 3
|
||||
*/
|
||||
|
||||
void MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)srcAddr); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)destAddr); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)dmaSize); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)flags); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)currBD); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000001); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x00000004); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x08000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0xc0000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x80000001); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0x40000000); /* inc[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)srcAddr); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)destAddr); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)dmaSize); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)flags); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000001); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000004); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x08000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0xc0000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
@@ -161,29 +160,29 @@ void MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, sho
|
||||
* Task 4
|
||||
*/
|
||||
|
||||
void MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel)
|
||||
void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)bDBase); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)rcvFifoPtr); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x0000ffff); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x30000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x0fffffff); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000008); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)0x00000000); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)0x60000000); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)0x20000004); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x40000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)rcvFifoPtr); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x0000ffff); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x30000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)0x0fffffff); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000008); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)0x20000004); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x40000000); /* inc[3] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
@@ -191,35 +190,35 @@ void MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, vo
|
||||
* Task 5
|
||||
*/
|
||||
|
||||
void MCD_startDmaENetXmit(int8_t *bDBase, int8_t *currBD, int8_t *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel)
|
||||
void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 0, (uint32_t)bDBase); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (uint32_t)xmitFifoPtr); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x0000ffff); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0xffffffff); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000004); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x00000008); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (uint32_t)0x00000000); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (uint32_t)0x60000000); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (uint32_t)0x40000000); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0xc000fffc); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0xe0000004); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x4000ffff); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0xe0000001); /* inc[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)xmitFifoPtr); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (u32)0x0000ffff); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (u32)0xffffffff); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000008); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)0x40000000); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0xc000fffc); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0xe0000004); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x4000ffff); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (u32)0xe0000001); /* inc[7] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
733
exe/basflash.c
733
exe/basflash.c
@@ -21,20 +21,21 @@
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "bas_string.h"
|
||||
#include <bas_types.h>
|
||||
#include "bas_printf.h"
|
||||
#include "bas_string.h"
|
||||
#include "diskio.h"
|
||||
#include "ff.h"
|
||||
#include "s19reader.h"
|
||||
|
||||
#ifdef MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
#ifdef MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#elif defined(MACHINE_M54455)
|
||||
#include "m54455.h"
|
||||
#else
|
||||
error unknown machine!
|
||||
#endif /* MACHINE_M5484LITE */
|
||||
|
||||
#define AMD_FLASH_BUS_SHIFT 1
|
||||
@@ -45,143 +46,143 @@
|
||||
|
||||
struct amd_flash_sector_info
|
||||
{
|
||||
uint32_t size; /* sector size in bytes */
|
||||
uint32_t offset; /* offset from base of device */
|
||||
uint32_t size; /* sector size in bytes */
|
||||
uint32_t offset; /* offset from base of device */
|
||||
};
|
||||
|
||||
/*
|
||||
* AM29LV640D flash layout (bottom boot as used in the Firebee )
|
||||
* AM29LV640D flash layout (bottom boot as used in the Firebee)
|
||||
*/
|
||||
static struct amd_flash_sector_info sector[] =
|
||||
{
|
||||
{ 8 * 1024, 0x00000000 }, /* SA0 */
|
||||
{ 8 * 1024, 0x00008000 }, /* SA1 */
|
||||
{ 8 * 1024, 0x00010000 }, /* SA2 */
|
||||
{ 8 * 1024, 0x00018000 }, /* SA3 */
|
||||
{ 8 * 1024, 0x00020000 }, /* SA4 */
|
||||
{ 8 * 1024, 0x00028000 }, /* SA5 */
|
||||
{ 8 * 1024, 0x00030000 }, /* SA6 */
|
||||
{ 8 * 1024, 0x00038000 }, /* SA7 */
|
||||
{ 8 * 1024, 0x00040000 }, /* SA8 */
|
||||
{ 64 * 1024, 0x00048000 }, /* SA9 */
|
||||
{ 64 * 1024, 0x00050000 }, /* SA10 */
|
||||
{ 64 * 1024, 0x00058000 }, /* SA11 */
|
||||
{ 64 * 1024, 0x00060000 }, /* SA12 */
|
||||
{ 64 * 1024, 0x00068000 }, /* SA13 */
|
||||
{ 64 * 1024, 0x00070000 }, /* SA14 */
|
||||
{ 64 * 1024, 0x00078000 }, /* SA15 */
|
||||
{ 64 * 1024, 0x00080000 }, /* SA16 */
|
||||
{ 64 * 1024, 0x00088000 }, /* SA17 */
|
||||
{ 64 * 1024, 0x00090000 }, /* SA18 */
|
||||
{ 64 * 1024, 0x00098000 }, /* SA19 */
|
||||
{ 64 * 1024, 0x000a0000 }, /* SA20 */
|
||||
{ 64 * 1024, 0x000a8000 }, /* SA21 */
|
||||
{ 64 * 1024, 0x000b0000 }, /* SA22 */
|
||||
{ 64 * 1024, 0x000b8000 }, /* SA23 */
|
||||
{ 64 * 1024, 0x000c0000 }, /* SA24 */
|
||||
{ 64 * 1024, 0x000c8000 }, /* SA25 */
|
||||
{ 64 * 1024, 0x000d0000 }, /* SA26 */
|
||||
{ 64 * 1024, 0x000d8000 }, /* SA27 */
|
||||
{ 64 * 1024, 0x000e0000 }, /* SA28 */
|
||||
{ 64 * 1024, 0x000e8000 }, /* SA29 */
|
||||
{ 64 * 1024, 0x000f0000 }, /* SA30 */
|
||||
{ 64 * 1024, 0x000f8000 }, /* SA31 */
|
||||
{ 64 * 1024, 0x00100000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00108000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00110000 }, /* SA34 */
|
||||
{ 64 * 1024, 0x00118000 }, /* SA35 */
|
||||
{ 64 * 1024, 0x00120000 }, /* SA36 */
|
||||
{ 64 * 1024, 0x00128000 }, /* SA37 */
|
||||
{ 64 * 1024, 0x00130000 }, /* SA38 */
|
||||
{ 64 * 1024, 0x00138000 }, /* SA39 */
|
||||
{ 64 * 1024, 0x00140000 }, /* SA40 */
|
||||
{ 64 * 1024, 0x00148000 }, /* SA41 */
|
||||
{ 64 * 1024, 0x00150000 }, /* SA42 */
|
||||
{ 64 * 1024, 0x00158000 }, /* SA43 */
|
||||
{ 64 * 1024, 0x00160000 }, /* SA44 */
|
||||
{ 64 * 1024, 0x00168000 }, /* SA45 */
|
||||
{ 64 * 1024, 0x00170000 }, /* SA46 */
|
||||
{ 64 * 1024, 0x00178000 }, /* SA47 */
|
||||
{ 64 * 1024, 0x00180000 }, /* SA48 */
|
||||
{ 64 * 1024, 0x00188000 }, /* SA49 */
|
||||
{ 64 * 1024, 0x00190000 }, /* SA50 */
|
||||
{ 64 * 1024, 0x00198000 }, /* SA51 */
|
||||
{ 64 * 1024, 0x001a0000 }, /* SA52 */
|
||||
{ 64 * 1024, 0x001a8000 }, /* SA53 */
|
||||
{ 64 * 1024, 0x001b0000 }, /* SA54 */
|
||||
{ 64 * 1024, 0x001b8000 }, /* SA55 */
|
||||
{ 64 * 1024, 0x001c0000 }, /* SA56 */
|
||||
{ 64 * 1024, 0x001c8000 }, /* SA57 */
|
||||
{ 64 * 1024, 0x001d0000 }, /* SA58 */
|
||||
{ 64 * 1024, 0x001d8000 }, /* SA59 */
|
||||
{ 64 * 1024, 0x001e0000 }, /* SA60 */
|
||||
{ 64 * 1024, 0x001e8000 }, /* SA61 */
|
||||
{ 64 * 1024, 0x001f0000 }, /* SA62 */
|
||||
{ 64 * 1024, 0x001f8000 }, /* SA63 */
|
||||
{ 64 * 1024, 0x00200000 }, /* SA64 */
|
||||
{ 64 * 1024, 0x00208000 }, /* SA65 */
|
||||
{ 64 * 1024, 0x00210000 }, /* SA66 */
|
||||
{ 64 * 1024, 0x00218000 }, /* SA67 */
|
||||
{ 64 * 1024, 0x00220000 }, /* SA68 */
|
||||
{ 64 * 1024, 0x00228000 }, /* SA69 */
|
||||
{ 64 * 1024, 0x00230000 }, /* SA70 */
|
||||
{ 64 * 1024, 0x00238000 }, /* SA71 */
|
||||
{ 64 * 1024, 0x00240000 }, /* SA72 */
|
||||
{ 64 * 1024, 0x00248000 }, /* SA73 */
|
||||
{ 64 * 1024, 0x00250000 }, /* SA74 */
|
||||
{ 64 * 1024, 0x00258000 }, /* SA75 */
|
||||
{ 64 * 1024, 0x00260000 }, /* SA76 */
|
||||
{ 64 * 1024, 0x00268000 }, /* SA77 */
|
||||
{ 64 * 1024, 0x00270000 }, /* SA78 */
|
||||
{ 64 * 1024, 0x00278000 }, /* SA79 */
|
||||
{ 64 * 1024, 0x00280000 }, /* SA80 */
|
||||
{ 64 * 1024, 0x00288000 }, /* SA81 */
|
||||
{ 64 * 1024, 0x00290000 }, /* SA82 */
|
||||
{ 64 * 1024, 0x00298000 }, /* SA83 */
|
||||
{ 64 * 1024, 0x002a0000 }, /* SA84 */
|
||||
{ 64 * 1024, 0x002a8000 }, /* SA85 */
|
||||
{ 64 * 1024, 0x002b0000 }, /* SA86 */
|
||||
{ 64 * 1024, 0x002b8000 }, /* SA87 */
|
||||
{ 64 * 1024, 0x002c0000 }, /* SA88 */
|
||||
{ 64 * 1024, 0x002c8000 }, /* SA89 */
|
||||
{ 64 * 1024, 0x002d0000 }, /* SA90 */
|
||||
{ 64 * 1024, 0x002d8000 }, /* SA91 */
|
||||
{ 64 * 1024, 0x002e0000 }, /* SA92 */
|
||||
{ 64 * 1024, 0x002e8000 }, /* SA93 */
|
||||
{ 64 * 1024, 0x002f0000 }, /* SA94 */
|
||||
{ 64 * 1024, 0x002f8000 }, /* SA95 */
|
||||
{ 64 * 1024, 0x00300000 }, /* SA96 */
|
||||
{ 64 * 1024, 0x00308000 }, /* SA97 */
|
||||
{ 64 * 1024, 0x00310000 }, /* SA98 */
|
||||
{ 64 * 1024, 0x00318000 }, /* SA99 */
|
||||
{ 64 * 1024, 0x00320000 }, /* SA100 */
|
||||
{ 64 * 1024, 0x00328000 }, /* SA101 */
|
||||
{ 64 * 1024, 0x00330000 }, /* SA102 */
|
||||
{ 64 * 1024, 0x00338000 }, /* SA103 */
|
||||
{ 64 * 1024, 0x00340000 }, /* SA104 */
|
||||
{ 64 * 1024, 0x00348000 }, /* SA105 */
|
||||
{ 64 * 1024, 0x00350000 }, /* SA106 */
|
||||
{ 64 * 1024, 0x00358000 }, /* SA107 */
|
||||
{ 64 * 1024, 0x00360000 }, /* SA108 */
|
||||
{ 64 * 1024, 0x00368000 }, /* SA109 */
|
||||
{ 64 * 1024, 0x00370000 }, /* SA110 */
|
||||
{ 64 * 1024, 0x00378000 }, /* SA111 */
|
||||
{ 64 * 1024, 0x00380000 }, /* SA112 */
|
||||
{ 64 * 1024, 0x00388000 }, /* SA113 */
|
||||
{ 64 * 1024, 0x00390000 }, /* SA114 */
|
||||
{ 64 * 1024, 0x00398000 }, /* SA115 */
|
||||
{ 64 * 1024, 0x003a0000 }, /* SA116 */
|
||||
{ 64 * 1024, 0x003a8000 }, /* SA117 */
|
||||
{ 64 * 1024, 0x003b0000 }, /* SA118 */
|
||||
{ 64 * 1024, 0x003b8000 }, /* SA119 */
|
||||
{ 64 * 1024, 0x003c0000 }, /* SA120 */
|
||||
{ 64 * 1024, 0x003c8000 }, /* SA121 */
|
||||
{ 64 * 1024, 0x003d0000 }, /* SA122 */
|
||||
{ 64 * 1024, 0x003d8000 }, /* SA123 */
|
||||
{ 64 * 1024, 0x003e0000 }, /* SA124 */
|
||||
{ 64 * 1024, 0x003e8000 }, /* SA125 */
|
||||
{ 64 * 1024, 0x003f0000 }, /* SA126 */
|
||||
{ 64 * 1024, 0x003f8000 }, /* SA127 */
|
||||
{ 8 * 1024, 0x00000000 }, /* SA0 */
|
||||
{ 8 * 1024, 0x00008000 }, /* SA1 */
|
||||
{ 8 * 1024, 0x00010000 }, /* SA2 */
|
||||
{ 8 * 1024, 0x00018000 }, /* SA3 */
|
||||
{ 8 * 1024, 0x00020000 }, /* SA4 */
|
||||
{ 8 * 1024, 0x00028000 }, /* SA5 */
|
||||
{ 8 * 1024, 0x00030000 }, /* SA6 */
|
||||
{ 8 * 1024, 0x00038000 }, /* SA7 */
|
||||
{ 8 * 1024, 0x00040000 }, /* SA8 */
|
||||
{ 64 * 1024, 0x00048000 }, /* SA9 */
|
||||
{ 64 * 1024, 0x00050000 }, /* SA10 */
|
||||
{ 64 * 1024, 0x00058000 }, /* SA11 */
|
||||
{ 64 * 1024, 0x00060000 }, /* SA12 */
|
||||
{ 64 * 1024, 0x00068000 }, /* SA13 */
|
||||
{ 64 * 1024, 0x00070000 }, /* SA14 */
|
||||
{ 64 * 1024, 0x00078000 }, /* SA15 */
|
||||
{ 64 * 1024, 0x00080000 }, /* SA16 */
|
||||
{ 64 * 1024, 0x00088000 }, /* SA17 */
|
||||
{ 64 * 1024, 0x00090000 }, /* SA18 */
|
||||
{ 64 * 1024, 0x00098000 }, /* SA19 */
|
||||
{ 64 * 1024, 0x000a0000 }, /* SA20 */
|
||||
{ 64 * 1024, 0x000a8000 }, /* SA21 */
|
||||
{ 64 * 1024, 0x000b0000 }, /* SA22 */
|
||||
{ 64 * 1024, 0x000b8000 }, /* SA23 */
|
||||
{ 64 * 1024, 0x000c0000 }, /* SA24 */
|
||||
{ 64 * 1024, 0x000c8000 }, /* SA25 */
|
||||
{ 64 * 1024, 0x000d0000 }, /* SA26 */
|
||||
{ 64 * 1024, 0x000d8000 }, /* SA27 */
|
||||
{ 64 * 1024, 0x000e0000 }, /* SA28 */
|
||||
{ 64 * 1024, 0x000e8000 }, /* SA29 */
|
||||
{ 64 * 1024, 0x000f0000 }, /* SA30 */
|
||||
{ 64 * 1024, 0x000f8000 }, /* SA31 */
|
||||
{ 64 * 1024, 0x00100000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00108000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00110000 }, /* SA34 */
|
||||
{ 64 * 1024, 0x00118000 }, /* SA35 */
|
||||
{ 64 * 1024, 0x00120000 }, /* SA36 */
|
||||
{ 64 * 1024, 0x00128000 }, /* SA37 */
|
||||
{ 64 * 1024, 0x00130000 }, /* SA38 */
|
||||
{ 64 * 1024, 0x00138000 }, /* SA39 */
|
||||
{ 64 * 1024, 0x00140000 }, /* SA40 */
|
||||
{ 64 * 1024, 0x00148000 }, /* SA41 */
|
||||
{ 64 * 1024, 0x00150000 }, /* SA42 */
|
||||
{ 64 * 1024, 0x00158000 }, /* SA43 */
|
||||
{ 64 * 1024, 0x00160000 }, /* SA44 */
|
||||
{ 64 * 1024, 0x00168000 }, /* SA45 */
|
||||
{ 64 * 1024, 0x00170000 }, /* SA46 */
|
||||
{ 64 * 1024, 0x00178000 }, /* SA47 */
|
||||
{ 64 * 1024, 0x00180000 }, /* SA48 */
|
||||
{ 64 * 1024, 0x00188000 }, /* SA49 */
|
||||
{ 64 * 1024, 0x00190000 }, /* SA50 */
|
||||
{ 64 * 1024, 0x00198000 }, /* SA51 */
|
||||
{ 64 * 1024, 0x001a0000 }, /* SA52 */
|
||||
{ 64 * 1024, 0x001a8000 }, /* SA53 */
|
||||
{ 64 * 1024, 0x001b0000 }, /* SA54 */
|
||||
{ 64 * 1024, 0x001b8000 }, /* SA55 */
|
||||
{ 64 * 1024, 0x001c0000 }, /* SA56 */
|
||||
{ 64 * 1024, 0x001c8000 }, /* SA57 */
|
||||
{ 64 * 1024, 0x001d0000 }, /* SA58 */
|
||||
{ 64 * 1024, 0x001d8000 }, /* SA59 */
|
||||
{ 64 * 1024, 0x001e0000 }, /* SA60 */
|
||||
{ 64 * 1024, 0x001e8000 }, /* SA61 */
|
||||
{ 64 * 1024, 0x001f0000 }, /* SA62 */
|
||||
{ 64 * 1024, 0x001f8000 }, /* SA63 */
|
||||
{ 64 * 1024, 0x00200000 }, /* SA64 */
|
||||
{ 64 * 1024, 0x00208000 }, /* SA65 */
|
||||
{ 64 * 1024, 0x00210000 }, /* SA66 */
|
||||
{ 64 * 1024, 0x00218000 }, /* SA67 */
|
||||
{ 64 * 1024, 0x00220000 }, /* SA68 */
|
||||
{ 64 * 1024, 0x00228000 }, /* SA69 */
|
||||
{ 64 * 1024, 0x00230000 }, /* SA70 */
|
||||
{ 64 * 1024, 0x00238000 }, /* SA71 */
|
||||
{ 64 * 1024, 0x00240000 }, /* SA72 */
|
||||
{ 64 * 1024, 0x00248000 }, /* SA73 */
|
||||
{ 64 * 1024, 0x00250000 }, /* SA74 */
|
||||
{ 64 * 1024, 0x00258000 }, /* SA75 */
|
||||
{ 64 * 1024, 0x00260000 }, /* SA76 */
|
||||
{ 64 * 1024, 0x00268000 }, /* SA77 */
|
||||
{ 64 * 1024, 0x00270000 }, /* SA78 */
|
||||
{ 64 * 1024, 0x00278000 }, /* SA79 */
|
||||
{ 64 * 1024, 0x00280000 }, /* SA80 */
|
||||
{ 64 * 1024, 0x00288000 }, /* SA81 */
|
||||
{ 64 * 1024, 0x00290000 }, /* SA82 */
|
||||
{ 64 * 1024, 0x00298000 }, /* SA83 */
|
||||
{ 64 * 1024, 0x002a0000 }, /* SA84 */
|
||||
{ 64 * 1024, 0x002a8000 }, /* SA85 */
|
||||
{ 64 * 1024, 0x002b0000 }, /* SA86 */
|
||||
{ 64 * 1024, 0x002b8000 }, /* SA87 */
|
||||
{ 64 * 1024, 0x002c0000 }, /* SA88 */
|
||||
{ 64 * 1024, 0x002c8000 }, /* SA89 */
|
||||
{ 64 * 1024, 0x002d0000 }, /* SA90 */
|
||||
{ 64 * 1024, 0x002d8000 }, /* SA91 */
|
||||
{ 64 * 1024, 0x002e0000 }, /* SA92 */
|
||||
{ 64 * 1024, 0x002e8000 }, /* SA93 */
|
||||
{ 64 * 1024, 0x002f0000 }, /* SA94 */
|
||||
{ 64 * 1024, 0x002f8000 }, /* SA95 */
|
||||
{ 64 * 1024, 0x00300000 }, /* SA96 */
|
||||
{ 64 * 1024, 0x00308000 }, /* SA97 */
|
||||
{ 64 * 1024, 0x00310000 }, /* SA98 */
|
||||
{ 64 * 1024, 0x00318000 }, /* SA99 */
|
||||
{ 64 * 1024, 0x00320000 }, /* SA100 */
|
||||
{ 64 * 1024, 0x00328000 }, /* SA101 */
|
||||
{ 64 * 1024, 0x00330000 }, /* SA102 */
|
||||
{ 64 * 1024, 0x00338000 }, /* SA103 */
|
||||
{ 64 * 1024, 0x00340000 }, /* SA104 */
|
||||
{ 64 * 1024, 0x00348000 }, /* SA105 */
|
||||
{ 64 * 1024, 0x00350000 }, /* SA106 */
|
||||
{ 64 * 1024, 0x00358000 }, /* SA107 */
|
||||
{ 64 * 1024, 0x00360000 }, /* SA108 */
|
||||
{ 64 * 1024, 0x00368000 }, /* SA109 */
|
||||
{ 64 * 1024, 0x00370000 }, /* SA110 */
|
||||
{ 64 * 1024, 0x00378000 }, /* SA111 */
|
||||
{ 64 * 1024, 0x00380000 }, /* SA112 */
|
||||
{ 64 * 1024, 0x00388000 }, /* SA113 */
|
||||
{ 64 * 1024, 0x00390000 }, /* SA114 */
|
||||
{ 64 * 1024, 0x00398000 }, /* SA115 */
|
||||
{ 64 * 1024, 0x003a0000 }, /* SA116 */
|
||||
{ 64 * 1024, 0x003a8000 }, /* SA117 */
|
||||
{ 64 * 1024, 0x003b0000 }, /* SA118 */
|
||||
{ 64 * 1024, 0x003b8000 }, /* SA119 */
|
||||
{ 64 * 1024, 0x003c0000 }, /* SA120 */
|
||||
{ 64 * 1024, 0x003c8000 }, /* SA121 */
|
||||
{ 64 * 1024, 0x003d0000 }, /* SA122 */
|
||||
{ 64 * 1024, 0x003d8000 }, /* SA123 */
|
||||
{ 64 * 1024, 0x003e0000 }, /* SA124 */
|
||||
{ 64 * 1024, 0x003e8000 }, /* SA125 */
|
||||
{ 64 * 1024, 0x003f0000 }, /* SA126 */
|
||||
{ 64 * 1024, 0x003f8000 }, /* SA127 */
|
||||
};
|
||||
|
||||
static const int AMD_FLASH_SECTORS = sizeof(sector) / sizeof(struct amd_flash_sector_info);
|
||||
@@ -196,16 +197,16 @@ static AMD_FLASH_CELL *pFlash;
|
||||
|
||||
typedef struct romram
|
||||
{
|
||||
uint32_t flash_address;
|
||||
uint32_t ram_address;
|
||||
char *name;
|
||||
uint32_t flash_address;
|
||||
uint32_t ram_address;
|
||||
char *name;
|
||||
} ROMRAM;
|
||||
|
||||
static const struct romram flash_areas[] =
|
||||
{
|
||||
{ 0xe0600000, 0x00e00000, "EmuTOS" }, /* EmuTOS */
|
||||
{ 0xe0400000, 0x00e00000, "FireTOS" }, /* FireTOS */
|
||||
{ 0xe0700000, 0x00e00000, "FPGA" }, /* FPGA config */
|
||||
{ 0xe0600000, 0x00e00000, "EmuTOS" }, /* EmuTOS */
|
||||
{ 0xe0400000, 0x00e00000, "FireTOS" }, /* FireTOS */
|
||||
{ 0xe0700000, 0x00e00000, "FPGA" }, /* FPGA config */
|
||||
};
|
||||
static const int num_flash_areas = sizeof(flash_areas) / sizeof(struct romram);
|
||||
|
||||
@@ -251,7 +252,7 @@ int amd_flash_erase(void *start, int bytes, void (*putchar)(int))
|
||||
for (i = 0; i < AMD_FLASH_SECTORS; i++)
|
||||
{
|
||||
if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
|
||||
start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
|
||||
start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
@@ -296,7 +297,7 @@ void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
@@ -304,7 +305,7 @@ void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
@@ -411,18 +412,18 @@ int amd_flash_program(void *dest, void *source, int bytes, int erase, void (*fun
|
||||
*/
|
||||
static err_t simulate()
|
||||
{
|
||||
err_t ret = OK;
|
||||
err_t ret = OK;
|
||||
|
||||
return ret;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
{
|
||||
err_t ret = OK;
|
||||
err_t ret = OK;
|
||||
|
||||
/* TODO: do the actual flash */
|
||||
amd_flash_program(dst, src, length, 1, NULL, xputchar);
|
||||
return ret;
|
||||
/* TODO: do the actual flash */
|
||||
amd_flash_program(dst, src, length, 1, NULL, xputchar);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -430,247 +431,247 @@ static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
*/
|
||||
static err_t verify(uint8_t *dst, uint8_t *src, size_t length)
|
||||
{
|
||||
uint8_t *end = src + length;
|
||||
uint8_t *end = src + length;
|
||||
|
||||
do
|
||||
{
|
||||
if (*src++ != *dst++)
|
||||
return FAIL;
|
||||
} while (src < end);
|
||||
do
|
||||
{
|
||||
if (*src++ != *dst++)
|
||||
return FAIL;
|
||||
} while (src < end);
|
||||
|
||||
return OK;
|
||||
return OK;
|
||||
}
|
||||
|
||||
void srec_flash(char *flash_filename)
|
||||
{
|
||||
DRESULT res;
|
||||
FRESULT fres;
|
||||
FATFS fs;
|
||||
FIL file;
|
||||
err_t err;
|
||||
void *start_address;
|
||||
uint32_t length;
|
||||
DRESULT res;
|
||||
FRESULT fres;
|
||||
FATFS fs;
|
||||
FIL file;
|
||||
err_t err;
|
||||
void *start_address;
|
||||
uint32_t length;
|
||||
|
||||
res = disk_status(0);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
if ((fres = f_open(&file, flash_filename, FA_READ) != FR_OK))
|
||||
{
|
||||
xprintf("flasher file %s not present on disk\r\n",
|
||||
flash_filename);
|
||||
}
|
||||
else
|
||||
{
|
||||
f_close(&file);
|
||||
res = disk_status(0);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
if ((fres = f_open(&file, flash_filename, FA_READ) != FR_OK))
|
||||
{
|
||||
xprintf("flasher file %s not present on disk\r\n",
|
||||
flash_filename);
|
||||
}
|
||||
else
|
||||
{
|
||||
f_close(&file);
|
||||
|
||||
/* first pass: parse and check for inconsistencies */
|
||||
xprintf("check file integrity: ");
|
||||
err = read_srecords(flash_filename, &start_address, &length,
|
||||
simulate);
|
||||
if (err == OK)
|
||||
{
|
||||
xprintf("OK.\r\nerase flash area (from %p, length 0x%lx): ",
|
||||
start_address, length);
|
||||
err = amd_flash_erase(start_address, length, xputchar);
|
||||
/* first pass: parse and check for inconsistencies */
|
||||
xprintf("check file integrity: ");
|
||||
err = read_srecords(flash_filename, &start_address, &length,
|
||||
simulate);
|
||||
if (err == OK)
|
||||
{
|
||||
xprintf("OK.\r\nerase flash area (from %p, length 0x%lx): ",
|
||||
start_address, length);
|
||||
err = amd_flash_erase(start_address, length, xputchar);
|
||||
|
||||
/* next pass: copy data to destination */
|
||||
xprintf("OK.\r\flash data: ");
|
||||
err = read_srecords(flash_filename, &start_address, &length, flash);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: verify data */
|
||||
xprintf("OK.\r\nverify data: ");
|
||||
err = read_srecords(flash_filename, &start_address,
|
||||
&length, verify);
|
||||
if (err == OK)
|
||||
{
|
||||
typedef void void_func(void);
|
||||
void_func *func;
|
||||
/* next pass: copy data to destination */
|
||||
xprintf("OK.\r\flash data: ");
|
||||
err = read_srecords(flash_filename, &start_address, &length, flash);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: verify data */
|
||||
xprintf("OK.\r\nverify data: ");
|
||||
err = read_srecords(flash_filename, &start_address,
|
||||
&length, verify);
|
||||
if (err == OK)
|
||||
{
|
||||
typedef void void_func(void);
|
||||
void_func *func;
|
||||
|
||||
xprintf("OK.\r\n");
|
||||
xprintf("OK.\r\n");
|
||||
|
||||
xprintf(
|
||||
"target successfully written and verified. Start address: %p\r\n",
|
||||
start_address);
|
||||
xprintf(
|
||||
"target successfully written and verified. Start address: %p\r\n",
|
||||
start_address);
|
||||
|
||||
func = (void_func *) start_address;
|
||||
(*func)();
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not mount FAT FS\r\n");
|
||||
}
|
||||
f_mount(0, 0L);
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not initialize SD card\r\n");
|
||||
}
|
||||
func = (void_func *) start_address;
|
||||
(*func)();
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not mount FAT FS\r\n");
|
||||
}
|
||||
f_mount(0, 0L);
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not initialize SD card\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
err_t srec_load(char *flash_filename)
|
||||
{
|
||||
FRESULT fres;
|
||||
FIL file;
|
||||
err_t err;
|
||||
void *start_address;
|
||||
uint32_t length;
|
||||
FRESULT fres;
|
||||
FIL file;
|
||||
err_t err;
|
||||
void *start_address;
|
||||
uint32_t length;
|
||||
|
||||
if ((fres = f_open(&file, flash_filename, FA_READ) != FR_OK))
|
||||
{
|
||||
xprintf("flasher file %s not present on disk\r\n", flash_filename);
|
||||
}
|
||||
else
|
||||
{
|
||||
f_close(&file);
|
||||
if ((fres = f_open(&file, flash_filename, FA_READ) != FR_OK))
|
||||
{
|
||||
xprintf("flasher file %s not present on disk\r\n", flash_filename);
|
||||
}
|
||||
else
|
||||
{
|
||||
f_close(&file);
|
||||
|
||||
/* first pass: parse and check for inconsistencies */
|
||||
xprintf("check file integrity: ");
|
||||
err = read_srecords(flash_filename, &start_address, &length, simulate);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: copy data to destination */
|
||||
xprintf("OK.\r\ncopy/flash data: ");
|
||||
err = read_srecords(flash_filename, &start_address, &length, flash);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: verify data */
|
||||
xprintf("OK.\r\nverify data: ");
|
||||
err = read_srecords(flash_filename, &start_address, &length, verify);
|
||||
if (err == OK)
|
||||
{
|
||||
typedef void void_func(void);
|
||||
void_func *func;
|
||||
/* first pass: parse and check for inconsistencies */
|
||||
xprintf("check file integrity: ");
|
||||
err = read_srecords(flash_filename, &start_address, &length, simulate);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: copy data to destination */
|
||||
xprintf("OK (start address = %p).\r\ncopy/flash data: ", start_address);
|
||||
err = read_srecords(flash_filename, &start_address, &length, srec_memcpy);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: verify data */
|
||||
xprintf("OK (start address = %p).\r\nverify data: ", start_address);
|
||||
err = read_srecords(flash_filename, &start_address, &length, verify);
|
||||
if (err == OK)
|
||||
{
|
||||
typedef void void_func(void);
|
||||
void_func *func;
|
||||
|
||||
xprintf("OK.\r\n");
|
||||
xprintf(
|
||||
"target successfully written and verified. Start address: %p\r\n",
|
||||
start_address);
|
||||
xprintf("OK.\r\n");
|
||||
xprintf(
|
||||
"target successfully written and verified. Start address: %p\r\n",
|
||||
start_address);
|
||||
|
||||
func = (void_func *) start_address;
|
||||
(*func)();
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
return OK;
|
||||
func = (void_func *) start_address;
|
||||
(*func)();
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
return OK;
|
||||
}
|
||||
|
||||
void basflash(void)
|
||||
{
|
||||
// const char *basflash_str = "\\BASFLASH";
|
||||
const char *bastest_str = "\\BASTEST";
|
||||
DRESULT res;
|
||||
FRESULT fres;
|
||||
FATFS fs;
|
||||
// const char *basflash_str = "\\BASFLASH";
|
||||
const char *bastest_str = "\\BASTEST";
|
||||
DRESULT res;
|
||||
FRESULT fres;
|
||||
FATFS fs;
|
||||
|
||||
xprintf("\r\nHello from BASFLASH.S19!\r\n\r\n");
|
||||
xprintf("\r\nHello from BASFLASH.S19!\r\n\r\n");
|
||||
|
||||
/*
|
||||
* read \BASTEST\ folder contents (search for .S19-files). If found load them to their final destination
|
||||
* (after BaS has copied them, not their flash location) and return.
|
||||
*
|
||||
* Files located in the BASTEST-folder thus override those in flash. Useful for testing before flashing
|
||||
*/
|
||||
res = disk_status(0);
|
||||
xprintf("disk_status(0) = %d\r\n", res);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
xprintf("f_mount() = %d\r\n", fres);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
DIR directory;
|
||||
/*
|
||||
* read \BASTEST\ folder contents (search for .S19-files). If found load them to their final destination
|
||||
* (after BaS has copied them, not their flash location) and return.
|
||||
*
|
||||
* Files located in the BASTEST-folder thus override those in flash. Useful for testing before flashing
|
||||
*/
|
||||
res = disk_status(0);
|
||||
xprintf("disk_status(0) = %d\r\n", res);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
xprintf("f_mount() = %d\r\n", fres);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
DIR directory;
|
||||
|
||||
fres = f_opendir(&directory, bastest_str);
|
||||
xprintf("f_opendir() = %d\r\n", fres);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
FILINFO fileinfo;
|
||||
fres = f_opendir(&directory, bastest_str);
|
||||
xprintf("f_opendir() = %d\r\n", fres);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
FILINFO fileinfo;
|
||||
|
||||
fres = f_readdir(&directory, &fileinfo);
|
||||
xprintf("f_readdir() = %d\r\n", fres);
|
||||
while (fres == FR_OK)
|
||||
{
|
||||
const char *srec_ext = ".S19";
|
||||
char path[30];
|
||||
fres = f_readdir(&directory, &fileinfo);
|
||||
xprintf("f_readdir() = %d\r\n", fres);
|
||||
while (fres == FR_OK)
|
||||
{
|
||||
const char *srec_ext = ".S19";
|
||||
char path[30];
|
||||
|
||||
if (fileinfo.fname[0] != '\0') /* found a file */
|
||||
{
|
||||
xprintf("check file %s (%s == %s ?)\r\n",
|
||||
fileinfo.fname,
|
||||
&fileinfo.fname[strlen(fileinfo.fname) - 4],
|
||||
srec_ext);
|
||||
if (strlen(fileinfo.fname) >= 4
|
||||
&& strncmp(
|
||||
&fileinfo.fname[strlen(fileinfo.fname)
|
||||
- 4], srec_ext, 4) == 0) /* we have a .S19 file */
|
||||
{
|
||||
/*
|
||||
* build path + filename
|
||||
*/
|
||||
strcpy(path, bastest_str);
|
||||
strcat(path, "\\");
|
||||
strncat(path, fileinfo.fname, 13);
|
||||
if (fileinfo.fname[0] != '\0') /* found a file */
|
||||
{
|
||||
xprintf("check file %s (%s == %s ?)\r\n",
|
||||
fileinfo.fname,
|
||||
&fileinfo.fname[strlen(fileinfo.fname) - 4],
|
||||
srec_ext);
|
||||
if (strlen(fileinfo.fname) >= 4
|
||||
&& strncmp(
|
||||
&fileinfo.fname[strlen(fileinfo.fname)
|
||||
- 4], srec_ext, 4) == 0) /* we have a .S19 file */
|
||||
{
|
||||
/*
|
||||
* build path + filename
|
||||
*/
|
||||
strcpy(path, bastest_str);
|
||||
strcat(path, "\\");
|
||||
strncat(path, fileinfo.fname, 13);
|
||||
|
||||
xprintf("loading file %s\r\n", path);
|
||||
/*
|
||||
* load file
|
||||
*/
|
||||
if (srec_load(path) != OK)
|
||||
{
|
||||
xprintf("failed to load file %s\r\n", path);
|
||||
// error handling
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
break; /* exit if no file found */
|
||||
fres = f_readdir(&directory, &fileinfo);
|
||||
xprintf("f_readdir() = %d\r\n", fres);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("f_opendir %s failed with error code %d\r\n",
|
||||
bastest_str, fres);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not mount FAT FS\r\n");
|
||||
}
|
||||
f_mount(0, 0L); /* unmount SD card */
|
||||
}
|
||||
xprintf("loading file %s\r\n", path);
|
||||
/*
|
||||
* load file
|
||||
*/
|
||||
srec_load(path);
|
||||
// {
|
||||
// xprintf("failed to load file %s\r\n", path);
|
||||
// error handling
|
||||
// }
|
||||
}
|
||||
}
|
||||
else
|
||||
break; /* exit if no file found */
|
||||
fres = f_readdir(&directory, &fileinfo);
|
||||
xprintf("f_readdir() = %d\r\n", fres);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("f_opendir %s failed with error code %d\r\n",
|
||||
bastest_str, fres);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not mount FAT FS\r\n");
|
||||
}
|
||||
f_mount(0, 0L); /* unmount SD card */
|
||||
}
|
||||
}
|
||||
|
||||
@@ -21,22 +21,23 @@
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
static uint32_t ownstack[4096];
|
||||
static uint32_t *stackptr = &ownstack[4095];
|
||||
#define STACKSIZE 16384
|
||||
static uint32_t ownstack[STACKSIZE];
|
||||
static uint32_t *stackptr = &ownstack[STACKSIZE - 1];
|
||||
|
||||
/*
|
||||
* setup our own stack in SDRAM to prevent clashing BaS's in SRAM (size limited).
|
||||
*/
|
||||
void startup(void)
|
||||
{
|
||||
static uint32_t oldstack;
|
||||
static uint32_t oldstack;
|
||||
|
||||
void basflash(void);
|
||||
__asm__ __volatile__("move.l sp,%0\n\t" : "=g"(oldstack) : :);
|
||||
__asm__ __volatile__("move.l %0,sp\n\t" : : "g"(stackptr) : );
|
||||
basflash();
|
||||
__asm__ __volatile__("move.l %0,sp\n\t" : : "g"(oldstack) : "sp");
|
||||
(void) stackptr; /* make compiler happy about unused variables */
|
||||
void basflash(void);
|
||||
__asm__ __volatile__("move.l sp,%0\n\t" : "=g"(oldstack) : :);
|
||||
__asm__ __volatile__("move.l %0,sp\n\t" : : "g"(stackptr) : );
|
||||
basflash();
|
||||
__asm__ __volatile__("move.l %0,sp\n\t" : : "g"(oldstack) : "sp");
|
||||
(void) stackptr; /* make compiler happy about unused variables */
|
||||
}
|
||||
|
||||
291
flash/flash.c
291
flash/flash.c
@@ -1,10 +1,9 @@
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include "bas_types.h"
|
||||
|
||||
#if MACHINE_FIREBEE
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
#include "firebee.h"
|
||||
#elif MACHINE_M5484LITE
|
||||
#elif defined(MACHINE_M5484LITE)
|
||||
#include "m5484l.h"
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
@@ -16,8 +15,8 @@
|
||||
|
||||
struct amd_flash_sector_info
|
||||
{
|
||||
uint32_t size; /* sector size in bytes */
|
||||
uint32_t offset; /* offset from base of device */
|
||||
uint32_t size; /* sector size in bytes */
|
||||
uint32_t offset; /* offset from base of device */
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -25,134 +24,134 @@ struct amd_flash_sector_info
|
||||
*/
|
||||
static struct amd_flash_sector_info sector[] =
|
||||
{
|
||||
{ 8 * 1024, 0x00000000 }, /* SA0 */
|
||||
{ 8 * 1024, 0x00008000 }, /* SA1 */
|
||||
{ 8 * 1024, 0x00010000 }, /* SA2 */
|
||||
{ 8 * 1024, 0x00018000 }, /* SA3 */
|
||||
{ 8 * 1024, 0x00020000 }, /* SA4 */
|
||||
{ 8 * 1024, 0x00028000 }, /* SA5 */
|
||||
{ 8 * 1024, 0x00030000 }, /* SA6 */
|
||||
{ 8 * 1024, 0x00038000 }, /* SA7 */
|
||||
{ 8 * 1024, 0x00040000 }, /* SA8 */
|
||||
{ 64 * 1024, 0x00048000 }, /* SA9 */
|
||||
{ 64 * 1024, 0x00050000 }, /* SA10 */
|
||||
{ 64 * 1024, 0x00058000 }, /* SA11 */
|
||||
{ 64 * 1024, 0x00060000 }, /* SA12 */
|
||||
{ 64 * 1024, 0x00068000 }, /* SA13 */
|
||||
{ 64 * 1024, 0x00070000 }, /* SA14 */
|
||||
{ 64 * 1024, 0x00078000 }, /* SA15 */
|
||||
{ 64 * 1024, 0x00080000 }, /* SA16 */
|
||||
{ 64 * 1024, 0x00088000 }, /* SA17 */
|
||||
{ 64 * 1024, 0x00090000 }, /* SA18 */
|
||||
{ 64 * 1024, 0x00098000 }, /* SA19 */
|
||||
{ 64 * 1024, 0x000a0000 }, /* SA20 */
|
||||
{ 64 * 1024, 0x000a8000 }, /* SA21 */
|
||||
{ 64 * 1024, 0x000b0000 }, /* SA22 */
|
||||
{ 64 * 1024, 0x000b8000 }, /* SA23 */
|
||||
{ 64 * 1024, 0x000c0000 }, /* SA24 */
|
||||
{ 64 * 1024, 0x000c8000 }, /* SA25 */
|
||||
{ 64 * 1024, 0x000d0000 }, /* SA26 */
|
||||
{ 64 * 1024, 0x000d8000 }, /* SA27 */
|
||||
{ 64 * 1024, 0x000e0000 }, /* SA28 */
|
||||
{ 64 * 1024, 0x000e8000 }, /* SA29 */
|
||||
{ 64 * 1024, 0x000f0000 }, /* SA30 */
|
||||
{ 64 * 1024, 0x000f8000 }, /* SA31 */
|
||||
{ 64 * 1024, 0x00100000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00108000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00110000 }, /* SA34 */
|
||||
{ 64 * 1024, 0x00118000 }, /* SA35 */
|
||||
{ 64 * 1024, 0x00120000 }, /* SA36 */
|
||||
{ 64 * 1024, 0x00128000 }, /* SA37 */
|
||||
{ 64 * 1024, 0x00130000 }, /* SA38 */
|
||||
{ 64 * 1024, 0x00138000 }, /* SA39 */
|
||||
{ 64 * 1024, 0x00140000 }, /* SA40 */
|
||||
{ 64 * 1024, 0x00148000 }, /* SA41 */
|
||||
{ 64 * 1024, 0x00150000 }, /* SA42 */
|
||||
{ 64 * 1024, 0x00158000 }, /* SA43 */
|
||||
{ 64 * 1024, 0x00160000 }, /* SA44 */
|
||||
{ 64 * 1024, 0x00168000 }, /* SA45 */
|
||||
{ 64 * 1024, 0x00170000 }, /* SA46 */
|
||||
{ 64 * 1024, 0x00178000 }, /* SA47 */
|
||||
{ 64 * 1024, 0x00180000 }, /* SA48 */
|
||||
{ 64 * 1024, 0x00188000 }, /* SA49 */
|
||||
{ 64 * 1024, 0x00190000 }, /* SA50 */
|
||||
{ 64 * 1024, 0x00198000 }, /* SA51 */
|
||||
{ 64 * 1024, 0x001a0000 }, /* SA52 */
|
||||
{ 64 * 1024, 0x001a8000 }, /* SA53 */
|
||||
{ 64 * 1024, 0x001b0000 }, /* SA54 */
|
||||
{ 64 * 1024, 0x001b8000 }, /* SA55 */
|
||||
{ 64 * 1024, 0x001c0000 }, /* SA56 */
|
||||
{ 64 * 1024, 0x001c8000 }, /* SA57 */
|
||||
{ 64 * 1024, 0x001d0000 }, /* SA58 */
|
||||
{ 64 * 1024, 0x001d8000 }, /* SA59 */
|
||||
{ 64 * 1024, 0x001e0000 }, /* SA60 */
|
||||
{ 64 * 1024, 0x001e8000 }, /* SA61 */
|
||||
{ 64 * 1024, 0x001f0000 }, /* SA62 */
|
||||
{ 64 * 1024, 0x001f8000 }, /* SA63 */
|
||||
{ 64 * 1024, 0x00200000 }, /* SA64 */
|
||||
{ 64 * 1024, 0x00208000 }, /* SA65 */
|
||||
{ 64 * 1024, 0x00210000 }, /* SA66 */
|
||||
{ 64 * 1024, 0x00218000 }, /* SA67 */
|
||||
{ 64 * 1024, 0x00220000 }, /* SA68 */
|
||||
{ 64 * 1024, 0x00228000 }, /* SA69 */
|
||||
{ 64 * 1024, 0x00230000 }, /* SA70 */
|
||||
{ 64 * 1024, 0x00238000 }, /* SA71 */
|
||||
{ 64 * 1024, 0x00240000 }, /* SA72 */
|
||||
{ 64 * 1024, 0x00248000 }, /* SA73 */
|
||||
{ 64 * 1024, 0x00250000 }, /* SA74 */
|
||||
{ 64 * 1024, 0x00258000 }, /* SA75 */
|
||||
{ 64 * 1024, 0x00260000 }, /* SA76 */
|
||||
{ 64 * 1024, 0x00268000 }, /* SA77 */
|
||||
{ 64 * 1024, 0x00270000 }, /* SA78 */
|
||||
{ 64 * 1024, 0x00278000 }, /* SA79 */
|
||||
{ 64 * 1024, 0x00280000 }, /* SA80 */
|
||||
{ 64 * 1024, 0x00288000 }, /* SA81 */
|
||||
{ 64 * 1024, 0x00290000 }, /* SA82 */
|
||||
{ 64 * 1024, 0x00298000 }, /* SA83 */
|
||||
{ 64 * 1024, 0x002a0000 }, /* SA84 */
|
||||
{ 64 * 1024, 0x002a8000 }, /* SA85 */
|
||||
{ 64 * 1024, 0x002b0000 }, /* SA86 */
|
||||
{ 64 * 1024, 0x002b8000 }, /* SA87 */
|
||||
{ 64 * 1024, 0x002c0000 }, /* SA88 */
|
||||
{ 64 * 1024, 0x002c8000 }, /* SA89 */
|
||||
{ 64 * 1024, 0x002d0000 }, /* SA90 */
|
||||
{ 64 * 1024, 0x002d8000 }, /* SA91 */
|
||||
{ 64 * 1024, 0x002e0000 }, /* SA92 */
|
||||
{ 64 * 1024, 0x002e8000 }, /* SA93 */
|
||||
{ 64 * 1024, 0x002f0000 }, /* SA94 */
|
||||
{ 64 * 1024, 0x002f8000 }, /* SA95 */
|
||||
{ 64 * 1024, 0x00300000 }, /* SA96 */
|
||||
{ 64 * 1024, 0x00308000 }, /* SA97 */
|
||||
{ 64 * 1024, 0x00310000 }, /* SA98 */
|
||||
{ 64 * 1024, 0x00318000 }, /* SA99 */
|
||||
{ 64 * 1024, 0x00320000 }, /* SA100 */
|
||||
{ 64 * 1024, 0x00328000 }, /* SA101 */
|
||||
{ 64 * 1024, 0x00330000 }, /* SA102 */
|
||||
{ 64 * 1024, 0x00338000 }, /* SA103 */
|
||||
{ 64 * 1024, 0x00340000 }, /* SA104 */
|
||||
{ 64 * 1024, 0x00348000 }, /* SA105 */
|
||||
{ 64 * 1024, 0x00350000 }, /* SA106 */
|
||||
{ 64 * 1024, 0x00358000 }, /* SA107 */
|
||||
{ 64 * 1024, 0x00360000 }, /* SA108 */
|
||||
{ 64 * 1024, 0x00368000 }, /* SA109 */
|
||||
{ 64 * 1024, 0x00370000 }, /* SA110 */
|
||||
{ 64 * 1024, 0x00378000 }, /* SA111 */
|
||||
{ 64 * 1024, 0x00380000 }, /* SA112 */
|
||||
{ 64 * 1024, 0x00388000 }, /* SA113 */
|
||||
{ 64 * 1024, 0x00390000 }, /* SA114 */
|
||||
{ 64 * 1024, 0x00398000 }, /* SA115 */
|
||||
{ 64 * 1024, 0x003a0000 }, /* SA116 */
|
||||
{ 64 * 1024, 0x003a8000 }, /* SA117 */
|
||||
{ 64 * 1024, 0x003b0000 }, /* SA118 */
|
||||
{ 64 * 1024, 0x003b8000 }, /* SA119 */
|
||||
{ 64 * 1024, 0x003c0000 }, /* SA120 */
|
||||
{ 64 * 1024, 0x003c8000 }, /* SA121 */
|
||||
{ 64 * 1024, 0x003d0000 }, /* SA122 */
|
||||
{ 64 * 1024, 0x003d8000 }, /* SA123 */
|
||||
{ 64 * 1024, 0x003e0000 }, /* SA124 */
|
||||
{ 64 * 1024, 0x003e8000 }, /* SA125 */
|
||||
{ 64 * 1024, 0x003f0000 }, /* SA126 */
|
||||
{ 64 * 1024, 0x003f8000 }, /* SA127 */
|
||||
{ 8 * 1024, 0x00000000 }, /* SA0 */
|
||||
{ 8 * 1024, 0x00008000 }, /* SA1 */
|
||||
{ 8 * 1024, 0x00010000 }, /* SA2 */
|
||||
{ 8 * 1024, 0x00018000 }, /* SA3 */
|
||||
{ 8 * 1024, 0x00020000 }, /* SA4 */
|
||||
{ 8 * 1024, 0x00028000 }, /* SA5 */
|
||||
{ 8 * 1024, 0x00030000 }, /* SA6 */
|
||||
{ 8 * 1024, 0x00038000 }, /* SA7 */
|
||||
{ 8 * 1024, 0x00040000 }, /* SA8 */
|
||||
{ 64 * 1024, 0x00048000 }, /* SA9 */
|
||||
{ 64 * 1024, 0x00050000 }, /* SA10 */
|
||||
{ 64 * 1024, 0x00058000 }, /* SA11 */
|
||||
{ 64 * 1024, 0x00060000 }, /* SA12 */
|
||||
{ 64 * 1024, 0x00068000 }, /* SA13 */
|
||||
{ 64 * 1024, 0x00070000 }, /* SA14 */
|
||||
{ 64 * 1024, 0x00078000 }, /* SA15 */
|
||||
{ 64 * 1024, 0x00080000 }, /* SA16 */
|
||||
{ 64 * 1024, 0x00088000 }, /* SA17 */
|
||||
{ 64 * 1024, 0x00090000 }, /* SA18 */
|
||||
{ 64 * 1024, 0x00098000 }, /* SA19 */
|
||||
{ 64 * 1024, 0x000a0000 }, /* SA20 */
|
||||
{ 64 * 1024, 0x000a8000 }, /* SA21 */
|
||||
{ 64 * 1024, 0x000b0000 }, /* SA22 */
|
||||
{ 64 * 1024, 0x000b8000 }, /* SA23 */
|
||||
{ 64 * 1024, 0x000c0000 }, /* SA24 */
|
||||
{ 64 * 1024, 0x000c8000 }, /* SA25 */
|
||||
{ 64 * 1024, 0x000d0000 }, /* SA26 */
|
||||
{ 64 * 1024, 0x000d8000 }, /* SA27 */
|
||||
{ 64 * 1024, 0x000e0000 }, /* SA28 */
|
||||
{ 64 * 1024, 0x000e8000 }, /* SA29 */
|
||||
{ 64 * 1024, 0x000f0000 }, /* SA30 */
|
||||
{ 64 * 1024, 0x000f8000 }, /* SA31 */
|
||||
{ 64 * 1024, 0x00100000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00108000 }, /* SA32 */
|
||||
{ 64 * 1024, 0x00110000 }, /* SA34 */
|
||||
{ 64 * 1024, 0x00118000 }, /* SA35 */
|
||||
{ 64 * 1024, 0x00120000 }, /* SA36 */
|
||||
{ 64 * 1024, 0x00128000 }, /* SA37 */
|
||||
{ 64 * 1024, 0x00130000 }, /* SA38 */
|
||||
{ 64 * 1024, 0x00138000 }, /* SA39 */
|
||||
{ 64 * 1024, 0x00140000 }, /* SA40 */
|
||||
{ 64 * 1024, 0x00148000 }, /* SA41 */
|
||||
{ 64 * 1024, 0x00150000 }, /* SA42 */
|
||||
{ 64 * 1024, 0x00158000 }, /* SA43 */
|
||||
{ 64 * 1024, 0x00160000 }, /* SA44 */
|
||||
{ 64 * 1024, 0x00168000 }, /* SA45 */
|
||||
{ 64 * 1024, 0x00170000 }, /* SA46 */
|
||||
{ 64 * 1024, 0x00178000 }, /* SA47 */
|
||||
{ 64 * 1024, 0x00180000 }, /* SA48 */
|
||||
{ 64 * 1024, 0x00188000 }, /* SA49 */
|
||||
{ 64 * 1024, 0x00190000 }, /* SA50 */
|
||||
{ 64 * 1024, 0x00198000 }, /* SA51 */
|
||||
{ 64 * 1024, 0x001a0000 }, /* SA52 */
|
||||
{ 64 * 1024, 0x001a8000 }, /* SA53 */
|
||||
{ 64 * 1024, 0x001b0000 }, /* SA54 */
|
||||
{ 64 * 1024, 0x001b8000 }, /* SA55 */
|
||||
{ 64 * 1024, 0x001c0000 }, /* SA56 */
|
||||
{ 64 * 1024, 0x001c8000 }, /* SA57 */
|
||||
{ 64 * 1024, 0x001d0000 }, /* SA58 */
|
||||
{ 64 * 1024, 0x001d8000 }, /* SA59 */
|
||||
{ 64 * 1024, 0x001e0000 }, /* SA60 */
|
||||
{ 64 * 1024, 0x001e8000 }, /* SA61 */
|
||||
{ 64 * 1024, 0x001f0000 }, /* SA62 */
|
||||
{ 64 * 1024, 0x001f8000 }, /* SA63 */
|
||||
{ 64 * 1024, 0x00200000 }, /* SA64 */
|
||||
{ 64 * 1024, 0x00208000 }, /* SA65 */
|
||||
{ 64 * 1024, 0x00210000 }, /* SA66 */
|
||||
{ 64 * 1024, 0x00218000 }, /* SA67 */
|
||||
{ 64 * 1024, 0x00220000 }, /* SA68 */
|
||||
{ 64 * 1024, 0x00228000 }, /* SA69 */
|
||||
{ 64 * 1024, 0x00230000 }, /* SA70 */
|
||||
{ 64 * 1024, 0x00238000 }, /* SA71 */
|
||||
{ 64 * 1024, 0x00240000 }, /* SA72 */
|
||||
{ 64 * 1024, 0x00248000 }, /* SA73 */
|
||||
{ 64 * 1024, 0x00250000 }, /* SA74 */
|
||||
{ 64 * 1024, 0x00258000 }, /* SA75 */
|
||||
{ 64 * 1024, 0x00260000 }, /* SA76 */
|
||||
{ 64 * 1024, 0x00268000 }, /* SA77 */
|
||||
{ 64 * 1024, 0x00270000 }, /* SA78 */
|
||||
{ 64 * 1024, 0x00278000 }, /* SA79 */
|
||||
{ 64 * 1024, 0x00280000 }, /* SA80 */
|
||||
{ 64 * 1024, 0x00288000 }, /* SA81 */
|
||||
{ 64 * 1024, 0x00290000 }, /* SA82 */
|
||||
{ 64 * 1024, 0x00298000 }, /* SA83 */
|
||||
{ 64 * 1024, 0x002a0000 }, /* SA84 */
|
||||
{ 64 * 1024, 0x002a8000 }, /* SA85 */
|
||||
{ 64 * 1024, 0x002b0000 }, /* SA86 */
|
||||
{ 64 * 1024, 0x002b8000 }, /* SA87 */
|
||||
{ 64 * 1024, 0x002c0000 }, /* SA88 */
|
||||
{ 64 * 1024, 0x002c8000 }, /* SA89 */
|
||||
{ 64 * 1024, 0x002d0000 }, /* SA90 */
|
||||
{ 64 * 1024, 0x002d8000 }, /* SA91 */
|
||||
{ 64 * 1024, 0x002e0000 }, /* SA92 */
|
||||
{ 64 * 1024, 0x002e8000 }, /* SA93 */
|
||||
{ 64 * 1024, 0x002f0000 }, /* SA94 */
|
||||
{ 64 * 1024, 0x002f8000 }, /* SA95 */
|
||||
{ 64 * 1024, 0x00300000 }, /* SA96 */
|
||||
{ 64 * 1024, 0x00308000 }, /* SA97 */
|
||||
{ 64 * 1024, 0x00310000 }, /* SA98 */
|
||||
{ 64 * 1024, 0x00318000 }, /* SA99 */
|
||||
{ 64 * 1024, 0x00320000 }, /* SA100 */
|
||||
{ 64 * 1024, 0x00328000 }, /* SA101 */
|
||||
{ 64 * 1024, 0x00330000 }, /* SA102 */
|
||||
{ 64 * 1024, 0x00338000 }, /* SA103 */
|
||||
{ 64 * 1024, 0x00340000 }, /* SA104 */
|
||||
{ 64 * 1024, 0x00348000 }, /* SA105 */
|
||||
{ 64 * 1024, 0x00350000 }, /* SA106 */
|
||||
{ 64 * 1024, 0x00358000 }, /* SA107 */
|
||||
{ 64 * 1024, 0x00360000 }, /* SA108 */
|
||||
{ 64 * 1024, 0x00368000 }, /* SA109 */
|
||||
{ 64 * 1024, 0x00370000 }, /* SA110 */
|
||||
{ 64 * 1024, 0x00378000 }, /* SA111 */
|
||||
{ 64 * 1024, 0x00380000 }, /* SA112 */
|
||||
{ 64 * 1024, 0x00388000 }, /* SA113 */
|
||||
{ 64 * 1024, 0x00390000 }, /* SA114 */
|
||||
{ 64 * 1024, 0x00398000 }, /* SA115 */
|
||||
{ 64 * 1024, 0x003a0000 }, /* SA116 */
|
||||
{ 64 * 1024, 0x003a8000 }, /* SA117 */
|
||||
{ 64 * 1024, 0x003b0000 }, /* SA118 */
|
||||
{ 64 * 1024, 0x003b8000 }, /* SA119 */
|
||||
{ 64 * 1024, 0x003c0000 }, /* SA120 */
|
||||
{ 64 * 1024, 0x003c8000 }, /* SA121 */
|
||||
{ 64 * 1024, 0x003d0000 }, /* SA122 */
|
||||
{ 64 * 1024, 0x003d8000 }, /* SA123 */
|
||||
{ 64 * 1024, 0x003e0000 }, /* SA124 */
|
||||
{ 64 * 1024, 0x003e8000 }, /* SA125 */
|
||||
{ 64 * 1024, 0x003f0000 }, /* SA126 */
|
||||
{ 64 * 1024, 0x003f8000 }, /* SA127 */
|
||||
};
|
||||
|
||||
static const int AMD_FLASH_SECTORS = sizeof(sector) / sizeof(struct amd_flash_sector_info);
|
||||
@@ -167,17 +166,17 @@ static AMD_FLASH_CELL *pFlash;
|
||||
|
||||
typedef struct romram
|
||||
{
|
||||
uint32_t flash_address;
|
||||
uint32_t ram_address;
|
||||
char *name;
|
||||
uint32_t flash_address;
|
||||
uint32_t ram_address;
|
||||
char *name;
|
||||
} ROMRAM;
|
||||
|
||||
static const struct romram flash_areas[] =
|
||||
{
|
||||
{ 0xe0000000, 0x00e00000, "BaS" }, /* BaS */
|
||||
{ 0xe0600000, 0x00e00000, "EmuTOS" }, /* EmuTOS */
|
||||
{ 0xe0400000, 0x00e00000, "FireTOS" }, /* FireTOS */
|
||||
{ 0xe0700000, 0x00e00000, "FPGA" }, /* FPGA config */
|
||||
{ 0xe0000000, 0x00e00000, "BaS" }, /* BaS */
|
||||
{ 0xe0600000, 0x00e00000, "EmuTOS" }, /* EmuTOS */
|
||||
{ 0xe0400000, 0x00e00000, "FireTOS" }, /* FireTOS */
|
||||
{ 0xe0700000, 0x00e00000, "FPGA" }, /* FPGA config */
|
||||
};
|
||||
static const int num_flash_areas = sizeof(flash_areas) / sizeof(struct romram);
|
||||
|
||||
@@ -194,6 +193,8 @@ void amd_flash_sector_erase(int n)
|
||||
{
|
||||
volatile AMD_FLASH_CELL status;
|
||||
|
||||
(void) num_flash_areas; /* to make compiler happy */
|
||||
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA);
|
||||
pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55);
|
||||
pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80);
|
||||
@@ -223,7 +224,7 @@ int amd_flash_erase(void *start, int bytes, void (*putchar)(int))
|
||||
for (i = 0; i < AMD_FLASH_SECTORS; i++)
|
||||
{
|
||||
if (start >= (void *)((void *) pFlash + SOFFSET(i)) &&
|
||||
start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
|
||||
start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
@@ -268,7 +269,7 @@ void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
@@ -276,7 +277,7 @@ void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
|
||||
{
|
||||
status = *dst;
|
||||
if ((status & AMD_FLASH_CMD_DATA(0x80)) ==
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
(data & AMD_FLASH_CMD_DATA(0x80)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
@@ -292,9 +293,9 @@ void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data)
|
||||
int amd_flash_program(void *dest, void *source, int bytes, int erase, void (*func)(void), void (*putchar)(int))
|
||||
{
|
||||
AMD_FLASH_CELL *src;
|
||||
AMD_FLASH_CELL *dst;
|
||||
AMD_FLASH_CELL *dst;
|
||||
int hashi = 1;
|
||||
int hashj = 0;
|
||||
int hashj = 0;
|
||||
char hash[5];
|
||||
|
||||
hash[0] = 8; /* Backspace */
|
||||
|
||||
@@ -23,8 +23,7 @@
|
||||
* Copyright 2012 M. Froeschle
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
#include "bas_printf.h"
|
||||
#include "bas_string.h"
|
||||
@@ -32,8 +31,12 @@
|
||||
#include "diskio.h"
|
||||
#include "ff.h"
|
||||
#include "s19reader.h"
|
||||
#include "dma.h"
|
||||
#include "cache.h"
|
||||
|
||||
// #define DEBUG
|
||||
#include "debug.h"
|
||||
|
||||
/*
|
||||
* Yes, I know. The following doesn't really look like code should look like...
|
||||
*
|
||||
@@ -41,33 +44,33 @@
|
||||
* and finally ended up with this. Not nice, put paid (and working).
|
||||
*
|
||||
*/
|
||||
#define SREC_TYPE(a) (a)[0] /* type of record */
|
||||
#define SREC_COUNT(a) (a)[1] /* length of valid bytes to follow */
|
||||
#define SREC_ADDR16(a) (256 * (a)[2] + (a)[3]) /* 2 byte address field */
|
||||
#define SREC_ADDR24(a) (0x10000 * (a)[2] + 0x100 * \
|
||||
(a)[3] + (a)[4]) /* 3 byte address field */
|
||||
#define SREC_TYPE(a) (a)[0] /* type of record */
|
||||
#define SREC_COUNT(a) (a)[1] /* length of valid bytes to follow */
|
||||
#define SREC_ADDR16(a) (256 * (a)[2] + (a)[3]) /* 2 byte address field */
|
||||
#define SREC_ADDR24(a) (0x10000 * (a)[2] + 0x100 * \
|
||||
(a)[3] + (a)[4]) /* 3 byte address field */
|
||||
#define SREC_ADDR32(a) (0x1000000 * a[2] + 0x10000 * \
|
||||
a[3] + 0x100 * (a)[4] + (a)[5]) /* 4 byte address field */
|
||||
#define SREC_DATA16(a) ((uint8_t *)&((a)[4])) /* address of first byte of data in a record */
|
||||
#define SREC_DATA24(a) ((uint8_t *)&((a)[5])) /* address of first data byte in 24 bit record */
|
||||
#define SREC_DATA32(a) ((uint8_t *)&((a)[6])) /* adress of first byte of a record with 32 bit address field */
|
||||
#define SREC_DATA16_SIZE(a) (SREC_COUNT((a)) - 3) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA24_SIZE(a) (SREC_COUNT((a)) - 4) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA32_SIZE(a) (SREC_COUNT((a)) - 5) /* length of the data[] array without the checksum field */
|
||||
#define SREC_CHECKSUM(a) (a)[SREC_COUNT(a) + 2 - 1] /* record's checksum (two's complement of the sum of all bytes) */
|
||||
(a)[3] + 0x100 * (a)[4] + (a)[5]) /* 4 byte address field */
|
||||
#define SREC_DATA16(a) ((uint8_t *)&((a)[4])) /* address of first byte of data in a record */
|
||||
#define SREC_DATA24(a) ((uint8_t *)&((a)[5])) /* address of first data byte in 24 bit record */
|
||||
#define SREC_DATA32(a) ((uint8_t *)&((a)[6])) /* adress of first byte of a record with 32 bit address field */
|
||||
#define SREC_DATA16_SIZE(a) (SREC_COUNT((a)) - 3) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA24_SIZE(a) (SREC_COUNT((a)) - 4) /* length of the data[] array without the checksum field */
|
||||
#define SREC_DATA32_SIZE(a) (SREC_COUNT((a)) - 5) /* length of the data[] array without the checksum field */
|
||||
#define SREC_CHECKSUM(a) (a)[SREC_COUNT(a) + 2 - 1] /* record's checksum (two's complement of the sum of all bytes) */
|
||||
|
||||
/*
|
||||
* convert a single hex character into byte
|
||||
*/
|
||||
static uint8_t nibble_to_byte(uint8_t nibble)
|
||||
{
|
||||
if ((nibble >= '0') && (nibble <= '9'))
|
||||
return nibble - '0';
|
||||
else if ((nibble >= 'A' && nibble <= 'F'))
|
||||
return 10 + nibble - 'A';
|
||||
else if ((nibble >= 'a' && nibble <= 'f'))
|
||||
return 10 + nibble - 'a';
|
||||
return 0;
|
||||
if ((nibble >= '0') && (nibble <= '9'))
|
||||
return nibble - '0';
|
||||
else if ((nibble >= 'A' && nibble <= 'F'))
|
||||
return 10 + nibble - 'A';
|
||||
else if ((nibble >= 'a' && nibble <= 'f'))
|
||||
return 10 + nibble - 'a';
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -75,7 +78,7 @@ static uint8_t nibble_to_byte(uint8_t nibble)
|
||||
*/
|
||||
static uint8_t hex_to_byte(uint8_t hex[2])
|
||||
{
|
||||
return 16 * (nibble_to_byte(hex[0])) + (nibble_to_byte(hex[1]));
|
||||
return 16 * (nibble_to_byte(hex[0])) + (nibble_to_byte(hex[1]));
|
||||
}
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
@@ -84,7 +87,7 @@ static uint8_t hex_to_byte(uint8_t hex[2])
|
||||
*/
|
||||
static uint16_t hex_to_word(uint8_t hex[4])
|
||||
{
|
||||
return 256 * hex_to_byte(&hex[0]) + hex_to_byte(&hex[2]);
|
||||
return 256 * hex_to_byte(&hex[0]) + hex_to_byte(&hex[2]);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -92,7 +95,7 @@ static uint16_t hex_to_word(uint8_t hex[4])
|
||||
*/
|
||||
static uint32_t hex_to_long(uint8_t hex[8])
|
||||
{
|
||||
return 65536 * hex_to_word(&hex[0]) + hex_to_word(&hex[4]);
|
||||
return 65536 * hex_to_word(&hex[0]) + hex_to_word(&hex[4]);
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
@@ -103,47 +106,47 @@ static uint32_t hex_to_long(uint8_t hex[8])
|
||||
*/
|
||||
static uint8_t checksum(uint8_t arr[])
|
||||
{
|
||||
int i;
|
||||
uint8_t checksum = SREC_COUNT(arr);
|
||||
int i;
|
||||
uint8_t cs = SREC_COUNT(arr);
|
||||
|
||||
for (i = 0; i < SREC_COUNT(arr) - 1; i++)
|
||||
{
|
||||
checksum += arr[i + 2];
|
||||
}
|
||||
return ~checksum;
|
||||
for (i = 0; i < SREC_COUNT(arr) - 1; i++)
|
||||
{
|
||||
cs += arr[i + 2];
|
||||
}
|
||||
return ~cs;
|
||||
}
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
void print_record(uint8_t *arr)
|
||||
{
|
||||
switch (SREC_TYPE(arr))
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR16(arr));
|
||||
xprintf("module %11.11s ", SREC_DATA16(arr));
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
switch (SREC_TYPE(arr))
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR16(arr));
|
||||
xprintf("module %11.11s ", SREC_DATA16(arr));
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
|
||||
case 3:
|
||||
case 7:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR32(arr));
|
||||
xprintf("data %02x,%02x,%02x,%02x,... ",
|
||||
SREC_DATA32(arr)[0], SREC_DATA32(arr)[1], SREC_DATA32(arr)[3], SREC_DATA32(arr)[4]);
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
case 3:
|
||||
case 7:
|
||||
{
|
||||
xprintf("type 0x%x ", SREC_TYPE(arr));
|
||||
xprintf("count 0x%x ", SREC_COUNT(arr));
|
||||
xprintf("addr 0x%x ", SREC_ADDR32(arr));
|
||||
xprintf("data %02x,%02x,%02x,%02x,... ",
|
||||
SREC_DATA32(arr)[0], SREC_DATA32(arr)[1], SREC_DATA32(arr)[3], SREC_DATA32(arr)[4]);
|
||||
xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr));
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
xprintf("unsupported report type %d in print_record\r\n", arr[0]);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
xprintf("unsupported report type %d in print_record\r\n", arr[0]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
@@ -152,21 +155,21 @@ void print_record(uint8_t *arr)
|
||||
*/
|
||||
static void line_to_vector(uint8_t *buff, uint8_t *vector)
|
||||
{
|
||||
int i;
|
||||
int length;
|
||||
uint8_t *vp = vector;
|
||||
int i;
|
||||
int length;
|
||||
uint8_t *vp = vector;
|
||||
|
||||
length = hex_to_byte(buff + 2);
|
||||
length = hex_to_byte(buff + 2);
|
||||
|
||||
buff++;
|
||||
*vp++ = nibble_to_byte(*buff); /* record type. Only one single nibble */
|
||||
buff++;
|
||||
buff++;
|
||||
*vp++ = nibble_to_byte(*buff); /* record type. Only one single nibble */
|
||||
buff++;
|
||||
|
||||
for (i = 0; i <= length; i++)
|
||||
{
|
||||
*vp++ = hex_to_byte(buff);
|
||||
buff += 2;
|
||||
}
|
||||
for (i = 0; i <= length; i++)
|
||||
{
|
||||
*vp++ = hex_to_byte(buff);
|
||||
buff += 2;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -190,114 +193,122 @@ static void line_to_vector(uint8_t *buff, uint8_t *vector)
|
||||
*/
|
||||
err_t read_srecords(char *filename, void **start_address, uint32_t *actual_length, memcpy_callback_t callback)
|
||||
{
|
||||
FRESULT fres;
|
||||
FIL file;
|
||||
err_t ret = OK;
|
||||
FRESULT fres;
|
||||
FIL file;
|
||||
err_t ret = OK;
|
||||
uint32_t length = 0;
|
||||
|
||||
if ((fres = f_open(&file, filename, FA_READ) == FR_OK))
|
||||
{
|
||||
uint8_t line[80];
|
||||
int lineno = 0;
|
||||
int data_records = 0;
|
||||
bool found_block_header = false;
|
||||
bool found_block_end = false;
|
||||
bool found_block_data = false;
|
||||
if ((fres = f_open(&file, filename, FA_READ) == FR_OK))
|
||||
{
|
||||
uint8_t line[255];
|
||||
int lineno = 0;
|
||||
int data_records = 0;
|
||||
bool found_block_header = false;
|
||||
bool found_block_end = false;
|
||||
bool found_block_data = false;
|
||||
|
||||
while (ret == OK && (uint8_t *) f_gets((char *) line, sizeof(line), &file) != NULL)
|
||||
{
|
||||
lineno++;
|
||||
uint8_t vector[80];
|
||||
*actual_length = 0;
|
||||
|
||||
line_to_vector(line, vector); /* vector now contains the decoded contents of line, from line[1] on */
|
||||
while (ret == OK && (uint8_t *) f_gets((char *) line, sizeof(line), &file) != NULL)
|
||||
{
|
||||
lineno++;
|
||||
uint8_t vector[80];
|
||||
|
||||
if (line[0] == 'S')
|
||||
{
|
||||
if (SREC_CHECKSUM(vector) != checksum(vector))
|
||||
{
|
||||
xprintf("invalid checksum 0x%x (should be 0x%x) in line %d\r\n",
|
||||
SREC_CHECKSUM(vector), checksum(vector), lineno);
|
||||
ret = FAIL;
|
||||
}
|
||||
memset(vector, 0, sizeof(vector));
|
||||
line_to_vector(line, vector); /* vector now contains the decoded contents of line, from line[1] on */
|
||||
|
||||
switch (vector[0])
|
||||
{
|
||||
case 0: /* block header */
|
||||
found_block_header = true;
|
||||
if (found_block_data || found_block_end)
|
||||
{
|
||||
xprintf("S7 or S3 record found before S0: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
if (line[0] == 'S')
|
||||
{
|
||||
if (SREC_CHECKSUM(vector) != checksum(vector))
|
||||
{
|
||||
xprintf("invalid checksum 0x%x (should be 0x%x) in line %d\r\n",
|
||||
SREC_CHECKSUM(vector), checksum(vector), lineno);
|
||||
ret = FAIL;
|
||||
}
|
||||
|
||||
break;
|
||||
switch (vector[0])
|
||||
{
|
||||
case 0: /* block header */
|
||||
found_block_header = true;
|
||||
if (found_block_data || found_block_end)
|
||||
{
|
||||
xprintf("S7 or S3 record found before S0: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
|
||||
case 2: /* three byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
ret = callback((uint8_t *) SREC_ADDR24(vector), SREC_DATA24(vector), SREC_DATA24_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
break;
|
||||
|
||||
case 3: /* four byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
ret = callback((uint8_t *) SREC_ADDR32(vector), SREC_DATA32(vector), SREC_DATA32_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
case 2: /* three byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S2 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
ret = callback((uint8_t *) SREC_ADDR24(vector), SREC_DATA24(vector), SREC_DATA24_SIZE(vector));
|
||||
length += SREC_DATA24_SIZE(vector);
|
||||
data_records++;
|
||||
break;
|
||||
|
||||
case 7: /* four byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S7 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR32(vector);
|
||||
}
|
||||
break;
|
||||
case 3: /* four byte address field data record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
ret = FAIL;
|
||||
}
|
||||
length += SREC_DATA32_SIZE(vector);
|
||||
ret = callback((uint8_t *) SREC_ADDR32(vector), SREC_DATA32(vector), SREC_DATA32_SIZE(vector));
|
||||
data_records++;
|
||||
break;
|
||||
|
||||
case 8: /* three byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S8 record found before S0 or after S8: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR24(vector);
|
||||
}
|
||||
break;
|
||||
case 7: /* four byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S7 record found before S0 or after S7: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR32(vector);
|
||||
xprintf("%d blocks read. Found start address %p\r\n", data_records, *start_address);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
xprintf("unsupported record type (%d) found in line %d\r\n", vector[0], lineno);
|
||||
xprintf("offending line: \r\n");
|
||||
xprintf("%s\r\n", line);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("illegal character ('%c') found on line %d: S-records corrupt?\r\n", line[0], lineno);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
f_close(&file);
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("could not open file %s\r\n", filename);
|
||||
ret = FILE_OPEN;
|
||||
}
|
||||
return ret;
|
||||
case 8: /* three byte address field end record */
|
||||
if (!found_block_header || found_block_end)
|
||||
{
|
||||
xprintf("S8 record found before S0 or after S8: S-records corrupt?\r\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("S8 record (end) found after %d valid data blocks\r\n", data_records);
|
||||
*start_address = (void *) SREC_ADDR24(vector);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
xprintf("unsupported record type (%d) found in line %d\r\n", vector[0], lineno);
|
||||
xprintf("offending line: \r\n");
|
||||
xprintf("%s\r\n", line);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("illegal character ('%c') found on line %d: S-records corrupt?\r\n", line[0], lineno);
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
f_close(&file);
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("could not open file %s\r\n", filename);
|
||||
ret = FILE_OPEN;
|
||||
}
|
||||
*actual_length = length;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -305,21 +316,21 @@ err_t read_srecords(char *filename, void **start_address, uint32_t *actual_lengt
|
||||
*/
|
||||
static err_t simulate()
|
||||
{
|
||||
err_t ret = OK;
|
||||
err_t ret = OK;
|
||||
|
||||
return ret;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
{
|
||||
err_t ret = OK;
|
||||
err_t ret = OK;
|
||||
|
||||
/* TODO: do the actual flash */
|
||||
amd_flash_program(dst, src, length, false, NULL, xputchar);
|
||||
/* TODO: do the actual flash */
|
||||
amd_flash_program(dst, src, length, false, NULL, xputchar);
|
||||
|
||||
return ret;
|
||||
return ret;
|
||||
}
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
@@ -327,104 +338,112 @@ static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
/*
|
||||
* this callback verifies the data against the S-record file contents after a write to destination
|
||||
*/
|
||||
static err_t verify(uint8_t *dst, uint8_t *src, uint32_t length)
|
||||
static err_t verify(uint8_t *dst, uint8_t *src, size_t length)
|
||||
{
|
||||
uint8_t *end = src + length;
|
||||
uint8_t *end = src + length;
|
||||
|
||||
do
|
||||
{
|
||||
if (*src++ != *dst++)
|
||||
return FAIL;
|
||||
} while (src < end);
|
||||
do
|
||||
{
|
||||
if (*src++ != *dst++)
|
||||
{
|
||||
xprintf("data differs at %p (expected 0x%02x, got 0x%02x)\r\n",
|
||||
*(src - 1), *(dst - 1));
|
||||
return FAIL;
|
||||
}
|
||||
} while (src < end);
|
||||
|
||||
return OK;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/*
|
||||
* needed to avoid missing type cast warning below
|
||||
*/
|
||||
static inline err_t srec_memcpy(uint8_t *dst, uint8_t *src, size_t n)
|
||||
err_t srec_memcpy(uint8_t *dst, uint8_t *src, size_t n)
|
||||
{
|
||||
err_t e = OK;
|
||||
|
||||
xprintf(".");
|
||||
dbg("\r\ncopy from %p to %p, length %d", src, dst, n);
|
||||
// dma_memcpy((void *) dst, (void *) src, n);
|
||||
memcpy((void *) dst, (void *) src, n);
|
||||
return e;
|
||||
}
|
||||
|
||||
void srec_execute(char *flasher_filename)
|
||||
{
|
||||
DRESULT res;
|
||||
FRESULT fres;
|
||||
FATFS fs;
|
||||
FIL file;
|
||||
err_t err;
|
||||
void *start_address;
|
||||
uint32_t length;
|
||||
DRESULT res;
|
||||
FRESULT fres;
|
||||
FATFS fs;
|
||||
FIL file;
|
||||
err_t err;
|
||||
void *start_address;
|
||||
uint32_t length;
|
||||
|
||||
disk_initialize(0);
|
||||
res = disk_status(0);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
if ((fres = f_open(&file, flasher_filename, FA_READ) != FR_OK))
|
||||
{
|
||||
xprintf("flasher file %s not present on disk\r\n", flasher_filename);
|
||||
}
|
||||
else
|
||||
{
|
||||
f_close(&file);
|
||||
disk_initialize(0);
|
||||
res = disk_status(0);
|
||||
if (res == RES_OK)
|
||||
{
|
||||
fres = f_mount(0, &fs);
|
||||
if (fres == FR_OK)
|
||||
{
|
||||
if ((fres = f_open(&file, flasher_filename, FA_READ) != FR_OK))
|
||||
{
|
||||
xprintf("flasher file %s not present on disk\r\n", flasher_filename);
|
||||
}
|
||||
else
|
||||
{
|
||||
f_close(&file);
|
||||
|
||||
/* first pass: parse and check for inconsistencies */
|
||||
xprintf("check file integrity: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, simulate);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: copy data to destination */
|
||||
xprintf("OK.\r\ncopy/flash data: ");
|
||||
/* first pass: parse and check for inconsistencies */
|
||||
xprintf("check file integrity: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, simulate);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: copy data to destination */
|
||||
xprintf("OK (start address=%p, length = %ld).\r\ncopy data: ", start_address, length);
|
||||
err = read_srecords(flasher_filename, &start_address, &length, srec_memcpy);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: verify data */
|
||||
xprintf("OK.\r\nverify data: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, verify);
|
||||
if (err == OK)
|
||||
{
|
||||
xprintf("OK.\r\n");
|
||||
typedef void void_func(void);
|
||||
void_func *func;
|
||||
xprintf("target successfully written and verified. Start address: %p\r\n", start_address);
|
||||
if (err == OK)
|
||||
{
|
||||
/* next pass: verify data */
|
||||
xprintf("OK.\r\nverify data: ");
|
||||
err = read_srecords(flasher_filename, &start_address, &length, verify);
|
||||
if (err == OK)
|
||||
{
|
||||
xprintf("OK.\r\n");
|
||||
|
||||
func = start_address;
|
||||
flush_and_invalidate_caches();
|
||||
(*func)();
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not mount FAT FS\r\n");
|
||||
}
|
||||
f_mount(0, NULL);
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not initialize SD card\r\n");
|
||||
}
|
||||
typedef void void_func(void);
|
||||
void_func *func;
|
||||
xprintf("target successfully written and verified. Start address: %p\r\n", start_address);
|
||||
|
||||
func = start_address;
|
||||
flush_and_invalidate_caches();
|
||||
(*func)();
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
xprintf("failed\r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not mount FAT FS\r\n");
|
||||
}
|
||||
f_mount(0, NULL);
|
||||
}
|
||||
else
|
||||
{
|
||||
// xprintf("could not initialize SD card\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -4,47 +4,14 @@
|
||||
#
|
||||
open $1
|
||||
reset
|
||||
sleep 10
|
||||
sleep 1
|
||||
|
||||
wait
|
||||
|
||||
# Turn on MBAR at 0xFF00_0000
|
||||
write-ctrl 0x0C0F 0xFF000000
|
||||
|
||||
# set VBR
|
||||
write-ctrl 0x0801 0x00000000
|
||||
|
||||
#
|
||||
# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
|
||||
write 0xFF000500 0xE0000000 4
|
||||
write 0xFF000508 0x00001180 4
|
||||
write 0xFF000504 0x007F0001 4
|
||||
|
||||
# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
|
||||
#write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
|
||||
#write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
|
||||
#write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
|
||||
#write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
|
||||
#write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
|
||||
#write 0xFF000108 0x73622830 4 # SDCFG1
|
||||
#write 0xFF00010C 0x46770000 4 # SDCFG2
|
||||
|
||||
#write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
|
||||
#write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
|
||||
#write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
|
||||
#sleep 100
|
||||
#write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
|
||||
#write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
|
||||
#write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
|
||||
#write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
|
||||
#write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
|
||||
#sleep 10
|
||||
|
||||
|
||||
# use system sdram as flashlib scratch area.
|
||||
# TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
|
||||
# This seems to be related to large flash buffers and PC-relative adressing of the plugin
|
||||
#flash-plugin 0x1000 0xf000 flash29-5475.plugin
|
||||
flash-plugin 0x1000 0xf000 flash29.plugin
|
||||
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
|
||||
flash 0xe0000000
|
||||
|
||||
@@ -53,46 +20,34 @@ flash 0xe0000000
|
||||
# Caution: sector offset numbers need to be the ones from the x16 address range
|
||||
# column and they vary in size - needs to be exactly as in the data sheet (p. 9)
|
||||
#
|
||||
# contrary to documentation, it seems we need to erase-wait after each sector
|
||||
|
||||
erase 0xe0000000 0
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x1000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x2000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x3000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x4000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x5000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x6000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x7000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x8000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x10000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x18000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x20000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x28000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x30000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x38000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x40000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x48000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x50000
|
||||
erase-wait 0xe0000000
|
||||
erase 0xe0000000 0x58000
|
||||
erase 0xe0000000 0x60000
|
||||
erase 0xe0000000 0x70000
|
||||
erase 0xe0000000 0x78000
|
||||
|
||||
erase-wait 0xe0000000
|
||||
# should now have erased from 0xe0000000 to 0xe00fffff
|
||||
|
||||
dump-mem 0xe0010000 0x20 b
|
||||
|
||||
load -v ../firebee/bas.elf
|
||||
wait
|
||||
|
||||
@@ -54,7 +54,7 @@ sleep 10
|
||||
#flash-plugin 0x1000 0xf000 flash29.plugin
|
||||
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
|
||||
flash 0xE0000000
|
||||
flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
#flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
|
||||
# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for bas)
|
||||
#
|
||||
|
||||
@@ -10,20 +10,20 @@ wait
|
||||
write-ctrl 0x0801 0x00000000
|
||||
dump-register VBR
|
||||
|
||||
# Turn on MBAR at 0xFF00_0000
|
||||
write-ctrl 0x0C0F 0xFF000000
|
||||
# Turn on MBAR at 0x1000_0000
|
||||
write-ctrl 0x0C0F 0x10000000
|
||||
dump-register MBAR
|
||||
|
||||
# Turn on RAMBAR0 at address FF10_0000
|
||||
write-ctrl 0x0C04 0xFF100007
|
||||
# Turn on RAMBAR0 at address 2000_0000
|
||||
write-ctrl 0x0C04 0x20000007
|
||||
|
||||
# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently)
|
||||
write-ctrl 0x0C05 0xFF101001
|
||||
write-ctrl 0x0C05 0x20001001
|
||||
|
||||
#
|
||||
# Init CS0 (BootFLASH @ E000_0000 - E03F_FFFF 4Mbytes)
|
||||
write 0xFF000500 0xE0000000 4
|
||||
write 0xFF000508 0x00041180 4
|
||||
# Init CS0 (BootFLASH @ FF80_0000 - FFBF_FFFF 4Mbytes)
|
||||
write 0xFF000500 0xFF800000 4
|
||||
write 0xFF000508 0x00100D80 4
|
||||
write 0xFF000504 0x003F0001 4
|
||||
|
||||
# SDRAM Initialization @ 0000_0000 - 03FF_FFFF 64 Mbytes
|
||||
@@ -52,27 +52,26 @@ sleep 10
|
||||
# This seems to be related to large flash buffers and PC-relative adressing of the plugin
|
||||
#flash-plugin 0x1000 0xf000 flash29.plugin
|
||||
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
|
||||
flash 0xE0000000
|
||||
flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
flash 0xFF800000
|
||||
#flash-plugin 0x1000 0xf000 flashintelc3.plugin
|
||||
|
||||
# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for bas)
|
||||
#
|
||||
# Caution: sector offset numbers need to be the ones from the x16 address range
|
||||
# column and they vary in size - needs to be exactly as in the data sheet (p. 9)
|
||||
# Erase flash from 0xFF800000 to 0xFFBFFFFF (reserved space for bas)
|
||||
#
|
||||
# contrary to documentation, it seems we need to erase-wait after each sector
|
||||
|
||||
#erase 0xE0000000 0x0
|
||||
#erase 0xE0002000 0x0
|
||||
#erase 0xE0000000 0x00004000
|
||||
#erase 0xE0000000 0x00005000
|
||||
#erase 0xE0000000 0x00006000
|
||||
#erase 0xE0000000 0x00007000
|
||||
#erase 0xE0000000 0x00008000
|
||||
#erase 0xE0000000 0x00009000
|
||||
#erase 0xE0000000 0x0000a000
|
||||
#erase 0xE0000000 0x0000b000
|
||||
#erase-wait 0xe0000000
|
||||
#blank-chk 0xE0000000 0x0
|
||||
load -v m5484lite_dbug_flash.elf
|
||||
erase 0xFF800000 0
|
||||
erase 0xFF800000 1
|
||||
erase 0xFF800000 2
|
||||
erase 0xFF800000 3
|
||||
erase 0xFF800000 4
|
||||
erase 0xFF800000 5
|
||||
erase 0xFF800000 6
|
||||
erase 0xFF800000 7
|
||||
erase 0xFF800000 8
|
||||
erase 0xFF800000 9
|
||||
erase 0xFF800000 10
|
||||
erase 0xFF800000 11
|
||||
erase 0xFF800000 12
|
||||
erase 0xFF800000 13
|
||||
load -v m548xlite_dbug_flash.elf
|
||||
wait
|
||||
|
||||
@@ -63,4 +63,4 @@ erase 0xe0000000 37
|
||||
erase 0xe0000000 38
|
||||
erase 0xe0000000 39
|
||||
|
||||
load ../../emutos/emutos-m548x_bas.elf
|
||||
load ../../emutos/emutos-m548x-bas.elf
|
||||
|
||||
BIN
flash_scripts/m548xlite_dbug_ram.elf
Normal file
BIN
flash_scripts/m548xlite_dbug_ram.elf
Normal file
Binary file not shown.
5922
flash_scripts/m548xlite_dbug_ram.s19
Normal file
5922
flash_scripts/m548xlite_dbug_ram.s19
Normal file
File diff suppressed because it is too large
Load Diff
55
flash_scripts/run_m548x_dbug.bdm
Executable file
55
flash_scripts/run_m548x_dbug.bdm
Executable file
@@ -0,0 +1,55 @@
|
||||
#!/usr/local/bin/bdmctrl -D2 -v9 -d9
|
||||
#
|
||||
# firebee board initialization for bdmctrl
|
||||
#
|
||||
open $1
|
||||
reset
|
||||
sleep 1
|
||||
|
||||
wait
|
||||
|
||||
# set VBR
|
||||
write-ctrl 0x0801 0x00000000
|
||||
dump-register VBR
|
||||
|
||||
# Turn on MBAR at 0x1000_0000
|
||||
write-ctrl 0x0C0F 0x10000000
|
||||
dump-register MBAR
|
||||
|
||||
# Turn on RAMBAR0 at address 20000000
|
||||
write-ctrl 0x0C04 0x20000021
|
||||
|
||||
# Turn on RAMBAR1 at address 20001000
|
||||
write-ctrl 0x0C05 0x20001021
|
||||
|
||||
# Init CS0 (BootFLASH @ ff80_0000 - ff8F_FFFF 8Mbytes)
|
||||
write 0x10000500 0xff800000 4
|
||||
write 0x10000508 0x00041180 4
|
||||
write 0x10000504 0x003F0001 4
|
||||
wait
|
||||
|
||||
# SDRAM Initialization @ 0000_0000 - 03FF_FFFF 64 MBytes
|
||||
write 0x10000004 0x000002AA 4 # SDRAMDS configuration
|
||||
write 0x10000020 0x00000019 4 # SDRAM CS0 configuration (64Mbytes 0000_0000 - 03FF_FFFF)
|
||||
write 0x10000024 0x00000000 4 # SDRAM CS1 configuration
|
||||
write 0x10000028 0x00000000 4 # SDRAM CS2 configuration
|
||||
write 0x1000002C 0x00000000 4 # SDRAM CS3 configuration
|
||||
|
||||
write 0x10000108 0x73711630 4 # SDCFG1
|
||||
write 0x1000010C 0x46370000 4 # SDCFG2
|
||||
|
||||
write 0x10000104 0xE10B0002 4 # SDCR + IPALL
|
||||
write 0x10000100 0x40010000 4 # SDMR (write to LEMR)
|
||||
write 0x10000100 0x058D0000 4 # SDMR (write to LMR)
|
||||
sleep 100
|
||||
write 0x10000104 0xE10D0002 4 # SDCR + IPALL
|
||||
write 0x10000104 0xE10D0004 4 # SDCR + IREF (first refresh)
|
||||
write 0x10000104 0xE10D0004 4 # SDCR + IREF (first refresh)
|
||||
write 0x10000100 0x018D0000 4 # SDMR (write to LMR)
|
||||
write 0x10000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
|
||||
sleep 100
|
||||
|
||||
load m548xlite_dbug_ram.elf
|
||||
|
||||
execute
|
||||
wait
|
||||
7506
fs/cc932.c
7506
fs/cc932.c
File diff suppressed because it is too large
Load Diff
21870
fs/cc936.c
21870
fs/cc936.c
File diff suppressed because it is too large
Load Diff
17126
fs/cc949.c
17126
fs/cc949.c
File diff suppressed because it is too large
Load Diff
13578
fs/cc950.c
13578
fs/cc950.c
File diff suppressed because it is too large
Load Diff
843
fs/ccsbcs.c
843
fs/ccsbcs.c
@@ -26,468 +26,510 @@
|
||||
*/
|
||||
|
||||
#include <ff.h>
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
#if _CODE_PAGE == 437
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP437(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 720
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */
|
||||
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
|
||||
0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642,
|
||||
0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
|
||||
0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP720(0x80-0xFF) to Unicode conversion table */
|
||||
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
|
||||
0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642,
|
||||
0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
|
||||
0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 737
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */
|
||||
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
|
||||
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
|
||||
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
|
||||
0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
|
||||
0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0,
|
||||
0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD,
|
||||
0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
|
||||
0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP737(0x80-0xFF) to Unicode conversion table */
|
||||
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
|
||||
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
|
||||
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
|
||||
0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
|
||||
0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0,
|
||||
0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD,
|
||||
0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
|
||||
0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 775
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */
|
||||
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
|
||||
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
|
||||
0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6,
|
||||
0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118,
|
||||
0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
|
||||
0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B,
|
||||
0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144,
|
||||
0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
|
||||
0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP775(0x80-0xFF) to Unicode conversion table */
|
||||
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
|
||||
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
|
||||
0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6,
|
||||
0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118,
|
||||
0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
|
||||
0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B,
|
||||
0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144,
|
||||
0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
|
||||
0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 850
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP850(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 852
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
|
||||
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
|
||||
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E,
|
||||
0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A,
|
||||
0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE,
|
||||
0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161,
|
||||
0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
|
||||
0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP852(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
|
||||
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
|
||||
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
|
||||
0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E,
|
||||
0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A,
|
||||
0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE,
|
||||
0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161,
|
||||
0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
|
||||
0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 855
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */
|
||||
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
|
||||
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
|
||||
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
|
||||
0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
|
||||
0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414,
|
||||
0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438,
|
||||
0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E,
|
||||
0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
|
||||
0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443,
|
||||
0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
|
||||
0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D,
|
||||
0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP855(0x80-0xFF) to Unicode conversion table */
|
||||
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
|
||||
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
|
||||
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
|
||||
0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
|
||||
0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414,
|
||||
0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438,
|
||||
0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E,
|
||||
0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
|
||||
0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443,
|
||||
0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
|
||||
0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D,
|
||||
0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 857
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000,
|
||||
0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP857(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000,
|
||||
0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 858
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP858(0x80-0xFF) to Unicode conversion table */
|
||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
|
||||
0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
|
||||
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE,
|
||||
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580,
|
||||
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
|
||||
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
|
||||
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
|
||||
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 862
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP862(0x80-0xFF) to Unicode conversion table */
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
|
||||
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
|
||||
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
|
||||
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
|
||||
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 866
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
|
||||
0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP866(0x80-0xFF) to Unicode conversion table */
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
|
||||
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
|
||||
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
|
||||
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
|
||||
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
|
||||
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
|
||||
0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E,
|
||||
0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 874
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07,
|
||||
0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F,
|
||||
0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17,
|
||||
0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F,
|
||||
0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27,
|
||||
0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F,
|
||||
0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37,
|
||||
0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F,
|
||||
0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47,
|
||||
0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F,
|
||||
0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57,
|
||||
0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP874(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07,
|
||||
0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F,
|
||||
0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17,
|
||||
0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F,
|
||||
0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27,
|
||||
0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F,
|
||||
0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37,
|
||||
0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F,
|
||||
0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47,
|
||||
0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F,
|
||||
0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57,
|
||||
0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1250
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A,
|
||||
0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B,
|
||||
0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C,
|
||||
0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7,
|
||||
0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E,
|
||||
0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7,
|
||||
0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF,
|
||||
0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7,
|
||||
0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F,
|
||||
0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7,
|
||||
0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1250(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A,
|
||||
0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B,
|
||||
0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C,
|
||||
0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7,
|
||||
0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E,
|
||||
0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7,
|
||||
0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF,
|
||||
0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7,
|
||||
0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F,
|
||||
0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7,
|
||||
0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1251
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */
|
||||
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
|
||||
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F,
|
||||
0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7,
|
||||
0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407,
|
||||
0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457,
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1251(0x80-0xFF) to Unicode conversion table */
|
||||
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
|
||||
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F,
|
||||
0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7,
|
||||
0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407,
|
||||
0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457,
|
||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
|
||||
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
|
||||
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
|
||||
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
|
||||
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1252
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x00DD, 0x00DE, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1252(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x00DD, 0x00DE, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1253
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F,
|
||||
0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397,
|
||||
0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F,
|
||||
0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7,
|
||||
0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF,
|
||||
0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7,
|
||||
0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF,
|
||||
0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7,
|
||||
0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1253(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F,
|
||||
0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397,
|
||||
0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F,
|
||||
0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7,
|
||||
0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF,
|
||||
0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7,
|
||||
0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF,
|
||||
0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7,
|
||||
0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1254
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1254(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1255
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7,
|
||||
0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF,
|
||||
0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3,
|
||||
0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1255(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7,
|
||||
0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF,
|
||||
0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3,
|
||||
0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||
0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1256
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
|
||||
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA,
|
||||
0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F,
|
||||
0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7,
|
||||
0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643,
|
||||
0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF,
|
||||
0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7,
|
||||
0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1256(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
|
||||
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA,
|
||||
0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F,
|
||||
0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627,
|
||||
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
|
||||
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7,
|
||||
0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643,
|
||||
0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF,
|
||||
0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7,
|
||||
0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2
|
||||
}
|
||||
|
||||
#elif _CODE_PAGE == 1257
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000,
|
||||
0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7,
|
||||
0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6,
|
||||
0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112,
|
||||
0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B,
|
||||
0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF,
|
||||
0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113,
|
||||
0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C,
|
||||
0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1257(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000,
|
||||
0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7,
|
||||
0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6,
|
||||
0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112,
|
||||
0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B,
|
||||
0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7,
|
||||
0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF,
|
||||
0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113,
|
||||
0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C,
|
||||
0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7,
|
||||
0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9
|
||||
};
|
||||
|
||||
#elif _CODE_PAGE == 1258
|
||||
#define _TBLDEF 1
|
||||
static
|
||||
const uint16_t Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF
|
||||
const uint16_t Tbl[] =
|
||||
{
|
||||
/* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||
0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
|
||||
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
|
||||
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
|
||||
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
|
||||
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
|
||||
0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
|
||||
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF,
|
||||
0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7,
|
||||
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF,
|
||||
0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
|
||||
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF,
|
||||
0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7,
|
||||
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -499,42 +541,79 @@ const uint16_t Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||
|
||||
|
||||
uint16_t ff_convert ( /* Converted character, Returns zero on error */
|
||||
uint16_t src, /* Character code to be converted */
|
||||
uint32_t dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
|
||||
)
|
||||
uint16_t src, /* Character code to be converted */
|
||||
uint32_t dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
|
||||
)
|
||||
{
|
||||
uint16_t c;
|
||||
uint16_t c;
|
||||
|
||||
|
||||
if (src < 0x80) { /* ASCII */
|
||||
c = src;
|
||||
if (src < 0x80) { /* ASCII */
|
||||
c = src;
|
||||
|
||||
} else {
|
||||
if (dir) { /* OEMCP to Unicode */
|
||||
c = (src >= 0x100) ? 0 : Tbl[src - 0x80];
|
||||
} else {
|
||||
if (dir) { /* OEMCP to Unicode */
|
||||
c = (src >= 0x100) ? 0 : Tbl[src - 0x80];
|
||||
|
||||
} else { /* Unicode to OEMCP */
|
||||
for (c = 0; c < 0x80; c++) {
|
||||
if (src == Tbl[c]) break;
|
||||
}
|
||||
c = (c + 0x80) & 0xFF;
|
||||
}
|
||||
}
|
||||
} else { /* Unicode to OEMCP */
|
||||
for (c = 0; c < 0x80; c++) {
|
||||
if (src == Tbl[c]) break;
|
||||
}
|
||||
c = (c + 0x80) & 0xFF;
|
||||
}
|
||||
}
|
||||
|
||||
return c;
|
||||
return c;
|
||||
}
|
||||
|
||||
|
||||
uint16_t ff_wtoupper ( /* Upper converted character */
|
||||
uint16_t chr /* Input character */
|
||||
)
|
||||
uint16_t chr /* Input character */
|
||||
)
|
||||
{
|
||||
static const uint16_t tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 };
|
||||
static const uint16_t tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
|
||||
int i;
|
||||
static const uint16_t tbl_lower[] =
|
||||
{
|
||||
0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
|
||||
0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70,
|
||||
0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78,
|
||||
0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7,
|
||||
0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8,
|
||||
0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101,
|
||||
0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F,
|
||||
0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D,
|
||||
0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B,
|
||||
0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A,
|
||||
0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148,
|
||||
0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157,
|
||||
0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165,
|
||||
0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173,
|
||||
0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1,
|
||||
0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8,
|
||||
0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF,
|
||||
0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7,
|
||||
0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433,
|
||||
0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A,
|
||||
0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441,
|
||||
0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448,
|
||||
0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F,
|
||||
0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457,
|
||||
0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F,
|
||||
0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177,
|
||||
0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F,
|
||||
0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48,
|
||||
0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50,
|
||||
0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58,
|
||||
0xFF59, 0xFF5A, 0
|
||||
};
|
||||
static const uint16_t tbl_upper[] =
|
||||
{
|
||||
0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
|
||||
int i;
|
||||
|
||||
|
||||
for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ;
|
||||
for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ;
|
||||
|
||||
return tbl_lower[i] ? tbl_upper[i] : chr;
|
||||
return tbl_lower[i] ? tbl_upper[i] : chr;
|
||||
}
|
||||
|
||||
41
i2c/i2c.c
Normal file
41
i2c/i2c.c
Normal file
@@ -0,0 +1,41 @@
|
||||
|
||||
#include <bas_types.h>
|
||||
|
||||
void i2c_init(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void i2c_set_frequency(int hz)
|
||||
{
|
||||
}
|
||||
|
||||
int i2c_read(int address, char *data, int length, bool repeated)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_read_byte(int ack)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_write(int address, const char *data, int length, bool repeated)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_write_byte(int data)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void i2c_start(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void i2c_stop(void)
|
||||
{
|
||||
|
||||
}
|
||||
@@ -124,6 +124,33 @@ static struct pci_bios_interface pci_interface =
|
||||
.phys_to_virt = wrapper_phys_to_virt,
|
||||
};
|
||||
|
||||
static struct pci_native_driver_interface_0_1 pci_native_interface_0_1 =
|
||||
{
|
||||
.pci_read_config_longword = pci_read_config_longword,
|
||||
.pci_read_config_word = pci_read_config_word,
|
||||
.pci_read_config_byte = pci_read_config_byte,
|
||||
.pci_write_config_longword = pci_write_config_longword,
|
||||
.pci_write_config_word = pci_write_config_word,
|
||||
.pci_write_config_byte = pci_write_config_byte,
|
||||
.pci_hook_interrupt = pci_hook_interrupt,
|
||||
.pci_unhook_interrupt = pci_unhook_interrupt,
|
||||
.pci_get_resource = pci_get_resource,
|
||||
};
|
||||
|
||||
static struct pci_native_driver_interface pci_native_interface =
|
||||
{
|
||||
.pci_read_config_longword = pci_read_config_longword,
|
||||
.pci_read_config_word = pci_read_config_word,
|
||||
.pci_read_config_byte = pci_read_config_byte,
|
||||
.pci_write_config_longword = pci_write_config_longword,
|
||||
.pci_write_config_word = pci_write_config_word,
|
||||
.pci_write_config_byte = pci_write_config_byte,
|
||||
.pci_hook_interrupt = pci_hook_interrupt,
|
||||
.pci_unhook_interrupt = pci_unhook_interrupt,
|
||||
.pci_find_device = pci_find_device,
|
||||
.pci_find_classcode = pci_find_classcode,
|
||||
.pci_get_resource = pci_get_resource,
|
||||
};
|
||||
/*
|
||||
* driver interface struct for the BaS framebuffer video driver
|
||||
*/
|
||||
@@ -132,6 +159,16 @@ static struct framebuffer_driver_interface framebuffer_interface =
|
||||
.framebuffer_info = &info_fb
|
||||
};
|
||||
|
||||
/*
|
||||
* driver interface struct for the BaS MMU driver
|
||||
*/
|
||||
static struct mmu_driver_interface mmu_interface =
|
||||
{
|
||||
.map_page_locked = &mmu_map_data_page_locked,
|
||||
.unlock_page = &mmu_unlock_data_page,
|
||||
.report_locked_pages = &mmu_report_locked_pages,
|
||||
.report_pagesize = &mmu_report_pagesize
|
||||
};
|
||||
|
||||
static struct generic_interface interfaces[] =
|
||||
{
|
||||
@@ -175,8 +212,25 @@ static struct generic_interface interfaces[] =
|
||||
.description = "BaS MMU driver",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.mmu = NULL,
|
||||
.interface.mmu = &mmu_interface,
|
||||
},
|
||||
{
|
||||
.type = PCI_NATIVE_DRIVER,
|
||||
.name = "PCI_N",
|
||||
.description = "BaS PCI native",
|
||||
.version = 0,
|
||||
.revision = 1,
|
||||
.interface.pci_native = (struct pci_native_driver_interface *) &pci_native_interface_0_1,
|
||||
},
|
||||
{
|
||||
.type = PCI_NATIVE_DRIVER,
|
||||
.name = "PCI_N",
|
||||
.description = "BaS PCI native",
|
||||
.version = 0,
|
||||
.revision = 2,
|
||||
.interface.pci_native = &pci_native_interface,
|
||||
},
|
||||
|
||||
/* insert new drivers here */
|
||||
|
||||
{
|
||||
@@ -205,36 +259,41 @@ void remove_handler(void)
|
||||
*trap_0_vector = (uint32_t) std_exc_vec;
|
||||
}
|
||||
|
||||
/*
|
||||
* trap #0 entry point
|
||||
*
|
||||
* this is used to retrieve the driver table that gets exposed to the OS by BaS
|
||||
*/
|
||||
void __attribute__((interrupt)) get_bas_drivers(void)
|
||||
{
|
||||
__asm__ __volatile(
|
||||
/*
|
||||
* sp should now point to the next instruction after the trap
|
||||
* (sp) should now point to the next instruction after the trap
|
||||
* The trap itself is 2 bytes, the four bytes before that must
|
||||
* read '_BAS' or we are not meant by this call
|
||||
* read '_BAS', otherwise we are not meant by this call
|
||||
*/
|
||||
" move.l a0,-(sp) \n\t" // save registers
|
||||
" move.l a0,-(sp) \n\t" // save registers
|
||||
" move.l d0,-(sp) \n\t"
|
||||
" move.l 12(sp),a0 \n\t" // get return address
|
||||
" move.l 12(sp),a0 \n\t" // get return address
|
||||
" move.l -6(a0),d0 \n\t" //
|
||||
" cmp.l #0x5f424153,d0 \n\t" // is it '_BAS'?
|
||||
" beq fetch_drivers \n\t" // yes
|
||||
" cmp.l #0x5f424153,d0 \n\t" // is it '_BAS'?
|
||||
" beq fetch_drivers \n\t" // yes
|
||||
/*
|
||||
* This seems indeed a "normal" trap #0. Better pass control to "normal" trap #0 processing
|
||||
* If trap #0 isn't set to something sensible, we'll probably crash here, but this must be
|
||||
* prevented on the caller side.
|
||||
*/
|
||||
" move.l (sp)+,d0 \n\t" // restore registers
|
||||
" move.l (sp)+,a0 \n\t"
|
||||
" move.l 0x80,-(sp) \n\t" // fetch vector
|
||||
" rts \n\t" // and jump through it
|
||||
" move.l (sp)+,d0 \n\t" // restore registers
|
||||
" move.l (sp)+,a0 \n\t"
|
||||
" move.l 0x80,-(sp) \n\t" // fetch vector
|
||||
" rts \n\t" // and jump through it
|
||||
|
||||
"fetch_drivers: \n\t"
|
||||
" move.l #%[drivers],d0 \n\t" // return driver struct in d0
|
||||
" addq.l #4,sp \n\t" // adjust stack
|
||||
"fetch_drivers: \n\t"
|
||||
" move.l #%[drivers],d0 \n\t" // return driver struct in d0
|
||||
" addq.l #4,sp \n\t" // adjust stack
|
||||
" move.l (sp)+,a0 \n\t" // restore register
|
||||
: /* no output */
|
||||
: [drivers] "o" (bas_drivers) /* input */
|
||||
: /* clobber */
|
||||
: /* no output */
|
||||
: [drivers] "o" (bas_drivers) /* input */
|
||||
: /* clobber */
|
||||
);
|
||||
}
|
||||
|
||||
@@ -7,14 +7,11 @@
|
||||
#ifndef _MCD_API_H
|
||||
#define _MCD_API_H
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
/*
|
||||
* Turn Execution Unit tasks ON (#define) or OFF (#undef)
|
||||
*/
|
||||
#undef MCD_INCLUDE_EU
|
||||
//#define MCD_INCLUDE_EU
|
||||
|
||||
/*
|
||||
* Number of DMA channels
|
||||
*/
|
||||
@@ -49,33 +46,39 @@
|
||||
/*
|
||||
* Portability typedefs
|
||||
*/
|
||||
typedef int s32;
|
||||
typedef unsigned int u32;
|
||||
typedef short s16;
|
||||
typedef unsigned short u16;
|
||||
typedef char s8;
|
||||
typedef unsigned char u8;
|
||||
|
||||
/*
|
||||
* These structures represent the internal registers of the
|
||||
* multi-channel DMA
|
||||
*/
|
||||
struct dmaRegs_s {
|
||||
uint32_t taskbar; /* task table base address register */
|
||||
uint32_t currPtr;
|
||||
uint32_t endPtr;
|
||||
uint32_t varTablePtr;
|
||||
uint16_t dma_rsvd0;
|
||||
uint16_t ptdControl; /* ptd control */
|
||||
uint32_t intPending; /* interrupt pending register */
|
||||
uint32_t intMask; /* interrupt mask register */
|
||||
uint16_t taskControl[16]; /* task control registers */
|
||||
uint8_t priority[32]; /* priority registers */
|
||||
uint32_t initiatorMux; /* initiator mux control */
|
||||
uint32_t taskSize0; /* task size control register 0. */
|
||||
uint32_t taskSize1; /* task size control register 1. */
|
||||
uint32_t dma_rsvd1; /* reserved */
|
||||
uint32_t dma_rsvd2; /* reserved */
|
||||
uint32_t debugComp1; /* debug comparator 1 */
|
||||
uint32_t debugComp2; /* debug comparator 2 */
|
||||
uint32_t debugControl; /* debug control */
|
||||
uint32_t debugStatus; /* debug status */
|
||||
uint32_t ptdDebug; /* priority task decode debug */
|
||||
uint32_t dma_rsvd3[31]; /* reserved */
|
||||
u32 taskbar; /* task table base address register */
|
||||
u32 currPtr;
|
||||
u32 endPtr;
|
||||
u32 varTablePtr;
|
||||
u16 dma_rsvd0;
|
||||
u16 ptdControl; /* ptd control */
|
||||
u32 intPending; /* interrupt pending register */
|
||||
u32 intMask; /* interrupt mask register */
|
||||
u16 taskControl[16]; /* task control registers */
|
||||
u8 priority[32]; /* priority registers */
|
||||
u32 initiatorMux; /* initiator mux control */
|
||||
u32 taskSize0; /* task size control register 0. */
|
||||
u32 taskSize1; /* task size control register 1. */
|
||||
u32 dma_rsvd1; /* reserved */
|
||||
u32 dma_rsvd2; /* reserved */
|
||||
u32 debugComp1; /* debug comparator 1 */
|
||||
u32 debugComp2; /* debug comparator 2 */
|
||||
u32 debugControl; /* debug control */
|
||||
u32 debugStatus; /* debug status */
|
||||
u32 ptdDebug; /* priority task decode debug */
|
||||
u32 dma_rsvd3[31]; /* reserved */
|
||||
};
|
||||
typedef volatile struct dmaRegs_s dmaRegs;
|
||||
|
||||
@@ -161,7 +164,7 @@ typedef volatile struct dmaRegs_s dmaRegs;
|
||||
*/
|
||||
/* Byte swapping: */
|
||||
#define MCD_NO_BYTE_SWAP 0x00045670 /* to disable byte swapping. */
|
||||
#define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each uint32_t of the DMAed data. */
|
||||
#define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each u32 of the DMAed data. */
|
||||
#define MCD_U16_REVERSE 0x00067450 /* to reverse the 16-bit halves of
|
||||
each 32-bit data value being DMAed.*/
|
||||
#define MCD_U16_BYTE_REVERSE 0x00054760 /* to reverse the byte halves of each
|
||||
@@ -228,44 +231,44 @@ typedef volatile struct dmaRegs_s dmaRegs;
|
||||
|
||||
/* Task Table Entry struct*/
|
||||
typedef struct {
|
||||
uint32_t TDTstart; /* task descriptor table start */
|
||||
uint32_t TDTend; /* task descriptor table end */
|
||||
uint32_t varTab; /* variable table start */
|
||||
uint32_t FDTandFlags; /* function descriptor table start and flags */
|
||||
volatile uint32_t descAddrAndStatus;
|
||||
volatile uint32_t modifiedVarTab;
|
||||
uint32_t contextSaveSpace; /* context save space start */
|
||||
uint32_t literalBases;
|
||||
u32 TDTstart; /* task descriptor table start */
|
||||
u32 TDTend; /* task descriptor table end */
|
||||
u32 varTab; /* variable table start */
|
||||
u32 FDTandFlags; /* function descriptor table start and flags */
|
||||
volatile u32 descAddrAndStatus;
|
||||
volatile u32 modifiedVarTab;
|
||||
u32 contextSaveSpace; /* context save space start */
|
||||
u32 literalBases;
|
||||
} TaskTableEntry;
|
||||
|
||||
|
||||
/* Chained buffer descriptor */
|
||||
typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
|
||||
struct MCD_bufDesc_struct {
|
||||
uint32_t flags; /* flags describing the DMA */
|
||||
uint32_t csumResult; /* checksum from checksumming performed since last checksum reset */
|
||||
int8_t *srcAddr; /* the address to move data from */
|
||||
int8_t *destAddr; /* the address to move data to */
|
||||
int8_t *lastDestAddr; /* the last address written to */
|
||||
uint32_t dmaSize; /* the number of bytes to transfer independent of the transfer size */
|
||||
u32 flags; /* flags describing the DMA */
|
||||
u32 csumResult; /* checksum from checksumming performed since last checksum reset */
|
||||
s8 *srcAddr; /* the address to move data from */
|
||||
s8 *destAddr; /* the address to move data to */
|
||||
s8 *lastDestAddr; /* the last address written to */
|
||||
u32 dmaSize; /* the number of bytes to transfer independent of the transfer size */
|
||||
MCD_bufDesc *next; /* next buffer descriptor in chain */
|
||||
uint32_t info; /* private information about this descriptor; DMA does not affect it */
|
||||
u32 info; /* private information about this descriptor; DMA does not affect it */
|
||||
};
|
||||
|
||||
/* Progress Query struct */
|
||||
typedef volatile struct MCD_XferProg_struct {
|
||||
int8_t *lastSrcAddr; /* the most-recent or last, post-increment source address */
|
||||
int8_t *lastDestAddr; /* the most-recent or last, post-increment destination address */
|
||||
uint32_t dmaSize; /* the amount of data transferred for the current buffer */
|
||||
s8 *lastSrcAddr; /* the most-recent or last, post-increment source address */
|
||||
s8 *lastDestAddr; /* the most-recent or last, post-increment destination address */
|
||||
u32 dmaSize; /* the amount of data transferred for the current buffer */
|
||||
MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */
|
||||
} MCD_XferProg;
|
||||
|
||||
|
||||
/* FEC buffer descriptor */
|
||||
typedef volatile struct MCD_bufDescFec_struct {
|
||||
uint16_t statCtrl;
|
||||
uint16_t length;
|
||||
uint32_t dataPointer;
|
||||
u16 statCtrl;
|
||||
u16 length;
|
||||
u32 dataPointer;
|
||||
} MCD_bufDescFec;
|
||||
|
||||
|
||||
@@ -279,65 +282,65 @@ typedef volatile struct MCD_bufDescFec_struct {
|
||||
*/
|
||||
int MCD_startDma (
|
||||
int channel, /* the channel on which to run the DMA */
|
||||
int8_t *srcAddr, /* the address to move data from, or buffer-descriptor address */
|
||||
int16_t srcIncr, /* the amount to increment the source address per transfer */
|
||||
int8_t *destAddr, /* the address to move data to */
|
||||
int16_t destIncr, /* the amount to increment the destination address per transfer */
|
||||
uint32_t dmaSize, /* the number of bytes to transfer independent of the transfer size */
|
||||
uint32_t xferSize, /* the number bytes in of each data movement (1, 2, or 4) */
|
||||
uint32_t initiator, /* what device initiates the DMA */
|
||||
s8 *srcAddr, /* the address to move data from, or buffer-descriptor address */
|
||||
s16 srcIncr, /* the amount to increment the source address per transfer */
|
||||
s8 *destAddr, /* the address to move data to */
|
||||
s16 destIncr, /* the amount to increment the destination address per transfer */
|
||||
u32 dmaSize, /* the number of bytes to transfer independent of the transfer size */
|
||||
u32 xferSize, /* the number bytes in of each data movement (1, 2, or 4) */
|
||||
u32 initiator, /* what device initiates the DMA */
|
||||
int priority, /* priority of the DMA */
|
||||
uint32_t flags, /* flags describing the DMA */
|
||||
uint32_t funcDesc /* a description of byte swapping, bit swapping, and CRC actions */
|
||||
u32 flags, /* flags describing the DMA */
|
||||
u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */
|
||||
);
|
||||
|
||||
/*
|
||||
* MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
|
||||
* registers, relocating and creating the appropriate task structures, and
|
||||
/*
|
||||
* MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
|
||||
* registers, relocating and creating the appropriate task structures, and
|
||||
* setting up some global settings
|
||||
*/
|
||||
int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, uint32_t flags);
|
||||
int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_dmaStatus() returns the status of the DMA on the requested channel.
|
||||
*/
|
||||
int MCD_dmaStatus (int channel);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_XferProgrQuery() returns progress of DMA on requested channel
|
||||
*/
|
||||
int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_killDma() halts the DMA on the requested channel, without any
|
||||
* intention of resuming the DMA.
|
||||
*/
|
||||
int MCD_killDma (int channel);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_continDma() continues a DMA which as stopped due to encountering an
|
||||
* unready buffer descriptor.
|
||||
*/
|
||||
int MCD_continDma (int channel);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
|
||||
* running on that channel).
|
||||
* running on that channel).
|
||||
*/
|
||||
int MCD_pauseDma (int channel);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
|
||||
* running on that channel).
|
||||
*/
|
||||
int MCD_resumeDma (int channel);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
|
||||
*/
|
||||
int MCD_csumQuery (int channel, uint32_t *csum);
|
||||
int MCD_csumQuery (int channel, u32 *csum);
|
||||
|
||||
/*
|
||||
/*
|
||||
* MCD_getCodeSize provides the packed size required by the microcoded task
|
||||
* and structures.
|
||||
*/
|
||||
@@ -350,7 +353,7 @@ int MCD_getCodeSize(void);
|
||||
int MCD_getVersion(char **longVersion);
|
||||
|
||||
/* macro for setting a location in the variable table */
|
||||
#define MCD_SET_VAR(taskTab,idx,value) ((uint32_t *)(taskTab)->varTab)[idx] = value
|
||||
#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value
|
||||
/* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
|
||||
so I'm avoiding surrounding it with "do {} while(0)" */
|
||||
|
||||
|
||||
@@ -15,7 +15,7 @@ void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer
|
||||
/*
|
||||
* Task 1
|
||||
*/
|
||||
void MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
@@ -27,18 +27,18 @@ void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi
|
||||
/*
|
||||
* Task 3
|
||||
*/
|
||||
void MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
* Task 4
|
||||
*/
|
||||
void MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel);
|
||||
void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
* Task 5
|
||||
*/
|
||||
void MCD_startDmaENetXmit(int8_t *bDBase, int8_t *currBD, int8_t *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel);
|
||||
void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
#endif /* MCD_TSK_INIT_H */
|
||||
|
||||
@@ -16,7 +16,7 @@
|
||||
#ifndef __MCF5475_H__
|
||||
#define __MCF5475_H__
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
/***
|
||||
* MCF5475 Derivative Memory map definitions from linker command files:
|
||||
* __MBAR, __MMUBAR, __RAMBAR0, __RAMBAR0_SIZE, __RAMBAR1, __RAMBAR1_SIZE
|
||||
|
||||
@@ -107,7 +107,6 @@
|
||||
#define MCF_INTC_LIACK(x) (*(volatile uint8_t *)(&_MBAR[0x7E4 + ((x-1)*0x4)]))
|
||||
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_INTC_IPRH */
|
||||
#define MCF_INTC_IPRH_INT32 (0x1)
|
||||
#define MCF_INTC_IPRH_INT33 (0x2)
|
||||
|
||||
@@ -62,7 +62,7 @@
|
||||
/* Bit definitions and macros for MCF_MMU_MMUTR */
|
||||
#define MCF_MMU_MMUTR_V (0x1)
|
||||
#define MCF_MMU_MMUTR_SG (0x2)
|
||||
#define MCF_MMU_MMUTR_ID(x) (((x)&0xFF)<<0x2)
|
||||
#define MCF_MMU_MMUTR_ID(x) (((x) & 0xFF) << 0x2)
|
||||
#define MCF_MMU_MMUTR_VA(x) (((x)&0x3FFFFF)<<0xA)
|
||||
|
||||
/* Bit definitions and macros for MCF_MMU_MMUDR */
|
||||
@@ -71,9 +71,9 @@
|
||||
#define MCF_MMU_MMUDR_W (0x8)
|
||||
#define MCF_MMU_MMUDR_R (0x10)
|
||||
#define MCF_MMU_MMUDR_SP (0x20)
|
||||
#define MCF_MMU_MMUDR_CM(x) (((x)&0x3)<<0x6)
|
||||
#define MCF_MMU_MMUDR_SZ(x) (((x)&0x3)<<0x8)
|
||||
#define MCF_MMU_MMUDR_PA(x) (((x)&0x3FFFFF)<<0xA)
|
||||
#define MCF_MMU_MMUDR_CM(x) (((x) & 0x3) << 0x6)
|
||||
#define MCF_MMU_MMUDR_SZ(x) (((x) & 0x3) << 0x8)
|
||||
#define MCF_MMU_MMUDR_PA(x) (((x) & 0x3FFFFF) << 0xA)
|
||||
|
||||
|
||||
#endif /* __MCF5475_MMU_H__ */
|
||||
|
||||
@@ -21,15 +21,24 @@
|
||||
#define _BAS_PRINTF_H_
|
||||
#include <stdarg.h>
|
||||
#include <stddef.h>
|
||||
#include "MCF5475.h"
|
||||
|
||||
extern void xvsnprintf(char *str, size_t size, const char *fmt, va_list va);
|
||||
extern void xvprintf(const char *fmt, va_list va);
|
||||
extern void xprintf(const char *fmt, ...);
|
||||
extern void xsnprintf(char *str, size_t size, const char *fmt, ...);
|
||||
extern void xputchar(int c);
|
||||
extern int sprintf(char *str, const char *format, ...);
|
||||
|
||||
|
||||
extern void display_progress(void);
|
||||
extern void hexdump(uint8_t buffer[], int size);
|
||||
|
||||
static inline void xputchar(int c)
|
||||
{
|
||||
while (!(MCF_PSC0_PSCSR & MCF_PSC_PSCSR_TXRDY))
|
||||
;
|
||||
|
||||
MCF_PSC0_PSCTB_8BIT = (uint8_t) c;
|
||||
}
|
||||
|
||||
#endif /* _BAS_PRINTF_H_ */
|
||||
|
||||
@@ -34,6 +34,7 @@ extern char *strcat(char *dst, const char *src);
|
||||
extern char *strncat(char *dst, const char *src, size_t max);
|
||||
extern int atoi(const char *c);
|
||||
extern void *memcpy(void *dst, const void *src, size_t n);
|
||||
extern void *memmove(void *dst, const void *src, size_t n);
|
||||
extern void *memset(void *s, int c, size_t n);
|
||||
extern int memcmp(const void *s1, const void *s2, size_t max);
|
||||
extern void bzero(void *s, size_t n);
|
||||
|
||||
@@ -30,5 +30,6 @@
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <stddef.h> /* for sizeof() etc. */
|
||||
|
||||
#endif /* BAS_TYPES_H_ */
|
||||
|
||||
@@ -26,4 +26,7 @@
|
||||
#define CLEAR_BIT(p,bit) p &= ~(bit)
|
||||
#define CLEAR_BIT_NO(p,nr) CLEAR_BIT(p, (1 << (nr)))
|
||||
|
||||
extern void write_pic_byte(uint8_t value);
|
||||
extern uint8_t read_pic_byte(void);
|
||||
|
||||
#endif /* _BAS_UTILS_H_ */
|
||||
|
||||
@@ -25,8 +25,7 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
/*
|
||||
* CACR Cache Control Register
|
||||
@@ -54,6 +53,7 @@
|
||||
#define CF_CACR_ICINVA (0x00000100) /* Instr Cache Invalidate All */
|
||||
#define CF_CACR_IDSP (0x00000080) /* Ins default supervisor-protect */
|
||||
#define CF_CACR_EUSP (0x00000020) /* Switch stacks in user mode */
|
||||
#define CF_CACR_DF (0x00000010) /* Disable FPU */
|
||||
|
||||
#define _DCACHE_SET_MASK ((DCACHE_SIZE/64-1)<<CACHE_WAYS)
|
||||
#define _ICACHE_SET_MASK ((ICACHE_SIZE/64-1)<<CACHE_WAYS)
|
||||
@@ -83,7 +83,7 @@ extern uint32_t cacr_get(void);
|
||||
extern void cacr_set(uint32_t);
|
||||
extern void flush_icache_range(void *address, size_t size);
|
||||
extern void flush_dcache_range(void *address, size_t size);
|
||||
|
||||
extern void flush_cache_range(void *address, size_t size);
|
||||
|
||||
|
||||
#endif /* _CACHE_H_ */
|
||||
|
||||
63
include/conout.h
Executable file
63
include/conout.h
Executable file
@@ -0,0 +1,63 @@
|
||||
#ifndef __CONOUT_H__
|
||||
#define __CONOUT_H__
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
/*
|
||||
* conout.h - lowlevel color model dependent screen handling routines
|
||||
*
|
||||
*
|
||||
* Copyright (C) 2004-2016 by Authors:
|
||||
*
|
||||
* Authors:
|
||||
* MAD Martin Doering
|
||||
*
|
||||
* This file is distributed under the GPL, version 2 or at your
|
||||
* option any later version. See doc/license.txt for details.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/* Defines for cursor */
|
||||
#define M_CFLASH 0x0001 /* cursor flash 0:disabled 1:enabled */
|
||||
#define M_CSTATE 0x0002 /* cursor flash state 0:off 1:on */
|
||||
#define M_CVIS 0x0004 /* cursor visibility 0:invisible 1:visible */
|
||||
|
||||
/*
|
||||
* The visibility flag is also used as a semaphore to prevent
|
||||
* the interrupt-driven cursor blink logic from colliding with
|
||||
* escape function/sequence cursor drawing activity.
|
||||
*/
|
||||
|
||||
#define M_CEOL 0x0008 /* end of line handling 0:overwrite 1:wrap */
|
||||
#define M_REVID 0x0010 /* reverse video 0:on 1:off */
|
||||
#define M_SVPOS 0x0020 /* position saved flag. 0:false, 1:true */
|
||||
#define M_CRIT 0x0040 /* reverse video 0:on 1:off */
|
||||
|
||||
/* Color related linea variables */
|
||||
|
||||
extern int16_t v_col_bg; /* current background color */
|
||||
extern int16_t v_col_fg; /* current foreground color */
|
||||
|
||||
/* Cursor related linea variables */
|
||||
|
||||
extern uint8_t *v_cur_ad; /* current cursor address */
|
||||
extern int16_t v_cur_of; /* cursor offset */
|
||||
extern int8_t v_cur_tim; /* cursor blink timer */
|
||||
|
||||
extern int8_t v_period;
|
||||
extern int16_t disab_cnt; /* disable depth count. (>0 means disabled) */
|
||||
extern int8_t v_stat_0; /* video cell system status */
|
||||
extern int16_t sav_cur_x; /* saved cursor cell x */
|
||||
extern int16_t sav_cur_y; /* saved cursor cell y */
|
||||
|
||||
/* Prototypes */
|
||||
|
||||
extern void ascii_out(int);
|
||||
extern void move_cursor(int, int);
|
||||
extern void blank_out (int, int, int, int);
|
||||
extern void invert_cell(int, int);
|
||||
extern void scroll_up(int);
|
||||
extern void scroll_down(int);
|
||||
|
||||
#endif /* __CONOUT_H__ */
|
||||
16
include/debug.h
Normal file
16
include/debug.h
Normal file
@@ -0,0 +1,16 @@
|
||||
#ifndef DEBUG_H
|
||||
// #define DEBUG_H
|
||||
|
||||
#ifdef DEBUG
|
||||
#include "bas_types.h"
|
||||
#include "bas_printf.h"
|
||||
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG (%s()): " format, __FUNCTION__, ##arg);} while(0)
|
||||
#else
|
||||
#define dbg(format, arg...) do {;} while (0)
|
||||
#endif /* DEBUG */
|
||||
#define err(format, arg...) do { xprintf("ERROR (%s()): " format, __FUNCTION__, ##arg); } while(0)
|
||||
#define inf(format, arg...) do { xprintf("" format, ##arg); } while(0)
|
||||
|
||||
#endif // DEBUG_H
|
||||
|
||||
@@ -12,7 +12,7 @@ extern "C" {
|
||||
#define _USE_WRITE 1 /* 1: Enable disk_write function */
|
||||
#define _USE_IOCTL 1 /* 1: Enable disk_ioctl fucntion */
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
|
||||
/* Status of Disk Functions */
|
||||
|
||||
@@ -26,10 +26,6 @@
|
||||
#include "MCD_dma.h"
|
||||
#include "bas_string.h"
|
||||
|
||||
#define DMA_INTC_LVL 6
|
||||
#define DMA_INTC_PRI 0
|
||||
|
||||
|
||||
void *dma_memcpy(void *dst, void *src, size_t n);
|
||||
extern int dma_init(void);
|
||||
extern int dma_get_channel(int requestor);
|
||||
@@ -39,9 +35,9 @@ extern void dma_clear_channel(int channel);
|
||||
extern uint32_t dma_get_initiator(int requestor);
|
||||
extern int dma_set_initiator(int initiator);
|
||||
extern void dma_free_initiator(int initiator);
|
||||
extern void dma_irq_enable(uint8_t lvl, uint8_t pri);
|
||||
extern void dma_irq_enable(void);
|
||||
extern void dma_irq_disable(void);
|
||||
extern int dma_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool dma_interrupt_handler(void *arg1, void *arg2);
|
||||
|
||||
|
||||
#endif /* _DMA_H_ */
|
||||
|
||||
@@ -38,7 +38,8 @@ enum driver_type
|
||||
VIDEO_DRIVER,
|
||||
PCI_DRIVER,
|
||||
MMU_DRIVER,
|
||||
END_OF_DRIVERS = 0xffffffff /* marks end of driver list */
|
||||
PCI_NATIVE_DRIVER,
|
||||
END_OF_DRIVERS = 0xffffffffL, /* marks end of driver list */
|
||||
};
|
||||
|
||||
struct generic_driver_interface
|
||||
@@ -80,131 +81,11 @@ struct xhdi_driver_interface
|
||||
uint32_t (*xhdivec)();
|
||||
};
|
||||
|
||||
/* Interpretation of offset for color fields: All offsets are from the right,
|
||||
* inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
|
||||
* can use the offset as right argument to <<). A pixel afterwards is a bit
|
||||
* stream and is written to video memory as that unmodified. This implies
|
||||
* big-endian byte order if bits_per_pixel is greater than 8.
|
||||
*/
|
||||
struct fb_bitfield
|
||||
{
|
||||
unsigned long offset; /* beginning of bitfield */
|
||||
unsigned long length; /* length of bitfield */
|
||||
unsigned long msb_right; /* != 0 : Most significant bit is */
|
||||
/* right */
|
||||
};
|
||||
|
||||
/*
|
||||
* the following structures define the interface to the BaS-builtin-framebuffer video driver
|
||||
*/
|
||||
struct fb_var_screeninfo
|
||||
{
|
||||
unsigned long xres; /* visible resolution */
|
||||
unsigned long yres;
|
||||
unsigned long xres_virtual; /* virtual resolution */
|
||||
unsigned long yres_virtual;
|
||||
unsigned long xoffset; /* offset from virtual to visible */
|
||||
unsigned long yoffset; /* resolution */
|
||||
|
||||
unsigned long bits_per_pixel; /* guess what */
|
||||
unsigned long grayscale; /* != 0 Graylevels instead of colors */
|
||||
|
||||
struct fb_bitfield red; /* bitfield in fb mem if true color, */
|
||||
struct fb_bitfield green; /* else only length is significant */
|
||||
struct fb_bitfield blue;
|
||||
struct fb_bitfield transp; /* transparency */
|
||||
|
||||
unsigned long nonstd; /* != 0 Non standard pixel format */
|
||||
|
||||
unsigned long activate; /* see FB_ACTIVATE_* */
|
||||
|
||||
unsigned long height; /* height of picture in mm */
|
||||
unsigned long width; /* width of picture in mm */
|
||||
|
||||
unsigned long accel_flags; /* (OBSOLETE) see fb_info.flags */
|
||||
|
||||
/* Timing: All values in pixclocks, except pixclock (of course) */
|
||||
unsigned long pixclock; /* pixel clock in ps (pico seconds) */
|
||||
unsigned long left_margin; /* time from sync to picture */
|
||||
unsigned long right_margin; /* time from picture to sync */
|
||||
unsigned long upper_margin; /* time from sync to picture */
|
||||
unsigned long lower_margin;
|
||||
unsigned long hsync_len; /* length of horizontal sync */
|
||||
unsigned long vsync_len; /* length of vertical sync */
|
||||
unsigned long sync; /* see FB_SYNC_* */
|
||||
unsigned long vmode; /* see FB_VMODE_* */
|
||||
unsigned long rotate; /* angle we rotate counter clockwise */
|
||||
unsigned long refresh;
|
||||
unsigned long reserved[4]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
struct fb_fix_screeninfo
|
||||
{
|
||||
char id[16]; /* identification string eg "TT Builtin" */
|
||||
unsigned long smem_start; /* Start of frame buffer mem */
|
||||
/* (physical address) */
|
||||
unsigned long smem_len; /* Length of frame buffer mem */
|
||||
unsigned long type; /* see FB_TYPE_* */
|
||||
unsigned long type_aux; /* Interleave for interleaved Planes */
|
||||
unsigned long visual; /* see FB_VISUAL_* */
|
||||
unsigned short xpanstep; /* zero if no hardware panning */
|
||||
unsigned short ypanstep; /* zero if no hardware panning */
|
||||
unsigned short ywrapstep; /* zero if no hardware ywrap */
|
||||
unsigned long line_length; /* length of a line in bytes */
|
||||
unsigned long mmio_start; /* Start of Memory Mapped I/O */
|
||||
/* (physical address) */
|
||||
unsigned long mmio_len; /* Length of Memory Mapped I/O */
|
||||
unsigned long accel; /* Indicate to driver which */
|
||||
/* specific chip/card we have */
|
||||
unsigned short reserved[3]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
struct fb_chroma
|
||||
{
|
||||
unsigned long redx; /* in fraction of 1024 */
|
||||
unsigned long greenx;
|
||||
unsigned long bluex;
|
||||
unsigned long whitex;
|
||||
unsigned long redy;
|
||||
unsigned long greeny;
|
||||
unsigned long bluey;
|
||||
unsigned long whitey;
|
||||
};
|
||||
|
||||
struct fb_monspecs
|
||||
{
|
||||
struct fb_chroma chroma;
|
||||
struct fb_videomode *modedb; /* mode database */
|
||||
unsigned char manufacturer[4]; /* Manufacturer */
|
||||
unsigned char monitor[14]; /* Monitor String */
|
||||
unsigned char serial_no[14]; /* Serial Number */
|
||||
unsigned char ascii[14]; /* ? */
|
||||
unsigned long modedb_len; /* mode database length */
|
||||
unsigned long model; /* Monitor Model */
|
||||
unsigned long serial; /* Serial Number - Integer */
|
||||
unsigned long year; /* Year manufactured */
|
||||
unsigned long week; /* Week Manufactured */
|
||||
unsigned long hfmin; /* hfreq lower limit (Hz) */
|
||||
unsigned long hfmax; /* hfreq upper limit (Hz) */
|
||||
unsigned long dclkmin; /* pixelclock lower limit (Hz) */
|
||||
unsigned long dclkmax; /* pixelclock upper limit (Hz) */
|
||||
unsigned short input; /* display type - see FB_DISP_* */
|
||||
unsigned short dpms; /* DPMS support - see FB_DPMS_ */
|
||||
unsigned short signal; /* Signal Type - see FB_SIGNAL_* */
|
||||
unsigned short vfmin; /* vfreq lower limit (Hz) */
|
||||
unsigned short vfmax; /* vfreq upper limit (Hz) */
|
||||
unsigned short gamma; /* Gamma - in fractions of 100 */
|
||||
unsigned short gtf : 1; /* supports GTF */
|
||||
unsigned short misc; /* Misc flags - see FB_MISC_* */
|
||||
unsigned char version; /* EDID version... */
|
||||
unsigned char revision; /* ...and revision */
|
||||
unsigned char max_x; /* Maximum horizontal size (cm) */
|
||||
unsigned char max_y; /* Maximum vertical size (cm) */
|
||||
};
|
||||
#include "fb.h"
|
||||
|
||||
struct framebuffer_driver_interface
|
||||
{
|
||||
struct fb_info **framebuffer_info; /* pointer to an fb_info struct (defined in include/fb.h) */
|
||||
struct fb_info **framebuffer_info; /* pointer to an fb_info struct (defined in include/fb.h) */
|
||||
};
|
||||
|
||||
struct pci_bios_interface
|
||||
@@ -212,63 +93,94 @@ struct pci_bios_interface
|
||||
uint32_t subjar;
|
||||
uint32_t version;
|
||||
/* Although we declare this functions as standard gcc functions (cdecl),
|
||||
* they expect paramenters inside registers (fastcall) unsupported by gcc m68k.
|
||||
* they expect parameters inside registers (fastcall) unsupported by gcc m68k.
|
||||
* Caller will take care of parameters passing convention.
|
||||
*/
|
||||
int32_t (*find_pci_device) (uint32_t id, uint16_t index);
|
||||
int32_t (*find_pci_classcode) (uint32_t class, uint16_t index);
|
||||
int32_t (*read_config_byte) (int32_t handle, uint16_t reg, uint8_t *address);
|
||||
int32_t (*read_config_word) (int32_t handle, uint16_t reg, uint16_t *address);
|
||||
int32_t (*read_config_longword) (int32_t handle, uint16_t reg, uint32_t *address);
|
||||
uint8_t (*fast_read_config_byte) (int32_t handle, uint16_t reg);
|
||||
uint16_t (*fast_read_config_word) (int32_t handle, uint16_t reg);
|
||||
uint32_t (*fast_read_config_longword) (int32_t handle, uint16_t reg);
|
||||
int32_t (*write_config_byte) (int32_t handle, uint16_t reg, uint16_t val);
|
||||
int32_t (*write_config_word) (int32_t handle, uint16_t reg, uint16_t val);
|
||||
int32_t (*write_config_longword) (int32_t handle, uint16_t reg, uint32_t val);
|
||||
int32_t (*hook_interrupt) (int32_t handle, uint32_t *routine, uint32_t *parameter);
|
||||
int32_t (*unhook_interrupt) (int32_t handle);
|
||||
int32_t (*special_cycle) (uint16_t bus, uint32_t data);
|
||||
int32_t (*get_routing) (int32_t handle);
|
||||
int32_t (*set_interrupt) (int32_t handle);
|
||||
int32_t (*get_resource) (int32_t handle);
|
||||
int32_t (*get_card_used) (int32_t handle, uint32_t *address);
|
||||
int32_t (*set_card_used) (int32_t handle, uint32_t *callback);
|
||||
int32_t (*read_mem_byte) (int32_t handle, uint32_t offset, uint8_t *address);
|
||||
int32_t (*read_mem_word) (int32_t handle, uint32_t offset, uint16_t *address);
|
||||
int32_t (*read_mem_longword) (int32_t handle, uint32_t offset, uint32_t *address);
|
||||
uint8_t (*fast_read_mem_byte) (int32_t handle, uint32_t offset);
|
||||
uint16_t (*fast_read_mem_word) (int32_t handle, uint32_t offset);
|
||||
uint32_t (*fast_read_mem_longword) (int32_t handle, uint32_t offset);
|
||||
int32_t (*write_mem_byte) (int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_mem_word) (int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_mem_longword) (int32_t handle, uint32_t offset, uint32_t val);
|
||||
int32_t (*read_io_byte) (int32_t handle, uint32_t offset, uint8_t *address);
|
||||
int32_t (*read_io_word) (int32_t handle, uint32_t offset, uint16_t *address);
|
||||
int32_t (*read_io_longword) (int32_t handle, uint32_t offset, uint32_t *address);
|
||||
uint8_t (*fast_read_io_byte) (int32_t handle, uint32_t offset);
|
||||
uint16_t (*fast_read_io_word) (int32_t handle, uint32_t offset);
|
||||
uint32_t (*fast_read_io_longword) (int32_t handle, uint32_t offset);
|
||||
int32_t (*write_io_byte) (int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_io_word) (int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_io_longword) (int32_t handle, uint32_t offset, uint32_t val);
|
||||
int32_t (*get_machine_id) (void);
|
||||
int32_t (*get_pagesize) (void);
|
||||
int32_t (*virt_to_bus) (int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
|
||||
int32_t (*bus_to_virt) (int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
|
||||
int32_t (*virt_to_phys) (uint32_t address, PCI_CONV_ADR *pointer);
|
||||
int32_t (*phys_to_virt) (uint32_t address, PCI_CONV_ADR *pointer);
|
||||
// int32_t reserved[2];
|
||||
int32_t (*find_pci_device)(uint32_t id, uint16_t index);
|
||||
int32_t (*find_pci_classcode)(uint32_t class, uint16_t index);
|
||||
int32_t (*read_config_byte)(int32_t handle, uint16_t reg, uint8_t *address);
|
||||
int32_t (*read_config_word)(int32_t handle, uint16_t reg, uint16_t *address);
|
||||
int32_t (*read_config_longword)(int32_t handle, uint16_t reg, uint32_t *address);
|
||||
uint8_t (*fast_read_config_byte)(int32_t handle, uint16_t reg);
|
||||
uint16_t (*fast_read_config_word)(int32_t handle, uint16_t reg);
|
||||
uint32_t (*fast_read_config_longword)(int32_t handle, uint16_t reg);
|
||||
int32_t (*write_config_byte)(int32_t handle, uint16_t reg, uint16_t val);
|
||||
int32_t (*write_config_word)(int32_t handle, uint16_t reg, uint16_t val);
|
||||
int32_t (*write_config_longword)(int32_t handle, uint16_t reg, uint32_t val);
|
||||
int32_t (*hook_interrupt)(int32_t handle, uint32_t *routine, uint32_t *parameter);
|
||||
int32_t (*unhook_interrupt)(int32_t handle);
|
||||
int32_t (*special_cycle)(uint16_t bus, uint32_t data);
|
||||
int32_t (*get_routing)(int32_t handle);
|
||||
int32_t (*set_interrupt)(int32_t handle);
|
||||
int32_t (*get_resource)(int32_t handle);
|
||||
int32_t (*get_card_used)(int32_t handle, uint32_t *address);
|
||||
int32_t (*set_card_used)(int32_t handle, uint32_t *callback);
|
||||
int32_t (*read_mem_byte)(int32_t handle, uint32_t offset, uint8_t *address);
|
||||
int32_t (*read_mem_word)(int32_t handle, uint32_t offset, uint16_t *address);
|
||||
int32_t (*read_mem_longword)(int32_t handle, uint32_t offset, uint32_t *address);
|
||||
uint8_t (*fast_read_mem_byte)(int32_t handle, uint32_t offset);
|
||||
uint16_t (*fast_read_mem_word)(int32_t handle, uint32_t offset);
|
||||
uint32_t (*fast_read_mem_longword)(int32_t handle, uint32_t offset);
|
||||
int32_t (*write_mem_byte)(int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_mem_word)(int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_mem_longword)(int32_t handle, uint32_t offset, uint32_t val);
|
||||
int32_t (*read_io_byte)(int32_t handle, uint32_t offset, uint8_t *address);
|
||||
int32_t (*read_io_word)(int32_t handle, uint32_t offset, uint16_t *address);
|
||||
int32_t (*read_io_longword)(int32_t handle, uint32_t offset, uint32_t *address);
|
||||
uint8_t (*fast_read_io_byte)(int32_t handle, uint32_t offset);
|
||||
uint16_t (*fast_read_io_word)(int32_t handle, uint32_t offset);
|
||||
uint32_t (*fast_read_io_longword)(int32_t handle, uint32_t offset);
|
||||
int32_t (*write_io_byte)(int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_io_word)(int32_t handle, uint32_t offset, uint16_t val);
|
||||
int32_t (*write_io_longword)(int32_t handle, uint32_t offset, uint32_t val);
|
||||
int32_t (*get_machine_id)(void);
|
||||
int32_t (*get_pagesize)(void);
|
||||
int32_t (*virt_to_bus)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
|
||||
int32_t (*bus_to_virt)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
|
||||
int32_t (*virt_to_phys)(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
int32_t (*phys_to_virt)(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
// int32_t reserved[2];
|
||||
};
|
||||
|
||||
struct mmu_driver_interface
|
||||
{
|
||||
int32_t (*map_page_locked)(uint32_t address, uint32_t length, int asid);
|
||||
int32_t (*unlock_page)(uint32_t address, uint32_t length, int asid);
|
||||
int32_t (*report_locked_pages)(uint32_t *num_itlb, uint32_t *num_dtlb);
|
||||
uint32_t (*map_page_locked)(uint32_t address, uint32_t length, int asid);
|
||||
uint32_t (*unlock_page)(uint32_t address, uint32_t length, int asid);
|
||||
uint32_t (*report_locked_pages)(uint32_t *num_itlb, uint32_t *num_dtlb);
|
||||
uint32_t (*report_pagesize)(void);
|
||||
};
|
||||
|
||||
struct pci_native_driver_interface_0_1
|
||||
{
|
||||
uint32_t (*pci_read_config_longword)(int32_t handle, int offset);
|
||||
uint16_t (*pci_read_config_word)(int32_t handle, int offset);
|
||||
uint8_t (*pci_read_config_byte)(int32_t handle, int offset);
|
||||
|
||||
int32_t (*pci_write_config_longword)(int32_t handle, int offset, uint32_t value);
|
||||
int32_t (*pci_write_config_word)(int32_t handle, int offset, uint16_t value);
|
||||
int32_t (*pci_write_config_byte)(int32_t handle, int offset, uint8_t value);
|
||||
int32_t (*pci_hook_interrupt)(int32_t handle, void *handler, void *parameter);
|
||||
int32_t (*pci_unhook_interrupt)(int32_t handle);
|
||||
|
||||
struct pci_rd * (*pci_get_resource)(int32_t handle);
|
||||
};
|
||||
|
||||
struct pci_native_driver_interface
|
||||
{
|
||||
uint32_t (*pci_read_config_longword)(int32_t handle, int offset);
|
||||
uint16_t (*pci_read_config_word)(int32_t handle, int offset);
|
||||
uint8_t (*pci_read_config_byte)(int32_t handle, int offset);
|
||||
|
||||
int32_t (*pci_write_config_longword)(int32_t handle, int offset, uint32_t value);
|
||||
int32_t (*pci_write_config_word)(int32_t handle, int offset, uint16_t value);
|
||||
int32_t (*pci_write_config_byte)(int32_t handle, int offset, uint8_t value);
|
||||
int32_t (*pci_hook_interrupt)(int32_t handle, void *handler, void *parameter);
|
||||
int32_t (*pci_unhook_interrupt)(int32_t handle);
|
||||
int32_t (*pci_find_device)(uint16_t device_id, uint16_t vendor_id, int index);
|
||||
int32_t (*pci_find_classcode)(uint32_t classcode, int index);
|
||||
struct pci_rd * (*pci_get_resource)(int32_t handle);
|
||||
};
|
||||
|
||||
union interface
|
||||
{
|
||||
struct generic_driver_interface *gdi;
|
||||
@@ -277,6 +189,8 @@ union interface
|
||||
struct framebuffer_driver_interface *fb;
|
||||
struct pci_bios_interface *pci;
|
||||
struct mmu_driver_interface *mmu;
|
||||
struct pci_native_driver_interface_0_1 *pci_native_0_1;
|
||||
struct pci_native_driver_interface *pci_native;
|
||||
};
|
||||
|
||||
struct generic_interface
|
||||
@@ -293,7 +207,7 @@ struct driver_table
|
||||
{
|
||||
uint32_t bas_version;
|
||||
uint32_t bas_revision;
|
||||
void (*remove_handler)(void); /* calling this will disable the BaS' hook into trap #0 */
|
||||
void (*remove_handler)(void); /* calling this will disable the BaS' hook into trap #0 */
|
||||
struct generic_interface *interfaces;
|
||||
};
|
||||
|
||||
|
||||
183
include/ehci.h
183
include/ehci.h
@@ -23,43 +23,42 @@
|
||||
#define USB_EHCI_H
|
||||
|
||||
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 5
|
||||
#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
|
||||
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
|
||||
#endif
|
||||
|
||||
/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
|
||||
#define DeviceRequest \
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
|
||||
|
||||
#define DeviceOutRequest \
|
||||
((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
|
||||
((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
|
||||
|
||||
#define InterfaceRequest \
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
|
||||
#define EndpointRequest \
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
|
||||
#define EndpointOutRequest \
|
||||
((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
|
||||
|
||||
/*
|
||||
* Register Space.
|
||||
*/
|
||||
struct ehci_hccr {
|
||||
uint32_t cr_capbase;
|
||||
struct ehci_hccr
|
||||
{
|
||||
uint32_t cr_capbase;
|
||||
#define HC_LENGTH(p) (((p) >> 0) & 0x00ff)
|
||||
#define HC_VERSION(p) (((p) >> 16) & 0xffff)
|
||||
uint32_t cr_hcsparams;
|
||||
#define HCS_PPC(p) ((p) & (1 << 4))
|
||||
uint32_t cr_hcsparams;
|
||||
#define HCS_PPC(p) ((p) & (1 << 4))
|
||||
#define HCS_INDICATOR(p) ((p) & (1 << 16)) /* Port indicators */
|
||||
#define HCS_N_PORTS(p) (((p) >> 0) & 0xf)
|
||||
uint32_t cr_hccparams;
|
||||
uint8_t cr_hcsp_portrt[8];
|
||||
uint32_t cr_hccparams;
|
||||
uint8_t cr_hcsp_portrt[8];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
struct ehci_hcor {
|
||||
uint32_t or_usbcmd;
|
||||
struct ehci_hcor
|
||||
{
|
||||
uint32_t or_usbcmd;
|
||||
#define CMD_PARK (1 << 11) /* enable "park" */
|
||||
#define CMD_PARK_CNT(c) (((c) >> 8) & 3) /* how many transfers to park */
|
||||
#define CMD_ASE (1 << 5) /* async schedule enable */
|
||||
@@ -68,72 +67,74 @@ struct ehci_hcor {
|
||||
#define CMD_PSE (1 << 4) /* periodic schedule enable */
|
||||
#define CMD_RESET (1 << 1) /* reset HC not bus */
|
||||
#define CMD_RUN (1 << 0) /* start/stop HC */
|
||||
uint32_t or_usbsts;
|
||||
uint32_t or_usbsts;
|
||||
#define STD_ASS (1 << 15)
|
||||
#define STS_PSSTAT (1 << 14)
|
||||
#define STS_RECL ( 1 << 13)
|
||||
#define STS_PSSTAT (1 << 14)
|
||||
#define STS_RECL (1 << 13)
|
||||
#define STS_HALT (1 << 12)
|
||||
#define STS_IAA (1 << 5)
|
||||
#define STS_HSE (1 << 4)
|
||||
#define STS_FLR (1 << 3)
|
||||
#define STS_PCD (1 << 2)
|
||||
#define STS_IAA (1 << 5)
|
||||
#define STS_HSE (1 << 4)
|
||||
#define STS_FLR (1 << 3)
|
||||
#define STS_PCD (1 << 2)
|
||||
#define STS_USBERRINT (1 << 1)
|
||||
#define STS_USBINT (1 << 0)
|
||||
uint32_t or_usbintr;
|
||||
#define INTR_IAAE (1 << 5)
|
||||
#define INTR_HSEE (1 << 4)
|
||||
#define INTR_FLRE (1 << 3)
|
||||
#define INTR_PCDE (1 << 2)
|
||||
#define STS_USBINT (1 << 0)
|
||||
uint32_t or_usbintr;
|
||||
#define INTR_IAAE (1 << 5)
|
||||
#define INTR_HSEE (1 << 4)
|
||||
#define INTR_FLRE (1 << 3)
|
||||
#define INTR_PCDE (1 << 2)
|
||||
#define INTR_USBERRINTE (1 << 1)
|
||||
#define INTR_USBINTE (1 << 0)
|
||||
uint32_t or_frindex;
|
||||
uint32_t or_ctrldssegment;
|
||||
uint32_t or_periodiclistbase;
|
||||
uint32_t or_asynclistaddr;
|
||||
uint32_t _reserved_[9];
|
||||
uint32_t or_configflag;
|
||||
uint32_t or_frindex;
|
||||
uint32_t or_ctrldssegment;
|
||||
uint32_t or_periodiclistbase;
|
||||
uint32_t or_asynclistaddr;
|
||||
uint32_t _reserved_[9];
|
||||
uint32_t or_configflag;
|
||||
#define FLAG_CF (1 << 0) /* true: we'll support "high speed" */
|
||||
uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
|
||||
uint32_t or_systune;
|
||||
uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
|
||||
uint32_t or_systune;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define USBMODE 0x68 /* USB Device mode */
|
||||
#define USBMODE 0x68 /* USB Device mode */
|
||||
#define USBMODE_SDIS (1 << 3) /* Stream disable */
|
||||
#define USBMODE_BE (1 << 2) /* BE/LE endiannes select */
|
||||
#define USBMODE_BE (1 << 2) /* BE/LE endiannes select */
|
||||
#define USBMODE_CM_HC (3 << 0) /* host controller mode */
|
||||
#define USBMODE_CM_IDLE (0 << 0) /* idle state */
|
||||
|
||||
/* Interface descriptor */
|
||||
struct usb_linux_interface_descriptor {
|
||||
unsigned char bLength;
|
||||
unsigned char bDescriptorType;
|
||||
unsigned char bInterfaceNumber;
|
||||
unsigned char bAlternateSetting;
|
||||
unsigned char bNumEndpoints;
|
||||
unsigned char bInterfaceClass;
|
||||
unsigned char bInterfaceSubClass;
|
||||
unsigned char bInterfaceProtocol;
|
||||
unsigned char iInterface;
|
||||
struct usb_linux_interface_descriptor
|
||||
{
|
||||
unsigned char bLength;
|
||||
unsigned char bDescriptorType;
|
||||
unsigned char bInterfaceNumber;
|
||||
unsigned char bAlternateSetting;
|
||||
unsigned char bNumEndpoints;
|
||||
unsigned char bInterfaceClass;
|
||||
unsigned char bInterfaceSubClass;
|
||||
unsigned char bInterfaceProtocol;
|
||||
unsigned char iInterface;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* Configuration descriptor information.. */
|
||||
struct usb_linux_config_descriptor {
|
||||
unsigned char bLength;
|
||||
unsigned char bDescriptorType;
|
||||
unsigned short wTotalLength;
|
||||
unsigned char bNumInterfaces;
|
||||
unsigned char bConfigurationValue;
|
||||
unsigned char iConfiguration;
|
||||
unsigned char bmAttributes;
|
||||
unsigned char MaxPower;
|
||||
struct usb_linux_config_descriptor
|
||||
{
|
||||
unsigned char bLength;
|
||||
unsigned char bDescriptorType;
|
||||
unsigned short wTotalLength;
|
||||
unsigned char bNumInterfaces;
|
||||
unsigned char bConfigurationValue;
|
||||
unsigned char iConfiguration;
|
||||
unsigned char bmAttributes;
|
||||
unsigned char MaxPower;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#if defined CONFIG_EHCI_DESC_BIG_ENDIAN
|
||||
#define ehci_readl(x) (*((volatile u32 *)(x)))
|
||||
#define ehci_writel(a, b) (*((volatile u32 *)(a)) = ((volatile u32)b))
|
||||
#define ehci_readl(x) (*((volatile uint32_t *)(x)))
|
||||
#define ehci_writel(a, b) (*((volatile uint32_t *)(a)) = ((volatile uint32_t) b))
|
||||
#else
|
||||
#define ehci_readl(x) swpl((*((volatile u32 *)(x))))
|
||||
#define ehci_writel(a, b) (*((volatile u32 *)(a)) = swpl(((volatile u32)b)))
|
||||
#define ehci_readl(x) swpl((*((volatile uint32_t *)(x))))
|
||||
#define ehci_writel(a, b) (*((volatile uint32_t *)(a)) = swpl(((volatile uint32_t) b)))
|
||||
#endif
|
||||
|
||||
#if defined CONFIG_EHCI_MMIO_BIG_ENDIAN
|
||||
@@ -147,18 +148,18 @@ struct usb_linux_config_descriptor {
|
||||
#define EHCI_PS_WKOC_E (1 << 22) /* RW wake on over current */
|
||||
#define EHCI_PS_WKDSCNNT_E (1 << 21) /* RW wake on disconnect */
|
||||
#define EHCI_PS_WKCNNT_E (1 << 20) /* RW wake on connect */
|
||||
#define EHCI_PS_PO (1 << 13) /* RW port owner */
|
||||
#define EHCI_PS_PP (1 << 12) /* RW,RO port power */
|
||||
#define EHCI_PS_LS (3 << 10) /* RO line status */
|
||||
#define EHCI_PS_PR (1 << 8) /* RW port reset */
|
||||
#define EHCI_PS_SUSP (1 << 7) /* RW suspend */
|
||||
#define EHCI_PS_FPR (1 << 6) /* RW force port resume */
|
||||
#define EHCI_PS_OCC (1 << 5) /* RWC over current change */
|
||||
#define EHCI_PS_OCA (1 << 4) /* RO over current active */
|
||||
#define EHCI_PS_PEC (1 << 3) /* RWC port enable change */
|
||||
#define EHCI_PS_PE (1 << 2) /* RW port enable */
|
||||
#define EHCI_PS_CSC (1 << 1) /* RWC connect status change */
|
||||
#define EHCI_PS_CS (1 << 0) /* RO connect status */
|
||||
#define EHCI_PS_PO (1 << 13) /* RW port owner */
|
||||
#define EHCI_PS_PP (1 << 12) /* RW,RO port power */
|
||||
#define EHCI_PS_LS (3 << 10) /* RO line status */
|
||||
#define EHCI_PS_PR (1 << 8) /* RW port reset */
|
||||
#define EHCI_PS_SUSP (1 << 7) /* RW suspend */
|
||||
#define EHCI_PS_FPR (1 << 6) /* RW force port resume */
|
||||
#define EHCI_PS_OCC (1 << 5) /* RWC over current change */
|
||||
#define EHCI_PS_OCA (1 << 4) /* RO over current active */
|
||||
#define EHCI_PS_PEC (1 << 3) /* RWC port enable change */
|
||||
#define EHCI_PS_PE (1 << 2) /* RW port enable */
|
||||
#define EHCI_PS_CSC (1 << 1) /* RWC connect status change */
|
||||
#define EHCI_PS_CS (1 << 0) /* RO connect status */
|
||||
#define EHCI_PS_CLEAR (EHCI_PS_OCC | EHCI_PS_PEC | EHCI_PS_CSC)
|
||||
|
||||
#define EHCI_PS_IS_LOWSPEED(x) (((x) & EHCI_PS_LS) == (1 << 10))
|
||||
@@ -174,31 +175,33 @@ struct usb_linux_config_descriptor {
|
||||
*/
|
||||
|
||||
/* Queue Element Transfer Descriptor (qTD). */
|
||||
struct qTD {
|
||||
uint32_t qt_next;
|
||||
struct qTD
|
||||
{
|
||||
uint32_t qt_next;
|
||||
#define QT_NEXT_TERMINATE 1
|
||||
uint32_t qt_altnext;
|
||||
uint32_t qt_token;
|
||||
uint32_t qt_buffer[5];
|
||||
uint32_t qt_altnext;
|
||||
uint32_t qt_token;
|
||||
uint32_t qt_buffer[5];
|
||||
};
|
||||
|
||||
/* Queue Head (QH). */
|
||||
struct QH {
|
||||
uint32_t qh_link;
|
||||
struct QH
|
||||
{
|
||||
uint32_t qh_link;
|
||||
#define QH_LINK_TERMINATE 1
|
||||
#define QH_LINK_TYPE_ITD 0
|
||||
#define QH_LINK_TYPE_QH 2
|
||||
#define QH_LINK_TYPE_SITD 4
|
||||
#define QH_LINK_TYPE_FSTN 6
|
||||
uint32_t qh_endpt1;
|
||||
uint32_t qh_endpt2;
|
||||
uint32_t qh_curtd;
|
||||
struct qTD qh_overlay;
|
||||
/*
|
||||
* Add dummy fill value to make the size of this struct
|
||||
* aligned to 32 bytes
|
||||
*/
|
||||
uint8_t fill[16];
|
||||
uint32_t qh_endpt1;
|
||||
uint32_t qh_endpt2;
|
||||
uint32_t qh_curtd;
|
||||
struct qTD qh_overlay;
|
||||
/*
|
||||
* Add dummy fill value to make the size of this struct
|
||||
* aligned to 32 bytes
|
||||
*/
|
||||
uint8_t fill[16];
|
||||
};
|
||||
|
||||
/* Low level init functions */
|
||||
|
||||
@@ -1,28 +1,8 @@
|
||||
#ifndef _EXCEPTIONS_H_
|
||||
#define _EXCEPTIONS_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
static inline uint32_t set_ipl(uint32_t ipl)
|
||||
{
|
||||
uint32_t ret;
|
||||
|
||||
__asm__ __volatile__(
|
||||
" move.w sr,%[ret]\r\n" /* retrieve status register */
|
||||
" andi.l #0x07,%[ipl]\n\t" /* mask out ipl bits on new value */
|
||||
" lsl.l #8,%[ipl]\n\t" /* shift them to position */
|
||||
" move.l %[ret],d0\n\t" /* retrieve original value */
|
||||
" andi.l #0x0000f8ff,d0\n\t" /* clear ipl part */
|
||||
" or.l %[ipl],d0\n\t" /* or in new value */
|
||||
" move.w d0,sr\n\t" /* put it in place */
|
||||
" andi.l #0x0700,%[ret]\r\n" /* mask out ipl bits */
|
||||
" lsr.l #8,%[ret]\r\n" /* shift them to position */
|
||||
: [ret] "=&d" (ret) /* output */
|
||||
: [ipl] "d" (ipl) /* input */
|
||||
: "d0" /* clobber */
|
||||
);
|
||||
|
||||
return ret;
|
||||
}
|
||||
extern uint32_t set_ipl(uint32_t ipl);
|
||||
|
||||
#endif /* _EXCEPTIONS_H_ */
|
||||
|
||||
844
include/fb.h
844
include/fb.h
@@ -1,196 +1,206 @@
|
||||
#ifndef _FB_H
|
||||
#define _FB_H
|
||||
|
||||
/* Definitions of frame buffers */
|
||||
#include "bas_types.h"
|
||||
|
||||
#define FB_MAJOR 29
|
||||
#define FB_MAX 32 /* sufficient for now */
|
||||
/* Definitions of frame buffers */
|
||||
|
||||
/* ioctls
|
||||
0x46 is 'F' */
|
||||
#define FBIOGET_VSCREENINFO 0x4600
|
||||
#define FBIOPUT_VSCREENINFO 0x4601
|
||||
#define FBIOGET_FSCREENINFO 0x4602
|
||||
#define FBIOPAN_DISPLAY 0x4606
|
||||
#define FBIOBLANK 0x4611 /* arg: 0 or vesa level + 1 */
|
||||
#define FBIO_ALLOC 0x4613
|
||||
#define FBIO_FREE 0x4614
|
||||
#define FB_MAJOR 29
|
||||
#define FB_MAX 32 /* sufficient for now */
|
||||
|
||||
/* ioctls 0x46 is 'F' */
|
||||
#define FBIOGET_VSCREENINFO 0x4600
|
||||
#define FBIOPUT_VSCREENINFO 0x4601
|
||||
#define FBIOGET_FSCREENINFO 0x4602
|
||||
#define FBIOPAN_DISPLAY 0x4606
|
||||
#define FBIOBLANK 0x4611 /* arg: 0 or vesa level + 1 */
|
||||
#define FBIO_ALLOC 0x4613
|
||||
#define FBIO_FREE 0x4614
|
||||
|
||||
/* picture format */
|
||||
#define PICT_FORMAT(bpp,type,a,r,g,b) (((bpp) << 24) | ((type) << 16) | ((a) << 12) | ((r) << 8) | ((g) << 4) | ((b)))
|
||||
#define PICT_FORMAT(bpp, type, a, r, g, b) (((bpp) << 24) | ((type) << 16) | ((a) << 12) | ((r) << 8) | ((g) << 4) | ((b)))
|
||||
|
||||
/* gray/color formats use a visual index instead of argb */
|
||||
#define PICT_VISFORMAT(bpp,type,vi) (((bpp) << 24) | ((type) << 16) | ((vi)))
|
||||
#define PICT_FORMAT_BPP(f) (((f) >> 24) )
|
||||
#define PICT_FORMAT_TYPE(f) (((f) >> 16) & 0xff)
|
||||
#define PICT_FORMAT_A(f) (((f) >> 12) & 0x0f)
|
||||
#define PICT_FORMAT_R(f) (((f) >> 8) & 0x0f)
|
||||
#define PICT_FORMAT_G(f) (((f) >> 4) & 0x0f)
|
||||
#define PICT_FORMAT_B(f) (((f) ) & 0x0f)
|
||||
#define PICT_FORMAT_RGB(f) (((f) ) & 0xfff)
|
||||
#define PICT_FORMAT_VIS(f) (((f) ) & 0xffff)
|
||||
#define PICT_TYPE_OTHER 0
|
||||
#define PICT_TYPE_A 1
|
||||
#define PICT_TYPE_ARGB 2
|
||||
#define PICT_TYPE_ABGR 3
|
||||
#define PICT_TYPE_COLOR 4
|
||||
#define PICT_TYPE_GRAY 5
|
||||
#define PICT_FORMAT_COLOR(f) (PICT_FORMAT_TYPE(f) & 2)
|
||||
#define PICT_VISFORMAT(bpp, type, vi) (((bpp) << 24) | ((type) << 16) | ((vi)))
|
||||
#define PICT_FORMAT_BPP(f) (((f) >> 24) )
|
||||
#define PICT_FORMAT_TYPE(f) (((f) >> 16) & 0xff)
|
||||
#define PICT_FORMAT_A(f) (((f) >> 12) & 0x0f)
|
||||
#define PICT_FORMAT_R(f) (((f) >> 8) & 0x0f)
|
||||
#define PICT_FORMAT_G(f) (((f) >> 4) & 0x0f)
|
||||
#define PICT_FORMAT_B(f) (((f) ) & 0x0f)
|
||||
#define PICT_FORMAT_RGB(f) (((f) ) & 0xfff)
|
||||
#define PICT_FORMAT_VIS(f) (((f) ) & 0xffff)
|
||||
|
||||
#define PICT_TYPE_OTHER 0
|
||||
#define PICT_TYPE_A 1
|
||||
#define PICT_TYPE_ARGB 2
|
||||
#define PICT_TYPE_ABGR 3
|
||||
#define PICT_TYPE_COLOR 4
|
||||
#define PICT_TYPE_GRAY 5
|
||||
#define PICT_FORMAT_COLOR(f) (PICT_FORMAT_TYPE(f) & 2)
|
||||
|
||||
/* 32bpp formats */
|
||||
#define PICT_a8r8g8b8 PICT_FORMAT(32,PICT_TYPE_ARGB,8,8,8,8)
|
||||
#define PICT_x8r8g8b8 PICT_FORMAT(32,PICT_TYPE_ARGB,0,8,8,8)
|
||||
#define PICT_a8b8g8r8 PICT_FORMAT(32,PICT_TYPE_ABGR,8,8,8,8)
|
||||
#define PICT_x8b8g8r8 PICT_FORMAT(32,PICT_TYPE_ABGR,0,8,8,8)
|
||||
#define PICT_a8r8g8b8 PICT_FORMAT(32, PICT_TYPE_ARGB, 8, 8, 8, 8)
|
||||
#define PICT_x8r8g8b8 PICT_FORMAT(32, PICT_TYPE_ARGB, 0, 8, 8, 8)
|
||||
#define PICT_a8b8g8r8 PICT_FORMAT(32, PICT_TYPE_ABGR, 8, 8, 8, 8)
|
||||
#define PICT_x8b8g8r8 PICT_FORMAT(32, PICT_TYPE_ABGR, 0, 8, 8, 8)
|
||||
|
||||
/* 24bpp formats */
|
||||
#define PICT_r8g8b8 PICT_FORMAT(24,PICT_TYPE_ARGB,0,8,8,8)
|
||||
#define PICT_b8g8r8 PICT_FORMAT(24,PICT_TYPE_ABGR,0,8,8,8)
|
||||
#define PICT_r8g8b8 PICT_FORMAT(24, PICT_TYPE_ARGB, 0, 8, 8, 8)
|
||||
#define PICT_b8g8r8 PICT_FORMAT(24, PICT_TYPE_ABGR, 0, 8, 8, 8)
|
||||
|
||||
/* 16bpp formats */
|
||||
#define PICT_r5g6b5 PICT_FORMAT(16,PICT_TYPE_ARGB,0,5,6,5)
|
||||
#define PICT_b5g6r5 PICT_FORMAT(16,PICT_TYPE_ABGR,0,5,6,5)
|
||||
#define PICT_a1r5g5b5 PICT_FORMAT(16,PICT_TYPE_ARGB,1,5,5,5)
|
||||
#define PICT_x1r5g5b5 PICT_FORMAT(16,PICT_TYPE_ARGB,0,5,5,5)
|
||||
#define PICT_a1b5g5r5 PICT_FORMAT(16,PICT_TYPE_ABGR,1,5,5,5)
|
||||
#define PICT_x1b5g5r5 PICT_FORMAT(16,PICT_TYPE_ABGR,0,5,5,5)
|
||||
#define PICT_a4r4g4b4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4)
|
||||
#define PICT_x4r4g4b4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4)
|
||||
#define PICT_a4b4g4r4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4)
|
||||
#define PICT_x4b4g4r4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4)
|
||||
#define PICT_r5g6b5 PICT_FORMAT(16, PICT_TYPE_ARGB, 0, 5, 6, 5)
|
||||
#define PICT_b5g6r5 PICT_FORMAT(16, PICT_TYPE_ABGR, 0, 5, 6, 5)
|
||||
#define PICT_a1r5g5b5 PICT_FORMAT(16, PICT_TYPE_ARGB, 1, 5, 5, 5)
|
||||
#define PICT_x1r5g5b5 PICT_FORMAT(16, PICT_TYPE_ARGB, 0, 5, 5, 5)
|
||||
#define PICT_a1b5g5r5 PICT_FORMAT(16, PICT_TYPE_ABGR, 1, 5, 5, 5)
|
||||
#define PICT_x1b5g5r5 PICT_FORMAT(16, PICT_TYPE_ABGR, 0, 5, 5, 5)
|
||||
#define PICT_a4r4g4b4 PICT_FORMAT(16, PICT_TYPE_ARGB, 4, 4, 4, 4)
|
||||
#define PICT_x4r4g4b4 PICT_FORMAT(16, PICT_TYPE_ARGB, 4, 4, 4, 4)
|
||||
#define PICT_a4b4g4r4 PICT_FORMAT(16, PICT_TYPE_ARGB, 4, 4, 4, 4)
|
||||
#define PICT_x4b4g4r4 PICT_FORMAT(16, PICT_TYPE_ARGB, 4, 4, 4, 4)
|
||||
|
||||
/* 8bpp formats */
|
||||
#define PICT_a8 PICT_FORMAT(8,PICT_TYPE_A,8,0,0,0)
|
||||
#define PICT_r3g3b2 PICT_FORMAT(8,PICT_TYPE_ARGB,0,3,3,2)
|
||||
#define PICT_b2g3r3 PICT_FORMAT(8,PICT_TYPE_ABGR,0,3,3,2)
|
||||
#define PICT_a2r2g2b2 PICT_FORMAT(8,PICT_TYPE_ARGB,2,2,2,2)
|
||||
#define PICT_a2b2g2r2 PICT_FORMAT(8,PICT_TYPE_ABGR,2,2,2,2)
|
||||
#define PICT_c8 PICT_FORMAT(8,PICT_TYPE_COLOR,0,0,0,0)
|
||||
#define PICT_g8 PICT_FORMAT(8,PICT_TYPE_GRAY,0,0,0,0)
|
||||
#define PICT_a8 PICT_FORMAT(8, PICT_TYPE_A, 8, 0, 0, 0)
|
||||
#define PICT_r3g3b2 PICT_FORMAT(8, PICT_TYPE_ARGB, 0, 3, 3, 2)
|
||||
#define PICT_b2g3r3 PICT_FORMAT(8, PICT_TYPE_ABGR, 0, 3, 3, 2)
|
||||
#define PICT_a2r2g2b2 PICT_FORMAT(8, PICT_TYPE_ARGB, 2, 2, 2, 2)
|
||||
#define PICT_a2b2g2r2 PICT_FORMAT(8, PICT_TYPE_ABGR, 2, 2, 2, 2)
|
||||
#define PICT_c8 PICT_FORMAT(8, PICT_TYPE_COLOR, 0, 0, 0, 0)
|
||||
#define PICT_g8 PICT_FORMAT(8, PICT_TYPE_GRAY, 0, 0, 0, 0)
|
||||
|
||||
/* fVDI */
|
||||
#define MODE_EMUL_MONO_FLAG 1
|
||||
#define MODE_VESA_FLAG 2 /* for modedb.c */
|
||||
struct mode_option {
|
||||
short used; /* Whether the mode option was used or not. */
|
||||
short width;
|
||||
short height;
|
||||
short bpp;
|
||||
short freq;
|
||||
short flags;
|
||||
#define MODE_EMUL_MONO_FLAG 1
|
||||
#define MODE_VESA_FLAG 2 /* for modedb.c */
|
||||
|
||||
struct mode_option
|
||||
{
|
||||
short used; /* Whether the mode option was used or not. */
|
||||
short width;
|
||||
short height;
|
||||
short bpp;
|
||||
short freq;
|
||||
short flags;
|
||||
};
|
||||
|
||||
extern struct mode_option resolution; /* fVDI */
|
||||
|
||||
#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
|
||||
#define FB_TYPE_PLANES 1 /* Non interleaved planes */
|
||||
#define FB_TYPE_INTERLEAVED_PLANES 2 /* Interleaved planes */
|
||||
#define FB_TYPE_TEXT 3 /* Text/attributes */
|
||||
#define FB_TYPE_VGA_PLANES 4 /* EGA/VGA planes */
|
||||
#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
|
||||
#define FB_TYPE_PLANES 1 /* Non interleaved planes */
|
||||
#define FB_TYPE_INTERLEAVED_PLANES 2 /* Interleaved planes */
|
||||
#define FB_TYPE_TEXT 3 /* Text/attributes */
|
||||
#define FB_TYPE_VGA_PLANES 4 /* EGA/VGA planes */
|
||||
|
||||
#define FB_AUX_TEXT_MDA 0 /* Monochrome text */
|
||||
#define FB_AUX_TEXT_CGA 1 /* CGA/EGA/VGA Color text */
|
||||
#define FB_AUX_TEXT_S3_MMIO 2 /* S3 MMIO fasttext */
|
||||
#define FB_AUX_TEXT_MGA_STEP16 3 /* MGA Millenium I: text, attr, 14 reserved bytes */
|
||||
#define FB_AUX_TEXT_MGA_STEP8 4 /* other MGAs: text, attr, 6 reserved bytes */
|
||||
#define FB_AUX_TEXT_MDA 0 /* Monochrome text */
|
||||
#define FB_AUX_TEXT_CGA 1 /* CGA/EGA/VGA Color text */
|
||||
#define FB_AUX_TEXT_S3_MMIO 2 /* S3 MMIO fasttext */
|
||||
#define FB_AUX_TEXT_MGA_STEP16 3 /* MGA Millenium I: text, attr, 14 reserved bytes */
|
||||
#define FB_AUX_TEXT_MGA_STEP8 4 /* other MGAs: text, attr, 6 reserved bytes */
|
||||
|
||||
#define FB_AUX_VGA_PLANES_VGA4 0 /* 16 color planes (EGA/VGA) */
|
||||
#define FB_AUX_VGA_PLANES_CFB4 1 /* CFB4 in planes (VGA) */
|
||||
#define FB_AUX_VGA_PLANES_CFB8 2 /* CFB8 in planes (VGA) */
|
||||
#define FB_AUX_VGA_PLANES_VGA4 0 /* 16 color planes (EGA/VGA) */
|
||||
#define FB_AUX_VGA_PLANES_CFB4 1 /* CFB4 in planes (VGA) */
|
||||
#define FB_AUX_VGA_PLANES_CFB8 2 /* CFB8 in planes (VGA) */
|
||||
|
||||
#define FB_VISUAL_MONO01 0 /* Monochr. 1=Black 0=White */
|
||||
#define FB_VISUAL_MONO10 1 /* Monochr. 1=White 0=Black */
|
||||
#define FB_VISUAL_TRUECOLOR 2 /* True color */
|
||||
#define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */
|
||||
#define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */
|
||||
#define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */
|
||||
#define FB_VISUAL_MONO01 0 /* Monochr. 1=Black 0=White */
|
||||
#define FB_VISUAL_MONO10 1 /* Monochr. 1=White 0=Black */
|
||||
#define FB_VISUAL_TRUECOLOR 2 /* True color */
|
||||
#define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */
|
||||
#define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */
|
||||
#define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */
|
||||
|
||||
#define FB_ACCEL_NONE 0 /* no hardware accelerator */
|
||||
#define FB_ACCEL_ATARIBLITT 1 /* Atari Blitter */
|
||||
#define FB_ACCEL_AMIGABLITT 2 /* Amiga Blitter */
|
||||
#define FB_ACCEL_S3_TRIO64 3 /* Cybervision64 (S3 Trio64) */
|
||||
#define FB_ACCEL_NCR_77C32BLT 4 /* RetinaZ3 (NCR 77C32BLT) */
|
||||
#define FB_ACCEL_S3_VIRGE 5 /* Cybervision64/3D (S3 ViRGE) */
|
||||
#define FB_ACCEL_ATI_MACH64GX 6 /* ATI Mach 64GX family */
|
||||
#define FB_ACCEL_DEC_TGA 7 /* DEC 21030 TGA */
|
||||
#define FB_ACCEL_ATI_MACH64CT 8 /* ATI Mach 64CT family */
|
||||
#define FB_ACCEL_ATI_MACH64VT 9 /* ATI Mach 64CT family VT class */
|
||||
#define FB_ACCEL_ATI_MACH64GT 10 /* ATI Mach 64CT family GT class */
|
||||
#define FB_ACCEL_SUN_CREATOR 11 /* Sun Creator/Creator3D */
|
||||
#define FB_ACCEL_SUN_CGSIX 12 /* Sun cg6 */
|
||||
#define FB_ACCEL_SUN_LEO 13 /* Sun leo/zx */
|
||||
#define FB_ACCEL_IMS_TWINTURBO 14 /* IMS Twin Turbo */
|
||||
#define FB_ACCEL_3DLABS_PERMEDIA2 15 /* 3Dlabs Permedia 2 */
|
||||
#define FB_ACCEL_MATROX_MGA2064W 16 /* Matrox MGA2064W (Millenium) */
|
||||
#define FB_ACCEL_MATROX_MGA1064SG 17 /* Matrox MGA1064SG (Mystique) */
|
||||
#define FB_ACCEL_MATROX_MGA2164W 18 /* Matrox MGA2164W (Millenium II) */
|
||||
#define FB_ACCEL_MATROX_MGA2164W_AGP 19 /* Matrox MGA2164W (Millenium II) */
|
||||
#define FB_ACCEL_MATROX_MGAG100 20 /* Matrox G100 (Productiva G100) */
|
||||
#define FB_ACCEL_MATROX_MGAG200 21 /* Matrox G200 (Myst, Mill, ...) */
|
||||
#define FB_ACCEL_SUN_CG14 22 /* Sun cgfourteen */
|
||||
#define FB_ACCEL_SUN_BWTWO 23 /* Sun bwtwo */
|
||||
#define FB_ACCEL_SUN_CGTHREE 24 /* Sun cgthree */
|
||||
#define FB_ACCEL_SUN_TCX 25 /* Sun tcx */
|
||||
#define FB_ACCEL_MATROX_MGAG400 26 /* Matrox G400 */
|
||||
#define FB_ACCEL_NV3 27 /* nVidia RIVA 128 */
|
||||
#define FB_ACCEL_NV4 28 /* nVidia RIVA TNT */
|
||||
#define FB_ACCEL_NV5 29 /* nVidia RIVA TNT2 */
|
||||
#define FB_ACCEL_CT_6555x 30 /* C&T 6555x */
|
||||
#define FB_ACCEL_3DFX_BANSHEE 31 /* 3Dfx Banshee */
|
||||
#define FB_ACCEL_ATI_RAGE128 32 /* ATI Rage128 family */
|
||||
#define FB_ACCEL_IGS_CYBER2000 33 /* CyberPro 2000 */
|
||||
#define FB_ACCEL_IGS_CYBER2010 34 /* CyberPro 2010 */
|
||||
#define FB_ACCEL_IGS_CYBER5000 35 /* CyberPro 5000 */
|
||||
#define FB_ACCEL_SIS_GLAMOUR 36 /* SiS 300/630/540 */
|
||||
#define FB_ACCEL_3DLABS_PERMEDIA3 37 /* 3Dlabs Permedia 3 */
|
||||
#define FB_ACCEL_ATI_RADEON 38 /* ATI Radeon family */
|
||||
#define FB_ACCEL_I810 39 /* Intel 810/815 */
|
||||
#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */
|
||||
#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */
|
||||
#define FB_ACCEL_I830 42 /* Intel 830M/845G/85x/865G */
|
||||
#define FB_ACCEL_NV_10 43 /* nVidia Arch 10 */
|
||||
#define FB_ACCEL_NV_20 44 /* nVidia Arch 20 */
|
||||
#define FB_ACCEL_NV_30 45 /* nVidia Arch 30 */
|
||||
#define FB_ACCEL_NV_40 46 /* nVidia Arch 40 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2097 93 /* NeoMagic NM2097 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2160 94 /* NeoMagic NM2160 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2200 95 /* NeoMagic NM2200 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */
|
||||
#define FB_ACCEL_NONE 0 /* no hardware accelerator */
|
||||
#define FB_ACCEL_ATARIBLITT 1 /* Atari Blitter */
|
||||
#define FB_ACCEL_AMIGABLITT 2 /* Amiga Blitter */
|
||||
#define FB_ACCEL_S3_TRIO64 3 /* Cybervision64 (S3 Trio64) */
|
||||
#define FB_ACCEL_NCR_77C32BLT 4 /* RetinaZ3 (NCR 77C32BLT) */
|
||||
#define FB_ACCEL_S3_VIRGE 5 /* Cybervision64/3D (S3 ViRGE) */
|
||||
#define FB_ACCEL_ATI_MACH64GX 6 /* ATI Mach 64GX family */
|
||||
#define FB_ACCEL_DEC_TGA 7 /* DEC 21030 TGA */
|
||||
#define FB_ACCEL_ATI_MACH64CT 8 /* ATI Mach 64CT family */
|
||||
#define FB_ACCEL_ATI_MACH64VT 9 /* ATI Mach 64CT family VT class */
|
||||
#define FB_ACCEL_ATI_MACH64GT 10 /* ATI Mach 64CT family GT class */
|
||||
#define FB_ACCEL_SUN_CREATOR 11 /* Sun Creator/Creator3D */
|
||||
#define FB_ACCEL_SUN_CGSIX 12 /* Sun cg6 */
|
||||
#define FB_ACCEL_SUN_LEO 13 /* Sun leo/zx */
|
||||
#define FB_ACCEL_IMS_TWINTURBO 14 /* IMS Twin Turbo */
|
||||
#define FB_ACCEL_3DLABS_PERMEDIA2 15 /* 3Dlabs Permedia 2 */
|
||||
#define FB_ACCEL_MATROX_MGA2064W 16 /* Matrox MGA2064W (Millenium) */
|
||||
#define FB_ACCEL_MATROX_MGA1064SG 17 /* Matrox MGA1064SG (Mystique) */
|
||||
#define FB_ACCEL_MATROX_MGA2164W 18 /* Matrox MGA2164W (Millenium II) */
|
||||
#define FB_ACCEL_MATROX_MGA2164W_AGP 19 /* Matrox MGA2164W (Millenium II) */
|
||||
#define FB_ACCEL_MATROX_MGAG100 20 /* Matrox G100 (Productiva G100) */
|
||||
#define FB_ACCEL_MATROX_MGAG200 21 /* Matrox G200 (Myst, Mill, ...) */
|
||||
#define FB_ACCEL_SUN_CG14 22 /* Sun cgfourteen */
|
||||
#define FB_ACCEL_SUN_BWTWO 23 /* Sun bwtwo */
|
||||
#define FB_ACCEL_SUN_CGTHREE 24 /* Sun cgthree */
|
||||
#define FB_ACCEL_SUN_TCX 25 /* Sun tcx */
|
||||
#define FB_ACCEL_MATROX_MGAG400 26 /* Matrox G400 */
|
||||
#define FB_ACCEL_NV3 27 /* nVidia RIVA 128 */
|
||||
#define FB_ACCEL_NV4 28 /* nVidia RIVA TNT */
|
||||
#define FB_ACCEL_NV5 29 /* nVidia RIVA TNT2 */
|
||||
#define FB_ACCEL_CT_6555x 30 /* C&T 6555x */
|
||||
#define FB_ACCEL_3DFX_BANSHEE 31 /* 3Dfx Banshee */
|
||||
#define FB_ACCEL_ATI_RAGE128 32 /* ATI Rage128 family */
|
||||
#define FB_ACCEL_IGS_CYBER2000 33 /* CyberPro 2000 */
|
||||
#define FB_ACCEL_IGS_CYBER2010 34 /* CyberPro 2010 */
|
||||
#define FB_ACCEL_IGS_CYBER5000 35 /* CyberPro 5000 */
|
||||
#define FB_ACCEL_SIS_GLAMOUR 36 /* SiS 300/630/540 */
|
||||
#define FB_ACCEL_3DLABS_PERMEDIA3 37 /* 3Dlabs Permedia 3 */
|
||||
#define FB_ACCEL_ATI_RADEON 38 /* ATI Radeon family */
|
||||
#define FB_ACCEL_I810 39 /* Intel 810/815 */
|
||||
#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */
|
||||
#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */
|
||||
#define FB_ACCEL_I830 42 /* Intel 830M/845G/85x/865G */
|
||||
#define FB_ACCEL_NV_10 43 /* nVidia Arch 10 */
|
||||
#define FB_ACCEL_NV_20 44 /* nVidia Arch 20 */
|
||||
#define FB_ACCEL_NV_30 45 /* nVidia Arch 30 */
|
||||
#define FB_ACCEL_NV_40 46 /* nVidia Arch 40 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2097 93 /* NeoMagic NM2097 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2160 94 /* NeoMagic NM2160 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2200 95 /* NeoMagic NM2200 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */
|
||||
#define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */
|
||||
|
||||
#define FB_ACCEL_SAVAGE4 0x80 /* S3 Savage4 */
|
||||
#define FB_ACCEL_SAVAGE3D 0x81 /* S3 Savage3D */
|
||||
#define FB_ACCEL_SAVAGE3D_MV 0x82 /* S3 Savage3D-MV */
|
||||
#define FB_ACCEL_SAVAGE2000 0x83 /* S3 Savage2000 */
|
||||
#define FB_ACCEL_SAVAGE_MX_MV 0x84 /* S3 Savage/MX-MV */
|
||||
#define FB_ACCEL_SAVAGE_MX 0x85 /* S3 Savage/MX */
|
||||
#define FB_ACCEL_SAVAGE_IX_MV 0x86 /* S3 Savage/IX-MV */
|
||||
#define FB_ACCEL_SAVAGE_IX 0x87 /* S3 Savage/IX */
|
||||
#define FB_ACCEL_PROSAVAGE_PM 0x88 /* S3 ProSavage PM133 */
|
||||
#define FB_ACCEL_PROSAVAGE_KM 0x89 /* S3 ProSavage KM133 */
|
||||
#define FB_ACCEL_S3TWISTER_P 0x8a /* S3 Twister */
|
||||
#define FB_ACCEL_S3TWISTER_K 0x8b /* S3 TwisterK */
|
||||
#define FB_ACCEL_SUPERSAVAGE 0x8c /* S3 Supersavage */
|
||||
#define FB_ACCEL_PROSAVAGE_DDR 0x8d /* S3 ProSavage DDR */
|
||||
#define FB_ACCEL_PROSAVAGE_DDRK 0x8e /* S3 ProSavage DDR-K */
|
||||
#define FB_ACCEL_SAVAGE4 0x80 /* S3 Savage4 */
|
||||
#define FB_ACCEL_SAVAGE3D 0x81 /* S3 Savage3D */
|
||||
#define FB_ACCEL_SAVAGE3D_MV 0x82 /* S3 Savage3D-MV */
|
||||
#define FB_ACCEL_SAVAGE2000 0x83 /* S3 Savage2000 */
|
||||
#define FB_ACCEL_SAVAGE_MX_MV 0x84 /* S3 Savage/MX-MV */
|
||||
#define FB_ACCEL_SAVAGE_MX 0x85 /* S3 Savage/MX */
|
||||
#define FB_ACCEL_SAVAGE_IX_MV 0x86 /* S3 Savage/IX-MV */
|
||||
#define FB_ACCEL_SAVAGE_IX 0x87 /* S3 Savage/IX */
|
||||
#define FB_ACCEL_PROSAVAGE_PM 0x88 /* S3 ProSavage PM133 */
|
||||
#define FB_ACCEL_PROSAVAGE_KM 0x89 /* S3 ProSavage KM133 */
|
||||
#define FB_ACCEL_S3TWISTER_P 0x8a /* S3 Twister */
|
||||
#define FB_ACCEL_S3TWISTER_K 0x8b /* S3 TwisterK */
|
||||
#define FB_ACCEL_SUPERSAVAGE 0x8c /* S3 Supersavage */
|
||||
#define FB_ACCEL_PROSAVAGE_DDR 0x8d /* S3 ProSavage DDR */
|
||||
#define FB_ACCEL_PROSAVAGE_DDRK 0x8e /* S3 ProSavage DDR-K */
|
||||
|
||||
struct fb_fix_screeninfo {
|
||||
char id[16]; /* identification string eg "TT Builtin" */
|
||||
unsigned long smem_start; /* Start of frame buffer mem */
|
||||
/* (physical address) */
|
||||
unsigned long smem_len; /* Length of frame buffer mem */
|
||||
unsigned long type; /* see FB_TYPE_* */
|
||||
unsigned long type_aux; /* Interleave for interleaved Planes */
|
||||
unsigned long visual; /* see FB_VISUAL_* */
|
||||
unsigned short xpanstep; /* zero if no hardware panning */
|
||||
unsigned short ypanstep; /* zero if no hardware panning */
|
||||
unsigned short ywrapstep; /* zero if no hardware ywrap */
|
||||
unsigned long line_length; /* length of a line in bytes */
|
||||
unsigned long mmio_start; /* Start of Memory Mapped I/O */
|
||||
/* (physical address) */
|
||||
unsigned long mmio_len; /* Length of Memory Mapped I/O */
|
||||
unsigned long accel; /* Indicate to driver which */
|
||||
/* specific chip/card we have */
|
||||
unsigned short reserved[3]; /* Reserved for future compatibility */
|
||||
struct fb_fix_screeninfo
|
||||
{
|
||||
char id[16]; /* identification string eg "TT Builtin" */
|
||||
uint32_t smem_start; /* Start of frame buffer mem */
|
||||
/* (physical address) */
|
||||
uint32_t smem_len; /* Length of frame buffer mem */
|
||||
uint32_t type; /* see FB_TYPE_* */
|
||||
uint32_t type_aux; /* Interleave for interleaved Planes */
|
||||
uint32_t visual; /* see FB_VISUAL_* */
|
||||
uint16_t xpanstep; /* zero if no hardware panning */
|
||||
uint16_t ypanstep; /* zero if no hardware panning */
|
||||
uint16_t ywrapstep; /* zero if no hardware ywrap */
|
||||
uint32_t line_length; /* length of a line in bytes */
|
||||
uint32_t mmio_start; /* Start of Memory Mapped I/O */
|
||||
/* (physical address) */
|
||||
uint32_t mmio_len; /* Length of Memory Mapped I/O */
|
||||
uint32_t accel; /* Indicate to driver which */
|
||||
/* specific chip/card we have */
|
||||
uint16_t reserved[3]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
/* Interpretation of offset for color fields: All offsets are from the right,
|
||||
@@ -199,87 +209,89 @@ struct fb_fix_screeninfo {
|
||||
* stream and is written to video memory as that unmodified. This implies
|
||||
* big-endian byte order if bits_per_pixel is greater than 8.
|
||||
*/
|
||||
struct fb_bitfield {
|
||||
unsigned long offset; /* beginning of bitfield */
|
||||
unsigned long length; /* length of bitfield */
|
||||
unsigned long msb_right; /* != 0 : Most significant bit is */
|
||||
/* right */
|
||||
struct fb_bitfield
|
||||
{
|
||||
uint32_t offset; /* beginning of bitfield */
|
||||
uint32_t length; /* length of bitfield */
|
||||
uint32_t msb_right; /* != 0 : Most significant bit is */
|
||||
/* right */
|
||||
};
|
||||
|
||||
#define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
|
||||
#define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
|
||||
|
||||
#define FB_ACTIVATE_NOW 0 /* set values immediately (or vbl)*/
|
||||
#define FB_ACTIVATE_NXTOPEN 1 /* activate on next open */
|
||||
#define FB_ACTIVATE_TEST 2 /* don't set, round up impossible */
|
||||
#define FB_ACTIVATE_NOW 0 /* set values immediately (or vbl)*/
|
||||
#define FB_ACTIVATE_NXTOPEN 1 /* activate on next open */
|
||||
#define FB_ACTIVATE_TEST 2 /* don't set, round up impossible */
|
||||
#define FB_ACTIVATE_MASK 15
|
||||
/* values */
|
||||
#define FB_ACTIVATE_VBL 16 /* activate values on next vbl */
|
||||
#define FB_CHANGE_CMAP_VBL 32 /* change colormap on vbl */
|
||||
#define FB_ACTIVATE_ALL 64 /* change all VCs on this fb */
|
||||
#define FB_ACTIVATE_FORCE 128 /* force apply even when no change*/
|
||||
#define FB_ACTIVATE_INV_MODE 256 /* invalidate videomode */
|
||||
/* values */
|
||||
#define FB_ACTIVATE_VBL 16 /* activate values on next vbl */
|
||||
#define FB_CHANGE_CMAP_VBL 32 /* change colormap on vbl */
|
||||
#define FB_ACTIVATE_ALL 64 /* change all VCs on this fb */
|
||||
#define FB_ACTIVATE_FORCE 128 /* force apply even when no change*/
|
||||
#define FB_ACTIVATE_INV_MODE 256 /* invalidate videomode */
|
||||
|
||||
#define FB_ACCELF_TEXT 1 /* (OBSOLETE) see fb_info.flags and vc_mode */
|
||||
#define FB_ACCELF_TEXT 1 /* (OBSOLETE) see fb_info.flags and vc_mode */
|
||||
|
||||
#define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */
|
||||
#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
|
||||
#define FB_SYNC_EXT 4 /* external sync */
|
||||
#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
|
||||
#define FB_SYNC_BROADCAST 16 /* broadcast video timings */
|
||||
/* vtotal = 144d/288n/576i => PAL */
|
||||
/* vtotal = 121d/242n/484i => NTSC */
|
||||
#define FB_SYNC_ON_GREEN 32 /* sync on green */
|
||||
#define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */
|
||||
#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
|
||||
#define FB_SYNC_EXT 4 /* external sync */
|
||||
#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
|
||||
#define FB_SYNC_BROADCAST 16 /* broadcast video timings */
|
||||
/* vtotal = 144d/288n/576i => PAL */
|
||||
/* vtotal = 121d/242n/484i => NTSC */
|
||||
#define FB_SYNC_ON_GREEN 32 /* sync on green */
|
||||
|
||||
#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
|
||||
#define FB_VMODE_INTERLACED 1 /* interlaced */
|
||||
#define FB_VMODE_DOUBLE 2 /* double scan */
|
||||
#define FB_VMODE_MASK 255
|
||||
#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
|
||||
#define FB_VMODE_INTERLACED 1 /* interlaced */
|
||||
#define FB_VMODE_DOUBLE 2 /* double scan */
|
||||
#define FB_VMODE_MASK 255
|
||||
|
||||
#define FB_VMODE_YWRAP 256 /* ywrap instead of panning */
|
||||
#define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */
|
||||
#define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */
|
||||
#define FB_VMODE_YWRAP 256 /* ywrap instead of panning */
|
||||
#define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */
|
||||
#define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */
|
||||
|
||||
#define PICOS2KHZ(a) (1000000000UL/(a))
|
||||
#define KHZ2PICOS(a) (1000000000UL/(a))
|
||||
#define PICOS2KHZ(a) (1000000000UL / (a))
|
||||
#define KHZ2PICOS(a) (1000000000UL / (a))
|
||||
|
||||
struct fb_var_screeninfo {
|
||||
unsigned long xres; /* visible resolution */
|
||||
unsigned long yres;
|
||||
unsigned long xres_virtual; /* virtual resolution */
|
||||
unsigned long yres_virtual;
|
||||
unsigned long xoffset; /* offset from virtual to visible */
|
||||
unsigned long yoffset; /* resolution */
|
||||
struct fb_var_screeninfo
|
||||
{
|
||||
uint32_t xres; /* visible resolution */
|
||||
uint32_t yres;
|
||||
uint32_t xres_virtual; /* virtual resolution */
|
||||
uint32_t yres_virtual;
|
||||
uint32_t xoffset; /* offset from virtual to visible */
|
||||
uint32_t yoffset; /* resolution */
|
||||
|
||||
unsigned long bits_per_pixel; /* guess what */
|
||||
unsigned long grayscale; /* != 0 Graylevels instead of colors */
|
||||
uint32_t bits_per_pixel; /* guess what */
|
||||
uint32_t grayscale; /* != 0 Graylevels instead of colors */
|
||||
|
||||
struct fb_bitfield red; /* bitfield in fb mem if true color, */
|
||||
struct fb_bitfield green; /* else only length is significant */
|
||||
struct fb_bitfield blue;
|
||||
struct fb_bitfield transp; /* transparency */
|
||||
struct fb_bitfield red; /* bitfield in fb mem if true color, */
|
||||
struct fb_bitfield green; /* else only length is significant */
|
||||
struct fb_bitfield blue;
|
||||
struct fb_bitfield transp; /* transparency */
|
||||
|
||||
unsigned long nonstd; /* != 0 Non standard pixel format */
|
||||
uint32_t nonstd; /* != 0 Non standard pixel format */
|
||||
|
||||
unsigned long activate; /* see FB_ACTIVATE_* */
|
||||
uint32_t activate; /* see FB_ACTIVATE_* */
|
||||
|
||||
unsigned long height; /* height of picture in mm */
|
||||
unsigned long width; /* width of picture in mm */
|
||||
uint32_t height; /* height of picture in mm */
|
||||
uint32_t width; /* width of picture in mm */
|
||||
|
||||
unsigned long accel_flags; /* (OBSOLETE) see fb_info.flags */
|
||||
uint32_t accel_flags; /* (OBSOLETE) see fb_info.flags */
|
||||
|
||||
/* Timing: All values in pixclocks, except pixclock (of course) */
|
||||
unsigned long pixclock; /* pixel clock in ps (pico seconds) */
|
||||
unsigned long left_margin; /* time from sync to picture */
|
||||
unsigned long right_margin; /* time from picture to sync */
|
||||
unsigned long upper_margin; /* time from sync to picture */
|
||||
unsigned long lower_margin;
|
||||
unsigned long hsync_len; /* length of horizontal sync */
|
||||
unsigned long vsync_len; /* length of vertical sync */
|
||||
unsigned long sync; /* see FB_SYNC_* */
|
||||
unsigned long vmode; /* see FB_VMODE_* */
|
||||
unsigned long rotate; /* angle we rotate counter clockwise */
|
||||
unsigned long refresh;
|
||||
unsigned long reserved[4]; /* Reserved for future compatibility */
|
||||
/* Timing: All values in pixclocks, except pixclock (of course) */
|
||||
uint32_t pixclock; /* pixel clock in ps (pico seconds) */
|
||||
uint32_t left_margin; /* time from sync to picture */
|
||||
uint32_t right_margin; /* time from picture to sync */
|
||||
uint32_t upper_margin; /* time from sync to picture */
|
||||
uint32_t lower_margin;
|
||||
uint32_t hsync_len; /* length of horizontal sync */
|
||||
uint32_t vsync_len; /* length of vertical sync */
|
||||
uint32_t sync; /* see FB_SYNC_* */
|
||||
uint32_t vmode; /* see FB_VMODE_* */
|
||||
uint32_t rotate; /* angle we rotate counter clockwise */
|
||||
uint32_t refresh;
|
||||
uint32_t reserved[4]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
/* VESA Blanking Levels */
|
||||
@@ -288,35 +300,37 @@ struct fb_var_screeninfo {
|
||||
#define VESA_HSYNC_SUSPEND 2
|
||||
#define VESA_POWERDOWN 3
|
||||
|
||||
enum {
|
||||
/* screen: unblanked, hsync: on, vsync: on */
|
||||
FB_BLANK_UNBLANK = VESA_NO_BLANKING,
|
||||
/* screen: blanked, hsync: on, vsync: on */
|
||||
FB_BLANK_NORMAL = VESA_NO_BLANKING + 1,
|
||||
/* screen: blanked, hsync: on, vsync: off */
|
||||
FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1,
|
||||
/* screen: blanked, hsync: off, vsync: on */
|
||||
FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1,
|
||||
/* screen: blanked, hsync: off, vsync: off */
|
||||
FB_BLANK_POWERDOWN = VESA_POWERDOWN + 1
|
||||
enum
|
||||
{
|
||||
/* screen: unblanked, hsync: on, vsync: on */
|
||||
FB_BLANK_UNBLANK = VESA_NO_BLANKING,
|
||||
/* screen: blanked, hsync: on, vsync: on */
|
||||
FB_BLANK_NORMAL = VESA_NO_BLANKING + 1,
|
||||
/* screen: blanked, hsync: on, vsync: off */
|
||||
FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1,
|
||||
/* screen: blanked, hsync: off, vsync: on */
|
||||
FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1,
|
||||
/* screen: blanked, hsync: off, vsync: off */
|
||||
FB_BLANK_POWERDOWN = VESA_POWERDOWN + 1
|
||||
};
|
||||
|
||||
#define FB_VBLANK_VBLANKING 0x001 /* currently in a vertical blank */
|
||||
#define FB_VBLANK_HBLANKING 0x002 /* currently in a horizontal blank */
|
||||
#define FB_VBLANK_VBLANKING 0x001 /* currently in a vertical blank */
|
||||
#define FB_VBLANK_HBLANKING 0x002 /* currently in a horizontal blank */
|
||||
#define FB_VBLANK_HAVE_VBLANK 0x004 /* vertical blanks can be detected */
|
||||
#define FB_VBLANK_HAVE_HBLANK 0x008 /* horizontal blanks can be detected */
|
||||
#define FB_VBLANK_HAVE_COUNT 0x010 /* global retrace counter is available */
|
||||
#define FB_VBLANK_HAVE_VCOUNT 0x020 /* the vcount field is valid */
|
||||
#define FB_VBLANK_HAVE_HCOUNT 0x040 /* the hcount field is valid */
|
||||
#define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */
|
||||
#define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */
|
||||
#define FB_VBLANK_HAVE_VSYNC 0x100 /* verical syncs can be detected */
|
||||
|
||||
struct fb_vblank {
|
||||
unsigned long flags; /* FB_VBLANK flags */
|
||||
unsigned long count; /* counter of retraces since boot */
|
||||
unsigned long vcount; /* current scanline position */
|
||||
unsigned long hcount; /* current scandot position */
|
||||
unsigned long reserved[4]; /* reserved for future compatibility */
|
||||
struct fb_vblank
|
||||
{
|
||||
uint32_t flags; /* FB_VBLANK flags */
|
||||
uint32_t count; /* counter of retraces since boot */
|
||||
uint32_t vcount; /* current scanline position */
|
||||
uint32_t hcount; /* current scandot position */
|
||||
uint32_t reserved[4]; /* reserved for future compatibility */
|
||||
};
|
||||
|
||||
struct vm_area_struct;
|
||||
@@ -325,155 +339,160 @@ struct device;
|
||||
struct file;
|
||||
|
||||
/* Definitions below are used in the parsed monitor specs */
|
||||
#define FB_DPMS_ACTIVE_OFF 1
|
||||
#define FB_DPMS_SUSPEND 2
|
||||
#define FB_DPMS_STANDBY 4
|
||||
#define FB_DPMS_ACTIVE_OFF 1
|
||||
#define FB_DPMS_SUSPEND 2
|
||||
#define FB_DPMS_STANDBY 4
|
||||
|
||||
#define FB_DISP_DDI 1
|
||||
#define FB_DISP_ANA_700_300 2
|
||||
#define FB_DISP_ANA_714_286 4
|
||||
#define FB_DISP_ANA_1000_400 8
|
||||
#define FB_DISP_ANA_700_000 16
|
||||
#define FB_DISP_DDI 1
|
||||
#define FB_DISP_ANA_700_300 2
|
||||
#define FB_DISP_ANA_714_286 4
|
||||
#define FB_DISP_ANA_1000_400 8
|
||||
#define FB_DISP_ANA_700_000 16
|
||||
|
||||
#define FB_DISP_MONO 32
|
||||
#define FB_DISP_RGB 64
|
||||
#define FB_DISP_MULTI 128
|
||||
#define FB_DISP_UNKNOWN 256
|
||||
#define FB_DISP_MONO 32
|
||||
#define FB_DISP_RGB 64
|
||||
#define FB_DISP_MULTI 128
|
||||
#define FB_DISP_UNKNOWN 256
|
||||
|
||||
#define FB_SIGNAL_NONE 0
|
||||
#define FB_SIGNAL_BLANK_BLANK 1
|
||||
#define FB_SIGNAL_SEPARATE 2
|
||||
#define FB_SIGNAL_COMPOSITE 4
|
||||
#define FB_SIGNAL_NONE 0
|
||||
#define FB_SIGNAL_BLANK_BLANK 1
|
||||
#define FB_SIGNAL_SEPARATE 2
|
||||
#define FB_SIGNAL_COMPOSITE 4
|
||||
#define FB_SIGNAL_SYNC_ON_GREEN 8
|
||||
#define FB_SIGNAL_SERRATION_ON 16
|
||||
#define FB_SIGNAL_SERRATION_ON 16
|
||||
|
||||
#define FB_MISC_PRIM_COLOR 1
|
||||
#define FB_MISC_1ST_DETAIL 2 /* First Detailed Timing is preferred */
|
||||
struct fb_chroma {
|
||||
unsigned long redx; /* in fraction of 1024 */
|
||||
unsigned long greenx;
|
||||
unsigned long bluex;
|
||||
unsigned long whitex;
|
||||
unsigned long redy;
|
||||
unsigned long greeny;
|
||||
unsigned long bluey;
|
||||
unsigned long whitey;
|
||||
#define FB_MISC_PRIM_COLOR 1
|
||||
#define FB_MISC_1ST_DETAIL 2 /* First Detailed Timing is preferred */
|
||||
|
||||
struct fb_chroma
|
||||
{
|
||||
uint32_t redx; /* in fraction of 1024 */
|
||||
uint32_t greenx;
|
||||
uint32_t bluex;
|
||||
uint32_t whitex;
|
||||
uint32_t redy;
|
||||
uint32_t greeny;
|
||||
uint32_t bluey;
|
||||
uint32_t whitey;
|
||||
};
|
||||
|
||||
struct fb_monspecs {
|
||||
struct fb_chroma chroma;
|
||||
struct fb_videomode *modedb; /* mode database */
|
||||
unsigned char manufacturer[4]; /* Manufacturer */
|
||||
unsigned char monitor[14]; /* Monitor String */
|
||||
unsigned char serial_no[14]; /* Serial Number */
|
||||
unsigned char ascii[14]; /* ? */
|
||||
unsigned long modedb_len; /* mode database length */
|
||||
unsigned long model; /* Monitor Model */
|
||||
unsigned long serial; /* Serial Number - Integer */
|
||||
unsigned long year; /* Year manufactured */
|
||||
unsigned long week; /* Week Manufactured */
|
||||
unsigned long hfmin; /* hfreq lower limit (Hz) */
|
||||
unsigned long hfmax; /* hfreq upper limit (Hz) */
|
||||
unsigned long dclkmin; /* pixelclock lower limit (Hz) */
|
||||
unsigned long dclkmax; /* pixelclock upper limit (Hz) */
|
||||
unsigned short input; /* display type - see FB_DISP_* */
|
||||
unsigned short dpms; /* DPMS support - see FB_DPMS_ */
|
||||
unsigned short signal; /* Signal Type - see FB_SIGNAL_* */
|
||||
unsigned short vfmin; /* vfreq lower limit (Hz) */
|
||||
unsigned short vfmax; /* vfreq upper limit (Hz) */
|
||||
unsigned short gamma; /* Gamma - in fractions of 100 */
|
||||
unsigned short gtf : 1; /* supports GTF */
|
||||
unsigned short misc; /* Misc flags - see FB_MISC_* */
|
||||
unsigned char version; /* EDID version... */
|
||||
unsigned char revision; /* ...and revision */
|
||||
unsigned char max_x; /* Maximum horizontal size (cm) */
|
||||
unsigned char max_y; /* Maximum vertical size (cm) */
|
||||
struct fb_monspecs
|
||||
{
|
||||
struct fb_chroma chroma;
|
||||
struct fb_videomode *modedb; /* mode database */
|
||||
uint8_t manufacturer[4]; /* Manufacturer */
|
||||
uint8_t monitor[14]; /* Monitor String */
|
||||
uint8_t serial_no[14]; /* Serial Number */
|
||||
uint8_t ascii[14]; /* ? */
|
||||
uint32_t modedb_len; /* mode database length */
|
||||
uint32_t model; /* Monitor Model */
|
||||
uint32_t serial; /* Serial Number - Integer */
|
||||
uint32_t year; /* Year manufactured */
|
||||
uint32_t week; /* Week Manufactured */
|
||||
uint32_t hfmin; /* hfreq lower limit (Hz) */
|
||||
uint32_t hfmax; /* hfreq upper limit (Hz) */
|
||||
uint32_t dclkmin; /* pixelclock lower limit (Hz) */
|
||||
uint32_t dclkmax; /* pixelclock upper limit (Hz) */
|
||||
uint16_t input; /* display type - see FB_DISP_* */
|
||||
uint16_t dpms; /* DPMS support - see FB_DPMS_ */
|
||||
uint16_t signal; /* Signal Type - see FB_SIGNAL_* */
|
||||
uint16_t vfmin; /* vfreq lower limit (Hz) */
|
||||
uint16_t vfmax; /* vfreq upper limit (Hz) */
|
||||
uint16_t gamma; /* Gamma - in fractions of 100 */
|
||||
uint16_t gtf : 1; /* supports GTF */
|
||||
uint16_t misc; /* Misc flags - see FB_MISC_* */
|
||||
uint8_t version; /* EDID version... */
|
||||
uint8_t revision; /* ...and revision */
|
||||
uint8_t max_x; /* Maximum horizontal size (cm) */
|
||||
uint8_t max_y; /* Maximum vertical size (cm) */
|
||||
};
|
||||
|
||||
struct fb_ops {
|
||||
/* checks var and eventually tweaks if to soomething supported,
|
||||
* DO NOT MODIFY PAR */
|
||||
int (*fb_check_var)(struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
/* set the video mode according to info->var */
|
||||
int (*fb_set_par)(struct fb_info *info);
|
||||
/* set color register */
|
||||
int (*fb_setcolreg)(unsigned regno, unsigned red, unsigned green,
|
||||
unsigned blue, unsigned transp, struct fb_info *info);
|
||||
/* pan display */
|
||||
int (*fb_pan_display)(struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
/* blank display */
|
||||
int (*fb_blank)(int blank, struct fb_info *info);
|
||||
/* wait for blit idle */
|
||||
int (*fb_sync)(struct fb_info *info);
|
||||
/* perform fb specific ioctl */
|
||||
int (*fb_ioctl)(unsigned int cmd, unsigned long arg, struct fb_info *info);
|
||||
/* Buildthe modedb for head 1 (head 2 will come later), check panel infos
|
||||
* from either BIOS or EDID, and pick up the default mode */
|
||||
void (*fb_check_modes)(struct fb_info *info, struct mode_option *resolution);
|
||||
/* Accel functions */
|
||||
struct fb_ops
|
||||
{
|
||||
/* checks var and eventually tweaks if to something supported,
|
||||
* DO NOT MODIFY PAR */
|
||||
int32_t (*fb_check_var)(struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
/* set the video mode according to info->var */
|
||||
int32_t (*fb_set_par)(struct fb_info *info);
|
||||
/* set color register */
|
||||
int32_t (*fb_setcolreg)(uint32_t regno, uint32_t red, uint32_t green,
|
||||
uint32_t blue, uint32_t transp, struct fb_info *info);
|
||||
/* pan display */
|
||||
int32_t (*fb_pan_display)(struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
/* blank display */
|
||||
int32_t (*fb_blank)(int32_t blank, struct fb_info *info);
|
||||
/* wait for blit idle */
|
||||
int32_t (*fb_sync)(struct fb_info *info);
|
||||
/* perform fb specific ioctl */
|
||||
int32_t (*fb_ioctl)(uint32_t cmd, uint32_t arg, struct fb_info *info);
|
||||
/* Buildthe modedb for head 1 (head 2 will come later), check panel infos
|
||||
* from either BIOS or EDID, and pick up the default mode */
|
||||
void (*fb_check_modes)(struct fb_info *info, struct mode_option *resolution);
|
||||
/* Accel functions */
|
||||
#define DEGREES_0 0
|
||||
#define DEGREES_90 1
|
||||
#define DEGREES_180 2
|
||||
#define DEGREES_270 3
|
||||
#define OMIT_LAST 1
|
||||
void (*SetupForSolidFill)(struct fb_info *info, int color, int rop, unsigned int planemask);
|
||||
void (*SubsequentSolidFillRect)(struct fb_info *info, int x, int y, int w, int h);
|
||||
void (*SetupForSolidLine)(struct fb_info *info, int color, int rop, unsigned int planemask);
|
||||
void (*SubsequentSolidHorVertLine)(struct fb_info *info, int x, int y, int len, int dir);
|
||||
void (*SubsequentSolidTwoPointLine)(struct fb_info *info, int xa, int ya, int xb, int yb, int flags);
|
||||
void (*SetupForDashedLine)(struct fb_info *info, int fg, int bg, int rop, unsigned int planemask, int length, unsigned char *pattern);
|
||||
void (*SubsequentDashedTwoPointLine)(struct fb_info *info, int xa, int ya, int xb, int yb, int flags, int phase);
|
||||
void (*SetupForScreenToScreenCopy)(struct fb_info *info, int xdir, int ydir, int rop, unsigned int planemask, int trans_color);
|
||||
void (*SubsequentScreenToScreenCopy)(struct fb_info *info, int xa, int ya, int xb, int yb, int w, int h);
|
||||
void (*ScreenToScreenCopy)(struct fb_info *info, int xa, int ya, int xb, int yb, int w, int h, int rop);
|
||||
void (*SetupForMono8x8PatternFill)(struct fb_info *info, int patternx, int patterny, int fg, int bg, int rop, unsigned int planemask);
|
||||
void (*SubsequentMono8x8PatternFillRect)(struct fb_info *info, int patternx, int patterny, int x, int y, int w, int h);
|
||||
void (*SetupForScanlineCPUToScreenColorExpandFill)(struct fb_info *info, int fg, int bg, int rop, unsigned int planemask);
|
||||
void (*SubsequentScanlineCPUToScreenColorExpandFill)(struct fb_info *info, int x, int y, int w, int h, int skipleft);
|
||||
void (*SubsequentScanline)(struct fb_info *info, unsigned long *buf);
|
||||
void (*SetupForScanlineImageWrite)(struct fb_info *info, int rop, unsigned int planemask, int trans_color, int bpp);
|
||||
void (*SubsequentScanlineImageWriteRect)(struct fb_info *info, int x, int y, int w, int h, int skipleft);
|
||||
void (*SetClippingRectangle)(struct fb_info *info, int xa, int ya, int xb, int yb);
|
||||
void (*DisableClipping)(struct fb_info *info);
|
||||
int (*SetupForCPUToScreenAlphaTexture)(struct fb_info *info,
|
||||
int op, unsigned short red, unsigned short green, unsigned short blue, unsigned short alpha, unsigned long maskFormat, unsigned long dstFormat, unsigned char *alphaPtr, int alphaPitch, int width, int height, int flags);
|
||||
int (*SetupForCPUToScreenTexture)(struct fb_info *info, int op, unsigned long srcFormat, unsigned long dstFormat, unsigned char *texPtr, int texPitch, int width, int height, int flags);
|
||||
void (*SubsequentCPUToScreenTexture)(struct fb_info *info, int dstx, int dsty, int srcx, int srcy, int width, int height);
|
||||
/* Cursor functions */
|
||||
void (*SetCursorColors)(struct fb_info *info, int bg, int fg);
|
||||
void (*SetCursorPosition)(struct fb_info *info, int x, int y);
|
||||
void (*LoadCursorImage)(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom);
|
||||
void (*HideCursor)(struct fb_info *info);
|
||||
void (*ShowCursor)(struct fb_info *info);
|
||||
long (*CursorInit)(struct fb_info *info);
|
||||
void (*WaitVbl)(struct fb_info *info);
|
||||
void (*SetupForSolidFill)(struct fb_info *info, int32_t color, int32_t rop, uint32_t planemask);
|
||||
void (*SubsequentSolidFillRect)(struct fb_info *info, int32_t x, int32_t y, int32_t w, int32_t h);
|
||||
void (*SetupForSolidLine)(struct fb_info *info, int32_t color, int32_t rop, uint32_t planemask);
|
||||
void (*SubsequentSolidHorVertLine)(struct fb_info *info, int32_t x, int32_t y, int32_t len, int32_t dir);
|
||||
void (*SubsequentSolidTwoPointLine)(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t flags);
|
||||
void (*SetupForDashedLine)(struct fb_info *info, int32_t fg, int32_t bg, int32_t rop, uint32_t planemask, int32_t length, uint8_t *pattern);
|
||||
void (*SubsequentDashedTwoPointLine)(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t flags, int32_t phase);
|
||||
void (*SetupForScreenToScreenCopy)(struct fb_info *info, int32_t xdir, int32_t ydir, int32_t rop, uint32_t planemask, int32_t trans_color);
|
||||
void (*SubsequentScreenToScreenCopy)(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t w, int32_t h);
|
||||
void (*ScreenToScreenCopy)(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t w, int32_t h, int32_t rop);
|
||||
void (*SetupForMono8x8PatternFill)(struct fb_info *info, int32_t patternx, int32_t patterny, int32_t fg, int32_t bg, int32_t rop, uint32_t planemask);
|
||||
void (*SubsequentMono8x8PatternFillRect)(struct fb_info *info, int32_t patternx, int32_t patterny, int32_t x, int32_t y, int32_t w, int32_t h);
|
||||
void (*SetupForScanlineCPUToScreenColorExpandFill)(struct fb_info *info, int32_t fg, int32_t bg, int32_t rop, uint32_t planemask);
|
||||
void (*SubsequentScanlineCPUToScreenColorExpandFill)(struct fb_info *info, int32_t x, int32_t y, int32_t w, int32_t h, int32_t skipleft);
|
||||
void (*SubsequentScanline)(struct fb_info *info, uint32_t *buf);
|
||||
void (*SetupForScanlineImageWrite)(struct fb_info *info, int32_t rop, uint32_t planemask, int32_t trans_color, int32_t bpp);
|
||||
void (*SubsequentScanlineImageWriteRect)(struct fb_info *info, int32_t x, int32_t y, int32_t w, int32_t h, int32_t skipleft);
|
||||
void (*SetClippingRectangle)(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb, int32_t yb);
|
||||
void (*DisableClipping)(struct fb_info *info);
|
||||
int32_t (*SetupForCPUToScreenAlphaTexture)(struct fb_info *info,
|
||||
int32_t op, uint16_t red, uint16_t green, uint16_t blue, uint16_t alpha, uint32_t maskFormat, uint32_t dstFormat, uint8_t *alphaPtr, int32_t alphaPitch, int32_t width, int32_t height, int32_t flags);
|
||||
int32_t (*SetupForCPUToScreenTexture)(struct fb_info *info, int32_t op, uint32_t srcFormat, uint32_t dstFormat, uint8_t *texPtr, int32_t texPitch, int32_t width, int32_t height, int32_t flags);
|
||||
void (*SubsequentCPUToScreenTexture)(struct fb_info *info, int32_t dstx, int32_t dsty, int32_t srcx, int32_t srcy, int32_t width, int32_t height);
|
||||
/* Cursor functions */
|
||||
void (*SetCursorColors)(struct fb_info *info, int32_t bg, int32_t fg);
|
||||
void (*SetCursorPosition)(struct fb_info *info, int32_t x, int32_t y);
|
||||
void (*LoadCursorImage)(struct fb_info *info, uint16_t *mask, uint16_t *data, int32_t zoom);
|
||||
void (*HideCursor)(struct fb_info *info);
|
||||
void (*ShowCursor)(struct fb_info *info);
|
||||
long (*CursorInit)(struct fb_info *info);
|
||||
void (*WaitVbl)(struct fb_info *info);
|
||||
};
|
||||
|
||||
struct fb_info {
|
||||
struct fb_var_screeninfo var; /* Current var */
|
||||
struct fb_fix_screeninfo fix; /* Current fix */
|
||||
struct fb_monspecs monspecs; /* Current Monitor specs */
|
||||
struct fb_videomode *mode; /* current mode */
|
||||
char *screen_base; /* Virtual address */
|
||||
unsigned long screen_size;
|
||||
char *ram_base; /* base vram */
|
||||
unsigned long ram_size; /* vram size */
|
||||
char *screen_mono;
|
||||
long update_mono;
|
||||
struct fb_ops *fbops;
|
||||
void *par; /* device dependent */
|
||||
struct fb_info
|
||||
{
|
||||
struct fb_var_screeninfo var; /* Current var */
|
||||
struct fb_fix_screeninfo fix; /* Current fix */
|
||||
struct fb_monspecs monspecs; /* Current Monitor specs */
|
||||
struct fb_videomode *mode; /* current mode */
|
||||
char *screen_base; /* Virtual address */
|
||||
uint32_t screen_size;
|
||||
char *ram_base; /* base vram */
|
||||
uint32_t ram_size; /* vram size */
|
||||
char *screen_mono;
|
||||
long update_mono;
|
||||
struct fb_ops *fbops;
|
||||
void *par; /* device dependent */
|
||||
};
|
||||
|
||||
/* fbmem.c */
|
||||
extern int fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var);
|
||||
extern int fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var);
|
||||
extern int fb_blank(struct fb_info *info, int blank);
|
||||
extern int fb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg);
|
||||
extern struct fb_info *framebuffer_alloc(unsigned long size);
|
||||
extern int32_t fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var);
|
||||
extern int32_t fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var);
|
||||
extern int32_t fb_blank(struct fb_info *info, int32_t blank);
|
||||
extern int32_t fb_ioctl(struct fb_info *info, uint32_t cmd, uint32_t arg);
|
||||
extern struct fb_info *framebuffer_alloc(uint32_t size);
|
||||
extern void framebuffer_release(struct fb_info *info);
|
||||
|
||||
/* offscreen.c */
|
||||
extern long offscreen_free(struct fb_info *info, long addr);
|
||||
extern long offscreen_free(struct fb_info *info, void *addr);
|
||||
extern long offscreen_alloc(struct fb_info *info, long amount);
|
||||
extern long offscren_reserved(struct fb_info *info);
|
||||
extern void offscreen_init(struct fb_info *info);
|
||||
@@ -494,57 +513,44 @@ extern void offscreen_init(struct fb_info *info);
|
||||
#define FB_MODE_IS_FROM_VAR 32
|
||||
|
||||
extern void fb_destroy_modedb(struct fb_videomode *modedb);
|
||||
extern int fb_parse_edid(unsigned char *edid, struct fb_var_screeninfo *var);
|
||||
extern void fb_edid_to_monspecs(unsigned char *edid, struct fb_monspecs *specs);
|
||||
extern int fb_get_mode(int flags, unsigned long val, struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
extern int fb_validate_mode(const struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
extern int32_t fb_parse_edid(uint8_t *edid, struct fb_var_screeninfo *var);
|
||||
extern void fb_edid_to_monspecs(uint8_t *edid, struct fb_monspecs *specs);
|
||||
extern int32_t fb_get_mode(int32_t flags, uint32_t val, struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
extern int32_t fb_validate_mode(const struct fb_var_screeninfo *var, struct fb_info *info);
|
||||
|
||||
/* modedb.c */
|
||||
#define VESA_MODEDB_SIZE 34
|
||||
extern int fb_find_mode(struct fb_var_screeninfo *var,
|
||||
struct fb_info *info, struct mode_option *resolution ,
|
||||
const struct fb_videomode *db, unsigned int dbsize,
|
||||
const struct fb_videomode *default_mode, unsigned int default_bpp);
|
||||
extern int32_t fb_find_mode(struct fb_var_screeninfo *var,
|
||||
struct fb_info *info, struct mode_option *resolution ,
|
||||
const struct fb_videomode *db, uint32_t dbsize,
|
||||
const struct fb_videomode *default_mode, uint32_t default_bpp);
|
||||
extern void fb_var_to_videomode(struct fb_videomode *mode, struct fb_var_screeninfo *var);
|
||||
extern void fb_videomode_to_var(struct fb_var_screeninfo *var, struct fb_videomode *mode);
|
||||
extern int fb_mode_is_equal(struct fb_videomode *mode1, struct fb_videomode *mode2);
|
||||
extern int32_t fb_mode_is_equal(struct fb_videomode *mode1, struct fb_videomode *mode2);
|
||||
|
||||
struct fb_videomode {
|
||||
unsigned short refresh; /* optional */
|
||||
unsigned short xres;
|
||||
unsigned short yres;
|
||||
unsigned long pixclock;
|
||||
unsigned short left_margin;
|
||||
unsigned short right_margin;
|
||||
unsigned short upper_margin;
|
||||
unsigned short lower_margin;
|
||||
unsigned short hsync_len;
|
||||
unsigned short vsync_len;
|
||||
unsigned short sync;
|
||||
unsigned short vmode;
|
||||
unsigned short flag;
|
||||
struct fb_videomode
|
||||
{
|
||||
uint16_t refresh; /* optional */
|
||||
uint16_t xres;
|
||||
uint16_t yres;
|
||||
uint32_t pixclock;
|
||||
uint16_t left_margin;
|
||||
uint16_t right_margin;
|
||||
uint16_t upper_margin;
|
||||
uint16_t lower_margin;
|
||||
uint16_t hsync_len;
|
||||
uint16_t vsync_len;
|
||||
uint16_t sync;
|
||||
uint16_t vmode;
|
||||
uint16_t flag;
|
||||
};
|
||||
|
||||
extern const struct fb_videomode vesa_modes[];
|
||||
|
||||
/* timer */
|
||||
extern void udelay(long usec);
|
||||
#ifdef COLDFIRE
|
||||
#ifdef MCF5445X
|
||||
#define US_TO_TIMER(a) (a)
|
||||
#define TIMER_TO_US(a) (a)
|
||||
#else /* MCF548X */
|
||||
#define US_TO_TIMER(a) ((a)*100)
|
||||
#define TIMER_TO_US(a) ((a)/100)
|
||||
#endif
|
||||
#else
|
||||
#define US_TO_TIMER(a) (((a)*256)/5000)
|
||||
#define TIMER_TO_US(a) (((a)*5000)/256)
|
||||
#endif
|
||||
extern void start_timeout(void);
|
||||
extern int end_timeout(long msec);
|
||||
extern int32_t end_timeout(long msec);
|
||||
extern void mdelay(long msec);
|
||||
extern void install_vbl_timer(void *func, int remove);
|
||||
extern void install_vbl_timer(void *func, int32_t remove);
|
||||
extern void uninstall_vbl_timer(void *func);
|
||||
|
||||
extern struct fb_info *info_fvdi;
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
* File: fec.h
|
||||
* Purpose: Driver for the Fast Ethernet Controller (FEC)
|
||||
*
|
||||
* Notes:
|
||||
* Notes:
|
||||
*/
|
||||
|
||||
#ifndef _FEC_H_
|
||||
@@ -30,30 +30,30 @@
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
int total; /* total count of errors */
|
||||
int hberr; /* heartbeat error */
|
||||
int babr; /* babbling receiver */
|
||||
int babt; /* babbling transmitter */
|
||||
int gra; /* graceful stop complete */
|
||||
int txf; /* transmit frame */
|
||||
int mii; /* MII */
|
||||
int lc; /* late collision */
|
||||
int rl; /* collision retry limit */
|
||||
int xfun; /* transmit FIFO underrrun */
|
||||
int xferr; /* transmit FIFO error */
|
||||
int rferr; /* receive FIFO error */
|
||||
int dtxf; /* DMA transmit frame */
|
||||
int drxf; /* DMA receive frame */
|
||||
int rfsw_inv; /* Invalid bit in RFSW */
|
||||
int rfsw_l; /* RFSW Last in Frame */
|
||||
int rfsw_m; /* RFSW Miss */
|
||||
int rfsw_bc; /* RFSW Broadcast */
|
||||
int rfsw_mc; /* RFSW Multicast */
|
||||
int rfsw_lg; /* RFSW Length Violation */
|
||||
int rfsw_no; /* RFSW Non-octet */
|
||||
int rfsw_cr; /* RFSW Bad CRC */
|
||||
int rfsw_ov; /* RFSW Overflow */
|
||||
int rfsw_tr; /* RFSW Truncated */
|
||||
int total; /* total count of errors */
|
||||
int hberr; /* heartbeat error */
|
||||
int babr; /* babbling receiver */
|
||||
int babt; /* babbling transmitter */
|
||||
int gra; /* graceful stop complete */
|
||||
int txf; /* transmit frame */
|
||||
int mii; /* MII */
|
||||
int lc; /* late collision */
|
||||
int rl; /* collision retry limit */
|
||||
int xfun; /* transmit FIFO underrrun */
|
||||
int xferr; /* transmit FIFO error */
|
||||
int rferr; /* receive FIFO error */
|
||||
int dtxf; /* DMA transmit frame */
|
||||
int drxf; /* DMA receive frame */
|
||||
int rfsw_inv; /* Invalid bit in RFSW */
|
||||
int rfsw_l; /* RFSW Last in Frame */
|
||||
int rfsw_m; /* RFSW Miss */
|
||||
int rfsw_bc; /* RFSW Broadcast */
|
||||
int rfsw_mc; /* RFSW Multicast */
|
||||
int rfsw_lg; /* RFSW Length Violation */
|
||||
int rfsw_no; /* RFSW Non-octet */
|
||||
int rfsw_cr; /* RFSW Bad CRC */
|
||||
int rfsw_ov; /* RFSW Overflow */
|
||||
int rfsw_tr; /* RFSW Truncated */
|
||||
} FEC_EVENT_LOG;
|
||||
|
||||
|
||||
@@ -87,8 +87,8 @@ extern int fec1_send(NIF *, uint8_t *, uint8_t *, uint16_t , NBUF *);
|
||||
extern void fec_irq_enable(uint8_t, uint8_t, uint8_t);
|
||||
extern void fec_irq_disable(uint8_t);
|
||||
extern void fec_interrupt_handler(uint8_t);
|
||||
extern int fec0_interrupt_handler(void *, void *);
|
||||
extern int fec1_interrupt_handler(void *, void *);
|
||||
extern bool fec0_interrupt_handler(void *, void *);
|
||||
extern bool fec1_interrupt_handler(void *, void *);
|
||||
extern void fec_eth_setup(uint8_t, uint8_t, uint8_t, uint8_t, const uint8_t *);
|
||||
extern void fec_eth_reset(uint8_t);
|
||||
extern void fec_eth_stop(uint8_t);
|
||||
|
||||
@@ -21,7 +21,7 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
#include <ffconf.h> /* FatFs configuration options */
|
||||
|
||||
#if _FATFS != _FFCONF
|
||||
|
||||
@@ -30,7 +30,7 @@
|
||||
#define SYSCLK 132000 /* NOTE: 132 _is_ correct. 133 _is_ wrong. Do not change! */
|
||||
|
||||
#define BOOTFLASH_BASE_ADDRESS 0xE0000000
|
||||
#define BOOTFLASH_SIZE 0x800000 /* FireBee has 8 MByte Flash */
|
||||
#define BOOTFLASH_SIZE 0x800000 /* FireBee has 8 MByte Flash */
|
||||
#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1)
|
||||
|
||||
#define SDRAM_START 0x00000000 /* start at address 0 */
|
||||
@@ -40,6 +40,7 @@
|
||||
#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000)
|
||||
#else
|
||||
#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
|
||||
#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
|
||||
|
||||
#endif /* COMPILE_RAM */
|
||||
|
||||
|
||||
@@ -95,4 +95,6 @@ struct font_head {
|
||||
void font_init(void); /* initialize BIOS font ring */
|
||||
void font_set_default(void); /* choose the default font */
|
||||
|
||||
extern struct font_head *fnt;
|
||||
|
||||
#endif /* FONT_H */
|
||||
|
||||
@@ -32,18 +32,19 @@
|
||||
* manipulate the line states, and to init any hw-specific features. This is
|
||||
* only used if you have more than one hw-type of adapter running.
|
||||
*/
|
||||
struct i2c_algo_bit_data {
|
||||
void *data; /* private data for lowlevel routines */
|
||||
void (*setsda) (void *data, int state);
|
||||
void (*setscl) (void *data, int state);
|
||||
int (*getsda) (void *data);
|
||||
int (*getscl) (void *data);
|
||||
struct i2c_algo_bit_data
|
||||
{
|
||||
void *data; /* private data for lowlevel routines */
|
||||
void (*setsda) (void *data, int state);
|
||||
void (*setscl) (void *data, int state);
|
||||
int (*getsda) (void *data);
|
||||
int (*getscl) (void *data);
|
||||
|
||||
/* local settings */
|
||||
int udelay; /* half-clock-cycle time in microsecs */
|
||||
/* i.e. clock is (500 / udelay) KHz */
|
||||
int mdelay; /* in millisecs, unused */
|
||||
int timeout; /* in jiffies */
|
||||
/* local settings */
|
||||
int udelay; /* half-clock-cycle time in microsecs */
|
||||
/* i.e. clock is (500 / udelay) KHz */
|
||||
int mdelay; /* in millisecs, unused */
|
||||
int timeout; /* in jiffies */
|
||||
};
|
||||
|
||||
#define I2C_BIT_ADAP_MAX 16
|
||||
|
||||
@@ -28,6 +28,8 @@
|
||||
#ifndef _I2C_H
|
||||
#define _I2C_H
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
/* --- General options ------------------------------------------------ */
|
||||
|
||||
struct i2c_msg;
|
||||
@@ -44,39 +46,52 @@ extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
|
||||
* be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584
|
||||
* to name two of the most common.
|
||||
*/
|
||||
struct i2c_algorithm {
|
||||
unsigned int id;
|
||||
int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num);
|
||||
/* --- ioctl like call to set div. parameters. */
|
||||
int (*algo_control)(struct i2c_adapter *, unsigned int, unsigned long);
|
||||
struct i2c_algorithm
|
||||
{
|
||||
unsigned int id;
|
||||
int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num);
|
||||
/* --- ioctl like call to set div. parameters. */
|
||||
int (*algo_control)(struct i2c_adapter *, unsigned int, unsigned long);
|
||||
};
|
||||
|
||||
/*
|
||||
* i2c_adapter is the structure used to identify a physical i2c bus along
|
||||
* with the access algorithms necessary to access it.
|
||||
*/
|
||||
struct i2c_adapter {
|
||||
struct i2c_algorithm *algo;/* the algorithm to access the bus */
|
||||
void *algo_data;
|
||||
int timeout;
|
||||
int retries;
|
||||
int nr;
|
||||
struct i2c_adapter
|
||||
{
|
||||
struct i2c_algorithm *algo; /* the algorithm to access the bus */
|
||||
void *algo_data;
|
||||
int timeout;
|
||||
int retries;
|
||||
int nr;
|
||||
};
|
||||
|
||||
/*
|
||||
* I2C Message - used for pure i2c transaction, also from /dev interface
|
||||
*/
|
||||
struct i2c_msg {
|
||||
unsigned short addr; /* slave address */
|
||||
unsigned short flags;
|
||||
#define I2C_M_TEN 0x10 /* we have a ten bit chip address */
|
||||
#define I2C_M_RD 0x01
|
||||
#define I2C_M_NOSTART 0x4000
|
||||
#define I2C_M_REV_DIR_ADDR 0x2000
|
||||
#define I2C_M_IGNORE_NAK 0x1000
|
||||
#define I2C_M_NO_RD_ACK 0x0800
|
||||
unsigned short len; /* msg length */
|
||||
unsigned char *buf; /* pointer to msg data */
|
||||
struct i2c_msg
|
||||
{
|
||||
unsigned short addr; /* slave address */
|
||||
unsigned short flags;
|
||||
#define I2C_M_TEN 0x10 /* we have a ten bit chip address */
|
||||
#define I2C_M_RD 0x01
|
||||
#define I2C_M_NOSTART 0x4000
|
||||
#define I2C_M_REV_DIR_ADDR 0x2000
|
||||
#define I2C_M_IGNORE_NAK 0x1000
|
||||
#define I2C_M_NO_RD_ACK 0x0800
|
||||
unsigned short len; /* msg length */
|
||||
unsigned char *buf; /* pointer to msg data */
|
||||
};
|
||||
|
||||
/*
|
||||
extern void i2c_init(void);
|
||||
extern void i2c_set_frequency(int hz);
|
||||
extern int i2c_read(int address, char *data, int lengt, bool repeated);
|
||||
extern int i2c_read_byte(int ack);
|
||||
extern int i2c_write(int address, const char *data, int length, bool repeated);
|
||||
extern int i2c_write_byte(int data);
|
||||
extern void i2c_start(void);
|
||||
extern void i2c_stop(void);
|
||||
*/
|
||||
#endif /* _I2C_H */
|
||||
|
||||
@@ -27,81 +27,124 @@
|
||||
#include <stdbool.h>
|
||||
|
||||
/* interrupt sources */
|
||||
#define INT_SOURCE_EPORT_EPF1 1 // edge port flag 1
|
||||
#define INT_SOURCE_EPORT_EPF2 2 // edge port flag 2
|
||||
#define INT_SOURCE_EPORT_EPF3 3 // edge port flag 3
|
||||
#define INT_SOURCE_EPORT_EPF4 4 // edge port flag 4
|
||||
#define INT_SOURCE_EPORT_EPF5 5 // edge port flag 5
|
||||
#define INT_SOURCE_EPORT_EPF6 6 // edge port flag 6
|
||||
#define INT_SOURCE_EPORT_EPF7 7 // edge port flag 7
|
||||
#define INT_SOURCE_USB_EP0ISR 15 // USB endpoint 0 interrupt
|
||||
#define INT_SOURCE_USB_EP1ISR 16 // USB endpoint 1 interrupt
|
||||
#define INT_SOURCE_USB_EP2ISR 17 // USB endpoint 2 interrupt
|
||||
#define INT_SOURCE_USB_EP3ISR 18 // USB endpoint 3 interrupt
|
||||
#define INT_SOURCE_USB_EP4ISR 19 // USB endpoint 4 interrupt
|
||||
#define INT_SOURCE_USB_EP5ISR 20 // USB endpoint 5 interrupt
|
||||
#define INT_SOURCE_USB_EP6ISR 21 // USB endpoint 6 interrupt
|
||||
#define INT_SOURCE_USB_USBISR 22 // USB general interrupt
|
||||
#define INT_SOURCE_USB_USBAISR 23 // USB core interrupt
|
||||
#define INT_SOURCE_USB_ANY 24 // OR of all USB interrupts
|
||||
#define INT_SOURCE_USB_DSPI_OVF 25 // DSPI overflow or underflow
|
||||
#define INT_SOURCE_USB_DSPI_RFOF 26 // receive FIFO overflow interrupt
|
||||
#define INT_SOURCE_USB_DSPI_RFDF 27 // receive FIFO drain interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TFUF 28 // transmit FIFO underflow interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TCF 29 // transfer complete interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TFFF 30 // transfer FIFO fill interrupt
|
||||
#define INT_SOURCE_USB_DSPI_EOQF 31 // end of queue interrupt
|
||||
#define INT_SOURCE_PSC3 32 // PSC3 interrupt
|
||||
#define INT_SOURCE_PSC2 33 // PSC2 interrupt
|
||||
#define INT_SOURCE_PSC1 34 // PSC1 interrupt
|
||||
#define INT_SOURCE_PSC0 35 // PSC0 interrupt
|
||||
#define INT_SOURCE_CTIMERS 36 // combined source for comm timers
|
||||
#define INT_SOURCE_SEC 37 // SEC interrupt
|
||||
#define INT_SOURCE_FEC1 38 // FEC1 interrupt
|
||||
#define INT_SOURCE_FEC0 39 // FEC0 interrupt
|
||||
#define INT_SOURCE_I2C 40 // I2C interrupt
|
||||
#define INT_SOURCE_PCIARB 41 // PCI arbiter interrupt
|
||||
#define INT_SOURCE_CBPCI 42 // COMM bus PCI interrupt
|
||||
#define INT_SOURCE_XLBPCI 43 // XLB PCI interrupt
|
||||
#define INT_SOURCE_XLBARB 47 // XLBARB to PCI interrupt
|
||||
#define INT_SOURCE_DMA 48 // multichannel DMA interrupt
|
||||
#define INT_SOURCE_CAN0_ERROR 49 // FlexCAN error interrupt
|
||||
#define INT_SOURCE_CAN0_BUSOFF 50 // FlexCAN bus off interrupt
|
||||
#define INT_SOURCE_CAN0_MBOR 51 // message buffer ORed interrupt
|
||||
#define INT_SOURCE_SLT1 53 // slice timer 1 interrupt
|
||||
#define INT_SOURCE_SLT0 54 // slice timer 0 interrupt
|
||||
#define INT_SOURCE_CAN1_ERROR 55 // FlexCAN error interrupt
|
||||
#define INT_SOURCE_CAN1_BUSOFF 56 // FlexCAN bus off interrupt
|
||||
#define INT_SOURCE_CAN1_MBOR 57 // message buffer ORed interrupt
|
||||
#define INT_SOURCE_GPT3 59 // GPT3 timer interrupt
|
||||
#define INT_SOURCE_GPT2 60 // GPT2 timer interrupt
|
||||
#define INT_SOURCE_GPT1 61 // GPT1 timer interrupt
|
||||
#define INT_SOURCE_GPT0 62 // GPT0 timer interrupt
|
||||
#define INT_SOURCE_EPORT_EPF1 1 // edge port flag 1
|
||||
#define INT_SOURCE_EPORT_EPF2 2 // edge port flag 2
|
||||
#define INT_SOURCE_EPORT_EPF3 3 // edge port flag 3
|
||||
#define INT_SOURCE_EPORT_EPF4 4 // edge port flag 4
|
||||
#define INT_SOURCE_EPORT_EPF5 5 // edge port flag 5
|
||||
#define INT_SOURCE_EPORT_EPF6 6 // edge port flag 6
|
||||
#define INT_SOURCE_EPORT_EPF7 7 // edge port flag 7
|
||||
#define INT_SOURCE_USB_EP0ISR 15 // USB endpoint 0 interrupt
|
||||
#define INT_SOURCE_USB_EP1ISR 16 // USB endpoint 1 interrupt
|
||||
#define INT_SOURCE_USB_EP2ISR 17 // USB endpoint 2 interrupt
|
||||
#define INT_SOURCE_USB_EP3ISR 18 // USB endpoint 3 interrupt
|
||||
#define INT_SOURCE_USB_EP4ISR 19 // USB endpoint 4 interrupt
|
||||
#define INT_SOURCE_USB_EP5ISR 20 // USB endpoint 5 interrupt
|
||||
#define INT_SOURCE_USB_EP6ISR 21 // USB endpoint 6 interrupt
|
||||
#define INT_SOURCE_USB_USBISR 22 // USB general interrupt
|
||||
#define INT_SOURCE_USB_USBAISR 23 // USB core interrupt
|
||||
#define INT_SOURCE_USB_ANY 24 // OR of all USB interrupts
|
||||
#define INT_SOURCE_USB_DSPI_OVF 25 // DSPI overflow or underflow
|
||||
#define INT_SOURCE_USB_DSPI_RFOF 26 // receive FIFO overflow interrupt
|
||||
#define INT_SOURCE_USB_DSPI_RFDF 27 // receive FIFO drain interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TFUF 28 // transmit FIFO underflow interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TCF 29 // transfer complete interrupt
|
||||
#define INT_SOURCE_USB_DSPI_TFFF 30 // transfer FIFO fill interrupt
|
||||
#define INT_SOURCE_USB_DSPI_EOQF 31 // end of queue interrupt
|
||||
#define INT_SOURCE_PSC3 32 // PSC3 interrupt
|
||||
#define INT_SOURCE_PSC2 33 // PSC2 interrupt
|
||||
#define INT_SOURCE_PSC1 34 // PSC1 interrupt
|
||||
#define INT_SOURCE_PSC0 35 // PSC0 interrupt
|
||||
#define INT_SOURCE_CTIMERS 36 // combined source for comm timers
|
||||
#define INT_SOURCE_SEC 37 // SEC interrupt
|
||||
#define INT_SOURCE_FEC1 38 // FEC1 interrupt
|
||||
#define INT_SOURCE_FEC0 39 // FEC0 interrupt
|
||||
#define INT_SOURCE_I2C 40 // I2C interrupt
|
||||
#define INT_SOURCE_PCIARB 41 // PCI arbiter interrupt
|
||||
#define INT_SOURCE_CBPCI 42 // COMM bus PCI interrupt
|
||||
#define INT_SOURCE_XLBPCI 43 // XLB PCI interrupt
|
||||
#define INT_SOURCE_XLBARB 47 // XLBARB to PCI interrupt
|
||||
#define INT_SOURCE_DMA 48 // multichannel DMA interrupt
|
||||
#define INT_SOURCE_CAN0_ERROR 49 // FlexCAN error interrupt
|
||||
#define INT_SOURCE_CAN0_BUSOFF 50 // FlexCAN bus off interrupt
|
||||
#define INT_SOURCE_CAN0_MBOR 51 // message buffer ORed interrupt
|
||||
#define INT_SOURCE_SLT1 53 // slice timer 1 interrupt
|
||||
#define INT_SOURCE_SLT0 54 // slice timer 0 interrupt
|
||||
#define INT_SOURCE_CAN1_ERROR 55 // FlexCAN error interrupt
|
||||
#define INT_SOURCE_CAN1_BUSOFF 56 // FlexCAN bus off interrupt
|
||||
#define INT_SOURCE_CAN1_MBOR 57 // message buffer ORed interrupt
|
||||
#define INT_SOURCE_GPT3 59 // GPT3 timer interrupt
|
||||
#define INT_SOURCE_GPT2 60 // GPT2 timer interrupt
|
||||
#define INT_SOURCE_GPT1 61 // GPT1 timer interrupt
|
||||
#define INT_SOURCE_GPT0 62 // GPT0 timer interrupt
|
||||
|
||||
|
||||
#define FEC0_INTC_LVL 1 /* interrupt level for FEC0 */
|
||||
#define FEC0_INTC_PRI 2 /* interrupt priority for FEC0 */
|
||||
#define FEC0_INTC_LVL 6 /* interrupt level for FEC0 */
|
||||
#define FEC0_INTC_PRI 7 /* interrupt priority for FEC0 */
|
||||
|
||||
#define FEC1_INTC_LVL 1 /* interrupt level for FEC1 */
|
||||
#define FEC1_INTC_PRI 2 /* interrupt priority for FEC1 */
|
||||
#define FEC1_INTC_LVL 6 /* interrupt level for FEC1 */
|
||||
#define FEC1_INTC_PRI 6 /* interrupt priority for FEC1 */
|
||||
|
||||
#define FEC_INTC_LVL(x) ((x == 0) ? FEC0_INTC_LVL : FEC1_INTC_LVL)
|
||||
#define FEC_INTC_PRI(x) ((x == 0) ? FEC0_INTC_PRI : FEC1_INTC_PRI)
|
||||
#define FEC_INTC_LVL(x) ((x == 0) ? FEC0_INTC_LVL : FEC1_INTC_LVL)
|
||||
#define FEC_INTC_PRI(x) ((x == 0) ? FEC0_INTC_PRI : FEC1_INTC_PRI)
|
||||
|
||||
#define FEC0RX_DMA_PRI 5
|
||||
#define FEC1RX_DMA_PRI 5
|
||||
#define FEC1RX_DMA_PRI 4
|
||||
#define FECRX_DMA_PRI(x) ((x == 0) ? FEC0RX_DMA_PRI : FEC1RX_DMA_PRI)
|
||||
#define FEC0TX_DMA_PRI 6
|
||||
#define FEC1TX_DMA_PRI 6
|
||||
#define FEC0TX_DMA_PRI 2
|
||||
#define FEC1TX_DMA_PRI 1
|
||||
#define FECTX_DMA_PRI(x) ((x == 0) ? FEC0TX_DMA_PRI : FEC1TX_DMA_PRI)
|
||||
|
||||
extern int register_interrupt_handler(uint8_t source, uint8_t level, uint8_t priority, uint8_t intr, void (*handler)(void));
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
|
||||
#define ISR_DBUG_ISR 0x01
|
||||
#define ISR_USER_ISR 0x02
|
||||
/* Firebee FPGA interrupt controller */
|
||||
#define FBEE_INTR_CONTROL * ((volatile uint32_t *) 0xf0010000)
|
||||
#define FBEE_INTR_ENABLE * ((volatile uint32_t *) 0xf0010004)
|
||||
#define FBEE_INTR_CLEAR * ((volatile uint32_t *) 0xf0010008)
|
||||
#define FBEE_INTR_PENDING * ((volatile uint32_t *) 0xff01000c)
|
||||
|
||||
/* register bits for Firebee FPGA-based interrupt controller */
|
||||
#define FBEE_INTR_PIC (1 << 0) /* PIC interrupt enable/pending/clear bit */
|
||||
#define FBEE_INTR_ETHERNET (1 << 1) /* ethernet PHY interrupt enable/pending/clear bit */
|
||||
#define FBEE_INTR_DVI (1 << 2) /* TFP410 monitor sense interrupt enable/pending/clear bit */
|
||||
#define FBEE_INTR_PCI_INTA (1 << 3) /* /PCIINTA enable/pending clear bit */
|
||||
#define FBEE_INTR_PCI_INTB (1 << 4) /* /PCIINTB enable/pending clear bit */
|
||||
#define FBEE_INTR_PCI_INTC (1 << 5) /* /PCIINTC enable/pending clear bit */
|
||||
#define FBEE_INTR_PCI_INTD (1 << 6) /* /PCIINTD enable/pending clear bit */
|
||||
#define FBEE_INTR_DSP (1 << 7) /* DSP interrupt enable/pending/clear bit */
|
||||
#define FBEE_INTR_VSYNC (1 << 8) /* VSYNC interrupt enable/pending/clear bit */
|
||||
#define FBEE_INTR_HSYNC (1 << 9) /* HSYNC interrupt enable/pending/clear bit */
|
||||
|
||||
#define FBEE_INTR_INT_HSYNC_IRQ2 (1 << 26) /* these bits are only meaningful for the FBEE_INTR_ENABLE register */
|
||||
#define FBEE_INTR_INT_CTR0_IRQ3 (1 << 27)
|
||||
#define FBEE_INTR_INT_VSYNC_IRQ4 (1 << 28)
|
||||
#define FBEE_INTR_INT_FPGA_IRQ5 (1 << 29)
|
||||
#define FBEE_INTR_INT_MFP_IRQ6 (1 << 30)
|
||||
#define FBEE_INTR_INT_IRQ7 (1 << 31)
|
||||
|
||||
/*
|
||||
* Atari MFP interrupt registers.
|
||||
*/
|
||||
|
||||
#define FALCON_MFP_IERA *((volatile uint8_t *) 0xfffffa07)
|
||||
#define FALCON_MFP_IERB *((volatile uint8_t *) 0xfffffa09)
|
||||
#define FALCON_MFP_IPRA *((volatile uint8_t *) 0xfffffa0b)
|
||||
#define FALCON_MFP_IPRB *((volatile uint8_t *) 0xfffffa0d)
|
||||
#define FALCON_MFP_IMRA *((volatile uint8_t *) 0xfffffa13)
|
||||
#define FALCON_MFP_IMRB *((volatile uint8_t *) 0xfffffa15)
|
||||
|
||||
#endif /* MACHINE_FIREBEE */
|
||||
|
||||
extern void isr_init(void);
|
||||
extern int isr_register_handler(int vector, int (*handler)(void *, void *), void *hdev, void *harg);
|
||||
extern void isr_remove_handler(int (*handler)(void *, void *));
|
||||
extern bool isr_set_prio_and_level(int int_source, int priority, int level);
|
||||
extern bool isr_enable_int_source(int int_source);
|
||||
extern bool isr_register_handler(int vector, int level, int priority, bool (*handler)(void *, void *), void *hdev, void *harg);
|
||||
extern void isr_remove_handler(bool (*handler)(void *, void *));
|
||||
extern bool isr_execute_handler(int vector);
|
||||
extern bool pic_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool xlbpci_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool pciarb_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool xlbarb_interrupt_handler(void *arg1, void *arg2, ...);
|
||||
extern bool gpt0_interrupt_handler(void *arg1, void *arg2);
|
||||
extern bool irq5_handler(void *arg1, void *arg2);
|
||||
#endif /* _INTERRUPTS_H_ */
|
||||
|
||||
@@ -41,6 +41,7 @@
|
||||
#else
|
||||
#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
|
||||
#endif /* COMPILE_RAM */
|
||||
#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
|
||||
|
||||
#define DRIVER_MEM_BUFFER_SIZE 0x100000
|
||||
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#define SYSCLK 100000
|
||||
#define SYSCLK 100000UL
|
||||
|
||||
#define BOOTFLASH_BASE_ADDRESS 0xe0000000
|
||||
#define BOOTFLASH_SIZE 0x400000 /* LITEKIT has 4MB flash */
|
||||
@@ -41,6 +41,7 @@
|
||||
#else
|
||||
#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
|
||||
#endif /* COMPILE_RAM */
|
||||
#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
|
||||
|
||||
#define DRIVER_MEM_BUFFER_SIZE 0x100000
|
||||
|
||||
|
||||
@@ -24,13 +24,14 @@
|
||||
#ifndef _MMU_H_
|
||||
#define _MMU_H_
|
||||
|
||||
#include <stddef.h>
|
||||
#include "bas_types.h"
|
||||
|
||||
/*
|
||||
* ACR register handling macros
|
||||
*/
|
||||
#define ACR_BA(x) ((x) & 0xffff0000)
|
||||
#define ACR_ADMSK(x) (((x) & 0xffff) << 16)
|
||||
#define ACR_BA(x) ((x) & 0xff000000)
|
||||
#define ACR_ADMSK(x) (((x) & 0xff) << 16)
|
||||
#define ACR_E(x) (((x) & 1) << 15)
|
||||
|
||||
#define ACR_S(x) (((x) & 3) << 13)
|
||||
@@ -44,6 +45,17 @@
|
||||
#define ACR_SUPERVISOR_PROTECT(x) (((x) & 1) << 3)
|
||||
#define ACR_WRITE_PROTECT(x) (((x) & 1) << 2)
|
||||
|
||||
#define ACR_AMM(x) (((x) & 1) << 10)
|
||||
|
||||
#define ACR_CM(x) (((x) & 3) << 5)
|
||||
#define ACR_CM_CACHEABLE_WT 0x0
|
||||
#define ACR_CM_CACHEABLE_CB 0x1
|
||||
#define ACR_CM_CACHE_INH_PRECISE 0x2
|
||||
#define ACR_CM_CACHE_INH_IMPRECISE 0x3
|
||||
|
||||
#define ACR_SP(x) (((x) & 1) << 3)
|
||||
#define ACR_W(x) (((x) & 1) << 2)
|
||||
|
||||
|
||||
/*
|
||||
* MMU register handling macros
|
||||
@@ -54,11 +66,23 @@
|
||||
/*
|
||||
* MMU page sizes
|
||||
*/
|
||||
#define MMU_PAGE_SIZE_1M 0
|
||||
#define MMU_PAGE_SIZE_4K 1
|
||||
#define MMU_PAGE_SIZE_8K 2
|
||||
#define MMU_PAGE_SIZE_1K 3
|
||||
|
||||
enum mmu_page_size
|
||||
{
|
||||
MMU_PAGE_SIZE_1M = 0,
|
||||
MMU_PAGE_SIZE_4K = 1,
|
||||
MMU_PAGE_SIZE_8K = 2,
|
||||
MMU_PAGE_SIZE_1K = 3
|
||||
};
|
||||
|
||||
#define MMU_PAGE_SIZE_DEFAULT MMU_PAGE_SIZE_1M /* note: if this changes, SIZE_DEFAULT below _must_ also change */
|
||||
|
||||
#define SIZE_1M 0x100000 /* 1 Megabyte */
|
||||
#define SIZE_4K 0x1000 /* 4 KB */
|
||||
#define SIZE_8K 0x2000 /* 8 KB */
|
||||
#define SIZE_1K 0x400 /* 1 KB */
|
||||
|
||||
#define SIZE_DEFAULT SIZE_1M
|
||||
/*
|
||||
* cache modes
|
||||
*/
|
||||
@@ -78,14 +102,6 @@
|
||||
#define ACCESS_WRITE (1 << 1)
|
||||
#define ACCESS_EXECUTE (1 << 2)
|
||||
|
||||
struct map_flags
|
||||
{
|
||||
unsigned cache_mode:2;
|
||||
unsigned protection:1;
|
||||
unsigned page_id:8;
|
||||
unsigned access:3;
|
||||
unsigned unused:18;
|
||||
};
|
||||
|
||||
/*
|
||||
* global variables from linker script
|
||||
@@ -93,7 +109,25 @@ struct map_flags
|
||||
extern long video_tlb;
|
||||
extern long video_sbt;
|
||||
|
||||
extern void mmu_init(void);
|
||||
extern void mmu_map_page(uint32_t virt, uint32_t phys, uint32_t map_size, struct map_flags flags);
|
||||
struct mmu_page_descriptor_ram
|
||||
{
|
||||
uint8_t cache_mode : 2;
|
||||
uint8_t supervisor_protect : 1;
|
||||
uint8_t read : 1;
|
||||
uint8_t write : 1;
|
||||
uint8_t execute : 1;
|
||||
uint8_t global : 1;
|
||||
uint8_t locked : 1;
|
||||
};
|
||||
|
||||
extern void mmu_init(void);
|
||||
extern uint32_t mmu_map_page(uint32_t virt, uint32_t phys, enum mmu_page_size sz, uint8_t page_id, const struct mmu_page_descriptor_ram *flags);
|
||||
|
||||
/*
|
||||
* API functions for the BaS driver interface
|
||||
*/
|
||||
extern uint32_t mmu_map_data_page_locked(uint32_t address, uint32_t length, int asid);
|
||||
extern uint32_t mmu_unlock_data_page(uint32_t address, uint32_t length, int asid);
|
||||
extern uint32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb);
|
||||
extern uint32_t mmu_report_pagesize(void);
|
||||
#endif /* _MMU_H_ */
|
||||
|
||||
@@ -3,10 +3,14 @@
|
||||
|
||||
#define PCI_ANY_ID (~0)
|
||||
|
||||
struct pci_device_id {
|
||||
unsigned long vendor, device; /* Vendor and device ID or PCI_ANY_ID*/
|
||||
unsigned long subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */
|
||||
unsigned long class, class_mask; /* (class,subclass,prog-if) triplet */
|
||||
struct pci_device_id
|
||||
{
|
||||
unsigned long vendor; /* Vendor and device ID or PCI_ANY_ID*/
|
||||
unsigned long device;
|
||||
unsigned long subvendor; /* Subsystem ID's or PCI_ANY_ID */
|
||||
unsigned long subdevice;
|
||||
unsigned long class; /* (class,subclass,prog-if) triplet */
|
||||
unsigned long class_mask;
|
||||
unsigned long driver_data; /* Data private to the driver */
|
||||
};
|
||||
|
||||
@@ -15,7 +19,8 @@ struct pci_device_id {
|
||||
#define IEEE1394_MATCH_SPECIFIER_ID 0x0004
|
||||
#define IEEE1394_MATCH_VERSION 0x0008
|
||||
|
||||
struct ieee1394_device_id {
|
||||
struct ieee1394_device_id
|
||||
{
|
||||
unsigned long match_flags;
|
||||
unsigned long vendor_id;
|
||||
unsigned long model_id;
|
||||
@@ -81,7 +86,8 @@ struct ieee1394_device_id {
|
||||
* matches towards the beginning of your table, so that driver_info can
|
||||
* record quirks of specific products.
|
||||
*/
|
||||
struct usb_device_id {
|
||||
struct usb_device_id
|
||||
{
|
||||
/* which fields to match against? */
|
||||
unsigned short match_flags;
|
||||
|
||||
@@ -106,10 +112,10 @@ struct usb_device_id {
|
||||
};
|
||||
|
||||
/* Some useful macros to use to create struct usb_device_id */
|
||||
#define USB_DEVICE_ID_MATCH_VENDOR 0x0001
|
||||
#define USB_DEVICE_ID_MATCH_PRODUCT 0x0002
|
||||
#define USB_DEVICE_ID_MATCH_DEV_LO 0x0004
|
||||
#define USB_DEVICE_ID_MATCH_DEV_HI 0x0008
|
||||
#define USB_DEVICE_ID_MATCH_VENDOR 0x0001
|
||||
#define USB_DEVICE_ID_MATCH_PRODUCT 0x0002
|
||||
#define USB_DEVICE_ID_MATCH_DEV_LO 0x0004
|
||||
#define USB_DEVICE_ID_MATCH_DEV_HI 0x0008
|
||||
#define USB_DEVICE_ID_MATCH_DEV_CLASS 0x0010
|
||||
#define USB_DEVICE_ID_MATCH_DEV_SUBCLASS 0x0020
|
||||
#define USB_DEVICE_ID_MATCH_DEV_PROTOCOL 0x0040
|
||||
@@ -118,18 +124,19 @@ struct usb_device_id {
|
||||
#define USB_DEVICE_ID_MATCH_INT_PROTOCOL 0x0200
|
||||
|
||||
/* s390 CCW devices */
|
||||
struct ccw_device_id {
|
||||
struct ccw_device_id
|
||||
{
|
||||
unsigned short match_flags; /* which fields to match against */
|
||||
|
||||
unsigned short cu_type; /* control unit type */
|
||||
unsigned short dev_type; /* device type */
|
||||
unsigned char cu_model; /* control unit model */
|
||||
unsigned char dev_model; /* device model */
|
||||
unsigned short cu_type; /* control unit type */
|
||||
unsigned short dev_type; /* device type */
|
||||
unsigned char cu_model; /* control unit model */
|
||||
unsigned char dev_model; /* device model */
|
||||
|
||||
unsigned long driver_info;
|
||||
};
|
||||
|
||||
#define CCW_DEVICE_ID_MATCH_CU_TYPE 0x01
|
||||
#define CCW_DEVICE_ID_MATCH_CU_TYPE 0x01
|
||||
#define CCW_DEVICE_ID_MATCH_CU_MODEL 0x02
|
||||
#define CCW_DEVICE_ID_MATCH_DEVICE_TYPE 0x04
|
||||
#define CCW_DEVICE_ID_MATCH_DEVICE_MODEL 0x08
|
||||
@@ -138,15 +145,18 @@ struct ccw_device_id {
|
||||
#define PNP_ID_LEN 8
|
||||
#define PNP_MAX_DEVICES 8
|
||||
|
||||
struct pnp_device_id {
|
||||
struct pnp_device_id
|
||||
{
|
||||
unsigned char id[PNP_ID_LEN];
|
||||
unsigned long driver_data;
|
||||
};
|
||||
|
||||
struct pnp_card_device_id {
|
||||
struct pnp_card_device_id
|
||||
{
|
||||
unsigned char id[PNP_ID_LEN];
|
||||
unsigned long driver_data;
|
||||
struct {
|
||||
struct
|
||||
{
|
||||
unsigned char id[PNP_ID_LEN];
|
||||
} devs[PNP_MAX_DEVICES];
|
||||
};
|
||||
@@ -154,7 +164,8 @@ struct pnp_card_device_id {
|
||||
|
||||
#define SERIO_ANY 0xff
|
||||
|
||||
struct serio_device_id {
|
||||
struct serio_device_id
|
||||
{
|
||||
unsigned char type;
|
||||
unsigned char extra;
|
||||
unsigned char id;
|
||||
|
||||
@@ -10,7 +10,6 @@
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
/********************************************************************/
|
||||
/*
|
||||
* Include the Queue structure definitions
|
||||
*/
|
||||
|
||||
@@ -8,9 +8,7 @@
|
||||
#ifndef _TIMER_H_
|
||||
#define _TIMER_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <stddef.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
355
include/ohci.h
355
include/ohci.h
@@ -6,63 +6,63 @@
|
||||
*
|
||||
* usb-ohci.h
|
||||
*/
|
||||
|
||||
|
||||
#define USB_OHCI_MAX_ROOT_PORTS 4
|
||||
|
||||
static int cc_to_error[16] = {
|
||||
static int cc_to_error[16] =
|
||||
{
|
||||
|
||||
/* mapping of the OHCI CC status to error codes */
|
||||
/* No Error */ 0,
|
||||
/* CRC Error */ USB_ST_CRC_ERR,
|
||||
/* Bit Stuff */ USB_ST_BIT_ERR,
|
||||
/* Data Togg */ USB_ST_CRC_ERR,
|
||||
/* Stall */ USB_ST_STALLED,
|
||||
/* DevNotResp */ -1,
|
||||
/* PIDCheck */ USB_ST_BIT_ERR,
|
||||
/* UnExpPID */ USB_ST_BIT_ERR,
|
||||
/* DataOver */ USB_ST_BUF_ERR,
|
||||
/* DataUnder */ USB_ST_BUF_ERR,
|
||||
/* reservd */ -1,
|
||||
/* reservd */ -1,
|
||||
/* BufferOver */ USB_ST_BUF_ERR,
|
||||
/* BuffUnder */ USB_ST_BUF_ERR,
|
||||
/* Not Access */ -1,
|
||||
/* Not Access */ -1
|
||||
/* No Error */ 0,
|
||||
/* CRC Error */ USB_ST_CRC_ERR,
|
||||
/* Bit Stuff */ USB_ST_BIT_ERR,
|
||||
/* Data Togg */ USB_ST_CRC_ERR,
|
||||
/* Stall */ USB_ST_STALLED,
|
||||
/* DevNotResp */ -1,
|
||||
/* PIDCheck */ USB_ST_BIT_ERR,
|
||||
/* UnExpPID */ USB_ST_BIT_ERR,
|
||||
/* DataOver */ USB_ST_BUF_ERR,
|
||||
/* DataUnder */ USB_ST_BUF_ERR,
|
||||
/* reservd */ -1,
|
||||
/* reservd */ -1,
|
||||
/* BufferOver */ USB_ST_BUF_ERR,
|
||||
/* BuffUnder */ USB_ST_BUF_ERR,
|
||||
/* Not Access */ -1,
|
||||
/* Not Access */ -1
|
||||
};
|
||||
|
||||
#ifdef DEBUG
|
||||
static const char *cc_to_string[16] = {
|
||||
"No Error",
|
||||
"CRC: Last data packet from endpoint contained a CRC error.",
|
||||
"BITSTUFFING:\r\nLast data packet from endpoint contained a bit stuffing violation",
|
||||
"DATATOGGLEMISMATCH:\r\n Last packet from endpoint had data toggle PID\r\n" \
|
||||
"that did not match the expected value.",
|
||||
"STALL: TD was moved to the Done Queue because the endpoint returned a STALL PID",
|
||||
"DEVICENOTRESPONDING:\r\nDevice did not respond to token (IN) or did\r\n" \
|
||||
"not provide a handshake (OUT)",
|
||||
"PIDCHECKFAILURE:\r\nCheck bits on PID from endpoint failed on data PID\r\n"\
|
||||
"(IN) or handshake (OUT)",
|
||||
"UNEXPECTEDPID:\r\nReceive PID was not valid when encountered or PID\r\n" \
|
||||
"value is not defined.",
|
||||
"DATAOVERRUN:\r\nThe amount of data returned by the endpoint exceeded\r\n" \
|
||||
"either the size of the maximum data packet allowed\r\n" \
|
||||
"from the endpoint (found in MaximumPacketSize field\r\n" \
|
||||
"of ED) or the remaining buffer size.",
|
||||
"DATAUNDERRUN:\r\nThe endpoint returned less than MaximumPacketSize\r\n" \
|
||||
"and that amount was not sufficient to fill the\r\n" \
|
||||
"specified buffer",
|
||||
"reserved1",
|
||||
"reserved2",
|
||||
"BUFFEROVERRUN:\r\nDuring an IN, HC received data from endpoint faster\r\n" \
|
||||
"than it could be written to system memory",
|
||||
"BUFFERUNDERRUN:\r\nDuring an OUT, HC could not retrieve data from\r\n" \
|
||||
"system memory fast enough to keep up with data USB data rate.",
|
||||
"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
|
||||
"on a list to be processed by the HC.(1)",
|
||||
"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
|
||||
"on a list to be processed by the HC.(2)",
|
||||
static const char *cc_to_string[16] =
|
||||
{
|
||||
"No Error",
|
||||
"CRC: Last data packet from endpoint contained a CRC error.",
|
||||
"BITSTUFFING:\r\nLast data packet from endpoint contained a bit stuffing violation",
|
||||
"DATATOGGLEMISMATCH:\r\n Last packet from endpoint had data toggle PID\r\n" \
|
||||
"that did not match the expected value.",
|
||||
"STALL: TD was moved to the Done Queue because the endpoint returned a STALL PID",
|
||||
"DEVICENOTRESPONDING:\r\nDevice did not respond to token (IN) or did\r\n" \
|
||||
"not provide a handshake (OUT)",
|
||||
"PIDCHECKFAILURE:\r\nCheck bits on PID from endpoint failed on data PID\r\n"\
|
||||
"(IN) or handshake (OUT)",
|
||||
"UNEXPECTEDPID:\r\nReceive PID was not valid when encountered or PID\r\n" \
|
||||
"value is not defined.",
|
||||
"DATAOVERRUN:\r\nThe amount of data returned by the endpoint exceeded\r\n" \
|
||||
"either the size of the maximum data packet allowed\r\n" \
|
||||
"from the endpoint (found in MaximumPacketSize field\r\n" \
|
||||
"of ED) or the remaining buffer size.",
|
||||
"DATAUNDERRUN:\r\nThe endpoint returned less than MaximumPacketSize\r\n" \
|
||||
"and that amount was not sufficient to fill the\r\n" \
|
||||
"specified buffer",
|
||||
"reserved1",
|
||||
"reserved2",
|
||||
"BUFFEROVERRUN:\r\nDuring an IN, HC received data from endpoint faster\r\n" \
|
||||
"than it could be written to system memory",
|
||||
"BUFFERUNDERRUN:\r\nDuring an OUT, HC could not retrieve data from\r\n" \
|
||||
"system memory fast enough to keep up with data USB data rate.",
|
||||
"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
|
||||
"on a list to be processed by the HC.(1)",
|
||||
"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
|
||||
"on a list to be processed by the HC.(2)",
|
||||
};
|
||||
#endif /* DEBUG */
|
||||
|
||||
/* ED States */
|
||||
|
||||
@@ -73,25 +73,26 @@ static const char *cc_to_string[16] = {
|
||||
#define ED_URB_DEL 0x08
|
||||
|
||||
/* usb_ohci_ed */
|
||||
struct ed {
|
||||
uint32_t hwINFO;
|
||||
uint32_t hwTailP;
|
||||
uint32_t hwHeadP;
|
||||
uint32_t hwNextED;
|
||||
struct ed
|
||||
{
|
||||
uint32_t hwINFO;
|
||||
uint32_t hwTailP;
|
||||
uint32_t hwHeadP;
|
||||
uint32_t hwNextED;
|
||||
|
||||
struct ed *ed_prev;
|
||||
uint8_t int_period;
|
||||
uint8_t int_branch;
|
||||
uint8_t int_load;
|
||||
uint8_t int_interval;
|
||||
uint8_t state;
|
||||
uint8_t type;
|
||||
uint16_t last_iso;
|
||||
struct ed *ed_rm_list;
|
||||
struct ed *ed_prev;
|
||||
uint8_t int_period;
|
||||
uint8_t int_branch;
|
||||
uint8_t int_load;
|
||||
uint8_t int_interval;
|
||||
uint8_t state;
|
||||
uint8_t type;
|
||||
uint16_t last_iso;
|
||||
struct ed *ed_rm_list;
|
||||
|
||||
struct usb_device *usb_dev;
|
||||
void *purb;
|
||||
uint32_t unused[2];
|
||||
struct usb_device *usb_dev;
|
||||
void *purb;
|
||||
uint32_t unused[2];
|
||||
} __attribute__((aligned(16)));
|
||||
typedef struct ed ed_t;
|
||||
|
||||
@@ -134,22 +135,23 @@ typedef struct ed ed_t;
|
||||
|
||||
#define MAXPSW 1
|
||||
|
||||
struct td {
|
||||
uint32_t hwINFO;
|
||||
uint32_t hwCBP; /* Current Buffer Pointer */
|
||||
uint32_t hwNextTD; /* Next TD Pointer */
|
||||
uint32_t hwBE; /* Memory Buffer End Pointer */
|
||||
struct td
|
||||
{
|
||||
uint32_t hwINFO;
|
||||
uint32_t hwCBP; /* Current Buffer Pointer */
|
||||
uint32_t hwNextTD; /* Next TD Pointer */
|
||||
uint32_t hwBE; /* Memory Buffer End Pointer */
|
||||
|
||||
uint16_t hwPSW[MAXPSW];
|
||||
uint8_t unused;
|
||||
uint8_t index;
|
||||
struct ed *ed;
|
||||
struct td *next_dl_td;
|
||||
struct usb_device *usb_dev;
|
||||
int transfer_len;
|
||||
uint32_t data;
|
||||
uint16_t hwPSW[MAXPSW];
|
||||
uint8_t unused;
|
||||
uint8_t index;
|
||||
struct ed *ed;
|
||||
struct td *next_dl_td;
|
||||
struct usb_device *usb_dev;
|
||||
int transfer_len;
|
||||
uint32_t data;
|
||||
|
||||
uint32_t unused2[2];
|
||||
uint32_t unused2[2];
|
||||
} __attribute__((aligned(32)));
|
||||
typedef struct td td_t;
|
||||
|
||||
@@ -162,17 +164,18 @@ typedef struct td td_t;
|
||||
*/
|
||||
|
||||
#define NUM_INTS 32 /* part of the OHCI standard */
|
||||
struct ohci_hcca {
|
||||
uint32_t int_table[NUM_INTS]; /* Interrupt ED table */
|
||||
struct ohci_hcca
|
||||
{
|
||||
uint32_t int_table[NUM_INTS]; /* Interrupt ED table */
|
||||
#if defined(CONFIG_MPC5200)
|
||||
uint16_t pad1; /* set to 0 on each frame_no change */
|
||||
uint16_t frame_no; /* current frame number */
|
||||
uint16_t pad1; /* set to 0 on each frame_no change */
|
||||
uint16_t frame_no; /* current frame number */
|
||||
#else
|
||||
uint16_t frame_no; /* current frame number */
|
||||
uint16_t pad1; /* set to 0 on each frame_no change */
|
||||
uint16_t frame_no; /* current frame number */
|
||||
uint16_t pad1; /* set to 0 on each frame_no change */
|
||||
#endif
|
||||
uint32_t done_head; /* info returned for an interrupt */
|
||||
uint8_t reserved_for_hc[116];
|
||||
uint32_t done_head; /* info returned for an interrupt */
|
||||
uint8_t reserved_for_hc[116];
|
||||
} __attribute__((aligned(256)));
|
||||
|
||||
/*
|
||||
@@ -180,35 +183,37 @@ struct ohci_hcca {
|
||||
* region. This is Memory Mapped I/O. You must use the readl() and
|
||||
* writel() macros defined in asm/io.h to access these!!
|
||||
*/
|
||||
struct ohci_regs {
|
||||
/* control and status registers */
|
||||
uint32_t revision;
|
||||
uint32_t control;
|
||||
uint32_t cmdstatus;
|
||||
uint32_t intrstatus;
|
||||
uint32_t intrenable;
|
||||
uint32_t intrdisable;
|
||||
/* memory pointers */
|
||||
uint32_t hcca;
|
||||
uint32_t ed_periodcurrent;
|
||||
uint32_t ed_controlhead;
|
||||
uint32_t ed_controlcurrent;
|
||||
uint32_t ed_bulkhead;
|
||||
uint32_t ed_bulkcurrent;
|
||||
uint32_t donehead;
|
||||
/* frame counters */
|
||||
uint32_t fminterval;
|
||||
uint32_t fmremaining;
|
||||
uint32_t fmnumber;
|
||||
uint32_t periodicstart;
|
||||
uint32_t lsthresh;
|
||||
/* Root hub ports */
|
||||
struct ohci_roothub_regs {
|
||||
uint32_t a;
|
||||
uint32_t b;
|
||||
uint32_t status;
|
||||
uint32_t portstatus[USB_OHCI_MAX_ROOT_PORTS];
|
||||
} roothub;
|
||||
struct ohci_regs
|
||||
{
|
||||
/* control and status registers */
|
||||
uint32_t revision;
|
||||
uint32_t control;
|
||||
uint32_t cmdstatus;
|
||||
uint32_t intrstatus;
|
||||
uint32_t intrenable;
|
||||
uint32_t intrdisable;
|
||||
/* memory pointers */
|
||||
uint32_t hcca;
|
||||
uint32_t ed_periodcurrent;
|
||||
uint32_t ed_controlhead;
|
||||
uint32_t ed_controlcurrent;
|
||||
uint32_t ed_bulkhead;
|
||||
uint32_t ed_bulkcurrent;
|
||||
uint32_t donehead;
|
||||
/* frame counters */
|
||||
uint32_t fminterval;
|
||||
uint32_t fmremaining;
|
||||
uint32_t fmnumber;
|
||||
uint32_t periodicstart;
|
||||
uint32_t lsthresh;
|
||||
/* Root hub ports */
|
||||
struct ohci_roothub_regs
|
||||
{
|
||||
uint32_t a;
|
||||
uint32_t b;
|
||||
uint32_t status;
|
||||
uint32_t portstatus[USB_OHCI_MAX_ROOT_PORTS];
|
||||
} roothub;
|
||||
} __attribute__((aligned(32)));
|
||||
|
||||
/* Some EHCI controls */
|
||||
@@ -263,12 +268,13 @@ struct ohci_regs {
|
||||
|
||||
|
||||
/* Virtual Root HUB */
|
||||
struct virt_root_hub {
|
||||
int devnum; /* Address of Root Hub endpoint */
|
||||
void *dev; /* was urb */
|
||||
void *int_addr;
|
||||
int send;
|
||||
int interval;
|
||||
struct virt_root_hub
|
||||
{
|
||||
int devnum; /* Address of Root Hub endpoint */
|
||||
void *dev; /* was urb */
|
||||
void *int_addr;
|
||||
int send;
|
||||
int interval;
|
||||
};
|
||||
|
||||
/* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */
|
||||
@@ -366,26 +372,27 @@ struct virt_root_hub {
|
||||
#define N_URB_TD 48
|
||||
typedef struct
|
||||
{
|
||||
ed_t *ed;
|
||||
uint16_t length; /* number of tds associated with this request */
|
||||
uint16_t td_cnt; /* number of tds already serviced */
|
||||
struct usb_device *dev;
|
||||
int state;
|
||||
uint32_t pipe;
|
||||
void *transfer_buffer;
|
||||
int transfer_buffer_length;
|
||||
int interval;
|
||||
int actual_length;
|
||||
int finished;
|
||||
td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */
|
||||
ed_t *ed;
|
||||
uint16_t length; /* number of tds associated with this request */
|
||||
uint16_t td_cnt; /* number of tds already serviced */
|
||||
struct usb_device *dev;
|
||||
int state;
|
||||
uint32_t pipe;
|
||||
void *transfer_buffer;
|
||||
int transfer_buffer_length;
|
||||
int interval;
|
||||
int actual_length;
|
||||
int finished;
|
||||
td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */
|
||||
} urb_priv_t;
|
||||
#define URB_DEL 1
|
||||
|
||||
#define NUM_EDS 8 /* num of preallocated endpoint descriptors */
|
||||
|
||||
struct ohci_device {
|
||||
ed_t ed[NUM_EDS];
|
||||
int ed_cnt;
|
||||
struct ohci_device
|
||||
{
|
||||
ed_t ed[NUM_EDS];
|
||||
int ed_cnt;
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -395,46 +402,47 @@ struct ohci_device {
|
||||
* a subset of what the full implementation needs. (Linus)
|
||||
*/
|
||||
|
||||
typedef struct ohci {
|
||||
/* ------- common part -------- */
|
||||
long handle; /* PCI BIOS */
|
||||
const struct pci_device_id *ent;
|
||||
int usbnum;
|
||||
typedef struct ohci
|
||||
{
|
||||
/* ------- common part -------- */
|
||||
long handle; /* PCI BIOS */
|
||||
const struct pci_device_id *ent;
|
||||
int usbnum;
|
||||
/* ---- end of common part ---- */
|
||||
int big_endian; /* PCI BIOS */
|
||||
int controller;
|
||||
struct ohci_hcca *hcca_unaligned;
|
||||
struct ohci_hcca *hcca; /* hcca */
|
||||
td_t *td_unaligned;
|
||||
struct ohci_device *ohci_dev_unaligned;
|
||||
/* this allocates EDs for all possible endpoints */
|
||||
struct ohci_device *ohci_dev;
|
||||
int big_endian; /* PCI BIOS */
|
||||
int controller;
|
||||
struct ohci_hcca *hcca_unaligned;
|
||||
struct ohci_hcca *hcca; /* hcca */
|
||||
td_t *td_unaligned;
|
||||
struct ohci_device *ohci_dev_unaligned;
|
||||
/* this allocates EDs for all possible endpoints */
|
||||
struct ohci_device *ohci_dev;
|
||||
|
||||
int irq_enabled;
|
||||
int stat_irq;
|
||||
int irq;
|
||||
int disabled; /* e.g. got a UE, we're hung */
|
||||
int sleeping;
|
||||
int irq_enabled;
|
||||
int stat_irq;
|
||||
int irq;
|
||||
int disabled; /* e.g. got a UE, we're hung */
|
||||
int sleeping;
|
||||
#define OHCI_FLAGS_NEC 0x80000000
|
||||
uint32_t flags; /* for HC bugs */
|
||||
uint32_t flags; /* for HC bugs */
|
||||
|
||||
uint32_t offset;
|
||||
uint32_t dma_offset;
|
||||
struct ohci_regs *regs; /* OHCI controller's memory */
|
||||
uint32_t offset;
|
||||
uint32_t dma_offset;
|
||||
struct ohci_regs *regs; /* OHCI controller's memory */
|
||||
|
||||
int ohci_int_load[32]; /* load of the 32 Interrupt Chains (for load balancing)*/
|
||||
ed_t *ed_rm_list[2]; /* lists of all endpoints to be removed */
|
||||
ed_t *ed_bulktail; /* last endpoint of bulk list */
|
||||
ed_t *ed_controltail; /* last endpoint of control list */
|
||||
int intrstatus;
|
||||
uint32_t hc_control; /* copy of the hc control reg */
|
||||
uint32_t ndp; /* copy NDP from roothub_a */
|
||||
struct virt_root_hub rh;
|
||||
int ohci_int_load[32]; /* load of the 32 Interrupt Chains (for load balancing)*/
|
||||
ed_t *ed_rm_list[2]; /* lists of all endpoints to be removed */
|
||||
ed_t *ed_bulktail; /* last endpoint of bulk list */
|
||||
ed_t *ed_controltail; /* last endpoint of control list */
|
||||
int intrstatus;
|
||||
uint32_t hc_control; /* copy of the hc control reg */
|
||||
uint32_t ndp; /* copy NDP from roothub_a */
|
||||
struct virt_root_hub rh;
|
||||
|
||||
const char *slot_name;
|
||||
const char *slot_name;
|
||||
|
||||
/* device which was disconnected */
|
||||
struct usb_device *devgone;
|
||||
/* device which was disconnected */
|
||||
struct usb_device *devgone;
|
||||
} ohci_t;
|
||||
|
||||
/* hcd */
|
||||
@@ -443,7 +451,6 @@ static int ep_link(ohci_t * ohci, ed_t * ed);
|
||||
static int ep_unlink(ohci_t * ohci, ed_t * ed);
|
||||
static ed_t * ep_add_ed(ohci_t * ohci, struct usb_device * usb_dev, uint32_t pipe, int interval, int load);
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/* we need more TDs than EDs */
|
||||
#define NUM_TD 64
|
||||
@@ -451,7 +458,7 @@ static ed_t * ep_add_ed(ohci_t * ohci, struct usb_device * usb_dev, uint32_t pip
|
||||
|
||||
static inline void ed_free(struct ed *ed)
|
||||
{
|
||||
ed->usb_dev = NULL;
|
||||
ed->usb_dev = NULL;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -26,7 +26,8 @@
|
||||
typedef unsigned long long uint64_t;
|
||||
typedef unsigned long lbaint_t;
|
||||
|
||||
typedef struct block_dev_desc {
|
||||
typedef struct block_dev_desc
|
||||
{
|
||||
int if_type; /* type of the interface */
|
||||
int dev; /* device number */
|
||||
unsigned char part_type; /* partition type */
|
||||
|
||||
185
include/pci.h
185
include/pci.h
@@ -21,28 +21,33 @@
|
||||
* Author: Markus Fröschle
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include "util.h" /* for swpX() */
|
||||
#include <bas_types.h>
|
||||
#include "util.h" /* for swpX() */
|
||||
|
||||
#define PCI_MEMORY_OFFSET (0x80000000)
|
||||
#define PCI_MEMORY_SIZE (0x40000000) /* 1 GByte PCI memory window */
|
||||
#define PCI_IO_OFFSET (0xD0000000)
|
||||
#define PCI_IO_SIZE (0x10000000) /* 128 MByte PCI I/O window */
|
||||
#define PCI_MEMORY_OFFSET 0x80000000
|
||||
#define PCI_MEMORY_SIZE 0x40000000 /* 1 GByte PCI memory window */
|
||||
#define PCI_IO_OFFSET 0xD0000000
|
||||
#define PCI_IO_SIZE 0x10000000 /* 256 MByte PCI I/O window */
|
||||
|
||||
#define PCI_LANESWAP_B(x) (x ^ 3)
|
||||
#define PCI_LANESWAP_W(x) (x ^ 2)
|
||||
#define PCI_LANESWAP_L(x) (x) /* for completeness only */
|
||||
/*
|
||||
* Note: the byte offsets are in little endian format, so you can't use them
|
||||
* on byteswapped (Motorola format) values!
|
||||
* Note: the byte offsets are in little endian format, so for pci_xxx_config_byte()
|
||||
* accesses to hit the right offset, you'll need to wrap them into PCI_LANESWAP_B()
|
||||
* and for pci_xxx_config_word() into PCI_LANESWAP_W()
|
||||
*/
|
||||
#define PCIIDR 0x00 /* PCI Configuration ID Register */
|
||||
#define PCICSR 0x04 /* PCI Command/Status Register */
|
||||
#define PCICR 0x04 /* PCI Command Register */
|
||||
#define PCISR 0x06 /* PCI Status Register */
|
||||
#define PCIREV 0x08 /* PCI Revision ID Register */
|
||||
#define PCICCR 0x0B /* PCI Class Code Register */
|
||||
#define PCICLSR 0x0C /* PCI Cache Line Size Register */
|
||||
#define PCILTR 0x0D /* PCI Latency Timer Register */
|
||||
#define PCIHTR 0x0E /* PCI Header Type Register */
|
||||
#define PCIBISTR 0x0F /* PCI Build-In Self Test Register */
|
||||
#define PCICR 0x06 /* PCI Command Register */
|
||||
#define PCISR 0x04 /* PCI Status Register */
|
||||
#define PCIREV 0x0B /* PCI Revision ID Register */
|
||||
#define PCICCR 0x08 /* PCI Class Code Register */
|
||||
#define PCICLSR 0x0F /* PCI Cache Line Size Register */
|
||||
#define PCILTR 0x0E /* PCI Latency Timer Register */
|
||||
#define PCIHTR 0x0D /* PCI Header Type Register */
|
||||
#define PCIBISTR 0x0C /* PCI Build-In Self Test Register */
|
||||
|
||||
#define PCIBAR0 0x10 /* PCI Base Address Register for Memory
|
||||
Accesses to Local, Runtime, and DMA */
|
||||
#define PCIBAR1 0x14 /* PCI Base Address Register for I/O
|
||||
@@ -50,18 +55,18 @@
|
||||
#define PCIBAR2 0x18 /* PCI Base Address Register for Memory
|
||||
Accesses to Local Address Space 0 */
|
||||
#define PCIBAR3 0x1C /* PCI Base Address Register for Memory
|
||||
Accesses to Local Address Space 1 */
|
||||
Accesses to Local Address Space 1 */
|
||||
#define PCIBAR4 0x20 /* PCI Base Address Register, reserved */
|
||||
#define PCIBAR5 0x24 /* PCI Base Address Register, reserved */
|
||||
#define PCICIS 0x28 /* PCI Cardbus CIS Pointer, not support*/
|
||||
#define PCISVID 0x2E /* PCI Subsystem Vendor ID */
|
||||
#define PCISID 0x2E /* PCI Subsystem ID */
|
||||
#define PCISID 0x2D /* PCI Subsystem ID */
|
||||
#define PCIERBAR 0x30 /* PCI Expansion ROM Base Register */
|
||||
#define CAP_PTR 0x34 /* New Capability Pointer */
|
||||
#define PCIILR 0x3C /* PCI Interrupt Line Register */
|
||||
#define PCIIPR 0x3D /* PCI Interrupt Pin Register */
|
||||
#define PCIMGR 0x3E /* PCI Min_Gnt Register */
|
||||
#define PCIMLR 0x3F /* PCI Max_Lat Register */
|
||||
#define PCIILR 0x3F /* PCI Interrupt Line Register */
|
||||
#define PCIIPR 0x3E /* PCI Interrupt Pin Register */
|
||||
#define PCIMGR 0x3D /* PCI Min_Gnt Register */
|
||||
#define PCIMLR 0x3C /* PCI Max_Lat Register */
|
||||
#define PMCAPID 0x40 /* Power Management Capability ID */
|
||||
#define PMNEXT 0x41 /* Power Management Next Capability
|
||||
Pointer */
|
||||
@@ -81,38 +86,41 @@
|
||||
/*
|
||||
* bit definitions for PCICSR lower half (Command Register)
|
||||
*/
|
||||
#define PCICSR_IO (1 << 0) /* if set: device responds to I/O space accesses */
|
||||
#define PCICSR_MEMORY (1 << 1) /* if set: device responds to memory space accesses */
|
||||
#define PCICSR_MASTER (1 << 2) /* if set: device is master */
|
||||
#define PCICSR_SPECIAL (1 << 3) /* if set: device reacts on special cycles */
|
||||
#define PCICSR_MEMWI (1 << 4) /* if set: device deals with memory write and invalidate */
|
||||
#define PCICSR_VGA_SNOOP (1 << 5) /* if set: capable of palette snoop */
|
||||
#define PCICSR_PERR (1 << 6) /* if set: reacts to parity errors */
|
||||
#define PCICSR_STEPPING (1 << 7) /* if set: stepping enabled */
|
||||
#define PCICSR_SERR (1 << 8) /* if set: SERR pin enabled */
|
||||
#define PCICSR_FAST_BTOB_E (1 << 9) /* if set: fast back-to-back enabled */
|
||||
#define PCICR_IO (1 << 0) /* if set: device responds to I/O space accesses */
|
||||
#define PCICR_MEMORY (1 << 1) /* if set: device responds to memory space accesses */
|
||||
#define PCICR_MASTER (1 << 2) /* if set: device is master */
|
||||
#define PCICR_SPECIAL (1 << 3) /* if set: device reacts on special cycles */
|
||||
#define PCICR_MEMWI (1 << 4) /* if set: device deals with memory write and invalidate */
|
||||
#define PCICR_VGA_SNOOP (1 << 5) /* if set: capable of palette snoop */
|
||||
#define PCICR_PERR (1 << 6) /* if set: reacts to parity errors */
|
||||
#define PCICR_STEPPING (1 << 7) /* if set: stepping enabled */
|
||||
#define PCICR_SERR (1 << 8) /* if set: SERR pin enabled */
|
||||
#define PCICR_FAST_BTOB_E (1 << 9) /* if set: fast back-to-back enabled */
|
||||
#define PCICR_INT_DISABLE (1 << 10) /* if set: disable interrupts from this device */
|
||||
/*
|
||||
* bit definitions for PCICSR upper half (Status Register)
|
||||
*/
|
||||
#define PCICSR_66MHZ (1 << 5) /* 66 MHz capable */
|
||||
#define PCICSR_UDF (1 << 6) /* UDF supported */
|
||||
#define PCICSR_FAST_BTOB (1 << 7) /* Fast back-to-back enabled */
|
||||
#define PCICSR_DPARITY_ERROR (1 << 8) /* data parity error detected */
|
||||
#define PCISR_INTERRUPT (1 << 3) /* device requested interrupt */
|
||||
#define PCISR_CAPABILITIES (1 << 4) /* if set, capabilities pointer is valid */
|
||||
#define PCISR_66MHZ (1 << 5) /* 66 MHz capable */
|
||||
#define PCISR_UDF (1 << 6) /* UDF supported */
|
||||
#define PCISR_FAST_BTOB (1 << 7) /* Fast back-to-back enabled */
|
||||
#define PCISR_DPARITY_ERROR (1 << 8) /* data parity error detected */
|
||||
|
||||
#define PCICSR_T_ABORT_S (1 << 11) /* target abort signaled */
|
||||
#define PCICSR_T_ABORT_R (1 << 12) /* target abort received */
|
||||
#define PCICSR_M_ABORT_R (1 << 13) /* master abort received */
|
||||
#define PCICSR_S_ERROR_S (1 << 14) /* system error signaled */
|
||||
#define PCICSR_PARITY_ERR (1 << 15) /* data parity error */
|
||||
#define PCISR_T_ABORT_S (1 << 11) /* target abort signaled */
|
||||
#define PCISR_T_ABORT_R (1 << 12) /* target abort received */
|
||||
#define PCISR_M_ABORT_R (1 << 13) /* master abort received */
|
||||
#define PCISR_S_ERROR_S (1 << 14) /* system error signaled */
|
||||
#define PCISR_PARITY_ERR (1 << 15) /* data parity error */
|
||||
|
||||
/* Header type 1 (PCI-to-PCI bridges) */
|
||||
#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */
|
||||
#define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */
|
||||
#define PCI_SUBORDINATE_BUS 0x1A /* Highest bus number behind the bridge */
|
||||
#define PCI_SEC_LATENCY_TIMER 0x1B /* Latency timer for secondary interface */
|
||||
#define PCI_PRIMARY_BUS 0x1B /* Primary bus number */
|
||||
#define PCI_SECONDARY_BUS 0x1A /* Secondary bus number */
|
||||
#define PCI_SUBORDINATE_BUS 0x19 /* Highest bus number behind the bridge */
|
||||
#define PCI_SEC_LATENCY_TIMER 0x18 /* Latency timer for secondary interface */
|
||||
#define PCI_IO_BASE 0x1C /* I/O range behind the bridge */
|
||||
#define PCI_IO_LIMIT 0x1D
|
||||
#define PCI_SEC_STATUS 0x1E /* Secondary status register, only bit 14 used */
|
||||
#define PCI_SEC_STATUS 0x1C /* Secondary status register, only bit 14 used */
|
||||
#define PCI_MEMORY_BASE 0x20 /* Memory range behind */
|
||||
#define PCI_MEMORY_LIMIT 0x22
|
||||
#define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */
|
||||
@@ -131,7 +139,7 @@ struct pci_rd /* structure of resource descriptor */
|
||||
unsigned long length; /* length of resource */
|
||||
unsigned long offset; /* offset PCI to phys. CPU Address */
|
||||
unsigned long dmaoffset; /* offset for DMA-transfers */
|
||||
} __attribute__ ((packed));
|
||||
};
|
||||
|
||||
typedef struct /* structure of address conversion */
|
||||
{
|
||||
@@ -183,57 +191,61 @@ typedef struct /* structure of address conversion */
|
||||
/* PCI configuration space macros */
|
||||
|
||||
/* register 0x00 macros */
|
||||
#define PCI_VENDOR_ID(i) swpw((uint16_t)(((i) & 0xffff0000) >> 16))
|
||||
#define PCI_DEVICE_ID(i) swpw((uint16_t) ((i) & 0xffff))
|
||||
#define PCI_DEVICE_ID(i) (uint16_t)(((i) & 0xffff0000) >> 16)
|
||||
#define PCI_VENDOR_ID(i) (uint16_t) ((i) & 0xffff)
|
||||
|
||||
/* register 0x04 macros */
|
||||
#define PCI_STATUS(i) ((i) & 0xffff)
|
||||
#define PCI_COMMAND(i) (((i) >> 16) & 0xffff)
|
||||
#define PCI_STATUS(i) ((i) & 0xffff)
|
||||
#define PCI_COMMAND(i) (((i) >> 16) & 0xffff)
|
||||
|
||||
/* register 0x08 macros */
|
||||
#define PCI_CLASS_CODE(i) ((swpl((i)) & 0xff000000) >> 24)
|
||||
#define PCI_SUBCLASS(i) ((swpl((i)) & 0x00ff0000) >> 16)
|
||||
#define PCI_PROG_IF(i) ((swpl((i)) & 0x0000ff00) >> 8)
|
||||
#define PCI_REVISION_ID(i) ((swpl((i)) & 0x000000ff))
|
||||
/* register 0x08 macros (use on little endian value!) */
|
||||
#define PCI_CLASS_CODE(i) (((i) & 0x00ff0000) >> 16)
|
||||
#define PCI_SUBCLASS(i) (((i) & 0x0000ff00) >> 8)
|
||||
#define PCI_PROG_IF(i) (((i) & 0x000000ff) >> 0)
|
||||
#define PCI_REVISION_ID(i) (((i) & 0xff000000) >> 24)
|
||||
|
||||
/* register 0x0c macros */
|
||||
#define PCI_BIST(i) ((swpl((i)) & 0xff000000) >> 24)
|
||||
#define PCI_HEADER_TYPE(i) ((swpl((i)) & 0x00ff0000) >> 16)
|
||||
#define PCI_LAT_TIMER(i) ((swpl((i)) & 0x0000ff00) >> 8)
|
||||
#define PCI_CACHELINE_SIZE(i) ((swpl((i)) & 0x000000ff))
|
||||
#define PCI_BIST(i) (((i) & 0xff000000) >> 24)
|
||||
#define PCI_HEADER_TYPE(i) (((i) & 0x00ff0000) >> 16)
|
||||
#define PCI_LAT_TIMER(i) (((i) & 0x0000ff00) >> 8)
|
||||
#define PCI_CACHELINE_SIZE(i) (((i) & 0x000000ff))
|
||||
|
||||
/* register 0x2c macros */
|
||||
#define PCI_SUBSYS_ID(i) (((i) & 0xffff0000) >> 16)
|
||||
#define PCI_SUBSYS_VID(i) (((i) & 0xffff))
|
||||
#define PCI_SUBSYS_ID(i) ((i) & 0xffff0000) >> 16)
|
||||
#define PCI_SUBSYS_VID(i) ((i) & 0xffff))
|
||||
|
||||
/* register 0x34 macros */
|
||||
#define PCI_CAPABILITIES(i) ((i) & 0xff)
|
||||
#define PCI_CAPABILITIES(i) ((i) & 0xff)
|
||||
|
||||
/* register 0x3c macros */
|
||||
#define PCI_MAX_LATENCY(i) (((i) & 0xff000000) >> 24)
|
||||
#define PCI_MIN_GRANT(i) (((i) & 0xff0000) >> 16)
|
||||
#define PCI_INTERRUPT_PIN(i) (((i) & 0xff00) >> 8)
|
||||
#define PCI_INTERRUPT_LINE(i) (((i)) & 0xff)
|
||||
#define PCI_MAX_LATENCY(i) (((i) & 0xff000000) >> 24)
|
||||
#define PCI_MIN_GRANT(i) (((i) & 0xff0000) >> 16)
|
||||
#define PCI_INTERRUPT_PIN(i) (((i) & 0xff00) >> 8)
|
||||
#define PCI_INTERRUPT_LINE(i) (((i)) & 0xff)
|
||||
|
||||
#define IS_PCI_MEM_BAR(i) ((i) & 1) == 0
|
||||
#define IS_PCI_IO_BAR(i) ((i) & 1) == 1
|
||||
#define PCI_MEMBAR_TYPE(i) (((i) & 0x6) >> 1)
|
||||
#define PCI_IOBAR_ADR(i) (((i) & 0xfffffffc))
|
||||
#define PCI_MEMBAR_ADR(i) (((i) & 0xfffffff0))
|
||||
#define IS_PCI_MEM_BAR(i) ((i) & 1) == 0
|
||||
#define IS_PCI_IO_BAR(i) ((i) & 1) == 1
|
||||
#define PCI_MEMBAR_TYPE(i) (((i) & 0x6) >> 1)
|
||||
#define PCI_IOBAR_ADR(i) (((i) & 0xfffffffc))
|
||||
#define PCI_MEMBAR_ADR(i) (((i) & 0xfffffff0))
|
||||
|
||||
extern void init_eport(void);
|
||||
extern void init_xlbus_arbiter(void);
|
||||
extern void init_pci(void);
|
||||
extern int pci_handle2index(int32_t handle);
|
||||
|
||||
extern int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index);
|
||||
extern int32_t pci_find_classcode(uint32_t classcode, int index);
|
||||
|
||||
extern int32_t pci_get_interrupt_cause(void);
|
||||
extern int32_t pci_call_interrupt_chain(int32_t handle, int32_t data);
|
||||
|
||||
/*
|
||||
* match bits for pci_find_classcode()
|
||||
*/
|
||||
#define PCI_FIND_BASE_CLASS (1 << 26)
|
||||
#define PCI_FIND_SUB_CLASS (1 << 25)
|
||||
#define PCI_FIND_PROG_IF (1 << 24)
|
||||
#define PCI_FIND_BASE_CLASS (1 << 26)
|
||||
#define PCI_FIND_SUB_CLASS (1 << 25)
|
||||
#define PCI_FIND_PROG_IF (1 << 24)
|
||||
|
||||
extern uint32_t pci_read_config_longword(int32_t handle, int offset);
|
||||
extern uint16_t pci_read_config_word(int32_t handle, int offset);
|
||||
@@ -243,7 +255,9 @@ extern int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t va
|
||||
extern int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value);
|
||||
extern int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value);
|
||||
|
||||
extern int32_t pci_hook_interrupt(int32_t handle, void *interrupt_handler, void *parameter);
|
||||
typedef int (*pci_interrupt_handler)(int param);
|
||||
|
||||
extern int32_t pci_hook_interrupt(int32_t handle, void *handler, void *parameter);
|
||||
extern int32_t pci_unhook_interrupt(int32_t handle);
|
||||
|
||||
extern struct pci_rd *pci_get_resource(int32_t handle);
|
||||
@@ -331,15 +345,16 @@ extern int32_t wrapper_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_AD
|
||||
extern int32_t wrapper_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
extern int32_t wrapper_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
|
||||
|
||||
#define PCI_MK_CONF_ADDR(bus, device, function) (MCF_PCI_PCICAR_E | \
|
||||
((bus) << 16) | \
|
||||
((device << 8) | \
|
||||
(function))
|
||||
#define PCI_MK_CONF_ADDR(bus, device, function) (MCF_PCI_PCICAR_E | \
|
||||
((bus) << 16) | \
|
||||
((device << 8) | \
|
||||
(function))
|
||||
|
||||
#define PCI_HANDLE(bus, slot, function) (0 | ((bus & 0xff) << 10 | (slot & 0x1f) << 3 | (function & 7)))
|
||||
#define PCI_BUS_FROM_HANDLE(h) (((h) & 0xff00) >> 10)
|
||||
#define PCI_DEVICE_FROM_HANDLE(h) (((h) & 0xf8) >> 3)
|
||||
#define PCI_FUNCTION_FROM_HANDLE(h) (((h) & 0x7))
|
||||
#define PCI_HANDLE(bus, slot, function) (0 | ((bus & 0xff) << 10 | (slot & 0x1f) << 3 | (function & 7)))
|
||||
#define PCI_BUS_FROM_HANDLE(h) (((h) & 0xff00) >> 10)
|
||||
#define PCI_DEVICE_FROM_HANDLE(h) (((h) & 0xf8) >> 3)
|
||||
#define PCI_FUNCTION_FROM_HANDLE(h) (((h) & 0x7))
|
||||
|
||||
extern void pci_dump_registers(int32_t handle);
|
||||
|
||||
extern void chip_errata_135(void); /* needed in ohci-hcd.c */
|
||||
#endif /* _PCI_H_ */
|
||||
|
||||
11
include/pci_errata.h
Executable file
11
include/pci_errata.h
Executable file
@@ -0,0 +1,11 @@
|
||||
#ifndef PCI_ERRATA_H
|
||||
#define PCI_ERRATA_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
extern void chip_errata_135(void);
|
||||
extern void chip_errata_055(int32_t handle);
|
||||
|
||||
#endif // PCI_ERRATA_H
|
||||
|
||||
@@ -45,7 +45,7 @@
|
||||
#define PCI_CLASS_BRIDGE_HOST 0x0600
|
||||
#define PCI_CLASS_BRIDGE_ISA 0x0601
|
||||
#define PCI_CLASS_BRIDGE_EISA 0x0602
|
||||
#define PCI_CLASS_BRIDGE_MC 0x0603
|
||||
#define PCI_CLASS_BRIDGE_MC 0x0603
|
||||
#define PCI_CLASS_BRIDGE_PCI 0x0604
|
||||
#define PCI_CLASS_BRIDGE_PCMCIA 0x0605
|
||||
#define PCI_CLASS_BRIDGE_NUBUS 0x0606
|
||||
@@ -598,8 +598,10 @@
|
||||
#define PCI_DEVICE_ID_NEC_VL 0x0016 /* PCI-VL Bridge */
|
||||
#define PCI_DEVICE_ID_NEC_STARALPHA2 0x002c /* STAR ALPHA2 */
|
||||
#define PCI_DEVICE_ID_NEC_CBUS_2 0x002d /* PCI-Cbus Bridge */
|
||||
#define PCI_DEVICE_ID_NEC_USB_A 0x0031
|
||||
#define PCI_DEVICE_ID_NEC_USB 0x0035 /* PCI-USB Host */
|
||||
#define PCI_DEVICE_ID_NEC_USB_2 0x00e0 /* PCI-USB 2 Host */
|
||||
#define PCI_DEVICE_ID_NEC_USB_3 0x00f0
|
||||
#define PCI_DEVICE_ID_NEC_CBUS_3 0x003b
|
||||
#define PCI_DEVICE_ID_NEC_NAPCCARD 0x003e
|
||||
#define PCI_DEVICE_ID_NEC_PCX2 0x0046 /* PowerVR */
|
||||
@@ -798,7 +800,7 @@
|
||||
|
||||
#define PCI_VENDOR_ID_ANIGMA 0x1051
|
||||
#define PCI_DEVICE_ID_ANIGMA_MC145575 0x0100
|
||||
|
||||
|
||||
#define PCI_VENDOR_ID_EFAR 0x1055
|
||||
#define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130
|
||||
#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460
|
||||
@@ -1507,7 +1509,7 @@
|
||||
|
||||
#define PCI_VENDOR_ID_ZIATECH 0x1138
|
||||
#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550
|
||||
|
||||
|
||||
#define PCI_VENDOR_ID_CYCLONE 0x113c
|
||||
#define PCI_DEVICE_ID_CYCLONE_SDK 0x0001
|
||||
|
||||
@@ -1707,8 +1709,8 @@
|
||||
#define PCI_DEVICE_ID_RP8OCTA 0x0005
|
||||
#define PCI_DEVICE_ID_RP8J 0x0006
|
||||
#define PCI_DEVICE_ID_RP4J 0x0007
|
||||
#define PCI_DEVICE_ID_RP8SNI 0x0008
|
||||
#define PCI_DEVICE_ID_RP16SNI 0x0009
|
||||
#define PCI_DEVICE_ID_RP8SNI 0x0008
|
||||
#define PCI_DEVICE_ID_RP16SNI 0x0009
|
||||
#define PCI_DEVICE_ID_RPP4 0x000A
|
||||
#define PCI_DEVICE_ID_RPP8 0x000B
|
||||
#define PCI_DEVICE_ID_RP8M 0x000C
|
||||
@@ -1719,9 +1721,9 @@
|
||||
#define PCI_DEVICE_ID_URP8INTF 0x0802
|
||||
#define PCI_DEVICE_ID_URP16INTF 0x0803
|
||||
#define PCI_DEVICE_ID_URP8OCTA 0x0805
|
||||
#define PCI_DEVICE_ID_UPCI_RM3_8PORT 0x080C
|
||||
#define PCI_DEVICE_ID_UPCI_RM3_8PORT 0x080C
|
||||
#define PCI_DEVICE_ID_UPCI_RM3_4PORT 0x080D
|
||||
#define PCI_DEVICE_ID_CRP16INTF 0x0903
|
||||
#define PCI_DEVICE_ID_CRP16INTF 0x0903
|
||||
|
||||
#define PCI_VENDOR_ID_CYCLADES 0x120e
|
||||
#define PCI_DEVICE_ID_CYCLOM_Y_Lo 0x0100
|
||||
@@ -2143,7 +2145,7 @@
|
||||
#define PCI_DEVICE_ID_RASTEL_2PORT 0x2000
|
||||
|
||||
#define PCI_VENDOR_ID_ZOLTRIX 0x15b0
|
||||
#define PCI_DEVICE_ID_ZOLTRIX_2BD0 0x2bd0
|
||||
#define PCI_DEVICE_ID_ZOLTRIX_2BD0 0x2bd0
|
||||
|
||||
#define PCI_VENDOR_ID_MELLANOX 0x15b3
|
||||
#define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44
|
||||
@@ -2288,8 +2290,8 @@
|
||||
#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221
|
||||
#define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222
|
||||
#define PCI_DEVICE_ID_INTEL_7116 0x1223
|
||||
#define PCI_DEVICE_ID_INTEL_7505_0 0x2550
|
||||
#define PCI_DEVICE_ID_INTEL_7505_1 0x2552
|
||||
#define PCI_DEVICE_ID_INTEL_7505_0 0x2550
|
||||
#define PCI_DEVICE_ID_INTEL_7505_1 0x2552
|
||||
#define PCI_DEVICE_ID_INTEL_7205_0 0x255d
|
||||
#define PCI_DEVICE_ID_INTEL_82596 0x1226
|
||||
#define PCI_DEVICE_ID_INTEL_82865 0x1227
|
||||
|
||||
@@ -8,8 +8,6 @@
|
||||
#ifndef _QUEUE_H_
|
||||
#define _QUEUE_H_
|
||||
|
||||
/********************************************************************/
|
||||
|
||||
/*
|
||||
* Individual queue node
|
||||
*/
|
||||
|
||||
@@ -10,7 +10,12 @@
|
||||
#include "i2c-algo-bit.h"
|
||||
#include "util.h" /* for swpX() */
|
||||
#include "wait.h"
|
||||
#include "video.h"
|
||||
|
||||
// #define RADEON_TILING
|
||||
|
||||
//#include "radeon_theatre.h"
|
||||
|
||||
#include "radeon_reg.h"
|
||||
|
||||
/* Buffer are aligned on 4096 byte boundaries */
|
||||
@@ -21,7 +26,7 @@
|
||||
#define RADEON_MMIOSIZE 0x80000
|
||||
|
||||
#define RADEON_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))
|
||||
|
||||
|
||||
#define ATY_RADEON_LCD_ON 0x00000001
|
||||
#define ATY_RADEON_CRT_ON 0x00000002
|
||||
|
||||
@@ -37,50 +42,50 @@
|
||||
*/
|
||||
enum radeon_family
|
||||
{
|
||||
CHIP_FAMILY_UNKNOW,
|
||||
CHIP_FAMILY_LEGACY,
|
||||
CHIP_FAMILY_RADEON,
|
||||
CHIP_FAMILY_RV100,
|
||||
CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/
|
||||
CHIP_FAMILY_RV200,
|
||||
CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */
|
||||
CHIP_FAMILY_R200,
|
||||
CHIP_FAMILY_RV250,
|
||||
CHIP_FAMILY_RS300, /* Radeon 9000 IGP */
|
||||
CHIP_FAMILY_RV280,
|
||||
CHIP_FAMILY_R300,
|
||||
CHIP_FAMILY_R350,
|
||||
CHIP_FAMILY_RV350,
|
||||
CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */
|
||||
CHIP_FAMILY_R420, /* R420/R423/M18 */
|
||||
CHIP_FAMILY_LAST,
|
||||
CHIP_FAMILY_UNKNOW,
|
||||
CHIP_FAMILY_LEGACY,
|
||||
CHIP_FAMILY_RADEON,
|
||||
CHIP_FAMILY_RV100,
|
||||
CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/
|
||||
CHIP_FAMILY_RV200,
|
||||
CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */
|
||||
CHIP_FAMILY_R200,
|
||||
CHIP_FAMILY_RV250,
|
||||
CHIP_FAMILY_RS300, /* Radeon 9000 IGP */
|
||||
CHIP_FAMILY_RV280,
|
||||
CHIP_FAMILY_R300,
|
||||
CHIP_FAMILY_R350,
|
||||
CHIP_FAMILY_RV350,
|
||||
CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */
|
||||
CHIP_FAMILY_R420, /* R420/R423/M18 */
|
||||
CHIP_FAMILY_LAST,
|
||||
};
|
||||
|
||||
#define IS_RV100_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_RV100) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV200) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS100) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS200) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV250) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV280) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS300))
|
||||
((rinfo)->family == CHIP_FAMILY_RV200) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS100) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS200) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV250) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV280) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RS300))
|
||||
|
||||
|
||||
#define IS_R300_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_R300) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV350) || \
|
||||
((rinfo)->family == CHIP_FAMILY_R350) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV380) || \
|
||||
((rinfo)->family == CHIP_FAMILY_R420))
|
||||
((rinfo)->family == CHIP_FAMILY_RV350) || \
|
||||
((rinfo)->family == CHIP_FAMILY_R350) || \
|
||||
((rinfo)->family == CHIP_FAMILY_RV380) || \
|
||||
((rinfo)->family == CHIP_FAMILY_R420))
|
||||
|
||||
/*
|
||||
* Chip flags
|
||||
*/
|
||||
enum radeon_chip_flags
|
||||
{
|
||||
CHIP_FAMILY_MASK = 0x0000ffffUL,
|
||||
CHIP_FLAGS_MASK = 0xffff0000UL,
|
||||
CHIP_IS_MOBILITY = 0x00010000UL,
|
||||
CHIP_IS_IGP = 0x00020000UL,
|
||||
CHIP_HAS_CRTC2 = 0x00040000UL,
|
||||
CHIP_FAMILY_MASK = 0x0000ffffUL,
|
||||
CHIP_FLAGS_MASK = 0xffff0000UL,
|
||||
CHIP_IS_MOBILITY = 0x00010000UL,
|
||||
CHIP_IS_IGP = 0x00020000UL,
|
||||
CHIP_HAS_CRTC2 = 0x00040000UL,
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -88,9 +93,9 @@ enum radeon_chip_flags
|
||||
*/
|
||||
enum radeon_errata
|
||||
{
|
||||
CHIP_ERRATA_R300_CG = 0x00000001,
|
||||
CHIP_ERRATA_PLL_DUMMYREADS = 0x00000002,
|
||||
CHIP_ERRATA_PLL_DELAY = 0x00000004,
|
||||
CHIP_ERRATA_R300_CG = 0x00000001,
|
||||
CHIP_ERRATA_PLL_DUMMYREADS = 0x00000002,
|
||||
CHIP_ERRATA_PLL_DELAY = 0x00000004,
|
||||
};
|
||||
|
||||
|
||||
@@ -99,12 +104,12 @@ enum radeon_errata
|
||||
*/
|
||||
enum radeon_montype
|
||||
{
|
||||
MT_NONE = 0,
|
||||
MT_CRT, /* CRT */
|
||||
MT_LCD, /* LCD */
|
||||
MT_DFP, /* DVI */
|
||||
MT_CTV, /* composite TV */
|
||||
MT_STV /* S-Video out */
|
||||
MT_NONE = 0,
|
||||
MT_CRT, /* CRT */
|
||||
MT_LCD, /* LCD */
|
||||
MT_DFP, /* DVI */
|
||||
MT_CTV, /* composite TV */
|
||||
MT_STV /* S-Video out */
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -112,11 +117,11 @@ enum radeon_montype
|
||||
*/
|
||||
enum ddc_type
|
||||
{
|
||||
ddc_none,
|
||||
ddc_monid,
|
||||
ddc_dvi,
|
||||
ddc_vga,
|
||||
ddc_crt2,
|
||||
ddc_none,
|
||||
ddc_monid,
|
||||
ddc_dvi,
|
||||
ddc_vga,
|
||||
ddc_crt2,
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -124,11 +129,11 @@ enum ddc_type
|
||||
*/
|
||||
enum conn_type
|
||||
{
|
||||
conn_none,
|
||||
conn_proprietary,
|
||||
conn_crt,
|
||||
conn_DVI_I,
|
||||
conn_DVI_D,
|
||||
conn_none,
|
||||
conn_proprietary,
|
||||
conn_crt,
|
||||
conn_DVI_I,
|
||||
conn_DVI_D,
|
||||
};
|
||||
|
||||
|
||||
@@ -137,11 +142,11 @@ enum conn_type
|
||||
*/
|
||||
struct pll_info
|
||||
{
|
||||
int32_t ppll_max;
|
||||
int32_t ppll_min;
|
||||
int32_t sclk, mclk;
|
||||
int32_t ref_div;
|
||||
int32_t ref_clk;
|
||||
int32_t ppll_max;
|
||||
int32_t ppll_min;
|
||||
int32_t sclk, mclk;
|
||||
int32_t ref_div;
|
||||
int32_t ref_clk;
|
||||
};
|
||||
|
||||
|
||||
@@ -153,120 +158,120 @@ struct pll_info
|
||||
*/
|
||||
struct radeon_regs
|
||||
{
|
||||
/* Common registers */
|
||||
uint32_t ovr_clr;
|
||||
uint32_t ovr_wid_left_right;
|
||||
uint32_t ovr_wid_top_bottom;
|
||||
uint32_t ov0_scale_cntl;
|
||||
uint32_t mpp_tb_config;
|
||||
uint32_t mpp_gp_config;
|
||||
uint32_t subpic_cntl;
|
||||
uint32_t viph_control;
|
||||
uint32_t i2c_cntl_1;
|
||||
uint32_t gen_int32_t_cntl;
|
||||
uint32_t cap0_trig_cntl;
|
||||
uint32_t cap1_trig_cntl;
|
||||
uint32_t bus_cntl;
|
||||
uint32_t surface_cntl;
|
||||
uint32_t bios_5_scratch;
|
||||
/* Common registers */
|
||||
uint32_t ovr_clr;
|
||||
uint32_t ovr_wid_left_right;
|
||||
uint32_t ovr_wid_top_bottom;
|
||||
uint32_t ov0_scale_cntl;
|
||||
uint32_t mpp_tb_config;
|
||||
uint32_t mpp_gp_config;
|
||||
uint32_t subpic_cntl;
|
||||
uint32_t viph_control;
|
||||
uint32_t i2c_cntl_1;
|
||||
uint32_t gen_int32_t_cntl;
|
||||
uint32_t cap0_trig_cntl;
|
||||
uint32_t cap1_trig_cntl;
|
||||
uint32_t bus_cntl;
|
||||
uint32_t surface_cntl;
|
||||
uint32_t bios_5_scratch;
|
||||
|
||||
/* Other registers to save for VT switches or driver load/unload */
|
||||
uint32_t dp_datatype;
|
||||
uint32_t rbbm_soft_reset;
|
||||
uint32_t clock_cntl_index;
|
||||
uint32_t amcgpio_en_reg;
|
||||
uint32_t amcgpio_mask;
|
||||
/* Other registers to save for VT switches or driver load/unload */
|
||||
uint32_t dp_datatype;
|
||||
uint32_t rbbm_soft_reset;
|
||||
uint32_t clock_cntl_index;
|
||||
uint32_t amcgpio_en_reg;
|
||||
uint32_t amcgpio_mask;
|
||||
|
||||
/* Surface/tiling registers */
|
||||
uint32_t surf_lower_bound[8];
|
||||
uint32_t surf_upper_bound[8];
|
||||
uint32_t surf_info[8];
|
||||
/* Surface/tiling registers */
|
||||
uint32_t surf_lower_bound[8];
|
||||
uint32_t surf_upper_bound[8];
|
||||
uint32_t surf_info[8];
|
||||
|
||||
/* CRTC registers */
|
||||
uint32_t crtc_gen_cntl;
|
||||
uint32_t crtc_ext_cntl;
|
||||
uint32_t dac_cntl;
|
||||
uint32_t crtc_h_total_disp;
|
||||
uint32_t crtc_h_sync_strt_wid;
|
||||
uint32_t crtc_v_total_disp;
|
||||
uint32_t crtc_v_sync_strt_wid;
|
||||
uint32_t crtc_offset;
|
||||
uint32_t crtc_offset_cntl;
|
||||
uint32_t crtc_pitch;
|
||||
uint32_t disp_merge_cntl;
|
||||
uint32_t grph_buffer_cntl;
|
||||
uint32_t crtc_more_cntl;
|
||||
/* CRTC registers */
|
||||
uint32_t crtc_gen_cntl;
|
||||
uint32_t crtc_ext_cntl;
|
||||
uint32_t dac_cntl;
|
||||
uint32_t crtc_h_total_disp;
|
||||
uint32_t crtc_h_sync_strt_wid;
|
||||
uint32_t crtc_v_total_disp;
|
||||
uint32_t crtc_v_sync_strt_wid;
|
||||
uint32_t crtc_offset;
|
||||
uint32_t crtc_offset_cntl;
|
||||
uint32_t crtc_pitch;
|
||||
uint32_t disp_merge_cntl;
|
||||
uint32_t grph_buffer_cntl;
|
||||
uint32_t crtc_more_cntl;
|
||||
|
||||
/* CRTC2 registers */
|
||||
uint32_t crtc2_gen_cntl;
|
||||
uint32_t dac2_cntl;
|
||||
uint32_t disp_output_cntl;
|
||||
uint32_t disp_hw_debug;
|
||||
uint32_t disp2_merge_cntl;
|
||||
uint32_t grph2_buffer_cntl;
|
||||
uint32_t crtc2_h_total_disp;
|
||||
uint32_t crtc2_h_sync_strt_wid;
|
||||
uint32_t crtc2_v_total_disp;
|
||||
uint32_t crtc2_v_sync_strt_wid;
|
||||
uint32_t crtc2_offset;
|
||||
uint32_t crtc2_offset_cntl;
|
||||
uint32_t crtc2_pitch;
|
||||
/* CRTC2 registers */
|
||||
uint32_t crtc2_gen_cntl;
|
||||
uint32_t dac2_cntl;
|
||||
uint32_t disp_output_cntl;
|
||||
uint32_t disp_hw_debug;
|
||||
uint32_t disp2_merge_cntl;
|
||||
uint32_t grph2_buffer_cntl;
|
||||
uint32_t crtc2_h_total_disp;
|
||||
uint32_t crtc2_h_sync_strt_wid;
|
||||
uint32_t crtc2_v_total_disp;
|
||||
uint32_t crtc2_v_sync_strt_wid;
|
||||
uint32_t crtc2_offset;
|
||||
uint32_t crtc2_offset_cntl;
|
||||
uint32_t crtc2_pitch;
|
||||
|
||||
/* Flat panel regs */
|
||||
uint32_t fp_crtc_h_total_disp;
|
||||
uint32_t fp_crtc_v_total_disp;
|
||||
uint32_t fp_gen_cntl;
|
||||
uint32_t fp2_gen_cntl;
|
||||
uint32_t fp_h_sync_strt_wid;
|
||||
uint32_t fp2_h_sync_strt_wid;
|
||||
uint32_t fp_horz_stretch;
|
||||
uint32_t fp_panel_cntl;
|
||||
uint32_t fp_v_sync_strt_wid;
|
||||
uint32_t fp2_v_sync_strt_wid;
|
||||
uint32_t fp_vert_stretch;
|
||||
uint32_t lvds_gen_cntl;
|
||||
uint32_t lvds_pll_cntl;
|
||||
uint32_t tmds_crc;
|
||||
uint32_t tmds_transmitter_cntl;
|
||||
/* Flat panel regs */
|
||||
uint32_t fp_crtc_h_total_disp;
|
||||
uint32_t fp_crtc_v_total_disp;
|
||||
uint32_t fp_gen_cntl;
|
||||
uint32_t fp2_gen_cntl;
|
||||
uint32_t fp_h_sync_strt_wid;
|
||||
uint32_t fp2_h_sync_strt_wid;
|
||||
uint32_t fp_horz_stretch;
|
||||
uint32_t fp_panel_cntl;
|
||||
uint32_t fp_v_sync_strt_wid;
|
||||
uint32_t fp2_v_sync_strt_wid;
|
||||
uint32_t fp_vert_stretch;
|
||||
uint32_t lvds_gen_cntl;
|
||||
uint32_t lvds_pll_cntl;
|
||||
uint32_t tmds_crc;
|
||||
uint32_t tmds_transmitter_cntl;
|
||||
|
||||
/* Computed values for PLL */
|
||||
uint32_t dot_clock_freq;
|
||||
uint32_t pll_output_freq;
|
||||
int32_t feedback_div;
|
||||
int32_t post_div;
|
||||
/* Computed values for PLL */
|
||||
uint32_t dot_clock_freq;
|
||||
uint32_t pll_output_freq;
|
||||
int32_t feedback_div;
|
||||
int32_t post_div;
|
||||
|
||||
/* PLL registers */
|
||||
uint32_t ppll_div_3;
|
||||
uint32_t ppll_ref_div;
|
||||
uint32_t vclk_ecp_cntl;
|
||||
uint32_t clk_cntl_index;
|
||||
uint32_t htotal_cntl;
|
||||
/* PLL registers */
|
||||
uint32_t ppll_div_3;
|
||||
uint32_t ppll_ref_div;
|
||||
uint32_t vclk_ecp_cntl;
|
||||
uint32_t clk_cntl_index;
|
||||
uint32_t htotal_cntl;
|
||||
|
||||
/* Computed values for PLL2 */
|
||||
uint32_t dot_clock_freq_2;
|
||||
uint32_t pll_output_freq_2;
|
||||
int32_t feedback_div_2;
|
||||
int32_t post_div_2;
|
||||
/* Computed values for PLL2 */
|
||||
uint32_t dot_clock_freq_2;
|
||||
uint32_t pll_output_freq_2;
|
||||
int32_t feedback_div_2;
|
||||
int32_t post_div_2;
|
||||
|
||||
/* PLL2 registers */
|
||||
uint32_t p2pll_ref_div;
|
||||
uint32_t p2pll_div_0;
|
||||
uint32_t htotal_cntl2;
|
||||
/* PLL2 registers */
|
||||
uint32_t p2pll_ref_div;
|
||||
uint32_t p2pll_div_0;
|
||||
uint32_t htotal_cntl2;
|
||||
};
|
||||
|
||||
struct panel_info
|
||||
{
|
||||
int32_t xres, yres;
|
||||
int32_t valid;
|
||||
int32_t clock;
|
||||
int32_t hOver_plus, hSync_width, hblank;
|
||||
int32_t vOver_plus, vSync_width, vblank;
|
||||
int32_t hAct_high, vAct_high, int32_terlaced;
|
||||
int32_t pwr_delay;
|
||||
int32_t use_bios_dividers;
|
||||
int32_t ref_divider;
|
||||
int32_t post_divider;
|
||||
int32_t fbk_divider;
|
||||
int32_t xres, yres;
|
||||
int32_t valid;
|
||||
int32_t clock;
|
||||
int32_t hOver_plus, hSync_width, hblank;
|
||||
int32_t vOver_plus, vSync_width, vblank;
|
||||
int32_t hAct_high, vAct_high, int32_terlaced;
|
||||
int32_t pwr_delay;
|
||||
int32_t use_bios_dividers;
|
||||
int32_t ref_divider;
|
||||
int32_t post_divider;
|
||||
int32_t fbk_divider;
|
||||
};
|
||||
|
||||
struct radeonfb_info;
|
||||
@@ -274,186 +279,186 @@ struct radeonfb_info;
|
||||
#ifdef CONFIG_FB_RADEON_I2C
|
||||
struct radeon_i2c_chan
|
||||
{
|
||||
struct radeonfb_info *rinfo;
|
||||
uint32_t ddc_reg;
|
||||
struct i2c_adapter adapter;
|
||||
struct i2c_algo_bit_data algo;
|
||||
struct radeonfb_info *rinfo;
|
||||
uint32_t ddc_reg;
|
||||
struct i2c_adapter adapter;
|
||||
struct i2c_algo_bit_data algo;
|
||||
};
|
||||
#endif
|
||||
|
||||
enum radeon_pm_mode
|
||||
{
|
||||
radeon_pm_none = 0, /* Nothing supported */
|
||||
radeon_pm_d2 = 0x00000001, /* Can do D2 state */
|
||||
radeon_pm_off = 0x00000002, /* Can resume from D3 cold */
|
||||
radeon_pm_none = 0, /* Nothing supported */
|
||||
radeon_pm_d2 = 0x00000001, /* Can do D2 state */
|
||||
radeon_pm_off = 0x00000002, /* Can resume from D3 cold */
|
||||
};
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t table_revision;
|
||||
uint8_t table_size;
|
||||
uint8_t tuner_type;
|
||||
uint8_t audio_chip;
|
||||
uint8_t product_id;
|
||||
uint8_t tuner_voltage_teletext_fm;
|
||||
uint8_t i2s_config; /* configuration of the sound chip */
|
||||
uint8_t video_decoder_type;
|
||||
uint8_t video_decoder_host_config;
|
||||
uint8_t input[5];
|
||||
uint8_t table_revision;
|
||||
uint8_t table_size;
|
||||
uint8_t tuner_type;
|
||||
uint8_t audio_chip;
|
||||
uint8_t product_id;
|
||||
uint8_t tuner_voltage_teletext_fm;
|
||||
uint8_t i2s_config; /* configuration of the sound chip */
|
||||
uint8_t video_decoder_type;
|
||||
uint8_t video_decoder_host_config;
|
||||
uint8_t input[5];
|
||||
} _MM_TABLE;
|
||||
|
||||
struct radeonfb_info
|
||||
{
|
||||
int32_t handle; /* PCI BIOS, must be 1st place */
|
||||
int32_t big_endian; /* PCI BIOS */
|
||||
|
||||
uint32_t cursor_x;
|
||||
uint32_t cursor_y;
|
||||
int32_t cursor_show;
|
||||
uint32_t cursor_start;
|
||||
uint32_t cursor_end;
|
||||
int32_t cursor_fg;
|
||||
int32_t cursor_bg;
|
||||
int32_t handle; /* PCI BIOS, must be 1st place */
|
||||
int32_t big_endian; /* PCI BIOS */
|
||||
|
||||
int32_t fifo_slots; /* Free slots in the FIFO (64 max) */
|
||||
uint32_t cursor_x;
|
||||
uint32_t cursor_y;
|
||||
int32_t cursor_show;
|
||||
uint32_t cursor_start;
|
||||
uint32_t cursor_end;
|
||||
int32_t cursor_fg;
|
||||
int32_t cursor_bg;
|
||||
|
||||
/* Computed values for Radeon */
|
||||
uint32_t dp_gui_master_cntl_clip;
|
||||
uint32_t trans_color;
|
||||
int32_t fifo_slots; /* Free slots in the FIFO (64 max) */
|
||||
|
||||
/* Saved values for ScreenToScreenCopy */
|
||||
int32_t xdir;
|
||||
int32_t ydir;
|
||||
/* Computed values for Radeon */
|
||||
uint32_t dp_gui_master_cntl_clip;
|
||||
uint32_t trans_color;
|
||||
|
||||
/* ScanlineScreenToScreenColorExpand support */
|
||||
int32_t scanline_h;
|
||||
int32_t scanline_words;
|
||||
int32_t scanline_bpp; /* Only used for ImageWrite */
|
||||
/* Saved values for ScreenToScreenCopy */
|
||||
int32_t xdir;
|
||||
int32_t ydir;
|
||||
|
||||
/* Saved values for DashedTwoPoint32_tLine */
|
||||
int32_t dashLen;
|
||||
uint32_t dashPattern;
|
||||
int32_t dash_fg;
|
||||
int32_t dash_bg;
|
||||
/* ScanlineScreenToScreenColorExpand support */
|
||||
int32_t scanline_h;
|
||||
int32_t scanline_words;
|
||||
int32_t scanline_bpp; /* Only used for ImageWrite */
|
||||
|
||||
struct fb_info *info;
|
||||
/* Saved values for DashedTwoPoint32_tLine */
|
||||
int32_t dashLen;
|
||||
uint32_t dashPattern;
|
||||
int32_t dash_fg;
|
||||
int32_t dash_bg;
|
||||
|
||||
struct radeon_regs state;
|
||||
struct radeon_regs init_state;
|
||||
struct fb_info *info;
|
||||
|
||||
uint8_t name[50];
|
||||
struct radeon_regs state;
|
||||
struct radeon_regs init_state;
|
||||
|
||||
uint32_t io_base_phys;
|
||||
uint32_t mmio_base_phys;
|
||||
uint32_t fb_base_phys;
|
||||
uint8_t name[50];
|
||||
|
||||
void *io_base;
|
||||
void *mmio_base;
|
||||
void *fb_base;
|
||||
|
||||
uint32_t fb_local_base;
|
||||
uint32_t fb_offset;
|
||||
|
||||
uint32_t bios_seg_phys;
|
||||
void *bios_seg;
|
||||
int32_t fp_bios_start;
|
||||
uint32_t io_base_phys;
|
||||
uint32_t mmio_base_phys;
|
||||
uint32_t fb_base_phys;
|
||||
|
||||
struct
|
||||
{
|
||||
uint8_t red;
|
||||
uint8_t green;
|
||||
uint8_t blue;
|
||||
uint8_t pad;
|
||||
} palette[256];
|
||||
void *io_base;
|
||||
void *mmio_base;
|
||||
void *fb_base;
|
||||
|
||||
int32_t chipset;
|
||||
uint8_t family;
|
||||
uint8_t rev;
|
||||
int32_t errata;
|
||||
uint32_t video_ram;
|
||||
uint32_t mapped_vram;
|
||||
int32_t vram_width;
|
||||
int32_t vram_ddr;
|
||||
uint32_t fb_local_base;
|
||||
uint32_t fb_offset;
|
||||
|
||||
int32_t pitch, bpp, depth;
|
||||
uint32_t bios_seg_phys;
|
||||
void *bios_seg;
|
||||
int32_t fp_bios_start;
|
||||
|
||||
int32_t has_CRTC2;
|
||||
int32_t is_mobility;
|
||||
int32_t is_IGP;
|
||||
int32_t reversed_DAC;
|
||||
int32_t reversed_TMDS;
|
||||
struct panel_info panel_info;
|
||||
int32_t mon1_type;
|
||||
uint8_t *mon1_EDID;
|
||||
struct fb_videomode *mon1_modedb;
|
||||
int32_t mon1_dbsize;
|
||||
int32_t mon2_type;
|
||||
uint8_t *mon2_EDID;
|
||||
struct
|
||||
{
|
||||
uint8_t red;
|
||||
uint8_t green;
|
||||
uint8_t blue;
|
||||
uint8_t pad;
|
||||
} palette[256];
|
||||
|
||||
uint32_t dp_gui_master_cntl;
|
||||
int32_t chipset;
|
||||
uint8_t family;
|
||||
uint8_t rev;
|
||||
int32_t errata;
|
||||
uint32_t video_ram;
|
||||
uint32_t mapped_vram;
|
||||
int32_t vram_width;
|
||||
int32_t vram_ddr;
|
||||
|
||||
struct pll_info bios_pll;
|
||||
struct pll_info pll;
|
||||
int32_t pitch, bpp, depth;
|
||||
|
||||
uint32_t save_regs[100];
|
||||
int32_t asleep;
|
||||
int32_t lock_blank;
|
||||
int32_t dynclk;
|
||||
int32_t no_schedule;
|
||||
enum radeon_pm_mode pm_mode;
|
||||
int32_t has_CRTC2;
|
||||
int32_t is_mobility;
|
||||
int32_t is_IGP;
|
||||
int32_t reversed_DAC;
|
||||
int32_t reversed_TMDS;
|
||||
struct panel_info panel_info;
|
||||
int32_t mon1_type;
|
||||
uint8_t *mon1_EDID;
|
||||
struct fb_videomode *mon1_modedb;
|
||||
int32_t mon1_dbsize;
|
||||
int32_t mon2_type;
|
||||
uint8_t *mon2_EDID;
|
||||
|
||||
/* Timer used for delayed LVDS operations */
|
||||
int32_t lvds_timer;
|
||||
uint32_t pending_lvds_gen_cntl;
|
||||
uint32_t dp_gui_master_cntl;
|
||||
|
||||
struct pll_info bios_pll;
|
||||
struct pll_info pll;
|
||||
|
||||
uint32_t save_regs[100];
|
||||
int32_t asleep;
|
||||
int32_t lock_blank;
|
||||
int32_t dynclk;
|
||||
int32_t no_schedule;
|
||||
enum radeon_pm_mode pm_mode;
|
||||
|
||||
/* Timer used for delayed LVDS operations */
|
||||
int32_t lvds_timer;
|
||||
uint32_t pending_lvds_gen_cntl;
|
||||
|
||||
#ifdef CONFIG_FB_RADEON_I2C
|
||||
struct radeon_i2c_chan i2c[4];
|
||||
struct radeon_i2c_chan i2c[4];
|
||||
#endif
|
||||
|
||||
/* Texture */
|
||||
|
||||
int32_t RenderInited3D;
|
||||
int32_t tilingEnabled;
|
||||
void *RenderTex;
|
||||
uint32_t RenderTexOffset;
|
||||
int32_t RenderTexSize;
|
||||
void (*RenderCallback)(struct radeonfb_info *rinfo);
|
||||
uint32_t RenderTimeout;
|
||||
uint32_t dst_pitch_offset;
|
||||
/* Texture */
|
||||
|
||||
int32_t RenderInited3D;
|
||||
int32_t tilingEnabled;
|
||||
void *RenderTex;
|
||||
uint32_t RenderTexOffset;
|
||||
int32_t RenderTexSize;
|
||||
void (*RenderCallback)(struct radeonfb_info *rinfo);
|
||||
uint32_t RenderTimeout;
|
||||
uint32_t dst_pitch_offset;
|
||||
|
||||
|
||||
#ifdef _NOT_USED_
|
||||
/* Video & theatre */
|
||||
/* Video & theatre */
|
||||
|
||||
TheatrePtr theatre;
|
||||
TheatrePtr theatre;
|
||||
|
||||
int32_t MM_TABLE_valid;
|
||||
_MM_TABLE MM_TABLE;
|
||||
int32_t MM_TABLE_valid;
|
||||
_MM_TABLE MM_TABLE;
|
||||
|
||||
int32_t RageTheatreCrystal;
|
||||
int32_t RageTheatreTunerPort;
|
||||
int32_t RageTheatreCompositePort;
|
||||
int32_t RageTheatreSVideoPort;
|
||||
int32_t tunerType;
|
||||
|
||||
int32_t videoStatus;
|
||||
int32_t encoding;
|
||||
int32_t overlay_deint32_terlacing_method;
|
||||
int32_t video_stream_active;
|
||||
int32_t capture_vbi_data;
|
||||
int32_t v;
|
||||
void *videoLinear;
|
||||
int32_t videoLinearSize;
|
||||
struct
|
||||
{
|
||||
uint32_t y,u,v;
|
||||
} videoLinearOffset;
|
||||
int32_t RageTheatreCrystal;
|
||||
int32_t RageTheatreTunerPort;
|
||||
int32_t RageTheatreCompositePort;
|
||||
int32_t RageTheatreSVideoPort;
|
||||
int32_t tunerType;
|
||||
|
||||
int32_t videoStatus;
|
||||
int32_t encoding;
|
||||
int32_t overlay_deint32_terlacing_method;
|
||||
int32_t video_stream_active;
|
||||
int32_t capture_vbi_data;
|
||||
int32_t v;
|
||||
void *videoLinear;
|
||||
int32_t videoLinearSize;
|
||||
struct
|
||||
{
|
||||
uint32_t y,u,v;
|
||||
} videoLinearOffset;
|
||||
#endif /* _NOT_USED_ */
|
||||
|
||||
int32_t dec_hue;
|
||||
int32_t dec_saturation;
|
||||
int32_t dec_contrast;
|
||||
int32_t dec_brightness;
|
||||
|
||||
int32_t dec_hue;
|
||||
int32_t dec_saturation;
|
||||
int32_t dec_contrast;
|
||||
int32_t dec_brightness;
|
||||
};
|
||||
|
||||
#define PRIMARY_MONITOR(rinfo) (rinfo->mon1_type)
|
||||
@@ -471,7 +476,7 @@ struct radeonfb_info
|
||||
*/
|
||||
static inline void _radeon_msleep(struct radeonfb_info *rinfo, uint32_t ms)
|
||||
{
|
||||
wait_ms(ms);
|
||||
wait_ms(ms);
|
||||
}
|
||||
|
||||
#define radeon_msleep(ms) _radeon_msleep(rinfo,ms)
|
||||
@@ -483,17 +488,17 @@ extern uint32_t __INPLL(struct radeonfb_info *rinfo, uint32_t addr);
|
||||
extern void __OUTPLL(struct radeonfb_info *rinfo, uint32_t index, uint32_t val);
|
||||
extern void __OUTPLLP(struct radeonfb_info *rinfo, uint32_t index, uint32_t val, uint32_t mask);
|
||||
|
||||
#define INREG8(addr) *((uint8_t *)(rinfo->mmio_base + addr))
|
||||
#define INREG16(addr) swpw(*(uint16_t *)(rinfo->mmio_base + addr))
|
||||
#define INREG(addr) swpl(*(uint32_t *)(rinfo->mmio_base + addr))
|
||||
#define OUTREG8(addr, val) (*((uint8_t *)(rinfo->mmio_base + addr)) = val)
|
||||
#define OUTREG16(addr, val) (*((uint16_t *)(rinfo->mmio_base + addr)) = swpw(val))
|
||||
#define OUTREG(addr, val) (*((uint32_t *)(rinfo->mmio_base + addr)) = swpl(val))
|
||||
#define INREG8(addr) *((volatile uint8_t *)(rinfo->mmio_base + addr))
|
||||
#define INREG16(addr) swpw(*(volatile uint16_t *)(rinfo->mmio_base + addr))
|
||||
#define INREG(addr) swpl(*(volatile uint32_t *)(rinfo->mmio_base + addr))
|
||||
#define OUTREG8(addr, val) (*((volatile uint8_t *)(rinfo->mmio_base + addr)) = val)
|
||||
#define OUTREG16(addr, val) (*((volatile uint16_t *)(rinfo->mmio_base + addr)) = swpw((uint32_t) val))
|
||||
#define OUTREG(addr, val) (*((volatile uint32_t *)(rinfo->mmio_base + addr)) = swpl((uint32_t) val))
|
||||
|
||||
extern int32_t *tab_funcs_pci;
|
||||
#define BIOS_IN8(v) (* ((uint8_t *) rinfo->bios_seg_phys + v))
|
||||
#define BIOS_IN16(v) (swpw(*(uint16_t *) ((uint8_t *) rinfo->bios_seg_phys + v)))
|
||||
#define BIOS_IN32(v) (swpl(*(uint32_t *) ((uint8_t *) rinfo->bios_seg_phys + v)))
|
||||
#define BIOS_IN8(v) (* ((volatile uint8_t *) rinfo->bios_seg_phys + v))
|
||||
#define BIOS_IN16(v) (swpw(*(volatile uint16_t *) ((uint8_t *) rinfo->bios_seg_phys + v)))
|
||||
#define BIOS_IN32(v) (swpl(*(volatile uint32_t *) ((uint8_t *) rinfo->bios_seg_phys + v)))
|
||||
|
||||
#define ADDRREG(addr) ((volatile uint32_t *)(rinfo->mmio_base + (addr)))
|
||||
#define OUTREGP(addr, val, mask) _OUTREGP(rinfo, addr, val, mask)
|
||||
@@ -507,14 +512,14 @@ extern int32_t *tab_funcs_pci;
|
||||
|
||||
static inline uint32_t radeon_get_dstbpp(uint16_t depth)
|
||||
{
|
||||
switch(depth)
|
||||
{
|
||||
case 8: return DST_8BPP;
|
||||
case 15: return DST_15BPP;
|
||||
case 16: return DST_16BPP;
|
||||
case 32: return DST_32BPP;
|
||||
default: return 0;
|
||||
}
|
||||
switch(depth)
|
||||
{
|
||||
case 8: return DST_8BPP;
|
||||
case 15: return DST_15BPP;
|
||||
case 16: return DST_16BPP;
|
||||
case 32: return DST_32BPP;
|
||||
default: return 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* I2C Functions */
|
||||
@@ -530,11 +535,11 @@ extern void radeonfb_pm_exit(struct radeonfb_info *rinfo);
|
||||
|
||||
/* Monitor probe functions */
|
||||
extern void radeon_probe_screens(struct radeonfb_info *rinfo,
|
||||
const char *monitor_layout, int ignore_edid);
|
||||
const char *monitor_layout, int32_t ignore_edid);
|
||||
extern void radeon_check_modes(struct radeonfb_info *rinfo, struct mode_option *resolution);
|
||||
extern int radeon_match_mode(struct radeonfb_info *rinfo,
|
||||
struct fb_var_screeninfo *dest,
|
||||
const struct fb_var_screeninfo *src);
|
||||
extern int32_t radeon_match_mode(struct radeonfb_info *rinfo,
|
||||
struct fb_var_screeninfo *dest,
|
||||
const struct fb_var_screeninfo *src);
|
||||
|
||||
/* Video functions */
|
||||
void RADEONResetVideo(struct radeonfb_info *rinfo);
|
||||
@@ -547,7 +552,7 @@ void RADEONVIP_reset(struct radeonfb_info *rinfo);
|
||||
void RADEONInitVideo(struct radeonfb_info *rinfo);
|
||||
void RADEONShutdownVideo(struct radeonfb_info *rinfo);
|
||||
int32_t RADEONPutVideo(struct radeonfb_info *rinfo, int32_t src_x, int32_t src_y, int32_t src_w, int32_t src_h,
|
||||
int32_t drw_x, int32_t drw_y, int32_t drw_w, int32_t drw_h);
|
||||
int32_t drw_x, int32_t drw_y, int32_t drw_w, int32_t drw_h);
|
||||
void RADEONStopVideo(struct radeonfb_info *rinfo, int32_t cleanup);
|
||||
|
||||
/* Theatre functions */
|
||||
@@ -570,7 +575,7 @@ extern void RADEONVIP_reset(struct radeonfb_info *rinfo);
|
||||
|
||||
/* Accel functions */
|
||||
|
||||
extern void radeon_wait_for_fifo_function(struct radeonfb_info *rinfo, int entries);
|
||||
extern void radeon_wait_for_fifo_function(struct radeonfb_info *rinfo, int32_t entries);
|
||||
extern void radeon_engine_flush(struct radeonfb_info *rinfo);
|
||||
extern void radeon_engine_reset(struct radeonfb_info *rinfo);
|
||||
extern void radeon_engine_restore(struct radeonfb_info *rinfo);
|
||||
@@ -580,71 +585,71 @@ extern void radeon_wait_for_idle_mmio(struct radeonfb_info *rinfo);
|
||||
#define radeon_engine_idle() radeon_wait_for_idle_mmio(rinfo)
|
||||
|
||||
#define radeon_wait_for_fifo(rinfo, entries) \
|
||||
do \
|
||||
{ \
|
||||
if (rinfo->fifo_slots < entries) \
|
||||
radeon_wait_for_fifo_function(rinfo, entries); \
|
||||
rinfo->fifo_slots -= entries; \
|
||||
} while (0)
|
||||
do \
|
||||
{ \
|
||||
if (rinfo->fifo_slots < entries) \
|
||||
radeon_wait_for_fifo_function(rinfo, entries); \
|
||||
rinfo->fifo_slots -= entries; \
|
||||
} while (0)
|
||||
|
||||
static inline int radeonfb_sync(struct fb_info *info)
|
||||
static inline int32_t radeonfb_sync(struct fb_info *info)
|
||||
{
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
radeon_engine_idle();
|
||||
return 0;
|
||||
struct radeonfb_info *rinfo = info->par;
|
||||
radeon_engine_idle();
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern void radeon_restore_accel_state_mmio(struct fb_info *info);
|
||||
extern void radeon_setup_for_solid_fill(struct fb_info *info, int color, int rop, unsigned int planemask);
|
||||
extern void radeon_subsequent_solid_fill_rect_mmio(struct fb_info *info, int x, int y, int w, int h);
|
||||
extern void radeon_setup_for_solid_line_mmio(struct fb_info *info, int color, int rop, unsigned int planemask);
|
||||
extern void radeon_subsequent_solid_hor_vert_line_mmio(struct fb_info *info, int x, int y, int len, int dir);
|
||||
extern void radeon_subsequent_solid_two_point_line_mmio(struct fb_info *info, int xa, int ya, int xb,
|
||||
int yb, int flags);
|
||||
extern void radeon_setup_for_dashed_line_mmio(struct fb_info *info, int fg, int bg,
|
||||
int rop, unsigned int planemask, int length, unsigned char *pattern);
|
||||
extern void radeon_setup_for_solid_fill(struct fb_info *info, int32_t color, int32_t rop, uint32_t planemask);
|
||||
extern void radeon_subsequent_solid_fill_rect_mmio(struct fb_info *info, int32_t x, int32_t y, int32_t w, int32_t h);
|
||||
extern void radeon_setup_for_solid_line_mmio(struct fb_info *info, int32_t color, int32_t rop, uint32_t planemask);
|
||||
extern void radeon_subsequent_solid_hor_vert_line_mmio(struct fb_info *info, int32_t x, int32_t y, int32_t len, int32_t dir);
|
||||
extern void radeon_subsequent_solid_two_point_line_mmio(struct fb_info *info, int32_t xa, int32_t ya, int32_t xb,
|
||||
int32_t yb, int32_t flags);
|
||||
extern void radeon_setup_for_dashed_line_mmio(struct fb_info *info, int32_t fg, int32_t bg,
|
||||
int32_t rop, uint32_t planemask, int32_t length, unsigned char *pattern);
|
||||
extern void radeon_subsequent_dashed_two_point_line_mmio(struct fb_info *info,
|
||||
int xa, int ya, int xb, int yb, int flags, int phase);
|
||||
int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t flags, int32_t phase);
|
||||
extern void radeon_setup_for_screen_to_screen_copy_mmio(struct fb_info *info,
|
||||
int xdir, int ydir, int rop, unsigned int planemask, int trans_color);
|
||||
int32_t xdir, int32_t ydir, int32_t rop, uint32_t planemask, int32_t trans_color);
|
||||
extern void radeon_subsequent_screen_to_screen_copy_mmio(struct fb_info *info,
|
||||
int xa, int ya, int xb, int yb, int w, int h);
|
||||
int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t w, int32_t h);
|
||||
extern void radeon_screen_to_screen_copy_mmio(struct fb_info *info,
|
||||
int xa, int ya, int xb, int yb, int w, int h, int rop);
|
||||
int32_t xa, int32_t ya, int32_t xb, int32_t yb, int32_t w, int32_t h, int32_t rop);
|
||||
extern void radeon_setup_for_mono_8x8_pattern_fill_mmio(struct fb_info *info,
|
||||
int patternx, int patterny, int fg, int bg, int rop, unsigned int planemask);
|
||||
int32_t patternx, int32_t patterny, int32_t fg, int32_t bg, int32_t rop, uint32_t planemask);
|
||||
extern void radeon_subsequent_mono_8x8_pattern_fill_rect_mmio(struct fb_info *info,
|
||||
int patternx, int patterny, int x, int y, int w, int h);
|
||||
extern void radeon_setup_for_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info,
|
||||
int fg, int bg, int rop, unsigned int planemask);
|
||||
int32_t patternx, int32_t patterny, int32_t x, int32_t y, int32_t w, int32_t h);
|
||||
extern void radeon_setup_for_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info,
|
||||
int32_t fg, int32_t bg, int32_t rop, uint32_t planemask);
|
||||
extern void radeon_subsequent_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info,
|
||||
int x, int y, int w, int h, int skipleft);
|
||||
extern void radeon_subsequent_scanline_mmio(struct fb_info *info, unsigned long *buf);
|
||||
int32_t x, int32_t y, int32_t w, int32_t h, int32_t skipleft);
|
||||
extern void radeon_subsequent_scanline_mmio(struct fb_info *info, uint32_t *buf);
|
||||
extern void radeon_setup_for_scanline_image_write_mmio(struct fb_info *info,
|
||||
int rop, unsigned int planemask, int trans_color, int bpp);
|
||||
int32_t rop, uint32_t planemask, int32_t trans_color, int32_t bpp);
|
||||
extern void radeon_subsequent_scanline_image_write_rect_mmio(struct fb_info *info,
|
||||
int x, int y, int w, int h, int skipleft);
|
||||
int32_t x, int32_t y, int32_t w, int32_t h, int32_t skipleft);
|
||||
extern void radeon_set_clipping_rectangle_mmio(struct fb_info *info,
|
||||
int xa, int ya, int xb, int yb);
|
||||
int32_t xa, int32_t ya, int32_t xb, int32_t yb);
|
||||
extern void radeon_disable_clipping_mmio(struct fb_info *info);
|
||||
|
||||
extern int32_t radeon_setup_for_cpu_to_screen_alpha_texture_mmio(struct fb_info *info,
|
||||
int op, int red, int green, int blue,
|
||||
int alpha, int maskFormat, int dstFormat,
|
||||
uint8_t *alphaPtr, int alphaPitch,
|
||||
int width, int height, int32_t flags);
|
||||
extern int32_t radeon_setup_for_cpu_to_screen_alpha_texture_mmio(struct fb_info *info,
|
||||
int32_t op, int32_t red, int32_t green, int32_t blue,
|
||||
int32_t alpha, int32_t maskFormat, int32_t dstFormat,
|
||||
uint8_t *alphaPtr, int32_t alphaPitch,
|
||||
int32_t width, int32_t height, int32_t flags);
|
||||
extern int32_t radeon_setup_for_cpu_to_screen_texture_mmio(struct fb_info *info, int32_t op,
|
||||
uint32_t srcFormat, uint32_t dstFormat,
|
||||
uint8_t *texPtr, int32_t texPitch,
|
||||
int32_t width, int32_t height, int32_t flags);
|
||||
uint32_t srcFormat, uint32_t dstFormat,
|
||||
uint8_t *texPtr, int32_t texPitch,
|
||||
int32_t width, int32_t height, int32_t flags);
|
||||
extern void radeon_subsequent_cpu_to_screen_texture_mmio(struct fb_info *info,
|
||||
int32_t dstx, int32_t dsty,
|
||||
int32_t srcx, int32_t srcy,
|
||||
int32_t width, int32_t height);
|
||||
int32_t dstx, int32_t dsty,
|
||||
int32_t srcx, int32_t srcy,
|
||||
int32_t width, int32_t height);
|
||||
/* Cursor functions */
|
||||
extern void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg);
|
||||
extern void radeon_set_cursor_position(struct fb_info *info, int x, int y);
|
||||
extern void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom);
|
||||
extern void radeon_set_cursor_colors(struct fb_info *info, int32_t bg, int32_t fg);
|
||||
extern void radeon_set_cursor_position(struct fb_info *info, int32_t x, int32_t y);
|
||||
extern void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int32_t zoom);
|
||||
extern void radeon_hide_cursor(struct fb_info *info);
|
||||
extern void radeon_show_cursor(struct fb_info *info);
|
||||
extern long radeon_cursor_init(struct fb_info *info);
|
||||
@@ -652,8 +657,8 @@ extern long radeon_cursor_init(struct fb_info *info);
|
||||
/* Other functions */
|
||||
extern int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t mode_switch);
|
||||
extern void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, int32_t reg_only);
|
||||
int radeonfb_setcolreg(unsigned regno, unsigned red, unsigned green,
|
||||
unsigned blue, unsigned transp, struct fb_info *info);
|
||||
int32_t radeonfb_setcolreg(uint32_t regno, uint32_t red, uint32_t green,
|
||||
uint32_t blue, uint32_t transp, struct fb_info *info);
|
||||
extern int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent);
|
||||
extern void radeonfb_pci_unregister(void);
|
||||
|
||||
|
||||
@@ -43,5 +43,6 @@ typedef err_t (*memcpy_callback_t)(uint8_t *dst, uint8_t *src, size_t length);
|
||||
|
||||
extern void srec_execute(char *filename);
|
||||
extern err_t read_srecords(char *filename, void **start_address, uint32_t *actual_length, memcpy_callback_t callback);
|
||||
extern err_t srec_memcpy(uint8_t *dst, uint8_t *src, size_t n);
|
||||
|
||||
#endif /* _S19READER_H_ */
|
||||
|
||||
@@ -31,7 +31,7 @@
|
||||
#define _SD_CARD_H_
|
||||
|
||||
#include <MCF5475.h>
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
extern void sd_card_init(void);
|
||||
|
||||
|
||||
11
include/setjmp.h
Normal file
11
include/setjmp.h
Normal file
@@ -0,0 +1,11 @@
|
||||
#ifndef _SETJMP_H_
|
||||
#define _SETJMP_H_
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
typedef uint32_t jmp_buf[18];
|
||||
|
||||
extern int setjmp(jmp_buf env);
|
||||
extern void longjmp(jmp_buf env, int val);
|
||||
|
||||
#endif /* _SETJMP_H_ */
|
||||
455
include/usb.h
455
include/usb.h
@@ -26,7 +26,6 @@
|
||||
#ifndef _USB_H_
|
||||
#define _USB_H_
|
||||
|
||||
//#include <stdlib.h>
|
||||
#include <bas_string.h>
|
||||
#include "driver_mem.h"
|
||||
#include "pci.h"
|
||||
@@ -37,18 +36,10 @@
|
||||
|
||||
extern long *tab_funcs_pci;
|
||||
|
||||
#define in8(addr) Fast_read_mem_byte(usb_handle,addr)
|
||||
#define in16r(addr) Fast_read_mem_word(usb_handle,addr)
|
||||
#define in32r(addr) Fast_read_mem_longword(usb_handle,addr)
|
||||
#define out8(addr,val) Write_mem_byte(usb_handle,addr,val)
|
||||
#define out16r(addr,val) Write_mem_word(usb_handle,addr,val)
|
||||
#define out32r(addr,val) Write_mem_longword(usb_handle,addr,val)
|
||||
|
||||
|
||||
#define __u8 uint8_t
|
||||
#define __u16 uint16_t
|
||||
#define __u32 uint32_t
|
||||
#define u8 uint8_t
|
||||
//#define u8 uint8_t
|
||||
#define u16 uint16_t
|
||||
#define u32 uint32_t
|
||||
#define uint8_t uint8_t
|
||||
@@ -64,232 +55,241 @@ extern int sprintD(char *s, const char *fmt, ...);
|
||||
#define USB_ALTSETTINGALLOC 4
|
||||
#define USB_MAXALTSETTING 128 /* Hard limit */
|
||||
|
||||
#define USB_MAX_BUS 3
|
||||
#define USB_MAX_DEVICE 16
|
||||
#define USB_MAXCONFIG 8
|
||||
#define USB_MAXINTERFACES 8
|
||||
#define USB_MAXENDPOINTS 16
|
||||
#define USB_MAXCHILDREN 8 /* This is arbitrary */
|
||||
#define USB_MAX_HUB 16
|
||||
#define USB_MAX_BUS 3
|
||||
#define USB_MAX_DEVICE 16
|
||||
#define USB_MAXCONFIG 8
|
||||
#define USB_MAXINTERFACES 8
|
||||
#define USB_MAXENDPOINTS 16
|
||||
#define USB_MAXCHILDREN 8 /* This is arbitrary */
|
||||
#define USB_MAX_HUB 16
|
||||
|
||||
#define USB_CNTL_TIMEOUT 100 /* 100ms timeout */
|
||||
#define USB_CNTL_TIMEOUT 100 /* 100 ms timeout */
|
||||
|
||||
#define USB_BUFSIZ 512
|
||||
|
||||
/* String descriptor */
|
||||
struct usb_string_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t wData[1];
|
||||
struct usb_string_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t wData[1];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* device request (setup) */
|
||||
struct devrequest {
|
||||
uint8_t requesttype;
|
||||
uint8_t request;
|
||||
uint16_t value;
|
||||
uint16_t index;
|
||||
uint16_t length;
|
||||
struct devrequest
|
||||
{
|
||||
uint8_t requesttype;
|
||||
uint8_t request;
|
||||
uint16_t value;
|
||||
uint16_t index;
|
||||
uint16_t length;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* All standard descriptors have these 2 fields in common */
|
||||
struct usb_descriptor_header {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
struct usb_descriptor_header
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* Device descriptor */
|
||||
struct usb_device_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
uint16_t idVendor;
|
||||
uint16_t idProduct;
|
||||
uint16_t bcdDevice;
|
||||
uint8_t iManufacturer;
|
||||
uint8_t iProduct;
|
||||
uint8_t iSerialNumber;
|
||||
uint8_t bNumConfigurations;
|
||||
struct usb_device_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
uint16_t idVendor;
|
||||
uint16_t idProduct;
|
||||
uint16_t bcdDevice;
|
||||
uint8_t iManufacturer;
|
||||
uint8_t iProduct;
|
||||
uint8_t iSerialNumber;
|
||||
uint8_t bNumConfigurations;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* Endpoint descriptor */
|
||||
struct usb_endpoint_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bEndpointAddress;
|
||||
uint8_t bmAttributes;
|
||||
uint16_t wMaxPacketSize;
|
||||
uint8_t bInterval;
|
||||
uint8_t bRefresh;
|
||||
uint8_t bSynchAddress;
|
||||
struct usb_endpoint_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bEndpointAddress;
|
||||
uint8_t bmAttributes;
|
||||
uint16_t wMaxPacketSize;
|
||||
uint8_t bInterval;
|
||||
uint8_t bRefresh;
|
||||
uint8_t bSynchAddress;
|
||||
} __attribute__ ((packed)) __attribute__ ((aligned(2)));
|
||||
|
||||
/* Interface descriptor */
|
||||
struct usb_interface_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bInterfaceNumber;
|
||||
uint8_t bAlternateSetting;
|
||||
uint8_t bNumEndpoints;
|
||||
uint8_t bInterfaceClass;
|
||||
uint8_t bInterfaceSubClass;
|
||||
uint8_t bInterfaceProtocol;
|
||||
uint8_t iInterface;
|
||||
struct usb_interface_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bInterfaceNumber;
|
||||
uint8_t bAlternateSetting;
|
||||
uint8_t bNumEndpoints;
|
||||
uint8_t bInterfaceClass;
|
||||
uint8_t bInterfaceSubClass;
|
||||
uint8_t bInterfaceProtocol;
|
||||
uint8_t iInterface;
|
||||
|
||||
uint8_t no_of_ep;
|
||||
uint8_t num_altsetting;
|
||||
uint8_t act_altsetting;
|
||||
uint8_t no_of_ep;
|
||||
uint8_t num_altsetting;
|
||||
uint8_t act_altsetting;
|
||||
|
||||
struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
|
||||
struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
|
||||
/* Configuration descriptor information.. */
|
||||
struct usb_config_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t wTotalLength;
|
||||
uint8_t bNumInterfaces;
|
||||
uint8_t bConfigurationValue;
|
||||
uint8_t iConfiguration;
|
||||
uint8_t bmAttributes;
|
||||
uint8_t MaxPower;
|
||||
struct usb_config_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t wTotalLength;
|
||||
uint8_t bNumInterfaces;
|
||||
uint8_t bConfigurationValue;
|
||||
uint8_t iConfiguration;
|
||||
uint8_t bmAttributes;
|
||||
uint8_t MaxPower;
|
||||
|
||||
uint8_t no_of_if; /* number of interfaces */
|
||||
struct usb_interface_descriptor if_desc[USB_MAXINTERFACES];
|
||||
uint8_t no_of_if; /* number of interfaces */
|
||||
struct usb_interface_descriptor if_desc[USB_MAXINTERFACES];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
enum {
|
||||
/* Maximum packet size; encoded as 0,1,2,3 = 8,16,32,64 */
|
||||
PACKET_SIZE_8 = 0,
|
||||
PACKET_SIZE_16 = 1,
|
||||
PACKET_SIZE_32 = 2,
|
||||
PACKET_SIZE_64 = 3,
|
||||
enum
|
||||
{
|
||||
/* Maximum packet size; encoded as 0,1,2,3 = 8,16,32,64 */
|
||||
PACKET_SIZE_8 = 0,
|
||||
PACKET_SIZE_16 = 1,
|
||||
PACKET_SIZE_32 = 2,
|
||||
PACKET_SIZE_64 = 3,
|
||||
};
|
||||
|
||||
struct usb_device {
|
||||
int devnum; /* Device number on USB bus */
|
||||
int speed; /* full/low/high */
|
||||
char mf[32]; /* manufacturer */
|
||||
char prod[32]; /* product */
|
||||
char serial[32]; /* serial number */
|
||||
struct usb_device
|
||||
{
|
||||
int devnum; /* Device number on USB bus */
|
||||
int speed; /* full/low/high */
|
||||
char mf[32]; /* manufacturer */
|
||||
char prod[32]; /* product */
|
||||
char serial[32]; /* serial number */
|
||||
|
||||
/* Maximum packet size; one of: PACKET_SIZE_* */
|
||||
int maxpacketsize;
|
||||
/* one bit for each endpoint ([0] = IN, [1] = OUT) */
|
||||
unsigned int toggle[2];
|
||||
/* endpoint halts; one bit per endpoint # & direction;
|
||||
* [0] = IN, [1] = OUT
|
||||
*/
|
||||
unsigned int halted[2];
|
||||
int epmaxpacketin[16]; /* INput endpoint specific maximums */
|
||||
int epmaxpacketout[16]; /* OUTput endpoint specific maximums */
|
||||
/* Maximum packet size; one of: PACKET_SIZE_* */
|
||||
int maxpacketsize;
|
||||
|
||||
int configno; /* selected config number */
|
||||
struct usb_device_descriptor descriptor; /* Device Descriptor */
|
||||
struct usb_config_descriptor config; /* config descriptor */
|
||||
/* one bit for each endpoint ([0] = IN, [1] = OUT) */
|
||||
unsigned int toggle[2];
|
||||
|
||||
int have_langid; /* whether string_langid is valid yet */
|
||||
int string_langid; /* language ID for strings */
|
||||
int (*irq_handle)(struct usb_device *dev);
|
||||
uint32_t irq_status;
|
||||
int irq_act_len; /* transfered bytes */
|
||||
void *privptr;
|
||||
/*
|
||||
* Child devices - if this is a hub device
|
||||
* Each instance needs its own set of data structures.
|
||||
*/
|
||||
uint32_t status;
|
||||
int act_len; /* transfered bytes */
|
||||
int maxchild; /* Number of ports if hub */
|
||||
int portnr;
|
||||
struct usb_device *parent;
|
||||
struct usb_device *children[USB_MAXCHILDREN];
|
||||
void *priv_hcd;
|
||||
int (*deregister)(struct usb_device *dev);
|
||||
/* endpoint halts; one bit per endpoint # & direction;
|
||||
* [0] = IN, [1] = OUT
|
||||
*/
|
||||
unsigned int halted[2];
|
||||
int epmaxpacketin[16]; /* INput endpoint specific maximums */
|
||||
int epmaxpacketout[16]; /* OUTput endpoint specific maximums */
|
||||
|
||||
struct usb_hub_device *hub;
|
||||
int usbnum;
|
||||
int configno; /* selected config number */
|
||||
struct usb_device_descriptor descriptor; /* Device Descriptor */
|
||||
struct usb_config_descriptor config; /* config descriptor */
|
||||
|
||||
int have_langid; /* whether string_langid is valid yet */
|
||||
int string_langid; /* language ID for strings */
|
||||
int (*irq_handle)(struct usb_device *dev);
|
||||
uint32_t irq_status;
|
||||
int irq_act_len; /* transfered bytes */
|
||||
void *privptr;
|
||||
|
||||
/*
|
||||
* Child devices - if this is a hub device
|
||||
* Each instance needs its own set of data structures.
|
||||
*/
|
||||
uint32_t status;
|
||||
int act_len; /* transfered bytes */
|
||||
int maxchild; /* Number of ports if hub */
|
||||
int portnr;
|
||||
struct usb_device *parent;
|
||||
struct usb_device *children[USB_MAXCHILDREN];
|
||||
void *priv_hcd;
|
||||
int (*deregister)(struct usb_device *dev);
|
||||
|
||||
struct usb_hub_device *hub;
|
||||
int usbnum;
|
||||
};
|
||||
|
||||
typedef struct
|
||||
{
|
||||
long ident;
|
||||
union
|
||||
{
|
||||
long l;
|
||||
short i[2];
|
||||
char c[4];
|
||||
} v;
|
||||
long ident;
|
||||
union
|
||||
{
|
||||
long l;
|
||||
short i[2];
|
||||
char c[4];
|
||||
} v;
|
||||
} USB_COOKIE;
|
||||
|
||||
/**********************************************************************
|
||||
/*
|
||||
* this is how the lowlevel part communicate with the outer world
|
||||
*/
|
||||
|
||||
int ohci_usb_lowlevel_init(int32_t handle, const struct pci_device_id *ent, void **priv);
|
||||
int ohci_usb_lowlevel_stop(void *priv);
|
||||
int ohci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
|
||||
int ohci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
|
||||
int ohci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
void ohci_usb_enable_interrupt(int enable);
|
||||
extern int ohci_usb_lowlevel_init(int32_t handle, const struct pci_device_id *ent, void **priv);
|
||||
extern int ohci_usb_lowlevel_stop(void *priv);
|
||||
extern int ohci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
|
||||
extern int ohci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
|
||||
extern int ohci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
extern void ohci_usb_enable_interrupt(int enable);
|
||||
|
||||
int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv);
|
||||
int ehci_usb_lowlevel_stop(void *priv);
|
||||
int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
|
||||
int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
|
||||
int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
void ehci_usb_enable_interrupt(int enable);
|
||||
extern int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv);
|
||||
extern int ehci_usb_lowlevel_stop(void *priv);
|
||||
extern int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
|
||||
extern int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
|
||||
extern int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
extern void ehci_usb_enable_interrupt(int enable);
|
||||
|
||||
void usb_enable_interrupt(int enable);
|
||||
extern void usb_enable_interrupt(int enable);
|
||||
|
||||
extern int usb_new_device(struct usb_device *dev);
|
||||
extern struct usb_device *usb_alloc_new_device(int bus_index, void *priv);
|
||||
extern void usb_disconnect(struct usb_device **pdev);
|
||||
|
||||
#define USB_MAX_STOR_DEV 5
|
||||
block_dev_desc_t *usb_stor_get_dev(int index);
|
||||
int usb_stor_scan(void);
|
||||
int usb_stor_info(void);
|
||||
int usb_stor_register(struct usb_device *dev);
|
||||
int usb_stor_deregister(struct usb_device *dev);
|
||||
|
||||
int drv_usb_kbd_init(void);
|
||||
int usb_kbd_register(struct usb_device *dev);
|
||||
int usb_kbd_deregister(struct usb_device *dev);
|
||||
extern block_dev_desc_t *usb_stor_get_dev(int index);
|
||||
extern int usb_stor_scan(void);
|
||||
extern int usb_stor_info(void);
|
||||
extern int usb_stor_register(struct usb_device *dev);
|
||||
extern int usb_stor_deregister(struct usb_device *dev);
|
||||
|
||||
int drv_usb_mouse_init(void);
|
||||
int usb_mouse_register(struct usb_device *dev);
|
||||
int usb_mouse_deregister(struct usb_device *dev);
|
||||
extern int drv_usb_kbd_init(void);
|
||||
extern int usb_kbd_register(struct usb_device *dev);
|
||||
extern int usb_kbd_deregister(struct usb_device *dev);
|
||||
|
||||
extern char usb_error_str[256];
|
||||
|
||||
/* memory */
|
||||
void *usb_malloc(long amount);
|
||||
int usb_free(void *addr);
|
||||
int usb_mem_init(void);
|
||||
void usb_mem_stop(void);
|
||||
extern int drv_usb_mouse_init(void);
|
||||
extern int usb_mouse_register(struct usb_device *dev);
|
||||
extern int usb_mouse_deregister(struct usb_device *dev);
|
||||
|
||||
/* routines */
|
||||
USB_COOKIE *usb_get_cookie(long id);
|
||||
void usb_error_msg(const char *const fmt, ... );
|
||||
int usb_init(int32_t handle, const struct pci_device_id *ent); /* initialize the USB Controller */
|
||||
int usb_stop(void); /* stop the USB Controller */
|
||||
extern int usb_init(int32_t handle, const struct pci_device_id *ent); /* initialize the USB Controller */
|
||||
extern int usb_stop(void); /* stop the USB Controller */
|
||||
|
||||
int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol);
|
||||
int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id);
|
||||
struct usb_device *usb_get_dev_index(int index, int bus);
|
||||
int usb_control_msg(struct usb_device *dev, unsigned int pipe, uint8_t request, uint8_t requesttype, uint16_t value,
|
||||
uint16_t index, void *data, uint16_t size, int timeout);
|
||||
int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout);
|
||||
int usb_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
void usb_disable_asynch(int disable);
|
||||
int usb_maxpacket(struct usb_device *dev, uint32_t pipe);
|
||||
void wait_ms(uint32_t ms);
|
||||
int usb_get_configuration_no(struct usb_device *dev, uint8_t *buffer, int cfgno);
|
||||
int usb_get_report(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
|
||||
int usb_get_class_descriptor(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
|
||||
int usb_clear_halt(struct usb_device *dev, int pipe);
|
||||
int usb_string(struct usb_device *dev, int index, char *buf, size_t size);
|
||||
int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
||||
extern int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol);
|
||||
extern int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id);
|
||||
extern struct usb_device *usb_get_dev_index(int index, int bus);
|
||||
extern int usb_control_msg(struct usb_device *dev, unsigned int pipe, uint8_t request, uint8_t requesttype,
|
||||
uint16_t value, uint16_t index, void *data, uint16_t size, int timeout);
|
||||
extern int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout);
|
||||
extern int usb_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
|
||||
extern void usb_disable_asynch(int disable);
|
||||
extern int usb_maxpacket(struct usb_device *dev, uint32_t pipe);
|
||||
|
||||
extern int usb_get_configuration_no(struct usb_device *dev, uint8_t *buffer, int cfgno);
|
||||
extern int usb_get_report(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
|
||||
extern int usb_get_class_descriptor(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
|
||||
extern int usb_clear_halt(struct usb_device *dev, int pipe);
|
||||
extern int usb_string(struct usb_device *dev, int index, char *buf, size_t size);
|
||||
extern int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
||||
|
||||
/*
|
||||
* Calling this entity a "pipe" is glorifying it. A USB pipe
|
||||
@@ -325,44 +325,45 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
||||
* specification, so that much of the uhci driver can just mask the bits
|
||||
* appropriately.
|
||||
*/
|
||||
|
||||
/* Create various pipes... */
|
||||
#define create_pipe(dev,endpoint) \
|
||||
(((dev)->devnum << 8) | (endpoint << 15) | \
|
||||
((dev)->speed << 26) | (dev)->maxpacketsize)
|
||||
#define create_pipe(dev, endpoint) \
|
||||
(((dev)->devnum << 8) | (endpoint << 15) | \
|
||||
((dev)->speed << 26) | (dev)->maxpacketsize)
|
||||
#define default_pipe(dev) ((dev)->speed << 26)
|
||||
|
||||
#define usb_sndctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \
|
||||
create_pipe(dev, endpoint))
|
||||
create_pipe(dev, endpoint))
|
||||
#define usb_rcvctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
#define usb_sndisocpipe(dev, endpoint) ((PIPE_ISOCHRONOUS << 30) | \
|
||||
create_pipe(dev, endpoint))
|
||||
create_pipe(dev, endpoint))
|
||||
#define usb_rcvisocpipe(dev, endpoint) ((PIPE_ISOCHRONOUS << 30) | \
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
#define usb_sndbulkpipe(dev, endpoint) ((PIPE_BULK << 30) | \
|
||||
create_pipe(dev, endpoint))
|
||||
create_pipe(dev, endpoint))
|
||||
#define usb_rcvbulkpipe(dev, endpoint) ((PIPE_BULK << 30) | \
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
#define usb_sndintpipe(dev, endpoint) ((PIPE_INTERRUPT << 30) | \
|
||||
create_pipe(dev, endpoint))
|
||||
create_pipe(dev, endpoint))
|
||||
#define usb_rcvintpipe(dev, endpoint) ((PIPE_INTERRUPT << 30) | \
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
create_pipe(dev, endpoint) | \
|
||||
USB_DIR_IN)
|
||||
#define usb_snddefctrl(dev) ((PIPE_CONTROL << 30) | \
|
||||
default_pipe(dev))
|
||||
default_pipe(dev))
|
||||
#define usb_rcvdefctrl(dev) ((PIPE_CONTROL << 30) | \
|
||||
default_pipe(dev) | \
|
||||
USB_DIR_IN)
|
||||
default_pipe(dev) | \
|
||||
USB_DIR_IN)
|
||||
|
||||
/* The D0/D1 toggle bits */
|
||||
#define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> ep) & 1)
|
||||
#define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << ep))
|
||||
#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = \
|
||||
((dev)->toggle[out] & \
|
||||
~(1 << ep)) | ((bit) << ep))
|
||||
((dev)->toggle[out] & \
|
||||
~(1 << ep)) | ((bit) << ep))
|
||||
|
||||
/* Endpoint halt control/status */
|
||||
#define usb_endpoint_out(ep_dir) (((ep_dir >> 7) & 1) ^ 1)
|
||||
@@ -371,7 +372,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
||||
#define usb_endpoint_halted(dev, ep, out) ((dev)->halted[out] & (1 << (ep)))
|
||||
|
||||
#define usb_packetid(pipe) (((pipe) & USB_DIR_IN) ? USB_PID_IN : \
|
||||
USB_PID_OUT)
|
||||
USB_PID_OUT)
|
||||
|
||||
#define usb_pipeout(pipe) ((((pipe) >> 7) & 1) ^ 1)
|
||||
#define usb_pipein(pipe) (((pipe) >> 7) & 1)
|
||||
@@ -391,35 +392,39 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
||||
/*************************************************************************
|
||||
* Hub Stuff
|
||||
*/
|
||||
struct usb_port_status {
|
||||
uint16_t wPortStatus;
|
||||
uint16_t wPortChange;
|
||||
struct usb_port_status
|
||||
{
|
||||
uint16_t wPortStatus;
|
||||
uint16_t wPortChange;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
struct usb_hub_status {
|
||||
uint16_t wHubStatus;
|
||||
uint16_t wHubChange;
|
||||
struct usb_hub_status
|
||||
{
|
||||
uint16_t wHubStatus;
|
||||
uint16_t wHubChange;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
|
||||
/* Hub descriptor */
|
||||
struct usb_hub_descriptor {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bNbrPorts;
|
||||
uint16_t wHubCharacteristics;
|
||||
uint8_t bPwrOn2PwrGood;
|
||||
uint8_t bHubContrCurrent;
|
||||
uint8_t DeviceRemovable[(USB_MAXCHILDREN+1+7)/8];
|
||||
uint8_t PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
|
||||
/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
|
||||
bitmaps that hold max 255 entries. (bit0 is ignored) */
|
||||
struct usb_hub_descriptor
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bNbrPorts;
|
||||
uint16_t wHubCharacteristics;
|
||||
uint8_t bPwrOn2PwrGood;
|
||||
uint8_t bHubContrCurrent;
|
||||
uint8_t DeviceRemovable[(USB_MAXCHILDREN+1+7)/8];
|
||||
uint8_t PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
|
||||
/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
|
||||
bitmaps that hold max 255 entries. (bit0 is ignored) */
|
||||
} __attribute__ ((packed));
|
||||
|
||||
|
||||
struct usb_hub_device {
|
||||
struct usb_device *pusb_dev;
|
||||
struct usb_hub_descriptor desc;
|
||||
struct usb_hub_device
|
||||
{
|
||||
struct usb_device *pusb_dev;
|
||||
struct usb_hub_descriptor desc;
|
||||
};
|
||||
|
||||
#endif /*_USB_H_ */
|
||||
|
||||
10
include/usb_hub.h
Normal file
10
include/usb_hub.h
Normal file
@@ -0,0 +1,10 @@
|
||||
#ifndef USB_HUB_H
|
||||
#define USB_HUB_H
|
||||
|
||||
extern int bus_index;
|
||||
|
||||
extern void usb_hub_reset(int bus_index);
|
||||
extern int usb_hub_probe(struct usb_device *dev, int ifnum);
|
||||
extern int hub_port_reset(struct usb_device *dev, int port, unsigned short *portstat);
|
||||
|
||||
#endif // USB_HUB_H
|
||||
@@ -22,10 +22,10 @@
|
||||
* Author: mfro
|
||||
*/
|
||||
|
||||
#ifndef UTIL_H_
|
||||
#define UTIL_H_
|
||||
#ifndef _UTIL_H_
|
||||
#define _UTIL_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
|
||||
#define NOP() __asm__ __volatile__("nop\n\t" : : : "memory")
|
||||
|
||||
@@ -35,18 +35,7 @@
|
||||
*/
|
||||
static inline uint16_t swpw(uint16_t w)
|
||||
{
|
||||
register uint32_t result asm("d0");
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"lea %[input],a0\n\t" \
|
||||
"mvz.b 1(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b (a0),%[output]\n\t" \
|
||||
: [output] "=d" (result) /* output */
|
||||
: [input] "o" (w) /* input */
|
||||
: "cc", "a0", "memory" /* clobbered */
|
||||
);
|
||||
return result;
|
||||
return (w << 8) | (w >> 8);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -56,25 +45,10 @@ static inline uint16_t swpw(uint16_t w)
|
||||
*/
|
||||
static inline uint32_t swpl(uint32_t l)
|
||||
{
|
||||
register uint32_t result asm("d0");
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"lea %[input],a0\n\t" \
|
||||
"mvz.b 3(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b 2(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b 1(a0),%[output]\n\t" \
|
||||
"lsl.l #8,%[output]\n\t" \
|
||||
"move.b (a0),%[output]\n\t" \
|
||||
: [output] "=d" (result) /* output */
|
||||
: [input] "o" (l) /* input */
|
||||
: "cc", "a0", "memory" /* clobbered */
|
||||
);
|
||||
return result;
|
||||
return ((l & 0xff000000) >> 24) | ((l & 0x00ff0000) >> 8) |
|
||||
((l & 0x0000ff00) << 8) | (l << 24);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* WORD swpw2(ULONG val);
|
||||
@@ -85,17 +59,17 @@ static inline uint32_t swpl(uint32_t l)
|
||||
#define swpw2(a) \
|
||||
__extension__ \
|
||||
({unsigned long _tmp; \
|
||||
__asm__ __volatile__ \
|
||||
("move.b (%1),%0\n\t" \
|
||||
"move.b 1(%1),(%1)\n\t" \
|
||||
"move.b %0,1(%1)\n\t" \
|
||||
"move.b 2(%1),%0\n\t" \
|
||||
"move.b 3(%1),2(%1)\n\t" \
|
||||
"move.b %0,3(%1)" \
|
||||
: "=d"(_tmp) /* outputs */ \
|
||||
: "a"(&a) /* inputs */ \
|
||||
: "cc", "memory" /* clobbered */ \
|
||||
); \
|
||||
__asm__ __volatile__ \
|
||||
("move.b (%1),%0\n\t" \
|
||||
"move.b 1(%1),(%1)\n\t" \
|
||||
"move.b %0,1(%1)\n\t" \
|
||||
"move.b 2(%1),%0\n\t" \
|
||||
"move.b 3(%1),2(%1)\n\t" \
|
||||
"move.b %0,3(%1)" \
|
||||
: "=d"(_tmp) /* outputs */ \
|
||||
: "a"(&a) /* inputs */ \
|
||||
: "cc", "memory" /* clobbered */ \
|
||||
); \
|
||||
})
|
||||
|
||||
/*
|
||||
|
||||
@@ -28,8 +28,8 @@
|
||||
* increment version number for release
|
||||
*/
|
||||
|
||||
#define MAJOR_VERSION 0
|
||||
#define MINOR_VERSION 86
|
||||
#define MAJOR_VERSION 0
|
||||
#define MINOR_VERSION 93
|
||||
|
||||
|
||||
#endif /* VERSION_H_ */
|
||||
|
||||
@@ -83,8 +83,8 @@ extern int16_t vsetmode(int16_t mode);
|
||||
extern int16_t vmontype(void);
|
||||
extern int16_t vsetsync(int16_t external);
|
||||
extern int32_t vgetsize(int16_t mode);
|
||||
extern int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb);
|
||||
extern int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb);
|
||||
extern int16_t vsetrgb(int16_t index,int16_t count, uint32_t *rgb);
|
||||
extern int16_t vgetrgb(int16_t index,int16_t count, uint32_t *rgb);
|
||||
|
||||
/* misc routines */
|
||||
extern int16_t get_videl_mode(void);
|
||||
|
||||
@@ -1,10 +1,9 @@
|
||||
#ifndef _VIDEO_H_
|
||||
#define _VIDEO_H_
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <bas_types.h>
|
||||
#include "bas_printf.h"
|
||||
#define CONFIG_FB_RADEON_I2C
|
||||
|
||||
extern void video_init(void);
|
||||
|
||||
|
||||
@@ -44,8 +44,18 @@
|
||||
typedef bool (*checker_func)(void);
|
||||
|
||||
extern void wait(uint32_t);
|
||||
extern void wait_us(uint32_t); /* this is just an alias to the above */
|
||||
|
||||
inline static void udelay(long us)
|
||||
{
|
||||
wait((uint32_t) us);
|
||||
}
|
||||
|
||||
extern bool waitfor(uint32_t us, checker_func condition);
|
||||
extern uint32_t get_timer(void);
|
||||
extern void wait_ms(uint32_t ms);
|
||||
|
||||
#define US_TO_TIMER(a) ((a) * SYSCLK) / 1000000UL
|
||||
#define TIMER_TO_US(a) ((a) * 1000000UL) / SYSCLK)
|
||||
|
||||
#endif /* _WAIT_H_ */
|
||||
|
||||
@@ -1,241 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for debug definitions.
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/debug.h,v 1.4 2000/11/21 23:10:27 tsi Exp $ */
|
||||
|
||||
#include <stdint.h>
|
||||
#include "bas_printf.h"
|
||||
|
||||
/*
|
||||
* for the X86 emulator, debug cannot be enabled and disabled on a per-file mode
|
||||
* as with all the other modules. It must be centrally enabled here.
|
||||
*/
|
||||
|
||||
#define DBG_X86EMU
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_X86EMU */
|
||||
|
||||
#ifndef __X86EMU_DEBUG_H
|
||||
#define __X86EMU_DEBUG_H
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
/* checks to be enabled for "runtime" */
|
||||
|
||||
#define CHECK_IP_FETCH_F 0x1
|
||||
#define CHECK_SP_ACCESS_F 0x2
|
||||
#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
|
||||
#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
|
||||
# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
|
||||
# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
|
||||
# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F)
|
||||
#else
|
||||
# define CHECK_IP_FETCH()
|
||||
# define CHECK_SP_ACCESS()
|
||||
# define CHECK_MEM_ACCESS()
|
||||
# define CHECK_DATA_ACCESS()
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
|
||||
# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
|
||||
# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
|
||||
# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
|
||||
# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
|
||||
# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
|
||||
# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
|
||||
# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_IP_CS_F)
|
||||
|
||||
# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
|
||||
# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
|
||||
# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
|
||||
# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F)
|
||||
# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F)
|
||||
# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
|
||||
# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F)
|
||||
# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F)
|
||||
# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
|
||||
#else
|
||||
# define DEBUG_INSTRUMENT() 0
|
||||
# define DEBUG_DECODE() 0
|
||||
# define DEBUG_TRACE() 0
|
||||
# define DEBUG_STEP() 0
|
||||
# define DEBUG_DISASSEMBLE() 0
|
||||
# define DEBUG_BREAK() 0
|
||||
# define DEBUG_SVC() 0
|
||||
# define DEBUG_SAVE_IP_CS() 0
|
||||
# define DEBUG_FS() 0
|
||||
# define DEBUG_PROC() 0
|
||||
# define DEBUG_SYSINT() 0
|
||||
# define DEBUG_TRACECALL() 0
|
||||
# define DEBUG_TRACECALLREGS() 0
|
||||
# define DEBUG_SYS() 0
|
||||
# define DEBUG_MEM_TRACE() 0
|
||||
# define DEBUG_IO_TRACE() 0
|
||||
# define DEBUG_DECODE_NOPRINT() 0
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
|
||||
# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
|
||||
x86emu_decode_printf(x)
|
||||
# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \
|
||||
x86emu_decode_printf2(x,y)
|
||||
|
||||
/*
|
||||
* The following allow us to look at the bytes of an instruction. The
|
||||
* first INCR_INSTRN_LEN, is called everytime bytes are consumed in
|
||||
* the decoding process. The SAVE_IP_CS is called initially when the
|
||||
* major opcode of the instruction is accessed.
|
||||
*/
|
||||
#define INC_DECODED_INST_LEN(x) \
|
||||
if (DEBUG_DECODE()) \
|
||||
x86emu_inc_decoded_inst_len(x)
|
||||
|
||||
#define SAVE_IP_CS(x,y) \
|
||||
if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \
|
||||
| DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
|
||||
M.x86.saved_cs = x; \
|
||||
M.x86.saved_ip = y; \
|
||||
}
|
||||
#else
|
||||
# define INC_DECODED_INST_LEN(x)
|
||||
# define DECODE_PRINTF(x)
|
||||
# define DECODE_PRINTF2(x,y)
|
||||
# define SAVE_IP_CS(x,y)
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define TRACE_REGS() \
|
||||
if (DEBUG_DISASSEMBLE()) { \
|
||||
x86emu_just_disassemble(); \
|
||||
goto EndOfTheInstructionProcedure; \
|
||||
} \
|
||||
if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs()
|
||||
#else
|
||||
# define TRACE_REGS()
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
|
||||
#else
|
||||
# define SINGLE_STEP()
|
||||
#endif
|
||||
|
||||
#define TRACE_AND_STEP() \
|
||||
TRACE_REGS(); \
|
||||
SINGLE_STEP()
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define START_OF_INSTR()
|
||||
# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
|
||||
# define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
|
||||
#else
|
||||
# define START_OF_INSTR()
|
||||
# define END_OF_INSTR()
|
||||
# define END_OF_INSTR_NO_TRACE()
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
# define CALL_TRACE(u,v,w,x,s) \
|
||||
if (DEBUG_TRACECALLREGS()) \
|
||||
x86emu_dump_regs(); \
|
||||
if (DEBUG_TRACECALL()) { \
|
||||
xprintf("%x", u); \
|
||||
xprintf(":%x", v); \
|
||||
xprintf(": CALL "); \
|
||||
xprintf("%x", s); \
|
||||
xprintf(" %x", w); \
|
||||
xprintf(":%x", x); \
|
||||
xprintf("%s", "\r\n"); \
|
||||
}
|
||||
|
||||
# define RETURN_TRACE(n,u,v) \
|
||||
if (DEBUG_TRACECALLREGS()) \
|
||||
x86emu_dump_regs(); \
|
||||
if (DEBUG_TRACECALL()) \
|
||||
{ \
|
||||
xprintf("%x", (unsigned long)u); \
|
||||
xprintf(":%x", (unsigned long)v); \
|
||||
xprintf(": CALL "); \
|
||||
xprintf("%x", n); \
|
||||
xprintf("\r\n"); \
|
||||
}
|
||||
#else
|
||||
# define CALL_TRACE(u,v,w,x,s)
|
||||
# define RETURN_TRACE(n,u,v)
|
||||
#endif
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define DB(x) x
|
||||
#else
|
||||
#define DB(x)
|
||||
#endif
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
extern void x86emu_inc_decoded_inst_len (int x);
|
||||
extern void x86emu_decode_printf (char *x);
|
||||
extern void x86emu_decode_printf2 (char *x, int y);
|
||||
extern void x86emu_just_disassemble (void);
|
||||
extern void x86emu_single_step (void);
|
||||
extern void x86emu_end_instr (void);
|
||||
extern void x86emu_dump_regs (void);
|
||||
extern void x86emu_dump_xregs (void);
|
||||
extern void x86emu_print_int_vect (uint16_t iv);
|
||||
extern void x86emu_instrument_instruction (void);
|
||||
extern void x86emu_check_ip_access (void);
|
||||
extern void x86emu_check_sp_access (void);
|
||||
extern void x86emu_check_mem_access (uint32_t p);
|
||||
extern void x86emu_check_data_access (unsigned int s, unsigned int o);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_DEBUG_H */
|
||||
@@ -1,89 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for instruction decoding logic.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_DECODE_H
|
||||
#define __X86EMU_DECODE_H
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
/* Instruction Decoding Stuff */
|
||||
|
||||
#define FETCH_DECODE_MODRM(mod,rh,rl) fetch_decode_modrm(&mod,&rh,&rl)
|
||||
#define DECODE_RM_BYTE_REGISTER(r) decode_rm_byte_register(r)
|
||||
#define DECODE_RM_WORD_REGISTER(r) decode_rm_word_register(r)
|
||||
#define DECODE_RM_LONG_REGISTER(r) decode_rm_long_register(r)
|
||||
#define DECODE_CLEAR_SEGOVR() M.x86.mode &= ~SYSMODE_CLRMASK
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
|
||||
#include "bas_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
void x86emu_intr_raise(uint8_t type);
|
||||
void fetch_decode_modrm(int *mod, int *regh, int *regl);
|
||||
uint8_t fetch_byte_imm(void);
|
||||
uint16_t fetch_word_imm(void);
|
||||
uint32_t fetch_long_imm(void);
|
||||
uint8_t fetch_data_byte(unsigned int offset);
|
||||
uint8_t fetch_data_byte_abs(unsigned int segment, unsigned int offset);
|
||||
uint16_t fetch_data_word(unsigned int offset);
|
||||
uint16_t fetch_data_word_abs(unsigned int segment, unsigned int offset);
|
||||
uint32_t fetch_data_long(unsigned int offset);
|
||||
uint32_t fetch_data_long_abs(unsigned int segment, unsigned int offset);
|
||||
void store_data_byte(unsigned int offset, uint8_t val);
|
||||
void store_data_byte_abs(unsigned int segment, unsigned int offset, uint8_t val);
|
||||
void store_data_word(unsigned int offset, uint16_t val);
|
||||
void store_data_word_abs(unsigned int segment, unsigned int offset, uint16_t val);
|
||||
void store_data_long(unsigned int offset, uint32_t val);
|
||||
void store_data_long_abs(unsigned int segment, unsigned int offset, uint32_t val);
|
||||
uint8_t *decode_rm_byte_register(int reg);
|
||||
uint16_t *decode_rm_word_register(int reg);
|
||||
uint32_t *decode_rm_long_register(int reg);
|
||||
uint16_t *decode_rm_seg_register(int reg);
|
||||
unsigned decode_rm00_address(int rm);
|
||||
unsigned decode_rm01_address(int rm);
|
||||
unsigned decode_rm10_address(int rm);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_DECODE_H */
|
||||
298
include/x86emu.h
298
include/x86emu.h
@@ -1,192 +1,158 @@
|
||||
/* $NetBSD: x86emu.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */
|
||||
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for public specific functions.
|
||||
* Any application linking against us should only
|
||||
* include this header
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/include/x86emu.h,v 1.2 2000/11/21 23:10:25 tsi Exp $ */
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
* Copyright (C) 2007 Joerg Sonnenberger
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_X86EMU_H
|
||||
#define __X86EMU_X86EMU_H
|
||||
|
||||
#include "bas_types.h"
|
||||
#define X86API
|
||||
#define X86APIP *
|
||||
#include "x86regs.h"
|
||||
#include "setjmp.h"
|
||||
|
||||
typedef uint16_t X86EMU_pioAddr;
|
||||
/*
|
||||
* General EAX, EBX, ECX, EDX type registers. Note that for
|
||||
* portability, and speed, the issue of byte swapping is not addressed
|
||||
* in the registers. All registers are stored in the default format
|
||||
* available on the host machine. The only critical issue is that the
|
||||
* registers should line up EXACTLY in the same manner as they do in
|
||||
* the 386. That is:
|
||||
*
|
||||
* EAX & 0xff === AL
|
||||
* EAX & 0xffff == AX
|
||||
*
|
||||
* etc. The result is that alot of the calculations can then be
|
||||
* done using the native instruction set fully.
|
||||
*/
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
//#pragma pack(1)
|
||||
struct X86EMU_register32 {
|
||||
uint32_t e_reg;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
REMARKS:
|
||||
Data structure containing ponters to programmed I/O functions used by the
|
||||
emulator. This is used so that the user program can hook all programmed
|
||||
I/O for the emulator to handled as necessary by the user program. By
|
||||
default the emulator contains simple functions that do not do access the
|
||||
hardware in any way. To allow the emualtor access the hardware, you will
|
||||
need to override the programmed I/O functions using the X86EMU_setupPioFuncs
|
||||
function.
|
||||
struct X86EMU_register16 {
|
||||
uint16_t filler0;
|
||||
uint16_t x_reg;
|
||||
};
|
||||
|
||||
HEADER:
|
||||
x86emu.h
|
||||
struct X86EMU_register8 {
|
||||
uint8_t filler0, filler1;
|
||||
uint8_t h_reg, l_reg;
|
||||
};
|
||||
|
||||
MEMBERS:
|
||||
inb - Function to read a byte from an I/O port
|
||||
inw - Function to read a word from an I/O port
|
||||
inl - Function to read a dword from an I/O port
|
||||
outb - Function to write a byte to an I/O port
|
||||
outw - Function to write a word to an I/O port
|
||||
outl - Function to write a dword to an I/O port
|
||||
****************************************************************************/
|
||||
typedef struct
|
||||
|
||||
union X86EMU_register {
|
||||
struct X86EMU_register32 I32_reg;
|
||||
struct X86EMU_register16 I16_reg;
|
||||
struct X86EMU_register8 I8_reg;
|
||||
};
|
||||
|
||||
struct X86EMU_regs {
|
||||
uint16_t register_cs;
|
||||
uint16_t register_ds;
|
||||
uint16_t register_es;
|
||||
uint16_t register_fs;
|
||||
uint16_t register_gs;
|
||||
uint16_t register_ss;
|
||||
uint32_t register_flags;
|
||||
union X86EMU_register register_a;
|
||||
union X86EMU_register register_b;
|
||||
union X86EMU_register register_c;
|
||||
union X86EMU_register register_d;
|
||||
|
||||
union X86EMU_register register_sp;
|
||||
union X86EMU_register register_bp;
|
||||
union X86EMU_register register_si;
|
||||
union X86EMU_register register_di;
|
||||
union X86EMU_register register_ip;
|
||||
|
||||
/*
|
||||
* MODE contains information on:
|
||||
* REPE prefix 2 bits repe,repne
|
||||
* SEGMENT overrides 5 bits normal,DS,SS,CS,ES
|
||||
* Delayed flag set 3 bits (zero, signed, parity)
|
||||
* reserved 6 bits
|
||||
* interrupt # 8 bits instruction raised interrupt
|
||||
* BIOS video segregs 4 bits
|
||||
* Interrupt Pending 1 bits
|
||||
* Extern interrupt 1 bits
|
||||
* Halted 1 bits
|
||||
*/
|
||||
uint32_t mode;
|
||||
volatile int intr; /* mask of pending interrupts */
|
||||
uint8_t intno;
|
||||
uint8_t __pad[3];
|
||||
};
|
||||
|
||||
struct X86EMU
|
||||
{
|
||||
uint8_t (X86APIP inb)(X86EMU_pioAddr addr);
|
||||
uint16_t (X86APIP inw)(X86EMU_pioAddr addr);
|
||||
uint32_t (X86APIP inl)(X86EMU_pioAddr addr);
|
||||
void (X86APIP outb)(X86EMU_pioAddr addr, uint8_t val);
|
||||
void (X86APIP outw)(X86EMU_pioAddr addr, uint16_t val);
|
||||
void (X86APIP outl)(X86EMU_pioAddr addr, uint32_t val);
|
||||
} X86EMU_pioFuncs;
|
||||
char *mem_base;
|
||||
size_t mem_size;
|
||||
void *sys_private;
|
||||
struct X86EMU_regs x86;
|
||||
|
||||
/****************************************************************************
|
||||
REMARKS:
|
||||
Data structure containing ponters to memory access functions used by the
|
||||
emulator. This is used so that the user program can hook all memory
|
||||
access functions as necessary for the emulator. By default the emulator
|
||||
contains simple functions that only access the internal memory of the
|
||||
emulator. If you need specialised functions to handle access to different
|
||||
types of memory (ie: hardware framebuffer accesses and BIOS memory access
|
||||
etc), you will need to override this using the X86EMU_setupMemFuncs
|
||||
function.
|
||||
jmp_buf exec_state;
|
||||
|
||||
HEADER:
|
||||
x86emu.h
|
||||
uint64_t cur_cycles;
|
||||
|
||||
MEMBERS:
|
||||
rdb - Function to read a byte from an address
|
||||
rdw - Function to read a word from an address
|
||||
rdl - Function to read a dword from an address
|
||||
wrb - Function to write a byte to an address
|
||||
wrw - Function to write a word to an address
|
||||
wrl - Function to write a dword to an address
|
||||
****************************************************************************/
|
||||
typedef struct {
|
||||
uint8_t (X86APIP rdb)(uint32_t addr);
|
||||
uint16_t (X86APIP rdw)(uint32_t addr);
|
||||
uint32_t (X86APIP rdl)(uint32_t addr);
|
||||
void (X86APIP wrb)(uint32_t addr, uint8_t val);
|
||||
void (X86APIP wrw)(uint32_t addr, uint16_t val);
|
||||
void (X86APIP wrl)(uint32_t addr, uint32_t val);
|
||||
} X86EMU_memFuncs;
|
||||
unsigned int cur_mod:2;
|
||||
unsigned int cur_rl:3;
|
||||
unsigned int cur_rh:3;
|
||||
uint32_t cur_offset;
|
||||
|
||||
/****************************************************************************
|
||||
Here are the default memory read and write
|
||||
function in case they are needed as fallbacks.
|
||||
***************************************************************************/
|
||||
extern uint8_t X86API rdb(uint32_t addr);
|
||||
extern uint16_t X86API rdw(uint32_t addr);
|
||||
extern uint32_t X86API rdl(uint32_t addr);
|
||||
extern void X86API wrb(uint32_t addr, uint8_t val);
|
||||
extern void X86API wrw(uint32_t addr, uint16_t val);
|
||||
extern void X86API wrl(uint32_t addr, uint32_t val);
|
||||
uint8_t (*emu_rdb)(struct X86EMU *, uint32_t addr);
|
||||
uint16_t (*emu_rdw)(struct X86EMU *, uint32_t addr);
|
||||
uint32_t (*emu_rdl)(struct X86EMU *, uint32_t addr);
|
||||
void (*emu_wrb)(struct X86EMU *, uint32_t addr,uint8_t val);
|
||||
void (*emu_wrw)(struct X86EMU *, uint32_t addr, uint16_t val);
|
||||
void (*emu_wrl)(struct X86EMU *, uint32_t addr, uint32_t val);
|
||||
|
||||
//#pragma pack()
|
||||
uint8_t (*emu_inb)(struct X86EMU *, uint16_t addr);
|
||||
uint16_t (*emu_inw)(struct X86EMU *, uint16_t addr);
|
||||
uint32_t (*emu_inl)(struct X86EMU *, uint16_t addr);
|
||||
void (*emu_outb)(struct X86EMU *, uint16_t addr, uint8_t val);
|
||||
void (*emu_outw)(struct X86EMU *, uint16_t addr, uint16_t val);
|
||||
void (*emu_outl)(struct X86EMU *, uint16_t addr, uint32_t val);
|
||||
|
||||
/*--------------------- type definitions -----------------------------------*/
|
||||
void (*_X86EMU_intrTab[256])(struct X86EMU *, int);
|
||||
};
|
||||
|
||||
typedef void (X86APIP X86EMU_intrFuncs)(int num);
|
||||
extern X86EMU_intrFuncs _X86EMU_intrTab[256];
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
void X86EMU_init_default(struct X86EMU *);
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
/* decode.c */
|
||||
|
||||
void X86EMU_setupMemFuncs(X86EMU_memFuncs *funcs);
|
||||
void X86EMU_setupPioFuncs(X86EMU_pioFuncs *funcs);
|
||||
void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
|
||||
void X86EMU_prepareForInt(int num);
|
||||
void X86EMU_exec(struct X86EMU *);
|
||||
void X86EMU_exec_call(struct X86EMU *, uint16_t, uint16_t);
|
||||
void X86EMU_exec_intr(struct X86EMU *, uint8_t);
|
||||
void X86EMU_halt_sys(struct X86EMU *);
|
||||
|
||||
/* decode.c */
|
||||
|
||||
void X86EMU_exec(void);
|
||||
void X86EMU_halt_sys(void);
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define HALT_SYS() \
|
||||
dbg("%s: halt_sys: file %s line %d\r\n", __FUNCTION__, __FILE__, __LINE__);\
|
||||
X86EMU_halt_sys();
|
||||
#else
|
||||
#define HALT_SYS() X86EMU_halt_sys()
|
||||
#endif
|
||||
|
||||
/* Debug options */
|
||||
|
||||
#define DEBUG_DECODE_F 0x000001 /* print decoded instruction */
|
||||
#define DEBUG_TRACE_F 0x000002 /* dump regs before/after execution */
|
||||
#define DEBUG_STEP_F 0x000004
|
||||
#define DEBUG_DISASSEMBLE_F 0x000008
|
||||
#define DEBUG_BREAK_F 0x000010
|
||||
#define DEBUG_SVC_F 0x000020
|
||||
#define DEBUG_FS_F 0x000080
|
||||
#define DEBUG_PROC_F 0x000100
|
||||
#define DEBUG_SYSINT_F 0x000200 /* bios system interrupts. */
|
||||
#define DEBUG_TRACECALL_F 0x000400
|
||||
#define DEBUG_INSTRUMENT_F 0x000800
|
||||
#define DEBUG_MEM_TRACE_F 0x001000
|
||||
#define DEBUG_IO_TRACE_F 0x002000
|
||||
#define DEBUG_TRACECALL_REGS_F 0x004000
|
||||
#define DEBUG_DECODE_NOPRINT_F 0x008000
|
||||
#define DEBUG_SAVE_IP_CS_F 0x010000
|
||||
#define DEBUG_SYS_F (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
|
||||
|
||||
void X86EMU_trace_regs(void);
|
||||
void X86EMU_trace_xregs(void);
|
||||
void X86EMU_dump_memory(uint16_t seg, uint16_t off, uint32_t amt);
|
||||
int X86EMU_trace_on(void);
|
||||
int X86EMU_trace_off(void);
|
||||
int X86EMU_set_debug(int debug);
|
||||
void X86EMU_setMemBase(void *base, unsigned long size);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_X86EMU_H */
|
||||
|
||||
169
include/x86emu_regs.h
Normal file
169
include/x86emu_regs.h
Normal file
@@ -0,0 +1,169 @@
|
||||
/* $NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */
|
||||
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
* Copyright (C) 2007 Joerg Sonnenberger
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_REGS_H
|
||||
#define __X86EMU_REGS_H
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
/* 8 bit registers */
|
||||
#define R_AH register_a.I8_reg.h_reg
|
||||
#define R_AL register_a.I8_reg.l_reg
|
||||
#define R_BH register_b.I8_reg.h_reg
|
||||
#define R_BL register_b.I8_reg.l_reg
|
||||
#define R_CH register_c.I8_reg.h_reg
|
||||
#define R_CL register_c.I8_reg.l_reg
|
||||
#define R_DH register_d.I8_reg.h_reg
|
||||
#define R_DL register_d.I8_reg.l_reg
|
||||
|
||||
/* 16 bit registers */
|
||||
#define R_AX register_a.I16_reg.x_reg
|
||||
#define R_BX register_b.I16_reg.x_reg
|
||||
#define R_CX register_c.I16_reg.x_reg
|
||||
#define R_DX register_d.I16_reg.x_reg
|
||||
|
||||
/* 32 bit extended registers */
|
||||
#define R_EAX register_a.I32_reg.e_reg
|
||||
#define R_EBX register_b.I32_reg.e_reg
|
||||
#define R_ECX register_c.I32_reg.e_reg
|
||||
#define R_EDX register_d.I32_reg.e_reg
|
||||
|
||||
/* special registers */
|
||||
#define R_SP register_sp.I16_reg.x_reg
|
||||
#define R_BP register_bp.I16_reg.x_reg
|
||||
#define R_SI register_si.I16_reg.x_reg
|
||||
#define R_DI register_di.I16_reg.x_reg
|
||||
#define R_IP register_ip.I16_reg.x_reg
|
||||
#define R_FLG register_flags
|
||||
|
||||
/* special registers */
|
||||
#define R_ESP register_sp.I32_reg.e_reg
|
||||
#define R_EBP register_bp.I32_reg.e_reg
|
||||
#define R_ESI register_si.I32_reg.e_reg
|
||||
#define R_EDI register_di.I32_reg.e_reg
|
||||
#define R_EIP register_ip.I32_reg.e_reg
|
||||
#define R_EFLG register_flags
|
||||
|
||||
/* segment registers */
|
||||
#define R_CS register_cs
|
||||
#define R_DS register_ds
|
||||
#define R_SS register_ss
|
||||
#define R_ES register_es
|
||||
#define R_FS register_fs
|
||||
#define R_GS register_gs
|
||||
|
||||
/* flag conditions */
|
||||
#define FB_CF 0x0001 /* CARRY flag */
|
||||
#define FB_PF 0x0004 /* PARITY flag */
|
||||
#define FB_AF 0x0010 /* AUX flag */
|
||||
#define FB_ZF 0x0040 /* ZERO flag */
|
||||
#define FB_SF 0x0080 /* SIGN flag */
|
||||
#define FB_TF 0x0100 /* TRAP flag */
|
||||
#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define FB_DF 0x0400 /* DIR flag */
|
||||
#define FB_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
/* 80286 and above always have bit#1 set */
|
||||
#define F_ALWAYS_ON (0x0002) /* flag bits always on */
|
||||
|
||||
/*
|
||||
* Define a mask for only those flag bits we will ever pass back
|
||||
* (via PUSHF)
|
||||
*/
|
||||
#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
|
||||
|
||||
/* following bits masked in to a 16bit quantity */
|
||||
|
||||
#define F_CF 0x0001 /* CARRY flag */
|
||||
#define F_PF 0x0004 /* PARITY flag */
|
||||
#define F_AF 0x0010 /* AUX flag */
|
||||
#define F_ZF 0x0040 /* ZERO flag */
|
||||
#define F_SF 0x0080 /* SIGN flag */
|
||||
#define F_TF 0x0100 /* TRAP flag */
|
||||
#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define F_DF 0x0400 /* DIR flag */
|
||||
#define F_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
#define SET_FLAG(flag) (emu->x86.R_FLG |= (flag))
|
||||
#define CLEAR_FLAG(flag) (emu->x86.R_FLG &= ~(flag))
|
||||
#define ACCESS_FLAG(flag) (emu->x86.R_FLG & (flag))
|
||||
#define CLEARALL_FLAG(m) (emu->x86.R_FLG = 0)
|
||||
|
||||
#define CONDITIONAL_SET_FLAG(COND,FLAG) \
|
||||
if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
|
||||
|
||||
#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
|
||||
#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
|
||||
#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
|
||||
|
||||
#define F_ALL_CALC 0xff0000 /* All have been calced */
|
||||
|
||||
/*
|
||||
* Emulator machine state.
|
||||
* Segment usage control.
|
||||
*/
|
||||
#define SYSMODE_SEG_DS_SS 0x00000001
|
||||
#define SYSMODE_SEGOVR_CS 0x00000002
|
||||
#define SYSMODE_SEGOVR_DS 0x00000004
|
||||
#define SYSMODE_SEGOVR_ES 0x00000008
|
||||
#define SYSMODE_SEGOVR_FS 0x00000010
|
||||
#define SYSMODE_SEGOVR_GS 0x00000020
|
||||
#define SYSMODE_SEGOVR_SS 0x00000040
|
||||
#define SYSMODE_PREFIX_REPE 0x00000080
|
||||
#define SYSMODE_PREFIX_REPNE 0x00000100
|
||||
#define SYSMODE_PREFIX_DATA 0x00000200
|
||||
#define SYSMODE_PREFIX_ADDR 0x00000400
|
||||
#define SYSMODE_INTR_PENDING 0x10000000
|
||||
#define SYSMODE_EXTRN_INTR 0x20000000
|
||||
#define SYSMODE_HALTED 0x40000000
|
||||
|
||||
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS)
|
||||
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS | \
|
||||
SYSMODE_PREFIX_DATA | \
|
||||
SYSMODE_PREFIX_ADDR)
|
||||
|
||||
#define INTR_SYNCH 0x1
|
||||
|
||||
#endif /* __X86EMU_REGS_H */
|
||||
@@ -1,99 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for system specific functions. These functions
|
||||
* are always compiled and linked in the OS depedent libraries,
|
||||
* and never in a binary portable driver.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/x86emui.h,v 1.4 2001/04/01 13:59:58 tsi Exp $ */
|
||||
|
||||
#ifndef __X86EMU_X86EMUI_H
|
||||
#define __X86EMU_X86EMUI_H
|
||||
|
||||
/*
|
||||
* If we are compiling in C++ mode, we can compile some functions as
|
||||
* inline to increase performance (however the code size increases quite
|
||||
* dramatically in this case).
|
||||
*/
|
||||
|
||||
#if defined(__cplusplus) && !defined(_NO_INLINE)
|
||||
#define _INLINE inline
|
||||
#else
|
||||
#define _INLINE static
|
||||
#endif
|
||||
|
||||
/* Get rid of unused parameters in C++ compilation mode */
|
||||
|
||||
#ifdef __cplusplus
|
||||
#define X86EMU_UNUSED(v)
|
||||
#else
|
||||
#define X86EMU_UNUSED(v) v
|
||||
#endif
|
||||
|
||||
#include "radeonfb.h"
|
||||
|
||||
#include "x86emu.h"
|
||||
#include "x86regs.h"
|
||||
#include "x86decode.h"
|
||||
#include "x86ops.h"
|
||||
#include "x86prim_ops.h"
|
||||
#include "x86fpu.h"
|
||||
|
||||
/*--------------------------- Inline Functions ----------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
extern uint8_t (X86APIP sys_rdb)(uint32_t addr);
|
||||
extern uint16_t (X86APIP sys_rdw)(uint32_t addr);
|
||||
extern uint32_t (X86APIP sys_rdl)(uint32_t addr);
|
||||
extern void (X86APIP sys_wrb)(uint32_t addr,uint8_t val);
|
||||
extern void (X86APIP sys_wrw)(uint32_t addr,uint16_t val);
|
||||
extern void (X86APIP sys_wrl)(uint32_t addr,uint32_t val);
|
||||
|
||||
extern uint8_t (X86APIP sys_inb)(X86EMU_pioAddr addr);
|
||||
extern uint16_t (X86APIP sys_inw)(X86EMU_pioAddr addr);
|
||||
extern uint32_t (X86APIP sys_inl)(X86EMU_pioAddr addr);
|
||||
extern void (X86APIP sys_outb)(X86EMU_pioAddr addr,uint8_t val);
|
||||
extern void (X86APIP sys_outw)(X86EMU_pioAddr addr,uint16_t val);
|
||||
extern void (X86APIP sys_outl)(X86EMU_pioAddr addr,uint32_t val);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_X86EMUI_H */
|
||||
@@ -1,61 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for FPU instruction decoding.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_FPU_H
|
||||
#define __X86EMU_FPU_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
/* these have to be defined, whether 8087 support compiled in or not. */
|
||||
|
||||
extern void x86emuOp_esc_coprocess_d8 (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_d9 (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_da (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_db (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_dc (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_dd (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_de (uint8_t op1);
|
||||
extern void x86emuOp_esc_coprocess_df (uint8_t op1);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_FPU_H */
|
||||
@@ -1,116 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for FPU register definitions.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_FPU_REGS_H
|
||||
#define __X86EMU_FPU_REGS_H
|
||||
|
||||
#ifdef X86_FPU_SUPPORT
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* Basic 8087 register can hold any of the following values: */
|
||||
|
||||
union x86_fpu_reg_u {
|
||||
s8 tenbytes[10];
|
||||
double dval;
|
||||
float fval;
|
||||
s16 sval;
|
||||
s32 lval;
|
||||
};
|
||||
|
||||
struct x86_fpu_reg {
|
||||
union x86_fpu_reg_u reg;
|
||||
char tag;
|
||||
};
|
||||
|
||||
/*
|
||||
* Since we are not going to worry about the problems of aliasing
|
||||
* registers, every time a register is modified, its result type is
|
||||
* set in the tag fields for that register. If some operation
|
||||
* attempts to access the type in a way inconsistent with its current
|
||||
* storage format, then we flag the operation. If common, we'll
|
||||
* attempt the conversion.
|
||||
*/
|
||||
|
||||
#define X86_FPU_VALID 0x80
|
||||
#define X86_FPU_REGTYP(r) ((r) & 0x7F)
|
||||
|
||||
#define X86_FPU_WORD 0x0
|
||||
#define X86_FPU_SHORT 0x1
|
||||
#define X86_FPU_LONG 0x2
|
||||
#define X86_FPU_FLOAT 0x3
|
||||
#define X86_FPU_DOUBLE 0x4
|
||||
#define X86_FPU_LDBL 0x5
|
||||
#define X86_FPU_BSD 0x6
|
||||
|
||||
#define X86_FPU_STKTOP 0
|
||||
|
||||
struct x86_fpu_registers
|
||||
{
|
||||
struct x86_fpu_reg x86_fpu_stack[8];
|
||||
int x86_fpu_flags;
|
||||
int x86_fpu_config; /* rounding modes, etc. */
|
||||
short x86_fpu_tos, x86_fpu_bos;
|
||||
};
|
||||
|
||||
#pragma pack()
|
||||
|
||||
/*
|
||||
* There are two versions of the following macro.
|
||||
*
|
||||
* One version is for opcode D9, for which there are more than 32
|
||||
* instructions encoded in the second byte of the opcode.
|
||||
*
|
||||
* The other version, deals with all the other 7 i87 opcodes, for
|
||||
* which there are only 32 strings needed to describe the
|
||||
* instructions.
|
||||
*/
|
||||
|
||||
#endif /* X86_FPU_SUPPORT */
|
||||
|
||||
#ifdef DBG_X86EMU
|
||||
#define DECODE_PRINTINSTR32(t, mod, rh, rl) \
|
||||
DECODE_PRINTF(t[(mod << 3) + (rh)]);
|
||||
#define DECODE_PRINTINSTR256(t, mod, rh, rl) \
|
||||
DECODE_PRINTF(t[(mod << 6) + (rh << 3) + (rl)]);
|
||||
#else
|
||||
#define DECODE_PRINTINSTR32(t,mod,rh,rl)
|
||||
#define DECODE_PRINTINSTR256(t,mod,rh,rl)
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_FPU_REGS_H */
|
||||
@@ -1,45 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for operand decoding functions.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_OPS_H
|
||||
#define __X86EMU_OPS_H
|
||||
|
||||
extern void (*x86emu_optab[0x100])(uint8_t op1);
|
||||
extern void (*x86emu_optab2[0x100])(uint8_t op2);
|
||||
|
||||
#endif /* __X86EMU_OPS_H */
|
||||
@@ -2,28 +2,50 @@
|
||||
#define PCI_BIOS_H
|
||||
|
||||
enum {
|
||||
PCI_BIOS_PRESENT = 0xB101,
|
||||
FIND_PCI_DEVICE = 0xB102,
|
||||
FIND_PCI_CLASS_CODE = 0xB103,
|
||||
PCI_BIOS_PRESENT = 0xB101,
|
||||
FIND_PCI_DEVICE = 0xB102,
|
||||
FIND_PCI_CLASS_CODE = 0xB103,
|
||||
GENERATE_SPECIAL_CYCLE = 0xB106,
|
||||
READ_CONFIG_BYTE = 0xB108,
|
||||
READ_CONFIG_WORD = 0xB109,
|
||||
READ_CONFIG_DWORD = 0xB10A,
|
||||
WRITE_CONFIG_BYTE = 0xB10B,
|
||||
WRITE_CONFIG_WORD = 0xB10C,
|
||||
WRITE_CONFIG_DWORD = 0xB10D,
|
||||
READ_CONFIG_BYTE = 0xB108,
|
||||
READ_CONFIG_WORD = 0xB109,
|
||||
READ_CONFIG_DWORD = 0xB10A,
|
||||
WRITE_CONFIG_BYTE = 0xB10B,
|
||||
WRITE_CONFIG_WORD = 0xB10C,
|
||||
WRITE_CONFIG_DWORD = 0xB10D,
|
||||
GET_IRQ_ROUTING_OPTIONS = 0xB10E,
|
||||
SET_PCI_IRQ = 0xB10F
|
||||
SET_PCI_IRQ = 0xB10F
|
||||
};
|
||||
|
||||
enum {
|
||||
SUCCESSFUL = 0x00,
|
||||
SUCCESSFUL = 0x00,
|
||||
FUNC_NOT_SUPPORTED = 0x81,
|
||||
BAD_VENDOR_ID = 0x83,
|
||||
DEVICE_NOT_FOUND = 0x86,
|
||||
BAD_REGISTER_NUMBER = 0x87,
|
||||
SET_FAILED = 0x88,
|
||||
SET_FAILED = 0x88,
|
||||
BUFFER_TOO_SMALL = 0x89
|
||||
};
|
||||
|
||||
extern int x86_pcibios_handler(struct X86EMU *emu);
|
||||
|
||||
|
||||
#define USE_SDRAM
|
||||
#define DIRECT_ACCESS
|
||||
|
||||
#define MEM_WB(where, what) emu->emu_wrb(emu, where, what)
|
||||
#define MEM_WW(where, what) emu->emu_wrw(emu, where, what)
|
||||
#define MEM_WL(where, what) emu->emu_wrl(emu, where, what)
|
||||
|
||||
#define MEM_RB(where) emu->emu_rdb(emu, where)
|
||||
#define MEM_RW(where) emu->emu_rdw(emu, where)
|
||||
#define MEM_RL(where) emu->emu_rdl(emu, where)
|
||||
|
||||
#define PCI_VGA_RAM_IMAGE_START 0xC0000
|
||||
#define PCI_RAM_IMAGE_START 0xD0000
|
||||
#define SYS_BIOS 0xF0000
|
||||
#define SIZE_EMU 0x100000
|
||||
#define BIOS_MEM 0x0UL
|
||||
|
||||
|
||||
#endif /* PCI_BIOS_H */
|
||||
|
||||
|
||||
@@ -1,971 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: Watcom C++ 10.6 or later
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Inline assembler versions of the primitive operand
|
||||
* functions for faster performance. At the moment this is
|
||||
* x86 inline assembler, but these functions could be replaced
|
||||
* with native inline assembler for each supported processor
|
||||
* platform.
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/prim_asm.h,v 1.3 2000/04/19 15:48:15 tsi Exp $ */
|
||||
|
||||
#ifndef __X86EMU_PRIM_ASM_H
|
||||
#define __X86EMU_PRIM_ASM_H
|
||||
|
||||
#ifdef __WATCOMC__
|
||||
|
||||
#ifndef VALIDATE
|
||||
#define __HAVE_INLINE_ASSEMBLER__
|
||||
#endif
|
||||
|
||||
u32 get_flags_asm(void);
|
||||
#pragma aux get_flags_asm = \
|
||||
"pushf" \
|
||||
"pop eax" \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u16 aaa_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux aaa_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aaa" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u16 aas_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux aas_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aas" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u16 aad_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux aad_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aad" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u16 aam_word_asm(u32 *flags,u8 d);
|
||||
#pragma aux aam_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"aam" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u8 adc_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux adc_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"adc al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 adc_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux adc_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"adc ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 adc_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux adc_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"adc eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 add_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux add_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"add al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 add_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux add_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"add ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 add_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux add_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"add eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 and_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux and_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"and al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 and_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux and_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"and ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 and_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux and_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"and eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 cmp_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux cmp_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"cmp al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 cmp_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux cmp_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"cmp ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 cmp_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux cmp_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"cmp eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 daa_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux daa_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"daa" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u8 das_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux das_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"das" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u8 dec_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux dec_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"dec al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 dec_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux dec_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"dec ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 dec_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux dec_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"dec eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 inc_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux inc_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"inc al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 inc_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux inc_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"inc ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 inc_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux inc_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"inc eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 or_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux or_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"or al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 or_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux or_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"or ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 or_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux or_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"or eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 neg_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux neg_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"neg al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 neg_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux neg_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"neg ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 neg_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux neg_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"neg eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 not_byte_asm(u32 *flags,u8 d);
|
||||
#pragma aux not_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"not al" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] \
|
||||
value [al] \
|
||||
modify exact [al];
|
||||
|
||||
u16 not_word_asm(u32 *flags,u16 d);
|
||||
#pragma aux not_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"not ax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] \
|
||||
value [ax] \
|
||||
modify exact [ax];
|
||||
|
||||
u32 not_long_asm(u32 *flags,u32 d);
|
||||
#pragma aux not_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"not eax" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] \
|
||||
value [eax] \
|
||||
modify exact [eax];
|
||||
|
||||
u8 rcl_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux rcl_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcl al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 rcl_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux rcl_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcl ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 rcl_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux rcl_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcl eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 rcr_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux rcr_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcr al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 rcr_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux rcr_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcr ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 rcr_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux rcr_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rcr eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 rol_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux rol_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rol al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 rol_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux rol_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rol ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 rol_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux rol_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"rol eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 ror_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux ror_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"ror al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 ror_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux ror_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"ror ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 ror_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux ror_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"ror eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 shl_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux shl_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shl al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 shl_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux shl_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shl ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 shl_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux shl_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shl eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 shr_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux shr_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shr al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 shr_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux shr_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shr ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 shr_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux shr_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shr eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u8 sar_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux sar_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sar al,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [cl] \
|
||||
value [al] \
|
||||
modify exact [al cl];
|
||||
|
||||
u16 sar_word_asm(u32 *flags,u16 d, u8 s);
|
||||
#pragma aux sar_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sar ax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax cl];
|
||||
|
||||
u32 sar_long_asm(u32 *flags,u32 d, u8 s);
|
||||
#pragma aux sar_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sar eax,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax cl];
|
||||
|
||||
u16 shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
|
||||
#pragma aux shld_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shld ax,dx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [dx] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax dx cl];
|
||||
|
||||
u32 shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
|
||||
#pragma aux shld_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shld eax,edx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [edx] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax edx cl];
|
||||
|
||||
u16 shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
|
||||
#pragma aux shrd_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shrd ax,dx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [dx] [cl] \
|
||||
value [ax] \
|
||||
modify exact [ax dx cl];
|
||||
|
||||
u32 shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
|
||||
#pragma aux shrd_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"shrd eax,edx,cl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [edx] [cl] \
|
||||
value [eax] \
|
||||
modify exact [eax edx cl];
|
||||
|
||||
u8 sbb_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux sbb_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sbb al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 sbb_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux sbb_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sbb ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 sbb_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux sbb_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sbb eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 sub_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux sub_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sub al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 sub_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux sub_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sub ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 sub_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux sub_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"sub eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
void test_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux test_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"test al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
modify exact [al bl];
|
||||
|
||||
void test_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux test_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"test ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
modify exact [ax bx];
|
||||
|
||||
void test_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux test_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"test eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
u8 xor_byte_asm(u32 *flags,u8 d, u8 s);
|
||||
#pragma aux xor_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"xor al,bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [al] [bl] \
|
||||
value [al] \
|
||||
modify exact [al bl];
|
||||
|
||||
u16 xor_word_asm(u32 *flags,u16 d, u16 s);
|
||||
#pragma aux xor_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"xor ax,bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [ax] [bx] \
|
||||
value [ax] \
|
||||
modify exact [ax bx];
|
||||
|
||||
u32 xor_long_asm(u32 *flags,u32 d, u32 s);
|
||||
#pragma aux xor_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"xor eax,ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
parm [edi] [eax] [ebx] \
|
||||
value [eax] \
|
||||
modify exact [eax ebx];
|
||||
|
||||
void imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
|
||||
#pragma aux imul_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"imul bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
parm [edi] [esi] [al] [bl] \
|
||||
modify exact [esi ax bl];
|
||||
|
||||
void imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
|
||||
#pragma aux imul_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"imul bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [bx]\
|
||||
modify exact [esi edi ax bx dx];
|
||||
|
||||
void imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
|
||||
#pragma aux imul_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"imul ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [ebx] \
|
||||
modify exact [esi edi eax ebx edx];
|
||||
|
||||
void mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
|
||||
#pragma aux mul_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"mul bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
parm [edi] [esi] [al] [bl] \
|
||||
modify exact [esi ax bl];
|
||||
|
||||
void mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
|
||||
#pragma aux mul_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"mul bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [bx]\
|
||||
modify exact [esi edi ax bx dx];
|
||||
|
||||
void mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
|
||||
#pragma aux mul_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"mul ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [ebx] \
|
||||
modify exact [esi edi eax ebx edx];
|
||||
|
||||
void idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
|
||||
#pragma aux idiv_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"idiv bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],al" \
|
||||
"mov [ecx],ah" \
|
||||
parm [edi] [esi] [ecx] [ax] [bl]\
|
||||
modify exact [esi edi ax bl];
|
||||
|
||||
void idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
|
||||
#pragma aux idiv_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"idiv bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [dx] [bx]\
|
||||
modify exact [esi edi ax dx bx];
|
||||
|
||||
void idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
|
||||
#pragma aux idiv_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"idiv ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
|
||||
modify exact [esi edi eax edx ebx];
|
||||
|
||||
void div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
|
||||
#pragma aux div_byte_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"div bl" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],al" \
|
||||
"mov [ecx],ah" \
|
||||
parm [edi] [esi] [ecx] [ax] [bl]\
|
||||
modify exact [esi edi ax bl];
|
||||
|
||||
void div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
|
||||
#pragma aux div_word_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"div bx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],ax" \
|
||||
"mov [ecx],dx" \
|
||||
parm [edi] [esi] [ecx] [ax] [dx] [bx]\
|
||||
modify exact [esi edi ax dx bx];
|
||||
|
||||
void div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
|
||||
#pragma aux div_long_asm = \
|
||||
"push [edi]" \
|
||||
"popf" \
|
||||
"div ebx" \
|
||||
"pushf" \
|
||||
"pop [edi]" \
|
||||
"mov [esi],eax" \
|
||||
"mov [ecx],edx" \
|
||||
parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
|
||||
modify exact [esi edi eax edx ebx];
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_PRIM_ASM_H */
|
||||
@@ -1,232 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for primitive operation functions.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __X86EMU_PRIM_OPS_H
|
||||
#define __X86EMU_PRIM_OPS_H
|
||||
|
||||
#include "x86prim_asm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
uint16_t aaa_word (uint16_t d);
|
||||
uint16_t aas_word (uint16_t d);
|
||||
uint16_t aad_word (uint16_t d);
|
||||
uint16_t aam_word (uint8_t d);
|
||||
uint8_t adc_byte (uint8_t d, uint8_t s);
|
||||
uint16_t adc_word (uint16_t d, uint16_t s);
|
||||
uint32_t adc_long (uint32_t d, uint32_t s);
|
||||
uint8_t add_byte (uint8_t d, uint8_t s);
|
||||
uint16_t add_word (uint16_t d, uint16_t s);
|
||||
uint32_t add_long (uint32_t d, uint32_t s);
|
||||
uint8_t and_byte (uint8_t d, uint8_t s);
|
||||
uint16_t and_word (uint16_t d, uint16_t s);
|
||||
uint32_t and_long (uint32_t d, uint32_t s);
|
||||
uint8_t cmp_byte (uint8_t d, uint8_t s);
|
||||
uint16_t cmp_word (uint16_t d, uint16_t s);
|
||||
uint32_t cmp_long (uint32_t d, uint32_t s);
|
||||
uint8_t daa_byte (uint8_t d);
|
||||
uint8_t das_byte (uint8_t d);
|
||||
uint8_t dec_byte (uint8_t d);
|
||||
uint16_t dec_word (uint16_t d);
|
||||
uint32_t dec_long (uint32_t d);
|
||||
uint8_t inc_byte (uint8_t d);
|
||||
uint16_t inc_word (uint16_t d);
|
||||
uint32_t inc_long (uint32_t d);
|
||||
uint8_t or_byte (uint8_t d, uint8_t s);
|
||||
uint16_t or_word (uint16_t d, uint16_t s);
|
||||
uint32_t or_long (uint32_t d, uint32_t s);
|
||||
uint8_t neg_byte (uint8_t s);
|
||||
uint16_t neg_word (uint16_t s);
|
||||
uint32_t neg_long (uint32_t s);
|
||||
uint8_t not_byte (uint8_t s);
|
||||
uint16_t not_word (uint16_t s);
|
||||
uint32_t not_long (uint32_t s);
|
||||
uint8_t rcl_byte (uint8_t d, uint8_t s);
|
||||
uint16_t rcl_word (uint16_t d, uint8_t s);
|
||||
uint32_t rcl_long (uint32_t d, uint8_t s);
|
||||
uint8_t rcr_byte (uint8_t d, uint8_t s);
|
||||
uint16_t rcr_word (uint16_t d, uint8_t s);
|
||||
uint32_t rcr_long (uint32_t d, uint8_t s);
|
||||
uint8_t rol_byte (uint8_t d, uint8_t s);
|
||||
uint16_t rol_word (uint16_t d, uint8_t s);
|
||||
uint32_t rol_long (uint32_t d, uint8_t s);
|
||||
uint8_t ror_byte (uint8_t d, uint8_t s);
|
||||
uint16_t ror_word (uint16_t d, uint8_t s);
|
||||
uint32_t ror_long (uint32_t d, uint8_t s);
|
||||
uint8_t shl_byte (uint8_t d, uint8_t s);
|
||||
uint16_t shl_word (uint16_t d, uint8_t s);
|
||||
uint32_t shl_long (uint32_t d, uint8_t s);
|
||||
uint8_t shr_byte (uint8_t d, uint8_t s);
|
||||
uint16_t shr_word (uint16_t d, uint8_t s);
|
||||
uint32_t shr_long (uint32_t d, uint8_t s);
|
||||
uint8_t sar_byte (uint8_t d, uint8_t s);
|
||||
uint16_t sar_word (uint16_t d, uint8_t s);
|
||||
uint32_t sar_long (uint32_t d, uint8_t s);
|
||||
uint16_t shld_word (uint16_t d, uint16_t fill, uint8_t s);
|
||||
uint32_t shld_long (uint32_t d, uint32_t fill, uint8_t s);
|
||||
uint16_t shrd_word (uint16_t d, uint16_t fill, uint8_t s);
|
||||
uint32_t shrd_long (uint32_t d, uint32_t fill, uint8_t s);
|
||||
uint8_t sbb_byte (uint8_t d, uint8_t s);
|
||||
uint16_t sbb_word (uint16_t d, uint16_t s);
|
||||
uint32_t sbb_long (uint32_t d, uint32_t s);
|
||||
uint8_t sub_byte (uint8_t d, uint8_t s);
|
||||
uint16_t sub_word (uint16_t d, uint16_t s);
|
||||
uint32_t sub_long (uint32_t d, uint32_t s);
|
||||
void test_byte (uint8_t d, uint8_t s);
|
||||
void test_word (uint16_t d, uint16_t s);
|
||||
void test_long (uint32_t d, uint32_t s);
|
||||
uint8_t xor_byte (uint8_t d, uint8_t s);
|
||||
uint16_t xor_word (uint16_t d, uint16_t s);
|
||||
uint32_t xor_long (uint32_t d, uint32_t s);
|
||||
void imul_byte (uint8_t s);
|
||||
void imul_word (uint16_t s);
|
||||
void imul_long (uint32_t s);
|
||||
void imul_long_direct(uint32_t *res_lo, uint32_t* res_hi,uint32_t d, uint32_t s);
|
||||
void mul_byte (uint8_t s);
|
||||
void mul_word (uint16_t s);
|
||||
void mul_long (uint32_t s);
|
||||
void idiv_byte (uint8_t s);
|
||||
void idiv_word (uint16_t s);
|
||||
void idiv_long (uint32_t s);
|
||||
void div_byte (uint8_t s);
|
||||
void div_word (uint16_t s);
|
||||
void div_long (uint32_t s);
|
||||
void ins (int size);
|
||||
void outs (int size);
|
||||
uint16_t mem_access_word (int addr);
|
||||
void push_word (uint16_t w);
|
||||
void push_long (uint32_t w);
|
||||
uint16_t pop_word (void);
|
||||
uint32_t pop_long (void);
|
||||
|
||||
|
||||
#if defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM)
|
||||
|
||||
#define aaa_word(d) aaa_word_asm(&M.x86.R_EFLG,d)
|
||||
#define aas_word(d) aas_word_asm(&M.x86.R_EFLG,d)
|
||||
#define aad_word(d) aad_word_asm(&M.x86.R_EFLG,d)
|
||||
#define aam_word(d) aam_word_asm(&M.x86.R_EFLG,d)
|
||||
#define adc_byte(d,s) adc_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define adc_word(d,s) adc_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define adc_long(d,s) adc_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define add_byte(d,s) add_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define add_word(d,s) add_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define add_long(d,s) add_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define and_byte(d,s) and_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define and_word(d,s) and_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define and_long(d,s) and_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define cmp_byte(d,s) cmp_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define cmp_word(d,s) cmp_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define cmp_long(d,s) cmp_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define daa_byte(d) daa_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define das_byte(d) das_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define dec_byte(d) dec_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define dec_word(d) dec_word_asm(&M.x86.R_EFLG,d)
|
||||
#define dec_long(d) dec_long_asm(&M.x86.R_EFLG,d)
|
||||
#define inc_byte(d) inc_byte_asm(&M.x86.R_EFLG,d)
|
||||
#define inc_word(d) inc_word_asm(&M.x86.R_EFLG,d)
|
||||
#define inc_long(d) inc_long_asm(&M.x86.R_EFLG,d)
|
||||
#define or_byte(d,s) or_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define or_word(d,s) or_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define or_long(d,s) or_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define neg_byte(s) neg_byte_asm(&M.x86.R_EFLG,s)
|
||||
#define neg_word(s) neg_word_asm(&M.x86.R_EFLG,s)
|
||||
#define neg_long(s) neg_long_asm(&M.x86.R_EFLG,s)
|
||||
#define not_byte(s) not_byte_asm(&M.x86.R_EFLG,s)
|
||||
#define not_word(s) not_word_asm(&M.x86.R_EFLG,s)
|
||||
#define not_long(s) not_long_asm(&M.x86.R_EFLG,s)
|
||||
#define rcl_byte(d,s) rcl_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcl_word(d,s) rcl_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcl_long(d,s) rcl_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcr_byte(d,s) rcr_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcr_word(d,s) rcr_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rcr_long(d,s) rcr_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rol_byte(d,s) rol_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rol_word(d,s) rol_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define rol_long(d,s) rol_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define ror_byte(d,s) ror_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define ror_word(d,s) ror_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define ror_long(d,s) ror_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shl_byte(d,s) shl_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shl_word(d,s) shl_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shl_long(d,s) shl_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shr_byte(d,s) shr_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shr_word(d,s) shr_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shr_long(d,s) shr_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sar_byte(d,s) sar_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sar_word(d,s) sar_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sar_long(d,s) sar_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define shld_word(d,fill,s) shld_word_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define shld_long(d,fill,s) shld_long_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define shrd_word(d,fill,s) shrd_word_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define shrd_long(d,fill,s) shrd_long_asm(&M.x86.R_EFLG,d,fill,s)
|
||||
#define sbb_byte(d,s) sbb_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sbb_word(d,s) sbb_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sbb_long(d,s) sbb_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sub_byte(d,s) sub_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sub_word(d,s) sub_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define sub_long(d,s) sub_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define test_byte(d,s) test_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define test_word(d,s) test_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define test_long(d,s) test_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define xor_byte(d,s) xor_byte_asm(&M.x86.R_EFLG,d,s)
|
||||
#define xor_word(d,s) xor_word_asm(&M.x86.R_EFLG,d,s)
|
||||
#define xor_long(d,s) xor_long_asm(&M.x86.R_EFLG,d,s)
|
||||
#define imul_byte(s) imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
|
||||
#define imul_word(s) imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
|
||||
#define imul_long(s) imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
|
||||
#define imul_long_direct(res_lo,res_hi,d,s) imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s)
|
||||
#define mul_byte(s) mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
|
||||
#define mul_word(s) mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
|
||||
#define mul_long(s) mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
|
||||
#define idiv_byte(s) idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
|
||||
#define idiv_word(s) idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
|
||||
#define idiv_long(s) idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
|
||||
#define div_byte(s) div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
|
||||
#define div_word(s) div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
|
||||
#define div_long(s) div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_PRIM_OPS_H */
|
||||
@@ -1,358 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Realmode X86 Emulator Library
|
||||
*
|
||||
* Copyright (C) 1996-1999 SciTech Software, Inc.
|
||||
* Copyright (C) David Mosberger-Tang
|
||||
* Copyright (C) 1999 Egbert Eich
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Permission to use, copy, modify, distribute, and sell this software and
|
||||
* its documentation for any purpose is hereby granted without fee,
|
||||
* provided that the above copyright notice appear in all copies and that
|
||||
* both that copyright notice and this permission notice appear in
|
||||
* supporting documentation, and that the name of the authors not be used
|
||||
* in advertising or publicity pertaining to distribution of the software
|
||||
* without specific, written prior permission. The authors makes no
|
||||
* representations about the suitability of this software for any purpose.
|
||||
* It is provided "as is" without express or implied warranty.
|
||||
*
|
||||
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
|
||||
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
|
||||
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
|
||||
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
* PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* ========================================================================
|
||||
*
|
||||
* Language: ANSI C
|
||||
* Environment: Any
|
||||
* Developer: Kendall Bennett
|
||||
*
|
||||
* Description: Header file for x86 register definitions.
|
||||
*
|
||||
****************************************************************************/
|
||||
/* $XFree86: xc/extras/x86emu/include/x86emu/regs.h,v 1.3 2001/10/28 03:32:25 tsi Exp $ */
|
||||
|
||||
#ifndef __X86EMU_REGS_H
|
||||
#define __X86EMU_REGS_H
|
||||
#include "x86debug.h"
|
||||
|
||||
/*---------------------- Macros and type definitions ----------------------*/
|
||||
|
||||
//#pragma pack(1)
|
||||
|
||||
/*
|
||||
* General EAX, EBX, ECX, EDX type registers. Note that for
|
||||
* portability, and speed, the issue of byte swapping is not addressed
|
||||
* in the registers. All registers are stored in the default format
|
||||
* available on the host machine. The only critical issue is that the
|
||||
* registers should line up EXACTLY in the same manner as they do in
|
||||
* the 386. That is:
|
||||
*
|
||||
* EAX & 0xff === AL
|
||||
* EAX & 0xffff == AX
|
||||
*
|
||||
* etc. The result is that alot of the calculations can then be
|
||||
* done using the native instruction set fully.
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
uint32_t e_reg;
|
||||
} I32_reg_t;
|
||||
|
||||
typedef struct {
|
||||
uint16_t filler0, x_reg;
|
||||
} I16_reg_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t filler0, filler1, h_reg, l_reg;
|
||||
} I8_reg_t;
|
||||
|
||||
typedef union {
|
||||
I32_reg_t I32_reg;
|
||||
I16_reg_t I16_reg;
|
||||
I8_reg_t I8_reg;
|
||||
} i386_general_register;
|
||||
|
||||
struct i386_general_regs {
|
||||
i386_general_register A, B, C, D;
|
||||
};
|
||||
|
||||
typedef struct i386_general_regs Gen_reg_t;
|
||||
|
||||
struct i386_special_regs {
|
||||
i386_general_register SP, BP, SI, DI, IP;
|
||||
uint32_t FLAGS;
|
||||
};
|
||||
|
||||
/*
|
||||
* Segment registers here represent the 16 bit quantities
|
||||
* CS, DS, ES, SS.
|
||||
*/
|
||||
|
||||
struct i386_segment_regs {
|
||||
uint16_t CS, DS, SS, ES, FS, GS;
|
||||
};
|
||||
|
||||
/* 8 bit registers */
|
||||
#define R_AH gen.A.I8_reg.h_reg
|
||||
#define R_AL gen.A.I8_reg.l_reg
|
||||
#define R_BH gen.B.I8_reg.h_reg
|
||||
#define R_BL gen.B.I8_reg.l_reg
|
||||
#define R_CH gen.C.I8_reg.h_reg
|
||||
#define R_CL gen.C.I8_reg.l_reg
|
||||
#define R_DH gen.D.I8_reg.h_reg
|
||||
#define R_DL gen.D.I8_reg.l_reg
|
||||
|
||||
/* 16 bit registers */
|
||||
#define R_AX gen.A.I16_reg.x_reg
|
||||
#define R_BX gen.B.I16_reg.x_reg
|
||||
#define R_CX gen.C.I16_reg.x_reg
|
||||
#define R_DX gen.D.I16_reg.x_reg
|
||||
|
||||
/* 32 bit extended registers */
|
||||
#define R_EAX gen.A.I32_reg.e_reg
|
||||
#define R_EBX gen.B.I32_reg.e_reg
|
||||
#define R_ECX gen.C.I32_reg.e_reg
|
||||
#define R_EDX gen.D.I32_reg.e_reg
|
||||
|
||||
/* special registers */
|
||||
#define R_SP spc.SP.I16_reg.x_reg
|
||||
#define R_BP spc.BP.I16_reg.x_reg
|
||||
#define R_SI spc.SI.I16_reg.x_reg
|
||||
#define R_DI spc.DI.I16_reg.x_reg
|
||||
#define R_IP spc.IP.I16_reg.x_reg
|
||||
#define R_FLG spc.FLAGS
|
||||
|
||||
/* special registers */
|
||||
#define R_SP spc.SP.I16_reg.x_reg
|
||||
#define R_BP spc.BP.I16_reg.x_reg
|
||||
#define R_SI spc.SI.I16_reg.x_reg
|
||||
#define R_DI spc.DI.I16_reg.x_reg
|
||||
#define R_IP spc.IP.I16_reg.x_reg
|
||||
#define R_FLG spc.FLAGS
|
||||
|
||||
/* special registers */
|
||||
#define R_ESP spc.SP.I32_reg.e_reg
|
||||
#define R_EBP spc.BP.I32_reg.e_reg
|
||||
#define R_ESI spc.SI.I32_reg.e_reg
|
||||
#define R_EDI spc.DI.I32_reg.e_reg
|
||||
#define R_EIP spc.IP.I32_reg.e_reg
|
||||
#define R_EFLG spc.FLAGS
|
||||
|
||||
/* segment registers */
|
||||
#define R_CS seg.CS
|
||||
#define R_DS seg.DS
|
||||
#define R_SS seg.SS
|
||||
#define R_ES seg.ES
|
||||
#define R_FS seg.FS
|
||||
#define R_GS seg.GS
|
||||
|
||||
/* flag conditions */
|
||||
#define FB_CF 0x0001 /* CARRY flag */
|
||||
#define FB_PF 0x0004 /* PARITY flag */
|
||||
#define FB_AF 0x0010 /* AUX flag */
|
||||
#define FB_ZF 0x0040 /* ZERO flag */
|
||||
#define FB_SF 0x0080 /* SIGN flag */
|
||||
#define FB_TF 0x0100 /* TRAP flag */
|
||||
#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define FB_DF 0x0400 /* DIR flag */
|
||||
#define FB_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
/* 80286 and above always have bit#1 set */
|
||||
#define F_ALWAYS_ON (0x0002) /* flag bits always on */
|
||||
|
||||
/*
|
||||
* Define a mask for only those flag bits we will ever pass back
|
||||
* (via PUSHF)
|
||||
*/
|
||||
#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
|
||||
|
||||
/* following bits masked in to a 16bit quantity */
|
||||
|
||||
#define F_CF 0x0001 /* CARRY flag */
|
||||
#define F_PF 0x0004 /* PARITY flag */
|
||||
#define F_AF 0x0010 /* AUX flag */
|
||||
#define F_ZF 0x0040 /* ZERO flag */
|
||||
#define F_SF 0x0080 /* SIGN flag */
|
||||
#define F_TF 0x0100 /* TRAP flag */
|
||||
#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
|
||||
#define F_DF 0x0400 /* DIR flag */
|
||||
#define F_OF 0x0800 /* OVERFLOW flag */
|
||||
|
||||
#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
|
||||
#define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
|
||||
#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
|
||||
#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
|
||||
#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
|
||||
|
||||
#define CONDITIONAL_SET_FLAG(COND,FLAG) \
|
||||
if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
|
||||
|
||||
#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
|
||||
#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
|
||||
#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
|
||||
|
||||
#define F_ALL_CALC 0xff0000 /* All have been calced */
|
||||
|
||||
/*
|
||||
* Emulator machine state.
|
||||
* Segment usage control.
|
||||
*/
|
||||
#define SYSMODE_SEG_DS_SS 0x00000001
|
||||
#define SYSMODE_SEGOVR_CS 0x00000002
|
||||
#define SYSMODE_SEGOVR_DS 0x00000004
|
||||
#define SYSMODE_SEGOVR_ES 0x00000008
|
||||
#define SYSMODE_SEGOVR_FS 0x00000010
|
||||
#define SYSMODE_SEGOVR_GS 0x00000020
|
||||
#define SYSMODE_SEGOVR_SS 0x00000040
|
||||
#define SYSMODE_PREFIX_REPE 0x00000080
|
||||
#define SYSMODE_PREFIX_REPNE 0x00000100
|
||||
#define SYSMODE_PREFIX_DATA 0x00000200
|
||||
#define SYSMODE_PREFIX_ADDR 0x00000400
|
||||
#define SYSMODE_INTR_PENDING 0x10000000
|
||||
#define SYSMODE_EXTRN_INTR 0x20000000
|
||||
#define SYSMODE_HALTED 0x40000000
|
||||
|
||||
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS)
|
||||
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
|
||||
SYSMODE_SEGOVR_CS | \
|
||||
SYSMODE_SEGOVR_DS | \
|
||||
SYSMODE_SEGOVR_ES | \
|
||||
SYSMODE_SEGOVR_FS | \
|
||||
SYSMODE_SEGOVR_GS | \
|
||||
SYSMODE_SEGOVR_SS | \
|
||||
SYSMODE_PREFIX_DATA | \
|
||||
SYSMODE_PREFIX_ADDR)
|
||||
|
||||
#define INTR_SYNCH 0x1
|
||||
#define INTR_ASYNCH 0x2
|
||||
#define INTR_HALTED 0x4
|
||||
|
||||
typedef struct {
|
||||
struct i386_general_regs gen;
|
||||
struct i386_special_regs spc;
|
||||
struct i386_segment_regs seg;
|
||||
/*
|
||||
* MODE contains information on:
|
||||
* REPE prefix 2 bits repe,repne
|
||||
* SEGMENT overrides 5 bits normal,DS,SS,CS,ES
|
||||
* Delayed flag set 3 bits (zero, signed, parity)
|
||||
* reserved 6 bits
|
||||
* interrupt # 8 bits instruction raised interrupt
|
||||
* BIOS video segregs 4 bits
|
||||
* Interrupt Pending 1 bits
|
||||
* Extern interrupt 1 bits
|
||||
* Halted 1 bits
|
||||
*/
|
||||
uint32_t mode;
|
||||
volatile int intr; /* mask of pending interrupts */
|
||||
int debug;
|
||||
#ifdef DBG_X86EMU
|
||||
int check;
|
||||
uint16_t saved_ip;
|
||||
uint16_t saved_cs;
|
||||
int enc_pos;
|
||||
int enc_str_pos;
|
||||
// char decode_buf[32]; /* encoded byte stream */
|
||||
char decoded_buf[256]; /* disassembled strings */
|
||||
#endif
|
||||
uint8_t intno;
|
||||
uint8_t __pad[3];
|
||||
} X86EMU_regs;
|
||||
|
||||
/****************************************************************************
|
||||
REMARKS:
|
||||
Structure maintaining the emulator machine state.
|
||||
|
||||
MEMBERS:
|
||||
mem_base - Base real mode memory for the emulator
|
||||
abseg - Base for the absegment
|
||||
mem_size - Size of the real mode memory block for the emulator
|
||||
private - private data pointer
|
||||
x86 - X86 registers
|
||||
****************************************************************************/
|
||||
typedef struct
|
||||
{
|
||||
unsigned long mem_base;
|
||||
unsigned long mem_size;
|
||||
unsigned long abseg;
|
||||
void* private;
|
||||
X86EMU_regs x86;
|
||||
} X86EMU_sysEnv;
|
||||
|
||||
//#pragma pack()
|
||||
|
||||
/*----------------------------- Global Variables --------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" { /* Use "C" linkage when in C++ mode */
|
||||
#endif
|
||||
|
||||
/* Global emulator machine state.
|
||||
*
|
||||
* We keep it global to avoid pointer dereferences in the code for speed.
|
||||
*/
|
||||
|
||||
extern X86EMU_sysEnv _X86EMU_env;
|
||||
|
||||
#define M _X86EMU_env
|
||||
|
||||
#define X86_EAX M.x86.R_EAX
|
||||
#define X86_EBX M.x86.R_EBX
|
||||
#define X86_ECX M.x86.R_ECX
|
||||
#define X86_EDX M.x86.R_EDX
|
||||
#define X86_ESI M.x86.R_ESI
|
||||
#define X86_EDI M.x86.R_EDI
|
||||
#define X86_EBP M.x86.R_EBP
|
||||
#define X86_EIP M.x86.R_EIP
|
||||
#define X86_ESP M.x86.R_ESP
|
||||
#define X86_EFLAGS M.x86.R_EFLG
|
||||
|
||||
#define X86_FLAGS M.x86.R_FLG
|
||||
#define X86_AX M.x86.R_AX
|
||||
#define X86_BX M.x86.R_BX
|
||||
#define X86_CX M.x86.R_CX
|
||||
#define X86_DX M.x86.R_DX
|
||||
#define X86_SI M.x86.R_SI
|
||||
#define X86_DI M.x86.R_DI
|
||||
#define X86_BP M.x86.R_BP
|
||||
#define X86_IP M.x86.R_IP
|
||||
#define X86_SP M.x86.R_SP
|
||||
#define X86_CS M.x86.R_CS
|
||||
#define X86_DS M.x86.R_DS
|
||||
#define X86_ES M.x86.R_ES
|
||||
#define X86_SS M.x86.R_SS
|
||||
#define X86_FS M.x86.R_FS
|
||||
#define X86_GS M.x86.R_GS
|
||||
|
||||
#define X86_AL M.x86.R_AL
|
||||
#define X86_BL M.x86.R_BL
|
||||
#define X86_CL M.x86.R_CL
|
||||
#define X86_DL M.x86.R_DL
|
||||
|
||||
#define X86_AH M.x86.R_AH
|
||||
#define X86_BH M.x86.R_BH
|
||||
#define X86_CH M.x86.R_CH
|
||||
#define X86_DH M.x86.R_DH
|
||||
|
||||
|
||||
/*-------------------------- Function Prototypes --------------------------*/
|
||||
|
||||
/* Function to log information at runtime */
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* End of "C" linkage for C++ */
|
||||
#endif
|
||||
|
||||
#endif /* __X86EMU_REGS_H */
|
||||
@@ -85,7 +85,7 @@ typedef struct _BPB
|
||||
/* a riddle: how do you typedef a function pointer to a function that returns its own type? ;) */
|
||||
typedef void* (*xhdi_call_fun)(int xhdi_fun, ...);
|
||||
|
||||
extern unsigned long xhdi_call(uint16_t *stack);
|
||||
extern uint32_t xhdi_call(uint16_t *stack);
|
||||
|
||||
extern xhdi_call_fun xhdi_sd_install(xhdi_call_fun old_vector) __attribute__((__interrupt__));
|
||||
|
||||
|
||||
19
kbd/ikbd.c
19
kbd/ikbd.c
@@ -18,7 +18,7 @@
|
||||
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <bas_types.h>
|
||||
#include "bas_printf.h"
|
||||
#include "bas_string.h"
|
||||
|
||||
@@ -26,6 +26,8 @@
|
||||
//#include "hardware.h"
|
||||
#include "ikbd.h"
|
||||
|
||||
#include "debug.h"
|
||||
|
||||
// atari ikbd stuff
|
||||
#define IKBD_STATE_JOYSTICK_EVENT_REPORTING 0x01
|
||||
#define IKBD_STATE_MOUSE_Y_BOTTOM 0x02
|
||||
@@ -35,7 +37,7 @@
|
||||
|
||||
#define IKBD_DEFAULT IKBD_STATE_JOYSTICK_EVENT_REPORTING
|
||||
|
||||
#define QUEUE_LEN 16 // power of 2!
|
||||
#define QUEUE_LEN 16 // power of 2!
|
||||
static unsigned char tx_queue[QUEUE_LEN];
|
||||
static unsigned char wptr = 0, rptr = 0;
|
||||
|
||||
@@ -213,7 +215,18 @@ void ikbd_handle_input(unsigned char cmd)
|
||||
}
|
||||
}
|
||||
|
||||
void ikbd_poll(void) {
|
||||
/*
|
||||
* FIXME: temporarily provide function prototypes for unimplemented functions here to make compiler happy
|
||||
*/
|
||||
|
||||
extern int GetTimer(int);
|
||||
extern int CheckTimer(int);
|
||||
extern void EnableIO(void);
|
||||
extern void DisableIO(void);
|
||||
extern int SPI(int);
|
||||
|
||||
void ikbd_poll(void)
|
||||
{
|
||||
static int mtimer = 0;
|
||||
if (CheckTimer(mtimer))
|
||||
{
|
||||
|
||||
@@ -67,5 +67,5 @@ end
|
||||
|
||||
tr
|
||||
ib
|
||||
add-symbol-file ../emutos/emutos2.img 0xe00000
|
||||
load firebee/ram.elf
|
||||
#add-symbol-file ../emutos/emutos2.img 0xe00000
|
||||
#load firebee/ram.elf
|
||||
|
||||
8
memory_map.txt
Normal file
8
memory_map.txt
Normal file
@@ -0,0 +1,8 @@
|
||||
Firebee memory map
|
||||
==================
|
||||
|
||||
Virt. Start Virt. End Phys. Start Phys. End
|
||||
ST-RAM 0x00000000 0x00dfffff 0x60000000 0x60dfffff
|
||||
TOS 0x00e00000 0x00efffff 0x00e00000 0x00efffff
|
||||
ST I/O area 0x00f00000 0x01000000 0xfff00000 0xffffffff
|
||||
TT-RAM 0x01000000 0x20ffffff 0x00000000 0x1fffffff
|
||||
128
net/am79c874.c
128
net/am79c874.c
@@ -26,13 +26,13 @@
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_AM79 */
|
||||
|
||||
/********************************************************************/
|
||||
|
||||
/* Initialize the AM79C874 PHY
|
||||
*
|
||||
* This function sets up the Auto-Negotiate Advertisement register
|
||||
* within the PHY and then forces the PHY to auto-negotiate for
|
||||
* it's settings.
|
||||
*
|
||||
*
|
||||
* Params:
|
||||
* fec_ch FEC channel
|
||||
* phy_addr Address of the PHY.
|
||||
@@ -45,80 +45,80 @@
|
||||
*/
|
||||
int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex)
|
||||
{
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
if (speed); /* to do */
|
||||
if (duplex); /* to do */
|
||||
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
dbg("%s: PHY reset\r\n", __FUNCTION__);
|
||||
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_RESET))
|
||||
return 0;
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
if (speed); /* to do */
|
||||
if (duplex); /* to do */
|
||||
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_CR, &settings);
|
||||
if (!(settings & MII_AM79C874_CR_RESET))
|
||||
break;
|
||||
}
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
dbg("%s: PHY reset\r\n", __FUNCTION__);
|
||||
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: PHY reset failed\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
};
|
||||
dbg("%s: PHY reset OK\r\n", __FUNCTION__);
|
||||
dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_RESET))
|
||||
return 0;
|
||||
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_AUTON | MII_AM79C874_CR_RST_NEG))
|
||||
return 0;
|
||||
|
||||
dbg("%s:PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_CR, &settings);
|
||||
if (!(settings & MII_AM79C874_CR_RESET))
|
||||
break;
|
||||
}
|
||||
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
settings = 0;
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_SR, &settings);
|
||||
if ((settings & AUTONEGLINK) == AUTONEGLINK)
|
||||
break;
|
||||
}
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: PHY reset failed\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
};
|
||||
dbg("%s: PHY reset OK\r\n", __FUNCTION__);
|
||||
dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
|
||||
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: Auto-negotiation failed (timeout). Set default mode (100Mbps, full duplex)\r\n", __FUNCTION__);
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_AUTON | MII_AM79C874_CR_RST_NEG))
|
||||
return 0;
|
||||
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX))
|
||||
{
|
||||
dbg("%s: forced setting 100Mbps/full failed.\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
dbg("%s:PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
|
||||
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
settings = 0;
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_SR, &settings);
|
||||
if ((settings & AUTONEGLINK) == AUTONEGLINK)
|
||||
break;
|
||||
}
|
||||
|
||||
if (timeout >= FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("%s: Auto-negotiation failed (timeout). Set default mode (100Mbps, full duplex)\r\n", __FUNCTION__);
|
||||
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX))
|
||||
{
|
||||
dbg("%s: forced setting 100Mbps/full failed.\r\n", __FUNCTION__);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DBG_AM79
|
||||
settings = 0;
|
||||
settings = 0;
|
||||
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_DR, &settings);
|
||||
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_DR, &settings);
|
||||
|
||||
dbg("%s: PHY Mode:\r\n", __FUNCTION__);
|
||||
if (settings & MII_AM79C874_DR_DATA_RATE)
|
||||
dbg("%s: 100Mbps", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: 10Mbps ", __FUNCTION__);
|
||||
dbg("%s: PHY Mode:\r\n", __FUNCTION__);
|
||||
if (settings & MII_AM79C874_DR_DATA_RATE)
|
||||
dbg("%s: 100Mbps", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: 10Mbps ", __FUNCTION__);
|
||||
|
||||
if (settings & MII_AM79C874_DR_DPLX)
|
||||
dbg("%s: Full-duplex\r\n", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: Half-duplex\r\n", __FUNCTION__);
|
||||
if (settings & MII_AM79C874_DR_DPLX)
|
||||
dbg("%s: Full-duplex\r\n", __FUNCTION__);
|
||||
else
|
||||
dbg("%s: Half-duplex\r\n", __FUNCTION__);
|
||||
|
||||
dbg("%s:PHY auto-negotiation complete\r\n", __FUNCTION__);
|
||||
dbg("%s:PHY auto-negotiation complete\r\n", __FUNCTION__);
|
||||
#endif /* DBG_AM79 */
|
||||
|
||||
return 1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
776
net/arp.c
776
net/arp.c
@@ -13,7 +13,7 @@
|
||||
|
||||
//#define DBG_ARP
|
||||
#ifdef DBG_ARP
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
|
||||
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
|
||||
#else
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_ARP */
|
||||
@@ -22,459 +22,469 @@
|
||||
|
||||
static uint8_t *arp_find_pair(ARP_INFO *arptab, uint16_t protocol, uint8_t *hwa, uint8_t *pa)
|
||||
{
|
||||
/*
|
||||
* This function searches through the ARP table for the
|
||||
* specified <protocol,hwa> or <protocol,pa> address pair.
|
||||
* If it is found, then a a pointer to the non-specified
|
||||
* address is returned. Otherwise NULL is returned.
|
||||
* If you pass in <protocol,pa> then you get <hwa> out.
|
||||
* If you pass in <protocol,hwa> then you get <pa> out.
|
||||
*/
|
||||
int slot, i, match = false;
|
||||
uint8_t *rvalue;
|
||||
/*
|
||||
* This function searches through the ARP table for the
|
||||
* specified <protocol,hwa> or <protocol,pa> address pair.
|
||||
* If it is found, then a a pointer to the non-specified
|
||||
* address is returned. Otherwise NULL is returned.
|
||||
* If you pass in <protocol,pa> then you get <hwa> out.
|
||||
* If you pass in <protocol,hwa> then you get <pa> out.
|
||||
*/
|
||||
int slot, i, match = false;
|
||||
uint8_t *rvalue;
|
||||
|
||||
if (((hwa == 0) && (pa == 0)) || (arptab == 0))
|
||||
return NULL;
|
||||
if (((hwa == 0) && (pa == 0)) || (arptab == 0))
|
||||
return NULL;
|
||||
|
||||
rvalue = NULL;
|
||||
rvalue = NULL;
|
||||
|
||||
/*
|
||||
* Check each protocol address for a match
|
||||
*/
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
|
||||
(arptab->table[slot].protocol == protocol))
|
||||
{
|
||||
match = true;
|
||||
if (hwa != 0)
|
||||
{
|
||||
/*
|
||||
* Check the Hardware Address field
|
||||
*/
|
||||
rvalue = &arptab->table[slot].pa[0];
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].hwa[i] != hwa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/*
|
||||
* Check the Protocol Address field
|
||||
*/
|
||||
rvalue = &arptab->table[slot].hwa[0];
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].pa[i] != pa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (match)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Check each protocol address for a match
|
||||
*/
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
|
||||
(arptab->table[slot].protocol == protocol))
|
||||
{
|
||||
match = true;
|
||||
if (hwa != 0)
|
||||
{
|
||||
/*
|
||||
* Check the Hardware Address field
|
||||
*/
|
||||
rvalue = &arptab->table[slot].pa[0];
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].hwa[i] != hwa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/*
|
||||
* Check the Protocol Address field
|
||||
*/
|
||||
rvalue = &arptab->table[slot].hwa[0];
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].pa[i] != pa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (match)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (match)
|
||||
return rvalue;
|
||||
else
|
||||
return NULL;
|
||||
if (match)
|
||||
return rvalue;
|
||||
else
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void arp_merge(ARP_INFO *arptab, uint16_t protocol, int hwa_size, uint8_t *hwa,
|
||||
int pa_size, uint8_t *pa, int longevity)
|
||||
int pa_size, uint8_t *pa, int longevity)
|
||||
{
|
||||
/*
|
||||
* This function merges an entry into the ARP table. If
|
||||
* either piece is NULL, the function exits, otherwise
|
||||
* the entry is merged or added, provided there is space.
|
||||
*/
|
||||
int i, slot;
|
||||
uint8_t *ta;
|
||||
/*
|
||||
* This function merges an entry into the ARP table. If
|
||||
* either piece is NULL, the function exits, otherwise
|
||||
* the entry is merged or added, provided there is space.
|
||||
*/
|
||||
int i, slot;
|
||||
uint8_t *ta;
|
||||
|
||||
if ((hwa == NULL) || (pa == NULL) || (arptab == NULL) ||
|
||||
((longevity != ARP_ENTRY_TEMP) &&
|
||||
(longevity != ARP_ENTRY_PERM)))
|
||||
{
|
||||
return;
|
||||
}
|
||||
if ((hwa == NULL) || (pa == NULL) || (arptab == NULL) ||
|
||||
((longevity != ARP_ENTRY_TEMP) &&
|
||||
(longevity != ARP_ENTRY_PERM)))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/* First search ARP table for existing entry */
|
||||
if ((ta = arp_find_pair(arptab,protocol,NULL,pa)) != 0)
|
||||
{
|
||||
/* Update hardware address */
|
||||
for (i = 0; i < hwa_size; i++)
|
||||
ta[i] = hwa[i];
|
||||
return;
|
||||
}
|
||||
/* First search ARP table for existing entry */
|
||||
if ((ta = arp_find_pair(arptab,protocol,NULL,pa)) != 0)
|
||||
{
|
||||
/* Update hardware address */
|
||||
for (i = 0; i < hwa_size; i++)
|
||||
ta[i] = hwa[i];
|
||||
return;
|
||||
}
|
||||
|
||||
/* Next try to find an empty slot */
|
||||
slot = -1;
|
||||
for (i = 0; i < MAX_ARP_ENTRY; i++)
|
||||
{
|
||||
if (arptab->table[i].longevity == ARP_ENTRY_EMPTY)
|
||||
{
|
||||
slot = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* Next try to find an empty slot */
|
||||
slot = -1;
|
||||
for (i = 0; i < MAX_ARP_ENTRY; i++)
|
||||
{
|
||||
if (arptab->table[i].longevity == ARP_ENTRY_EMPTY)
|
||||
{
|
||||
slot = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* if no empty slot was found, pick a temp slot */
|
||||
if (slot == -1)
|
||||
{
|
||||
for (i = 0; i < MAX_ARP_ENTRY; i++)
|
||||
{
|
||||
if (arptab->table[i].longevity == ARP_ENTRY_TEMP)
|
||||
{
|
||||
slot = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
/* if no empty slot was found, pick a temp slot */
|
||||
if (slot == -1)
|
||||
{
|
||||
for (i = 0; i < MAX_ARP_ENTRY; i++)
|
||||
{
|
||||
if (arptab->table[i].longevity == ARP_ENTRY_TEMP)
|
||||
{
|
||||
slot = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* if after all this, still no slot found, add in last slot */
|
||||
if (slot == -1)
|
||||
slot = (MAX_ARP_ENTRY - 1);
|
||||
/* if after all this, still no slot found, add in last slot */
|
||||
if (slot == -1)
|
||||
slot = (MAX_ARP_ENTRY - 1);
|
||||
|
||||
/* add the entry into the slot */
|
||||
arptab->table[slot].protocol = protocol;
|
||||
/* add the entry into the slot */
|
||||
arptab->table[slot].protocol = protocol;
|
||||
|
||||
arptab->table[slot].hwa_size = (uint8_t) hwa_size;
|
||||
for (i = 0; i < hwa_size; i++)
|
||||
arptab->table[slot].hwa[i] = hwa[i];
|
||||
arptab->table[slot].hwa_size = (uint8_t) hwa_size;
|
||||
for (i = 0; i < hwa_size; i++)
|
||||
arptab->table[slot].hwa[i] = hwa[i];
|
||||
|
||||
arptab->table[slot].pa_size = (uint8_t) pa_size;
|
||||
for (i = 0; i < pa_size; i++)
|
||||
arptab->table[slot].pa[i] = pa[i];
|
||||
arptab->table[slot].pa_size = (uint8_t) pa_size;
|
||||
for (i = 0; i < pa_size; i++)
|
||||
arptab->table[slot].pa[i] = pa[i];
|
||||
|
||||
arptab->table[slot].longevity = longevity;
|
||||
arptab->table[slot].longevity = longevity;
|
||||
}
|
||||
|
||||
|
||||
void arp_remove(ARP_INFO *arptab, uint16_t protocol, uint8_t *hwa, uint8_t *pa)
|
||||
{
|
||||
/*
|
||||
* This function removes an entry from the ARP table. The
|
||||
* ARP table is searched according to the non-NULL address
|
||||
* that is provided.
|
||||
*/
|
||||
int slot, i, match;
|
||||
/*
|
||||
* This function removes an entry from the ARP table. The
|
||||
* ARP table is searched according to the non-NULL address
|
||||
* that is provided.
|
||||
*/
|
||||
int slot, i, match;
|
||||
|
||||
if (((hwa == 0) && (pa == 0)) || (arptab == 0))
|
||||
return;
|
||||
if (((hwa == 0) && (pa == 0)) || (arptab == 0))
|
||||
return;
|
||||
|
||||
/* check each hardware adress for a match */
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
|
||||
(arptab->table[slot].protocol == protocol))
|
||||
{
|
||||
match = true;
|
||||
if (hwa != 0)
|
||||
{
|
||||
/* Check Hardware Address field */
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].hwa[i] != hwa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check Protocol Address field */
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].pa[i] != pa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (match)
|
||||
{
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
arptab->table[slot].hwa[i] = 0;
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
arptab->table[slot].pa[i] = 0;
|
||||
arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
/* check each hardware adress for a match */
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) &&
|
||||
(arptab->table[slot].protocol == protocol))
|
||||
{
|
||||
match = true;
|
||||
if (hwa != 0)
|
||||
{
|
||||
/* Check Hardware Address field */
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].hwa[i] != hwa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check Protocol Address field */
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
{
|
||||
if (arptab->table[slot].pa[i] != pa[i])
|
||||
{
|
||||
match = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (match)
|
||||
{
|
||||
for (i = 0; i < arptab->table[slot].hwa_size; i++)
|
||||
arptab->table[slot].hwa[i] = 0;
|
||||
for (i = 0; i < arptab->table[slot].pa_size; i++)
|
||||
arptab->table[slot].pa[i] = 0;
|
||||
arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void arp_request(NIF *nif, uint8_t *pa)
|
||||
{
|
||||
/*
|
||||
* This function broadcasts an ARP request for the protocol
|
||||
* address "pa"
|
||||
*/
|
||||
uint8_t *addr;
|
||||
NBUF *pNbuf;
|
||||
arp_frame_hdr *arpframe;
|
||||
int i, result;
|
||||
/*
|
||||
* This function broadcasts an ARP request for the protocol
|
||||
* address "pa"
|
||||
*/
|
||||
uint8_t *addr;
|
||||
NBUF *pNbuf;
|
||||
arp_frame_hdr *arpframe;
|
||||
int i, result;
|
||||
|
||||
pNbuf = nbuf_alloc();
|
||||
if (pNbuf == NULL)
|
||||
{
|
||||
dbg("could not allocate Tx buffer\n");
|
||||
return;
|
||||
}
|
||||
|
||||
dbg("%s\r\n", __FUNCTION__);
|
||||
arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];
|
||||
|
||||
pNbuf = nbuf_alloc();
|
||||
if (pNbuf == NULL)
|
||||
{
|
||||
dbg("%s: arp_request couldn't allocate Tx buffer\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
/* Build the ARP request packet */
|
||||
arpframe->ar_hrd = ETHERNET;
|
||||
arpframe->ar_pro = ETH_FRM_IP;
|
||||
arpframe->ar_hln = 6;
|
||||
arpframe->ar_pln = 4;
|
||||
arpframe->opcode = ARP_REQUEST;
|
||||
|
||||
arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];
|
||||
addr = &nif->hwa[0];
|
||||
for (i = 0; i < 6; i++)
|
||||
arpframe->ar_sha[i] = addr[i];
|
||||
|
||||
/* Build the ARP request packet */
|
||||
arpframe->ar_hrd = ETHERNET;
|
||||
arpframe->ar_pro = ETH_FRM_IP;
|
||||
arpframe->ar_hln = 6;
|
||||
arpframe->ar_pln = 4;
|
||||
arpframe->opcode = ARP_REQUEST;
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
for (i = 0; i < 4; i++)
|
||||
arpframe->ar_spa[i] = addr[i];
|
||||
|
||||
addr = &nif->hwa[0];
|
||||
for (i = 0; i < 6; i++)
|
||||
arpframe->ar_sha[i] = addr[i];
|
||||
for (i = 0; i < 6; i++)
|
||||
arpframe->ar_tha[i] = 0x00;
|
||||
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
for (i = 0; i < 4; i++)
|
||||
arpframe->ar_spa[i] = addr[i];
|
||||
for (i = 0; i < 4; i++)
|
||||
arpframe->ar_tpa[i] = pa[i];
|
||||
|
||||
for (i = 0; i < 6; i++)
|
||||
arpframe->ar_tha[i] = 0x00;
|
||||
pNbuf->length = ARP_HDR_LEN;
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
arpframe->ar_tpa[i] = pa[i];
|
||||
/* Send the ARP request */
|
||||
dbg("sending ARP request\r\n");
|
||||
result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf);
|
||||
|
||||
pNbuf->length = ARP_HDR_LEN;
|
||||
|
||||
/* Send the ARP request */
|
||||
dbg("%s: sending ARP request\r\n", __FUNCTION__);
|
||||
result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf);
|
||||
|
||||
if (result == 0)
|
||||
nbuf_free(pNbuf);
|
||||
if (result == 0)
|
||||
nbuf_free(pNbuf);
|
||||
}
|
||||
|
||||
static int arp_resolve_pa(NIF *nif, uint16_t protocol, uint8_t *pa, uint8_t **ha)
|
||||
{
|
||||
/*
|
||||
* This function accepts a pointer to a protocol address and
|
||||
* searches the ARP table for a hardware address match. If no
|
||||
* no match found, false is returned.
|
||||
*/
|
||||
ARP_INFO *arptab;
|
||||
/*
|
||||
* This function accepts a pointer to a protocol address and
|
||||
* searches the ARP table for a hardware address match. If no
|
||||
* no match found, false is returned.
|
||||
*/
|
||||
ARP_INFO *arptab;
|
||||
|
||||
if ((pa == NULL) || (nif == NULL) || (protocol == 0))
|
||||
return 0;
|
||||
if ((pa == NULL) || (nif == NULL) || (protocol == 0))
|
||||
return 0;
|
||||
|
||||
arptab = nif_get_protocol_info (nif,ETH_FRM_ARP);
|
||||
*ha = arp_find_pair(arptab,protocol,0,pa);
|
||||
arptab = nif_get_protocol_info (nif,ETH_FRM_ARP);
|
||||
*ha = arp_find_pair(arptab,protocol,0,pa);
|
||||
|
||||
if (*ha == NULL)
|
||||
return 0;
|
||||
else
|
||||
return 1;
|
||||
if (*ha == NULL)
|
||||
return 0;
|
||||
else
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint8_t *arp_resolve(NIF *nif, uint16_t protocol, uint8_t *pa)
|
||||
{
|
||||
int i;
|
||||
uint8_t *hwa;
|
||||
int i;
|
||||
uint8_t *hwa;
|
||||
|
||||
/*
|
||||
* Check to see if the necessary MAC-to-IP translation information
|
||||
* is in table already
|
||||
*/
|
||||
if (arp_resolve_pa(nif, protocol, pa, &hwa))
|
||||
return hwa;
|
||||
/*
|
||||
* Check to see if the necessary MAC-to-IP translation information
|
||||
* is in table already
|
||||
*/
|
||||
if (arp_resolve_pa(nif, protocol, pa, &hwa))
|
||||
return hwa;
|
||||
|
||||
/*
|
||||
* Ok, it's not, so we need to try to obtain it by broadcasting
|
||||
* an ARP request. Hopefully the desired host is listening and
|
||||
* will respond with it's MAC address
|
||||
*/
|
||||
for (i = 0; i < 3; i++)
|
||||
{
|
||||
arp_request(nif, pa);
|
||||
/*
|
||||
* Ok, it's not, so we need to try to obtain it by broadcasting
|
||||
* an ARP request. Hopefully the desired host is listening and
|
||||
* will respond with it's MAC address
|
||||
*/
|
||||
for (i = 0; i < 3; i++)
|
||||
{
|
||||
arp_request(nif, pa);
|
||||
|
||||
timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT);
|
||||
while (timer_get_reference(TIMER_NETWORK))
|
||||
{
|
||||
dbg("%s: try to resolve %d.%d.%d.%d\r\n", __FUNCTION__,
|
||||
pa[0], pa[1], pa[2], pa[3], pa[4]);
|
||||
if (arp_resolve_pa(nif, protocol, pa, &hwa))
|
||||
{
|
||||
dbg("%s: resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n", __FUNCTION__,
|
||||
hwa[0], hwa[1], hwa[2], hwa[3], hwa[4], hwa[5], hwa[6]);
|
||||
|
||||
return hwa;
|
||||
}
|
||||
}
|
||||
}
|
||||
timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT);
|
||||
while (timer_get_reference(TIMER_NETWORK))
|
||||
{
|
||||
dbg("try to resolve %d.%d.%d.%d\r\n",
|
||||
pa[0], pa[1], pa[2], pa[3], pa[4]);
|
||||
if (arp_resolve_pa(nif, protocol, pa, &hwa))
|
||||
{
|
||||
dbg("resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n",
|
||||
hwa[0], hwa[1], hwa[2], hwa[3], hwa[4], hwa[5], hwa[6]);
|
||||
|
||||
return NULL;
|
||||
return hwa;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void arp_init(ARP_INFO *arptab)
|
||||
{
|
||||
int slot, i;
|
||||
int slot, i;
|
||||
|
||||
arptab->tab_size = MAX_ARP_ENTRY;
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
for (i = 0; i < MAX_HWA_SIZE; i++)
|
||||
arptab->table[slot].hwa[i] = 0;
|
||||
for (i = 0; i < MAX_PA_SIZE; i++)
|
||||
arptab->table[slot].pa[i] = 0;
|
||||
arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
|
||||
arptab->table[slot].hwa_size = 0;
|
||||
arptab->table[slot].pa_size = 0;
|
||||
}
|
||||
arptab->tab_size = MAX_ARP_ENTRY;
|
||||
for (slot = 0; slot < arptab->tab_size; slot++)
|
||||
{
|
||||
for (i = 0; i < MAX_HWA_SIZE; i++)
|
||||
arptab->table[slot].hwa[i] = 0;
|
||||
for (i = 0; i < MAX_PA_SIZE; i++)
|
||||
arptab->table[slot].pa[i] = 0;
|
||||
arptab->table[slot].longevity = ARP_ENTRY_EMPTY;
|
||||
arptab->table[slot].hwa_size = 0;
|
||||
arptab->table[slot].pa_size = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void arp_handler(NIF *nif, NBUF *pNbuf)
|
||||
{
|
||||
/*
|
||||
* ARP protocol handler
|
||||
*/
|
||||
uint8_t *addr;
|
||||
ARP_INFO *arptab;
|
||||
int longevity;
|
||||
arp_frame_hdr *rx_arpframe, *tx_arpframe;
|
||||
/*
|
||||
* ARP protocol handler
|
||||
*/
|
||||
uint8_t *addr;
|
||||
ARP_INFO *arptab;
|
||||
int longevity;
|
||||
arp_frame_hdr *rx_arpframe, *tx_arpframe;
|
||||
|
||||
arptab = nif_get_protocol_info(nif, ETH_FRM_ARP);
|
||||
rx_arpframe = (arp_frame_hdr *) &pNbuf->data[pNbuf->offset];
|
||||
arptab = nif_get_protocol_info(nif, ETH_FRM_ARP);
|
||||
rx_arpframe = (arp_frame_hdr *) &pNbuf->data[pNbuf->offset];
|
||||
|
||||
/*
|
||||
* Check for an appropriate ARP packet
|
||||
*/
|
||||
if ((pNbuf->length < ARP_HDR_LEN) ||
|
||||
(rx_arpframe->ar_hrd != ETHERNET) ||
|
||||
(rx_arpframe->ar_hln != 6) ||
|
||||
(rx_arpframe->ar_pro != ETH_FRM_IP) ||
|
||||
(rx_arpframe->ar_pln != 4))
|
||||
{
|
||||
nbuf_free(pNbuf);
|
||||
return;
|
||||
}
|
||||
/*
|
||||
* Check for an appropriate ARP packet
|
||||
*/
|
||||
if ((pNbuf->length < ARP_HDR_LEN) ||
|
||||
(rx_arpframe->ar_hrd != ETHERNET) ||
|
||||
(rx_arpframe->ar_hln != 6) ||
|
||||
(rx_arpframe->ar_pro != ETH_FRM_IP) ||
|
||||
(rx_arpframe->ar_pln != 4))
|
||||
{
|
||||
dbg("received packet is not an ARP packet, discard it\r\n");
|
||||
nbuf_free(pNbuf);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Check to see if it was addressed to me - if it was, keep this
|
||||
* ARP entry in the table permanently; if not, mark it so that it
|
||||
* can be displaced later if necessary
|
||||
*/
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
|
||||
(rx_arpframe->ar_tpa[1] == addr[1]) &&
|
||||
(rx_arpframe->ar_tpa[2] == addr[2]) &&
|
||||
(rx_arpframe->ar_tpa[3] == addr[3]) )
|
||||
{
|
||||
longevity = ARP_ENTRY_PERM;
|
||||
}
|
||||
else
|
||||
longevity = ARP_ENTRY_TEMP;
|
||||
/*
|
||||
* Check to see if it was addressed to me - if it was, keep this
|
||||
* ARP entry in the table permanently; if not, mark it so that it
|
||||
* can be displaced later if necessary
|
||||
*/
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
|
||||
(rx_arpframe->ar_tpa[1] == addr[1]) &&
|
||||
(rx_arpframe->ar_tpa[2] == addr[2]) &&
|
||||
(rx_arpframe->ar_tpa[3] == addr[3]) )
|
||||
{
|
||||
dbg("received ARP packet is a permanent one, store it\r\n");
|
||||
longevity = ARP_ENTRY_PERM;
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("received ARP packet was not addressed to us, keep only temporarily\r\n");
|
||||
longevity = ARP_ENTRY_TEMP;
|
||||
}
|
||||
|
||||
/*
|
||||
* Add ARP info into the table
|
||||
*/
|
||||
arp_merge(arptab,
|
||||
rx_arpframe->ar_pro,
|
||||
rx_arpframe->ar_hln,
|
||||
&rx_arpframe->ar_sha[0],
|
||||
rx_arpframe->ar_pln,
|
||||
&rx_arpframe->ar_spa[0],
|
||||
longevity
|
||||
);
|
||||
/*
|
||||
* Add ARP info into the table
|
||||
*/
|
||||
arp_merge(arptab,
|
||||
rx_arpframe->ar_pro,
|
||||
rx_arpframe->ar_hln,
|
||||
&rx_arpframe->ar_sha[0],
|
||||
rx_arpframe->ar_pln,
|
||||
&rx_arpframe->ar_spa[0],
|
||||
longevity
|
||||
);
|
||||
|
||||
switch (rx_arpframe->opcode)
|
||||
{
|
||||
case ARP_REQUEST:
|
||||
/*
|
||||
* Check to see if request is directed to me
|
||||
*/
|
||||
if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
|
||||
(rx_arpframe->ar_tpa[1] == addr[1]) &&
|
||||
(rx_arpframe->ar_tpa[2] == addr[2]) &&
|
||||
(rx_arpframe->ar_tpa[3] == addr[3]) )
|
||||
{
|
||||
/*
|
||||
* Reuse the current network buffer to assemble an ARP reply
|
||||
*/
|
||||
tx_arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];
|
||||
switch (rx_arpframe->opcode)
|
||||
{
|
||||
case ARP_REQUEST:
|
||||
/*
|
||||
* Check to see if request is directed to me
|
||||
*/
|
||||
if ((rx_arpframe->ar_tpa[0] == addr[0]) &&
|
||||
(rx_arpframe->ar_tpa[1] == addr[1]) &&
|
||||
(rx_arpframe->ar_tpa[2] == addr[2]) &&
|
||||
(rx_arpframe->ar_tpa[3] == addr[3]) )
|
||||
{
|
||||
dbg("received arp request directed to us, replying\r\n");
|
||||
/*
|
||||
* Reuse the current network buffer to assemble an ARP reply
|
||||
*/
|
||||
tx_arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET];
|
||||
|
||||
/*
|
||||
* Build new ARP frame from the received data
|
||||
*/
|
||||
tx_arpframe->ar_hrd = ETHERNET;
|
||||
tx_arpframe->ar_pro = ETH_FRM_IP;
|
||||
tx_arpframe->ar_hln = 6;
|
||||
tx_arpframe->ar_pln = 4;
|
||||
tx_arpframe->opcode = ARP_REPLY;
|
||||
tx_arpframe->ar_tha[0] = rx_arpframe->ar_sha[0];
|
||||
tx_arpframe->ar_tha[1] = rx_arpframe->ar_sha[1];
|
||||
tx_arpframe->ar_tha[2] = rx_arpframe->ar_sha[2];
|
||||
tx_arpframe->ar_tha[3] = rx_arpframe->ar_sha[3];
|
||||
tx_arpframe->ar_tha[4] = rx_arpframe->ar_sha[4];
|
||||
tx_arpframe->ar_tha[5] = rx_arpframe->ar_sha[5];
|
||||
tx_arpframe->ar_tpa[0] = rx_arpframe->ar_spa[0];
|
||||
tx_arpframe->ar_tpa[1] = rx_arpframe->ar_spa[1];
|
||||
tx_arpframe->ar_tpa[2] = rx_arpframe->ar_spa[2];
|
||||
tx_arpframe->ar_tpa[3] = rx_arpframe->ar_spa[3];
|
||||
/*
|
||||
* Build new ARP frame from the received data
|
||||
*/
|
||||
tx_arpframe->ar_hrd = ETHERNET;
|
||||
tx_arpframe->ar_pro = ETH_FRM_IP;
|
||||
tx_arpframe->ar_hln = 6;
|
||||
tx_arpframe->ar_pln = 4;
|
||||
tx_arpframe->opcode = ARP_REPLY;
|
||||
tx_arpframe->ar_tha[0] = rx_arpframe->ar_sha[0];
|
||||
tx_arpframe->ar_tha[1] = rx_arpframe->ar_sha[1];
|
||||
tx_arpframe->ar_tha[2] = rx_arpframe->ar_sha[2];
|
||||
tx_arpframe->ar_tha[3] = rx_arpframe->ar_sha[3];
|
||||
tx_arpframe->ar_tha[4] = rx_arpframe->ar_sha[4];
|
||||
tx_arpframe->ar_tha[5] = rx_arpframe->ar_sha[5];
|
||||
tx_arpframe->ar_tpa[0] = rx_arpframe->ar_spa[0];
|
||||
tx_arpframe->ar_tpa[1] = rx_arpframe->ar_spa[1];
|
||||
tx_arpframe->ar_tpa[2] = rx_arpframe->ar_spa[2];
|
||||
tx_arpframe->ar_tpa[3] = rx_arpframe->ar_spa[3];
|
||||
|
||||
/*
|
||||
* Now copy in the new information
|
||||
*/
|
||||
addr = &nif->hwa[0];
|
||||
tx_arpframe->ar_sha[0] = addr[0];
|
||||
tx_arpframe->ar_sha[1] = addr[1];
|
||||
tx_arpframe->ar_sha[2] = addr[2];
|
||||
tx_arpframe->ar_sha[3] = addr[3];
|
||||
tx_arpframe->ar_sha[4] = addr[4];
|
||||
tx_arpframe->ar_sha[5] = addr[5];
|
||||
/*
|
||||
* Now copy in the new information
|
||||
*/
|
||||
addr = &nif->hwa[0];
|
||||
tx_arpframe->ar_sha[0] = addr[0];
|
||||
tx_arpframe->ar_sha[1] = addr[1];
|
||||
tx_arpframe->ar_sha[2] = addr[2];
|
||||
tx_arpframe->ar_sha[3] = addr[3];
|
||||
tx_arpframe->ar_sha[4] = addr[4];
|
||||
tx_arpframe->ar_sha[5] = addr[5];
|
||||
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
tx_arpframe->ar_spa[0] = addr[0];
|
||||
tx_arpframe->ar_spa[1] = addr[1];
|
||||
tx_arpframe->ar_spa[2] = addr[2];
|
||||
tx_arpframe->ar_spa[3] = addr[3];
|
||||
addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP));
|
||||
tx_arpframe->ar_spa[0] = addr[0];
|
||||
tx_arpframe->ar_spa[1] = addr[1];
|
||||
tx_arpframe->ar_spa[2] = addr[2];
|
||||
tx_arpframe->ar_spa[3] = addr[3];
|
||||
|
||||
/*
|
||||
* Save the length of my packet in the buffer structure
|
||||
*/
|
||||
pNbuf->length = ARP_HDR_LEN;
|
||||
/*
|
||||
* Save the length of my packet in the buffer structure
|
||||
*/
|
||||
pNbuf->length = ARP_HDR_LEN;
|
||||
|
||||
nif->send(nif,
|
||||
&tx_arpframe->ar_tha[0],
|
||||
&tx_arpframe->ar_sha[0],
|
||||
ETH_FRM_ARP,
|
||||
pNbuf);
|
||||
}
|
||||
else
|
||||
nbuf_free(pNbuf);
|
||||
break;
|
||||
case ARP_REPLY:
|
||||
/*
|
||||
* The ARP Reply case is already taken care of
|
||||
*/
|
||||
default:
|
||||
nbuf_free(pNbuf);
|
||||
break;
|
||||
}
|
||||
nif->send(nif,
|
||||
&tx_arpframe->ar_tha[0],
|
||||
&tx_arpframe->ar_sha[0],
|
||||
ETH_FRM_ARP,
|
||||
pNbuf);
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("ARP request not addressed to us, discarding\r\n");
|
||||
nbuf_free(pNbuf);
|
||||
}
|
||||
break;
|
||||
|
||||
return;
|
||||
case ARP_REPLY:
|
||||
/*
|
||||
* The ARP Reply case is already taken care of
|
||||
*/
|
||||
|
||||
/* missing break is intentional */
|
||||
|
||||
default:
|
||||
nbuf_free(pNbuf);
|
||||
break;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
190
net/bcm5222.c
190
net/bcm5222.c
@@ -37,7 +37,7 @@
|
||||
* This function sets up the Auto-Negotiate Advertisement register
|
||||
* within the PHY and then forces the PHY to auto-negotiate for
|
||||
* it's settings.
|
||||
*
|
||||
*
|
||||
* Params:
|
||||
* fec_ch FEC channel
|
||||
* phy_addr Address of the PHY.
|
||||
@@ -50,133 +50,133 @@
|
||||
*/
|
||||
int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex)
|
||||
{
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
int timeout;
|
||||
uint16_t settings;
|
||||
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
/* Initialize the MII interface */
|
||||
fec_mii_init(fec_ch, SYSCLK / 1000);
|
||||
dbg("PHY reset\r\n");
|
||||
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, BCM5222_CTRL_RESET | BCM5222_CTRL_ANE))
|
||||
return 0;
|
||||
/* Reset the PHY */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, BCM5222_CTRL_RESET | BCM5222_CTRL_ANE))
|
||||
return 0;
|
||||
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, BCM5222_CTRL, &settings);
|
||||
if (!(settings & BCM5222_CTRL_RESET))
|
||||
break;
|
||||
}
|
||||
if(timeout >= FEC_MII_TIMEOUT)
|
||||
return 0;
|
||||
/* Wait for the PHY to reset */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
fec_mii_read(fec_ch, phy_addr, BCM5222_CTRL, &settings);
|
||||
if (!(settings & BCM5222_CTRL_RESET))
|
||||
break;
|
||||
}
|
||||
if(timeout >= FEC_MII_TIMEOUT)
|
||||
return 0;
|
||||
|
||||
dbg("PHY reset OK\r\n");
|
||||
|
||||
settings = (BCM5222_AN_ADV_NEXT_PAGE | BCM5222_AN_ADV_PAUSE);
|
||||
settings = (BCM5222_AN_ADV_NEXT_PAGE | BCM5222_AN_ADV_PAUSE);
|
||||
|
||||
if (speed == FEC_MII_10BASE_T)
|
||||
settings |= (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: BCM5222_AN_ADV_10BT);
|
||||
else /* (speed == FEC_MII_100BASE_TX) */
|
||||
settings = (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_100BTX_FDX | BCM5222_AN_ADV_100BTX
|
||||
| BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: (BCM5222_AN_ADV_100BTX | BCM5222_AN_ADV_10BT));
|
||||
if (speed == FEC_MII_10BASE_T)
|
||||
settings |= (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: BCM5222_AN_ADV_10BT);
|
||||
else /* (speed == FEC_MII_100BASE_TX) */
|
||||
settings = (uint16_t)((duplex == FEC_MII_FULL_DUPLEX)
|
||||
? (BCM5222_AN_ADV_100BTX_FDX | BCM5222_AN_ADV_100BTX
|
||||
| BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT)
|
||||
: (BCM5222_AN_ADV_100BTX | BCM5222_AN_ADV_10BT));
|
||||
|
||||
/* Set the Auto-Negotiation Advertisement Register */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_AN_ADV, settings))
|
||||
return 0;
|
||||
/* Set the Auto-Negotiation Advertisement Register */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_AN_ADV, settings))
|
||||
return 0;
|
||||
|
||||
dbg("PHY Enable Auto-Negotiation\r\n");
|
||||
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, (BCM5222_CTRL_ANE | BCM5222_CTRL_RESTART_AN)))
|
||||
return 0;
|
||||
/* Enable Auto-Negotiation */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, (BCM5222_CTRL_ANE | BCM5222_CTRL_RESTART_AN)))
|
||||
return 0;
|
||||
|
||||
dbg("PHY Wait for auto-negotiation to complete\r\n");
|
||||
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_STAT, &settings))
|
||||
return 0;
|
||||
if (settings & BCM5222_STAT_AN_COMPLETE)
|
||||
break;
|
||||
}
|
||||
/* Wait for auto-negotiation to complete */
|
||||
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
|
||||
{
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_STAT, &settings))
|
||||
return 0;
|
||||
if (settings & BCM5222_STAT_AN_COMPLETE)
|
||||
break;
|
||||
}
|
||||
|
||||
if (timeout < FEC_MII_TIMEOUT)
|
||||
{
|
||||
if (timeout < FEC_MII_TIMEOUT)
|
||||
{
|
||||
dbg("PHY auto-negociation complete\r\n");
|
||||
|
||||
/* Read Auxiliary Control/Status Register */
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_ACSR, &settings))
|
||||
return 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Read Auxiliary Control/Status Register */
|
||||
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_ACSR, &settings))
|
||||
return 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("auto negotiation failed, PHY Set the default mode\r\n");
|
||||
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_ACSR, settings = (BCM5222_ACSR_100BTX | BCM5222_ACSR_FDX)))
|
||||
return 0;
|
||||
}
|
||||
/* Set the default mode (Full duplex, 100 Mbps) */
|
||||
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_ACSR, settings = (BCM5222_ACSR_100BTX | BCM5222_ACSR_FDX)))
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Set the proper duplex in the FEC now that we have auto-negotiated */
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
fec_duplex(fec_ch, FEC_MII_FULL_DUPLEX);
|
||||
else
|
||||
fec_duplex(fec_ch, FEC_MII_HALF_DUPLEX);
|
||||
/* Set the proper duplex in the FEC now that we have auto-negotiated */
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
fec_duplex(fec_ch, FEC_MII_FULL_DUPLEX);
|
||||
else
|
||||
fec_duplex(fec_ch, FEC_MII_HALF_DUPLEX);
|
||||
|
||||
dbg("PHY Mode: ");
|
||||
|
||||
if (settings & BCM5222_ACSR_100BTX)
|
||||
if (settings & BCM5222_ACSR_100BTX)
|
||||
dbg("100Mbps\r\n");
|
||||
else
|
||||
else
|
||||
dbg("10Mbps\r\n");
|
||||
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
if (settings & BCM5222_ACSR_FDX)
|
||||
dbg("Full-duplex\r\n");
|
||||
else
|
||||
else
|
||||
dbg("Half-duplex\r\n");
|
||||
|
||||
return 1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
void bcm5222_get_reg(uint16_t* status0, uint16_t* status1)
|
||||
{
|
||||
fec_mii_read(0, 0x00, 0x00000000, &status0[0]);
|
||||
fec_mii_read(0, 0x00, 0x00000001, &status0[1]);
|
||||
fec_mii_read(0, 0x00, 0x00000004, &status0[4]);
|
||||
fec_mii_read(0, 0x00, 0x00000005, &status0[5]);
|
||||
fec_mii_read(0, 0x00, 0x00000006, &status0[6]);
|
||||
fec_mii_read(0, 0x00, 0x00000007, &status0[7]);
|
||||
fec_mii_read(0, 0x00, 0x00000008, &status0[8]);
|
||||
fec_mii_read(0, 0x00, 0x00000010, &status0[16]);
|
||||
fec_mii_read(0, 0x00, 0x00000011, &status0[17]);
|
||||
fec_mii_read(0, 0x00, 0x00000012, &status0[18]);
|
||||
fec_mii_read(0, 0x00, 0x00000013, &status0[19]);
|
||||
fec_mii_read(0, 0x00, 0x00000018, &status0[24]);
|
||||
fec_mii_read(0, 0x00, 0x00000019, &status0[25]);
|
||||
fec_mii_read(0, 0x00, 0x0000001B, &status0[27]);
|
||||
fec_mii_read(0, 0x00, 0x0000001C, &status0[28]);
|
||||
fec_mii_read(0, 0x00, 0x0000001E, &status0[30]);
|
||||
fec_mii_read(0, 0x01, 0x00000000, &status1[0]);
|
||||
fec_mii_read(0, 0x01, 0x00000001, &status1[1]);
|
||||
fec_mii_read(0, 0x01, 0x00000004, &status1[4]);
|
||||
fec_mii_read(0, 0x01, 0x00000005, &status1[5]);
|
||||
fec_mii_read(0, 0x01, 0x00000006, &status1[6]);
|
||||
fec_mii_read(0, 0x01, 0x00000007, &status1[7]);
|
||||
fec_mii_read(0, 0x01, 0x00000008, &status1[8]);
|
||||
fec_mii_read(0, 0x01, 0x00000010, &status1[16]);
|
||||
fec_mii_read(0, 0x01, 0x00000011, &status1[17]);
|
||||
fec_mii_read(0, 0x01, 0x00000012, &status1[18]);
|
||||
fec_mii_read(0, 0x01, 0x00000013, &status1[19]);
|
||||
fec_mii_read(0, 0x01, 0x00000018, &status1[24]);
|
||||
fec_mii_read(0, 0x01, 0x00000019, &status1[25]);
|
||||
fec_mii_read(0, 0x01, 0x0000001B, &status1[27]);
|
||||
fec_mii_read(0, 0x01, 0x0000001C, &status1[28]);
|
||||
fec_mii_read(0, 0x01, 0x0000001E, &status1[30]);
|
||||
fec_mii_read(0, 0x00, 0x00000000, &status0[0]);
|
||||
fec_mii_read(0, 0x00, 0x00000001, &status0[1]);
|
||||
fec_mii_read(0, 0x00, 0x00000004, &status0[4]);
|
||||
fec_mii_read(0, 0x00, 0x00000005, &status0[5]);
|
||||
fec_mii_read(0, 0x00, 0x00000006, &status0[6]);
|
||||
fec_mii_read(0, 0x00, 0x00000007, &status0[7]);
|
||||
fec_mii_read(0, 0x00, 0x00000008, &status0[8]);
|
||||
fec_mii_read(0, 0x00, 0x00000010, &status0[16]);
|
||||
fec_mii_read(0, 0x00, 0x00000011, &status0[17]);
|
||||
fec_mii_read(0, 0x00, 0x00000012, &status0[18]);
|
||||
fec_mii_read(0, 0x00, 0x00000013, &status0[19]);
|
||||
fec_mii_read(0, 0x00, 0x00000018, &status0[24]);
|
||||
fec_mii_read(0, 0x00, 0x00000019, &status0[25]);
|
||||
fec_mii_read(0, 0x00, 0x0000001B, &status0[27]);
|
||||
fec_mii_read(0, 0x00, 0x0000001C, &status0[28]);
|
||||
fec_mii_read(0, 0x00, 0x0000001E, &status0[30]);
|
||||
fec_mii_read(0, 0x01, 0x00000000, &status1[0]);
|
||||
fec_mii_read(0, 0x01, 0x00000001, &status1[1]);
|
||||
fec_mii_read(0, 0x01, 0x00000004, &status1[4]);
|
||||
fec_mii_read(0, 0x01, 0x00000005, &status1[5]);
|
||||
fec_mii_read(0, 0x01, 0x00000006, &status1[6]);
|
||||
fec_mii_read(0, 0x01, 0x00000007, &status1[7]);
|
||||
fec_mii_read(0, 0x01, 0x00000008, &status1[8]);
|
||||
fec_mii_read(0, 0x01, 0x00000010, &status1[16]);
|
||||
fec_mii_read(0, 0x01, 0x00000011, &status1[17]);
|
||||
fec_mii_read(0, 0x01, 0x00000012, &status1[18]);
|
||||
fec_mii_read(0, 0x01, 0x00000013, &status1[19]);
|
||||
fec_mii_read(0, 0x01, 0x00000018, &status1[24]);
|
||||
fec_mii_read(0, 0x01, 0x00000019, &status1[25]);
|
||||
fec_mii_read(0, 0x01, 0x0000001B, &status1[27]);
|
||||
fec_mii_read(0, 0x01, 0x0000001C, &status1[28]);
|
||||
fec_mii_read(0, 0x01, 0x0000001E, &status1[30]);
|
||||
}
|
||||
|
||||
|
||||
143
net/bootp.c
143
net/bootp.c
@@ -18,98 +18,101 @@
|
||||
#define dbg(format, arg...) do { ; } while (0)
|
||||
#endif /* DBG_BOOTP */
|
||||
|
||||
#define TIMER_NETWORK 3 /* defines GPT3 as timer for this function */
|
||||
#define TIMER_NETWORK 3 /* defines GPT3 as timer for this function */
|
||||
|
||||
static struct bootp_connection connection;
|
||||
#define XID 0x1234 /* this is arbitrary */
|
||||
#define MAX_TRIES 5 /* since UDP can fail */
|
||||
#define XID 0x1234 /* this is arbitrary */
|
||||
#define MAX_TRIES 5 /* since UDP can fail */
|
||||
|
||||
void bootp_request(NIF *nif, uint8_t *pa)
|
||||
{
|
||||
/*
|
||||
* This function broadcasts a BOOTP request for the protocol
|
||||
* address "pa"
|
||||
*/
|
||||
uint8_t *addr;
|
||||
IP_ADDR broadcast = {255, 255, 255, 255};
|
||||
NBUF *nbuf;
|
||||
struct bootp_packet *p;
|
||||
int i, result;
|
||||
/*
|
||||
* This function broadcasts a BOOTP request for the protocol
|
||||
* address "pa"
|
||||
*/
|
||||
uint8_t *addr;
|
||||
IP_ADDR broadcast = {255, 255, 255, 255};
|
||||
NBUF *nbuf;
|
||||
struct bootp_packet *p;
|
||||
int i, result;
|
||||
|
||||
nbuf = nbuf_alloc();
|
||||
if (nbuf == NULL)
|
||||
{
|
||||
xprintf("%s: couldn't allocate Tx buffer\r\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
nbuf = nbuf_alloc();
|
||||
if (nbuf == NULL)
|
||||
{
|
||||
xprintf("%s: couldn't allocate Tx buffer\r\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
|
||||
p = (struct bootp_packet *) &nbuf->data[BOOTP_HDR_OFFSET];
|
||||
p = (struct bootp_packet *) &nbuf->data[BOOTP_HDR_OFFSET];
|
||||
|
||||
/* Build the BOOTP request packet */
|
||||
p->type = BOOTP_TYPE_BOOTREQUEST;
|
||||
p->htype = BOOTP_HTYPE_ETHERNET;
|
||||
p->hlen = BOOTP_HLEN_ETHERNET;
|
||||
p->hops = 0;
|
||||
p->xid = XID;
|
||||
p->secs = 1;
|
||||
p->flags = BOOTP_FLAGS_BROADCAST;
|
||||
p->cl_addr = 0x0;
|
||||
p->yi_addr = 0x0;
|
||||
p->gi_addr = 0x0;
|
||||
/* Build the BOOTP request packet */
|
||||
p->type = BOOTP_TYPE_BOOTREQUEST;
|
||||
p->htype = BOOTP_HTYPE_ETHERNET;
|
||||
p->hlen = BOOTP_HLEN_ETHERNET;
|
||||
p->hops = 0;
|
||||
p->xid = XID;
|
||||
p->secs = 1;
|
||||
p->flags = BOOTP_FLAGS_BROADCAST;
|
||||
p->cl_addr = 0x0;
|
||||
p->yi_addr = 0x0;
|
||||
p->gi_addr = 0x0;
|
||||
|
||||
connection.nif = nif;
|
||||
addr = &nif->hwa[0];
|
||||
connection.nif = nif;
|
||||
addr = &nif->hwa[0];
|
||||
|
||||
for (i = 0; i < 6; i++)
|
||||
p->ch_addr[i] = addr[i];
|
||||
for (i = 0; i < 6; i++)
|
||||
p->ch_addr[i] = addr[i];
|
||||
|
||||
nbuf->length = BOOTP_PACKET_LEN;
|
||||
nbuf->length = BOOTP_PACKET_LEN;
|
||||
|
||||
/* setup reply handler */
|
||||
udp_bind_port(BOOTP_CLIENT_PORT, bootp_handler);
|
||||
/* setup reply handler */
|
||||
udp_bind_port(BOOTP_CLIENT_PORT, bootp_handler);
|
||||
|
||||
for (i = 0; i < MAX_TRIES; i++)
|
||||
{
|
||||
/* Send the BOOTP request */
|
||||
result = udp_send(connection.nif, broadcast, BOOTP_CLIENT_PORT,
|
||||
BOOTP_SERVER_PORT, nbuf);
|
||||
dbg("sent bootp request\r\n");
|
||||
if (result == true)
|
||||
break;
|
||||
}
|
||||
for (i = 0; i < MAX_TRIES; i++)
|
||||
{
|
||||
/* Send the BOOTP request */
|
||||
result = udp_send(connection.nif, broadcast, BOOTP_CLIENT_PORT,
|
||||
BOOTP_SERVER_PORT, nbuf);
|
||||
dbg("sent bootp request\r\n");
|
||||
if (result == true)
|
||||
break;
|
||||
}
|
||||
|
||||
/* release handler */
|
||||
udp_free_port(BOOTP_CLIENT_PORT);
|
||||
/* release handler */
|
||||
udp_free_port(BOOTP_CLIENT_PORT);
|
||||
|
||||
if (result == 0)
|
||||
nbuf_free(nbuf);
|
||||
if (result == 0)
|
||||
nbuf_free(nbuf);
|
||||
}
|
||||
|
||||
void bootp_handler(NIF *nif, NBUF *nbuf)
|
||||
{
|
||||
/*
|
||||
* BOOTP protocol handler
|
||||
*/
|
||||
uint8_t *addr;
|
||||
struct bootp_packet *rx_p;
|
||||
udp_frame_hdr *udpframe;
|
||||
/*
|
||||
* BOOTP protocol handler
|
||||
*/
|
||||
struct bootp_packet *rx_p;
|
||||
udp_frame_hdr *udpframe;
|
||||
|
||||
(void) udpframe; /* FIXME: just to avoid compiler warning */
|
||||
dbg("\r\n");
|
||||
|
||||
rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
|
||||
udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];
|
||||
rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
|
||||
udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];
|
||||
|
||||
/* check packet if it is valid and if it is really intended for us */
|
||||
/*
|
||||
* check packet if it is valid and if it is really intended for us
|
||||
*/
|
||||
|
||||
if (rx_p->type == BOOTP_TYPE_BOOTREPLY && rx_p->xid == XID)
|
||||
{
|
||||
dbg("received bootp reply\r\n");
|
||||
/* seems to be valid */
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
/* not valid */
|
||||
return;
|
||||
}
|
||||
if (rx_p->type == BOOTP_TYPE_BOOTREPLY && rx_p->xid == XID)
|
||||
{
|
||||
dbg("received bootp reply\r\n");
|
||||
/* seems to be valid */
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
dbg("received invalid bootp reply\r\n");
|
||||
/* not valid */
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user