Commit Graph

45 Commits

Author SHA1 Message Date
Markus Fröschle
d281dcf94e add more DDR clk signals to sdc 2016-01-11 17:05:39 +00:00
Markus Fröschle
17c41a655f translate interrupt_controller to vhd 2016-01-11 16:11:04 +00:00
Markus Fröschle
5b8820e371 replace video.bdf with video.vhd 2016-01-11 08:43:42 +00:00
Markus Fröschle
b7a6d78726 convert firebee1.bdf to vhdl 2016-01-11 08:18:06 +00:00
Markus Fröschle
d919644895 reformat 2016-01-11 07:13:36 +00:00
Markus Fröschle
af43584a42 modify settings 2016-01-10 19:05:15 +00:00
Markus Fröschle
0691977684 rename Video.bdf to lower case 2016-01-10 10:24:30 +00:00
Markus Fröschle
d954c5dc60 rename to make it usable as alternative in Quartus 2016-01-10 07:44:20 +00:00
Markus Fröschle
a5f1703404 remove delay chains 2016-01-09 21:36:02 +00:00
Markus Fröschle
582fcc5de5 rename video registers to their Falcon names 2016-01-09 18:49:18 +00:00
Markus Fröschle
fe7eb5cae7 fix ACP web address 2015-11-18 06:41:49 +00:00
Markus Fröschle
a021006b32 patch with Fredi's lp fix (and others) 2015-10-26 06:48:18 +00:00
Markus Fröschle
9e857c1f99 formatting 2015-10-18 19:33:25 +00:00
Markus Fröschle
25bee36d5e reformat 2015-10-18 19:27:57 +00:00
Markus Fröschle
47c793dae2 added another false path to fix timing 2015-10-18 01:02:05 +00:00
Markus Fröschle
dc98f061fd fix timing (set_false_path was missing) 2015-10-18 00:57:04 +00:00
Markus Fröschle
2fd6484413 changed component name to lower case 2015-10-17 16:10:06 +00:00
Markus Fröschle
fcbb96896f add missing project file 2015-10-17 10:58:27 +00:00
Markus Fröschle
3a58676b8b basically working config. Resolution changes still scramble the screen, however 2015-10-17 09:40:48 +00:00
Markus Fröschle
03a110f03b improved timing, added timing constraints, got rid of CLK_33M
Design compiles and runs, but still has issues with different screen resolutions and video clocks
2015-09-23 09:49:05 +00:00
Markus Fröschle
ca251a2cf1 cleanup 2015-09-21 05:32:56 +00:00
Markus Fröschle
79a27d2bd6 cleanup 2015-09-21 05:21:50 +00:00
Markus Fröschle
391065fc54 cleanup 2015-09-21 05:16:42 +00:00
Markus Fröschle
c430af0b7a removed absolute DOS path 2015-09-20 21:41:31 +00:00
Markus Fröschle
ceb376a0a1 reformatted 2015-09-20 20:14:42 +00:00
Markus Fröschle
32d08e5ac6 added derive_clock_uncertainty 2015-09-20 19:50:38 +00:00
Markus Fröschle
2db99fe6ee more false_path settings 2015-09-20 19:24:59 +00:00
Markus Fröschle
d01b0a5810 upgrade lpm components 2015-09-20 18:08:31 +00:00
Markus Fröschle
65b01bd377 reformatted, forced tighter timing
Config works, but screen is still scrambled
2015-09-20 17:13:10 +00:00
Markus Fröschle
967a41de02 add false paths to design constraints 2015-09-20 16:23:52 +00:00
Markus Fröschle
f16d3498c5 renamed components to lower case 2015-09-20 15:07:18 +00:00
Markus Fröschle
e3bf989be7 reformatted. 2015-09-20 14:54:16 +00:00
Markus Fröschle
a7bf118e2d get rid of CLK33M 2015-09-20 12:32:02 +00:00
Markus Fröschle
2addea7cf3 get rid of generated files 2015-09-20 12:24:45 +00:00
Markus Fröschle
0d21302258 reformatted 2015-09-20 08:23:00 +00:00
Markus Fröschle
57330487ab renamed many instances to more meaningful names 2015-09-20 08:06:12 +00:00
Markus Fröschle
ea60ec7f91 add TimeQuest Synopsis Design Constraint file 2015-09-20 07:01:21 +00:00
Markus Fröschle
560c701e87 get rid of more generated files 2015-09-20 07:00:34 +00:00
Markus Fröschle
88faa54c26 reordered files in project 2015-09-20 06:21:11 +00:00
Markus Fröschle
949c8122d6 remove absolute paths in project file 2015-09-20 05:52:52 +00:00
Markus Fröschle
52cb7eeeb5 get rid of more generated files 2015-09-20 05:49:54 +00:00
Markus Fröschle
33ef51fa56 get rid of generated files 2015-09-20 05:48:22 +00:00
Markus Fröschle
4fe94ea51a another try to make the old config work 2015-09-20 05:45:41 +00:00
David Gálvez
d2e1a3ccc7 Moved source_fa into trunk 2011-01-03 08:10:50 +00:00
aschi54
92c2ab95fc FPGA_quartus@11 2010-12-27 13:20:36 +00:00