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FPGA_Config
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479861c1c08d89289d2a7dbdec5afce021288347
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Markus Fröschle
479861c1c0
fix hold time violations in .sdc
2016-07-28 21:05:55 +00:00
FPGA_Quartus_13.1
fix hold time violations in .sdc
2016-07-28 21:05:55 +00:00
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10
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VHDL
83.4%
Verilog
13.1%
PHP
2.1%
Tcl
0.6%
Assembly
0.4%
Other
0.4%