222 lines
5.2 KiB
Plaintext
222 lines
5.2 KiB
Plaintext
# invoke by "source run376.gdb"
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echo Setting bdm\n
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file m.out
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target bdm /dev/bdm
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#target bdm /dev/icd_bdm0
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#target bdm /dev/pd_bdm0
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#===========================================================
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# sets chipselects and configuration
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define set_CS_BR
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#$arg0 = BA31-BA11
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#$arg1 = Offset From REGB
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set *(unsigned int*)($ptr_REGB+$arg1) = ((unsigned int)$arg0)+1
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#p /ox *(unsigned int*)($ptr_REGB+$arg1)
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end
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define set_CS_OR
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#$arg0 = AM27-AM11
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#$arg1 = Number Of Wait States
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#$arg2 = Sram Port Size
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#$arg3 = Offset From REGB
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set *(unsigned int*)($ptr_REGB+$arg3) = $arg0+(($arg1+1) << 28)+($arg2 << 1)
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#p /ox *(unsigned int*)($ptr_REGB+$arg3)
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end
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define bdm_hw_init
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echo bdm_hw_init ...\n
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set remotecache off
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bdm_timetocomeup 0
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bdm_autoreset off
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bdm_setdelay 70
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bdm_reset
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bdm_setdelay 0
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set $sfc=5
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set $dfc=5
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# system configuration
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# MBAR Module Base Address Register
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# 31 30 13 12 11 10 9 8 1 0
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# BA31 BA30 .... BA13 0 0 0 AS8 AS7 ... AS0 V
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# BA = BaseAddress
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# AS = Address Space = Maskovani adresniho prostoru
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# V = data valid
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# set *(unsigned int *)0x0003ff00=0
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set $sfc=7
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set $dfc=7
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set $ptr_MBAR = (unsigned int *)0x0003ff00
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set *$ptr_MBAR = 0x0ffffe001
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set $ptr_DPRBASE = (unsigned char *)0x0ffffe000
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set $ptr_REGB = $ptr_DPRBASE + 0x1000
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set $sfc=5
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set $dfc=5
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#diody
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set $ptr_PADIR = (unsigned short *)($ptr_REGB + 0x550)
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set *$ptr_PADIR = 0xf000
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set $ptr_PAPAR = (unsigned short *)($ptr_REGB + 0x552)
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set *$ptr_PAPAR = 0
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set $ptr_PAODR = (unsigned short *)($ptr_REGB + 0x554)
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set *$ptr_PAODR = 0xffff
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set $ptr_PADAT = (unsigned short *)($ptr_REGB + 0x556)
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set *$ptr_PADAT = 0xefff
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# MCR Module Configuration Register - urcuje, zda konfigurace SIM60 se muze cist/zapisovat kdykoli
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# 31 30 29 28 ... 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 0
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# BR040ID2-BR040ID0 - - BSTM ASTM FRZ1-FRZ0 BCLROID2-BCLOID0 SHEN1-SHEN0 SUPV BCLRISM2-BCLRISM0 IARB3-IARB0
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# nebo BCLRIID2-BCLRIID0
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# 0 0 0 - - 0 0 ? ?
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set *(unsigned int *)($ptr_REGB + 0x000) = 0x00006c7f
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#set *(unsigned int *)($ptr_REGB + 0x000) = 0x00006c71
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#PEPAR config
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set *(unsigned short*)($ptr_REGB + 0x16) = 0x0080
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#GMR
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set *(unsigned int *)($ptr_REGB + 0x40) = 0x00001100
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#SYPCR
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set *($ptr_REGB + 0x22) = 0x03
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#settings for chip selects
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#set_CS_BR BaseAddress OffsetFromREGB
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#set_CS_OR AddressMask NumberOfWaitStates(0-14) SramPortSize OffsetFromREGB
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#CS0 - BootFlash 1 MB - 16Bit
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set_CS_BR 0x0000000 0x50
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set_CS_OR 0xff00000 0 1 0x54
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#CS1 - Flash 2MB - 32Bit
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set_CS_BR 0x0200000 0x60
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set_CS_OR 0xfe00000 0 0 0x64
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#CS7 - SRAM 2 MB - 32Bit
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set_CS_BR 0x0400000 0xc0
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set_CS_OR 0xfe00000 0 0 0xc4
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#CS6 - USB Chip - 8Bit
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set_CS_BR 0x0800000 0xb0
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set_CS_OR 0xf800000 0 2 0xb4
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# CPU registers
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# SR=PS Status Register
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# 15 14 13 12 11 10 8 7 6 5 4 3 2 1 0
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# T1 T0 S 0 0 IP___ 0 0 0 X N Z V C
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# 0 0 1 0 0 1 1 1 0 0 0 U U U U U
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bdm_setdelay 1
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bdm_status
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end
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#===========================================================
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# sets well defined values into VBR
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define vbr_set_all
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set $vec_num=0
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set $vbr_val=(unsigned)$vbr
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while $vec_num<256
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set *(unsigned*)($vbr_val+$vec_num*4)=($vec_num*16)+0xf0000
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set $vec_num++
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end
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end
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# Test writability of RAM location
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define bdm_test_ram_acc
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echo testing ...
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p /x $arg0
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set $ram_addr=(unsigned int)$arg0
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set $old_ram_val=*(int*)$ram_addr
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set *(int*)$ram_addr=0x12345678
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if *(int*)$ram_addr!=0x12345678
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echo Error1\n
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end
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set *(char*)$ram_addr=0xab
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if *(int*)$ram_addr!=0xab345678
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echo Error2\n
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end
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set *(char*)($ram_addr+1)=0xcd
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if *(int*)$ram_addr!=0xabcd5678
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echo Error3\n
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end
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set *(char*)($ram_addr+3)=0x01
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if *(int*)$ram_addr!=0xabcd5601
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echo Error4\n
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end
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set *(char*)($ram_addr+2)=0xef
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if *(int*)$ram_addr!=0xabcdef01
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echo Error5\n
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end
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set *(int*)$ram_addr=$old_ram_val
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end
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# Read flash identification
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define bdm_read_flash_id
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set $flash_base=(int)$arg0&~0xffff
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output /x $flash_base
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echo \n
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set *(char*)($flash_base+0x555*2+1)=0xf0
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set *(char*)($flash_base+0x555*2+1)=0xaa
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set *(char*)($flash_base+0x2aa*2+1)=0x55
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set *(char*)($flash_base+0x555*2+1)=0x90
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p /x *(char*)($flash_base+0x00*2+1)
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set *(char*)($flash_base+0x555*2+1)=0xf0
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set *(char*)($flash_base+0x555*2+1)=0xaa
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set *(char*)($flash_base+0x2aa*2+1)=0x55
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set *(char*)($flash_base+0x555*2+1)=0x90
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p /x *(char*)($flash_base+0x01*2+1)
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end
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define bdm_read_flash1_id
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bdm_read_flash_id 0x800000
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end
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define bdm_read_flash2_id
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bdm_read_flash_id 0x900000
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end
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define bdm_test_flash_write
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# set $flash_base=(int)$arg0 & ~0xfffff
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set $flash_base=(int)$arg0
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output /x $flash_base
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echo \n
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# set *(char*)($flash_base+0x5555*2+1)=0xf0
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# set *(short*)($flash_base+0x25554)=0xaaaa
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# set *(short*)($flash_base+0x02aaa)=0x5555
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# set *(short*)($flash_base+0x25554)=0xA0A0
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set *(short*)(0x825554)=0xf0f0
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set *(short*)(0x825554)=0xaaaa
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set *(short*)(0x802aaa)=0x5555
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set *(short*)(0x825554)=0xA0A0
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set *(short*)($arg0)=$arg1
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end
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bdm_hw_init
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b do_trap_break
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b exception_hook_nop
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#b profi_rx_internal
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#b write
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#b smc_uart_tx
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#b smc_interrupt
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#b quicc_init
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b main
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#run
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