branched to enable main branch to return to the old MMU handling code since the new style couldn't be made to work (for now).

moved FPGA config GPIO initialization into init_fpga.c to enable external JTAG FPGA configuration
make PCI memory non-cacheable
2014-06-20 16:06:08 +00:00 · 2014-06-20 12:02:11 +00:00 · 2014-05-25 19:13:45 +00:00 · 2014-05-25 17:00:19 +00:00 · 2014-05-12 07:40:55 +00:00 · 2014-05-11 20:38:33 +00:00
21 changed files with 1071 additions and 3846 deletions
--- a/1689
+++ b/1689
--- a/4
+++ b/4
@@ -124,7 +124,6 @@ CSRCS= \
 	radeon_accel.c \
 	radeon_cursor.c \
 	radeon_monitor.c \
-	fnt_st_8x16.c \
 	\
 	x86decode.c \
 	x86sys.c \
@@ -144,8 +143,7 @@ ASRCS= \
 	startcf.S \
 	printf_helper.S \
 	exceptions.S \
-	xhdi_vec.S \
-	pci_wrappers.S
+	xhdi_vec.S

 SRCS=$(ASRCS) $(CSRCS)
 COBJS=$(patsubst %.c,%.o,$(CSRCS))
--- a/bas.lk.in
+++ b/bas.lk.in
@@ -23,7 +23,7 @@ MEMORY
 	*/
   bas_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00200000, LENGTH = 0x00100000
   /*
-	* driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
+    * driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
 	*/
   driver_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00100000, LENGTH = 0x00100000
 }
@@ -44,11 +44,10 @@ SECTIONS
 		OBJDIR/exceptions.o(.text)
 		OBJDIR/driver_vec.o(.text)
 		OBJDIR/interrupts.o(.text)
-		OBJDIR/mmu.o(.text)
-
+		OBJDIR/mmu.o(.text)		
+		
 		OBJDIR/BaS.o(.text)
 		OBJDIR/pci.o(.text)
-		OBJDIR/pci_wrappers.o(.text)
 		OBJDIR/usb.o(.text)
 		OBJDIR/driver_mem.o(.text)
 		OBJDIR/usb_mouse.o(.text)
@@ -109,7 +108,7 @@ SECTIONS
 		OBJDIR/xhdi_sd.o(.text)
 		OBJDIR/xhdi_interface.o(.text)
 		OBJDIR/xhdi_vec.o(.text)
-
+		
 #ifdef COMPILE_RAM
 		/*
 		 * if we compile to RAM anyway, there is no need to copy anything
@@ -119,7 +118,7 @@ SECTIONS
 		*(.data)
 		__BAS_DATA_END = .;
 		__BAS_BSS_START = .;
-		*(.bss)
+		*(.bss)	
 		__BAS_BSS_END = .;
 #endif /* COMPILE_RAM */

@@ -141,7 +140,7 @@ SECTIONS
 		*(.data)
 		__BAS_DATA_END = .;
 		__BAS_BSS_START = .;
-		*(.bss)
+		*(.bss)	
 		__BAS_BSS_END = .;

 		. = ALIGN(16);
@@ -154,16 +153,16 @@ SECTIONS
 		_driver_mem_buffer = .;
 		//. = . + DRIVER_MEM_BUFFER_SIZE;
 	} > driver_ram
-
+	
 	/*
 	 * Global memory map
 	 */

 	/* SDRAM Initialization */
-	___SDRAM                = SDRAM_START;
-	___SDRAM_SIZE           = SDRAM_SIZE;
+ 	___SDRAM                = SDRAM_START;
+ 	___SDRAM_SIZE           = SDRAM_SIZE;
 	_SDRAM_VECTOR_TABLE		= ___SDRAM;
-
+	
 	/* ST-RAM */
 	__STRAM                 = ___SDRAM;
 	__STRAM_END             = __TOS;
@@ -174,7 +173,7 @@ SECTIONS
 	/* FastRAM */
 	__FASTRAM               = 0x10000000;
 	__TARGET_ADDRESS		= TARGET_ADDRESS;
-
+	
 #if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
 	__FASTRAM_END           = __BAS_IN_RAM;
 #else
@@ -184,7 +183,7 @@ SECTIONS

 	/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
 	___BOOT_FLASH           = BOOTFLASH_BASE_ADDRESS;
-	___BOOT_FLASH_SIZE      = BOOTFLASH_SIZE;
+ 	___BOOT_FLASH_SIZE      = BOOTFLASH_SIZE;

 #if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
 	/* BaS */
@@ -204,40 +203,35 @@ SECTIONS
 	__EMUTOS_SIZE           = 0x00100000;

 	/* where FPGA data lives in flash */
-	__FPGA_CONFIG 		= 0xe0700000;
-	__FPGA_CONFIG_SIZE 	= 0x100000;
+	__FPGA_FLASH_DATA 		= 0xe0700000;
+	__FPGA_FLASH_DATA_SIZE 	= 0x100000;

 	/* VIDEO RAM BASIS */
 	__VRAM                  = 0x60000000;

 	/* Memory mapped registers */
-	__MBAR                  = 0xFF000000;
-
+ 	__MBAR                  = 0xFF000000;
+	
 	/* 32KB on-chip System SRAM */
-	__SYS_SRAM              = __MBAR + 0x10000;
+ 	__SYS_SRAM              = __MBAR + 0x10000;
 	__SYS_SRAM_SIZE         = 0x00008000;

 	/* MMU memory mapped registers */
-	__MMUBAR                = 0xFF040000;
+ 	__MMUBAR                = 0xFF040000;

 	/*
-	 * 4KB on-chip Core SRAM0: -> exception table
+	 * 4KB on-chip Core SRAM0: -> exception table 
 	 */
-	__RAMBAR0               = 0xFF100000;
-	__RAMBAR0_SIZE          = 0x00001000;
+ 	__RAMBAR0               = 0xFF100000;
+ 	__RAMBAR0_SIZE          = 0x00001000;

 	/* 4KB on-chip Core SRAM1 */
-	__RAMBAR1               = 0xFF101000;
-	__RAMBAR1_SIZE          = 0x00001000;
-	__SUP_SP                = __RAMBAR1 + __RAMBAR1_SIZE - 4;
+ 	__RAMBAR1               = 0xFF101000;
+ 	__RAMBAR1_SIZE          = 0x00001000;
+ 	__SUP_SP                = __RAMBAR0 + __RAMBAR0_SIZE - 4;

-	/*
-	 * this flag (if 1) indicates that FPGA configuration has been loaded through JTAG
-	 * and shouldn't be overwritten on boot
-	 */
-	__FPGA_JTAG_LOADED		= __RAMBAR1;
 	/* system variables */
-
+	
 	/* RAMBAR0 0 to 0x7FF -> exception vectors */
 	_rt_mod    = __RAMBAR0 + 0x800;
 	_rt_ssp    = __RAMBAR0 + 0x804;
--- a/dma/dma.c
+++ b/dma/dma.c
@@ -39,7 +39,7 @@
 #error "unknown machine!"
 #endif /* MACHINE_FIREBEE */

-// #define DBG_DMA
+#define DBG_DMA
 #ifdef DBG_DMA
 #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
 #else
@@ -58,13 +58,13 @@ struct dma_channel
 static char used_reqs[32] =
 {
 	DMA_ALWAYS,  DMA_DSPI_RXFIFO, DMA_DSPI_TXFIFO, DMA_DREQ0,
-	DMA_PSC0_RX, DMA_PSC0_TX, DMA_USB_EP0,  DMA_USB_EP1,
-	DMA_USB_EP2,  DMA_USB_EP3,  DMA_PCI_TX,  DMA_PCI_RX,
-	DMA_PSC1_RX, DMA_PSC1_TX, DMA_I2C_RX,  DMA_I2C_TX,
-	0,           0,           0,           0,
-	0,           0,           0,           0,
-	0,           0,           0,           0,
-	0,           0,           0,           0
+    DMA_PSC0_RX, DMA_PSC0_TX, DMA_USB_EP0,  DMA_USB_EP1,
+    DMA_USB_EP2,  DMA_USB_EP3,  DMA_PCI_TX,  DMA_PCI_RX,
+    DMA_PSC1_RX, DMA_PSC1_TX, DMA_I2C_RX,  DMA_I2C_TX,
+    0,           0,           0,           0,
+    0,           0,           0,           0,
+    0,           0,           0,           0,
+    0,           0,           0,           0
 };

 static struct dma_channel dma_channel[NCHANNELS] =
@@ -225,7 +225,7 @@ int dma_set_initiator(int initiator)
 			else /* No empty slots */
 			{
 				dbg("%s: no free slot\r\n", __FUNCTION__);
-
+				
 				return 1;
 			}
 			break;
@@ -530,7 +530,7 @@ int dma_get_channel(int requestor)
 }

 /*
- * Remove the channel being initiated by the given requestor from
+ * Remove the channel being initiated by the given requestor from 
 * the active list
 *
 * Parameters:
@@ -551,8 +551,8 @@ void dma_free_channel(int requestor)
 	}
 }

-/*
- * This is the catch-all interrupt handler for the mult-channel DMA
+/* 
+ * This is the catch-all interrupt handler for the mult-channel DMA 
 */
 int dma_interrupt_handler(void *arg1, void *arg2)
 {
@@ -560,8 +560,8 @@ int dma_interrupt_handler(void *arg1, void *arg2)

 	(void) set_ipl(7);

-	/*
-	 * Determine which interrupt(s) triggered by AND'ing the
+	/* 
+	 * Determine which interrupt(s) triggered by AND'ing the 
 	 * pending interrupts with those that aren't masked.
 	 */
 	interrupts = MCF_DMA_DIPR & ~MCF_DMA_DIMR;
@@ -598,9 +598,9 @@ void *dma_memcpy(void *dst, void *src, size_t n)
 	int ret;

 #ifdef DBG_DMA
-	int32_t time;
-	int32_t start;
-	int32_t end;
+    int32_t time;
+    int32_t start;
+    int32_t end;

 	start = MCF_SLT0_SCNT;
 #endif /* DBG_DMA */
--- a/flash_scripts/flash_firebee_bas.bdm
+++ b/flash_scripts/flash_firebee_bas.bdm
@@ -1,4 +1,4 @@
-#!/usr/local/bin/bdmctrl -D2
+#!/usr/local/bin/bdmctrl 
 #
 # firebee board initialization for bdmctrl 
 #
@@ -21,32 +21,32 @@ write 0xFF000508 0x00001180 4
 write 0xFF000504 0x007F0001 4

 # SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
-#write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
-#write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
-#write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
-#write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
-#write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
-#write 0xFF000108 0x73622830 4 # SDCFG1
-#write 0xFF00010C 0x46770000 4 # SDCFG2
+write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
+write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
+write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
+write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
+write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
+write 0xFF000108 0x73622830 4 # SDCFG1
+write 0xFF00010C 0x46770000 4 # SDCFG2

-#write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
-#write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
-#write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
-#sleep 100
-#write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
-#write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
-#write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
-#write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
-#write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
-#sleep 10
+write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
+write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
+write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
+sleep 100
+write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
+write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
+write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
+write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
+write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
+sleep 10


 # use system sdram as flashlib scratch area.
 # TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
 # This seems to be related to large flash buffers and PC-relative adressing of the plugin
-#flash-plugin 0x1000 0xf000 flash29-5475.plugin
+flash-plugin 0x1000 0xf000 flash29.plugin
 # notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
-flash 0xe0000000
+flash 0xE0000000

 # Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS)
 #
@@ -55,44 +55,17 @@ flash 0xe0000000
 #
 # contrary to documentation, it seems we need to erase-wait after each sector

-erase 0xe0000000 0
-erase-wait 0xe0000000
-erase 0xe0000000 0x1000
-erase-wait 0xe0000000
-erase 0xe0000000 0x2000
-erase-wait 0xe0000000
-erase 0xe0000000 0x3000
-erase-wait 0xe0000000
-erase 0xe0000000 0x4000
-erase-wait 0xe0000000
-erase 0xe0000000 0x5000
-erase-wait 0xe0000000
-erase 0xe0000000 0x6000
-erase-wait 0xe0000000
-erase 0xe0000000 0x7000
-erase-wait 0xe0000000
-erase 0xe0000000 0x8000
-erase-wait 0xe0000000
-erase 0xe0000000 0x10000
-erase-wait 0xe0000000
-erase 0xe0000000 0x18000
-erase-wait 0xe0000000
-erase 0xe0000000 0x20000
-erase-wait 0xe0000000
-erase 0xe0000000 0x28000
-erase-wait 0xe0000000
-erase 0xe0000000 0x30000
-erase-wait 0xe0000000
-erase 0xe0000000 0x38000
-erase-wait 0xe0000000
-erase 0xe0000000 0x40000
-erase-wait 0xe0000000
-erase 0xe0000000 0x48000
-erase-wait 0xe0000000
-erase 0xe0000000 0x50000
-erase-wait 0xe0000000
-erase 0xe0000000 0x58000
-erase-wait 0xe0000000
+erase 0xE0000000 0
+erase 0xE0000000 1
+erase 0xE0000000 2
+erase 0xE0000000 3
+erase 0xE0000000 4
+erase 0xE0000000 5
+erase 0xE0000000 7
+erase 0xE0000000 8
+erase 0xE0000000 9
+erase 0xE0000000 10
+erase-wait 0xE0000000

 load -v ../firebee/bas.elf
 wait
--- a/if/driver_vec.c
+++ b/if/driver_vec.c
@@ -30,7 +30,6 @@
 #include "dma.h"
 #include "driver_vec.h"
 #include "driver_mem.h"
-#include "pci.h"

 /*
 * driver interface struct for the SD card BaS driver
@@ -70,58 +69,6 @@ static struct dma_driver_interface dma_interface =

 extern const struct fb_info *info_fb;

-/*
- * driver interface struct for the PCI_BIOS BaS driver
- */
-static struct pci_bios_interface pci_interface = 
-{
-	.subjar = 0,
-	.version = 0x00010000,
-	.find_pci_device = wrapper_find_pci_device,
-	.find_pci_classcode = wrapper_find_pci_classcode,
-	.read_config_byte = wrapper_read_config_byte,
-	.read_config_word = wrapper_read_config_word,
-	.read_config_longword = wrapper_read_config_longword,
-	.fast_read_config_byte = wrapper_fast_read_config_byte,
-	.fast_read_config_word = wrapper_fast_read_config_word,
-	.fast_read_config_longword = wrapper_fast_read_config_longword,
-	.write_config_byte = wrapper_write_config_byte,
-	.write_config_word = wrapper_write_config_word,
-	.write_config_longword = wrapper_write_config_longword,
-	.hook_interrupt = wrapper_hook_interrupt,
-	.unhook_interrupt = wrapper_unhook_interrupt,
-	.special_cycle = wrapper_special_cycle,
-	.get_routing = wrapper_get_routing,
-	.set_interrupt = wrapper_set_interrupt,
-	.get_resource = wrapper_get_resource,
-	.get_card_used = wrapper_get_card_used,
-	.set_card_used = wrapper_set_card_used,
-	.read_mem_byte = wrapper_read_mem_byte,
-	.read_mem_word = wrapper_read_mem_word,
-	.read_mem_longword = wrapper_read_mem_longword,
-	.fast_read_mem_byte = wrapper_fast_read_mem_byte,
-	.fast_read_mem_word = wrapper_fast_read_mem_word,
-	.fast_read_mem_longword = wrapper_fast_read_mem_longword,
-	.write_mem_byte = wrapper_write_mem_byte,
-	.write_mem_word = wrapper_write_mem_word,
-	.write_mem_longword = wrapper_write_mem_longword,
-	.read_io_byte = wrapper_read_io_byte,
-	.read_io_word = wrapper_read_io_word,
-	.read_io_longword = wrapper_read_io_longword,
-	.fast_read_io_byte = wrapper_fast_read_io_byte,
-	.fast_read_io_word = wrapper_fast_read_io_word,
-	.fast_read_io_longword = wrapper_fast_read_io_longword,
-	.write_io_byte = wrapper_write_io_byte,
-	.write_io_word = wrapper_write_io_word,
-	.write_io_longword = wrapper_write_io_longword,
-	.get_machine_id = wrapper_get_machine_id,
-	.get_pagesize = wrapper_get_pagesize,
-	.virt_to_bus = wrapper_virt_to_bus,
-	.bus_to_virt = wrapper_bus_to_virt,
-	.virt_to_phys = wrapper_virt_to_phys,
-	.phys_to_virt = wrapper_phys_to_virt,
-};
-
 /*
 * driver interface struct for the BaS framebuffer video driver
 */
@@ -158,14 +105,7 @@ static struct generic_interface interfaces[] =
 		.revision = 1,
 		.interface.fb = &framebuffer_interface,
 	},
-	{
-		.type = PCI_DRIVER,
-		.name = "PCI",
-		.description = "BaS PCI_BIOS driver",
-		.version = 0,
-		.revision = 1,
-		.interface.pci = &pci_interface,
-	},
+
 	/* insert new drivers here */

 	{
--- a/include/driver_vec.h
+++ b/include/driver_vec.h
@@ -27,17 +27,15 @@

 #include "xhdi_sd.h"
 #include "MCD_dma.h"
-#include "pci.h"

 enum driver_type
 {
-//	BLOCKDEV_DRIVER,
-//	CHARDEV_DRIVER,
+	END_OF_DRIVERS,		/* marks end of driver list */
+	BLOCKDEV_DRIVER,
+	CHARDEV_DRIVER,
+	VIDEO_DRIVER,
 	XHDI_DRIVER,
 	MCD_DRIVER,
-	VIDEO_DRIVER,
-	PCI_DRIVER,
-	END_OF_DRIVERS,		/* marks end of driver list */
 };

 struct generic_driver_interface
@@ -206,66 +204,12 @@ struct framebuffer_driver_interface
 	struct fb_info **framebuffer_info;	/* pointer to an fb_info struct (defined in include/fb.h) */
 };

-struct pci_bios_interface {
-	uint32_t subjar;
-	uint32_t version;
-	/* Although we declare this functions as standard gcc functions (cdecl),
-	 * they expect paramenters inside registers (fastcall) unsupported by gcc m68k.
-	 * Caller will take care of parameters passing convention.
-	 */
-	int32_t (*find_pci_device)	(uint32_t id, uint16_t index);
-	int32_t (*find_pci_classcode)	(uint32_t class, uint16_t index);
-	int32_t (*read_config_byte)	(int32_t handle, uint16_t reg, uint8_t *address);
-	int32_t (*read_config_word)	(int32_t handle, uint16_t reg, uint16_t *address);
-	int32_t (*read_config_longword)	(int32_t handle, uint16_t reg, uint32_t *address);
-	uint8_t (*fast_read_config_byte)	(int32_t handle, uint16_t reg);
-	uint16_t (*fast_read_config_word)	(int32_t handle, uint16_t reg);
-	uint32_t (*fast_read_config_longword)	(int32_t handle, uint16_t reg);
-	int32_t (*write_config_byte)	(int32_t handle, uint16_t reg, uint16_t val);
-	int32_t (*write_config_word)	(int32_t handle, uint16_t reg, uint16_t val);
-	int32_t (*write_config_longword)	(int32_t handle, uint16_t reg, uint32_t val);
-	int32_t (*hook_interrupt)	(int32_t handle, uint32_t *routine, uint32_t *parameter);
-	int32_t (*unhook_interrupt)	(int32_t handle);
-	int32_t (*special_cycle)	(uint16_t bus, uint32_t data);
-	int32_t (*get_routing)	(int32_t handle);
-	int32_t (*set_interrupt)	(int32_t handle);
-	int32_t (*get_resource)	(int32_t handle);
-	int32_t (*get_card_used)	(int32_t handle, uint32_t *address);
-	int32_t (*set_card_used)	(int32_t handle, uint32_t *callback);
-	int32_t (*read_mem_byte)	(int32_t handle, uint32_t offset, uint8_t *address);
-	int32_t (*read_mem_word)	(int32_t handle, uint32_t offset, uint16_t *address);
-	int32_t (*read_mem_longword)	(int32_t handle, uint32_t offset, uint32_t *address);
-	uint8_t (*fast_read_mem_byte)	(int32_t handle, uint32_t offset);
-	uint16_t (*fast_read_mem_word)	(int32_t handle, uint32_t offset);
-	uint32_t (*fast_read_mem_longword)	(int32_t handle, uint32_t offset);
-	int32_t (*write_mem_byte)	(int32_t handle, uint32_t offset, uint16_t val);
-	int32_t (*write_mem_word)	(int32_t handle, uint32_t offset, uint16_t val);
-	int32_t (*write_mem_longword)	(int32_t handle, uint32_t offset, uint32_t val);
-	int32_t (*read_io_byte)	(int32_t handle, uint32_t offset, uint8_t *address);
-	int32_t (*read_io_word)	(int32_t handle, uint32_t offset, uint16_t *address);
-	int32_t (*read_io_longword)	(int32_t handle, uint32_t offset, uint32_t *address);
-	uint8_t (*fast_read_io_byte)	(int32_t handle, uint32_t offset);
-	uint16_t (*fast_read_io_word)	(int32_t handle, uint32_t offset);
-	uint32_t (*fast_read_io_longword)	(int32_t handle, uint32_t offset);
-	int32_t (*write_io_byte)	(int32_t handle, uint32_t offset, uint16_t val);
-	int32_t (*write_io_word)	(int32_t handle, uint32_t offset, uint16_t val);
-	int32_t (*write_io_longword)	(int32_t handle, uint32_t offset, uint32_t val);
-	int32_t (*get_machine_id)	(void);
-	int32_t (*get_pagesize)	(void);
-	int32_t (*virt_to_bus)	(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
-	int32_t (*bus_to_virt)	(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
-	int32_t (*virt_to_phys)	(uint32_t address, PCI_CONV_ADR *pointer);
-	int32_t (*phys_to_virt)	(uint32_t address, PCI_CONV_ADR *pointer);
-//	int32_t reserved[2];
-};
-
 union interface
 {
 	struct generic_driver_interface *gdi;
 	struct xhdi_driver_interface *xhdi;
 	struct dma_driver_interface *dma;
 	struct framebuffer_driver_interface *fb;
-	struct pci_bios_interface *pci;
 };

 struct generic_interface
--- a/include/font.h
+++ b/include/font.h
@@ -1,98 +0,0 @@
-/*
- * font.h - font specific definitions
- *
- * Copyright (c) 2001 Lineo, Inc.
- * Copyright (c) 2004 by Authors:
- *
- * Authors:
- *  MAD     Martin Doering
- *
- * This file is distributed under the GPL, version 2 or at your
- * option any later version.  See doc/license.txt for details.
- */
-
-#ifndef FONT_H
-#define FONT_H
-
-#include <stdint.h>
-
-/* font header flags */
-
-#define F_DEFAULT 1     /* this is the default font (face and size) */
-#define F_HORZ_OFF  2   /* there are left and right offset tables */
-#define F_STDFORM  4    /* is the font in standard format */
-#define F_MONOSPACE 8   /* is the font monospaced */
-
-/* font style bits */
-
-#define F_THICKEN 1
-#define F_LIGHT 2
-#define F_SKEW  4
-#define F_UNDER 8
-#define F_OUTLINE 16
-#define F_SHADOW        32
-
-/* font specific linea variables */
-
-extern const uint16_t *v_fnt_ad;   /* address of current monospace font */
-extern const uint16_t *v_off_ad;   /* address of font offset table */
-extern uint16_t v_fnt_nd;          /* ascii code of last cell in font */
-extern uint16_t v_fnt_st;          /* ascii code of first cell in font */
-extern uint16_t v_fnt_wr;          /* font cell wrap */
-
-/* character cell specific linea variables */
-
-extern uint16_t    v_cel_ht;       /* cell height (width is 8) */
-extern uint16_t    v_cel_mx;       /* needed by MiNT: columns on the screen minus 1 */
-extern uint16_t    v_cel_my;       /* needed by MiNT: rows on the screen minus 1 */
-extern uint16_t    v_cel_wr;       /* needed by MiNT: length (in int8_ts) of a line of characters */
-
-/*
- * font_ring is a struct of four pointers, each of which points to
- * a list of font headers linked together to form a string.
- */
-
-extern struct font_head *font_ring[4];  /* Ring of available fonts */
-extern int16_t font_count;                 /* all three fonts and NULL */
-
-/* the font header descibes a font */
-
-struct font_head {
-    int16_t font_id;
-    int16_t point;
-    int8_t name[32];
-    uint16_t first_ade;
-    uint16_t last_ade;
-    uint16_t top;
-    uint16_t ascent;
-    uint16_t half;
-    uint16_t descent;
-    uint16_t bottom;
-    uint16_t max_char_width;
-    uint16_t max_cell_width;
-    uint16_t left_offset;          /* amount character slants left when skewed */
-    uint16_t right_offset;         /* amount character slants right */
-    uint16_t thicken;              /* number of pixels to smear */
-    uint16_t ul_size;              /* size of the underline */
-    uint16_t lighten;              /* mask to and with to lighten  */
-    uint16_t skew;                 /* mask for skewing */
-    uint16_t flags;
-
-    const uint8_t *hor_table;     /* horizontal offsets */
-    const uint16_t *off_table;     /* character offsets  */
-    const uint16_t *dat_table;     /* character definitions */
-    uint16_t form_width;
-    uint16_t form_height;
-
-    struct font_head *next_font;/* pointer to next font */
-    uint16_t font_seg;
-};
-
-
-
-/* prototypes */
-
-void font_init(void);           /* initialize BIOS font ring */
-void font_set_default(void);    /* choose the default font */
-
-#endif /* FONT_H */
--- a/include/pci.h
+++ b/include/pci.h
@@ -243,94 +243,10 @@ extern int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t va
 extern int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value);
 extern int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value);

+extern struct pci_rd *pci_get_resource(int32_t handle);
 extern int32_t pci_hook_interrupt(int32_t handle, void *interrupt_handler, void *parameter);
 extern int32_t pci_unhook_interrupt(int32_t handle);

-extern struct pci_rd *pci_get_resource(int32_t handle);
-
-/*
- * Not implemented PCI_BIOS functions
- */
-extern uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg);
-extern uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg);
-extern uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg);
-extern int32_t pci_special_cycle(uint16_t bus, uint32_t data);
-extern int32_t pci_get_routing(int32_t handle);
-extern int32_t pci_set_interrupt(int32_t handle);
-extern int32_t pci_get_card_used(int32_t handle, uint32_t *address);
-extern int32_t pci_set_card_used(int32_t handle, uint32_t *callback);
-extern int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
-extern int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
-extern int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
-extern uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset);
-extern uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset);
-extern uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset);
-extern int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
-extern int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
-extern int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
-extern int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
-extern int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
-extern int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
-extern uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset);
-extern uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset);
-extern uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset);
-extern int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
-extern int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
-extern int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
-extern int32_t pci_get_machine_id(void);
-extern int32_t pci_get_pagesize(void);
-extern int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
-extern int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
-extern int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
-extern int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
-
-/*
- * prototypes for PCI wrapper routines
- */
-extern int32_t wrapper_find_pci_device(uint32_t id, uint16_t index);
-extern int32_t wrapper_find_pci_classcode(uint32_t class, uint16_t index);
-extern int32_t wrapper_read_config_byte(int32_t handle, uint16_t reg, uint8_t *address);
-extern int32_t wrapper_read_config_word(int32_t handle, uint16_t reg, uint16_t *address);
-extern int32_t wrapper_read_config_longword(int32_t handle, uint16_t reg, uint32_t *address);
-extern uint8_t wrapper_fast_read_config_byte(int32_t handle, uint16_t reg);
-extern uint16_t wrapper_fast_read_config_word(int32_t handle, uint16_t reg);
-extern uint32_t wrapper_fast_read_config_longword(int32_t handle, uint16_t reg);
-extern int32_t wrapper_write_config_byte(int32_t handle, uint16_t reg, uint16_t val);
-extern int32_t wrapper_write_config_word(int32_t handle, uint16_t reg, uint16_t val);
-extern int32_t wrapper_write_config_longword(int32_t handle, uint16_t reg, uint32_t val);
-extern int32_t wrapper_hook_interrupt(int32_t handle, uint32_t *routine, uint32_t *parameter);
-extern int32_t wrapper_unhook_interrupt(int32_t handle);
-extern int32_t wrapper_special_cycle(uint16_t bus, uint32_t data);
-extern int32_t wrapper_get_routing(int32_t handle);
-extern int32_t wrapper_set_interrupt(int32_t handle);
-extern int32_t wrapper_get_resource(int32_t handle);
-extern int32_t wrapper_get_card_used(int32_t handle, uint32_t *address);
-extern int32_t wrapper_set_card_used(int32_t handle, uint32_t *callback);
-extern int32_t wrapper_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
-extern int32_t wrapper_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
-extern int32_t wrapper_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
-extern uint8_t wrapper_fast_read_mem_byte(int32_t handle, uint32_t offset);
-extern uint16_t wrapper_fast_read_mem_word(int32_t handle, uint32_t offset);
-extern uint32_t wrapper_fast_read_mem_longword(int32_t handle, uint32_t offset);
-extern int32_t wrapper_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
-extern int32_t wrapper_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
-extern int32_t wrapper_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
-extern int32_t wrapper_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
-extern int32_t wrapper_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
-extern int32_t wrapper_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
-extern uint8_t wrapper_fast_read_io_byte(int32_t handle, uint32_t offset);
-extern uint16_t wrapper_fast_read_io_word(int32_t handle, uint32_t offset);
-extern uint32_t wrapper_fast_read_io_longword(int32_t handle, uint32_t offset);
-extern int32_t wrapper_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
-extern int32_t wrapper_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
-extern int32_t wrapper_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
-extern int32_t wrapper_get_machine_id(void);
-extern int32_t wrapper_get_pagesize(void);
-extern int32_t wrapper_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
-extern int32_t wrapper_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
-extern int32_t wrapper_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
-extern int32_t wrapper_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
-
 #define PCI_MK_CONF_ADDR(bus, device, function)	(MCF_PCI_PCICAR_E | \
 												((bus) << 16) | \
 												((device << 8) | \
--- a/include/version.h
+++ b/include/version.h
@@ -29,7 +29,7 @@
 */

 #define MAJOR_VERSION	0
-#define MINOR_VERSION	85
+#define MINOR_VERSION	84


 #endif /* VERSION_H_ */
--- a/net/fec.c
+++ b/net/fec.c
@@ -32,7 +32,7 @@
 #error Unknown machine!
 #endif

-// #define DBG_FEC
+#define DBG_FEC
 #ifdef DBG_FEC
 #define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
@@ -237,33 +237,33 @@ void fec_log_init(uint8_t ch)
 */
 void fec_log_dump(uint8_t ch)
 {
-	dbg("\r\n   FEC%d Log\r\n", __FUNCTION__, ch);
-	dbg("   ---------------\r\n", __FUNCTION__);
-	dbg(" Total: %4d\r\n", fec_log[ch].total);
-	dbg(" hberr: %4d\r\n", fec_log[ch].hberr);
-	dbg(" babr:  %4d\r\n", fec_log[ch].babr);
-	dbg(" babt:  %4d\r\n", fec_log[ch].babt);
-	dbg(" gra:   %4d\r\n", fec_log[ch].gra);
-	dbg(" txf:   %4d\r\n", fec_log[ch].txf);
-	dbg(" mii:   %4d\r\n", fec_log[ch].mii);
-	dbg(" lc:    %4d\r\n", fec_log[ch].lc);
-	dbg(" rl:    %4d\r\n", fec_log[ch].rl);
-	dbg(" xfun:  %4d\r\n", fec_log[ch].xfun);
-	dbg(" xferr: %4d\r\n", fec_log[ch].xferr);
-	dbg(" rferr: %4d\r\n", fec_log[ch].rferr);
-	dbg(" dtxf:  %4d\r\n", fec_log[ch].dtxf);
-	dbg(" drxf:  %4d\r\n", fec_log[ch].drxf);
-	dbg(" \r\nRFSW:\r\n");
-	dbg(" inv:   %4d\r\n", fec_log[ch].rfsw_inv);
-	dbg(" m:     %4d\r\n", fec_log[ch].rfsw_m);
-	dbg(" bc:    %4d\r\n", fec_log[ch].rfsw_bc);
-	dbg(" mc:    %4d\r\n", fec_log[ch].rfsw_mc);
-	dbg(" lg:    %4d\r\n", fec_log[ch].rfsw_lg);
-	dbg(" no:    %4d\r\n", fec_log[ch].rfsw_no);
-	dbg(" cr:    %4d\r\n", fec_log[ch].rfsw_cr);
-	dbg(" ov:    %4d\r\n", fec_log[ch].rfsw_ov);
-	dbg(" tr:    %4d\r\n", fec_log[ch].rfsw_tr);
-	dbg(" ---------------\r\n\r\n");
+    dbg("\r\n   FEC%d Log\r\n", __FUNCTION__, ch);
+    dbg("   ---------------\r\n", __FUNCTION__);
+    dbg(" Total: %4d\r\n", fec_log[ch].total);
+    dbg(" hberr: %4d\r\n", fec_log[ch].hberr);
+    dbg(" babr:  %4d\r\n", fec_log[ch].babr);
+    dbg(" babt:  %4d\r\n", fec_log[ch].babt);
+    dbg(" gra:   %4d\r\n", fec_log[ch].gra);
+    dbg(" txf:   %4d\r\n", fec_log[ch].txf);
+    dbg(" mii:   %4d\r\n", fec_log[ch].mii);
+    dbg(" lc:    %4d\r\n", fec_log[ch].lc);
+    dbg(" rl:    %4d\r\n", fec_log[ch].rl);
+    dbg(" xfun:  %4d\r\n", fec_log[ch].xfun);
+    dbg(" xferr: %4d\r\n", fec_log[ch].xferr);
+    dbg(" rferr: %4d\r\n", fec_log[ch].rferr);
+    dbg(" dtxf:  %4d\r\n", fec_log[ch].dtxf);
+    dbg(" drxf:  %4d\r\n", fec_log[ch].drxf);
+    dbg(" \r\nRFSW:\r\n");
+    dbg(" inv:   %4d\r\n", fec_log[ch].rfsw_inv);
+    dbg(" m:     %4d\r\n", fec_log[ch].rfsw_m);
+    dbg(" bc:    %4d\r\n", fec_log[ch].rfsw_bc);
+    dbg(" mc:    %4d\r\n", fec_log[ch].rfsw_mc);
+    dbg(" lg:    %4d\r\n", fec_log[ch].rfsw_lg);
+    dbg(" no:    %4d\r\n", fec_log[ch].rfsw_no);
+    dbg(" cr:    %4d\r\n", fec_log[ch].rfsw_cr);
+    dbg(" ov:    %4d\r\n", fec_log[ch].rfsw_ov);
+    dbg(" tr:    %4d\r\n", fec_log[ch].rfsw_tr);
+    dbg(" ---------------\r\n\r\n");
 }

 /*
@@ -538,26 +538,19 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
 {
 	uint32_t initiator;
 	int channel;
-#ifdef DBG_FEC
 	int res;
-#endif

 	/*
 	 * Make the initiator assignment
 	 */
-#if defined(DBG_FEC)
-    res =
-#else
-    (void)
-#endif
-    dma_set_initiator(DMA_FEC_RX(ch));
-	dbg("dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", ch, res);
+	res = dma_set_initiator(DMA_FEC_RX(ch));
+    dbg("dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", ch, res);

 	/*
 	 * Grab the initiator number
 	 */
 	initiator = dma_get_initiator(DMA_FEC_RX(ch));
-	dbg("dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", ch, initiator);
+    dbg("dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", ch, initiator);

 	/*
 	 * Determine the DMA channel running the task for the
@@ -565,7 +558,7 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
 	 */
 	channel = dma_set_channel(DMA_FEC_RX(ch),
 			(ch == 0) ? fec0_rx_frame : fec1_rx_frame);
-	dbg("DMA channel for FEC%1d: %d\r\n", ch, channel);
+    dbg("DMA channel for FEC%1d: %d\r\n", ch, channel);

 	/*
 	 * Start the Rx DMA task
@@ -579,18 +572,18 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
 			0,
 			initiator,
 			FECRX_DMA_PRI(ch),
-			0
-			| MCD_FECRX_DMA
+			0 
+			| MCD_FECRX_DMA   
 			| MCD_INTERRUPT
-			| MCD_TT_FLAGS_CW
+			| MCD_TT_FLAGS_CW 
 			| MCD_TT_FLAGS_RL
 			| MCD_TT_FLAGS_SP
 			,
-			0
+			0 
 			| MCD_NO_CSUM
 			| MCD_NO_BYTE_SWAP
 			);
-	dbg("Rx DMA task for FEC%1d started\r\n", ch);
+    dbg("Rx DMA task for FEC%1d started\r\n", ch);
 }

 /*
@@ -614,13 +607,13 @@ void fec_rx_continue(uint8_t ch)
 	 */
 	channel = dma_get_channel(DMA_FEC_RX(ch));

-	dbg("RX DMA channel for FEC%1d is %d\r\n", ch, channel);
+    dbg("RX DMA channel for FEC%1d is %d\r\n", ch, channel);

 	/*
 	 * Continue/restart the DMA task
 	 */
 	MCD_continDma(channel);
-	dbg("RX dma on channel %d continued\r\n", channel);
+    dbg("RX dma on channel %d continued\r\n", channel);
 }

 /*
@@ -649,9 +642,9 @@ void fec_rx_stop (uint8_t ch)
 	/* Kill the FEC Rx DMA task */
 	MCD_killDma(channel);

-	/*
-	 * Free up the FEC requestor from the software maintained
-	 * initiator list
+	/* 
+	 * Free up the FEC requestor from the software maintained 
+	 * initiator list 
 	 */
 	dma_free_initiator(DMA_FEC_RX(ch));

@@ -663,7 +656,7 @@ void fec_rx_stop (uint8_t ch)
 }

 /*
- * Receive Frame interrupt handler - this handler is called by the
+ * Receive Frame interrupt handler - this handler is called by the 
 * DMA interrupt handler indicating that a packet was successfully
 * transferred out of the Rx FIFO.
 *
@@ -678,7 +671,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 	NBUF *cur_nbuf, *new_nbuf;
 	int keep;

-	dbg("started\r\n");
+    dbg("started\r\n");

 	while ((pRxBD = fecbd_rx_alloc(ch)) != NULL)
 	{
@@ -691,7 +684,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 		 *  - No undefined bits should be set
 		 *  - The upper 5 bits of the length should be cleared
 		 */
-		if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608)
+		if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608) 
 				|| (pRxBD->length & 0xF800))
 		{
 			keep = false;
@@ -723,8 +716,8 @@ void fec_rx_frame(uint8_t ch, NIF *nif)

 		if (keep)
 		{
-			/*
-			 * Pull the network buffer off the Rx ring queue
+			/* 
+			 * Pull the network buffer off the Rx ring queue 
 			 */
 			cur_nbuf = nbuf_remove(NBUF_RX_RING);

@@ -740,7 +733,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			new_nbuf = nbuf_alloc();
 			if (new_nbuf == NULL)
 			{
-				dbg("nbuf_alloc() failed\n");
+                dbg("nbuf_alloc() failed\n");

 				/*
 				 * Can't allocate a new network buffer, so we
@@ -774,7 +767,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)


 			/*
-			 * Let the DMA know that there is a new Rx BD (in case the
+			 * Let the DMA know that there is a new Rx BD (in case the 
 			 * ring was full and the DMA was waiting for an empty one)
 			 */
 			fec_rx_continue(ch);
@@ -785,7 +778,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			eth_hdr = (ETH_HDR *) cur_nbuf->data;

 			/*
-			 * Pass the received packet up the network stack if the
+			 * Pass the received packet up the network stack if the 
 			 * protocol is supported in our network interface (NIF)
 			 */
 			if (nif_protocol_exist(nif, eth_hdr->type))
@@ -796,12 +789,12 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			else
 			{
 				nbuf_free(cur_nbuf);
-				dbg("got unsupported packet %d, trashed it\r\n", eth_hdr->type);
+                dbg("got unsupported packet %d, trashed it\r\n", eth_hdr->type);
 			}
 		}
-		else
+		else 
 		{
-			/*
+			/* 
 			 * This frame isn't a keeper
 			 * Reset the status and length, but don't need to get another
 			 * buffer since we are trashing the data in the current one
@@ -811,7 +804,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			pRxBD->status |= RX_BD_E;

 			/*
-			 * Move the current buffer from the beginning to the end of the
+			 * Move the current buffer from the beginning to the end of the 
 			 * Rx ring queue
 			 */
 			cur_nbuf = nbuf_remove(NBUF_RX_RING);
@@ -851,28 +844,22 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
 {
 	uint32_t initiator;
 	int channel;
+	int result;
 	void fec0_tx_frame(void);
 	void fec1_tx_frame(void);
-#ifdef DBG_FEC
 	int res;
-#endif

 	/*
 	 * Make the initiator assignment
 	 */
-#ifdef DBG_FEC
-    res =
-#else
-    (void)
-#endif
-    dma_set_initiator(DMA_FEC_TX(ch));
-	dbg("dma_set_initiator(%d) = %d\r\n", ch, res);
+	res = dma_set_initiator(DMA_FEC_TX(ch));
+    dbg("dma_set_initiator(%d) = %d\r\n", ch, res);

 	/*
 	 * Grab the initiator number
 	 */
 	initiator = dma_get_initiator(DMA_FEC_TX(ch));
-	dbg("dma_get_initiator(%d) = %d\r\n", ch, initiator);
+    dbg("dma_get_initiator(%d) = %d\r\n", ch, initiator);


 	/*
@@ -881,7 +868,7 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
 	 */
 	channel = dma_set_channel(DMA_FEC_TX(ch),
 			(ch == 0) ? fec0_tx_frame : fec1_tx_frame);
-	dbg("dma_set_channel(%d, ...) = %d\r\n", ch, channel);
+    dbg("dma_set_channel(%d, ...) = %d\r\n", ch, channel);

 	/*
 	 * Start the Tx DMA task
@@ -895,18 +882,18 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
 			0,
 			initiator,
 			FECTX_DMA_PRI(ch),
-			0
-			| MCD_FECTX_DMA
+			0 
+			| MCD_FECTX_DMA   
 			| MCD_INTERRUPT
-			| MCD_TT_FLAGS_CW
+			| MCD_TT_FLAGS_CW 
 			| MCD_TT_FLAGS_RL
 			| MCD_TT_FLAGS_SP
 			,
-			0
+			0 
 			| MCD_NO_CSUM
 			| MCD_NO_BYTE_SWAP
 			);
-	dbg("DMA tx task started\r\n");
+    dbg("DMA tx task started\r\n");
 }

 /*
@@ -929,13 +916,13 @@ void fec_tx_continue(uint8_t ch)
 	 * selected FEC
 	 */
 	channel = dma_get_channel(DMA_FEC_TX(ch));
-	dbg("dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n", ch, channel);
+    dbg("dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n", ch, channel);

 	/*
 	 * Continue/restart the DMA task
 	 */
 	MCD_continDma(channel);
-	dbg("DMA TX task continue\r\n");
+    dbg("DMA TX task continue\r\n");
 }

 /*
@@ -982,9 +969,9 @@ void fec_tx_stop(uint8_t ch)
 	/* Kill the FEC Tx DMA task */
 	MCD_killDma(channel);

-	/*
-	 * Free up the FEC requestor from the software maintained
-	 * initiator list
+	/* 
+	 * Free up the FEC requestor from the software maintained 
+	 * initiator list 
 	 */
 	dma_free_initiator(DMA_FEC_TX(ch));

@@ -996,7 +983,7 @@ void fec_tx_stop(uint8_t ch)
 }

 /*
- * Trasmit Frame interrupt handler - this handler is called by the
+ * Trasmit Frame interrupt handler - this handler is called by the 
 * DMA interrupt handler indicating that a packet was successfully
 * transferred to the Tx FIFO.
 *
@@ -1009,7 +996,7 @@ void fec_tx_frame(uint8_t ch)
 	NBUF *pNbuf;
 	bool is_empty = true;

-	dbg("\r\n");
+    dbg("\r\n");
 	while ((pTxBD = fecbd_tx_free(ch)) != NULL)
 	{
 		fec_log[ch].dtxf++;
@@ -1023,7 +1010,7 @@ void fec_tx_frame(uint8_t ch)
 		 * Free up the network buffer that was just transmitted
 		 */
 		nbuf_free(pNbuf);
-		dbg("free buffer %p from TX ring\r\n", pNbuf);
+        dbg("free buffer %p from TX ring\r\n", pNbuf);

 		/*
 		 * Re-initialize the Tx BD
@@ -1032,9 +1019,9 @@ void fec_tx_frame(uint8_t ch)
 		pTxBD->length = 0;
 		is_empty = false;

-	}
+	}    
 	if (is_empty)
-		dbg("transmit queue was empty!\r\n");
+        dbg("transmit queue was empty!\r\n");
 }

 void fec0_tx_frame(void)
@@ -1057,7 +1044,7 @@ void fec1_tx_frame(void)
 *  dst     Destination MAC Address
 *  src     Source MAC Address
 *  type    Ethernet Frame Type
- *  length  Number of bytes to be transmitted (doesn't include type,
+ *  length  Number of bytes to be transmitted (doesn't include type, 
 *          src, or dest byte count)
 *  pkt     Pointer packet network buffer
 *
@@ -1072,14 +1059,14 @@ int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NB
 	/* Check the length */
 	if ((nbuf->length + ETH_HDR_LEN) > ETH_MTU)
 	{
-		dbg("nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n",
-				nbuf->length, ETH_HDR_LEN, ETH_MTU);
+        dbg("nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n",
+                nbuf->length, ETH_HDR_LEN, ETH_MTU);
 		return 0;
 	}

-	/*
-	 * Copy the destination address, source address, and Ethernet
-	 * type into the packet
+	/* 
+	 * Copy the destination address, source address, and Ethernet 
+	 * type into the packet 
 	 */
 	memcpy(&nbuf->data[0],  dst,   6);
 	memcpy(&nbuf->data[6],  src,   6);
@@ -1095,7 +1082,7 @@ int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NB
 	 */
 	nbuf_add(NBUF_TX_RING, nbuf);

-	/*
+	/* 
 	 * Setup the buffer descriptor for transmission
 	 */
 	pTxBD->data = nbuf->data;
@@ -1205,7 +1192,7 @@ static void fec_irq_handler(uint8_t ch)
 	event = eir & MCF_FEC_EIMR(ch);

 	if (event != eir)
-		dbg("pending but not enabled: 0x%08x\r\n", (event ^ eir));
+        dbg("pending but not enabled: 0x%08x\r\n", (event ^ eir));

 	/*
 	 * Clear the event(s) in the EIR immediately
@@ -1216,8 +1203,8 @@ static void fec_irq_handler(uint8_t ch)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].rferr++;
-		dbg("RFERR\r\n");
-		dbg("FECRFSR%d = 0x%08x\r\n", ch, MCF_FEC_FECRFSR(ch));
+        dbg("RFERR\r\n");
+        dbg("FECRFSR%d = 0x%08x\r\n", ch, MCF_FEC_FECRFSR(ch));
 		//fec_eth_stop(ch);
 	}

@@ -1225,14 +1212,14 @@ static void fec_irq_handler(uint8_t ch)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].xferr++;
-		dbg("XFERR\r\n");
+        dbg("XFERR\r\n");
 	}

 	if (event & MCF_FEC_EIR_XFUN)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].xfun++;
-		dbg("XFUN\r\n");
+        dbg("XFUN\r\n");
 		//fec_eth_stop(ch);
 	}

@@ -1240,54 +1227,54 @@ static void fec_irq_handler(uint8_t ch)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].rl++;
-		dbg("RL\r\n");
+        dbg("RL\r\n");
 	}

 	if (event & MCF_FEC_EIR_LC)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].lc++;
-		dbg("LC\r\n");
+        dbg("LC\r\n");
 	}

 	if (event & MCF_FEC_EIR_MII)
 	{
 		fec_log[ch].mii++;
-		dbg("MII\r\n");
+        dbg("MII\r\n");
 	}

 	if (event & MCF_FEC_EIR_TXF)
 	{
 		fec_log[ch].txf++;
-		dbg("TXF\r\n");
+        dbg("TXF\r\n");
 		fec_log_dump(0);
 	}

 	if (event & MCF_FEC_EIR_GRA)
 	{
 		fec_log[ch].gra++;
-		dbg("GRA\r\n");
+        dbg("GRA\r\n");
 	}

 	if (event & MCF_FEC_EIR_BABT)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].babt++;
-		dbg("BABT\r\n");
+        dbg("BABT\r\n");
 	}

 	if (event & MCF_FEC_EIR_BABR)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].babr++;
-		dbg("BABR\r\n");
+        dbg("BABR\r\n");
 	}

 	if (event & MCF_FEC_EIR_HBERR)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].hberr++;
-		dbg("HBERR\r\n");
+        dbg("HBERR\r\n");
 	}
 }

@@ -1297,7 +1284,7 @@ static void fec_irq_handler(uint8_t ch)
 */
 int fec0_interrupt_handler(void* arg1, void* arg2)
 {
-    (void) arg1;    /* not used */
+	(void) arg1;
 	(void) arg2;

 	fec_irq_handler(0);
@@ -1307,7 +1294,7 @@ int fec0_interrupt_handler(void* arg1, void* arg2)

 int fec1_interrupt_handler(void* arg1, void* arg2)
 {
-    (void) arg1;    /* not used */
+	(void) arg1;
 	(void) arg2;

 	fec_irq_handler(1);
@@ -1357,9 +1344,9 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
 		 */
 #if defined(MACHINE_FIREBEE)
 		if (am79c874_init(0, 0, speed, duplex))
-			dbg("PHY init completed\r\n");
+            dbg("PHY init completed\r\n");
 		else
-			dbg("PHY init failed\r\n");
+            dbg("PHY init failed\r\n");
 #elif defined(MACHINE_M548X)
 		bcm_5222_init(0, 0, speed, duplex);
 #else
@@ -1412,7 +1399,7 @@ void fec_eth_stop(uint8_t ch)
 	 */
 	level = set_ipl(7);

-	dbg("fec %d stopped\r\n", ch);
+    dbg("fec %d stopped\r\n", ch);
 	/*
 	 * Gracefully disable the receiver and transmitter
 	 */
@@ -1434,12 +1421,12 @@ void fec_eth_stop(uint8_t ch)
 	fec_log_dump(ch);
 #endif

-	/*
+	/* 
 	 * Flush the network buffers
 	 */
 	nbuf_flush();

-	/*
+	/* 
 	 * Restore interrupt level
 	 */
 	set_ipl(level);
--- a/pci/pci.c
+++ b/pci/pci.c
@@ -33,9 +33,9 @@
 #include "interrupts.h"
 #include "wait.h"

-#define DEBUG_PCI
+//#define DEBUG_PCI
 #ifdef DEBUG_PCI
-#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: " format "", ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DEBUG_PCI */
@@ -162,7 +162,7 @@ static int32_t pci_get_interrupt_cause(int32_t *handles)
 			return handle;
 		}
 	}
-    dbg("%s: no interrupt cause found\r\n");
+	dbg("%s: no interrupt cause found\r\n", __FUNCTION__);
 	return -1;
 }

@@ -189,7 +189,7 @@ void irq5_handler(void)
 		newvalue = pci_call_interrupt_chain(handle, value);
 		if (newvalue == value)
 		{
-            dbg("%s: interrupt not handled!\r\n");
+			dbg("%s: interrupt not handled!\r\n", __FUNCTION__);
 		}
 	}
 }
@@ -211,7 +211,7 @@ void irq7_handler(void)
 		newvalue = pci_call_interrupt_chain(handle, value);
 		if (newvalue == value)
 		{
-            dbg("%s: interrupt not handled!\r\n");
+			dbg("%s: interrupt not handled!\r\n", __FUNCTION__);
 		}
 	}
 }
@@ -587,168 +587,7 @@ int32_t pci_unhook_interrupt(int32_t handle)
 	return PCI_SUCCESSFUL;
 }

-/*
- * Not implemented PCI_BIOS functions
- */

-uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_special_cycle(uint16_t bus, uint32_t data)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_get_routing(int32_t handle)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_set_interrupt(int32_t handle)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_get_card_used(int32_t handle, uint32_t *address)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_set_card_used(int32_t handle, uint32_t *callback)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_get_machine_id(void)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_get_pagesize(void)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}
-
-int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer)
-{
-	return PCI_FUNC_NOT_SUPPORTED;
-}

 /*
 * pci_device_config()
@@ -810,7 +649,7 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
 			 */
 			struct pci_rd *rd = &descriptors[barnum]; 

-            dbg("%s: address = %08x\r\n", address);
+			dbg("%s: address = %08x\r\n", __FUNCTION__, address);
 			if (IS_PCI_MEM_BAR(address))
 			{
 				/* adjust base address to card's alignment requirements */
@@ -899,10 +738,10 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)

 		/* write it to PCIERBAR and enable ROM */
 		pci_write_config_longword(handle, PCIERBAR, swpl(address | 1));
-        dbg("%s: set PCIERBAR on device 0x%02x to 0x%08x\r\n", handle, address | 1);
+		dbg("%s: set PCIERBAR on device 0x%02x to 0x%08x\r\n", __FUNCTION__, handle, address | 1);

 		/* read value back just to be sure */
-        dbg("%s: PCIERBAR = %p\r\n", swpl(pci_read_config_longword(handle, PCIERBAR)));
+		dbg("%s: PCIERBAR = %p\r\n", __FUNCTION__, swpl(pci_read_config_longword(handle, PCIERBAR)));


 		rd->next = sizeof(struct pci_rd);
--- a/pci/pci_wrappers.S
+++ b/pci/pci_wrappers.S
@@ -1,469 +0,0 @@
-/*
- * pci.S
- *
- * Purpose:		PCI configuration for the Coldfire builtin PCI bridge.
- *
- * Notes:
- *
- * This file is part of BaS_gcc.
- *
- * BaS_gcc is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * BaS_gcc is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
- *
- *  Created on: 08.05.2014
- *      Author: David Galvez
- */
-
-.global _wrapper_find_pci_device
-.global _wrapper_find_pci_classcode
-
-.global _wrapper_read_config_longword
-.global _wrapper_read_config_word
-.global _wrapper_read_config_byte
-
-.global _wrapper_fast_read_config_byte
-.global _wrapper_fast_read_config_word
-.global _wrapper_fast_read_config_longword
-
-.global _wrapper_write_config_longword
-.global _wrapper_write_config_word
-.global _wrapper_write_config_byte
-
-.global _wrapper_get_resource
-.global _wrapper_hook_interrupt
-.global _wrapper_unhook_interrupt
-
-.global _wrapper_special_cycle
-.global _wrapper_get_routing
-.global _wrapper_set_interrupt
-.global _wrapper_get_resource
-.global _wrapper_get_card_used
-.global _wrapper_set_card_used
-
-.global _wrapper_read_mem_byte
-.global _wrapper_read_mem_word
-.global _wrapper_read_mem_longword
-
-.global _wrapper_fast_read_mem_byte
-.global _wrapper_fast_read_mem_word
-.global _wrapper_fast_read_mem_longword
-
-.global _wrapper_write_mem_byte
-.global _wrapper_write_mem_word
-.global _wrapper_write_mem_longword
-
-.global _wrapper_read_io_byte
-.global _wrapper_read_io_word
-.global _wrapper_read_io_longword
-
-.global _wrapper_fast_read_io_byte
-.global _wrapper_fast_read_io_word
-.global _wrapper_fast_read_io_longword
-
-.global _wrapper_write_io_byte
-.global _wrapper_write_io_word
-.global _wrapper_write_io_longword
-
-.global _wrapper_get_machine_id
-.global _wrapper_get_pagesize
-
-.global _wrapper_virt_to_bus
-.global _wrapper_bus_to_virt
-.global _wrapper_virt_to_phys
-.global _wrapper_phys_to_virt
-
-
-_wrapper_find_pci_device:
-	move.l D1,-(SP)			// index
-	move.l D0,-(SP)			// Vendor ID
-	move.l #16,D1
-	lsr.l D1,D0
-	move.l D0,-(SP)			// Device ID
-	jsr _pci_find_device
-	add.l #12,SP
-	rts
-
-_wrapper_find_pci_classcode:
-	move.l D1,-(SP)			// index
-	move.l D0,-(SP)			// ID
-	jsr _pci_find_classcode
-	addq.l #8,SP
-	rts
-
-_wrapper_read_config_byte:
-	move.l A0,-(SP)			// pointer to space for read data
-	move.l D1,-(SP)			// PCI register
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_config_byte
-	move.l 8(SP),A0			// PCI_BIOS expects value in memory
-	move.l D0,(A0)
-	add.l #12,SP
-	move.l #0,D0
-	rts
-
-_wrapper_read_config_word:
-	move.l A0,-(SP)			// pointer to space for read data
-	move.l D1,-(SP)			// PCI register
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_config_word
-	move.l 8(SP),A0			// little to big endian
-	move.l D0,(A0)
-	mvz.b 1(A0),D0
-	lsl.l #8,D0
-	move.b (A0),D0
-	move.l D0,(A0)			// PCI_BIOS expects value in memory, not in D0
-	add.l #12,SP
-	move.l #0,D0
-	rts
-
-_wrapper_read_config_longword:
-	move.l A0,-(SP)			// pointer to space for read data
-	move.l D1,-(SP)			// PCI register
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_config_longword
-	move.l 8(SP),A0			// little to big endian
-	move.l D0,(A0)
-	mvz.b 3(A0),D0
-	lsl.l #8,D0
-	move.b 2(A0),D0
-	lsl.l #8,D0
-	move.b 1(A0),D0
-	lsl.l #8,D0
-	move.b (A0),D0
-	move.l D0,(A0)			// PCI_BIOS expects value in memory, not in D0
-	add.l #12,SP
-	move.l #0,D0
-	rts
-
-/* Not implemented */
-_wrapper_fast_read_config_byte:
-	move.l D1,-(SP)			// PCI register
-	move.l D0,-(SP)			// handle
-	jsr _pci_fast_read_config_byte
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_fast_read_config_word:
-	move.l D1,-(SP)			// PCI register
-	move.l D0,-(SP)			// handle
-	jsr _pci_fast_read_config_word
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_fast_read_config_longword:
-	move.l D1,-(SP)			// PCI register
-	move.l D0,-(SP)			// handle
-	jsr _pci_fast_read_config_longword
-	addq.l #8,SP
-	rts
-
-_wrapper_write_config_byte:
-	move.l D2,-(SP)			// data to write
-	move.l D1,-(SP)			// PCI register
-	move.l D0,-(SP)			// handle
-	jsr _pci_write_config_byte
-	add.l #12,SP
-	rts
-
-_wrapper_write_config_word:
-	move.l D0,-(SP)			// make data little endian
-	moveq #0,D1
-	move.w D2,D1
-	lsr.l #8,D1
-	asl.l #8,D2
-	or.l D1,D2
-	move.l (SP)+,D0
-	move.l D2,-(SP)			// data to write
-	move.l D1,-(SP)			// PCI register
-	move.l D0,-(SP)			// handle
-	jsr _pci_write_config_word
-	add.l #12,SP
-	rts
-
-_wrapper_write_config_longword:
-	move.l D0,-(SP)
-	move.l D2,D0			// make data little endian
-	lsr.l #8,D0
-	asl.l #8,D2
-	and.l #0x00FF00FF,D0
-	and.l #0xFF00FF00,D2
-	or.l D0,D2
-	swap D2
-	move.l (SP)+,D0
-	move.l D2,-(SP)			// data to write
-	move.l D1,-(SP)			// PCI register
-	move.l D0,-(SP)			// handle
-	jsr _pci_write_config_longword
-	add.l #12,SP
-	rts
-
-_wrapper_hook_interrupt:
-	move.l A1,-(SP)			// parameter for interrupt handler
-	move.l A0,-(SP)			// pointer to interrupt handler
-	move.l D0,-(SP)			// handle
-	jsr _pci_hook_interrupt
-	add.l #12,SP
-	rts
-
-_wrapper_unhook_interrupt:
-	move.l D0,-(SP)			// handle
-	jsr _pci_unhook_interrupt
-	addq.l #4,SP
-	rts
-
-/* Not implemented */
-_wrapper_special_cycle:
-	move.l D1,-(SP)			// special cycle data
-	move.l D0,-(SP)			// bus number
-	jsr _pci_special_cycle
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_get_routing:
-	move.l D0,-(SP)			// handle
-	jsr _pci_get_routing
-	addq.l #4,SP
-	rts
-
-/* Not implemented */
-_wrapper_set_interrupt:
-	move.l D1,-(SP)			// mode
-	move.l D0,-(SP)			// handle
-	jsr _pci_set_interrupt
-	addq.l #8,SP
-	rts
-
-_wrapper_get_resource:
-	move.l D0,-(SP)			// handle
-	jsr _pci_get_resource
-	addq.l #4,SP
-	rts
-
-/* Not implemented */
-_wrapper_get_card_used:
-	move.l D1,-(SP)			// address
-	move.l D0,-(SP)			// handle
-	jsr _pci_get_card_used
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_set_card_used:
-	move.l A0,-(SP)			// callback
-	move.l D0,-(SP)			// handle
-	jsr _pci_set_card_used
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_read_mem_byte:
-	move.l A0,-(SP)			// pointer to data in memory
-	move.l D1,-(SP)			// address to access (in PCI memory address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_mem_byte
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_read_mem_word:
-	move.l A0,-(SP)			// pointer to data in memory
-	move.l D1,-(SP)			// address to access (in PCI memory address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_mem_word
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_read_mem_longword:
-	move.l A0,-(SP)			// pointer to data in memory
-	move.l D1,-(SP)			// address to access (in PCI memory address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_mem_longword
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_fast_read_mem_byte:
-	move.l D1,-(SP)			// address to access (in PCI memory address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_mem_byte
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_fast_read_mem_word:
-	move.l D1,-(SP)			// address to access (in PCI memory address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_mem_word
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_fast_read_mem_longword:
-	move.l D1,-(SP)			// address to access (in PCI memory address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_mem_longword
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_write_mem_byte:
-	move.l D2,-(SP)			// data to write
-	move.l D1,-(SP)			// address to access (in PCI memory address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_write_mem_byte
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_write_mem_word:
-	move.l D2,-(SP)			// data to write
-	move.l D1,-(SP)			// address to access (in PCI memory address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_write_mem_word
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_write_mem_longword:
-	move.l D2,-(SP)			// data to write
-	move.l D1,-(SP)			// address to access (in PCI memory address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_write_mem_longword
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_read_io_byte:
-	move.l A0,-(SP)			// pointer to data in memory
-	move.l D1,-(SP)			// address to access (in PCI I/O address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_io_byte
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_read_io_word:
-	move.l A0,-(SP)			// pointer to data in memory
-	move.l D1,-(SP)			// address to access (in PCI I/O address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_io_word
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_read_io_longword:
-	move.l A0,-(SP)			// pointer to data in memory
-	move.l D1,-(SP)			// address to access (in PCI I/O address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_io_longword
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_fast_read_io_byte:
-	move.l D1,-(SP)			// address to access (in PCI I/O address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_io_byte
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_fast_read_io_word:
-	move.l D1,-(SP)			// address to access (in PCI I/O address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_io_word
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_fast_read_io_longword:
-	move.l D1,-(SP)			// address to access (in PCI I/O address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_read_io_longword
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_write_io_byte:
-	move.l D2,-(SP)			// data to write
-	move.l D1,-(SP)			// address to access (in PCI I/O address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_write_io_byte
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_write_io_word:
-	move.l D2,-(SP)			// data to write
-	move.l D1,-(SP)			// address to access (in PCI I/O address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_write_io_word
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_write_io_longword:
-	move.l D2,-(SP)			// data to write
-	move.l D1,-(SP)			// address to access (in PCI I/O address space)
-	move.l D0,-(SP)			// handle
-	jsr _pci_write_io_longword
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_get_machine_id:
-	jsr _pci_get_machine_id
-	rts
-
-/* Not implemented */
-_wrapper_get_pagesize:
-	jsr _pci_get_pagesize
-	rts
-
-/* Not implemented */
-_wrapper_virt_to_bus:
-	move.l A0,-(SP)			// ptr
-	move.l D1,-(SP)			// address in virtual CPU space
-	move.l D0,-(SP)			// handle
-	jsr _pci_virt_to_bus
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_bus_to_virt:
-	move.l A0,-(SP)			// ptr
-	move.l D1,-(SP)			// PCI bus address
-	move.l D0,-(SP)			// handle
-	jsr _pci_bus_to_virt
-	add.l #12,SP
-	rts
-
-/* Not implemented */
-_wrapper_virt_to_phys:
-	move.l A0,-(SP)			// ptr
-	move.l D0,-(SP)			// address in virtual CPU space
-	jsr _pci_virt_to_phys
-	addq.l #8,SP
-	rts
-
-/* Not implemented */
-_wrapper_phys_to_virt:
-	move.l A0,-(SP)			// ptr
-	move.l D0,-(SP)			// physical CPU address 
-	jsr _pci_phys_to_virt
-	addq.l #8,SP
-	rts
--- a/radeon/radeon_cursor.c
+++ b/radeon/radeon_cursor.c
@@ -44,13 +44,11 @@
 *
 */

-#include "bas_types.h"
-#include "bas_printf.h"
 #include "radeonfb.h"

 #define DBG_RADEON
 #ifdef DBG_RADEON
-#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_RADEON */
@@ -68,20 +66,20 @@
 #define CURSOR_SWAPPING_DECL_MMIO
 #define CURSOR_SWAPPING_DECL	    unsigned long  __surface_cntl=0;
 #define CURSOR_SWAPPING_START() \
-    if (rinfo->big_endian) \
+	if(rinfo->big_endian) \
    OUTREG(SURFACE_CNTL, \
 	   ((__surface_cntl = INREG(SURFACE_CNTL)) | \
 	    NONSURF_AP0_SWP_32BPP) & \
 	   ~NONSURF_AP0_SWP_16BPP);
 #define CURSOR_SWAPPING_END() \
-    if (rinfo->big_endian) \
+	if(rinfo->big_endian) \
 	(OUTREG(SURFACE_CNTL, __surface_cntl));

 /* Set cursor foreground and background colors */
 void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
 {
 	struct radeonfb_info *rinfo = info->par;
-    unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base + rinfo->cursor_start);
+	unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base+rinfo->cursor_start);
 	int pixel, i;
 	CURSOR_SWAPPING_DECL_MMIO
 	CURSOR_SWAPPING_DECL
@@ -90,17 +88,15 @@ void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
 	fg |= 0xff000000;
 	bg |= 0xff000000;
 	/* Don't recolour the image if we don't have to. */
-    if (fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
+	if(fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
 		return;
 	CURSOR_SWAPPING_START();
-
-    /*
-     * Note: We assume that the pixels are either fully opaque or fully
+	/* Note: We assume that the pixels are either fully opaque or fully
 	 * transparent, so we won't premultiply them, and we can just
 	 * check for non-zero pixel values; those are either fg or bg
 	 */
-    for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
-        if ((pixel = *pixels))
+	for(i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
+		if((pixel = *pixels))
 			*pixels = (pixel == rinfo->cursor_fg) ? fg : bg;
 	CURSOR_SWAPPING_END();
 	rinfo->cursor_fg = fg;
@@ -116,30 +112,27 @@ void radeon_set_cursor_position(struct fb_info *info, int x, int y)
 	struct fb_var_screeninfo *mode = &info->var;
 	int xorigin = 0;
 	int yorigin = 0;
-    if (mode->vmode & FB_VMODE_DOUBLE)
+	if(mode->vmode & FB_VMODE_DOUBLE)
 		y <<= 1;
-    if (x < 0)
+	if(x < 0)
 		xorigin = 1 - x;
-    if (y < 0)
+	if(y < 0)
 	  yorigin = 1 - y;
-
 //	DPRINTVALHEX("radeonfb: RADEONSetCursorPosition: cursor_start ",rinfo->cursor_start);
 //	DPRINTVAL(" x ",x);
 //	DPRINTVAL(" y ",y);
 //	DPRINT("\r\n");
-
 	OUTREG(CUR_HORZ_VERT_OFF, (CUR_LOCK  | (xorigin << 16) | yorigin));
 	OUTREG(CUR_HORZ_VERT_POSN, (CUR_LOCK | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y)));
 	OUTREG(CUR_OFFSET, rinfo->cursor_start + yorigin * 256);
 	rinfo->cursor_x = (unsigned long)x;
-    if (mode->vmode & FB_VMODE_DOUBLE)
-        rinfo->cursor_y = (unsigned long) y >> 1;
+	if(mode->vmode & FB_VMODE_DOUBLE)
+		rinfo->cursor_y = (unsigned long)y >> 1;
 	else
-        rinfo->cursor_y = (unsigned long) y;
+		rinfo->cursor_y = (unsigned long)y;
 }

-/*
- * Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
+/* Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
 * will be called after this, so we can ignore xorigin and yorigin.
 */
 void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom)
@@ -150,14 +143,11 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 	unsigned short chunk, mchunk;
 	unsigned long i, j, k;
 	CURSOR_SWAPPING_DECL
-
 //	DPRINTVALHEX("radeonfb: RADEONLoadCursorImage: cursor_start ",rinfo->cursor_start);
-//	DPRINT("\r\n");
-
+//	DPRINT("\r\n");	
 	save = INREG(CRTC_GEN_CNTL) & ~(unsigned long) (3 << 20);
 	save |= (unsigned long) (2 << 20);
 	OUTREG(CRTC_GEN_CNTL, save & (unsigned long)~CRTC_CUR_EN);
-
 	/*
 	 * Convert the bitmap to ARGB32.
 	 */
@@ -167,22 +157,22 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 	{
 	case 1:
 	default:
-        for (i = 0; i < CURSOR_HEIGHT; i++)
+		for(i = 0; i < CURSOR_HEIGHT; i++)
 		{
-            if (i < 16)
+			if(i < 16)
 			{
 				mchunk = *mask++;
 				chunk = *data++;
 			}
 			else
 				mchunk = chunk = 0;
-            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
+			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
 			{
-                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-                    if (mchunk & 0x8000)
+					if(mchunk & 0x8000)
 					{
-                        if (chunk & 0x8000)
+						if(chunk & 0x8000)
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 						else
 							*d++ = 0xffffffff; /* White, fully opaque. */
@@ -194,13 +184,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 		}
 		break;
 	case 2:
-        for (i = 0; i < CURSOR_HEIGHT; i++)
+		for(i = 0; i < CURSOR_HEIGHT; i++)
 		{
-            if (i < 16*2)
+			if(i < 16*2)
 			{
 				mchunk = *mask;
 				chunk = *data;
-                if ((i & 1) == 1)
+				if((i & 1) == 1)
 				{
 					mask++;
 					data++;
@@ -208,13 +198,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 			}
 			else
 				mchunk = chunk = 0;
-            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
+			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
 			{
-                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-                    if (mchunk & 0x8000)
+					if(mchunk & 0x8000)
 					{
-                        if (chunk & 0x8000)
+						if(chunk & 0x8000)
 						{
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 							*d++ = 0xff000000; 
@@ -235,13 +225,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 		}
 		break;
 	case 4:
-        for (i = 0; i < CURSOR_HEIGHT; i++)
+		for(i = 0; i < CURSOR_HEIGHT; i++)
 		{
-            if (i < 16 * 4)
+			if(i < 16*4)
 			{
 				mchunk = *mask;
 				chunk = *data;
-                if ((i & 3) == 3)
+				if((i & 3) == 3)
 				{
 					mask++;
 					data++;
@@ -249,13 +239,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 			}
 			else
 				mchunk = chunk = 0;
-            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
+			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
 			{
-                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-                    if (mchunk & 0x8000)
+					if(mchunk & 0x8000)
 					{
-                        if (chunk & 0x8000)
+						if(chunk & 0x8000)
 						{
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 							*d++ = 0xff000000; 
@@ -292,7 +282,6 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 void radeon_hide_cursor(struct fb_info *info)
 {
 	struct radeonfb_info *rinfo = info->par;
-
 //	DPRINT("radeonfb: RADEONHideCursor\r\n");
 	OUTREGP(CRTC_GEN_CNTL, 0, ~CRTC_CUR_EN);
 	rinfo->cursor_show = 0;
@@ -302,7 +291,6 @@ void radeon_hide_cursor(struct fb_info *info)
 void radeon_show_cursor(struct fb_info *info)
 {
 	struct radeonfb_info *rinfo = info->par;
-
 //	DPRINT("radeonfb: RADEONShowCursor\r\n");
 	OUTREGP(CRTC_GEN_CNTL, CRTC_CUR_EN, ~CRTC_CUR_EN);
 	rinfo->cursor_show = 1;
@@ -315,9 +303,9 @@ long radeon_cursor_init(struct fb_info *info)
 	int size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
 	unsigned long fbarea = offscreen_alloc(rinfo->info, size_bytes + 256);

-    dbg("radeonfb: %s: fbarea: %p\r\n", fbarea);
+	dbg("radeonfb: %s: fbarea: %p\r\n", __FUNCTION__, fbarea);

-    if (!fbarea)
+	if(!fbarea)
 		rinfo->cursor_start = 0;
 	else
 	{
--- a/sys/BaS.c
+++ b/sys/BaS.c
@@ -96,20 +96,20 @@ static inline bool pic_rxready(void)

 void write_pic_byte(uint8_t value)
 {
-	/* Wait until the transmitter is ready or 1000us are passed */
+    /* Wait until the transmitter is ready or 1000us are passed */
 	waitfor(1000, pic_txready);

-	/* Transmit the byte */
-	*(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT) = value; // Really 8-bit
+    /* Transmit the byte */
+    *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT) = value; // Really 8-bit
 }

 uint8_t read_pic_byte(void)
 {
-	/* Wait until a byte has been received or 1000us are passed */
+    /* Wait until a byte has been received or 1000us are passed */
 	waitfor(1000, pic_rxready);

-	/* Return the received byte */
-	return *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT); // Really 8-bit
+    /* Return the received byte */
+    return *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT); // Really 8-bit
 }

 void pic_init(void)
@@ -271,13 +271,13 @@ void network_init(void)
 		return;
 	}

-	/*
-	 * Register the DMA interrupt handler
-	 */
-	handler = dma_interrupt_handler;
-	vector = 112;
+    /*
+     * Register the DMA interrupt handler
+     */
+    handler = dma_interrupt_handler;
+    vector = 112;

-	if (!isr_register_handler(vector, handler, NULL,NULL))
+    if (!isr_register_handler(vector, handler, NULL,NULL))
 	{
 		dbg("%s: Error: Unable to register handler for vector %s\r\n", __FUNCTION__, vector);
 		return;
@@ -291,10 +291,10 @@ void network_init(void)
 	memcpy(nif1.hwa, mac, 6);
 	memcpy(nif1.broadcast, bc, 6);

-	dbg("%s: ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n", __FUNCTION__,
+	dbg("%s: ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n", __FUNCTION__, 
 				nif1.hwa[0], nif1.hwa[1], nif1.hwa[2],
 				nif1.hwa[3], nif1.hwa[4], nif1.hwa[5]);
-
+	
 	timer_init(TIMER_NETWORK, TMR_INTC_LVL, TMR_INTC_PRI);

 	arp_init(&arp_info);
@@ -346,16 +346,16 @@ void BaS(void)
 	MCF_MMU_MMUCR = MCF_MMU_MMUCR_EN;			/* MMU on */
 	NOP();										/* force pipeline sync */
 	xprintf("finished\r\n");
-
+	
 	#ifdef MACHINE_FIREBEE
 	xprintf("IDE reset: ");
 	/* IDE reset */
 	* (volatile uint8_t *) (0xffff8802 - 2) = 14;
 	* (volatile uint8_t *) (0xffff8802 - 0) = 0x80;
 	wait(1);
-
+	
 	* (volatile uint8_t *) (0xffff8802 - 0) = 0;
-
+	
 	xprintf("finished\r\n");
 	xprintf("enable video: ");
 	/*
@@ -384,22 +384,22 @@ void BaS(void)
 #ifdef _NOT_USED_
 	screen_init();

-		/* experimental */
-	{
-		int i;
-		uint32_t *scradr = 0xd00000;
+	    /* experimental */
+    {
+        int i;
+        uint32_t *scradr = 0xd00000;

-		for (i = 0; i < 100; i++)
-		{
-			uint32_t *p = scradr;
+        for (i = 0; i < 100; i++)
+        {
+            uint32_t *p = scradr;

-			for (p = scradr; p < scradr + 1024 * 150L; p++)
-			{
+            for (p = scradr; p < scradr + 1024 * 150L; p++)
+            {
 				*p = 0xffffffff;
-			}
+		    }

 			for (p = scradr; p < scradr + 1024 * 150L; p++)
-			{
+		    {
 				*p = 0x0;
 			}
 		}
@@ -442,11 +442,10 @@ void BaS(void)

 	/* Jump into the OS */
 	typedef void void_func(void);
-	struct rom_header
-	{
+	typedef struct {
 		void *initial_sp;
 		void_func *initial_pc;
-	};
+	} ROM_HEADER;

 	xprintf("BaS initialization finished, enable interrupts\r\n");
 	enable_coldfire_interrupts();
@@ -455,6 +454,6 @@ void BaS(void)
 	network_init();

 	xprintf("call EmuTOS\r\n");
-	struct rom_header *os_header = (struct rom_header *) TOS;
+	ROM_HEADER* os_header = (ROM_HEADER*)TOS;
 	os_header->initial_pc();
 }
--- a/sys/exceptions.S
+++ b/sys/exceptions.S
--- a/sys/init_fpga.c
+++ b/sys/init_fpga.c
@@ -33,16 +33,10 @@
 #define FPGA_DATA0		(1 << 3)
 #define FPGA_CONF_DONE	(1 << 5)

-extern uint8_t _FPGA_CONFIG[];
-#define FPGA_FLASH_DATA	&_FPGA_CONFIG[0]
-extern uint8_t _FPGA_CONFIG_SIZE[];
-#define FPGA_FLASH_DATA_SIZE	((uint32_t) &_FPGA_CONFIG_SIZE[0])
-
-/*
- * flag located in processor SRAM1 that indicates that the FPGA configuration has
- * been loaded through JTAG. init_fpga() will honour this and not overwrite config.
- */
-extern int32_t _FPGA_JTAG_LOADED;
+extern uint8_t _FPGA_FLASH_DATA[];
+#define FPGA_FLASH_DATA	&_FPGA_FLASH_DATA[0]
+extern uint8_t _FPGA_FLASH_DATA_SIZE[];
+#define FPGA_FLASH_DATA_SIZE	((uint32_t) &_FPGA_FLASH_DATA_SIZE[0])

 void config_gpio_for_fpga_config(void)
 {
@@ -84,15 +78,7 @@ bool init_fpga(void)
 	volatile int32_t time, start, end;
 	int i;

-	xprintf("FPGA load config (_FPGA_JTAG_LOADED = %x)...", _FPGA_JTAG_LOADED);
-	if (_FPGA_JTAG_LOADED == 1)
-	{
-		xprintf("detected _FPGA_JTAG_LOADED flag. Not overwriting FPGA config.\r\n");
-
-		/* reset the flag so that next boot will load config again from flash */
-		_FPGA_JTAG_LOADED = 0;
-		return true;
-	}
+	xprintf("FPGA load config... ");
 	start = MCF_SLT0_SCNT;

 	config_gpio_for_fpga_config();
--- a/sys/mmu.c
+++ b/sys/mmu.c
@@ -24,26 +24,6 @@
 * Copyright 2013        M. Froeschle
 */

-#define ACR_BA(x)                   ((x) & 0xffff0000)
-#define ACR_ADMSK(x)                (((x) & 0xffff) << 16)
-#define ACR_E(x)                    (((x) & 1) << 15)
-
-#define ACR_S(x)                    (((x) & 3) << 13)
-#define ACR_S_USERMODE              0
-#define ACR_S_SUPERVISOR_MODE       1
-#define ACR_S_ALL                   2
-
-#define ACR_AMM(x)                  (((x) & 1) << 10)
-
-#define ACR_CM(x)                   (((x) & 3) << 5)
-#define ACR_CM_CACHEABLE_WT         0x0
-#define ACR_CM_CACHEABLE_CB         0x1
-#define ACR_CM_CACHE_INH_PRECISE    0x2
-#define ACR_CM_CACHE_INH_IMPRECISE  0x3
-
-#define ACR_SP(x)           (((x) & 1) << 3)
-#define ACR_W(x)            (((x) & 1) << 2)
-
 #include <stdint.h>
 #include "bas_printf.h"
 #include "bas_types.h"
@@ -62,12 +42,12 @@
 #error "unknown machine!"
 #endif /* MACHINE_FIREBEE */

-//#define DEBUG_MMU
-#ifdef DEBUG_MMU
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg);} while(0)
+#define DBG_MMU
+#ifdef DBG_MMU
+#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg);} while(0)
 #else
 #define dbg(format, arg...) do {;} while (0)
-#endif /* DEBUG_MMU */
+#endif /* DBG_MMU */

 /*
 * set ASID register
@@ -79,11 +59,11 @@ inline uint32_t set_asid(uint32_t value)
 	uint32_t ret = rt_asid;

 	__asm__ __volatile__(
-		"movec		%[value],ASID\n\t"
-		: /* no output */
-		: [value] "r" (value)
-		:
-	);
+			"movec		%[value],ASID\n\t"
+			: /* no output */
+			: [value] "r" (value)
+			:
+			);

 	rt_asid = value;

@@ -101,11 +81,11 @@ inline uint32_t set_acr0(uint32_t value)
 	uint32_t ret = rt_acr0;

 	__asm__ __volatile__(
-		"movec		%[value],ACR0\n\t"
-		: /* not output */
-		: [value] "r" (value)
-		:
-	);
+			"movec		%[value],ACR0\n\t"
+			: /* not output */
+			: [value] "r" (value)
+			:
+			);
 	rt_acr0 = value;

 	return ret;
@@ -121,11 +101,11 @@ inline uint32_t set_acr1(uint32_t value)
 	uint32_t ret = rt_acr1;

 	__asm__ __volatile__(
-		"movec		%[value],ACR1\n\t"
-		: /* not output */
-		: [value] "r" (value)
-		:
-	);
+			"movec		%[value],ACR1\n\t"
+			: /* not output */
+			: [value] "r" (value)
+			:
+			);
 	rt_acr1 = value;

 	return ret;
@@ -142,11 +122,11 @@ inline uint32_t set_acr2(uint32_t value)
 	uint32_t ret = rt_acr2;

 	__asm__ __volatile__(
-		"movec		%[value],ACR2\n\t"
-		: /* not output */
-		: [value] "r" (value)
-		:
-	);
+			"movec		%[value],ACR2\n\t"
+			: /* not output */
+			: [value] "r" (value)
+			:
+			);
 	rt_acr2 = value;

 	return ret;
@@ -162,11 +142,11 @@ inline uint32_t set_acr3(uint32_t value)
 	uint32_t ret = rt_acr3;

 	__asm__ __volatile__(
-		"movec		%[value],ACR3\n\t"
-		: /* not output */
-		: [value] "r" (value)
-		:
-	);
+			"movec		%[value],ACR3\n\t"
+			: /* not output */
+			: [value] "r" (value)
+			:
+			);
 	rt_acr3 = value;

 	return ret;
@@ -178,277 +158,376 @@ inline uint32_t set_mmubar(uint32_t value)
 	uint32_t ret = rt_mmubar;

 	__asm__ __volatile__(
-		"movec		%[value],MMUBAR\n\t"
-		: /* no output */
-		: [value] "r" (value)
-		: /* no clobber */
-	);
+			"movec		%[value],MMUBAR\n\t"
+			: /* no output */
+			: [value] "r" (value)
+			: /* no clobber */
+			);
 	rt_mmubar = value;
 	NOP();

 	return ret;
 }

+
+
+/*
+ * TODO: this would be nicer in an include file
+ */
+extern uint8_t _SYS_SRAM[];
+#define SYS_SRAM_ADDRESS ((uint32_t) &_SYS_SRAM[0])
+extern uint8_t _SYS_SRAM_SIZE[];
+extern uint8_t _FASTRAM_END[];
+
+struct mmu_mapping
+{
+	uint32_t phys;
+	uint32_t virt;
+	uint32_t length;
+	uint32_t pagesize;
+	struct map_flags flags;
+};
+
+static struct mmu_mapping locked_map[] =
+{
+	{
+		/* Falcon video memory. Needs special care */
+		0x60d00000,
+		0xd00000,
+		0x100000,
+		MMU_PAGE_SIZE_1M,
+		{ CACHE_WRITETHROUGH, SV_USER, SCA_PAGE_ID, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
+	},
+};
+
+static int num_locked_mmu_maps = sizeof(locked_map) / sizeof(struct mmu_mapping);
+
+static struct mmu_mapping memory_map[] =
+{
+	/* map OS system vectors supervisor-protected */
+	{
+		0,
+		0,
+		0x800,
+		MMU_PAGE_SIZE_1K,
+		{ CACHE_WRITETHROUGH, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
+	},
+	{
+		0x800,
+		0x800,
+		0x800,
+		MMU_PAGE_SIZE_1K,
+		{ CACHE_WRITETHROUGH, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
+	},
+	{
+		/* when the first 4k are filled with 1k pages, we can switch to 8k pages */
+		0x1000,
+		0x1000,
+		0xff000,
+		MMU_PAGE_SIZE_8K,
+		{ CACHE_WRITETHROUGH, SV_USER, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
+	},
+	{
+		/* arrived at a 1Meg border, we can switch to 1Meg pages */
+		0x100000,
+		0x100000,
+		0xc00000,
+		MMU_PAGE_SIZE_1M,
+		{ CACHE_WRITETHROUGH, SV_USER, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
+	},
+	/* Falcon video ram left out intentionally here (see above) */
+	{
+		/* ROM */
+		0xe00000,
+		0xe00000,
+		0x100000,
+		MMU_PAGE_SIZE_1M,
+		{ CACHE_WRITETHROUGH, SV_USER, 0, ACCESS_READ | ACCESS_EXECUTE },
+	},
+	{
+		/* FASTRAM */
+		0x1000000,
+		0x1000000,
+		(uint32_t) _FASTRAM_END - 0x1000000,
+		MMU_PAGE_SIZE_1M,
+		{ CACHE_WRITETHROUGH, SV_USER, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
+	},
+	{
+		/* MBAR */
+		MBAR_ADDRESS,
+		MBAR_ADDRESS,
+		0x100000,
+		MMU_PAGE_SIZE_1M,
+		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
+	},
+	{
+		/* RAMBAR0 */
+		RAMBAR0_ADDRESS,
+		RAMBAR0_ADDRESS,
+		(uint32_t) _RAMBAR0_SIZE,
+		MMU_PAGE_SIZE_1K,
+		{ CACHE_WRITETHROUGH, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
+	},
+	{
+		/* RAMBAR1 */
+		RAMBAR1_ADDRESS,
+		RAMBAR1_ADDRESS,
+		(uint32_t) _RAMBAR1_SIZE,
+		MMU_PAGE_SIZE_1K,
+		{ CACHE_WRITETHROUGH, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
+	},
+	{
+		/* SYSTEM SRAM */
+		SYS_SRAM_ADDRESS,
+		SYS_SRAM_ADDRESS,
+		(uint32_t) _SYS_SRAM_SIZE,
+		MMU_PAGE_SIZE_8K,
+		{ CACHE_WRITETHROUGH, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
+	},
+	{
+		/* Firebee FPGA registers */
+		(uint32_t) 0xf0000000,
+		(uint32_t) 0xf0000000,
+		(uint32_t) 0x08000000,
+		MMU_PAGE_SIZE_1M,
+		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
+	},
+	{
+		/* Falcon I/O registers */
+		(uint32_t) 0xfff00000,
+		(uint32_t) 0xfff00000,
+		(uint32_t) 0x100000,
+		MMU_PAGE_SIZE_1M,
+		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
+	},
+	{
+		/* the same, but different virtual address */
+		(uint32_t) 0x00f00000,
+		(uint32_t) 0xfff00000,
+		(uint32_t) 0x100000,
+		MMU_PAGE_SIZE_1M,
+		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
+	},
+	{
+		/* PCI memory */
+		(uint32_t) PCI_MEMORY_OFFSET,
+		(uint32_t) PCI_MEMORY_OFFSET,
+		(uint32_t) PCI_MEMORY_SIZE,
+		MMU_PAGE_SIZE_1M,
+		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
+	},
+	{
+		/* PCI I/O */
+		(uint32_t) PCI_IO_OFFSET,
+		(uint32_t) PCI_IO_OFFSET,
+		(uint32_t) PCI_IO_SIZE,
+		MMU_PAGE_SIZE_1M,
+		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
+	}
+};
+
+static int num_mmu_maps = sizeof(memory_map) / sizeof(struct mmu_mapping);
+
+static struct mmu_mapping *lookup_mapping(uint32_t virt)
+{
+	int i;
+
+	/*
+	 * dumb, for now
+	 */
+
+	for (i = 0; i < num_mmu_maps; i++)
+	{
+		if (virt >= memory_map[i].virt && virt <= memory_map[i].virt + memory_map[i].length - 1)
+			return &memory_map[i];
+	}
+	return NULL;
+}
+
 void mmu_init(void)
 {
 	extern uint8_t _MMUBAR[];
 	uint32_t MMUBAR = (uint32_t) &_MMUBAR[0];
-	extern uint8_t _TOS[];
-	uint32_t TOS = (uint32_t) &_TOS[0];
+	int i;

 	set_asid(0);			/* do not use address extension (ASID provides virtual 48 bit addresses */

-	/* set data access attributes in ACR0 and ACR1 */
-	set_acr0(ACR_W(0) |								/* read and write accesses permitted */
-			ACR_SP(0) |								/* supervisor and user mode access permitted */
-			ACR_CM(ACR_CM_CACHE_INH_PRECISE) |		/* cache inhibit, precise */
-			ACR_AMM(0) |							/* control region > 16 MB */
-			ACR_S(ACR_S_ALL) |						/* match addresses in user and supervisor mode */
-			ACR_E(1) |								/* enable ACR */
-#if defined(MACHINE_FIREBEE)
-			ACR_ADMSK(0x7f) |						/* cover 2GB area from 0x80000000 to 0xffffffff */
-			ACR_BA(0x80000000));					/* (equals area from 3 to 4 GB */
-#elif defined(MACHINE_M5484LITE)
-			ACR_ADMSK(0x7f) |						/* cover 2 GB area from 0x80000000 to 0xffffffff */
-			ACR_BA(0x80000000));
-#elif defined(MACHINE_M54455)
-			ACR_ADMSK(0x7f) |
-			ACR_BA(0x80000000));					/* FIXME: not determined yet */
-#else
-#error unknown machine!
-#endif /* MACHINE_FIREBEE */
+	/*
+	 * need to set data ACRs in a way that supervisor access to all memory regions
+	 * becomes possible. Otherways it might be that the supervisor stack ends up in an unmapped
+	 * region when further MMU TLB entries force a page steal. This would lead to a double
+	 * fault since the CPU wouldn't be able to push its exception stack frame during an access
+	 * exception
+	 */

-	// set_acr1(0x601fc000);
-	set_acr1(ACR_W(0) |
-			ACR_SP(0) |
-			ACR_CM(0) |
-#if defined(MACHINE_FIREBEE)
-			ACR_CM(ACR_CM_CACHEABLE_WT) |			/* video RAM on the Firebee */
-#elif defined(MACHINE_M5484LITE)
-			ACR_CM(ACR_CM_CACHE_INH_PRECISE) |		/* Compact Flash on the M548xLITE */
-#elif defined(MACHINE_M54455)
-			ACR_CM(ACR_CM_CACHE_INH_PRECISE) |		/* FIXME: not determined yet */
-#else
-#error unknown machine!
-#endif /* MACHINE_FIREBEE */
-			ACR_AMM(0) |
-			ACR_S(ACR_S_ALL) |
+	/* set data access attributes in ACR0 and ACR1 */
+
+	set_acr0(ACR_WRITE_PROTECT(0) |			/* read and write accesses permitted */
+			ACR_SUPERVISOR_PROTECT(0) |		/* supervisor and user mode access permitted */
+			ACR_CACHE_MODE(CACHE_WRITETHROUGH) |	/* cacheable, write through */
+			ACR_ADDRESS_MASK_MODE(1) | 		/* region 13 MByte */
+			ACR_S(ACR_S_SUPERVISOR_MODE) |	/* memory only visible from supervisor mode */
+			ACR_E(1) |						/* enable ACR */
+			ACR_ADMSK(0x0a) |				/* cover 12 MByte from 0x0 */
+			ACR_BA(0));						/* start from 0x0 */
+
+	set_acr1(ACR_WRITE_PROTECT(0) |			/* read and write accesses permitted */
+			ACR_SUPERVISOR_PROTECT(0) |		/* supervisor and user mode access permitted */
+			ACR_CACHE_MODE(CACHE_WRITETHROUGH) |	/* cacheable, write through */
+			ACR_ADDRESS_MASK_MODE(0) | 		/* region > 16 MByte */
+			ACR_S(ACR_S_SUPERVISOR_MODE) |	/* memory only visible from supervisor mode */
+			ACR_E(1) |						/* enable ACR */
+			ACR_ADMSK(0x1f) |				/* cover 495 MByte from 0x1000000 */
+			ACR_BA(0x01000000));			/* all Fast RAM */
+
+
+	/*
+	 * set instruction access attributes in ACR2 and ACR3. This is the same as above, basically:
+	 * enable supervisor access to all SDRAM
+	 */
+
+	set_acr2(ACR_WRITE_PROTECT(0) |
+			ACR_SUPERVISOR_PROTECT(0) |
+			ACR_CACHE_MODE(CACHE_WRITETHROUGH) |
+			ACR_ADDRESS_MASK_MODE(1) |
+			ACR_S(ACR_S_SUPERVISOR_MODE) |
+			ACR_E(1) |
+			ACR_ADMSK(0x0c) |
+			ACR_BA(0x0));
+
+	set_acr3(ACR_WRITE_PROTECT(0) |
+			ACR_SUPERVISOR_PROTECT(0) |
+			ACR_CACHE_MODE(CACHE_WRITETHROUGH) |
+			ACR_ADDRESS_MASK_MODE(0) |
+			ACR_S(ACR_S_SUPERVISOR_MODE) |
 			ACR_E(1) |
 			ACR_ADMSK(0x1f) |
-			ACR_BA(0x60000000));
-
-	/* set instruction access attributes in ACR2 and ACR3 */
-
-	//set_acr2(0xe007c400);
-	set_acr2(ACR_W(0) |
-			ACR_SP(0) |
-			ACR_CM(0) |
-			ACR_CM(ACR_CM_CACHEABLE_WT) |
-			ACR_AMM(1) |
-			ACR_S(ACR_S_ALL) |
-			ACR_E(1) |
-			ACR_ADMSK(0x7) |
-			ACR_BA(0xe0000000));
-
-	/* disable ACR3 */
-	set_acr3(0x0);
+			ACR_BA(0x0f));

 	set_mmubar(MMUBAR + 1);		/* set and enable MMUBAR */

 	/* clear all MMU TLB entries */
 	MCF_MMU_MMUOR = MCF_MMU_MMUOR_CA;

-	/* create locked TLB entries */
-
-	/*
-	 * 0x0000'0000 - 0x000F'FFFF (first MB of physical memory) locked virtual = physical
-	 */
-	MCF_MMU_MMUTR = 0x0 | 					/* virtual address */
-					MCF_MMU_MMUTR_SG |		/* shared global */
-					MCF_MMU_MMUTR_V;		/* valid */
-	MCF_MMU_MMUDR = 0x0 |					/* physical address */
-					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
-					MCF_MMU_MMUDR_CM(0x1) |	/* cacheable, copyback */
-					MCF_MMU_MMUDR_R |		/* read access enable */
-					MCF_MMU_MMUDR_W |		/* write access enable */
-					MCF_MMU_MMUDR_X | 		/* execute access enable */
-					MCF_MMU_MMUDR_LK;		/* lock entry */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
-					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
-					MCF_MMU_MMUOR_ACC |     /* access TLB */
-					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
-
-	/*
-	 * 0x00d0'0000 - 0x00df'ffff (last megabyte of ST RAM = Falcon video memory) locked ID = 6
-	 * mapped to physical address 0x60d0'0000 (FPGA video memory)
-	 * video RAM: read write execute normal write true
-	 */
-
-	MCF_MMU_MMUTR = 0x00d00000 |			/* virtual address */
-#if defined(MACHINE_FIREBEE)
-					MCF_MMU_MMUTR_ID(SCA_PAGE_ID) |
-#endif /* MACHINE_FIREBEE */
-					MCF_MMU_MMUTR_SG |		/* shared global */
-					MCF_MMU_MMUTR_V;		/* valid */
-#if defined(MACHINE_FIREBEE)
-					/* map FPGA video memory for FireBee only */
-	MCF_MMU_MMUDR = 0x60d00000 |			/* physical address */
-#elif defined(MACHINE_M5484LITE)
-	MCF_MMU_MMUDR = 0x00d00000 |			/* physical address */
-#elif defined(MACHINE_M54455)
-	MCF_MMU_MMUDR = 0x60d00000 |			/* FIXME: not determined yet */
-#else
-#error unknown machine!
-#endif /* MACHINE_FIREBEE */
-					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
-					MCF_MMU_MMUDR_CM(0x0) |	/* cachable writethrough */
-					/* caveat: can't be supervisor protected since TOS puts the application stack there! */
-					//MCF_MMU_MMUDR_SP |		/* supervisor protect */
-					MCF_MMU_MMUDR_R |		/* read access enable */
-					MCF_MMU_MMUDR_W |		/* write access enable */
-					MCF_MMU_MMUDR_X |		/* execute access enable */
-					MCF_MMU_MMUDR_LK;		/* lock entry */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
-					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
-					MCF_MMU_MMUOR_ACC |     /* access TLB */
-					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
-
-#if defined(MACHINE_FIREBEE)
-	video_tlb = 0x2000;						/* set page as video page */
-	video_sbt = 0x0;						/* clear time */
-#endif /* MACHINE_FIREBEE */
-
-	/*
-	 * Make the TOS (in SDRAM) read-only
-	 * This maps virtual 0x00e0'0000 - 0x00ef'ffff to the same virtual address
-	 */
-	MCF_MMU_MMUTR = TOS |					/* virtual address */
-					MCF_MMU_MMUTR_SG |		/* shared global */
-					MCF_MMU_MMUTR_V;		/* valid */
-	MCF_MMU_MMUDR = TOS |					/* physical address */
-					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
-					MCF_MMU_MMUDR_CM(0x1) |	/* cachable copyback */
-					MCF_MMU_MMUDR_R |		/* read access enable */
-					//MCF_MMU_MMUDR_W |		/* write access enable (FIXME: for now) */
-					MCF_MMU_MMUDR_X |		/* execute access enable */
-					MCF_MMU_MMUDR_LK;		/* lock entry */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
-					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
-					MCF_MMU_MMUOR_ACC |     /* access TLB */
-					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
-
-#if MACHINE_FIREBEE
-	/*
-	 * Map FireBee I/O area (0xfff0'0000 - 0xffff'ffff physical) to the Falcon-compatible I/O
-	 * area (0x00f0'0000 - 0x00ff'ffff virtual) for the FireBee
-	 */
-
-	MCF_MMU_MMUTR = 0x00f00000 |			/* virtual address */
-					MCF_MMU_MMUTR_SG |		/* shared global */
-					MCF_MMU_MMUTR_V;		/* valid */
-	MCF_MMU_MMUDR = 0xfff00000 |			/* physical address */
-					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
-					MCF_MMU_MMUDR_CM(0x2) |	/* nocache precise */
-					MCF_MMU_MMUDR_SP |		/* supervisor protect */
-					MCF_MMU_MMUDR_R |		/* read access enable */
-					MCF_MMU_MMUDR_W |		/* write access enable */
-					MCF_MMU_MMUDR_X |		/* execute access enable */
-					MCF_MMU_MMUDR_LK;		/* lock entry */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
-					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
-					MCF_MMU_MMUOR_ACC |     /* access TLB */
-					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
-#endif /* MACHINE_FIREBEE */
-
-	/*
-	 * Map (locked) the second last MB of physical SDRAM (this is where BaS .data and .bss reside) to the same
-	 * virtual address. This is also used when BaS is in RAM
-	 */
-
-	MCF_MMU_MMUTR = (SDRAM_START + SDRAM_SIZE - 0x00200000) |	/* virtual address */
-					MCF_MMU_MMUTR_SG |		/* shared global */
-					MCF_MMU_MMUTR_V;		/* valid */
-	MCF_MMU_MMUDR = (SDRAM_START + SDRAM_SIZE - 0x00200000) |	/* physical address */
-					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
-					MCF_MMU_MMUDR_CM(0x0) |	/* cacheable writethrough */
-					MCF_MMU_MMUDR_SP |		/* supervisor protect */
-					MCF_MMU_MMUDR_R |		/* read access enable */
-					MCF_MMU_MMUDR_W |		/* write access enable */
-					MCF_MMU_MMUDR_X |		/* execute access enable */
-					MCF_MMU_MMUDR_LK;		/* lock entry */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
-					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
-					MCF_MMU_MMUOR_ACC |     /* access TLB */
-					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
-
-	/*
-	 * Map (locked) the very last MB of physical SDRAM (this is where the driver buffers reside) to the same
-	 * virtual address. Used uncached for drivers.
-	 */
-
-	MCF_MMU_MMUTR = (SDRAM_START + SDRAM_SIZE - 0x00100000) |	/* virtual address */
-					MCF_MMU_MMUTR_SG |		/* shared global */
-					MCF_MMU_MMUTR_V;		/* valid */
-	MCF_MMU_MMUDR = (SDRAM_START + SDRAM_SIZE - 0x00100000) |	/* physical address */
-					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
-					MCF_MMU_MMUDR_CM(0x2) |	/* nocache precise */
-					MCF_MMU_MMUDR_SP |		/* supervisor protect */
-					MCF_MMU_MMUDR_R |		/* read access enable */
-					MCF_MMU_MMUDR_W |		/* write access enable */
-					//MCF_MMU_MMUDR_X |		/* execute access enable */
-					MCF_MMU_MMUDR_LK;		/* lock entry */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
-					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
-					MCF_MMU_MMUOR_ACC |     /* access TLB */
-					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
-}
-
-void mmutr_miss(uint32_t address)
-{
-	dbg("MMU TLB MISS at 0x%08x\r\n", address);
-	flush_and_invalidate_caches();
-
-	switch (address)
+	/* map locked TLB entries */
+	for (i = 0; i < num_locked_mmu_maps; i++)
 	{
-		case keyctl:
-		case keybd:
-			/* do something to emulate the IKBD access */
-			dbg("IKBD access\r\n");
-			break;
+		mmu_map_page(locked_map[i].virt, locked_map[i].phys, locked_map->pagesize, locked_map->flags);

-		case midictl:
-		case midi:
-			/* do something to emulate MIDI access */
-			dbg("MIDI ACIA access\r\n");
-			break;
-
-		default:
-			/* add missed page to TLB */
-			MCF_MMU_MMUTR = (address & 0xfff00000) | /* virtual aligned to 1M */
-							MCF_MMU_MMUTR_SG |		/* shared global */
-							MCF_MMU_MMUTR_V;		/* valid */
-
-			MCF_MMU_MMUDR = (address & 0xfff00000) |	/* physical aligned to 1M */
-							MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
-							MCF_MMU_MMUDR_CM(0x1) |	/* cacheable copyback */
-							MCF_MMU_MMUDR_R |		/* read access enable */
-							MCF_MMU_MMUDR_W |		/* write access enable */
-							MCF_MMU_MMUDR_X;		/* execute access enable */
-
-			MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
-							MCF_MMU_MMUOR_UAA;		/* update allocation address field */
-
-			MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
-							MCF_MMU_MMUOR_ACC |     /* access TLB */
-							MCF_MMU_MMUOR_UAA;      /* update allocation address field */
+		if (locked_map[i].flags.page_id == SCA_PAGE_ID)
+		{
+			video_tlb = 0x2000;
+			video_sbt = 0x0;
+		}
 	}
 }

+/*
+ * handle an access error
+ * upper level routine called from access_exception inside exceptions.S
+ */
+bool access_exception(uint32_t pc, uint32_t format_status)
+{
+	int fault_status;
+	uint32_t fault_address;
+	uint32_t mmu_status;
+
+	/*
+	 * extract fault status from format_status exception stack field
+	 */
+	fault_status = format_status & 0xc030000;
+	mmu_status = MCF_MMU_MMUSR;
+
+	/*
+	 * determine if access fault was caused by a TLB miss
+	 */
+	switch (fault_status)
+	{
+		case 0x4010000:	/* TLB miss on opword of instruction fetch */
+		case 0x4020000:	/* TLB miss on extension word of instruction fetch */
+			//fault_address = pc;
+			//break;
+		case 0x8020000:	/* TLB miss on data write */
+		case 0xc020000:	/* TLB miss on data read or read-modify-write */
+			fault_address = MCF_MMU_MMUAR;
+			/*
+			 * the following line must stay commented or we risk a double fault (debugging
+			 * output requiring itself a page mapping):
+			 */
+			// dbg("access fault - TLB miss at %p. Fault status = 0x0%x\r\n", pc, fault_status);
+			break;
+
+		default:
+			return false;
+	}
+
+
+	if (mmu_status & MCF_MMU_MMUSR_HIT)		/* did the last fault hit in TLB? */
+	{
+		/*
+		 * if yes, then we already mapped that page during a previous turn and this is in fact a bus error
+		 */
+		return false;
+	}
+	else
+	{
+		struct mmu_mapping *map;
+
+
+		if ((map = lookup_mapping(fault_address)) != NULL)
+		{
+			uint32_t mask;
+
+			switch (map->pagesize)
+			{
+				case MMU_PAGE_SIZE_1M:
+					mask = ~(0x100000 - 1);
+					break;
+				case MMU_PAGE_SIZE_4K:
+					mask = ~(0x1000 - 1);
+					break;
+				case MMU_PAGE_SIZE_8K:
+					mask = ~(0x2000 - 1);
+					break;
+				case MMU_PAGE_SIZE_1K:
+					mask = ~(0x400 - 1);
+					break;
+			}
+
+			mmu_map_page(fault_address & mask, fault_address & mask, map->pagesize, map->flags);
+			return true;
+		}
+	}
+	return false;
+}
+
+
+void mmu_map_page(uint32_t virt, uint32_t phys, uint32_t map_size, struct map_flags flags)
+{
+
+	/*
+	 * add page to TLB
+	 */
+	MCF_MMU_MMUTR = virt |					/* virtual address */
+		MCF_MMU_MMUTR_ID(flags.page_id) |
+		MCF_MMU_MMUTR_SG |					/* shared global */
+		MCF_MMU_MMUTR_V;					/* valid */
+
+	MCF_MMU_MMUDR = phys |					/* physical address */
+		MCF_MMU_MMUDR_SZ(map_size) |		/* 1 MB page size */
+		MCF_MMU_MMUDR_CM(flags.cache_mode) |
+		(flags.access & ACCESS_READ ? MCF_MMU_MMUDR_R : 0) |		/* read access enable */
+		(flags.access & ACCESS_WRITE ? MCF_MMU_MMUDR_W : 0) |		/* write access enable */
+		(flags.access & ACCESS_EXECUTE ? MCF_MMU_MMUDR_X : 0);		/* execute access enable */
+
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
+		MCF_MMU_MMUOR_UAA;					/* update allocation address field */
+
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
+		MCF_MMU_MMUOR_ACC |     			/* access TLB */
+		MCF_MMU_MMUOR_UAA;      			/* update allocation address field */
+	dbg("mapped virt=%p to phys=%p\r\n", virt, phys);
+}
+


--- a/video/fbmodedb.c
+++ b/video/fbmodedb.c
@@ -18,7 +18,7 @@

 #define DBG_MODES
 #ifdef DBG_MODES
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, __FUNCTION__, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_MODES */
--- a/video/fnt_st_8x16.c
+++ b/video/fnt_st_8x16.c
@@ -7,10 +7,11 @@
 * option any later version.  See doc/license.txt for details.
 */

-#include "bas_types.h"
+#include "config.h"
+#include "portab.h"
 #include "font.h"

-static const uint16_t off_table[] =
+static const UWORD off_table[] =
 {
    0x0000, 0x0008, 0x0010, 0x0018, 0x0020, 0x0028, 0x0030, 0x0038,
    0x0040, 0x0048, 0x0050, 0x0058, 0x0060, 0x0068, 0x0070, 0x0078,
@@ -47,7 +48,7 @@ static const uint16_t off_table[] =
    0x0800,
 };

-static const uint16_t dat_table[] =
+static const UWORD dat_table[] =
 {
    0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
    0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1104,
--- a/video/videl.c
+++ b/video/videl.c
@@ -11,12 +11,7 @@
 * option any later version.  See doc/license.txt for details.
 */

-#define DBG_VIDEL
-#ifdef DBG_VIDEL
-#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
-#else
-#define dbg(format, arg...) do { ; } while (0)
-#endif /* DBG_VIDEL */
+#define DBG_VIDEL 0

 #include <stdint.h>
 #include <stdbool.h>
@@ -305,14 +300,14 @@ static uint16_t get_videl_bpp(void)

 static uint16_t get_videl_width(void)
 {
-    return ( * (volatile uint16_t *) 0xffff8210) * 16 / get_videl_bpp();
+    return (*(volatile uint16_t *)0xffff8210) * 16 / get_videl_bpp();
 }

 static uint16_t get_videl_height(void)
 {
-    uint16_t vdb = * (volatile uint16_t *) 0xffff82a8;
-    uint16_t vde = * (volatile uint16_t *) 0xffff82aa;
-    uint16_t vmode = * (volatile uint16_t *) 0xffff82c2;
+    uint16_t vdb = *(volatile uint16_t *)0xffff82a8;
+    uint16_t vde = *(volatile uint16_t *)0xffff82aa;
+    uint16_t vmode = *(volatile uint16_t *)0xffff82c2;

    /* visible y resolution:
     * Graphics display starts at line VDB and ends at line
@@ -337,14 +332,11 @@ const VMODE_ENTRY *lookup_videl_mode(int16_t mode,int16_t monitor)
 {
    const VMODE_ENTRY *vmode_init_table, *p;

-    if (mode&VIDEL_VGA)
-    {
+    if (mode&VIDEL_VGA) {
        vmode_init_table = vga_init_table;
        /* ignore bits that don't affect initialisation data */
        mode &= ~(VIDEL_VERTICAL|VIDEL_PAL);
-    }
-    else
-    {
+    } else {
        vmode_init_table = nonvga_init_table;
    }

@@ -376,38 +368,34 @@ static int16_t determine_width(int16_t mode)
 /*
 * determine vctl based on video mode and monitor type
 */
-static int16_t determine_vctl(int16_t mode, int16_t monitor)
+static int16_t determine_vctl(int16_t mode,int16_t monitor)
 {
    int16_t vctl;

-    if (mode & VIDEL_VGA)
-    {
-        vctl = (mode & VIDEL_80COL) ? 0x08 : 0x04;
-        if (mode & VIDEL_VERTICAL)
+    if (mode&VIDEL_VGA) {
+        vctl = (mode&VIDEL_80COL) ? 0x08 : 0x04;
+        if (mode&VIDEL_VERTICAL)
            vctl |= 0x01;
-    }
-    else
-    {
-        vctl = (mode & VIDEL_80COL) ? 0x04 : 0x00;
-        if (mode & VIDEL_VERTICAL)
+    } else {
+        vctl = (mode&VIDEL_80COL) ? 0x04 : 0x00;
+        if (mode&VIDEL_VERTICAL)
            vctl |= 0x02;
    }

-    if (!(mode & VIDEL_COMPAT))
+    if (!(mode&VIDEL_COMPAT))
        return vctl;

-    switch (mode & VIDEL_BPPMASK)
-    {
-        case VIDEL_1BPP:
-            if (!(mode & VIDEL_VGA) && (monitor == MON_MONO))
-                vctl = 0x08;
-            break;
-        case VIDEL_2BPP:
-            vctl = (mode & VIDEL_VGA)? 0x09 : 0x04;
-            break;
-        case VIDEL_4BPP:
-            vctl = (mode & VIDEL_VGA)? 0x05 : 0x00;
-            break;
+    switch(mode&VIDEL_BPPMASK) {
+    case VIDEL_1BPP:
+        if (!(mode&VIDEL_VGA) && (monitor == MON_MONO))
+            vctl = 0x08;
+        break;
+    case VIDEL_2BPP:
+        vctl = (mode&VIDEL_VGA)? 0x09 : 0x04;
+        break;
+    case VIDEL_4BPP:
+        vctl = (mode&VIDEL_VGA)? 0x05 : 0x00;
+        break;
    }

    return vctl;
@@ -419,28 +407,25 @@ static int16_t determine_vctl(int16_t mode, int16_t monitor)
 */
 static int16_t determine_regc0(int16_t mode,int16_t monitor)
 {
-    if (mode & VIDEL_VGA)
+    if (mode&VIDEL_VGA)
        return 0x0186;

-    if (!(mode & VIDEL_COMPAT))
-        return (monitor == MON_TV) ? 0x0183 : 0x0181;
+    if (!(mode&VIDEL_COMPAT))
+        return (monitor==MON_TV)?0x0183:0x0181;

    /* handle ST-compatible modes */
-    if ((mode & (VIDEL_80COL | VIDEL_BPPMASK)) == (VIDEL_80COL | VIDEL_1BPP))
-    {
-        /* 80-column, 2-colour */
-        switch(monitor)
-        {
-            case MON_MONO:
-                return 0x0080;
-            case MON_TV:
-                return 0x0183;
-            default:
-                return 0x0181;
+    if ((mode&(VIDEL_80COL|VIDEL_BPPMASK)) == (VIDEL_80COL|VIDEL_1BPP)) {  /* 80-column, 2-colour */
+        switch(monitor) {
+        case MON_MONO:
+            return 0x0080;
+        case MON_TV:
+            return 0x0183;
+        default:
+            return 0x0181;
        }
    }

-    return (monitor == MON_TV) ? 0x0083 : 0x0081;
+    return (monitor==MON_TV)?0x0083:0x0081;
 }


@@ -460,7 +445,7 @@ static int set_videl_vga(int16_t mode)
    if (!p)
        return -1;

-    videlregs[0x0a] = (mode & VIDEL_PAL) ? 2 : 0; /* video sync to 50Hz if PAL */
+    videlregs[0x0a] = (mode&VIDEL_PAL) ? 2 : 0; /* video sync to 50Hz if PAL */

    // FIXME: vsync() can't work if the screen is initially turned off
    //vsync(); /* wait for vbl so we're not interrupted :-) */
@@ -491,30 +476,28 @@ static int set_videl_vga(int16_t mode)
    videlword(0xc0) = determine_regc0(mode,monitor);
    videlword(0x66) = 0x0000;           /* clear SPSHIFT */

-    switch(mode & VIDEL_BPPMASK)
-    {
-        /* set SPSHIFT / ST shift */
-        case VIDEL_1BPP:                    /* 2 colours (mono) */
-            if (monitor == MON_MONO)
-                videlregs[0x60] = 0x02;
-            else videlword(0x66) = 0x0400;
-            break;
-        case VIDEL_2BPP:                    /* 4 colours */
-            videlregs[0x60] = 0x01;
-            videlword(0x10) = linewidth;        /* writing to the ST shifter has    */
-            videlword(0xc2) = vctl;             /* just overwritten these registers */
-            break;
-        case VIDEL_4BPP:                    /* 16 colours */
-            /* if not ST-compatible, SPSHIFT was already set correctly above */
-            if (mode & VIDEL_COMPAT)
-                videlregs[0x60] = 0x00;         /* else set ST shifter */
-            break;
-        case VIDEL_8BPP:                    /* 256 colours */
-            videlword(0x66) = 0x0010;
-            break;
-        case VIDEL_TRUECOLOR:               /* 65536 colours (Truecolor) */
-            videlword(0x66) = 0x0100;
-            break;
+    switch(mode&VIDEL_BPPMASK) {        /* set SPSHIFT / ST shift */
+    case VIDEL_1BPP:                    /* 2 colours (mono) */
+        if (monitor == MON_MONO)
+            videlregs[0x60] = 0x02;
+        else videlword(0x66) = 0x0400;
+        break;
+    case VIDEL_2BPP:                    /* 4 colours */
+        videlregs[0x60] = 0x01;
+        videlword(0x10) = linewidth;        /* writing to the ST shifter has    */
+        videlword(0xc2) = vctl;             /* just overwritten these registers */
+        break;
+    case VIDEL_4BPP:                    /* 16 colours */
+        /* if not ST-compatible, SPSHIFT was already set correctly above */
+        if (mode&VIDEL_COMPAT)
+            videlregs[0x60] = 0x00;         /* else set ST shifter */
+        break;
+    case VIDEL_8BPP:                    /* 256 colours */
+        videlword(0x66) = 0x0010;
+        break;
+    case VIDEL_TRUECOLOR:               /* 65536 colours (Truecolor) */
+        videlword(0x66) = 0x0100;
+        break;
    }

    return 0;
@@ -535,8 +518,8 @@ int16_t vsetmode(int16_t mode)
    if (mode == -1)
        return current_video_mode;

-#ifdef DBG_VIDEL
-    xprintf("vsetmode(0x%04x)\n", mode);
+#if DBG_VIDEL
+    kprintf("vsetmode(0x%04x)\n", mode);
 #endif

    if (set_videl_vga(mode) < 0)    /* invalid mode */
@@ -594,30 +577,26 @@ int32_t vgetsize(int16_t mode)
    monitor = vmontype();

    mode &= VIDEL_VALID;        /* ignore invalid bits */
-    if ((mode & VIDEL_BPPMASK) > VIDEL_TRUECOLOR)
-    {
-        /* fixup invalid bpp */
+    if ((mode&VIDEL_BPPMASK) > VIDEL_TRUECOLOR) {   /* fixup invalid bpp */
        mode &= ~VIDEL_BPPMASK;
        mode |= VIDEL_TRUECOLOR;
    }

-    p = lookup_videl_mode(mode, monitor);
-    if (!p)
-    {
-        /* invalid mode */
-        if (mode & VIDEL_COMPAT)
+    p = lookup_videl_mode(mode,monitor);
+    if (!p) {                   /* invalid mode */
+        if (mode&VIDEL_COMPAT)
            return ST_VRAM_SIZE;
        mode &= ~(VIDEL_OVERSCAN|VIDEL_PAL);/* ignore less-important bits */
-        p = lookup_videl_mode(mode, monitor);/* & try again */
+        p = lookup_videl_mode(mode,monitor);/* & try again */
        if (!p)                             /* "can't happen" */
            return FALCON_VRAM_SIZE;
    }

-    vctl = determine_vctl(mode, monitor);
+    vctl = determine_vctl(mode,monitor);
    height = p->vde - p->vdb;
-    if (!(vctl & 0x02))
+    if (!(vctl&0x02))
        height >>= 1;
-    if (vctl & 0x01)
+    if (vctl&0x01)
        height >>= 1;

    return (int32_t)determine_width(mode) * 2 * height;
@@ -626,21 +605,18 @@ int32_t vgetsize(int16_t mode)
 /*
 * convert from Falcon palette format to STe palette format
 */
-#define falc2ste(a) ((((a) >> 1) & 0x08) | (((a) >> 5) & 0x07))
-
+#define falc2ste(a) ((((a)>>1)&0x08)|(((a)>>5)&0x07))
 static void convert2ste(int16_t *ste,int32_t *falcon)
 {
-    union
-    {
+    union {
        int32_t l;
        uint8_t b[4];
    } u;
    int i;

-    for (i = 0; i < 16; i++)
-    {
+    for (i = 0; i < 16; i++) {
        u.l = *falcon++;
-        *ste++ = (falc2ste(u.b[0]) << 8) | (falc2ste(u.b[1]) << 4) | falc2ste(u.b[3]);
+        *ste++ = (falc2ste(u.b[0])<<8) | (falc2ste(u.b[1])<<4) | falc2ste(u.b[3]);
    }
 }

@@ -653,10 +629,10 @@ static int use_ste_palette(int16_t videomode)
    if (vmontype() == MON_MONO)                     /* always for ST mono monitor */
        return true;

-    if ((videomode & VIDEL_BPPMASK) == VIDEL_2BPP)    /* always for 4-colour modes */
+    if ((videomode&VIDEL_BPPMASK) == VIDEL_2BPP)    /* always for 4-colour modes */
        return true;

-    if ((videomode & VIDEL_COMPAT) && ((videomode & VIDEL_BPPMASK) == VIDEL_4BPP))
+    if ((videomode&VIDEL_COMPAT) && ((videomode&VIDEL_BPPMASK) == VIDEL_4BPP))
        return true;                                /* and for ST low */

    return false;
@@ -676,11 +652,10 @@ static int use_ste_palette(int16_t videomode)
 * address | 0x01      load first 16 Falcon palette regs from address
 *       0 | 0x01      load 256 Falcon palette regs from falcon_shadow_palette[]
 */
-int16_t vsetrgb(int16_t index,int16_t count, int32_t *rgb)
+int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
 {
    int32_t *shadow, *source;
-    union
-    {
+    union {
        int32_t l;
        uint8_t b[4];
    } u;
@@ -689,8 +664,8 @@ int16_t vsetrgb(int16_t index,int16_t count, int32_t *rgb)
    if ((index < 0) || (count <= 0))
        return -1; /* Generic error */

-    limit = (get_videl_bpp() <= 4) ? 16 : 256;
-    if ((index + count) > limit)
+    limit = (get_videl_bpp()<=4) ? 16 : 256;
+    if ((index+count) > limit)
        return -1; /* Generic error */

    /*
@@ -699,7 +674,7 @@ int16_t vsetrgb(int16_t index,int16_t count, int32_t *rgb)
     */
    shadow = falcon_shadow_palette + index;
    source = rgb;
-    while (count--) {
+    while(count--) {
        u.l = *source++;
        u.b[0] = u.b[1];                 /* shift R & G */
        u.b[1] = u.b[2];
@@ -721,7 +696,7 @@ int16_t vsetrgb(int16_t index,int16_t count, int32_t *rgb)
        return 0; /* OK */
    }

-    colorptr = (limit == 256) ? (int16_t *) 0x01L : (int16_t *) ((int32_t) falcon_shadow_palette|0x01L);
+    colorptr = (limit==256) ? (int16_t *) 0x01L : (int16_t *) ((int32_t) falcon_shadow_palette|0x01L);

 	set_palette(colorptr);
    return 0; /* OK */
@@ -733,8 +708,7 @@ int16_t vsetrgb(int16_t index,int16_t count, int32_t *rgb)
 int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb)
 {
    int32_t *shadow;
-    union
-    {
+    union {
        int32_t l;
        uint8_t b[4];
    } u;
@@ -743,13 +717,12 @@ int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb)
    if ((index < 0) || (count <= 0))
        return -1; /* Generic error */

-    limit = (get_videl_bpp() <= 4) ? 16 : 256;
-    if ((index + count) > limit)
+    limit = (get_videl_bpp()<=4) ? 16 : 256;
+    if ((index+count) > limit)
        return -1; /* Generic error */

    shadow = falcon_shadow_palette + index;
-    while (count--)
-    {
+    while(count--) {
        u.l = *shadow++;
        u.b[2] = u.b[1];        /* shift R & G right*/
        u.b[1] = u.b[0];
@@ -796,7 +769,7 @@ int16_t vfixmode(int16_t mode)
    if (mode & VIDEL_VGA)                       /* if mode has VGA set, */
        mode ^= (VIDEL_VERTICAL | VIDEL_VGA);   /* clear it & flip vertical */
    if (mode & VIDEL_COMPAT) {
-        if ((mode & VIDEL_BPPMASK) == VIDEL_1BPP)
+        if ((mode&VIDEL_BPPMASK) == VIDEL_1BPP)
            mode |= VIDEL_VERTICAL;         /* set vertical for ST high */
        else mode &= ~VIDEL_VERTICAL;       /* clear it for ST medium, low  */
    }
@@ -813,7 +786,7 @@ int16_t videl_check_moderez(int16_t moderez)

    current_mode = get_videl_mode();
    return_mode = vfixmode(moderez);/* adjust */
-    return (return_mode == current_mode) ? 0 : return_mode;
+    return (return_mode==current_mode)?0:return_mode;
 }

 uint32_t videl_vram_size(void)
@@ -859,7 +832,7 @@ void initialise_falcon_palette(int16_t mode)
     * although it is probably not important since we don't use those
     * registers.
     */
-    limit = ((mode & VIDEL_BPPMASK) == VIDEL_8BPP) ? 256 : 16;
+    limit = ((mode&VIDEL_BPPMASK)==VIDEL_8BPP) ? 256 : 16;
    for (i = 0; i < limit; i++)
        fcol_regs[i] = falcon_shadow_palette[i];

@@ -867,7 +840,7 @@ void initialise_falcon_palette(int16_t mode)
     * if appropriate, set up the STe shadow & real palette registers
     */
    if (use_ste_palette(mode)) {
-        convert2ste(ste_shadow_palette, falcon_shadow_palette);
+        convert2ste(ste_shadow_palette,falcon_shadow_palette);
        for (i = 0; i < 16; i++)
            col_regs[i] = ste_shadow_palette[i];
    }
Author	SHA1	Message	Date
Markus Fröschle	705c9610f3	branched to enable main branch to return to the old MMU handling code since the new style couldn't be made to work (for now).	2014-06-20 16:06:08 +00:00
Markus Fröschle	69c982c795	moved FPGA config GPIO initialization into init_fpga.c to enable external JTAG FPGA configuration	2014-06-20 12:02:11 +00:00
David Gálvez	4d40bd775a	make PCI memory non-cacheable	2014-05-25 19:13:45 +00:00
David Gálvez	d98727a182	add missing parameter initialization	2014-05-25 17:00:19 +00:00
Markus Fröschle	927833d601	eliminated wrong types warning when calling memcpy()	2014-05-12 07:40:55 +00:00
Markus Fröschle	65a7986e34	reformatted	2014-05-11 20:38:33 +00:00
Markus Fröschle	ccec42e55c	modified dbg() in several files	2014-05-11 20:31:57 +00:00
Markus Fröschle	dc646c75ad	reformatted assembler code	2014-05-11 14:08:27 +00:00
Markus Fröschle	b0fb7b8df3	fixed wrong MMU mapping of emulated Falcon video memory (phys and virt where the wrong way round)	2014-05-11 06:57:09 +00:00
Markus Fröschle	fb9c4aaa1d	modified project to support Qt Creator inferior debugging through BDM.	2014-05-11 06:40:48 +00:00
Markus Fröschle	2f311aedbf	modified dbg() macro corrected irq6 handler reimplemented MFP interrupt LED blinker in C	2014-05-10 13:21:11 +00:00
Markus Fröschle	5a836c6ca7	reformatted assembly	2014-04-22 10:47:36 +00:00
Markus Fröschle	e94becff75	added to QtCreator	2014-04-22 10:44:56 +00:00
Markus Fröschle	dee448549c	translated copy loop to C	2014-02-04 20:06:29 +00:00
Markus Fröschle	fcd3b885ce	started "translating" MMU update code for video pages	2014-02-04 07:17:51 +00:00
Markus Fröschle	91ae86a487	completed page loop	2014-02-03 21:42:25 +00:00
Markus Fröschle	25f66ae7f9	more conversion to C	2014-02-02 22:27:10 +00:00
Markus Fröschle	fe5b7d466d	translated more of the assembler code into C	2014-02-02 21:35:46 +00:00
Markus Fröschle	ff3514c2d0	added missing include file to SVN	2014-02-02 10:16:16 +00:00
Markus Fröschle	90371bb3c9	optimized for size - reduces codesize by half	2014-02-01 23:54:32 +00:00
Markus Fröschle	5a557524b0	moved PSC3 interrupt handler to C code	2014-02-01 23:37:30 +00:00
Markus Fröschle	1fb6c756ae	modified to throw errors if an unknown machine type is detected	2014-01-28 15:49:05 +00:00
Markus Fröschle	8a1da417e7	modified ACR settings	2014-01-28 14:11:08 +00:00
Markus Fröschle	703352fc9d	added m54455 (Freescale EVB) platform	2014-01-21 14:52:46 +00:00
Markus Fröschle	6a6e7cf84e	fixed: compare virtual address instead of physical in lookup_mapping()	2014-01-21 12:43:32 +00:00
Markus Fröschle	430f03a8ed	fixed bug in determining if access error hit in TLB (checked bit 0 instead of 1).	2014-01-20 14:23:55 +00:00
Markus Fröschle	d3fb521ad1	modified MMU mapping table to use symbolic constants from include file	2014-01-19 19:26:52 +00:00
Markus Fröschle	bf8cea26ab	simplified MMU code. Still hangs somewhere in EmuTOS	2014-01-19 18:27:05 +00:00
Markus Fröschle	0f5942436a	removed locked MMU pages	2014-01-18 20:59:42 +00:00
Markus Fröschle	8544307830	removed inlining in wait.c, added (simple) map-based MMU handling	2014-01-18 14:03:25 +00:00
Markus Fröschle	386a921f84	modified to map memory dynamically based on a static memory map	2014-01-18 08:04:44 +00:00
Markus Fröschle	58418f2436	moved ACR register handling macros to include file	2014-01-17 06:45:33 +00:00
Markus Fröschle	8025af85dd	modified access_error to do all MMU mappings dynamically	2014-01-16 20:42:04 +00:00
Markus Fröschle	1c316ec11b	extended mmu_map_page() by size and flags args	2014-01-16 16:29:29 +00:00
Markus Fröschle	3779d1cb2e	modified ACRs to cover complete SDRAM	2014-01-16 16:18:43 +00:00
Markus Fröschle	c9c76a4757	test using ACR0 & ACR2 to provide supervisor stack access	2014-01-15 16:03:54 +00:00
Markus Fröschle	afa9490c1e	fixed typo in strcmp()	2014-01-15 07:17:21 +00:00
Markus Fröschle	26cadc699a	fixed formatting	2014-01-14 21:39:05 +00:00
Markus Fröschle	9da82d046b	modified comments	2014-01-14 21:15:56 +00:00
Markus Fröschle	4112590363	moved page alignment responsibility to caller	2014-01-14 20:28:13 +00:00
Markus Fröschle	fdf945c702	fixed missing parameter in debug print	2014-01-14 18:18:20 +00:00
Markus Fröschle	9b89377caf	removed type field from isr_register_handler() and friends	2014-01-14 07:48:38 +00:00
Markus Fröschle	3966bfd6ec	fixed comments	2014-01-13 22:05:20 +00:00
Markus Fröschle	bdf5cd6c0d	added vim modeline to asm sources. Needs "set modeline:set modeline=5" in .vimrc	2014-01-13 21:34:24 +00:00
Markus Fröschle	ba1a951952	cleaned up debug printouts	2014-01-13 21:30:39 +00:00
Markus Fröschle	fcb5204fc8	renamed mmutr_miss() to mmu_map_page() (that's what its doing)	2014-01-13 21:26:42 +00:00
Markus Fröschle	63b19853a9	corrected FASTRAM_END comparision	2014-01-13 21:20:24 +00:00
Markus Fröschle	be94d72097	refactored assembler routines from exceptions.S into mmu.c (access exception handler). Seems to be better, but still hang.	2014-01-13 19:39:42 +00:00
Markus Fröschle	9b099d935c	implemented safe stack for access exception handler	2014-01-13 15:13:29 +00:00
Markus Fröschle	a97469a53d	switch to a safe stack in access_exception. Assembles, but not tested yet.	2014-01-13 07:19:09 +00:00
Markus Fröschle	3a1c07a2e8	added better matching descriptive text to debug messages	2014-01-08 13:57:35 +00:00
Markus Fröschle	4f29f6af80	FEC interrupts to level 1	2014-01-08 09:59:44 +00:00
Markus Fröschle	8d53a1feb9	fixed - carelessly choosen - interrupt level for FEC interrupts	2014-01-08 09:01:43 +00:00
Markus Fröschle	99e5352807	changed MAC address to original address dbug assigns	2014-01-07 10:50:22 +00:00
Markus Fröschle	785ca43b11	cleaned up	2014-01-07 05:57:17 +00:00