(hopefully) fixed a problem with hang when i2c communication to TFP410 fails

fixed bug that prevented proper detection of FPGA load skip request
fixed errornous deactivation of FPGA load
2014-12-28 22:47:43 +00:00 · 2014-12-26 08:56:30 +00:00 · 2014-12-26 07:26:10 +00:00 · 2014-08-06 06:25:41 +00:00 · 2014-08-06 06:23:30 +00:00 · 2014-08-02 08:25:07 +00:00
68 changed files with 7515 additions and 3109 deletions
--- a/.gdbinit
+++ b/.gdbinit
@@ -1,7 +1,8 @@
 #set disassemble-next-line on
 define tr
-	#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
-	target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
+	!killall m68k-bdm-gdbserver
+	target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
+	#target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
 	#target dbug /dev/ttyS0
 	#monitor bdm-reset
 end
--- a/BaS_gcc.config
+++ b/BaS_gcc.config
@@ -0,0 +1 @@
+// ADD PREDEFINED MACROS HERE!
--- a/BaS_gcc.creator
+++ b/BaS_gcc.creator
@@ -0,0 +1 @@
+[General]
--- a/BaS_gcc.files
+++ b/BaS_gcc.files
@@ -0,0 +1,231 @@
+dma/dma.c
+dma/MCD_dmaApi.c
+dma/MCD_tasks.c
+dma/MCD_tasksInit.c
+exe/basflash.c
+exe/basflash_start.c
+firebee/bas.elf
+firebee/bas.lk
+firebee/bas.map
+firebee/bas.s19
+firebee/basflash.elf
+firebee/basflash.map
+firebee/basflash.s19
+firebee/bashflash.lk
+firebee/depend
+firebee/libbas.a
+firebee/ram.elf
+firebee/ram.lk
+firebee/ram.map
+firebee/ram.s19
+flash/flash.c
+flash/s19reader.c
+fs/cc932.c
+fs/cc936.c
+fs/cc949.c
+fs/cc950.c
+fs/ccsbcs.c
+fs/ff.c
+fs/unicode.c
+if/driver_vec.c
+include/acia.h
+include/am79c874.h
+include/arp.h
+include/ati_ids.h
+include/bas_printf.h
+include/bas_string.h
+include/bas_types.h
+include/bas_utils.h
+include/bcm5222.h
+include/bootp.h
+include/cache.h
+include/diskio.h
+include/dma.h
+include/driver_mem.h
+include/driver_vec.h
+include/edid.h
+include/ehci.h
+include/eth.h
+include/exceptions.h
+include/fb.h
+include/fec.h
+include/fecbd.h
+include/ff.h
+include/ffconf.h
+include/firebee.h
+include/i2c-algo-bit.h
+include/i2c.h
+include/icmp.h
+include/ikbd.h
+include/interrupts.h
+include/ip.h
+include/m54455.h
+include/m5484l.h
+include/MCD_dma.h
+include/mcd_initiators.h
+include/MCD_progCheck.h
+include/MCD_tasksInit.h
+include/MCF5475.h
+include/MCF5475_CLOCK.h
+include/MCF5475_CTM.h
+include/MCF5475_DMA.h
+include/MCF5475_DSPI.h
+include/MCF5475_EPORT.h
+include/MCF5475_FBCS.h
+include/MCF5475_FEC.h
+include/MCF5475_GPIO.h
+include/MCF5475_GPT.h
+include/MCF5475_I2C.h
+include/MCF5475_INTC.h
+include/MCF5475_MMU.h
+include/MCF5475_PAD.h
+include/MCF5475_PCI.h
+include/MCF5475_PCIARB.h
+include/MCF5475_PSC.h
+include/MCF5475_SDRAMC.h
+include/MCF5475_SEC.h
+include/MCF5475_SIU.h
+include/MCF5475_SLT.h
+include/MCF5475_SRAM.h
+include/MCF5475_USB.h
+include/MCF5475_XLB.h
+include/mmu.h
+include/mod_devicetable.h
+include/nbuf.h
+include/net.h
+include/net_timer.h
+include/nif.h
+include/ohci.h
+include/part.h
+include/pci.h
+include/pci_ids.h
+include/queue.h
+include/radeon_reg.h
+include/radeonfb.h
+include/s19reader.h
+include/screen.h
+include/sd_card.h
+include/startcf.h
+include/sysinit.h
+include/tftp.h
+include/udp.h
+include/usb.h
+include/usb_defs.h
+include/user_io.h
+include/util.h
+include/version.h
+include/videl.h
+include/video.h
+include/wait.h
+include/x86debug.h
+include/x86decode.h
+include/x86emu.h
+include/x86emui.h
+include/x86fpu.h
+include/x86fpu_regs.h
+include/x86ops.h
+include/x86pcibios.h
+include/x86prim_asm.h
+include/x86prim_ops.h
+include/x86regs.h
+include/xhdi_sd.h
+kbd/ikbd.c
+m54455/bas.elf
+m54455/bas.lk
+m54455/bas.map
+m54455/bas.s19
+m54455/basflash.elf
+m54455/basflash.map
+m54455/basflash.s19
+m54455/bashflash.lk
+m54455/depend
+m54455/libbas.a
+m54455/ram.elf
+m54455/ram.lk
+m54455/ram.map
+m54455/ram.s19
+m5484lite/bas.elf
+m5484lite/bas.lk
+m5484lite/bas.map
+m5484lite/bas.s19
+m5484lite/basflash.elf
+m5484lite/basflash.map
+m5484lite/basflash.s19
+m5484lite/bashflash.lk
+m5484lite/depend
+m5484lite/libbas.a
+m5484lite/ram.elf
+m5484lite/ram.lk
+m5484lite/ram.map
+m5484lite/ram.s19
+net/am79c874.c
+net/arp.c
+net/bcm5222.c
+net/bootp.c
+net/fec.c
+net/fecbd.c
+net/ip.c
+net/nbuf.c
+net/net_timer.c
+net/nif.c
+net/queue.c
+net/tftp.c
+net/udp.c
+nutil/s19header
+nutil/s19header.c
+pci/ehci-hcd.c
+pci/ohci-hcd.c
+pci/pci.c
+radeon/radeon_accel.c
+radeon/radeon_base.c
+radeon/radeon_cursor.c
+radeon/radeon_monitor.c
+spi/dspi.c
+spi/mmc.c
+spi/sd_card.c
+sys/BaS.c
+sys/cache.c
+sys/driver_mem.c
+sys/exceptions.S
+sys/fault_vectors.c
+sys/init_fpga.c
+sys/interrupts.c
+sys/mmu.c
+sys/startcf.S
+sys/sysinit.c
+usb/usb.c
+usb/usb_mouse.c
+util/bas_printf.c
+util/bas_string.c
+util/printf_helper.S
+util/wait.c
+video/fbmem.c
+video/fbmodedb.c
+video/fbmon.c
+video/fnt_st_8x16.c
+video/offscreen.c
+video/vdi_fill.c
+video/videl.c
+video/video.c
+x86emu/x86biosemu.c
+x86emu/x86debug.c
+x86emu/x86decode.c
+x86emu/x86fpu.c
+x86emu/x86ops.c
+x86emu/x86ops2.c
+x86emu/x86pcibios.c
+x86emu/x86prim_ops.c
+x86emu/x86sys.c
+xhdi/xhdi_interface.c
+xhdi/xhdi_sd.c
+xhdi/xhdi_vec.S
+bas.lk.in
+bas_firebee.bdm
+bas_m5484.bdm
+basflash.lk.in
+check.bdm
+COPYING
+COPYING.LESSER
+dump.bdm
+mcf5474.gdb
+Makefile
--- a/BaS_gcc.includes
+++ b/BaS_gcc.includes
@@ -0,0 +1,2 @@
+include
+/usr/m68k-elf/include
--- a/1689
+++ b/1689
--- a/54
+++ b/54
@@ -15,7 +15,7 @@ ifeq (Y,$(COMPILE_ELF))
 TCPREFIX=m68k-elf-
 EXE=elf
 FORMAT=elf32-m68k
-else 
+else
 TCPREFIX=m68k-atari-mint-
 EXE=s19
 FORMAT=srec
@@ -32,20 +32,21 @@ NATIVECC=gcc
 INCLUDE=-Iinclude
 CFLAGS=-mcpu=5474 \
 		-Wall \
-		-Os \
+		-g3 \
 		-fomit-frame-pointer \
 		-ffreestanding \
 		-fleading-underscore \
 		-Wa,--register-prefix-optional
 CFLAGS_OPTIMIZED = -mcpu=5474 \
 		-Wall \
+		-g3 \
 		-O2 \
 		-fomit-frame-pointer \
 		-ffreestanding \
 		-fleading-underscore \
 		-Wa,--register-prefix-optional

-TRGTDIRS= ./firebee ./m5484lite
+TRGTDIRS= ./firebee ./m5484lite ./m54455
 OBJDIRS=$(patsubst %, %/objs,$(TRGTDIRS))
 TOOLDIR=util

@@ -123,6 +124,7 @@ CSRCS= \
 	radeon_accel.c \
 	radeon_cursor.c \
 	radeon_monitor.c \
+	fnt_st_8x16.c \
 	\
 	x86decode.c \
 	x86sys.c \
@@ -135,14 +137,15 @@ CSRCS= \
 	x86pcibios.c \
 	\
 	basflash.c \
-	basflash_start.c 
+	basflash_start.c


 ASRCS= \
 	startcf.S \
 	printf_helper.S \
 	exceptions.S \
-	xhdi_vec.S
+	xhdi_vec.S \
+	pci_wrappers.S

 SRCS=$(ASRCS) $(CSRCS)
 COBJS=$(patsubst %.c,%.o,$(CSRCS))
@@ -170,32 +173,35 @@ clean:

 # flags for targets
 m5484lite/bas.$(EXE): MACHINE=MACHINE_M5484LITE
+m54455/bas.$(EXE): MACHINE=MACHINE_M54455
 firebee/bas.$(EXE): MACHINE=MACHINE_FIREBEE
 m5484lite/ram.$(EXE): MACHINE=MACHINE_M5484LITE
+m54455/ram.$(EXE): MACHINE=MACHINE_M54455
 firebee/ram.$(EXE): MACHINE=MACHINE_FIREBEE
 m5484lite/basflash.$(EXE): MACHINE=MACHINE_M5484LITE
+m54455/basflash.$(EXE): MACHINE=MACHINE_M54455
 firebee/basflash.$(EXE): MACHINE=MACHINE_FIREBEE

 #
 # generate pattern rules for different object files
 #
 define CC_TEMPLATE
-ifeq (firebee,$(1))
-	MACHINE=MACHINE_FIREBEE
-else
-	MACHINE=MACHINE_M5484LITE
-endif
+#ifeq (firebee,$(1))
+	#MACHINE=MACHINE_FIREBEE
+#else
+	#MACHINE=MACHINE_M5484LITE
+#endif

 # always optimize x86 emulator objects
-$(1)/objs/x86decode.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86sys.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86debug.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86prim_ops.o:CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86ops.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86ops2.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86fpu.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86biosemu.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-$(1)/objs/x86pcibios.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86decode.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86sys.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86debug.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86prim_ops.o:CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86ops.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86ops2.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86fpu.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86biosemu.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
+#$(1)/objs/x86pcibios.o:	CFLAGS=$(CFLAGS_OPTIMIZED)

 $(1)/objs/%.o:%.c
 	$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@
@@ -257,7 +263,7 @@ endif
 $(1)_MAPFILE_RAM=$(1)/$$(basename $$(RAM_EXEC)).map
 $(1)/$$(RAM_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
 	$(CPP) $(INCLUDE) -DCOMPILE_RAM -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDRFILE)
-	$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) -o $$@
+	$(LD) -g --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) -o $$@
 ifeq ($(COMPILE_ELF),Y)
 	$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
 else
@@ -280,21 +286,21 @@ $(foreach DIR,$(TRGTDIRS),$(eval $(call EX_TEMPLATE,$(DIR))))

 indent: $(CSRCS)
 	indent $<
-	
+
 .PHONY: tags
 tags:
 	ctags $(patsubst %,%/*,$(VPATH))
-	
+
 .PHONY: printvars
 printvars:
 	@$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
 ifeq (MACHINE_M5484LITE,$$(MACHINE))
 	MNAME=m5484lite
 else ifeq (MACHINE_FIREBEE,$(MACHINE))
-   	MNAME=firebee
+	MNAME=firebee
 endif

 tools:
-	$(NATIVECC) $(INCLUDE) -c $(TOOLDIR)/s19header.c -o $(TOOLDIR)/s19header.o 
+	$(NATIVECC) $(INCLUDE) -c $(TOOLDIR)/s19header.c -o $(TOOLDIR)/s19header.o
 	$(NATIVECC) -o $(TOOLDIR)/s19header $(TOOLDIR)/s19header.o

--- a/bas.lk.in
+++ b/bas.lk.in
@@ -1,9 +1,11 @@
-#ifdef MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
 #include "firebee.h"
-#endif /* MACHINE_FIREBEE */
-
-#ifdef MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
+#else
+#error "unknown machine!"
 #endif /* MACHINE_M5484LITE */

 /* make bas_rom access flags rx if compiling to RAM */
@@ -17,235 +19,244 @@ MEMORY
 {
   bas_rom (ROMFLAGS) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000
   /*
-	* target to copy BaS data segment to. 1M should be enough for now
-	*/
+        * target to copy BaS data segment to. 1M should be enough for now
+        */
   bas_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00200000, LENGTH = 0x00100000
   /*
-    * driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
-	*/
+        * driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
+        */
   driver_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00100000, LENGTH = 0x00100000
 }

 SECTIONS
 {
-	/* BaS in ROM */
-	.text :
-	{
-		OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */
+        /* BaS in ROM */
+        .text :
+        {
+                OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */

-		OBJDIR/sysinit.o(.text)
-		OBJDIR/fault_vectors.o(.text)
+                OBJDIR/sysinit.o(.text)
+                OBJDIR/fault_vectors.o(.text)
 #ifdef MACHINE_FIREBEE
-		OBJDIR/init_fpga.o(.text)
+                OBJDIR/init_fpga.o(.text)
 #endif /* MACHINE_FIREBEE */
-		OBJDIR/wait.o(.text)
-		OBJDIR/exceptions.o(.text)
-		OBJDIR/driver_vec.o(.text)
-		OBJDIR/interrupts.o(.text)
-		OBJDIR/mmu.o(.text)		
-		
-		OBJDIR/BaS.o(.text)
-		OBJDIR/pci.o(.text)
-		OBJDIR/usb.o(.text)
-		OBJDIR/driver_mem.o(.text)
-		OBJDIR/usb_mouse.o(.text)
-		OBJDIR/ohci-hcd.o(.text)
-		OBJDIR/ehci-hcd.o(.text)
-		OBJDIR/wait.o(.text)
+                OBJDIR/wait.o(.text)
+                OBJDIR/exceptions.o(.text)
+                OBJDIR/driver_vec.o(.text)
+                OBJDIR/interrupts.o(.text)
+                OBJDIR/mmu.o(.text)

-		OBJDIR/nbuf.o(.text)
-		OBJDIR/net_timer.o(.text)
-		OBJDIR/queue.o(.text)
-		OBJDIR/nif.o(.text)
-		OBJDIR/fecbd.o(.text)
-		OBJDIR/fec.o(.text)
-		OBJDIR/am79c874.o(.text)
-		OBJDIR/bcm5222.o(.text)
-		OBJDIR/ip.o(.text)
-		OBJDIR/udp.o(text)
-		OBJDIR/bootp.o(text)
-		OBJDIR/tftp.o(text)
-		OBJDIR/arp.o(text)
+                OBJDIR/BaS.o(.text)
+                OBJDIR/pci.o(.text)
+                OBJDIR/pci_wrappers.o(.text)
+                OBJDIR/usb.o(.text)
+                OBJDIR/driver_mem.o(.text)
+                OBJDIR/usb_mouse.o(.text)
+                OBJDIR/ohci-hcd.o(.text)
+                OBJDIR/ehci-hcd.o(.text)
+                OBJDIR/wait.o(.text)

-		OBJDIR/unicode.o(.text)
-		OBJDIR/mmc.o(.text)
-		OBJDIR/ff.o(.text)
-		OBJDIR/sd_card.o(.text)
-		OBJDIR/s19reader.o(.text)
-		OBJDIR/bas_printf.o(.text)
-		OBJDIR/bas_string.o(.text)
-		OBJDIR/printf_helper.o(.text)
-		OBJDIR/cache.o(.text)
-		OBJDIR/dma.o(.text)
-		OBJDIR/MCD_dmaApi.o(.text)
-		OBJDIR/MCD_tasks.o(.text)
-		OBJDIR/MCD_tasksInit.o(.text)
+                OBJDIR/nbuf.o(.text)
+                OBJDIR/net_timer.o(.text)
+                OBJDIR/queue.o(.text)
+                OBJDIR/nif.o(.text)
+                OBJDIR/fecbd.o(.text)
+                OBJDIR/fec.o(.text)
+                OBJDIR/am79c874.o(.text)
+                OBJDIR/bcm5222.o(.text)
+                OBJDIR/ip.o(.text)
+                OBJDIR/udp.o(text)
+                OBJDIR/bootp.o(text)
+                OBJDIR/tftp.o(text)
+                OBJDIR/arp.o(text)

-		OBJDIR/video.o(.text)
-		OBJDIR/videl.o(.text)
-		OBJDIR/fbmem.o(.text)
-		OBJDIR/fbmon.o(.text)
-		OBJDIR/fbmodedb.o(.text)
-		OBJDIR/offscreen.o(.text)
+                OBJDIR/unicode.o(.text)
+                OBJDIR/mmc.o(.text)
+                OBJDIR/ff.o(.text)
+                OBJDIR/sd_card.o(.text)
+                OBJDIR/s19reader.o(.text)
+                OBJDIR/bas_printf.o(.text)
+                OBJDIR/bas_string.o(.text)
+                OBJDIR/printf_helper.o(.text)
+                OBJDIR/cache.o(.text)
+                OBJDIR/dma.o(.text)
+                OBJDIR/MCD_dmaApi.o(.text)
+                OBJDIR/MCD_tasks.o(.text)
+                OBJDIR/MCD_tasksInit.o(.text)

-		OBJDIR/x86decode.o(.text)
-		OBJDIR/x86ops.o(.text)
-		OBJDIR/x86ops2.o(.text)
-		OBJDIR/x86fpu.o(.text)
-		OBJDIR/x86sys.o(.text)
-		OBJDIR/x86biosemu.o(.text)
-		OBJDIR/x86debug.o(.text)
-		OBJDIR/x86prim_ops.o(.text)
-		OBJDIR/x86pcibios.o(.text)
+                OBJDIR/video.o(.text)
+                OBJDIR/videl.o(.text)
+                OBJDIR/fbmem.o(.text)
+                OBJDIR/fbmon.o(.text)
+                OBJDIR/fbmodedb.o(.text)
+                OBJDIR/offscreen.o(.text)

-		OBJDIR/radeon_base.o(.text)
-		OBJDIR/radeon_accel.o(.text)
-		OBJDIR/radeon_cursor.o(.text)
-		OBJDIR/radeon_monitor.o(.text)
+                OBJDIR/x86decode.o(.text)
+                OBJDIR/x86ops.o(.text)
+                OBJDIR/x86ops2.o(.text)
+                OBJDIR/x86fpu.o(.text)
+                OBJDIR/x86sys.o(.text)
+                OBJDIR/x86biosemu.o(.text)
+                OBJDIR/x86debug.o(.text)
+                OBJDIR/x86prim_ops.o(.text)
+                OBJDIR/x86pcibios.o(.text)
+
+                OBJDIR/radeon_base.o(.text)
+                OBJDIR/radeon_accel.o(.text)
+                OBJDIR/radeon_cursor.o(.text)
+                OBJDIR/radeon_monitor.o(.text)
+
+                OBJDIR/xhdi_sd.o(.text)
+                OBJDIR/xhdi_interface.o(.text)
+                OBJDIR/xhdi_vec.o(.text)

-		OBJDIR/xhdi_sd.o(.text)
-		OBJDIR/xhdi_interface.o(.text)
-		OBJDIR/xhdi_vec.o(.text)
-		
 #ifdef COMPILE_RAM
-		/*
-		 * if we compile to RAM anyway, there is no need to copy anything
-		 */
-		. = ALIGN(4);
-		__BAS_DATA_START = .;
-		*(.data)
-		__BAS_DATA_END = .;
-		__BAS_BSS_START = .;
-		*(.bss)	
-		__BAS_BSS_END = .;
+                /*
+                 * if we compile to RAM anyway, there is no need to copy anything
+                 */
+                . = ALIGN(4);
+                __BAS_DATA_START = .;
+                *(.data)
+                __BAS_DATA_END = .;
+                __BAS_BSS_START = .;
+                *(.bss)
+                __BAS_BSS_END = .;
 #endif /* COMPILE_RAM */

 #if (FORMAT_ELF == 1)
-		*(.rodata)
-		*(.rodata.*)
+                *(.rodata)
+                *(.rodata.*)
 #endif
-	} > bas_rom
+        } > bas_rom

 #if (TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS)
-	/*
-	 * put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
-	 */
-	.bas :
-	AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
-	{
-		. = ALIGN(4);		/* same alignment than AT() statement! */
-		__BAS_DATA_START = .;
-		*(.data)
-		__BAS_DATA_END = .;
-		__BAS_BSS_START = .;
-		*(.bss)	
-		__BAS_BSS_END = .;
+        /*
+         * put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
+         */
+        .bas :
+        AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
+        {
+                . = ALIGN(4);		/* same alignment than AT() statement! */
+                __BAS_DATA_START = .;
+                *(.data)
+                __BAS_DATA_END = .;
+                __BAS_BSS_START = .;
+                *(.bss)
+                __BAS_BSS_END = .;

-		. = ALIGN(16);
-	} > bas_ram
+                . = ALIGN(16);
+        } > bas_ram
 #endif

-	.driver_memory :
-	{
-		. = ALIGN(4);
-		_driver_mem_buffer = .;
-		//. = . + DRIVER_MEM_BUFFER_SIZE;
-	} > driver_ram
-	
-	/*
-	 * Global memory map
-	 */
+        .driver_memory :
+        {
+                . = ALIGN(4);
+                _driver_mem_buffer = .;
+                //. = . + DRIVER_MEM_BUFFER_SIZE;
+        } > driver_ram

-	/* SDRAM Initialization */
- 	___SDRAM                = SDRAM_START;
- 	___SDRAM_SIZE           = SDRAM_SIZE;
-	_SDRAM_VECTOR_TABLE		= ___SDRAM;
-	
-	/* ST-RAM */
-	__STRAM                 = ___SDRAM;
-	__STRAM_END             = __TOS;
+        /*
+         * Global memory map
+         */

-	/* TOS */
-	__TOS                   = 0x00e00000;
+        /* SDRAM Initialization */
+        ___SDRAM                = SDRAM_START;
+        ___SDRAM_SIZE           = SDRAM_SIZE;
+        _SDRAM_VECTOR_TABLE		= ___SDRAM;

-	/* FastRAM */
-	__FASTRAM               = 0x10000000;
-	__TARGET_ADDRESS		= TARGET_ADDRESS;
-	
-#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
-	__FASTRAM_END           = __BAS_IN_RAM;
-#else
-	__FASTRAM_END			= TARGET_ADDRESS;
-#endif
+        /* ST-RAM */
+        __STRAM                 = ___SDRAM;
+        __STRAM_END             = __TOS;

-	/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
-	___BOOT_FLASH           = BOOTFLASH_BASE_ADDRESS;
- 	___BOOT_FLASH_SIZE      = BOOTFLASH_SIZE;
+        /* TOS */
+        __TOS                   = 0x00e00000;
+
+        /* FastRAM */
+        __FASTRAM               = 0x10000000;
+        __TARGET_ADDRESS		= TARGET_ADDRESS;

 #if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
-	/* BaS */
-	__BAS_LMA               = LOADADDR(.bas);
-	__BAS_IN_RAM            = ADDR(.bas);
-	__BAS_SIZE              = SIZEOF(.bas);
+        __FASTRAM_END           = __BAS_IN_RAM;
 #else
-	/* BaS is already in RAM - no need to copy anything */
-	__BAS_IN_RAM			= __FASTRAM_END;
-	__BAS_SIZE				= 0;
-	__BAS_LMA				= __BAS_IN_RAM;
+        __FASTRAM_END			= TARGET_ADDRESS;
+#endif
+        __FASTRAM_SIZE			= __FASTRAM_END - __FASTRAM;
+
+        /* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
+        ___BOOT_FLASH           = BOOTFLASH_BASE_ADDRESS;
+        ___BOOT_FLASH_SIZE      = BOOTFLASH_SIZE;
+
+#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
+        /* BaS */
+        __BAS_LMA               = LOADADDR(.bas);
+        __BAS_IN_RAM            = ADDR(.bas);
+        __BAS_SIZE              = SIZEOF(.bas);
+#else
+        /* BaS is already in RAM - no need to copy anything */
+        __BAS_IN_RAM			= __FASTRAM_END;
+        __BAS_SIZE				= 0;
+        __BAS_LMA				= __BAS_IN_RAM;
 #endif

-	/* Other flash components */
-	__FIRETOS               = 0xe0400000;
-	__EMUTOS                = EMUTOS_BASE_ADDRESS;
-	__EMUTOS_SIZE           = 0x00100000;
+        /* Other flash components */
+        __FIRETOS               = 0xe0400000;
+        __EMUTOS                = EMUTOS_BASE_ADDRESS;
+        __EMUTOS_SIZE           = 0x00100000;

-	/* where FPGA data lives in flash */
-	__FPGA_FLASH_DATA 		= 0xe0700000;
-	__FPGA_FLASH_DATA_SIZE 	= 0x100000;
+        /* where FPGA data lives in flash */
+        __FPGA_CONFIG 		= 0xe0700000;
+        __FPGA_CONFIG_SIZE 	= 0x100000;

-	/* VIDEO RAM BASIS */
-	__VRAM                  = 0x60000000;
+        /* VIDEO RAM BASIS */
+        __VRAM                  = 0x60000000;

-	/* Memory mapped registers */
- 	__MBAR                  = 0xFF000000;
-	
-	/* 32KB on-chip System SRAM */
- 	__SYS_SRAM              = __MBAR + 0x10000;
-	__SYS_SRAM_SIZE         = 0x00008000;
+        /* Memory mapped registers */
+        __MBAR                  = 0xFF000000;

-	/* MMU memory mapped registers */
- 	__MMUBAR                = 0xFF040000;
+        /* 32KB on-chip System SRAM */
+        __SYS_SRAM              = __MBAR + 0x10000;
+        __SYS_SRAM_SIZE         = 0x00008000;

-	/*
-	 * 4KB on-chip Core SRAM0: -> exception table 
-	 */
- 	__RAMBAR0               = 0xFF100000;
- 	__RAMBAR0_SIZE          = 0x00001000;
+        /* MMU memory mapped registers */
+        __MMUBAR                = 0xFF040000;

-	/* 4KB on-chip Core SRAM1 */
- 	__RAMBAR1               = 0xFF101000;
- 	__RAMBAR1_SIZE          = 0x00001000;
- 	__SUP_SP                = __RAMBAR0 + __RAMBAR0_SIZE - 4;
+        /*
+         * 4KB on-chip Core SRAM0: -> exception table
+         */
+        __RAMBAR0               = 0xFF100000;
+        __RAMBAR0_SIZE          = 0x00001000;

-	/* system variables */
-	
-	/* RAMBAR0 0 to 0x7FF -> exception vectors */
-	_rt_mod    = __RAMBAR0 + 0x800;
-	_rt_ssp    = __RAMBAR0 + 0x804;
-	_rt_usp    = __RAMBAR0 + 0x808;
-	_rt_vbr    = __RAMBAR0 + 0x80C;  	/* (8)01 */
-	_rt_cacr   = __RAMBAR0 + 0x810;   	/* 002 */
-	_rt_asid   = __RAMBAR0 + 0x814;   	/* 003 */
-	_rt_acr0   = __RAMBAR0 + 0x818;   	/* 004 */
-	_rt_acr1   = __RAMBAR0 + 0x81c;   	/* 005 */
-	_rt_acr2   = __RAMBAR0 + 0x820;   	/* 006 */
-	_rt_acr3   = __RAMBAR0 + 0x824;   	/* 007 */
-	_rt_mmubar = __RAMBAR0 + 0x828;		/* 008 */
-	_rt_sr     = __RAMBAR0 + 0x82c;
-	_d0_save   = __RAMBAR0 + 0x830;
-	_a7_save   = __RAMBAR0 + 0x834;
-	_video_tlb = __RAMBAR0 + 0x838;
-	_video_sbt = __RAMBAR0 + 0x83C;
-	_rt_mbar   = __RAMBAR0 + 0x844;   	/* (c)0f */
+        /* 4KB on-chip Core SRAM1 */
+        __RAMBAR1               = 0xFF101000;
+        __RAMBAR1_SIZE          = 0x00001000;
+        __SUP_SP                = __RAMBAR1 + __RAMBAR1_SIZE - 4;
+
+        /*
+         * this flag (if 1) indicates that FPGA configuration has been loaded through JTAG
+         * and shouldn't be overwritten on boot
+         */
+        __FPGA_JTAG_LOADED		= __RAMBAR1;
+        __FPGA_JTAG_VALID       = __FPGA_JTAG_LOADED + 4;
+
+        /* system variables */
+
+        /* RAMBAR0 0 to 0x7FF -> exception vectors */
+        _rt_mod    = __RAMBAR0 + 0x800;
+        _rt_ssp    = __RAMBAR0 + 0x804;
+        _rt_usp    = __RAMBAR0 + 0x808;
+        _rt_vbr    = __RAMBAR0 + 0x80C;  	/* (8)01 */
+        _rt_cacr   = __RAMBAR0 + 0x810;   	/* 002 */
+        _rt_asid   = __RAMBAR0 + 0x814;   	/* 003 */
+        _rt_acr0   = __RAMBAR0 + 0x818;   	/* 004 */
+        _rt_acr1   = __RAMBAR0 + 0x81c;   	/* 005 */
+        _rt_acr2   = __RAMBAR0 + 0x820;   	/* 006 */
+        _rt_acr3   = __RAMBAR0 + 0x824;   	/* 007 */
+        _rt_mmubar = __RAMBAR0 + 0x828;		/* 008 */
+        _rt_sr     = __RAMBAR0 + 0x82c;
+        _d0_save   = __RAMBAR0 + 0x830;
+        _a7_save   = __RAMBAR0 + 0x834;
+        _video_tlb = __RAMBAR0 + 0x838;
+        _video_sbt = __RAMBAR0 + 0x83C;
+        _rt_mbar   = __RAMBAR0 + 0x844;   	/* (c)0f */

 }
--- a/dma/dma.c
+++ b/dma/dma.c
@@ -29,13 +29,17 @@
 #include "cache.h"
 #include "exceptions.h"

-#if MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
 #include "firebee.h"
-#elif MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
+#else
+#error "unknown machine!"
 #endif /* MACHINE_FIREBEE */

-//#define DBG_DMA
+// #define DBG_DMA
 #ifdef DBG_DMA
 #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
 #else
@@ -54,13 +58,13 @@ struct dma_channel
 static char used_reqs[32] =
 {
 	DMA_ALWAYS,  DMA_DSPI_RXFIFO, DMA_DSPI_TXFIFO, DMA_DREQ0,
-    DMA_PSC0_RX, DMA_PSC0_TX, DMA_USB_EP0,  DMA_USB_EP1,
-    DMA_USB_EP2,  DMA_USB_EP3,  DMA_PCI_TX,  DMA_PCI_RX,
-    DMA_PSC1_RX, DMA_PSC1_TX, DMA_I2C_RX,  DMA_I2C_TX,
-    0,           0,           0,           0,
-    0,           0,           0,           0,
-    0,           0,           0,           0,
-    0,           0,           0,           0
+	DMA_PSC0_RX, DMA_PSC0_TX, DMA_USB_EP0,  DMA_USB_EP1,
+	DMA_USB_EP2,  DMA_USB_EP3,  DMA_PCI_TX,  DMA_PCI_RX,
+	DMA_PSC1_RX, DMA_PSC1_TX, DMA_I2C_RX,  DMA_I2C_TX,
+	0,           0,           0,           0,
+	0,           0,           0,           0,
+	0,           0,           0,           0,
+	0,           0,           0,           0
 };

 static struct dma_channel dma_channel[NCHANNELS] =
@@ -221,7 +225,7 @@ int dma_set_initiator(int initiator)
 			else /* No empty slots */
 			{
 				dbg("%s: no free slot\r\n", __FUNCTION__);
-				
+
 				return 1;
 			}
 			break;
@@ -526,7 +530,7 @@ int dma_get_channel(int requestor)
 }

 /*
- * Remove the channel being initiated by the given requestor from 
+ * Remove the channel being initiated by the given requestor from
 * the active list
 *
 * Parameters:
@@ -547,8 +551,8 @@ void dma_free_channel(int requestor)
 	}
 }

-/* 
- * This is the catch-all interrupt handler for the mult-channel DMA 
+/*
+ * This is the catch-all interrupt handler for the mult-channel DMA
 */
 int dma_interrupt_handler(void *arg1, void *arg2)
 {
@@ -556,8 +560,8 @@ int dma_interrupt_handler(void *arg1, void *arg2)

 	(void) set_ipl(7);

-	/* 
-	 * Determine which interrupt(s) triggered by AND'ing the 
+	/*
+	 * Determine which interrupt(s) triggered by AND'ing the
 	 * pending interrupts with those that aren't masked.
 	 */
 	interrupts = MCF_DMA_DIPR & ~MCF_DMA_DIMR;
@@ -592,11 +596,15 @@ int dma_interrupt_handler(void *arg1, void *arg2)
 void *dma_memcpy(void *dst, void *src, size_t n)
 {
 	int ret;
-	volatile int32_t time;
-	volatile int32_t start;
-	volatile int32_t end;
+
+#ifdef DBG_DMA
+	int32_t time;
+	int32_t start;
+	int32_t end;

 	start = MCF_SLT0_SCNT;
+#endif /* DBG_DMA */
+
 	ret = MCD_startDma(1, src, 4, dst, 4, n, 4, DMA_ALWAYS, 0, MCD_SINGLE_DMA, 0);
 	if (ret == MCD_OK)
 	{
@@ -640,8 +648,10 @@ void *dma_memcpy(void *dst, void *src, size_t n)
 #endif
 	} while (ret != MCD_DONE);

+#ifdef DBG_DMA
 	end = MCF_SLT0_SCNT;
 	time = (start - end) / (SYSCLK / 1000) / 1000;
+#endif /* DBG_DMA */
 	dbg("%s: took %d ms (%f Mbytes/second)\r\n", __FUNCTION__, time, n / (float) time / 1000.0);

 	return dst;
--- a/flash/s19reader.c
+++ b/flash/s19reader.c
@@ -340,6 +340,17 @@ static err_t verify(uint8_t *dst, uint8_t *src, uint32_t length)
 	return OK;
 }

+/*
+ * needed to avoid missing type cast warning below
+ */
+static inline err_t srec_memcpy(uint8_t *dst, uint8_t *src, size_t n)
+{
+    err_t e = OK;
+
+    memcpy((void *) dst, (void *) src, n);
+    return e;
+}
+
 void srec_execute(char *flasher_filename)
 {
 	DRESULT res;
@@ -372,7 +383,7 @@ void srec_execute(char *flasher_filename)
 				{
 					/* next pass: copy data to destination */
 					xprintf("OK.\r\ncopy/flash data: ");
-					err = read_srecords(flasher_filename, &start_address, &length, memcpy);
+                    err = read_srecords(flasher_filename, &start_address, &length, srec_memcpy);
 					if (err == OK)
 					{
 						/* next pass: verify data */
--- a/flash_scripts/flash_firebee_bas.bdm
+++ b/flash_scripts/flash_firebee_bas.bdm
@@ -1,4 +1,4 @@
-#!/usr/local/bin/bdmctrl 
+#!/usr/local/bin/bdmctrl -D2
 #
 # firebee board initialization for bdmctrl 
 #
@@ -21,32 +21,32 @@ write 0xFF000508 0x00001180 4
 write 0xFF000504 0x007F0001 4

 # SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
-write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
-write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
-write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
-write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
-write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
-write 0xFF000108 0x73622830 4 # SDCFG1
-write 0xFF00010C 0x46770000 4 # SDCFG2
+#write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
+#write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
+#write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
+#write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
+#write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
+#write 0xFF000108 0x73622830 4 # SDCFG1
+#write 0xFF00010C 0x46770000 4 # SDCFG2

-write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
-write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
-write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
-sleep 100
-write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
-write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
-write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
-write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
-write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
-sleep 10
+#write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
+#write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
+#write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
+#sleep 100
+#write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
+#write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
+#write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
+#write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
+#write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
+#sleep 10


 # use system sdram as flashlib scratch area.
 # TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
 # This seems to be related to large flash buffers and PC-relative adressing of the plugin
-flash-plugin 0x1000 0xf000 flash29.plugin
+#flash-plugin 0x1000 0xf000 flash29-5475.plugin
 # notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
-flash 0xE0000000
+flash 0xe0000000

 # Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS)
 #
@@ -55,17 +55,44 @@ flash 0xE0000000
 #
 # contrary to documentation, it seems we need to erase-wait after each sector

-erase 0xE0000000 0
-erase 0xE0000000 1
-erase 0xE0000000 2
-erase 0xE0000000 3
-erase 0xE0000000 4
-erase 0xE0000000 5
-erase 0xE0000000 7
-erase 0xE0000000 8
-erase 0xE0000000 9
-erase 0xE0000000 10
-erase-wait 0xE0000000
+erase 0xe0000000 0
+erase-wait 0xe0000000
+erase 0xe0000000 0x1000
+erase-wait 0xe0000000
+erase 0xe0000000 0x2000
+erase-wait 0xe0000000
+erase 0xe0000000 0x3000
+erase-wait 0xe0000000
+erase 0xe0000000 0x4000
+erase-wait 0xe0000000
+erase 0xe0000000 0x5000
+erase-wait 0xe0000000
+erase 0xe0000000 0x6000
+erase-wait 0xe0000000
+erase 0xe0000000 0x7000
+erase-wait 0xe0000000
+erase 0xe0000000 0x8000
+erase-wait 0xe0000000
+erase 0xe0000000 0x10000
+erase-wait 0xe0000000
+erase 0xe0000000 0x18000
+erase-wait 0xe0000000
+erase 0xe0000000 0x20000
+erase-wait 0xe0000000
+erase 0xe0000000 0x28000
+erase-wait 0xe0000000
+erase 0xe0000000 0x30000
+erase-wait 0xe0000000
+erase 0xe0000000 0x38000
+erase-wait 0xe0000000
+erase 0xe0000000 0x40000
+erase-wait 0xe0000000
+erase 0xe0000000 0x48000
+erase-wait 0xe0000000
+erase 0xe0000000 0x50000
+erase-wait 0xe0000000
+erase 0xe0000000 0x58000
+erase-wait 0xe0000000

 load -v ../firebee/bas.elf
 wait
--- a/if/driver_vec.c
+++ b/if/driver_vec.c
@@ -23,20 +23,21 @@
 *      Author: Markus Fröschle
 */

-#include <stdint.h>
-#include <stddef.h>
+#include <bas_types.h>
 #include "version.h"
 #include "xhdi_sd.h"
 #include "dma.h"
 #include "driver_vec.h"
 #include "driver_mem.h"
+#include "pci.h"
+#include "mmu.h"

 /*
 * driver interface struct for the SD card BaS driver
 */
-static struct xhdi_driver_interface xhdi_call_interface = 
+static struct xhdi_driver_interface xhdi_call_interface =
 {
-	xhdi_call
+    xhdi_call
 };

 /*
@@ -46,90 +47,194 @@ static struct xhdi_driver_interface xhdi_call_interface =
 */
 static struct dma_driver_interface dma_interface =
 {
-	.version = 0x0101,
-	.magic = 'DMAC',
-	.dma_set_initiator = &dma_set_initiator,
-	.dma_get_initiator = dma_get_initiator,
-	.dma_free_initiator = dma_free_initiator,
-	.dma_set_channel = dma_set_channel,
-	.dma_get_channel = dma_get_channel,
-	.dma_free_channel = dma_free_channel,
-	.dma_clear_channel = dma_clear_channel,
-	.MCD_startDma = MCD_startDma,
-	.MCD_dmaStatus = MCD_dmaStatus,
-	.MCD_XferProgrQuery = MCD_XferProgrQuery,
-	.MCD_killDma = MCD_killDma,
-	.MCD_continDma = MCD_continDma,
-	.MCD_pauseDma = MCD_pauseDma,
-	.MCD_resumeDma = MCD_resumeDma,
-	.MCD_csumQuery = MCD_csumQuery,
-	.dma_malloc = driver_mem_alloc,
-	.dma_free = driver_mem_free
+    .version = 0x0101,
+    .magic = 0x444d4143, 						/* 'DMAC' */
+    .dma_set_initiator = dma_set_initiator,
+    .dma_get_initiator = dma_get_initiator,
+    .dma_free_initiator = dma_free_initiator,
+    .dma_set_channel = dma_set_channel,
+    .dma_get_channel = dma_get_channel,
+    .dma_free_channel = dma_free_channel,
+    .dma_clear_channel = dma_clear_channel,
+    .MCD_startDma = (int (*)(long, int8_t *, unsigned int, int8_t *, unsigned int,
+                    unsigned int, unsigned int, unsigned int, int,
+                    unsigned int, unsigned int)) MCD_startDma,
+    .MCD_dmaStatus = (int32_t (*)(int32_t)) MCD_dmaStatus,
+    .MCD_XferProgrQuery = (int32_t (*)(int32_t, MCD_XferProg *)) MCD_XferProgrQuery,
+    .MCD_killDma = (int32_t (*)(int32_t)) MCD_killDma,
+    .MCD_continDma = (int32_t (*)(int32_t)) MCD_continDma,
+    .MCD_pauseDma = (int32_t (*)(int32_t)) MCD_pauseDma,
+    .MCD_resumeDma = (int32_t (*)(int32_t)) MCD_resumeDma,
+    .MCD_csumQuery = (int32_t (*)(int32_t, uint32_t *)) MCD_csumQuery,
+    .dma_malloc = driver_mem_alloc,
+    .dma_free = driver_mem_free
 };

-extern const struct fb_info *info_fb;
+extern struct fb_info *info_fb;
+
+/*
+ * driver interface struct for the PCI_BIOS BaS driver
+ */
+static struct pci_bios_interface pci_interface =
+{
+    .subjar = 0,
+    .version = 0x00010000,
+    .find_pci_device = wrapper_find_pci_device,
+    .find_pci_classcode = wrapper_find_pci_classcode,
+    .read_config_byte = wrapper_read_config_byte,
+    .read_config_word = wrapper_read_config_word,
+    .read_config_longword = wrapper_read_config_longword,
+    .fast_read_config_byte = wrapper_fast_read_config_byte,
+    .fast_read_config_word = wrapper_fast_read_config_word,
+    .fast_read_config_longword = wrapper_fast_read_config_longword,
+    .write_config_byte = wrapper_write_config_byte,
+    .write_config_word = wrapper_write_config_word,
+    .write_config_longword = wrapper_write_config_longword,
+    .hook_interrupt = wrapper_hook_interrupt,
+    .unhook_interrupt = wrapper_unhook_interrupt,
+    .special_cycle = wrapper_special_cycle,
+    .get_routing = wrapper_get_routing,
+    .set_interrupt = wrapper_set_interrupt,
+    .get_resource = wrapper_get_resource,
+    .get_card_used = wrapper_get_card_used,
+    .set_card_used = wrapper_set_card_used,
+    .read_mem_byte = wrapper_read_mem_byte,
+    .read_mem_word = wrapper_read_mem_word,
+    .read_mem_longword = wrapper_read_mem_longword,
+    .fast_read_mem_byte = wrapper_fast_read_mem_byte,
+    .fast_read_mem_word = wrapper_fast_read_mem_word,
+    .fast_read_mem_longword = wrapper_fast_read_mem_longword,
+    .write_mem_byte = wrapper_write_mem_byte,
+    .write_mem_word = wrapper_write_mem_word,
+    .write_mem_longword = wrapper_write_mem_longword,
+    .read_io_byte = wrapper_read_io_byte,
+    .read_io_word = wrapper_read_io_word,
+    .read_io_longword = wrapper_read_io_longword,
+    .fast_read_io_byte = wrapper_fast_read_io_byte,
+    .fast_read_io_word = wrapper_fast_read_io_word,
+    .fast_read_io_longword = wrapper_fast_read_io_longword,
+    .write_io_byte = wrapper_write_io_byte,
+    .write_io_word = wrapper_write_io_word,
+    .write_io_longword = wrapper_write_io_longword,
+    .get_machine_id = wrapper_get_machine_id,
+    .get_pagesize = wrapper_get_pagesize,
+    .virt_to_bus = wrapper_virt_to_bus,
+    .bus_to_virt = wrapper_bus_to_virt,
+    .virt_to_phys = wrapper_virt_to_phys,
+    .phys_to_virt = wrapper_phys_to_virt,
+};

 /*
 * driver interface struct for the BaS framebuffer video driver
 */
 static struct framebuffer_driver_interface framebuffer_interface =
 {
-	.framebuffer_info = &info_fb
+    .framebuffer_info = &info_fb
 };

+
 static struct generic_interface interfaces[] =
 {
-	{
-		/* BaS SD-card driver interface */
+    {
+        /* BaS SD-card driver interface */

-		.type = XHDI_DRIVER,
-		.name = "SDCARD",
-		.description = "BaS SD Card driver",
-		.version = 0,
-		.revision = 1,
-		.interface.xhdi = &xhdi_call_interface 
-	},
-	{
-		.type = MCD_DRIVER,
-		.name = "MCDDMA",
-		.description = "BaS Multichannel DMA driver",
-		.version = 0,
-		.revision = 1,
-		.interface.dma = &dma_interface,
-	},
-	{
-		.type = VIDEO_DRIVER,
-		.name = "RADEON",
-		.description = "BaS RADEON framebuffer driver",
-		.version = 0,
-		.revision = 1,
-		.interface.fb = &framebuffer_interface,
-	},
+        .type = XHDI_DRIVER,
+        .name = "SDCARD",
+        .description = "BaS SD Card driver",
+        .version = 0,
+        .revision = 1,
+        .interface.xhdi = &xhdi_call_interface
+    },
+    {
+        .type = MCD_DRIVER,
+        .name = "MCDDMA",
+        .description = "BaS Multichannel DMA driver",
+        .version = 0,
+        .revision = 1,
+        .interface.dma = &dma_interface,
+    },
+    {
+        .type = VIDEO_DRIVER,
+        .name = "RADEON",
+        .description = "BaS RADEON framebuffer driver",
+        .version = 0,
+        .revision = 1,
+        .interface.fb = &framebuffer_interface,
+    },
+    {
+        .type = PCI_DRIVER,
+        .name = "PCI",
+        .description = "BaS PCI_BIOS driver",
+        .version = 0,
+        .revision = 1,
+        .interface.pci = &pci_interface,
+    },
+    {
+        .type = MMU_DRIVER,
+        .name = "MMU",
+        .description = "BaS MMU driver",
+        .version = 0,
+        .revision = 1,
+        .interface.mmu = NULL,
+    },
+    /* insert new drivers here */

-	/* insert new drivers here */
-
-	{
-		.type = END_OF_DRIVERS
-	}
+    {
+        .type = END_OF_DRIVERS
+    }
 };

+extern void remove_handler(void);   /* forward declaration */
+
 /*
 * this is the driver table we expose to the OS
 */
 static struct driver_table bas_drivers =
 {
-	.bas_version = MAJOR_VERSION,
-	.bas_revision = MINOR_VERSION,
-	.remove_handler = NULL,
-	.interfaces = { interfaces }
+    .bas_version = MAJOR_VERSION,
+    .bas_revision = MINOR_VERSION,
+    .remove_handler = remove_handler,
+    .interfaces = interfaces
 };

+void remove_handler(void)
+{
+    extern void std_exc_vec(void);
+    uint32_t *trap_0_vector = (uint32_t *) 0x80;
+
+    *trap_0_vector = (uint32_t) std_exc_vec;
+}
+
 void __attribute__((interrupt)) get_bas_drivers(void)
 {
-	__asm__ __volatile__(
-		"move.l	#%[drivers],d0\n\t"
-		:	                            /* no output */
-		:	[drivers] "o" (bas_drivers)		/* input */
-		:									/* clobber */
-	);
+    __asm__ __volatile(
+        /*
+         * sp should now point to the next instruction after the trap
+         * The trap itself is 2 bytes, the four bytes before that must
+         * read '_BAS' or we are not meant by this call
+         */
+        "		move.l	a0,-(sp)				\n\t"	// save registers
+        "       move.l  d0,-(sp)                \n\t"
+        "		move.l	12(sp),a0         		\n\t"	// get return address
+        "       move.l  -6(a0),d0               \n\t"   //
+        "		cmp.l	#0x5f424153,d0			\n\t"	// is it '_BAS'?
+        "		beq		fetch_drivers			\n\t"	// yes
+        /*
+         * This seems indeed a "normal" trap #0. Better pass control to "normal" trap #0 processing
+         * If trap #0 isn't set to something sensible, we'll probably crash here, but this must be
+         * prevented on the caller side.
+         */
+        "		move.l	(sp)+,d0				\n\t"	// restore registers
+        "		move.l	(sp)+,a0				\n\t"
+        "		move.l	0x80,-(sp)				\n\t"	// fetch vector
+        "		rts								\n\t"	// and jump through it
+
+        "fetch_drivers:							\n\t"
+        "		move.l	#%[drivers],d0			\n\t"	// return driver struct in d0
+        "		addq.l	#4,sp					\n\t"	// adjust stack
+        "       move.l  (sp)+,a0                \n\t"   // restore register
+        :	                            /* no output */
+        :	[drivers] "o" (bas_drivers)		/* input */
+        :									/* clobber */
+    );
 }
--- a/include/bas_string.h
+++ b/include/bas_string.h
@@ -35,6 +35,7 @@ extern char *strncat(char *dst, const char *src, size_t max);
 extern int atoi(const char *c);
 extern void *memcpy(void *dst, const void *src, size_t n);
 extern void *memset(void *s, int c, size_t n);
+extern int memcmp(const void *s1, const void *s2, size_t max);
 extern void bzero(void *s, size_t n);

 #define isdigit(c)	(((c) >= '0') && ((c) <= '9'))
--- a/include/driver_vec.h
+++ b/include/driver_vec.h
@@ -27,54 +27,57 @@

 #include "xhdi_sd.h"
 #include "MCD_dma.h"
+#include "pci.h"

 enum driver_type
 {
-	END_OF_DRIVERS,		/* marks end of driver list */
-	BLOCKDEV_DRIVER,
-	CHARDEV_DRIVER,
-	VIDEO_DRIVER,
-	XHDI_DRIVER,
-	MCD_DRIVER,
+    BLOCKDEV_DRIVER,
+    CHARDEV_DRIVER,
+    XHDI_DRIVER,
+    MCD_DRIVER,
+    VIDEO_DRIVER,
+    PCI_DRIVER,
+    MMU_DRIVER,
+    END_OF_DRIVERS = 0xffffffff		/* marks end of driver list */
 };

 struct generic_driver_interface
 {
-	uint32_t (*init)(void);
-	uint32_t (*read)(void *buf, size_t count);
-	uint32_t (*write)(const void *buf, size_t count);
-	uint32_t (*ioctl)(uint32_t request, ...);
+    uint32_t (*init)(void);
+    uint32_t (*read)(void *buf, size_t count);
+    uint32_t (*write)(const void *buf, size_t count);
+    uint32_t (*ioctl)(uint32_t request, ...);
 };

 struct dma_driver_interface
 {
-	int32_t version;
-	int32_t magic;
-	int32_t (*dma_set_initiator)(int32_t initiator);
-	uint32_t (*dma_get_initiator)(int32_t requestor);
-	void (*dma_free_initiator)(int32_t requestor);
-	int32_t (*dma_set_channel)(int32_t requestor, void (*handler)(void));
-	int32_t (*dma_get_channel)(int32_t requestor);
-	void (*dma_free_channel)(int32_t requestor);
-	void (*dma_clear_channel)(int32_t channel);
-	int32_t (*MCD_startDma)(long channel,
-						int8_t *srcAddr, uint32_t srcIncr, int8_t *destAddr, uint32_t destIncr,
-						uint32_t dmaSize, uint32_t xferSize, uint32_t initiator, int32_t priority,
-						uint32_t flags, uint32_t funcDesc);
-	int32_t (*MCD_dmaStatus)(int32_t channel);
-	int32_t (*MCD_XferProgrQuery)(int32_t channel, MCD_XferProg *progRep);
-	int32_t (*MCD_killDma)(int32_t channel);
-	int32_t (*MCD_continDma)(int32_t channel);
-	int32_t (*MCD_pauseDma)(int32_t channel);
-	int32_t (*MCD_resumeDma)(int32_t channel);
-	int32_t (*MCD_csumQuery)(int32_t channel, uint32_t *csum);
-	void *(*dma_malloc)(uint32_t amount);
-	int32_t (*dma_free)(void *addr);
+    int32_t version;
+    int32_t magic;
+    int (*dma_set_initiator)(int initiator);
+    uint32_t (*dma_get_initiator)(int requestor);
+    void (*dma_free_initiator)(int requestor);
+    int (*dma_set_channel)(int requestor, void (*handler)(void));
+    int (*dma_get_channel)(int requestor);
+    void (*dma_free_channel)(int requestor);
+    void (*dma_clear_channel)(int channel);
+    int (*MCD_startDma)(long channel,
+                        int8_t *srcAddr, unsigned int srcIncr, int8_t *destAddr, unsigned int destIncr,
+                        unsigned int dmaSize, unsigned int xferSize, unsigned int initiator, int priority,
+                        unsigned int flags, unsigned int funcDesc);
+    int32_t (*MCD_dmaStatus)(int32_t channel);
+    int32_t (*MCD_XferProgrQuery)(int32_t channel, MCD_XferProg *progRep);
+    int32_t (*MCD_killDma)(int32_t channel);
+    int32_t (*MCD_continDma)(int32_t channel);
+    int32_t (*MCD_pauseDma)(int32_t channel);
+    int32_t (*MCD_resumeDma)(int32_t channel);
+    int32_t (*MCD_csumQuery)(int32_t channel, uint32_t *csum);
+    void *(*dma_malloc)(uint32_t amount);
+    int32_t (*dma_free)(void *addr);
 };
-	
+
 struct xhdi_driver_interface
 {
-	uint32_t (*xhdivec)();
+    uint32_t (*xhdivec)();
 };

 /* Interpretation of offset for color fields: All offsets are from the right,
@@ -88,7 +91,7 @@ struct fb_bitfield
    unsigned long offset;           /* beginning of bitfield    */
    unsigned long length;           /* length of bitfield       */
    unsigned long msb_right;        /* != 0 : Most significant bit is */
-				                    /* right */
+                                    /* right */
 };

 /*
@@ -101,19 +104,19 @@ struct fb_var_screeninfo
    unsigned long xres_virtual;     /* virtual resolution       */
    unsigned long yres_virtual;
    unsigned long xoffset;          /* offset from virtual to visible */
-    unsigned long yoffset;          /* resolution           */
+    unsigned long yoffset;          /* resolution       */

-    unsigned long bits_per_pixel;   /* guess what           */
+    unsigned long bits_per_pixel;   /* guess what       */
    unsigned long grayscale;        /* != 0 Graylevels instead of colors */

    struct fb_bitfield red;         /* bitfield in fb mem if true color, */
    struct fb_bitfield green;       /* else only length is significant */
    struct fb_bitfield blue;
-    struct fb_bitfield transp;      /* transparency         */
+    struct fb_bitfield transp;      /* transparency     */

    unsigned long nonstd;           /* != 0 Non standard pixel format */

-    unsigned long activate;         /* see FB_ACTIVATE_*        */
+    unsigned long activate;         /* see FB_ACTIVATE_*    */

    unsigned long height;           /* height of picture in mm    */
    unsigned long width;            /* width of picture in mm     */
@@ -128,7 +131,7 @@ struct fb_var_screeninfo
    unsigned long lower_margin;
    unsigned long hsync_len;        /* length of horizontal sync    */
    unsigned long vsync_len;        /* length of vertical sync  */
-    unsigned long sync;             /* see FB_SYNC_*        */
+    unsigned long sync;             /* see FB_SYNC_*    */
    unsigned long vmode;            /* see FB_VMODE_*       */
    unsigned long rotate;           /* angle we rotate counter clockwise */
    unsigned long refresh;
@@ -141,7 +144,7 @@ struct fb_fix_screeninfo
    unsigned long smem_start;       /* Start of frame buffer mem */
                                    /* (physical address) */
    unsigned long smem_len;         /* Length of frame buffer mem */
-    unsigned long type;             /* see FB_TYPE_*        */
+    unsigned long type;             /* see FB_TYPE_*    */
    unsigned long type_aux;         /* Interleave for interleaved Planes */
    unsigned long visual;           /* see FB_VISUAL_*      */
    unsigned short xpanstep;        /* zero if no hardware panning  */
@@ -158,7 +161,7 @@ struct fb_fix_screeninfo

 struct fb_chroma
 {
-    unsigned long redx; /* in fraction of 1024 */
+    unsigned long redx;             /* in fraction of 1024 */
    unsigned long greenx;
    unsigned long bluex;
    unsigned long whitex;
@@ -201,33 +204,97 @@ struct fb_monspecs

 struct framebuffer_driver_interface
 {
-	struct fb_info **framebuffer_info;	/* pointer to an fb_info struct (defined in include/fb.h) */
+    struct fb_info **framebuffer_info;	/* pointer to an fb_info struct (defined in include/fb.h) */
+};
+
+struct pci_bios_interface
+{
+    uint32_t subjar;
+    uint32_t version;
+    /* Although we declare this functions as standard gcc functions (cdecl),
+     * they expect paramenters inside registers (fastcall) unsupported by gcc m68k.
+     * Caller will take care of parameters passing convention.
+     */
+    int32_t (*find_pci_device)	(uint32_t id, uint16_t index);
+    int32_t (*find_pci_classcode)	(uint32_t class, uint16_t index);
+    int32_t (*read_config_byte)	(int32_t handle, uint16_t reg, uint8_t *address);
+    int32_t (*read_config_word)	(int32_t handle, uint16_t reg, uint16_t *address);
+    int32_t (*read_config_longword)	(int32_t handle, uint16_t reg, uint32_t *address);
+    uint8_t (*fast_read_config_byte)	(int32_t handle, uint16_t reg);
+    uint16_t (*fast_read_config_word)	(int32_t handle, uint16_t reg);
+    uint32_t (*fast_read_config_longword)	(int32_t handle, uint16_t reg);
+    int32_t (*write_config_byte)	(int32_t handle, uint16_t reg, uint16_t val);
+    int32_t (*write_config_word)	(int32_t handle, uint16_t reg, uint16_t val);
+    int32_t (*write_config_longword)	(int32_t handle, uint16_t reg, uint32_t val);
+    int32_t (*hook_interrupt)	(int32_t handle, uint32_t *routine, uint32_t *parameter);
+    int32_t (*unhook_interrupt)	(int32_t handle);
+    int32_t (*special_cycle)	(uint16_t bus, uint32_t data);
+    int32_t (*get_routing)	(int32_t handle);
+    int32_t (*set_interrupt)	(int32_t handle);
+    int32_t (*get_resource)	(int32_t handle);
+    int32_t (*get_card_used)	(int32_t handle, uint32_t *address);
+    int32_t (*set_card_used)	(int32_t handle, uint32_t *callback);
+    int32_t (*read_mem_byte)	(int32_t handle, uint32_t offset, uint8_t *address);
+    int32_t (*read_mem_word)	(int32_t handle, uint32_t offset, uint16_t *address);
+    int32_t (*read_mem_longword)	(int32_t handle, uint32_t offset, uint32_t *address);
+    uint8_t (*fast_read_mem_byte)	(int32_t handle, uint32_t offset);
+    uint16_t (*fast_read_mem_word)	(int32_t handle, uint32_t offset);
+    uint32_t (*fast_read_mem_longword)	(int32_t handle, uint32_t offset);
+    int32_t (*write_mem_byte)	(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_mem_word)	(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_mem_longword)	(int32_t handle, uint32_t offset, uint32_t val);
+    int32_t (*read_io_byte)	(int32_t handle, uint32_t offset, uint8_t *address);
+    int32_t (*read_io_word)	(int32_t handle, uint32_t offset, uint16_t *address);
+    int32_t (*read_io_longword)	(int32_t handle, uint32_t offset, uint32_t *address);
+    uint8_t (*fast_read_io_byte)	(int32_t handle, uint32_t offset);
+    uint16_t (*fast_read_io_word)	(int32_t handle, uint32_t offset);
+    uint32_t (*fast_read_io_longword)	(int32_t handle, uint32_t offset);
+    int32_t (*write_io_byte)	(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_io_word)	(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_io_longword)	(int32_t handle, uint32_t offset, uint32_t val);
+    int32_t (*get_machine_id)	(void);
+    int32_t (*get_pagesize)	(void);
+    int32_t (*virt_to_bus)	(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+    int32_t (*bus_to_virt)	(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+    int32_t (*virt_to_phys)	(uint32_t address, PCI_CONV_ADR *pointer);
+    int32_t (*phys_to_virt)	(uint32_t address, PCI_CONV_ADR *pointer);
+//	int32_t reserved[2];
+};
+
+struct mmu_driver_interface
+{
+    int32_t (*map_page_locked)(uint32_t address, uint32_t length, int asid);
+    int32_t (*unlock_page)(uint32_t address, uint32_t length, int asid);
+    int32_t (*report_locked_pages)(uint32_t *num_itlb, uint32_t *num_dtlb);
+    uint32_t (*report_pagesize)(void);
 };

 union interface
 {
-	struct generic_driver_interface *gdi;
-	struct xhdi_driver_interface *xhdi;
-	struct dma_driver_interface *dma;
-	struct framebuffer_driver_interface *fb;
+    struct generic_driver_interface *gdi;
+    struct xhdi_driver_interface *xhdi;
+    struct dma_driver_interface *dma;
+    struct framebuffer_driver_interface *fb;
+    struct pci_bios_interface *pci;
+    struct mmu_driver_interface *mmu;
 };

 struct generic_interface
 {
-	enum driver_type type;
-	char name[16];
-	char description[64];
-	int version;
-	int revision;
-	union interface interface;
+    enum driver_type type;
+    char name[16];
+    char description[64];
+    int version;
+    int revision;
+    union interface interface;
 };

 struct driver_table
 {
-	uint32_t bas_version;
-	uint32_t bas_revision;
-	uint32_t (*remove_handler)();			/* calling this will disable the BaS' hook into trap #0 */
-	struct generic_interface *interfaces[];
+    uint32_t bas_version;
+    uint32_t bas_revision;
+    void (*remove_handler)(void);			/* calling this will disable the BaS' hook into trap #0 */
+    struct generic_interface *interfaces;
 };


--- a/include/firebee.h
+++ b/include/firebee.h
@@ -27,7 +27,7 @@
 *      Author: Markus Fröschle
 */

-#define SYSCLK			132000
+#define SYSCLK			132000		/* NOTE: 132 _is_ correct. 133 _is_ wrong. Do not change! */

 #define BOOTFLASH_BASE_ADDRESS		0xE0000000
 #define BOOTFLASH_SIZE				0x800000		/* FireBee has 8 MByte Flash */
--- a/include/font.h
+++ b/include/font.h
@@ -0,0 +1,98 @@
+/*
+ * font.h - font specific definitions
+ *
+ * Copyright (c) 2001 Lineo, Inc.
+ * Copyright (c) 2004 by Authors:
+ *
+ * Authors:
+ *  MAD     Martin Doering
+ *
+ * This file is distributed under the GPL, version 2 or at your
+ * option any later version.  See doc/license.txt for details.
+ */
+
+#ifndef FONT_H
+#define FONT_H
+
+#include <stdint.h>
+
+/* font header flags */
+
+#define F_DEFAULT 1     /* this is the default font (face and size) */
+#define F_HORZ_OFF  2   /* there are left and right offset tables */
+#define F_STDFORM  4    /* is the font in standard format */
+#define F_MONOSPACE 8   /* is the font monospaced */
+
+/* font style bits */
+
+#define F_THICKEN 1
+#define F_LIGHT 2
+#define F_SKEW  4
+#define F_UNDER 8
+#define F_OUTLINE 16
+#define F_SHADOW        32
+
+/* font specific linea variables */
+
+extern const uint16_t *v_fnt_ad;   /* address of current monospace font */
+extern const uint16_t *v_off_ad;   /* address of font offset table */
+extern uint16_t v_fnt_nd;          /* ascii code of last cell in font */
+extern uint16_t v_fnt_st;          /* ascii code of first cell in font */
+extern uint16_t v_fnt_wr;          /* font cell wrap */
+
+/* character cell specific linea variables */
+
+extern uint16_t    v_cel_ht;       /* cell height (width is 8) */
+extern uint16_t    v_cel_mx;       /* needed by MiNT: columns on the screen minus 1 */
+extern uint16_t    v_cel_my;       /* needed by MiNT: rows on the screen minus 1 */
+extern uint16_t    v_cel_wr;       /* needed by MiNT: length (in int8_ts) of a line of characters */
+
+/*
+ * font_ring is a struct of four pointers, each of which points to
+ * a list of font headers linked together to form a string.
+ */
+
+extern struct font_head *font_ring[4];  /* Ring of available fonts */
+extern int16_t font_count;                 /* all three fonts and NULL */
+
+/* the font header descibes a font */
+
+struct font_head {
+    int16_t font_id;
+    int16_t point;
+    int8_t name[32];
+    uint16_t first_ade;
+    uint16_t last_ade;
+    uint16_t top;
+    uint16_t ascent;
+    uint16_t half;
+    uint16_t descent;
+    uint16_t bottom;
+    uint16_t max_char_width;
+    uint16_t max_cell_width;
+    uint16_t left_offset;          /* amount character slants left when skewed */
+    uint16_t right_offset;         /* amount character slants right */
+    uint16_t thicken;              /* number of pixels to smear */
+    uint16_t ul_size;              /* size of the underline */
+    uint16_t lighten;              /* mask to and with to lighten  */
+    uint16_t skew;                 /* mask for skewing */
+    uint16_t flags;
+
+    const uint8_t *hor_table;     /* horizontal offsets */
+    const uint16_t *off_table;     /* character offsets  */
+    const uint16_t *dat_table;     /* character definitions */
+    uint16_t form_width;
+    uint16_t form_height;
+
+    struct font_head *next_font;/* pointer to next font */
+    uint16_t font_seg;
+};
+
+
+
+/* prototypes */
+
+void font_init(void);           /* initialize BIOS font ring */
+void font_set_default(void);    /* choose the default font */
+
+#endif /* FONT_H */
--- a/include/interrupts.h
+++ b/include/interrupts.h
@@ -79,11 +79,11 @@
 #define	INT_SOURCE_GPT0				62	// GPT0 timer interrupt


-#define FEC0_INTC_LVL	5			/* interrupt level for FEC0 */
-#define FEC0_INTC_PRI	7			/* interrupt priority for FEC0 */
+#define FEC0_INTC_LVL	1			/* interrupt level for FEC0 */
+#define FEC0_INTC_PRI	2			/* interrupt priority for FEC0 */

-#define FEC1_INTC_LVL	5			/* interrupt level for FEC1 */
-#define FEC1_INTC_PRI	7			/* interrupt priority for FEC1 */
+#define FEC1_INTC_LVL	1			/* interrupt level for FEC1 */
+#define FEC1_INTC_PRI	2			/* interrupt priority for FEC1 */

 #define FEC_INTC_LVL(x)		((x == 0) ? FEC0_INTC_LVL : FEC1_INTC_LVL)
 #define FEC_INTC_PRI(x)		((x == 0) ? FEC0_INTC_PRI : FEC1_INTC_PRI)
@@ -101,7 +101,7 @@ extern int register_interrupt_handler(uint8_t source, uint8_t level, uint8_t pri
 #define ISR_USER_ISR 	0x02

 extern void isr_init(void);
-extern int isr_register_handler(int type, int vector, int (*handler)(void *, void *), void *hdev, void *harg);
-extern void isr_remove_handler(int type ,int (*handler)(void *, void *));
+extern int isr_register_handler(int vector, int (*handler)(void *, void *), void *hdev, void *harg);
+extern void isr_remove_handler(int (*handler)(void *, void *));
 extern bool isr_execute_handler(int vector);
 #endif /* _INTERRUPTS_H_ */
--- a/include/ip.h
+++ b/include/ip.h
@@ -9,7 +9,6 @@
 #ifndef _IP_H
 #define _IP_H

-/********************************************************************/

 /* 32-bit IP Addresses */
 typedef uint8_t IP_ADDR[4];
@@ -57,7 +56,6 @@ typedef struct
 #define IP_HDR_OFFSET   ETH_HDR_LEN
 #define IP_HDR_SIZE     20  /* no options */

-/********************************************************************/

 typedef struct
 {
@@ -71,7 +69,6 @@ typedef struct
 	unsigned int    err;
 } IP_INFO;

-/********************************************************************/

 extern void ip_handler(NIF *nif, NBUF *nbf);
 uint16_t ip_chksum(uint16_t *data, int num);
--- a/include/m54455.h
+++ b/include/m54455.h
@@ -0,0 +1,49 @@
+#ifndef _M54455_H_
+#define _M54455_H_
+
+/*
+ * m54455.h
+ *
+ * preprocessor definitions for the M54455 Freescale machine. This file should contain nothing but preprocessor
+ * definition that evaluate to numbers. It is intended for use in C sources as well as in linker control
+ * files, so care must be taken to not break the syntax of either one.
+ * 
+ * This file is part of BaS_gcc.
+ *
+ * BaS_gcc is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * BaS_gcc is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *  Created on: 26.02.2013
+ *      Author: Markus Fröschle
+ */
+
+#define SYSCLK			133000
+
+#define BOOTFLASH_BASE_ADDRESS		0xe0000000
+#define BOOTFLASH_SIZE				0x800000
+#define BOOTFLASH_BAM				(BOOTFLASH_SIZE - 1)
+
+#define SDRAM_START					0x00000000	/* start at address 0 */
+#define SDRAM_SIZE					0x8000000
+
+#ifdef COMPILE_RAM
+#define TARGET_ADDRESS	(SDRAM_START + SDRAM_SIZE - 0x200000)
+#else
+#define TARGET_ADDRESS	BOOTFLASH_BASE_ADDRESS
+#endif /* COMPILE_RAM */
+
+#define DRIVER_MEM_BUFFER_SIZE	0x100000
+
+#define EMUTOS_BASE_ADDRESS 	0xe0100000
+
+#endif /* _M54455_H_ */
--- a/include/mmu.h
+++ b/include/mmu.h
@@ -26,8 +26,67 @@

 #include "bas_types.h"

+/*
+ * ACR register handling macros
+ */
+#define ACR_BA(x)                   ((x) & 0xffff0000)
+#define ACR_ADMSK(x)                (((x) & 0xffff) << 16)
+#define ACR_E(x)                    (((x) & 1) << 15)
+
+#define ACR_S(x)                    (((x) & 3) << 13)
+#define ACR_S_USERMODE              0
+#define ACR_S_SUPERVISOR_MODE       1
+#define ACR_S_ALL                   2
+
+#define ACR_ADDRESS_MASK_MODE(x)	(((x) & 1) << 10)
+
+#define ACR_CACHE_MODE(x)			(((x) & 3) << 5)
+#define ACR_SUPERVISOR_PROTECT(x)	(((x) & 1) << 3)
+#define ACR_WRITE_PROTECT(x)		(((x) & 1) << 2)
+
+
+/*
+ * MMU register handling macros
+ */
+
 #define SCA_PAGE_ID		6	/* indicates video memory page */

+/*
+ * MMU page sizes
+ */
+#define MMU_PAGE_SIZE_1M	0
+#define MMU_PAGE_SIZE_4K	1
+#define MMU_PAGE_SIZE_8K	2
+#define MMU_PAGE_SIZE_1K	3
+
+/*
+ * cache modes
+ */
+#define CACHE_WRITETHROUGH		0
+#define CACHE_COPYBACK			1
+#define CACHE_NOCACHE_PRECISE	2
+#define CACHE_NOCACHE_IMPRECISE	3
+
+
+/*
+ * page flags
+ */
+#define SV_PROTECT				1
+#define SV_USER					0
+
+#define ACCESS_READ		(1 << 0)
+#define	ACCESS_WRITE	(1 << 1)
+#define ACCESS_EXECUTE	(1 << 2)
+
+struct map_flags
+{
+	unsigned cache_mode:2;
+	unsigned protection:1;
+	unsigned page_id:8;
+	unsigned access:3;
+	unsigned unused:18;
+};
+
 /*
 * global variables from linker script
 */
@@ -35,6 +94,6 @@ extern long video_tlb;
 extern long video_sbt;

 extern void mmu_init(void);
-extern void mmutr_miss(uint32_t addresss);
+extern void mmu_map_page(uint32_t virt, uint32_t phys, uint32_t map_size, struct map_flags flags);

 #endif /* _MMU_H_ */
--- a/include/pci.h
+++ b/include/pci.h
@@ -243,10 +243,94 @@ extern int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t va
 extern int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value);
 extern int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value);

-extern struct pci_rd *pci_get_resource(int32_t handle);
 extern int32_t pci_hook_interrupt(int32_t handle, void *interrupt_handler, void *parameter);
 extern int32_t pci_unhook_interrupt(int32_t handle);

+extern struct pci_rd *pci_get_resource(int32_t handle);
+
+/*
+ * Not implemented PCI_BIOS functions
+ */
+extern uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg);
+extern uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg);
+extern uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg);
+extern int32_t pci_special_cycle(uint16_t bus, uint32_t data);
+extern int32_t pci_get_routing(int32_t handle);
+extern int32_t pci_set_interrupt(int32_t handle);
+extern int32_t pci_get_card_used(int32_t handle, uint32_t *address);
+extern int32_t pci_set_card_used(int32_t handle, uint32_t *callback);
+extern int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset);
+extern uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset);
+extern uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset);
+extern int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset);
+extern uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset);
+extern uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset);
+extern int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t pci_get_machine_id(void);
+extern int32_t pci_get_pagesize(void);
+extern int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
+
+/*
+ * prototypes for PCI wrapper routines
+ */
+extern int32_t wrapper_find_pci_device(uint32_t id, uint16_t index);
+extern int32_t wrapper_find_pci_classcode(uint32_t class, uint16_t index);
+extern int32_t wrapper_read_config_byte(int32_t handle, uint16_t reg, uint8_t *address);
+extern int32_t wrapper_read_config_word(int32_t handle, uint16_t reg, uint16_t *address);
+extern int32_t wrapper_read_config_longword(int32_t handle, uint16_t reg, uint32_t *address);
+extern uint8_t wrapper_fast_read_config_byte(int32_t handle, uint16_t reg);
+extern uint16_t wrapper_fast_read_config_word(int32_t handle, uint16_t reg);
+extern uint32_t wrapper_fast_read_config_longword(int32_t handle, uint16_t reg);
+extern int32_t wrapper_write_config_byte(int32_t handle, uint16_t reg, uint16_t val);
+extern int32_t wrapper_write_config_word(int32_t handle, uint16_t reg, uint16_t val);
+extern int32_t wrapper_write_config_longword(int32_t handle, uint16_t reg, uint32_t val);
+extern int32_t wrapper_hook_interrupt(int32_t handle, uint32_t *routine, uint32_t *parameter);
+extern int32_t wrapper_unhook_interrupt(int32_t handle);
+extern int32_t wrapper_special_cycle(uint16_t bus, uint32_t data);
+extern int32_t wrapper_get_routing(int32_t handle);
+extern int32_t wrapper_set_interrupt(int32_t handle);
+extern int32_t wrapper_get_resource(int32_t handle);
+extern int32_t wrapper_get_card_used(int32_t handle, uint32_t *address);
+extern int32_t wrapper_set_card_used(int32_t handle, uint32_t *callback);
+extern int32_t wrapper_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t wrapper_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t wrapper_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t wrapper_fast_read_mem_byte(int32_t handle, uint32_t offset);
+extern uint16_t wrapper_fast_read_mem_word(int32_t handle, uint32_t offset);
+extern uint32_t wrapper_fast_read_mem_longword(int32_t handle, uint32_t offset);
+extern int32_t wrapper_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t wrapper_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t wrapper_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t wrapper_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t wrapper_fast_read_io_byte(int32_t handle, uint32_t offset);
+extern uint16_t wrapper_fast_read_io_word(int32_t handle, uint32_t offset);
+extern uint32_t wrapper_fast_read_io_longword(int32_t handle, uint32_t offset);
+extern int32_t wrapper_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t wrapper_get_machine_id(void);
+extern int32_t wrapper_get_pagesize(void);
+extern int32_t wrapper_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
+
 #define PCI_MK_CONF_ADDR(bus, device, function)	(MCF_PCI_PCICAR_E | \
 												((bus) << 16) | \
 												((device << 8) | \
--- a/include/sysinit.h
+++ b/include/sysinit.h
@@ -28,13 +28,17 @@
 #ifndef __SYSINIT_H__
 #define __SYSINIT_H__

+#include <stdbool.h>
+
 /* function(s) from init_fpga.c */
-extern void init_fpga(void);
+extern bool init_fpga(void);
 extern void init_usb(void);

 /* fault_vectors */
 extern void setup_vectors(void);

+extern bool fpga_configured;
+
 #endif /* __SYSINIT_H__ */


--- a/include/util.h
+++ b/include/util.h
@@ -145,7 +145,7 @@ __extension__                             \
 __extension__                                      \
 ({__asm__ volatile ("lea     -60(sp),sp\n\t"       \
                    "movem.l d0-d7/a0-a6,(sp)");   \
-  ((void (*)(void))addr)();                        \
+  ((void (*) (void)) addr)();                      \
  __asm__ volatile ("movem.l (sp),d0-d7/a0-a6\n\t" \
                    "lea     60(sp),sp");          \
 })
--- a/include/version.h
+++ b/include/version.h
@@ -29,7 +29,7 @@
 */

 #define MAJOR_VERSION	0
-#define MINOR_VERSION	83
+#define MINOR_VERSION	86


 #endif /* VERSION_H_ */
--- a/include/wait.h
+++ b/include/wait.h
@@ -29,55 +29,23 @@

 #include <bas_types.h>

-#if MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
 #include "firebee.h"
-#elif MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
+#else
+#error "unknown machine"
 #endif /* MACHINE_FIREBEE */

 #include "MCF5475.h"

 typedef bool (*checker_func)(void);

-extern __inline__ void wait(uint32_t) __attribute__((always_inline));
-extern __inline__ bool waitfor(uint32_t us, checker_func condition) __attribute__((always_inline));
+extern void wait(uint32_t);
+extern bool waitfor(uint32_t us, checker_func condition);
+extern uint32_t get_timer(void);
+extern void wait_ms(uint32_t ms);

-extern __inline__ uint32_t get_timer(void)
-{
-	return MCF_SLT_SCNT(0);
-}
-/*
- * wait for the specified number of us on slice timer 0. Replaces the original routines that had
- * the number of useconds to wait for hardcoded in their name.
- */
-extern __inline__ void wait(uint32_t us)
-{
-	int32_t target = MCF_SLT_SCNT(0) - (us * (SYSCLK / 1000));
-
-	while (MCF_SLT_SCNT(0) - target > 0);
-}
-
-/*
- * same as above, but with milliseconds wait time
- */
-extern __inline__ void wait_ms(uint32_t ms)
-{
-	wait(ms * 1000);
-}
-/*
- * the same as above, with a checker function which gets called while
- * busy waiting and allows for an early return if it returns true
- */
-extern __inline__ bool waitfor(uint32_t us, checker_func condition)
-{
-	int32_t target = MCF_SLT_SCNT(0) - (us * (SYSCLK / 1000));
-	bool res;
-
-	do
-	{
-		if ((res = (*condition)()))
-			return res;
-	} while (MCF_SLT_SCNT(0) - target > 0);
-	return false;
-}
 #endif /* _WAIT_H_ */
--- a/kbd/ikbd.c
+++ b/kbd/ikbd.c
@@ -40,276 +40,300 @@ static unsigned char tx_queue[QUEUE_LEN];
 static unsigned char wptr = 0, rptr = 0;

 // structure to keep track of ikbd state
-static struct {
-  unsigned char cmd;
-  unsigned char state;
-  unsigned char expect;
+static struct
+{
+    unsigned char cmd;
+    unsigned char state;
+    unsigned char expect;

-  // joystick state
-  unsigned char joystick[2];
+    // joystick state
+    unsigned char joystick[2];

-  // mouse state
-  unsigned short mouse_pos_x, mouse_pos_y;
-  unsigned char mouse_buttons;
+    // mouse state
+    unsigned short mouse_pos_x, mouse_pos_y;
+    unsigned char mouse_buttons;
 } ikbd;

 // #define IKBD_DEBUG

-void ikbd_init() {
-  // reset ikbd state
-  memset(&ikbd, 0, sizeof(ikbd));
-  ikbd.state = IKBD_DEFAULT;
+void ikbd_init()
+{
+    // reset ikbd state
+    memset(&ikbd, 0, sizeof(ikbd));
+    ikbd.state = IKBD_DEFAULT;
 }

-static void enqueue(unsigned char b) {
-  if(((wptr + 1)&(QUEUE_LEN-1)) == rptr) {
-    xprintf("IKBD: !!!!!!! tx queue overflow !!!!!!!!!\n");
-    return;
-  }
+static void enqueue(unsigned char b)
+{
+    if (((wptr + 1)&(QUEUE_LEN-1)) == rptr)
+    {
+        xprintf("IKBD: !!!!!!! tx queue overflow !!!!!!!!!\n");
+        return;
+    }

-  tx_queue[wptr] = b;
-  wptr = (wptr+1)&(QUEUE_LEN-1);
+    tx_queue[wptr] = b;
+    wptr = (wptr + 1) & (QUEUE_LEN - 1);
 }

 // convert internal joystick format into atari ikbd format
-static unsigned char joystick_map2ikbd(unsigned in) {
-  unsigned char out = 0;
+static unsigned char joystick_map2ikbd(unsigned in)
+{
+    unsigned char out = 0;

-  if(in & JOY_UP)    out |= 0x01;
-  if(in & JOY_DOWN)  out |= 0x02;
-  if(in & JOY_LEFT)  out |= 0x04;
-  if(in & JOY_RIGHT) out |= 0x08;
-  if(in & JOY_BTN1)  out |= 0x80;
+    if (in & JOY_UP)    out |= 0x01;
+    if (in & JOY_DOWN)  out |= 0x02;
+    if (in & JOY_LEFT)  out |= 0x04;
+    if (in & JOY_RIGHT) out |= 0x08;
+    if (in & JOY_BTN1)  out |= 0x80;

-  return out;
+    return out;
 }

 // process inout from atari core into ikbd
-void ikbd_handle_input(unsigned char cmd) {
-  // expecting a second byte for command
-  if(ikbd.expect) {
-    ikbd.expect--;
+void ikbd_handle_input(unsigned char cmd)
+{
+    // expecting a second byte for command
+    if (ikbd.expect)
+    {
+        ikbd.expect--;

-    // last byte of command received
-    if(!ikbd.expect) {
-      switch(ikbd.cmd) {
-      case 0x07: // set mouse button action
-        xprintf("IKBD: mouse button action = %x\n", cmd);
+        // last byte of command received
+        if (!ikbd.expect)
+        {
+            switch(ikbd.cmd)
+            {
+                case 0x07: // set mouse button action
+                    xprintf("IKBD: mouse button action = %x\n", cmd);

-        // bit 2: Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
-        if(cmd & 0x04) ikbd.state |=  IKBD_STATE_MOUSE_BUTTON_AS_KEY;
-        else           ikbd.state &= ~IKBD_STATE_MOUSE_BUTTON_AS_KEY;
+                    // bit 2: Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
+                    if(cmd & 0x04) ikbd.state |=  IKBD_STATE_MOUSE_BUTTON_AS_KEY;
+                    else           ikbd.state &= ~IKBD_STATE_MOUSE_BUTTON_AS_KEY;

-        break;
+                    break;

-      case 0x80: // ibkd reset
-        // reply "everything is ok"
-        enqueue(0xf0);
-        break;
+                case 0x80: // ibkd reset
+                    // reply "everything is ok"
+                    enqueue(0xf0);
+                    break;

-      default:
-        break;
-      }
+                default:
+                    break;
+            }
+        }
+
+        return;
    }

-    return;
-  }
+    ikbd.cmd = cmd;

-  ikbd.cmd = cmd;
+    switch(cmd)
+    {
+        case 0x07:
+            xprintf("IKBD: Set mouse button action");
+            ikbd.expect = 1;
+            break;

-  switch(cmd) {
-  case 0x07:
-    xprintf("IKBD: Set mouse button action");
-    ikbd.expect = 1;
-    break;
+        case 0x08:
+            xprintf("IKBD: Set relative mouse positioning");
+            ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
+            ikbd.state &= ~IKBD_STATE_MOUSE_ABSOLUTE;
+            break;

-  case 0x08:
-    xprintf("IKBD: Set relative mouse positioning");
-    ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
-    ikbd.state &= ~IKBD_STATE_MOUSE_ABSOLUTE;
-    break;
+        case 0x09:
+            xprintf("IKBD: Set absolute mouse positioning");
+            ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
+            ikbd.state |=  IKBD_STATE_MOUSE_ABSOLUTE;
+            ikbd.expect = 4;
+            break;

-  case 0x09:
-    xprintf("IKBD: Set absolute mouse positioning");
-    ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED;
-    ikbd.state |=  IKBD_STATE_MOUSE_ABSOLUTE;
-    ikbd.expect = 4;
-    break;
+        case 0x0b:
+            xprintf("IKBD: Set Mouse threshold");
+            ikbd.expect = 2;
+            break;

-  case 0x0b:
-    xprintf("IKBD: Set Mouse threshold");
-    ikbd.expect = 2;
-    break;
+        case 0x0f:
+            xprintf("IKBD: Set Y at bottom");
+            ikbd.state |= IKBD_STATE_MOUSE_Y_BOTTOM;
+            break;

-  case 0x0f:
-    xprintf("IKBD: Set Y at bottom");
-    ikbd.state |= IKBD_STATE_MOUSE_Y_BOTTOM;
-    break;
+        case 0x10:
+            xprintf("IKBD: Set Y at top");
+            ikbd.state &= ~IKBD_STATE_MOUSE_Y_BOTTOM;
+            break;

-  case 0x10:
-    xprintf("IKBD: Set Y at top");
-    ikbd.state &= ~IKBD_STATE_MOUSE_Y_BOTTOM;
-    break;
+        case 0x12:
+            xprintf("IKBD: Disable mouse");
+            ikbd.state |= IKBD_STATE_MOUSE_DISABLED;
+            break;

-  case 0x12:
-    xprintf("IKBD: Disable mouse");
-    ikbd.state |= IKBD_STATE_MOUSE_DISABLED;
-    break;
+        case 0x14:
+            xprintf("IKBD: Set Joystick event reporting");
+            ikbd.state |= IKBD_STATE_JOYSTICK_EVENT_REPORTING;
+            break;

-  case 0x14:
-    xprintf("IKBD: Set Joystick event reporting");
-    ikbd.state |= IKBD_STATE_JOYSTICK_EVENT_REPORTING;
-    break;
+        case 0x15:
+            xprintf("IKBD: Set Joystick interrogation mode");
+            ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
+            break;

-  case 0x15:
-    xprintf("IKBD: Set Joystick interrogation mode");
-    ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
-    break;
+        case 0x16: // interrogate joystick
+            // send reply
+            enqueue(0xfd);
+            enqueue(joystick_map2ikbd(ikbd.joystick[0]));
+            enqueue(joystick_map2ikbd(ikbd.joystick[1]));
+            break;

-  case 0x16: // interrogate joystick
-    // send reply
-    enqueue(0xfd);
-    enqueue(joystick_map2ikbd(ikbd.joystick[0]));
-    enqueue(joystick_map2ikbd(ikbd.joystick[1]));
-    break;
+        case 0x1a:
+            xprintf("IKBD: Disable joysticks");
+            ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
+            break;

-  case 0x1a:
-    xprintf("IKBD: Disable joysticks");
-    ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING;
-    break;
+        case 0x1c:
+            xprintf("IKBD: Interrogate time of day");

-  case 0x1c:
-    xprintf("IKBD: Interrogate time of day");
+            enqueue(0xfc);
+            enqueue(0x13);  // year bcd
+            enqueue(0x03);  // month bcd
+            enqueue(0x07);  // day bcd
+            enqueue(0x20);  // hour bcd
+            enqueue(0x58);  // minute bcd
+            enqueue(0x00);  // second bcd
+            break;

-    enqueue(0xfc);
-    enqueue(0x13);  // year bcd
-    enqueue(0x03);  // month bcd
-    enqueue(0x07);  // day bcd
-    enqueue(0x20);  // hour bcd
-    enqueue(0x58);  // minute bcd
-    enqueue(0x00);  // second bcd
-    break;
-   

-  case 0x80:
-    xprintf("IKBD: Reset");
-    ikbd.expect = 1;
-    ikbd.state = IKBD_DEFAULT;
-    break;
+        case 0x80:
+            xprintf("IKBD: Reset");
+            ikbd.expect = 1;
+            ikbd.state = IKBD_DEFAULT;
+            break;

-  default:
-    xprintf("IKBD: unknown command: %x\n", cmd);
-    break;
-  }
+        default:
+            xprintf("IKBD: unknown command: %x\n", cmd);
+            break;
+    }
 }

 void ikbd_poll(void) {
-  static int mtimer = 0;
-  if(CheckTimer(mtimer)) {
-    mtimer = GetTimer(10);
-   
-    // check for incoming ikbd data
+    static int mtimer = 0;
+    if (CheckTimer(mtimer))
+    {
+        mtimer = GetTimer(10);
+
+        // check for incoming ikbd data
+        EnableIO();
+        SPI(UIO_IKBD_IN);
+
+        while(SPI(0))
+            ikbd_handle_input(SPI(0));
+
+        DisableIO();
+    }
+
+    // send data from queue if present
+    if(rptr == wptr) return;
+
+    // transmit data from queue
    EnableIO();
-    SPI(UIO_IKBD_IN);
-   
-    while(SPI(0))
-      ikbd_handle_input(SPI(0));
-   
+    SPI(UIO_IKBD_OUT);
+    SPI(tx_queue[rptr]);
    DisableIO();
-  }

-  // send data from queue if present
-  if(rptr == wptr) return;
-   
-  // transmit data from queue
-  EnableIO();
-  SPI(UIO_IKBD_OUT);
-  SPI(tx_queue[rptr]);
-  DisableIO();
- 
-  rptr = (rptr+1)&(QUEUE_LEN-1);  
+    rptr = (rptr + 1) & (QUEUE_LEN - 1);
 }

-void ikbd_joystick(unsigned char joystick, unsigned char map) {
-  // todo: suppress events for joystick 0 as long as mouse
-  // is enabled?
- 
-  if(ikbd.state & IKBD_STATE_JOYSTICK_EVENT_REPORTING) {
+void ikbd_joystick(unsigned char joystick, unsigned char map)
+{
+    // todo: suppress events for joystick 0 as long as mouse
+    // is enabled?
+
+    if (ikbd.state & IKBD_STATE_JOYSTICK_EVENT_REPORTING)
+    {
 #ifdef IKBD_DEBUG
-    xprintf("IKBD: joy %d %x\n", joystick, map);
+        xprintf("IKBD: joy %d %x\n", joystick, map);
 #endif

-    // only report joystick data for joystick 0 if the mouse is disabled
-    if((ikbd.state & IKBD_STATE_MOUSE_DISABLED) || (joystick == 1)) {    
-      enqueue(0xfe + joystick);
-      enqueue(joystick_map2ikbd(map));
+        // only report joystick data for joystick 0 if the mouse is disabled
+        if ((ikbd.state & IKBD_STATE_MOUSE_DISABLED) || (joystick == 1))
+        {
+            enqueue(0xfe + joystick);
+            enqueue(joystick_map2ikbd(map));
+        }
+
+        if (!(ikbd.state & IKBD_STATE_MOUSE_DISABLED))
+        {
+            // the fire button also generates a mouse event if
+            // mouse reporting is enabled
+            if ((map & JOY_BTN1) != (ikbd.joystick[joystick] & JOY_BTN1))
+            {
+                // generate mouse event (ikbd_joystick_buttons is evaluated inside
+                // user_io_mouse)
+                ikbd.joystick[joystick] = map;
+                ikbd_mouse(0, 0, 0);
+            }
+        }
    }
-   
-    if(!(ikbd.state & IKBD_STATE_MOUSE_DISABLED)) {
-      // the fire button also generates a mouse event if
-      // mouse reporting is enabled
-      if((map & JOY_BTN1) != (ikbd.joystick[joystick] & JOY_BTN1)) {
-        // generate mouse event (ikbd_joystick_buttons is evaluated inside
-        // user_io_mouse)
-        ikbd.joystick[joystick] = map;
-        ikbd_mouse(0, 0, 0);
-      }
-    }
-  }
 #ifdef IKBD_DEBUG
-  else
-    xprintf("IKBD: no monitor, drop joy %d %x\n", joystick, map);
+    else
+        xprintf("IKBD: no monitor, drop joy %d %x\n", joystick, map);
 #endif
- 
-  // save state of joystick for interrogation mode
-  ikbd.joystick[joystick] = map;
+
+    // save state of joystick for interrogation mode
+    ikbd.joystick[joystick] = map;
 }

-void ikbd_keyboard(unsigned char code) {
+void ikbd_keyboard(unsigned char code)
+{
 #ifdef IKBD_DEBUG
-  xprintf("IKBD: send keycode %x%s\n", code&0x7f, (code&0x80)?" BREAK":"");
+    xprintf("IKBD: send keycode %x%s\n", code&0x7f, (code&0x80)?" BREAK":"");
 #endif
-  enqueue(code);
+    enqueue(code);
 }

-void ikbd_mouse(uint8_t b, int8_t x, int8_t y) {
-  if(ikbd.state & IKBD_STATE_MOUSE_DISABLED)
-    return;
+void ikbd_mouse(uint8_t b, int8_t x, int8_t y)
+{
+    if (ikbd.state & IKBD_STATE_MOUSE_DISABLED)
+        return;

-  // joystick and mouse buttons are wired together in
-  // atari st
-  b |= (ikbd.joystick[0] & JOY_BTN1)?1:0;
-  b |= (ikbd.joystick[1] & JOY_BTN1)?2:0;
- 
-  static unsigned char b_old = 0;
-  // monitor state of two mouse buttons
-  if(b != b_old) {
-    // check if mouse buttons are supposed to be treated like keys
-    if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY) {
-      // Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
-     
-      // handle left mouse button
-      if((b ^ b_old) & 1) ikbd_keyboard(0x74 | ((b&1)?0x00:0x80));
-      // handle right mouse button
-      if((b ^ b_old) & 2) ikbd_keyboard(0x75 | ((b&2)?0x00:0x80));
+    // joystick and mouse buttons are wired together in
+    // atari st
+    b |= (ikbd.joystick[0] & JOY_BTN1)?1:0;
+    b |= (ikbd.joystick[1] & JOY_BTN1)?2:0;
+
+    static unsigned char b_old = 0;
+    // monitor state of two mouse buttons
+    if (b != b_old)
+    {
+        // check if mouse buttons are supposed to be treated like keys
+        if (ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY)
+        {
+            // Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75)
+
+            // handle left mouse button
+            if((b ^ b_old) & 1) ikbd_keyboard(0x74 | ((b&1)?0x00:0x80));
+            // handle right mouse button
+            if((b ^ b_old) & 2) ikbd_keyboard(0x75 | ((b&2)?0x00:0x80));
+        }
+        b_old = b;
    }
-    b_old = b;
-  }
- 
+
 #if 0
-  if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY) {
-    b = 0;
-    // if mouse position is 0/0 quit here
-    if(!x && !y) return;
-  }
+    if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY)
+    {
+        b = 0;
+        // if mouse position is 0/0 quit here
+        if(!x && !y) return;
+    }
 #endif

-  if(ikbd.state & IKBD_STATE_MOUSE_ABSOLUTE) {
-  } else {
-    // atari has mouse button bits swapped
-    enqueue(0xf8|((b&1)?2:0)|((b&2)?1:0));
-    enqueue(x);
-    enqueue((ikbd.state & IKBD_STATE_MOUSE_Y_BOTTOM)?-y:y);
-  }
+    if (ikbd.state & IKBD_STATE_MOUSE_ABSOLUTE)
+    {
+    }
+    else
+    {
+        // atari has mouse button bits swapped
+        enqueue(0xf8|((b&1)?2:0)|((b&2)?1:0));
+        enqueue(x);
+        enqueue((ikbd.state & IKBD_STATE_MOUSE_Y_BOTTOM)?-y:y);
+    }
 }

--- a/mcf5474.gdb
+++ b/mcf5474.gdb
@@ -5,7 +5,7 @@
 define addresses
 set $vbr   = 0x00000000
 #monitor bdm-ctl-set 0x0801 0x00000000
- 
+
 set $mbar  = 0xFF000000
 #monitor bdm-ctl-set 0x0C0F 0xFF000000

@@ -22,30 +22,30 @@ end

 define setup-dram
 # Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
-set *((long *) 0xFF000500) = 0xE0000000		
-set *((long *) 0xFF000508) = 0x00041180		
-set *((long *) 0xFF000504) = 0x007F0001		
+set *((long *) 0xFF000500) = 0xE0000000
+set *((long *) 0xFF000508) = 0x00041180
+set *((long *) 0xFF000504) = 0x007F0001

 # set *((long *) 0xFF00050C) = 0xFFF00000		# ATARI I/O address

 # SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
-set *((long *) 0xFF000004) = 0x000002AA		
-set *((long *) 0xFF000020) = 0x0000001A		
-set *((long *) 0xFF000024) = 0x0800001A		
-set *((long *) 0xFF000028) = 0x1000001A		
-set *((long *) 0xFF00002C) = 0x1800001A		
-set *((long *) 0xFF000108) = 0x73622830		
-set *((long *) 0xFF00010C) = 0x46770000		
+set *((long *) 0xFF000004) = 0x000002AA
+set *((long *) 0xFF000020) = 0x0000001A
+set *((long *) 0xFF000024) = 0x0800001A
+set *((long *) 0xFF000028) = 0x1000001A
+set *((long *) 0xFF00002C) = 0x1800001A
+set *((long *) 0xFF000108) = 0x73622830
+set *((long *) 0xFF00010C) = 0x46770000


-set *((long *) 0xFF000104) = 0xE10D0002		
-set *((long *) 0xFF000100) = 0x40010000		
-set *((long *) 0xFF000100) = 0x048D0000		
-set *((long *) 0xFF000104) = 0xE10D0002		
-set *((long *) 0xFF000104) = 0xE10D0004		
-set *((long *) 0xFF000104) = 0xE10D0004		
-set *((long *) 0xFF000100) = 0x008D0000		
-set *((long *) 0xFF000104) = 0x710D0F00		
+set *((long *) 0xFF000104) = 0xE10D0002
+set *((long *) 0xFF000100) = 0x40010000
+set *((long *) 0xFF000100) = 0x048D0000
+set *((long *) 0xFF000104) = 0xE10D0002
+set *((long *) 0xFF000104) = 0xE10D0004
+set *((long *) 0xFF000104) = 0xE10D0004
+set *((long *) 0xFF000100) = 0x008D0000
+set *((long *) 0xFF000104) = 0x710D0F00
 end

 define cu
@@ -61,6 +61,11 @@ define ib
 	setup-dram
 end

+define run
+	continue
+end
+
 tr
 ib
-load
+add-symbol-file ../emutos/emutos2.img 0xe00000
+load firebee/ram.elf
--- a/net/am79c874.c
+++ b/net/am79c874.c
@@ -13,8 +13,10 @@
 #include "firebee.h"
 #elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
 #else
-#error "unknown machine"
+#error "unknown machine!"
 #endif

 //#define DBG_AM79
@@ -63,6 +65,7 @@ int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duple
 		if (!(settings & MII_AM79C874_CR_RESET))
 			break;
 	}
+
 	if (timeout >= FEC_MII_TIMEOUT)
 	{
 		dbg("%s: PHY reset failed\r\n", __FUNCTION__);
@@ -88,11 +91,14 @@ int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duple

 	if (timeout >= FEC_MII_TIMEOUT)
 	{
-		dbg("%s: PHY Set the default mode\r\n", __FUNCTION__);
+		dbg("%s: Auto-negotiation failed (timeout). Set default mode (100Mbps, full duplex)\r\n", __FUNCTION__);

 		/* Set the default mode (Full duplex, 100 Mbps) */
 		if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX))
+		{
+			dbg("%s: forced setting 100Mbps/full failed.\r\n", __FUNCTION__);
 			return 0;
+		}
 	}

 #ifdef DBG_AM79
--- a/net/arp.c
+++ b/net/arp.c
@@ -11,7 +11,7 @@
 #include <stdbool.h>
 #include <stddef.h>

-#define DBG_ARP
+//#define DBG_ARP
 #ifdef DBG_ARP
 #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
 #else
--- a/net/bcm5222.c
+++ b/net/bcm5222.c
@@ -18,13 +18,15 @@
 #include "firebee.h"
 #elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
 #else
 #error "Unknown machine!"
 #endif

 #define DBG_BCM
 #ifdef DBG_BCM
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_BCM */
@@ -53,7 +55,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex

 	/* Initialize the MII interface */
 	fec_mii_init(fec_ch, SYSCLK / 1000);
-	dbg("%s: PHY reset\r\n", __FUNCTION__);
+    dbg("PHY reset\r\n");

 	/* Reset the PHY */
 	if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, BCM5222_CTRL_RESET | BCM5222_CTRL_ANE))
@@ -69,7 +71,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
 	if(timeout >= FEC_MII_TIMEOUT)
 		return 0;

-	dbg("%s: PHY reset OK\r\n", __FUNCTION__);
+    dbg("PHY reset OK\r\n");

 	settings = (BCM5222_AN_ADV_NEXT_PAGE | BCM5222_AN_ADV_PAUSE);

@@ -87,13 +89,13 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
 	if (!fec_mii_write(fec_ch, phy_addr, BCM5222_AN_ADV, settings))
 		return 0;

-	dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
+    dbg("PHY Enable Auto-Negotiation\r\n");

 	/* Enable Auto-Negotiation */
 	if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, (BCM5222_CTRL_ANE | BCM5222_CTRL_RESTART_AN)))
 		return 0;

-	dbg("%s: PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
+    dbg("PHY Wait for auto-negotiation to complete\r\n");

 	/* Wait for auto-negotiation to complete */
 	for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
@@ -106,7 +108,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex

 	if (timeout < FEC_MII_TIMEOUT)
 	{
-		dbg("%s: PHY auto-negociation complete\r\n", __FUNCTION__);
+        dbg("PHY auto-negociation complete\r\n");

 		/* Read Auxiliary Control/Status Register */
 		if (!fec_mii_read(fec_ch, phy_addr, BCM5222_ACSR, &settings))
@@ -114,7 +116,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
 	}
 	else
 	{
-		dbg("%s: auto negotiation failed, PHY Set the default mode\r\n", __FUNCTION__);
+        dbg("auto negotiation failed, PHY Set the default mode\r\n");

 		/* Set the default mode (Full duplex, 100 Mbps) */
 		if (!fec_mii_write(fec_ch, phy_addr, BCM5222_ACSR, settings = (BCM5222_ACSR_100BTX | BCM5222_ACSR_FDX)))
@@ -127,17 +129,17 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
 	else
 		fec_duplex(fec_ch, FEC_MII_HALF_DUPLEX);

-	dbg("%s: PHY Mode: ", __FUNCTION__);
+    dbg("PHY Mode: ");

 	if (settings & BCM5222_ACSR_100BTX)
-		dbg("%s: 100Mbps\r\n", __FUNCTION__);
+        dbg("100Mbps\r\n");
 	else
-		dbg("%s: 10Mbps\r\n", __FUNCTION__);
+        dbg("10Mbps\r\n");

 	if (settings & BCM5222_ACSR_FDX)
-		dbg("%s: Full-duplex\r\n", __FUNCTION__);
+        dbg("Full-duplex\r\n");
 	else
-		dbg("%s: Half-duplex\r\n", __FUNCTION__);
+        dbg("Half-duplex\r\n");

 	return 1;
 }
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -13,7 +13,7 @@

 #define DBG_BOOTP
 #ifdef DBG_BOOTP
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_BOOTP */
@@ -94,7 +94,7 @@ void bootp_handler(NIF *nif, NBUF *nbuf)
 	struct bootp_packet *rx_p;
 	udp_frame_hdr *udpframe;

-	dbg("%s\n", __FUNCTION__);
+    dbg("\r\n");

 	rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
 	udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];
--- a/net/fec.c
+++ b/net/fec.c
@@ -17,21 +17,24 @@
 #include "bas_string.h"
 #include "bas_printf.h"
 #include "util.h"
+#include "wait.h"
 #include "am79c874.h"
-#include "bcm5222.h"
+//#include "bcm5222.h"
 #include <stdbool.h>

 #if defined(MACHINE_FIREBEE)
 #include "firebee.h"
 #elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
 #else
 #error Unknown machine!
 #endif

-//#define DBG_FEC
+// #define DBG_FEC
 #ifdef DBG_FEC
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_FEC */
@@ -91,11 +94,12 @@ int fec_mii_write(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
 	 */
 	for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
 	{
+		wait(1);
 		if (MCF_FEC_EIR(ch) & MCF_FEC_EIR_MII)
 			break;
 	}

-	if(timeout == FEC_MII_TIMEOUT)
+	if (timeout == FEC_MII_TIMEOUT)
 		return 0;

 	/*
@@ -156,11 +160,12 @@ int fec_mii_read(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
 	 */
 	for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
 	{
+		wait(1);
 		if (MCF_FEC_EIR(ch) & MCF_FEC_EIR_MII)
 			break;
 	}

-	if(timeout == FEC_MII_TIMEOUT)
+	if (timeout == FEC_MII_TIMEOUT)
 		return 0;

 	/*
@@ -232,33 +237,33 @@ void fec_log_init(uint8_t ch)
 */
 void fec_log_dump(uint8_t ch)
 {
-	dbg("%s: \r\n   FEC%d Log\r\n", __FUNCTION__, ch);
-	dbg("%s:   ---------------\r\n", __FUNCTION__);
-	dbg("%s: Total: %4d\r\n", __FUNCTION__, fec_log[ch].total);
-	dbg("%s: hberr: %4d\r\n", __FUNCTION__, fec_log[ch].hberr);
-	dbg("%s: babr:  %4d\r\n", __FUNCTION__, fec_log[ch].babr);
-	dbg("%s: babt:  %4d\r\n", __FUNCTION__, fec_log[ch].babt);
-	dbg("%s: gra:   %4d\r\n", __FUNCTION__, fec_log[ch].gra);
-	dbg("%s: txf:   %4d\r\n", __FUNCTION__, fec_log[ch].txf);
-	dbg("%s: mii:   %4d\r\n", __FUNCTION__, fec_log[ch].mii);
-	dbg("%s: lc:    %4d\r\n", __FUNCTION__, fec_log[ch].lc);
-	dbg("%s: rl:    %4d\r\n", __FUNCTION__, fec_log[ch].rl);
-	dbg("%s: xfun:  %4d\r\n", __FUNCTION__, fec_log[ch].xfun);
-	dbg("%s: xferr: %4d\r\n", __FUNCTION__, fec_log[ch].xferr);
-	dbg("%s: rferr: %4d\r\n", __FUNCTION__, fec_log[ch].rferr);
-	dbg("%s: dtxf:  %4d\r\n", __FUNCTION__, fec_log[ch].dtxf);
-	dbg("%s: drxf:  %4d\r\n", __FUNCTION__, fec_log[ch].drxf);
-	dbg("%s: \r\nRFSW:\r\n", __FUNCTION__);
-	dbg("%s: inv:   %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_inv);
-	dbg("%s: m:     %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_m);
-	dbg("%s: bc:    %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_bc);
-	dbg("%s: mc:    %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_mc);
-	dbg("%s: lg:    %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_lg);
-	dbg("%s: no:    %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_no);
-	dbg("%s: cr:    %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_cr);
-	dbg("%s: ov:    %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_ov);
-	dbg("%s: tr:    %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_tr);
-	dbg("%s: ---------------\r\n\r\n", __FUNCTION__);
+	dbg("\r\n   FEC%d Log\r\n", __FUNCTION__, ch);
+	dbg("   ---------------\r\n", __FUNCTION__);
+	dbg(" Total: %4d\r\n", fec_log[ch].total);
+	dbg(" hberr: %4d\r\n", fec_log[ch].hberr);
+	dbg(" babr:  %4d\r\n", fec_log[ch].babr);
+	dbg(" babt:  %4d\r\n", fec_log[ch].babt);
+	dbg(" gra:   %4d\r\n", fec_log[ch].gra);
+	dbg(" txf:   %4d\r\n", fec_log[ch].txf);
+	dbg(" mii:   %4d\r\n", fec_log[ch].mii);
+	dbg(" lc:    %4d\r\n", fec_log[ch].lc);
+	dbg(" rl:    %4d\r\n", fec_log[ch].rl);
+	dbg(" xfun:  %4d\r\n", fec_log[ch].xfun);
+	dbg(" xferr: %4d\r\n", fec_log[ch].xferr);
+	dbg(" rferr: %4d\r\n", fec_log[ch].rferr);
+	dbg(" dtxf:  %4d\r\n", fec_log[ch].dtxf);
+	dbg(" drxf:  %4d\r\n", fec_log[ch].drxf);
+	dbg(" \r\nRFSW:\r\n");
+	dbg(" inv:   %4d\r\n", fec_log[ch].rfsw_inv);
+	dbg(" m:     %4d\r\n", fec_log[ch].rfsw_m);
+	dbg(" bc:    %4d\r\n", fec_log[ch].rfsw_bc);
+	dbg(" mc:    %4d\r\n", fec_log[ch].rfsw_mc);
+	dbg(" lg:    %4d\r\n", fec_log[ch].rfsw_lg);
+	dbg(" no:    %4d\r\n", fec_log[ch].rfsw_no);
+	dbg(" cr:    %4d\r\n", fec_log[ch].rfsw_cr);
+	dbg(" ov:    %4d\r\n", fec_log[ch].rfsw_ov);
+	dbg(" tr:    %4d\r\n", fec_log[ch].rfsw_tr);
+	dbg(" ---------------\r\n\r\n");
 }

 /*
@@ -481,9 +486,7 @@ void fec_init(uint8_t ch, uint8_t mode, const uint8_t *pa)
 	 */
 	MCF_FEC_RCR(ch) = 0
 		| MCF_FEC_RCR_MAX_FL(ETH_MAX_FRM)
-//#ifdef FEC_PROMISCUOUS
 		| MCF_FEC_RCR_PROM
-//#endif
 		| MCF_FEC_RCR_FCE;

 	if (mode == FEC_MODE_MII)
@@ -535,19 +538,26 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
 {
 	uint32_t initiator;
 	int channel;
+#ifdef DBG_FEC
 	int res;
+#endif

 	/*
 	 * Make the initiator assignment
 	 */
-	res = dma_set_initiator(DMA_FEC_RX(ch));
-	dbg("%s: dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", __FUNCTION__, ch, res);
+#if defined(DBG_FEC)
+    res =
+#else
+    (void)
+#endif
+    dma_set_initiator(DMA_FEC_RX(ch));
+	dbg("dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", ch, res);

 	/*
 	 * Grab the initiator number
 	 */
 	initiator = dma_get_initiator(DMA_FEC_RX(ch));
-	dbg("%s: dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", __FUNCTION__, ch, initiator);
+	dbg("dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", ch, initiator);

 	/*
 	 * Determine the DMA channel running the task for the
@@ -555,7 +565,7 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
 	 */
 	channel = dma_set_channel(DMA_FEC_RX(ch),
 			(ch == 0) ? fec0_rx_frame : fec1_rx_frame);
-	dbg("%s: DMA channel for FEC%1d: %d\r\n", __FUNCTION__, ch, channel);
+	dbg("DMA channel for FEC%1d: %d\r\n", ch, channel);

 	/*
 	 * Start the Rx DMA task
@@ -569,18 +579,18 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
 			0,
 			initiator,
 			FECRX_DMA_PRI(ch),
-			0 
-			| MCD_FECRX_DMA   
+			0
+			| MCD_FECRX_DMA
 			| MCD_INTERRUPT
-			| MCD_TT_FLAGS_CW 
+			| MCD_TT_FLAGS_CW
 			| MCD_TT_FLAGS_RL
 			| MCD_TT_FLAGS_SP
 			,
-			0 
+			0
 			| MCD_NO_CSUM
 			| MCD_NO_BYTE_SWAP
 			);
-	dbg("%s: Rx DMA task for FEC%1d started\r\n", __FUNCTION__, ch);
+	dbg("Rx DMA task for FEC%1d started\r\n", ch);
 }

 /*
@@ -604,13 +614,13 @@ void fec_rx_continue(uint8_t ch)
 	 */
 	channel = dma_get_channel(DMA_FEC_RX(ch));

-	dbg("%s: RX DMA channel for FEC%1d is %d\r\n", __FUNCTION__, ch, channel);
+	dbg("RX DMA channel for FEC%1d is %d\r\n", ch, channel);

 	/*
 	 * Continue/restart the DMA task
 	 */
 	MCD_continDma(channel);
-	dbg("%s: RX dma on channel %d continued\r\n", __FUNCTION__, channel);
+	dbg("RX dma on channel %d continued\r\n", channel);
 }

 /*
@@ -639,9 +649,9 @@ void fec_rx_stop (uint8_t ch)
 	/* Kill the FEC Rx DMA task */
 	MCD_killDma(channel);

-	/* 
-	 * Free up the FEC requestor from the software maintained 
-	 * initiator list 
+	/*
+	 * Free up the FEC requestor from the software maintained
+	 * initiator list
 	 */
 	dma_free_initiator(DMA_FEC_RX(ch));

@@ -653,7 +663,7 @@ void fec_rx_stop (uint8_t ch)
 }

 /*
- * Receive Frame interrupt handler - this handler is called by the 
+ * Receive Frame interrupt handler - this handler is called by the
 * DMA interrupt handler indicating that a packet was successfully
 * transferred out of the Rx FIFO.
 *
@@ -668,7 +678,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 	NBUF *cur_nbuf, *new_nbuf;
 	int keep;

-	dbg("%s: started\r\n", __FUNCTION__);
+	dbg("started\r\n");

 	while ((pRxBD = fecbd_rx_alloc(ch)) != NULL)
 	{
@@ -681,7 +691,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 		 *  - No undefined bits should be set
 		 *  - The upper 5 bits of the length should be cleared
 		 */
-		if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608) 
+		if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608)
 				|| (pRxBD->length & 0xF800))
 		{
 			keep = false;
@@ -713,8 +723,8 @@ void fec_rx_frame(uint8_t ch, NIF *nif)

 		if (keep)
 		{
-			/* 
-			 * Pull the network buffer off the Rx ring queue 
+			/*
+			 * Pull the network buffer off the Rx ring queue
 			 */
 			cur_nbuf = nbuf_remove(NBUF_RX_RING);

@@ -730,7 +740,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			new_nbuf = nbuf_alloc();
 			if (new_nbuf == NULL)
 			{
-				dbg("%s: nbuf_alloc() failed\n", __FUNCTION__);
+				dbg("nbuf_alloc() failed\n");

 				/*
 				 * Can't allocate a new network buffer, so we
@@ -764,7 +774,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)


 			/*
-			 * Let the DMA know that there is a new Rx BD (in case the 
+			 * Let the DMA know that there is a new Rx BD (in case the
 			 * ring was full and the DMA was waiting for an empty one)
 			 */
 			fec_rx_continue(ch);
@@ -775,7 +785,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			eth_hdr = (ETH_HDR *) cur_nbuf->data;

 			/*
-			 * Pass the received packet up the network stack if the 
+			 * Pass the received packet up the network stack if the
 			 * protocol is supported in our network interface (NIF)
 			 */
 			if (nif_protocol_exist(nif, eth_hdr->type))
@@ -786,12 +796,12 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			else
 			{
 				nbuf_free(cur_nbuf);
-				dbg("%s: got unsupported packet %d, trashed it\r\n", __FUNCTION__, eth_hdr->type);
+				dbg("got unsupported packet %d, trashed it\r\n", eth_hdr->type);
 			}
 		}
-		else 
+		else
 		{
-			/* 
+			/*
 			 * This frame isn't a keeper
 			 * Reset the status and length, but don't need to get another
 			 * buffer since we are trashing the data in the current one
@@ -801,7 +811,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			pRxBD->status |= RX_BD_E;

 			/*
-			 * Move the current buffer from the beginning to the end of the 
+			 * Move the current buffer from the beginning to the end of the
 			 * Rx ring queue
 			 */
 			cur_nbuf = nbuf_remove(NBUF_RX_RING);
@@ -841,22 +851,28 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
 {
 	uint32_t initiator;
 	int channel;
-	int result;
 	void fec0_tx_frame(void);
 	void fec1_tx_frame(void);
+#ifdef DBG_FEC
 	int res;
+#endif

 	/*
 	 * Make the initiator assignment
 	 */
-	res = dma_set_initiator(DMA_FEC_TX(ch));
-	dbg("%s: dma_set_initiator(%d) = %d\r\n", __FUNCTION__, ch, res);
+#ifdef DBG_FEC
+    res =
+#else
+    (void)
+#endif
+    dma_set_initiator(DMA_FEC_TX(ch));
+	dbg("dma_set_initiator(%d) = %d\r\n", ch, res);

 	/*
 	 * Grab the initiator number
 	 */
 	initiator = dma_get_initiator(DMA_FEC_TX(ch));
-	dbg("%s: dma_get_initiator(%d) = %d\r\n", __FUNCTION__, ch, initiator);
+	dbg("dma_get_initiator(%d) = %d\r\n", ch, initiator);


 	/*
@@ -865,7 +881,7 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
 	 */
 	channel = dma_set_channel(DMA_FEC_TX(ch),
 			(ch == 0) ? fec0_tx_frame : fec1_tx_frame);
-	dbg("%s: dma_set_channel(%d, ...) = %d\r\n", __FUNCTION__, ch, channel);
+	dbg("dma_set_channel(%d, ...) = %d\r\n", ch, channel);

 	/*
 	 * Start the Tx DMA task
@@ -879,18 +895,18 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
 			0,
 			initiator,
 			FECTX_DMA_PRI(ch),
-			0 
-			| MCD_FECTX_DMA   
+			0
+			| MCD_FECTX_DMA
 			| MCD_INTERRUPT
-			| MCD_TT_FLAGS_CW 
+			| MCD_TT_FLAGS_CW
 			| MCD_TT_FLAGS_RL
 			| MCD_TT_FLAGS_SP
 			,
-			0 
+			0
 			| MCD_NO_CSUM
 			| MCD_NO_BYTE_SWAP
 			);
-	dbg("%s: DMA tx task started\r\n", __FUNCTION__);
+	dbg("DMA tx task started\r\n");
 }

 /*
@@ -913,14 +929,13 @@ void fec_tx_continue(uint8_t ch)
 	 * selected FEC
 	 */
 	channel = dma_get_channel(DMA_FEC_TX(ch));
-	dbg("%s: dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n",
-			__FUNCTION__, ch, channel);
+	dbg("dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n", ch, channel);

 	/*
 	 * Continue/restart the DMA task
 	 */
 	MCD_continDma(channel);
-	dbg("%s: DMA TX task continue\r\n", __FUNCTION__);
+	dbg("DMA TX task continue\r\n");
 }

 /*
@@ -967,9 +982,9 @@ void fec_tx_stop(uint8_t ch)
 	/* Kill the FEC Tx DMA task */
 	MCD_killDma(channel);

-	/* 
-	 * Free up the FEC requestor from the software maintained 
-	 * initiator list 
+	/*
+	 * Free up the FEC requestor from the software maintained
+	 * initiator list
 	 */
 	dma_free_initiator(DMA_FEC_TX(ch));

@@ -981,7 +996,7 @@ void fec_tx_stop(uint8_t ch)
 }

 /*
- * Trasmit Frame interrupt handler - this handler is called by the 
+ * Trasmit Frame interrupt handler - this handler is called by the
 * DMA interrupt handler indicating that a packet was successfully
 * transferred to the Tx FIFO.
 *
@@ -994,7 +1009,7 @@ void fec_tx_frame(uint8_t ch)
 	NBUF *pNbuf;
 	bool is_empty = true;

-	dbg("%s:\r\n", __FUNCTION__);
+	dbg("\r\n");
 	while ((pTxBD = fecbd_tx_free(ch)) != NULL)
 	{
 		fec_log[ch].dtxf++;
@@ -1008,7 +1023,7 @@ void fec_tx_frame(uint8_t ch)
 		 * Free up the network buffer that was just transmitted
 		 */
 		nbuf_free(pNbuf);
-		dbg("%s: free buffer %p from TX ring\r\n", __FUNCTION__, pNbuf);
+		dbg("free buffer %p from TX ring\r\n", pNbuf);

 		/*
 		 * Re-initialize the Tx BD
@@ -1017,9 +1032,9 @@ void fec_tx_frame(uint8_t ch)
 		pTxBD->length = 0;
 		is_empty = false;

-	}    
+	}
 	if (is_empty)
-		dbg("%s: transmit queue was empty!\r\n", __FUNCTION__);
+		dbg("transmit queue was empty!\r\n");
 }

 void fec0_tx_frame(void)
@@ -1042,7 +1057,7 @@ void fec1_tx_frame(void)
 *  dst     Destination MAC Address
 *  src     Source MAC Address
 *  type    Ethernet Frame Type
- *  length  Number of bytes to be transmitted (doesn't include type, 
+ *  length  Number of bytes to be transmitted (doesn't include type,
 *          src, or dest byte count)
 *  pkt     Pointer packet network buffer
 *
@@ -1057,14 +1072,14 @@ int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NB
 	/* Check the length */
 	if ((nbuf->length + ETH_HDR_LEN) > ETH_MTU)
 	{
-		dbg("%s: nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n", 
-				__FUNCTION__, nbuf->length, ETH_HDR_LEN, ETH_MTU);
+		dbg("nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n",
+				nbuf->length, ETH_HDR_LEN, ETH_MTU);
 		return 0;
 	}

-	/* 
-	 * Copy the destination address, source address, and Ethernet 
-	 * type into the packet 
+	/*
+	 * Copy the destination address, source address, and Ethernet
+	 * type into the packet
 	 */
 	memcpy(&nbuf->data[0],  dst,   6);
 	memcpy(&nbuf->data[6],  src,   6);
@@ -1080,7 +1095,7 @@ int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NB
 	 */
 	nbuf_add(NBUF_TX_RING, nbuf);

-	/* 
+	/*
 	 * Setup the buffer descriptor for transmission
 	 */
 	pTxBD->data = nbuf->data;
@@ -1190,7 +1205,7 @@ static void fec_irq_handler(uint8_t ch)
 	event = eir & MCF_FEC_EIMR(ch);

 	if (event != eir)
-		dbg("%s: pending but not enabled: 0x%08x\r\n", __FUNCTION__, (event ^ eir));
+		dbg("pending but not enabled: 0x%08x\r\n", (event ^ eir));

 	/*
 	 * Clear the event(s) in the EIR immediately
@@ -1201,8 +1216,8 @@ static void fec_irq_handler(uint8_t ch)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].rferr++;
-		dbg("%s: RFERR\r\n", __FUNCTION__);
-		dbg("%s: FECRFSR%d = 0x%08x\r\n", __FUNCTION__, ch, MCF_FEC_FECRFSR(ch));
+		dbg("RFERR\r\n");
+		dbg("FECRFSR%d = 0x%08x\r\n", ch, MCF_FEC_FECRFSR(ch));
 		//fec_eth_stop(ch);
 	}

@@ -1210,14 +1225,14 @@ static void fec_irq_handler(uint8_t ch)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].xferr++;
-		dbg("%s: XFERR\r\n", __FUNCTION__);
+		dbg("XFERR\r\n");
 	}

 	if (event & MCF_FEC_EIR_XFUN)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].xfun++;
-		dbg("%s: XFUN\r\n", __FUNCTION__);
+		dbg("XFUN\r\n");
 		//fec_eth_stop(ch);
 	}

@@ -1225,54 +1240,54 @@ static void fec_irq_handler(uint8_t ch)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].rl++;
-		dbg("%s: RL\r\n", __FUNCTION__);
+		dbg("RL\r\n");
 	}

 	if (event & MCF_FEC_EIR_LC)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].lc++;
-		dbg("%s: LC\r\n", __FUNCTION__);
+		dbg("LC\r\n");
 	}

 	if (event & MCF_FEC_EIR_MII)
 	{
 		fec_log[ch].mii++;
-		dbg("%s: MII\r\n", __FUNCTION__);
+		dbg("MII\r\n");
 	}

 	if (event & MCF_FEC_EIR_TXF)
 	{
 		fec_log[ch].txf++;
-		dbg("%s: TXF\r\n", __FUNCTION__);
+		dbg("TXF\r\n");
 		fec_log_dump(0);
 	}

 	if (event & MCF_FEC_EIR_GRA)
 	{
 		fec_log[ch].gra++;
-		dbg("%s: GRA\r\n", __FUNCTION__);
+		dbg("GRA\r\n");
 	}

 	if (event & MCF_FEC_EIR_BABT)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].babt++;
-		dbg("%s: BABT\r\n", __FUNCTION__);
+		dbg("BABT\r\n");
 	}

 	if (event & MCF_FEC_EIR_BABR)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].babr++;
-		dbg("%s: BABR\r\n", __FUNCTION__);
+		dbg("BABR\r\n");
 	}

 	if (event & MCF_FEC_EIR_HBERR)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].hberr++;
-		dbg("%s: HBERR\r\n", __FUNCTION__);
+		dbg("HBERR\r\n");
 	}
 }

@@ -1282,7 +1297,7 @@ static void fec_irq_handler(uint8_t ch)
 */
 int fec0_interrupt_handler(void* arg1, void* arg2)
 {
-	(void) arg1;
+    (void) arg1;    /* not used */
 	(void) arg2;

 	fec_irq_handler(0);
@@ -1292,7 +1307,7 @@ int fec0_interrupt_handler(void* arg1, void* arg2)

 int fec1_interrupt_handler(void* arg1, void* arg2)
 {
-	(void) arg1;
+    (void) arg1;    /* not used */
 	(void) arg2;

 	fec_irq_handler(1);
@@ -1342,9 +1357,9 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
 		 */
 #if defined(MACHINE_FIREBEE)
 		if (am79c874_init(0, 0, speed, duplex))
-			dbg("%s: PHY init completed\r\n", __FUNCTION__);
+			dbg("PHY init completed\r\n");
 		else
-			dbg("%s: PHY init failed\r\n", __FUNCTION__);
+			dbg("PHY init failed\r\n");
 #elif defined(MACHINE_M548X)
 		bcm_5222_init(0, 0, speed, duplex);
 #else
@@ -1397,7 +1412,7 @@ void fec_eth_stop(uint8_t ch)
 	 */
 	level = set_ipl(7);

-	dbg("%s: fec %d stopped\r\n", __FUNCTION__, ch);
+	dbg("fec %d stopped\r\n", ch);
 	/*
 	 * Gracefully disable the receiver and transmitter
 	 */
@@ -1419,12 +1434,12 @@ void fec_eth_stop(uint8_t ch)
 	fec_log_dump(ch);
 #endif

-	/* 
+	/*
 	 * Flush the network buffers
 	 */
 	nbuf_flush();

-	/* 
+	/*
 	 * Restore interrupt level
 	 */
 	set_ipl(level);
--- a/net/fecbd.c
+++ b/net/fecbd.c
@@ -31,14 +31,14 @@
 * 
 */

-FECBD unaligned_bds[(2 * NRXBD) + (2 * NTXBD) + 1];
+static FECBD unaligned_bds[(2 * NRXBD) + (2 * NTXBD) + 1];

 /*
 * These pointers are used to reference into the chunck of data set 
 * aside for buffer descriptors
 */
-FECBD *RxBD;
-FECBD *TxBD;
+static FECBD *RxBD;
+static FECBD *TxBD;

 /*
 * Macros to easier access to the BD ring
@@ -62,94 +62,94 @@ static int iRxbd;
 */
 void fecbd_init(uint8_t ch)
 {
-	NBUF *nbuf;
-	int i;
+    NBUF *nbuf;
+    int i;

-	dbg("%s:\r\n", __FUNCTION__);
+    dbg("\r\n");

-	/* 
-	 * Align Buffer Descriptors to 4-byte boundary 
-	 */
-	RxBD = (FECBD *)(((int) unaligned_bds + 3) & 0xFFFFFFFC);
-	TxBD = (FECBD *)((int) RxBD + (sizeof(FECBD) * 2 * NRXBD));
+    /* 
+     * Align Buffer Descriptors to 4-byte boundary 
+     */
+    RxBD = (FECBD *)(((int) unaligned_bds + 3) & 0xFFFFFFFC);
+    TxBD = (FECBD *)((int) RxBD + (sizeof(FECBD) * 2 * NRXBD));

-	dbg("%s: initialise RX buffer descriptor ring\r\n", __FUNCTION__);
+    dbg("initialise RX buffer descriptor ring\r\n");

-	/* 
-	 * Initialize the Rx Buffer Descriptor ring 
-	 */
-	for (i = 0; i < NRXBD; ++i)
-	{
-		/* Grab a network buffer from the free list */
-		nbuf = nbuf_alloc();
-		if (nbuf == NULL)
-		{
-			dbg("%s: could not allocate network buffer\r\n", __FUNCTION__);
-			return;
-		}
+    /* 
+     * Initialize the Rx Buffer Descriptor ring 
+     */
+    for (i = 0; i < NRXBD; ++i)
+    {
+        /* Grab a network buffer from the free list */
+        nbuf = nbuf_alloc();
+        if (nbuf == NULL)
+        {
+            dbg("could not allocate network buffer\r\n");
+            return;
+        }

-		/* Initialize the BD */
-		RxBD(ch,i).status = RX_BD_E | RX_BD_INTERRUPT;
-		RxBD(ch,i).length = RX_BUF_SZ;
-		RxBD(ch,i).data =  nbuf->data;
+        /* Initialize the BD */
+        RxBD(ch,i).status = RX_BD_E | RX_BD_INTERRUPT;
+        RxBD(ch,i).length = RX_BUF_SZ;
+        RxBD(ch,i).data =  nbuf->data;

-		/* Add the network buffer to the Rx queue */
-		nbuf_add(NBUF_RX_RING, nbuf);
-	}
+        /* Add the network buffer to the Rx queue */
+        nbuf_add(NBUF_RX_RING, nbuf);
+    }

-	/*
-	 * Set the WRAP bit on the last one
-	 */
-	RxBD(ch, i - 1).status |= RX_BD_W;
+    /*
+     * Set the WRAP bit on the last one
+     */
+    RxBD(ch, i - 1).status |= RX_BD_W;

-	dbg("%s: initialise TX buffer descriptor ring\r\n", __FUNCTION__);
+    dbg("initialise TX buffer descriptor ring\r\n");

-	/* 
-	 * Initialize the Tx Buffer Descriptor ring 
-	 */
-	for (i = 0; i < NTXBD; ++i)
-	{
-		TxBD(ch, i).status = TX_BD_INTERRUPT;
-		TxBD(ch, i).length = 0;
-		TxBD(ch, i).data = NULL;
-	}
+    /* 
+     * Initialize the Tx Buffer Descriptor ring 
+     */
+    for (i = 0; i < NTXBD; ++i)
+    {
+        TxBD(ch, i).status = TX_BD_INTERRUPT;
+        TxBD(ch, i).length = 0;
+        TxBD(ch, i).data = NULL;
+    }

-	/*
-	 * Set the WRAP bit on the last one
-	 */
-	TxBD(ch, i - 1).status |= TX_BD_W;
+    /*
+     * Set the WRAP bit on the last one
+     */
+    TxBD(ch, i - 1).status |= TX_BD_W;

-	/* 
-	 * Initialize the buffer descriptor indexes 
-	 */
-	iTxbd_new = iTxbd_old = iRxbd = 0;
+    /* 
+     * Initialize the buffer descriptor indexes 
+     */
+    iTxbd_new = iTxbd_old = iRxbd = 0;
 }

 void fecbd_dump(uint8_t ch)
 {
 #ifdef DBG_FECBD
-	int i;
+    int i;

-	xprintf("\n------------ FEC%d BDs -----------\n",ch);
-	xprintf("RxBD Ring\n");
-	for (i = 0; i < NRXBD; i++)
-	{
-		xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
-				i, &RxBD(ch, i), 
-				RxBD(ch, i).status, 
-				RxBD(ch, i).length, 
-				RxBD(ch, i).data);
-	}
-	xprintf("TxBD Ring\n");
-	for (i = 0; i < NTXBD; i++)
-	{
-		xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
-				i, &TxBD(ch, i), 
-				TxBD(ch, i).status, 
-				TxBD(ch, i).length, 
-				TxBD(ch, i).data);
-	}
-	xprintf("--------------------------------\n\n");
+    xprintf("\n------------ FEC%d BDs -----------\n",ch);
+    xprintf("RxBD Ring\n");
+    for (i = 0; i < NRXBD; i++)
+    {
+        xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
+                i, &RxBD(ch, i), 
+                RxBD(ch, i).status, 
+                RxBD(ch, i).length, 
+                RxBD(ch, i).data);
+    }
+    xprintf("TxBD Ring\n");
+    for (i = 0; i < NTXBD; i++)
+    {
+        xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
+                i, &TxBD(ch, i), 
+                TxBD(ch, i).status, 
+                TxBD(ch, i).length, 
+                TxBD(ch, i).data);
+    }
+    xprintf("--------------------------------\n\n");
 #endif /* DBG_FECBD */
 }

@@ -165,28 +165,28 @@ void fecbd_dump(uint8_t ch)
 */
 uint32_t fecbd_get_start(uint8_t ch, uint8_t direction)
 {
-	switch (direction)
-	{
-		case Rx:
-			return (uint32_t)((int)RxBD + (ch * sizeof(FECBD) * NRXBD));
-		case Tx:
-		default:
-			return (uint32_t)((int)TxBD + (ch * sizeof(FECBD) * NTXBD));
-	}
+    switch (direction)
+    {
+        case Rx:
+            return (uint32_t)((int)RxBD + (ch * sizeof(FECBD) * NRXBD));
+        case Tx:
+        default:
+            return (uint32_t)((int)TxBD + (ch * sizeof(FECBD) * NTXBD));
+    }
 }

 FECBD *fecbd_rx_alloc(uint8_t ch)
 {
-	int i = iRxbd;
+    int i = iRxbd;

-	/* Check to see if the ring of BDs is full */
-	if (RxBD(ch, i).status & RX_BD_E)
-		return NULL;
+    /* Check to see if the ring of BDs is full */
+    if (RxBD(ch, i).status & RX_BD_E)
+        return NULL;

-	/* Increment the circular index */
-	iRxbd = (uint8_t)((iRxbd + 1) % NRXBD);
+    /* Increment the circular index */
+    iRxbd = (uint8_t)((iRxbd + 1) % NRXBD);

-	return &RxBD(ch, i);
+    return &RxBD(ch, i);
 }

 /*
@@ -201,16 +201,16 @@ FECBD *fecbd_rx_alloc(uint8_t ch)
 */
 FECBD *fecbd_tx_alloc(uint8_t ch)
 {
-	int i = iTxbd_new;
+    int i = iTxbd_new;

-	/* Check to see if the ring of BDs is full */
-	if (TxBD(ch, i).status & TX_BD_R)
-		return NULL;
+    /* Check to see if the ring of BDs is full */
+    if (TxBD(ch, i).status & TX_BD_R)
+        return NULL;

-	/* Increment the circular index */
-	iTxbd_new = (uint8_t)((iTxbd_new + 1) % NTXBD);
+    /* Increment the circular index */
+    iTxbd_new = (uint8_t)((iTxbd_new + 1) % NTXBD);

-	return &TxBD(ch, i);
+    return &TxBD(ch, i);
 }

 /*
@@ -226,14 +226,14 @@ FECBD *fecbd_tx_alloc(uint8_t ch)
 */
 FECBD *fecbd_tx_free(uint8_t ch)
 {
-	int i = iTxbd_old;
+    int i = iTxbd_old;

-	/* Check to see if the ring of BDs is empty */
-	if ((TxBD(ch, i).data == NULL) || (TxBD(ch, i).status & TX_BD_R))
-		return NULL;
+    /* Check to see if the ring of BDs is empty */
+    if ((TxBD(ch, i).data == NULL) || (TxBD(ch, i).status & TX_BD_R))
+        return NULL;

-	/* Increment the circular index */
-	iTxbd_old = (uint8_t)((iTxbd_old + 1) % NTXBD);
+    /* Increment the circular index */
+    iTxbd_old = (uint8_t)((iTxbd_old + 1) % NTXBD);

-	return &TxBD(ch, i);
+    return &TxBD(ch, i);
 }
--- a/net/ip.c
+++ b/net/ip.c
@@ -1,5 +1,5 @@
 /*
- * File:        ip.c
+ * File:    ip.c
 * Purpose:     Internet Protcol device driver
 *
 * Notes:
@@ -7,309 +7,315 @@
 * Modifications:
 */
 #include "net.h"
+#include "bas_printf.h"
+#include "bas_string.h"
 #include <stdint.h>
 #include <stddef.h>


 //#define IP_DEBUG
 #if defined(IP_DEBUG)
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif

 void ip_init(IP_INFO *info, IP_ADDR_P myip, IP_ADDR_P gateway, IP_ADDR_P netmask)
 {
-	int index;
+    int index;

-	for (index = 0; index < sizeof(IP_ADDR); index++)
-	{
-		info->myip[index] = myip[index];
-		info->gateway[index] = gateway[index];
-		info->netmask[index] = netmask[index];
-		info->broadcast[index] = 0xFF;
-	}
+    for (index = 0; index < sizeof(IP_ADDR); index++)
+    {
+        info->myip[index] = myip[index];
+        info->gateway[index] = gateway[index];
+        info->netmask[index] = netmask[index];
+        info->broadcast[index] = 0xFF;
+    }

-	info->rx = 0;
-	info->rx_unsup = 0;
-	info->tx = 0;
-	info->err = 0;
+    info->rx = 0;
+    info->rx_unsup = 0;
+    info->tx = 0;
+    info->err = 0;
 }

 uint8_t *ip_get_myip(IP_INFO *info)
 {
-	if (info != 0)
-	{
-		return (uint8_t *) &info->myip[0];
-	}
-	dbg("%s: info is NULL!\n\t", __FUNCTION__);
-	return 0;
+    if (info != 0)
+    {
+        return (uint8_t *) &info->myip[0];
+    }
+    dbg("info is NULL!\n\t");
+    return 0;
 }

 int ip_addr_compare(IP_ADDR_P addr1, IP_ADDR_P addr2)
 {
-	int i;
+    int i;

-	for (i = 0; i < sizeof(IP_ADDR); i++)
-	{
-		if (addr1[i] != addr2[i])
-			return 0;
-	}
-	return 1;
+    for (i = 0; i < sizeof(IP_ADDR); i++)
+    {
+        if (addr1[i] != addr2[i])
+            return 0;
+    }
+    return 1;
 }

 uint8_t *ip_resolve_route(NIF *nif, IP_ADDR_P destip)
 {
-	/*
-	 * This function determines whether or not an outgoing IP
-	 * packet needs to be transmitted on the local net or sent
-	 * to the router for transmission.
-	 */
-	IP_INFO *info;
-	IP_ADDR mask, result;
-	IP_ADDR bc = { 255, 255, 255, 255 };
-	int i;
+    /*
+     * This function determines whether or not an outgoing IP
+     * packet needs to be transmitted on the local net or sent
+     * to the router for transmission.
+     */
+    IP_INFO *info;
+    IP_ADDR mask, result;
+    IP_ADDR bc = { 255, 255, 255, 255 };
+    int i;

-	info = nif_get_protocol_info(nif, ETH_FRM_IP);
+    info = nif_get_protocol_info(nif, ETH_FRM_IP);

-	if (memcmp(destip, bc) == 0)
-	{
-		dbg("%s: destip is broadcast address, no gateway needed\r\n", __FUNCTION__);
-		return destip;
-	}
+    if (memcmp(destip, bc, 4) == 0)
+    {
+    dbg("destip is broadcast address, no gateway needed\r\n");
+        return destip;
+    }

-	/* create mask for local IP */
-	for (i = 0; i < sizeof(IP_ADDR); i++)
-	{
-		mask[i] = info->myip[i] & info->netmask[i];
-	}
+    /* create mask for local IP */
+    for (i = 0; i < sizeof(IP_ADDR); i++)
+    {
+        mask[i] = info->myip[i] & info->netmask[i];
+    }

-	/* apply mask to the destination IP */
-	for (i = 0; i < sizeof(IP_ADDR); i++)
-	{
-		result[i] = mask[i] & destip[i];
-	}
+    /* apply mask to the destination IP */
+    for (i = 0; i < sizeof(IP_ADDR); i++)
+    {
+        result[i] = mask[i] & destip[i];
+    }

-	/* See if destination IP is local or not */
-	if (ip_addr_compare(mask, result))
-	{
-		/* The destination IP is on the local net */
-		return arp_resolve(nif, ETH_FRM_IP, destip);
-	}
-	else
-	{
-		/* The destination IP is not on the local net */
-		return arp_resolve(nif, ETH_FRM_IP, info->gateway);
-	}
+    /* See if destination IP is local or not */
+    if (ip_addr_compare(mask, result))
+    {
+        /* The destination IP is on the local net */
+        return arp_resolve(nif, ETH_FRM_IP, destip);
+    }
+    else
+    {
+        /* The destination IP is not on the local net */
+        return arp_resolve(nif, ETH_FRM_IP, info->gateway);
+    }
 }

 int ip_send(NIF *nif, uint8_t *dest, uint8_t *src, uint8_t protocol, NBUF *pNbuf)
 {
-	/*
-	 * This function assembles an IP datagram and passes it
-	 * onto the hardware to be sent over the network.
-	 */
-	uint8_t *route;
-	ip_frame_hdr *ipframe;
+    /*
+     * This function assembles an IP datagram and passes it
+     * onto the hardware to be sent over the network.
+     */
+    uint8_t *route;
+    ip_frame_hdr *ipframe;

-	/*
-	 * Construct the IP header
-	 */
-	ipframe = (ip_frame_hdr*) &pNbuf->data[IP_HDR_OFFSET];
+    /*
+     * Construct the IP header
+     */
+    ipframe = (ip_frame_hdr*) &pNbuf->data[IP_HDR_OFFSET];

-	/* IP version 4, Internet Header Length of 5 32-bit words */
-	ipframe->version_ihl = 0x45;
+    /* IP version 4, Internet Header Length of 5 32-bit words */
+    ipframe->version_ihl = 0x45;

-	/* Type of Service == 0, normal and routine */
-	ipframe->service_type = 0x00;
+    /* Type of Service == 0, normal and routine */
+    ipframe->service_type = 0x00;

-	/* Total length of data */
-	ipframe->total_length = (uint16_t) (pNbuf->length + IP_HDR_SIZE);
+    /* Total length of data */
+    ipframe->total_length = (uint16_t) (pNbuf->length + IP_HDR_SIZE);

-	/* User defined identification */
-	ipframe->identification = 0x0000;
+    /* User defined identification */
+    ipframe->identification = 0x0000;

-	/* Fragment Flags and Offset -- Don't fragment, last frag */
-	ipframe->flags_frag_offset = 0x0000;
+    /* Fragment Flags and Offset -- Don't fragment, last frag */
+    ipframe->flags_frag_offset = 0x0000;

-	/* Time To Live */
-	ipframe->ttl = 0xFF;
+    /* Time To Live */
+    ipframe->ttl = 0xFF;

-	/* Protocol */
-	ipframe->protocol = protocol;
+    /* Protocol */
+    ipframe->protocol = protocol;

-	/* Checksum, computed later, zeroed for computation */
-	ipframe->checksum = 0x0000;
+    /* Checksum, computed later, zeroed for computation */
+    ipframe->checksum = 0x0000;

-	/* source IP address */
-	ipframe->source_addr[0] = src[0];
-	ipframe->source_addr[1] = src[1];
-	ipframe->source_addr[2] = src[2];
-	ipframe->source_addr[3] = src[3];
+    /* source IP address */
+    ipframe->source_addr[0] = src[0];
+    ipframe->source_addr[1] = src[1];
+    ipframe->source_addr[2] = src[2];
+    ipframe->source_addr[3] = src[3];

-	/* dest IP address */
-	ipframe->dest_addr[0] = dest[0];
-	ipframe->dest_addr[1] = dest[1];
-	ipframe->dest_addr[2] = dest[2];
-	ipframe->dest_addr[3] = dest[3];
+    /* dest IP address */
+    ipframe->dest_addr[0] = dest[0];
+    ipframe->dest_addr[1] = dest[1];
+    ipframe->dest_addr[2] = dest[2];
+    ipframe->dest_addr[3] = dest[3];

-	/* Compute checksum */
-	ipframe->checksum = ip_chksum((uint16_t *) ipframe, IP_HDR_SIZE);
+    /* Compute checksum */
+    ipframe->checksum = ip_chksum((uint16_t *) ipframe, IP_HDR_SIZE);

-	/* Increment the packet length by the size of the IP header */
-	pNbuf->length += IP_HDR_SIZE;
+    /* Increment the packet length by the size of the IP header */
+    pNbuf->length += IP_HDR_SIZE;

-	/*
-	 * Determine the hardware address of the recipient
-	 */
-	IP_ADDR bc = { 255, 255, 255, 255};
-	if (memcmp(bc, dest, 4) != 0)
-	{
-		route = ip_resolve_route(nif, dest);
-		if (route == NULL)
-		{
-			dbg("%s: Unable to locate %d.%d.%d.%d\r\n", __FUNCTION__,
-					dest[0], dest[1], dest[2], dest[3]);
-			return 0;
-		}
-	}
-	else
-	{
-		route = bc;
-		dbg("%s: route = broadcast\r\n", __FUNCTION__);
-		dbg("%s: nif = %p\r\n", __FUNCTION__, nif);
-		dbg("%s: nif->send = %p\r\n", __FUNCTION__, nif->send);
-	}
+    /*
+     * Determine the hardware address of the recipient
+     */
+    IP_ADDR bc = { 255, 255, 255, 255};
+    if (memcmp(bc, dest, 4) != 0)
+    {
+        route = ip_resolve_route(nif, dest);
+        if (route == NULL)
+        {
+        dbg("Unable to locate %d.%d.%d.%d\r\n",
+                    dest[0], dest[1], dest[2], dest[3]);
+            return 0;
+        }
+    }
+    else
+    {
+        route = bc;
+    dbg("route = broadcast\r\n");
+    dbg("nif = %p\r\n", nif);
+    dbg("nif->send = %p\r\n", nif->send);
+    }

-	return nif->send(nif, route, &nif->hwa[0], ETH_FRM_IP, pNbuf);
+    return nif->send(nif, route, &nif->hwa[0], ETH_FRM_IP, pNbuf);
 }

 #if defined(DEBUG_PRINT)
 void dump_ip_frame(ip_frame_hdr *ipframe)
 {
-	xprintf("Version:  %02X\n", ((ipframe->version_ihl & 0x00f0) >> 4));
-	xprintf("IHL:      %02X\n", ipframe->version_ihl & 0x000f);
-	xprintf("Service:  %02X\n", ipframe->service_type);
-	xprintf("Length:   %04X\n", ipframe->total_length);
-	xprintf("Ident:    %04X\n", ipframe->identification);
-	xprintf("Flags:    %02X\n", ((ipframe->flags_frag_offset & 0xC000) >> 14));
-	xprintf("Frag:     %04X\n", ipframe->flags_frag_offset & 0x3FFF);
-	xprintf("TTL:      %02X\n", ipframe->ttl);
-	xprintf("Protocol: %02X\n", ipframe->protocol);
-	xprintf("Chksum:   %04X\n", ipframe->checksum);
-	xprintf("Source  : %d.%d.%d.%d\n",
-			ipframe->source_addr[0],
-			ipframe->source_addr[1],
-			ipframe->source_addr[2],
-			ipframe->source_addr[3]);
-	xprintf("Dest    : %d.%d.%d.%d\n",
-			ipframe->dest_addr[0],
-			ipframe->dest_addr[1],
-			ipframe->dest_addr[2],
-			ipframe->dest_addr[3]);
-	xprintf("Options: %08X\n", ipframe->options);
+    xprintf("Version:  %02X\n", ((ipframe->version_ihl & 0x00f0) >> 4));
+    xprintf("IHL:      %02X\n", ipframe->version_ihl & 0x000f);
+    xprintf("Service:  %02X\n", ipframe->service_type);
+    xprintf("Length:   %04X\n", ipframe->total_length);
+    xprintf("Ident:    %04X\n", ipframe->identification);
+    xprintf("Flags:    %02X\n", ((ipframe->flags_frag_offset & 0xC000) >> 14));
+    xprintf("Frag:     %04X\n", ipframe->flags_frag_offset & 0x3FFF);
+    xprintf("TTL:      %02X\n", ipframe->ttl);
+    xprintf("Protocol: %02X\n", ipframe->protocol);
+    xprintf("Chksum:   %04X\n", ipframe->checksum);
+    xprintf("Source  : %d.%d.%d.%d\n",
+            ipframe->source_addr[0],
+            ipframe->source_addr[1],
+            ipframe->source_addr[2],
+            ipframe->source_addr[3]);
+    xprintf("Dest    : %d.%d.%d.%d\n",
+            ipframe->dest_addr[0],
+            ipframe->dest_addr[1],
+            ipframe->dest_addr[2],
+            ipframe->dest_addr[3]);
+    xprintf("Options: %08X\n", ipframe->options);
 }
 #endif


 uint16_t ip_chksum(uint16_t *data, int num)
 {
-	int chksum, ichksum;
-	uint16_t temp;
+    int chksum, ichksum;
+    uint16_t temp;

-	chksum = 0;
-	num = num >> 1; /* from bytes to words */
-	for (; num; num--, data++)
-	{
-		temp = *data;
-		ichksum = chksum + temp;
-		ichksum = ichksum & 0x0000FFFF;
-		if ((ichksum < temp) || (ichksum < chksum))
-		{
-			ichksum += 1;
-			ichksum = ichksum & 0x0000FFFF;
-		}
-		chksum = ichksum;
-	}
-	return (uint16_t) ~chksum;
+    chksum = 0;
+    num = num >> 1; /* from bytes to words */
+    for (; num; num--, data++)
+    {
+        temp = *data;
+        ichksum = chksum + temp;
+        ichksum = ichksum & 0x0000FFFF;
+        if ((ichksum < temp) || (ichksum < chksum))
+        {
+            ichksum += 1;
+            ichksum = ichksum & 0x0000FFFF;
+        }
+        chksum = ichksum;
+    }
+    return (uint16_t) ~chksum;
 }

 static int validate_ip_hdr(NIF *nif, ip_frame_hdr *ipframe)
 {
-	int index, chksum;
-	IP_INFO *info;
+    int index, chksum;
+    IP_INFO *info;

-	/*
-	 * Check the IP Version
-	 */
-	if (IP_VERSION(ipframe) != 4)
-		return 0;
+    /*
+     * Check the IP Version
+     */
+    if (IP_VERSION(ipframe) != 4)
+        return 0;

-	/*
-	 * Check Internet Header Length
-	 */
-	if (IP_IHL(ipframe) < 5)
-		return 0;
+    /*
+     * Check Internet Header Length
+     */
+    if (IP_IHL(ipframe) < 5)
+        return 0;

-	/*
-	 * Check the destination IP address
-	 */
-	info = nif_get_protocol_info(nif,ETH_FRM_IP);
-	for (index = 0; index < sizeof(IP_ADDR); index++)
-		if (info->myip[index] != ipframe->dest_addr[index])
-			return 0;
+    /*
+     * Check the destination IP address
+     */
+    info = nif_get_protocol_info(nif,ETH_FRM_IP);
+    for (index = 0; index < sizeof(IP_ADDR); index++)
+        if (info->myip[index] != ipframe->dest_addr[index])
+            return 0;

-	/*
-	 * Check the checksum
-	 */
-	chksum = (int)((uint16_t) IP_CHKSUM(ipframe));
-	IP_CHKSUM(ipframe) = 0;
+    /*
+     * Check the checksum
+     */
+    chksum = (int)((uint16_t) IP_CHKSUM(ipframe));
+    IP_CHKSUM(ipframe) = 0;

-	if (ip_chksum((uint16_t *) ipframe, IP_IHL(ipframe) * 4) != chksum)
-		return 0;
+    if (ip_chksum((uint16_t *) ipframe, IP_IHL(ipframe) * 4) != chksum)
+        return 0;

-	IP_CHKSUM(ipframe) = (uint16_t) chksum;
+    IP_CHKSUM(ipframe) = (uint16_t) chksum;

-	return 1;
+    return 1;
 }

 void ip_handler(NIF *nif, NBUF *pNbuf)
 {
-	/*
-	 * IP packet handler
-	 */
-	ip_frame_hdr *ipframe;
+    /*
+     * IP packet handler
+     */
+    ip_frame_hdr *ipframe;

-	dbg("%s: packet received\r\n", __FUNCTION__);
+    dbg("packet received\r\n");

-	ipframe = (ip_frame_hdr *) &pNbuf->data[pNbuf->offset];
+    ipframe = (ip_frame_hdr *) &pNbuf->data[pNbuf->offset];

-	/*
-	 * Verify valid IP header and destination IP
-	 */
-	if (!validate_ip_hdr(nif, ipframe))
-	{
-		nbuf_free(pNbuf);
-		return;
-	}
+    /*
+     * Verify valid IP header and destination IP
+     */
+    if (!validate_ip_hdr(nif, ipframe))
+    {
+    dbg("not a valid IP packet!\r\n");

-	pNbuf->offset += (IP_IHL(ipframe) * 4);
-	pNbuf->length = (uint16_t)(IP_LENGTH(ipframe) - (IP_IHL(ipframe) * 4));
+        nbuf_free(pNbuf);
+        return;
+    }

-	/*
-	 * Call the appriopriate handler
-	 */
-	switch (IP_PROTOCOL(ipframe))
-	{
-		case IP_PROTO_ICMP:
-			// FIXME: icmp_handler(nif, pNbuf);
-			break;
-		case IP_PROTO_UDP:
-			udp_handler(nif,pNbuf);
-			break;
-		default:
-			nbuf_free(pNbuf);
-			break;
-	}
-	return;
+    pNbuf->offset += (IP_IHL(ipframe) * 4);
+    pNbuf->length = (uint16_t)(IP_LENGTH(ipframe) - (IP_IHL(ipframe) * 4));
+
+    /*
+     * Call the appriopriate handler
+     */
+    switch (IP_PROTOCOL(ipframe))
+    {
+        case IP_PROTO_ICMP:
+            // FIXME: icmp_handler(nif, pNbuf);
+            break;
+        case IP_PROTO_UDP:
+            udp_handler(nif,pNbuf);
+            break;
+        default:
+        dbg("no protocol handler registered for protocol %d\r\n",
+                    __FUNCTION__, IP_PROTOCOL(ipframe));
+            nbuf_free(pNbuf);
+            break;
+    }
+    return;
 }
--- a/net/net_timer.c
+++ b/net/net_timer.c
@@ -24,6 +24,8 @@
 #include "firebee.h"
 #elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
 #else
 #error unknown machine!
 #endif
@@ -152,8 +154,7 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
 	/*
 	 * Register the timer interrupt handler
 	 */
-	if (!isr_register_handler(ISR_DBUG_ISR, 
-				TIMER_VECTOR(ch), 
+	if (!isr_register_handler(TIMER_VECTOR(ch), 
 				(int (*)(void *,void *)) timer_default_isr,
 				NULL, 
 				(void *) &net_timer[ch])
--- a/net/udp.c
+++ b/net/udp.c
@@ -21,8 +21,8 @@

 typedef struct
 {
-	uint16_t port;
-	void (*handler)(NIF *, NBUF *);
+    uint16_t port;
+    void (*handler)(NIF *, NBUF *);
 } UDP_BOUND_PORT;

 #define UDP_MAX_PORTS   (5)     /* plenty for this implementation */
@@ -34,150 +34,151 @@ static uint16_t udp_port;

 void udp_init(void)
 {
-	int index;
+    int index;

-	for (index = 0; index < UDP_MAX_PORTS; ++index)
-	{
-		udp_port_table[index].port = 0;
-	}
+    for (index = 0; index < UDP_MAX_PORTS; ++index)
+    {
+        udp_port_table[index].port = 0;
+        udp_port_table[index].handler = 0;
+    }

-	udp_port = DEFAULT_UDP_PORT;    /* next free port */
+    udp_port = DEFAULT_UDP_PORT;    /* next free port */
 }

 void udp_prime_port(uint16_t init_port)
 {
-	udp_port = init_port;
+    udp_port = init_port;
 }

 void udp_bind_port(uint16_t port, void (*handler)(NIF *, NBUF *))
 {
-	int index;
+    int index;

-	for (index = 0; index < UDP_MAX_PORTS; ++index)
-	{
-		if (udp_port_table[index].port == 0)
-		{
-			udp_port_table[index].port = port;
-			udp_port_table[index].handler = handler;
+    for (index = 0; index < UDP_MAX_PORTS; ++index)
+    {
+        if (udp_port_table[index].port == 0)
+        {
+            udp_port_table[index].port = port;
+            udp_port_table[index].handler = handler;

-			return;
-		}
-	}
+            return;
+        }
+    }
 }

 void udp_free_port(uint16_t port)
 {
-	int index;
+    int index;

-	for (index = 0; index < UDP_MAX_PORTS; ++index)
-	{
-		if (udp_port_table[index].port == port)
-		{
-			udp_port_table[index].port = 0;
+    for (index = 0; index < UDP_MAX_PORTS; ++index)
+    {
+        if (udp_port_table[index].port == port)
+        {
+            udp_port_table[index].port = 0;

-			return;
-		}
-	}
+            return;
+        }
+    }
 }

 static void *udp_port_handler(uint16_t port)
 {
-	int index;
+    int index;

-	for (index = 0; index < UDP_MAX_PORTS; ++index)
-	{
-		if (udp_port_table[index].port == port)
-		{
-			return (void *)udp_port_table[index].handler;
-		}
-	}
-	return NULL;
+    for (index = 0; index < UDP_MAX_PORTS; ++index)
+    {
+        if (udp_port_table[index].port == port)
+        {
+            return (void *) udp_port_table[index].handler;
+        }
+    }
+    return NULL;
 }

 uint16_t udp_obtain_free_port(void)
 {
-	uint16_t port;
+    uint16_t port;

-	port = udp_port;
-	if (--udp_port <= 255)
-		udp_port = DEFAULT_UDP_PORT;
+    port = udp_port;
+    if (--udp_port <= 255)
+        udp_port = DEFAULT_UDP_PORT;

-	return port;
+    return port;
 }

 int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf)
 {
-	uint8_t *myip;
+    uint8_t *myip;

-	if (nif == NULL)
-	{
-		dbg("%s: nif is NULL\r\n", __FUNCTION__);
-		return 0;
-	}
+    if (nif == NULL)
+    {
+        dbg("%s: nif is NULL\r\n", __FUNCTION__);
+        return 0;
+    }

-	/*
-	 * This function takes data and creates a UDP frame and
-	 * passes it onto the IP layer
-	 */
-	udp_frame_hdr *udpframe;
+    /*
+     * This function takes data, creates a UDP frame from it and
+     * passes it onto the IP layer
+     */
+    udp_frame_hdr *udpframe;

-	udpframe = (udp_frame_hdr *) &pNbuf->data[UDP_HDR_OFFSET];
+    udpframe = (udp_frame_hdr *) &pNbuf->data[UDP_HDR_OFFSET];

-	/* Set UDP source port */
-	udpframe->src_port = (uint16_t) sport;
+    /* Set UDP source port */
+    udpframe->src_port = (uint16_t) sport;

-	/* Set UDP destination port */
-	udpframe->dest_port = (uint16_t) dport;
+    /* Set UDP destination port */
+    udpframe->dest_port = (uint16_t) dport;

-	/* Set length */
-	udpframe->length = (uint16_t) (pNbuf->length + UDP_HDR_SIZE);
+    /* Set length */
+    udpframe->length = (uint16_t) (pNbuf->length + UDP_HDR_SIZE);

-	/* No checksum calcualation needed */
-	udpframe->chksum = (uint16_t) 0;
+    /* No checksum calcualation needed */
+    udpframe->chksum = (uint16_t) 0;

-	/* Add the length of the UDP packet to the total length of the packet */
-	pNbuf->length += 8;
+    /* Add the length of the UDP packet to the total length of the packet */
+    pNbuf->length += 8;

-	myip = ip_get_myip(nif_get_protocol_info(nif, ETH_FRM_IP));
+    myip = ip_get_myip(nif_get_protocol_info(nif, ETH_FRM_IP));

-	dbg("%s: sent UDP request to %d.%d.%d.%d from %d.%d.%d.%d\r\n", __FUNCTION__,
-			dest[0], dest[1], dest[2], dest[3],
-			myip[0], myip[1], myip[2], myip[3]);
+    dbg("%s: sent UDP request to %d.%d.%d.%d from %d.%d.%d.%d\r\n", __FUNCTION__,
+            dest[0], dest[1], dest[2], dest[3],
+            myip[0], myip[1], myip[2], myip[3]);

-	return (ip_send(nif, dest, myip, IP_PROTO_UDP, pNbuf));
+    return (ip_send(nif, dest, myip, IP_PROTO_UDP, pNbuf));

 }

 void udp_handler(NIF *nif, NBUF *pNbuf)
 {
-	/*
-	 * This function handles incoming UDP packets
-	 */
-	udp_frame_hdr *udpframe;
-	void (*handler)(NIF *, NBUF *);
+    /*
+     * This function handles incoming UDP packets
+     */
+    udp_frame_hdr *udpframe;
+    void (*handler)(NIF *, NBUF *);

-	udpframe = (udp_frame_hdr *) &pNbuf->data[pNbuf->offset];
+    udpframe = (udp_frame_hdr *) &pNbuf->data[pNbuf->offset];

-	dbg("%s: packet received\r\n", __FUNCTION__);
+    dbg("%s: packet received\r\n", __FUNCTION__);

-	/*
-	 * Adjust the length and valid data offset of the packet we are
-	 * passing on
-	 */
-	pNbuf->length -= UDP_HDR_SIZE;
-	pNbuf->offset += UDP_HDR_SIZE;
+    /*
+     * Adjust the length and valid data offset of the packet we are
+     * passing on
+     */
+    pNbuf->length -= UDP_HDR_SIZE;
+    pNbuf->offset += UDP_HDR_SIZE;

-	/*
-	 * Traverse the list of bound ports to see if there is a higher
-	 * level protocol to pass the packet on to
-	 */
-	if ((handler = (void(*)(NIF*, NBUF*)) udp_port_handler(UDP_DEST(udpframe))) != NULL)
-		handler(nif, pNbuf);
-	else
-	{
-		dbg("%s: received UDP packet for non-supported port\n", __FUNCTION__);
-		nbuf_free(pNbuf);
-	}
+    /*
+     * Traverse the list of bound ports to see if there is a higher
+     * level protocol to pass the packet on to
+     */
+    if ((handler = (void(*)(NIF*, NBUF*)) udp_port_handler(UDP_DEST(udpframe))) != NULL)
+        handler(nif, pNbuf);
+    else
+    {
+        dbg("%s: received UDP packet for non-supported port\n", __FUNCTION__);
+        nbuf_free(pNbuf);
+    }

-	return;
+    return;
 }
--- a/pci/pci.c
+++ b/pci/pci.c
@@ -35,7 +35,7 @@

 //#define DEBUG_PCI
 #ifdef DEBUG_PCI
-#define dbg(format, arg...) do { xprintf("DEBUG: " format "", ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DEBUG_PCI */
@@ -162,7 +162,7 @@ static int32_t pci_get_interrupt_cause(int32_t *handles)
 			return handle;
 		}
 	}
-	dbg("%s: no interrupt cause found\r\n", __FUNCTION__);
+    dbg("%s: no interrupt cause found\r\n");
 	return -1;
 }

@@ -189,7 +189,7 @@ void irq5_handler(void)
 		newvalue = pci_call_interrupt_chain(handle, value);
 		if (newvalue == value)
 		{
-			dbg("%s: interrupt not handled!\r\n", __FUNCTION__);
+            dbg("%s: interrupt not handled!\r\n");
 		}
 	}
 }
@@ -211,7 +211,7 @@ void irq7_handler(void)
 		newvalue = pci_call_interrupt_chain(handle, value);
 		if (newvalue == value)
 		{
-			dbg("%s: interrupt not handled!\r\n", __FUNCTION__);
+            dbg("%s: interrupt not handled!\r\n");
 		}
 	}
 }
@@ -587,7 +587,168 @@ int32_t pci_unhook_interrupt(int32_t handle)
 	return PCI_SUCCESSFUL;
 }

+/*
+ * Not implemented PCI_BIOS functions
+ */

+uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_special_cycle(uint16_t bus, uint32_t data)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_routing(int32_t handle)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_set_interrupt(int32_t handle)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_card_used(int32_t handle, uint32_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_set_card_used(int32_t handle, uint32_t *callback)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_machine_id(void)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_pagesize(void)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}

 /*
 * pci_device_config()
@@ -649,7 +810,7 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
 			 */
 			struct pci_rd *rd = &descriptors[barnum]; 

-			dbg("%s: address = %08x\r\n", __FUNCTION__, address);
+            dbg("%s: address = %08x\r\n", address);
 			if (IS_PCI_MEM_BAR(address))
 			{
 				/* adjust base address to card's alignment requirements */
@@ -738,10 +899,10 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)

 		/* write it to PCIERBAR and enable ROM */
 		pci_write_config_longword(handle, PCIERBAR, swpl(address | 1));
-		dbg("%s: set PCIERBAR on device 0x%02x to 0x%08x\r\n", __FUNCTION__, handle, address | 1);
+        dbg("%s: set PCIERBAR on device 0x%02x to 0x%08x\r\n", handle, address | 1);

 		/* read value back just to be sure */
-		dbg("%s: PCIERBAR = %p\r\n", __FUNCTION__, swpl(pci_read_config_longword(handle, PCIERBAR)));
+        dbg("%s: PCIERBAR = %p\r\n", swpl(pci_read_config_longword(handle, PCIERBAR)));


 		rd->next = sizeof(struct pci_rd);
--- a/pci/pci_wrappers.S
+++ b/pci/pci_wrappers.S
@@ -0,0 +1,469 @@
+/*
+ * pci.S
+ *
+ * Purpose:		PCI configuration for the Coldfire builtin PCI bridge.
+ *
+ * Notes:
+ *
+ * This file is part of BaS_gcc.
+ *
+ * BaS_gcc is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * BaS_gcc is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *  Created on: 08.05.2014
+ *      Author: David Galvez
+ */
+
+.global _wrapper_find_pci_device
+.global _wrapper_find_pci_classcode
+
+.global _wrapper_read_config_longword
+.global _wrapper_read_config_word
+.global _wrapper_read_config_byte
+
+.global _wrapper_fast_read_config_byte
+.global _wrapper_fast_read_config_word
+.global _wrapper_fast_read_config_longword
+
+.global _wrapper_write_config_longword
+.global _wrapper_write_config_word
+.global _wrapper_write_config_byte
+
+.global _wrapper_get_resource
+.global _wrapper_hook_interrupt
+.global _wrapper_unhook_interrupt
+
+.global _wrapper_special_cycle
+.global _wrapper_get_routing
+.global _wrapper_set_interrupt
+.global _wrapper_get_resource
+.global _wrapper_get_card_used
+.global _wrapper_set_card_used
+
+.global _wrapper_read_mem_byte
+.global _wrapper_read_mem_word
+.global _wrapper_read_mem_longword
+
+.global _wrapper_fast_read_mem_byte
+.global _wrapper_fast_read_mem_word
+.global _wrapper_fast_read_mem_longword
+
+.global _wrapper_write_mem_byte
+.global _wrapper_write_mem_word
+.global _wrapper_write_mem_longword
+
+.global _wrapper_read_io_byte
+.global _wrapper_read_io_word
+.global _wrapper_read_io_longword
+
+.global _wrapper_fast_read_io_byte
+.global _wrapper_fast_read_io_word
+.global _wrapper_fast_read_io_longword
+
+.global _wrapper_write_io_byte
+.global _wrapper_write_io_word
+.global _wrapper_write_io_longword
+
+.global _wrapper_get_machine_id
+.global _wrapper_get_pagesize
+
+.global _wrapper_virt_to_bus
+.global _wrapper_bus_to_virt
+.global _wrapper_virt_to_phys
+.global _wrapper_phys_to_virt
+
+
+_wrapper_find_pci_device:
+	move.l D1,-(SP)			// index
+	move.l D0,-(SP)			// Vendor ID
+	move.l #16,D1
+	lsr.l D1,D0
+	move.l D0,-(SP)			// Device ID
+	jsr _pci_find_device
+	add.l #12,SP
+	rts
+
+_wrapper_find_pci_classcode:
+	move.l D1,-(SP)			// index
+	move.l D0,-(SP)			// ID
+	jsr _pci_find_classcode
+	addq.l #8,SP
+	rts
+
+_wrapper_read_config_byte:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_byte
+	move.l 8(SP),A0			// PCI_BIOS expects value in memory
+	move.l D0,(A0)
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+_wrapper_read_config_word:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_word
+	move.l 8(SP),A0			// little to big endian
+	move.l D0,(A0)
+	mvz.b 1(A0),D0
+	lsl.l #8,D0
+	move.b (A0),D0
+	move.l D0,(A0)			// PCI_BIOS expects value in memory, not in D0
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+_wrapper_read_config_longword:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_longword
+	move.l 8(SP),A0			// little to big endian
+	move.l D0,(A0)
+	mvz.b 3(A0),D0
+	lsl.l #8,D0
+	move.b 2(A0),D0
+	lsl.l #8,D0
+	move.b 1(A0),D0
+	lsl.l #8,D0
+	move.b (A0),D0
+	move.l D0,(A0)			// PCI_BIOS expects value in memory, not in D0
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_byte:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_word:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_longword:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_longword
+	addq.l #8,SP
+	rts
+
+_wrapper_write_config_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_byte
+	add.l #12,SP
+	rts
+
+_wrapper_write_config_word:
+	move.l D0,-(SP)			// make data little endian
+	moveq #0,D1
+	move.w D2,D1
+	lsr.l #8,D1
+	asl.l #8,D2
+	or.l D1,D2
+	move.l (SP)+,D0
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_word
+	add.l #12,SP
+	rts
+
+_wrapper_write_config_longword:
+	move.l D0,-(SP)
+	move.l D2,D0			// make data little endian
+	lsr.l #8,D0
+	asl.l #8,D2
+	and.l #0x00FF00FF,D0
+	and.l #0xFF00FF00,D2
+	or.l D0,D2
+	swap D2
+	move.l (SP)+,D0
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_longword
+	add.l #12,SP
+	rts
+
+_wrapper_hook_interrupt:
+	move.l A1,-(SP)			// parameter for interrupt handler
+	move.l A0,-(SP)			// pointer to interrupt handler
+	move.l D0,-(SP)			// handle
+	jsr _pci_hook_interrupt
+	add.l #12,SP
+	rts
+
+_wrapper_unhook_interrupt:
+	move.l D0,-(SP)			// handle
+	jsr _pci_unhook_interrupt
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_special_cycle:
+	move.l D1,-(SP)			// special cycle data
+	move.l D0,-(SP)			// bus number
+	jsr _pci_special_cycle
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_routing:
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_routing
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_set_interrupt:
+	move.l D1,-(SP)			// mode
+	move.l D0,-(SP)			// handle
+	jsr _pci_set_interrupt
+	addq.l #8,SP
+	rts
+
+_wrapper_get_resource:
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_resource
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_card_used:
+	move.l D1,-(SP)			// address
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_card_used
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_set_card_used:
+	move.l A0,-(SP)			// callback
+	move.l D0,-(SP)			// handle
+	jsr _pci_set_card_used
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_byte:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_word:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_longword:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_byte:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_word:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_longword:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_longword
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_word:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_longword:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_byte:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_word:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_longword:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_byte:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_word:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_longword:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_longword
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_word:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_longword:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_machine_id:
+	jsr _pci_get_machine_id
+	rts
+
+/* Not implemented */
+_wrapper_get_pagesize:
+	jsr _pci_get_pagesize
+	rts
+
+/* Not implemented */
+_wrapper_virt_to_bus:
+	move.l A0,-(SP)			// ptr
+	move.l D1,-(SP)			// address in virtual CPU space
+	move.l D0,-(SP)			// handle
+	jsr _pci_virt_to_bus
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_bus_to_virt:
+	move.l A0,-(SP)			// ptr
+	move.l D1,-(SP)			// PCI bus address
+	move.l D0,-(SP)			// handle
+	jsr _pci_bus_to_virt
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_virt_to_phys:
+	move.l A0,-(SP)			// ptr
+	move.l D0,-(SP)			// address in virtual CPU space
+	jsr _pci_virt_to_phys
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_phys_to_virt:
+	move.l A0,-(SP)			// ptr
+	move.l D0,-(SP)			// physical CPU address 
+	jsr _pci_phys_to_virt
+	addq.l #8,SP
+	rts
--- a/radeon/radeon_base.c
+++ b/radeon/radeon_base.c
@@ -74,7 +74,15 @@ extern void run_bios(struct radeonfb_info *rinfo);
 #define MIN_MAPPED_VRAM	(1024*768*4)

 #define CHIP_DEF(id, family, flags)					\
-	{ PCI_VENDOR_ID_ATI, id, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (flags) | (CHIP_FAMILY_##family) }
+{													\
+	PCI_VENDOR_ID_ATI, 								\
+	id,												\
+	PCI_ANY_ID,										\
+	PCI_ANY_ID,										\
+	0,												\
+	0,												\
+	(flags) | (CHIP_FAMILY_##family)				\
+}

 struct pci_device_id radeonfb_pci_table[] = 
 {
@@ -231,7 +239,7 @@ extern struct fb_info *info_fb;
 #define rinfo ((struct radeonfb_info *) info_fb->par)
 static uint32_t inreg(uint32_t addr)
 {
-	return(INREG(addr));
+	return INREG(addr);
 }

 static void outreg(uint32_t addr, uint32_t val)
@@ -332,12 +340,10 @@ static int round_div(int num, int den)
 	return(num + (den / 2)) / den;
 }

-#ifndef MCF5445X
 static uint32_t read_vline_crnt(struct radeonfb_info *rinfo)
 {
 	return((INREG(CRTC_VLINE_CRNT_VLINE) >> 16) & 0x3FF);
 }
-#endif

 static int radeon_map_ROM(struct radeonfb_info *rinfo)
 {
@@ -510,10 +516,12 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)

 	hz = US_TO_TIMER(1000000.0) / (double)(stop_tv - start_tv);
 	dbg("%s:hz %d\r\n", __FUNCTION__, (int32_t) hz);
+
 	hTotal = ((INREG(CRTC_H_TOTAL_DISP) & 0x1ff) + 1) * 8;
 	vTotal = ((INREG(CRTC_V_TOTAL_DISP) & 0x3ff) + 1);
 	dbg("%s:hTotal=%d\r\n", __FUNCTION__, hTotal);
 	dbg("%s:vTotal=%d\r\n", __FUNCTION__, vTotal);
+
 	vclk = (double) hTotal * (double) vTotal * hz;
 	dbg("%s:vclk=%d\r\n", __FUNCTION__, (int) vclk);

@@ -525,41 +533,52 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)
 			num = 2 * n;
 			denom = 2 * m;
 			break;
+
 		case 2:
 			n = ((INPLL(M_SPLL_REF_FB_DIV) >> 8) & 0xff);
 			m = (INPLL(M_SPLL_REF_FB_DIV) & 0xff);
 			num = 2 * n;
 			denom = 2 * m;
 			break;
+
 		case 0:
 		default:
 			num = 1;
 			denom = 1;
 			break;
 	}
+
 	ppll_div_sel = INREG8(CLOCK_CNTL_INDEX + 1) & 0x3;
 	radeon_pll_errata_after_index(rinfo);
+
 	n = (INPLL(PPLL_DIV_0 + ppll_div_sel) & 0x7ff);
 	m = (INPLL(PPLL_REF_DIV) & 0x3ff);
+
 	num *= n;
 	denom *= m;
+
 	switch((INPLL(PPLL_DIV_0 + ppll_div_sel) >> 16) & 0x7)
 	{
 		case 1:
 			denom *= 2;
 			break;
+
 		case 2:
 			denom *= 4;
 			break;
+			
 		case 3:
 			denom *= 8;
 			break;
+
 		case 4:
 			denom *= 3;
 			break;
+
 		case 6:
 			denom *= 6;   
 			break;
+
 		case 7:
 			denom *= 12;
 			break;
@@ -567,6 +586,7 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)
 	vclk *= (double) denom;
 	vclk /= (double) (1000 * num);
 	xtal = (int32_t) vclk;
+
 	if ((xtal > 26900) && (xtal < 27100))
 		xtal = 2700;   /* 27 MHz */
 	else if ((xtal > 14200) && (xtal < 14400))
@@ -578,6 +598,7 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)
 		dbg("%s: xtal calculation failed: %d\r\n", __FUNCTION__, xtal);
 		return -1; /* error */
 	}
+
 	tmp = INPLL(M_SPLL_REF_FB_DIV);
 	ref_div = INPLL(PPLL_REF_DIV) & 0x3ff;

@@ -619,6 +640,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
 			rinfo->pll.sclk = 23000;
 			rinfo->pll.ref_clk = 2700;
 			break;
+
 		case PCI_DEVICE_ID_ATI_RADEON_QL:
 		case PCI_DEVICE_ID_ATI_RADEON_QN:
 		case PCI_DEVICE_ID_ATI_RADEON_QO:
@@ -630,6 +652,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
 			rinfo->pll.sclk = 27500;
 			rinfo->pll.ref_clk = 2700;
 			break;
+
 		case PCI_DEVICE_ID_ATI_RADEON_Id:
 		case PCI_DEVICE_ID_ATI_RADEON_Ie:
 		case PCI_DEVICE_ID_ATI_RADEON_If:
@@ -640,6 +663,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
 			rinfo->pll.sclk = 25000;
 			rinfo->pll.ref_clk = 2700;
 			break;
+
 		case PCI_DEVICE_ID_ATI_RADEON_ND:
 		case PCI_DEVICE_ID_ATI_RADEON_NE:
 		case PCI_DEVICE_ID_ATI_RADEON_NF:
@@ -650,6 +674,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
 			rinfo->pll.sclk = 27000;
 			rinfo->pll.ref_clk = 2700;
 			break;
+
 		case PCI_DEVICE_ID_ATI_RADEON_QD:
 		case PCI_DEVICE_ID_ATI_RADEON_QE:
 		case PCI_DEVICE_ID_ATI_RADEON_QF:
@@ -690,10 +715,12 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
 		dbg("%s: Retreived PLL infos from registers\r\n", __FUNCTION__);
 		goto found;
 	}
+
 	/*
 	 * Fall back to already-set defaults...
 	 */
 	dbg("%s: Used default PLL infos\r\n", __FUNCTION__);
+
 found:
 	/*
 	 * Some methods fail to retreive SCLK and MCLK values, we apply default
@@ -707,13 +734,15 @@ found:

 	dbg("%s: Reference=%d MHz (RefDiv=0x%x) Memory=%d MHz\r\n", __FUNCTION__,
 			rinfo->pll.ref_clk / 100, rinfo->pll.ref_div, rinfo->pll.mclk / 100);
-	dbg("%s: System=%d MHz PLL min %d, max %d\r\n", __FUNCTION__, rinfo->pll.sclk / 100, rinfo->pll.ppll_min, rinfo->pll.ppll_max);
+	dbg("%s: System=%d MHz PLL min %d, max %d\r\n", __FUNCTION__,
+			rinfo->pll.sclk / 100, rinfo->pll.ppll_min, rinfo->pll.ppll_max);
 }

 static int var_to_depth(const struct fb_var_screeninfo *var)
 {
 	if (var->bits_per_pixel != 16)
 		return var->bits_per_pixel;
+
 	return(var->green.length == 5) ? 15 : 16;
 }

@@ -723,6 +752,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 	struct fb_var_screeninfo v;
 	int nom, den;
 	uint32_t pitch;
+
 	dbg("%s:\r\n", __FUNCTION__);

 	/* clocks over 135 MHz have heat isues with DVI on RV100 */
@@ -742,9 +772,11 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 		case 0 ... 8:
 			v.bits_per_pixel = 8;
 			break;
+
 		case 9 ... 16:
 			v.bits_per_pixel = 16;
 			break;
+
 #if 0 /* Doesn't seem to work */
 		case 17 ... 24:
 			v.bits_per_pixel = 24;
@@ -753,6 +785,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 		case 25 ... 32:
 			v.bits_per_pixel = 32;
 			break;
+
 		default:
 			return -1; //-EINVAL;
 	}
@@ -765,6 +798,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 			v.red.length = v.green.length = v.blue.length = 8;
 			v.transp.offset = v.transp.length = 0;
 			break;
+
 		case 15:
 			nom = 2;
 			den = 1;
@@ -774,6 +808,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 			v.red.length = v.green.length = v.blue.length = 5;
 			v.transp.offset = v.transp.length = 0;
 			break;
+
 		case 16:
 			nom = 2;
 			den = 1;
@@ -785,6 +820,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 			v.blue.length = 5;
 			v.transp.offset = v.transp.length = 0;
 			break;                          
+
 		case 24:
 			nom = 4;
 			den = 1;
@@ -794,6 +830,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 			v.red.length = v.blue.length = v.green.length = 8;
 			v.transp.offset = v.transp.length = 0;
 			break;
+
 		case 32:
 			nom = 4;
 			den = 1;
@@ -804,6 +841,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 			v.transp.offset = 24;
 			v.transp.length = 8;
 			break;
+
    default:
 			dbg("radeonfb: mode %d x %d x %d rejected, color depth invalid\r\n ",
 					var->xres, var->yres, var->bits_per_pixel);
@@ -814,6 +852,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 		v.yres_virtual = v.yres;
 	if (v.xres_virtual < v.xres)
 		v.xres_virtual = v.xres;
+
 	/*
 	 * XXX I'm adjusting xres_virtual to the pitch, that may help XFree
 	 * with some panels, though I don't quite like this solution
@@ -848,6 +887,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 	dbg("%s: using mode %d x %d \r\n", __FUNCTION__, v.xres, v.yres);

 	memcpy(var, &v, sizeof(v));
+
 	return 0;
 }

@@ -857,16 +897,20 @@ int radeonfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 //	DPRINT("radeonfb: radeonfb_pan_display\r\n");
 	if ((var->xoffset + var->xres) > var->xres_virtual)
 		return -1; //-EINVAL;
+
 	if (((var->yoffset * var->xres_virtual) + var->xoffset) >=
 	 (rinfo->mapped_vram - (var->yres * var->xres * (var->bits_per_pixel / 8))))
 		return -1; //-EINVAL;
+
 	if (rinfo->asleep)
 		return 0;
+
 	radeon_wait_for_fifo(rinfo, 2);
 	rinfo->fb_offset = ((var->yoffset * var->xres_virtual + var->xoffset) * var->bits_per_pixel / 8) & ~7;
 	rinfo->dst_pitch_offset = (rinfo->pitch << 22) | ((rinfo->fb_local_base + rinfo->fb_offset) >> 10);
 	OUTREG(CRTC_OFFSET, rinfo->fb_offset);
-  return 0;
+
+	return 0;
 }

 short mirror;
@@ -876,6 +920,7 @@ int radeonfb_ioctl(unsigned int cmd, unsigned long arg, struct fb_info *info)
 	struct radeonfb_info *rinfo = info->par;
 	uint32_t tmp;
 	uint32_t value = 0;
+
 	switch(cmd)
 	{
 		/*
@@ -899,6 +944,7 @@ int radeonfb_ioctl(unsigned int cmd, unsigned long arg, struct fb_info *info)
 				tmp &= ~(LVDS_ON | LVDS_BLON);
 			}
 			OUTREG(LVDS_GEN_CNTL, tmp);
+
 			if (value & 0x02)
 			{
 				tmp = INREG(CRTC_EXT_CNTL);
@@ -913,6 +959,7 @@ int radeonfb_ioctl(unsigned int cmd, unsigned long arg, struct fb_info *info)
 			}
 			OUTREG(CRTC_EXT_CNTL, tmp);
 			return 0;
+
 		case FBIO_RADEON_GET_MIRROR:
 			if (!rinfo->is_mobility)
 				return -1; //-EINVAL;
@@ -923,6 +970,7 @@ int radeonfb_ioctl(unsigned int cmd, unsigned long arg, struct fb_info *info)
 			if (CRTC_CRT_ON & tmp)
 				value |= 0x02;
 			return 0;
+
 		default:
 			return -1; //-EINVAL;
 	}
@@ -937,24 +985,30 @@ int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t

 	if (rinfo->lock_blank)
 		return 0;
+
 	dbg("radeonfb: radeon_screen_blank\r\n");
 	radeon_engine_idle();
 	val = INREG(CRTC_EXT_CNTL);
 	val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | CRTC_VSYNC_DIS);
+
 	switch(blank)
 	{
 		case FB_BLANK_VSYNC_SUSPEND:
 			val |= (CRTC_DISPLAY_DIS | CRTC_VSYNC_DIS);
 			break;
+
 		case FB_BLANK_HSYNC_SUSPEND:
 			val |= (CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS);
 			break;
+
 		case FB_BLANK_POWERDOWN:
 			val |= (CRTC_DISPLAY_DIS | CRTC_VSYNC_DIS | CRTC_HSYNC_DIS);
 			break;
+
 		case FB_BLANK_NORMAL:
 			val |= CRTC_DISPLAY_DIS;
 			break;
+
 		case FB_BLANK_UNBLANK:
 		default:
 			unblank = 1;
@@ -974,6 +1028,7 @@ int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t
 				OUTREGP(FP_GEN_CNTL, 0, ~(FP_FPON | FP_TMDS_EN));
 			}
 			break;
+
 		case MT_LCD:
 			rinfo->lvds_timer = 0;
 			val = INREG(LVDS_GEN_CNTL);
@@ -1007,15 +1062,19 @@ int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t
 				/* We don't do a full switch-off on a simple mode switch */
 				if (mode_switch || blank == FB_BLANK_NORMAL)
 					break;
+
 				/* Asic bug, when turning off LVDS_ON, we have to make sure
 				 * RADEON_PIXCLK_LVDS_ALWAYS_ON bit is off
 				 */
 				tmp_pix_clks = INPLL(PIXCLKS_CNTL);
 				if (rinfo->is_mobility || rinfo->is_IGP)
 					OUTPLLP(PIXCLKS_CNTL, 0, ~PIXCLK_LVDS_ALWAYS_ONb);
+
 				val &= ~(LVDS_BL_MOD_EN);
 				OUTREG(LVDS_GEN_CNTL, val);
+
 				wait(100);
+
 				val &= ~(LVDS_ON | LVDS_EN);
 				OUTREG(LVDS_GEN_CNTL, val);
 				val &= ~LVDS_DIGON;
@@ -1023,6 +1082,7 @@ int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t
 				rinfo->lvds_timer = (int32_t)rinfo->panel_info.pwr_delay;
 				rinfo->init_state.lvds_gen_cntl &= ~LVDS_STATE_MASK;
 				rinfo->init_state.lvds_gen_cntl |= val & LVDS_STATE_MASK;
+
 				if (rinfo->is_mobility || rinfo->is_IGP)
 					OUTPLL(PIXCLKS_CNTL, tmp_pix_clks);
 			}
@@ -1039,8 +1099,10 @@ int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t
 int radeonfb_blank(int blank, struct fb_info *info)
 {
 	struct radeonfb_info *rinfo = info->par;
+
 	if (rinfo->asleep)
 		return 0;
+
 	return radeon_screen_blank(rinfo, blank, 0);
 }

@@ -1049,14 +1111,18 @@ static int radeon_setcolreg(unsigned regno, unsigned red, unsigned green,
 {
 	struct radeonfb_info *rinfo = info->par;
 	uint32_t pindex;
+
 	if (regno > 255)
 		return 1;
+
 	red >>= 8;
 	green >>= 8;
 	blue >>= 8;
+
 	rinfo->palette[regno].red = red;
 	rinfo->palette[regno].green = green;
 	rinfo->palette[regno].blue = blue;
+
 	/* default */
 	pindex = regno;
 	if (!rinfo->asleep)
@@ -1069,7 +1135,9 @@ static int radeon_setcolreg(unsigned regno, unsigned red, unsigned green,
 				return 1;
 			if (rinfo->depth == 15 && regno > 31)
 				return 1;
-			/* For 565, the green component is mixed one order
+
+			/*
+			 * For 565, the green component is mixed one order
 			 * below
 			 */
 			if (rinfo->depth == 16)
@@ -1095,6 +1163,7 @@ int radeonfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 	struct radeonfb_info *rinfo = info->par;
 	uint32_t dac_cntl2, vclk_cntl = 0;
 	int rc;
+
 	if (!rinfo->asleep)
 	{
 		if (rinfo->is_mobility)
@@ -1102,6 +1171,7 @@ int radeonfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 			vclk_cntl = INPLL(VCLK_ECP_CNTL);
 			OUTPLL(VCLK_ECP_CNTL, vclk_cntl & ~PIXCLK_DAC_ALWAYS_ONb);
 		}
+
 		/* Make sure we are on first palette */
 		if (rinfo->has_CRTC2)
 		{
@@ -1113,6 +1183,7 @@ int radeonfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 	rc = radeon_setcolreg(regno, red, green, blue, transp, info);
 	if (!rinfo->asleep && rinfo->is_mobility)
 		OUTPLL(VCLK_ECP_CNTL, vclk_cntl);
+
 	return rc;
 }

@@ -1129,6 +1200,7 @@ static void radeon_save_state(struct radeonfb_info *rinfo, struct radeon_regs *s
 	save->crtc_v_sync_strt_wid = INREG(CRTC_V_SYNC_STRT_WID);
 	save->crtc_pitch = INREG(CRTC_PITCH);
 	save->surface_cntl = INREG(SURFACE_CNTL);
+
 	/* FP regs */
 	save->fp_crtc_h_total_disp = INREG(FP_CRTC_H_TOTAL_DISP);
 	save->fp_crtc_v_total_disp = INREG(FP_CRTC_V_TOTAL_DISP);
@@ -1143,6 +1215,7 @@ static void radeon_save_state(struct radeonfb_info *rinfo, struct radeon_regs *s
 	save->tmds_transmitter_cntl = INREG(TMDS_TRANSMITTER_CNTL);
 	save->vclk_ecp_cntl = INPLL(VCLK_ECP_CNTL);
 	/* PLL regs */
+
 	save->clk_cntl_index = INREG(CLOCK_CNTL_INDEX) & ~0x3f;
 	radeon_pll_errata_after_index(rinfo);
 	save->ppll_div_3 = INPLL(PPLL_DIV_3);
@@ -1152,8 +1225,10 @@ static void radeon_save_state(struct radeonfb_info *rinfo, struct radeon_regs *s
 static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *mode)
 {
 	int i;
+
 	dbg("radeonfb: radeon_write_pll_regs\r\n");
 	radeon_wait_for_fifo(rinfo, 20);
+
 #if 0
 	/* Workaround from XFree */
 	if (rinfo->is_mobility)
@@ -1180,22 +1255,27 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
 		}
 	}
 #endif
+
 	/* Swich VCKL clock input to CPUCLK so it stays fed while PPLL updates*/
 	OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_CPUCLK, ~VCLK_SRC_SEL_MASK);
+
 	/* Reset PPLL & enable atomic update */
 	OUTPLLP(PPLL_CNTL, PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN,
 	 ~(PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN));
+
 	/* Switch to selected PPLL divider */
 	OUTREGP(CLOCK_CNTL_INDEX,	mode->clk_cntl_index & PPLL_DIV_SEL_MASK, ~PPLL_DIV_SEL_MASK);
 	radeon_pll_errata_after_index(rinfo);
 	radeon_pll_errata_after_data(rinfo);
+
 	/* Set PPLL ref. div */
 	if (rinfo->family == CHIP_FAMILY_R300 || rinfo->family == CHIP_FAMILY_RS300
 	 || rinfo->family == CHIP_FAMILY_R350 || rinfo->family == CHIP_FAMILY_RV350)
 	{
 		if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK)
 		{
-			/* When restoring console mode, use saved PPLL_REF_DIV
+			/*
+			 * When restoring console mode, use saved PPLL_REF_DIV
 			 * setting.
 			 */
 			OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, 0);
@@ -1216,17 +1296,22 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
 	/* Write update */
 	while (INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R);
 	OUTPLLP(PPLL_REF_DIV, PPLL_ATOMIC_UPDATE_W, ~PPLL_ATOMIC_UPDATE_W);
+
 	/* Wait read update complete */
 	/* FIXME: Certain revisions of R300 can't recover here.  Not sure of
 	   the cause yet, but this workaround will mask the problem for now.
 	   Other chips usually will pass at the very first test, so the
 	   workaround shouldn't have any effect on them. */
-	for(i = 0; (i < 10000 && INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R); i++);
+
+	for (i = 0; (i < 10000 && INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R); i++);
 	OUTPLL(HTOTAL_CNTL, 0);
+
 	/* Clear reset & atomic update */
 	OUTPLLP(PPLL_CNTL, 0, ~(PPLL_RESET | PPLL_SLEEP | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN));
+
 	/* We may want some locking ... oh well */
 	radeon_msleep(5);
+
 	/* Switch back VCLK source to PPLL */
 	OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_PPLLCLK, ~VCLK_SRC_SEL_MASK);
 }
@@ -1248,6 +1333,7 @@ static void radeon_timer_func(void)

 #ifdef FIXME_LATER
 	static int32_t start_timer;
+
 	/* delayed LVDS panel power up/down */
 	if (rinfo->lvds_timer)
 	{
@@ -1263,10 +1349,11 @@ static void radeon_timer_func(void)
 	}
 	else
 		start_timer = 0;
-#endif
+#endif /* FIXME_LATER */

 	if (rinfo->RenderCallback != NULL)
 		rinfo->RenderCallback(rinfo);
+
 	if ((info->screen_mono != NULL) && info->update_mono)
 	{
 		int32_t foreground = 255, background = 0;
@@ -1275,21 +1362,25 @@ static void radeon_timer_func(void)
 		int dst_x = 0;
 		int w = (int)info->var.xres_virtual;
 		int h = (int)info->var.yres_virtual;
+
 //		info->fbops->SetClippingRectangle(info,0,0,w-1,h-1);
 		src_buf = (uint8_t*)((int32_t)src_buf & ~3);
 		dst_x -= (int32_t)skipleft;
 		w += (int32_t)skipleft;
 		info->fbops->SetupForScanlineCPUToScreenColorExpandFill(info,(int)foreground,(int)background,3,0xffffffff);
 		info->fbops->SubsequentScanlineCPUToScreenColorExpandFill(info,(int)dst_x,0,w,h,skipleft);
+
 		while (--h >= 0)
 		{
 			info->fbops->SubsequentScanline(info, (unsigned long *) src_buf);
 			src_buf += (info->var.xres_virtual >> 3);
 		}
+
 //		info->fbops->DisableClipping(info);
 		if (info->update_mono > 0)
 			info->update_mono = 0;
 	}
+
 	if ((info->var.xres_virtual != info->var.xres)
 	 || (info->var.yres_virtual != info->var.yres))
 	{
@@ -1310,6 +1401,7 @@ static void radeon_timer_func(void)
 			x -= 8;
 			chg = 1;
 		}
+
 		if (((y + info->var.yres) < info->var.yres_virtual) && (rinfo->cursor_y >= (info->var.yres - 8)))
 		{
 			y += 8;
@@ -1329,7 +1421,9 @@ static void radeon_timer_func(void)
 			disp = rinfo->cursor_show;
 			if (disp)
 				info->fbops->HideCursor(info);
+
 			fb_pan_display(info,&var);
+
 			if (disp)
 				info->fbops->ShowCursor(info);
 		}
@@ -1345,14 +1439,19 @@ void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, in
 {
 	int i;
 	int primary_mon = PRIMARY_MONITOR(rinfo);
+
 	dbg("radeonfb: radeon_write_mode\r\n");
+
 	if (!regs_only)
 		radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0);
+
 	radeon_wait_for_fifo(rinfo, 31);
-	for(i=0; i<10; i++)
+
+	for (i = 0; i < 10; i++)
 		OUTREG(common_regs[i].reg, common_regs[i].val);
+
 	/* Apply surface registers */
-	for(i=0; i<8; i++)
+	for (i = 0; i < 8; i++)
 	{
 		OUTREG(SURFACE0_LOWER_BOUND + 0x10*i, mode->surf_lower_bound[i]);
 		OUTREG(SURFACE0_UPPER_BOUND + 0x10*i, mode->surf_upper_bound[i]);
@@ -1380,9 +1479,11 @@ void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, in
 	else
 #endif
 		OUTREG(CRTC_OFFSET_CNTL, 0);
+
 	OUTREG(CRTC_PITCH, mode->crtc_pitch);
 	OUTREG(SURFACE_CNTL, mode->surface_cntl);
 	radeon_write_pll_regs(rinfo, mode);
+
 	if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD))
 	{
 		radeon_wait_for_fifo(rinfo, 10);
@@ -1396,6 +1497,7 @@ void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, in
 		OUTREG(TMDS_CRC, mode->tmds_crc);
 		OUTREG(TMDS_TRANSMITTER_CNTL, mode->tmds_transmitter_cntl);
 	}
+
 	if (!regs_only)
 		radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0);
 	radeon_wait_for_fifo(rinfo, 2);
@@ -1407,11 +1509,13 @@ void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, in
 */
 static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *regs, uint32_t freq)
 {
-	static const struct {
+	static const struct
+	{
 		int divider;
 		int bitvalue;
 	} *post_div,
-	post_divs[] = {
+	post_divs[] =
+	{
 		{ 1,  0 },
 		{ 2,  1 },
 		{ 4,  2 },
@@ -1424,6 +1528,7 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
 	};
 	int fb_div, pll_output_freq = 0;
 	int uses_dvo = 0;
+
 	/* Check if the DVO port is enabled and sourced from the primary CRTC. I'm
 	 * not sure which model starts having FP2_GEN_CNTL, I assume anything more
 	 * recent than an r(v)100...
@@ -1443,9 +1548,11 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
 		uint32_t fp2_gen_cntl = INREG(FP2_GEN_CNTL);
 		uint32_t disp_output_cntl;
 		int source;
+
 		/* FP2 path not enabled */
 		if ((fp2_gen_cntl & FP2_ON) == 0)
 			break;
+
 		/* Not all chip revs have the same format for this register,
 		 * extract the source selection
 		 */
@@ -1464,9 +1571,11 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
 		}
 		else
 			source = (fp2_gen_cntl >> 13) & 0x1;
+
 		/* sourced from CRTC2 -> exit */
 		if (source == 1)
 			break;
+
 		/* so we end up on CRTC1, let's set uses_dvo to 1 now */
 		uses_dvo = 1;
 		break;
@@ -1476,27 +1585,32 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
 #endif
 	if (freq > rinfo->pll.ppll_max)
 		freq = rinfo->pll.ppll_max;
-	if (freq*12 < rinfo->pll.ppll_min)
+	if (freq * 12 < rinfo->pll.ppll_min)
 		freq = rinfo->pll.ppll_min / 12;
-	for(post_div = &post_divs[0]; post_div->divider; ++post_div)
+	for (post_div = &post_divs[0]; post_div->divider; ++post_div)
 	{
 		pll_output_freq = post_div->divider * freq;
-		/* If we output to the DVO port (external TMDS), we don't allow an
+
+		/*
+		 * If we output to the DVO port (external TMDS), we don't allow an
 		 * odd PLL divider as those aren't supported on this path
 		 */
 		if (uses_dvo && (post_div->divider & 1))
 			continue;
+
 		if (pll_output_freq >= rinfo->pll.ppll_min  &&
 		    pll_output_freq <= rinfo->pll.ppll_max)
 			break;
 	}
+
 	/* If we fall through the bottom, try the "default value"
 	   given by the terminal post_div->bitvalue */
-	if ( !post_div->divider )
+	if (!post_div->divider)
 	{
 		post_div = &post_divs[post_div->bitvalue];
 		pll_output_freq = post_div->divider * freq;
 	}
+
 	/* If we fall through the bottom, try the "default value"
 	   given by the terminal post_div->bitvalue */
 	if ( !post_div->divider )
@@ -1535,6 +1649,7 @@ int radeonfb_set_par(struct fb_info *info)
 	newmode = (struct radeon_regs *) driver_mem_alloc(sizeof(struct radeon_regs));
 	if (!newmode)
 		return -1; //-ENOMEM;
+
 	/* We always want engine to be idle on a mode switch, even
 	 * if we won't actually change the mode
 	 */
@@ -1582,24 +1697,29 @@ int radeonfb_set_par(struct fb_info *info)
 			newmode->ppll_ref_div = rinfo->panel_info.ref_divider;
 		}
 	}
+
 	dotClock = 1000000000 / pixClock;
 	freq = dotClock / 10; /* x100 */
 	hsync_wid = (hSyncEnd - hSyncStart) / 8;
+
 	if (hsync_wid == 0)
 		hsync_wid = 1;
 	else if (hsync_wid > 0x3f)	/* max */
 		hsync_wid = 0x3f;
+
 	if (mode->vmode & FB_VMODE_DOUBLE)
 	{
 		vSyncStart <<= 1;
 		vSyncEnd <<= 1;
 		vTotal <<= 1;
 	}
+
 	vsync_wid = vSyncEnd - vSyncStart;
 	if (vsync_wid == 0)
 		vsync_wid = 1;
 	else if (vsync_wid > 0x1f)	/* max */
 		vsync_wid = 0x1f;
+
 	// FIXME: this doesn't seem to be used anywhere hSyncPol = mode->sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
 	// FIXME: this doesn't seem to be used anywhere vSyncPol = mode->sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
 	// FIXME: this doesn't seem to be used anywhere cSync = mode->sync & FB_SYNC_COMP_HIGH_ACT ? (1 << 4) : 0;
@@ -1624,6 +1744,7 @@ int radeonfb_set_par(struct fb_info *info)
 	/* Clear auto-center etc... */
 	newmode->crtc_more_cntl = rinfo->init_state.crtc_more_cntl;
 	newmode->crtc_more_cntl &= 0xfffffff0;
+
 	if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD))
 	{
 		newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN;
@@ -1633,13 +1754,16 @@ int radeonfb_set_par(struct fb_info *info)
 	}
 	else
 		newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN | CRTC_CRT_ON;
+
 	newmode->dac_cntl = /* INREG(DAC_CNTL) | */ DAC_MASK_ALL | DAC_VGA_ADR_EN | DAC_8BIT_EN;
 	newmode->crtc_h_total_disp = ((((hTotal / 8) - 1) & 0x3ff) | (((mode->xres / 8) - 1) << 16));
 	newmode->crtc_h_sync_strt_wid = ((hsync_start & 0x1fff) | (hsync_wid << 16) | (h_sync_pol << 23));
+
 	if (mode->vmode & FB_VMODE_DOUBLE)
 		newmode->crtc_v_total_disp = ((vTotal - 1) & 0xffff) | (((mode->yres << 1) - 1) << 16);
 	else
 		newmode->crtc_v_total_disp = ((vTotal - 1) & 0xffff) | ((mode->yres - 1) << 16);
+
 	newmode->crtc_v_sync_strt_wid = (((vSyncStart - 1) & 0xfff) | (vsync_wid << 16) | (v_sync_pol << 23));
 	/* We first calculate the engine pitch */
 	rinfo->pitch = ((mode->xres_virtual * ((mode->bits_per_pixel + 1) / 8) + 0x3f) & ~(0x3f)) >> 6;
@@ -1653,6 +1777,7 @@ int radeonfb_set_par(struct fb_info *info)
 	 * swapper as well, so we leave it unset now.
 	 */
 	newmode->surface_cntl = 0;
+
 	if (rinfo->big_endian)
 	{
 		/* Setup swapping on both apertures, though we currently
@@ -1674,12 +1799,13 @@ int radeonfb_set_par(struct fb_info *info)
 	}

 	/* Clear surface registers */
-	for(i = 0; i < 8; i++)
+	for (i = 0; i < 8; i++)
 	{
 		newmode->surf_lower_bound[i] = 0;
 		newmode->surf_upper_bound[i] = 0x1f;
 		newmode->surf_info[i] = 0;
 	}
+
 	rinfo->bpp = mode->bits_per_pixel;
 	rinfo->depth = depth;

@@ -1724,6 +1850,7 @@ int radeonfb_set_par(struct fb_info *info)
 		 & ~(FP_SEL_CRTC2 | FP_RMX_HVSYNC_CONTROL_EN | FP_DFP_SYNC_SEL | FP_CRT_SYNC_SEL
 		  | FP_CRTC_LOCK_8DOT | FP_USE_SHADOW_EN | FP_CRTC_USE_SHADOW_VEND | FP_CRT_SYNC_ALT));
 		newmode->fp_gen_cntl |= (FP_CRTC_DONT_SHADOW_VPAR | FP_CRTC_DONT_SHADOW_HEND | FP_PANEL_FORMAT);
+
 		if (IS_R300_VARIANT(rinfo) || (rinfo->family == CHIP_FAMILY_R200))
 		{
 			newmode->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
@@ -1734,10 +1861,12 @@ int radeonfb_set_par(struct fb_info *info)
 		}
 		else
 			newmode->fp_gen_cntl |= FP_SEL_CRTC1;
+
 		newmode->lvds_gen_cntl = rinfo->init_state.lvds_gen_cntl;
 		newmode->lvds_pll_cntl = rinfo->init_state.lvds_pll_cntl;
 		newmode->tmds_crc = rinfo->init_state.tmds_crc;
 		newmode->tmds_transmitter_cntl = rinfo->init_state.tmds_transmitter_cntl;
+
 		if (primary_mon == MT_LCD)
 		{
 			newmode->lvds_gen_cntl |= (LVDS_ON | LVDS_BLON);
@@ -1755,11 +1884,13 @@ int radeonfb_set_par(struct fb_info *info)
 				newmode->tmds_transmitter_cntl |= TMDS_PLL_EN;
 			newmode->crtc_ext_cntl &= ~CRTC_CRT_ON;
 		}
+
 		newmode->fp_crtc_h_total_disp = (((rinfo->panel_info.hblank / 8) & 0x3ff) | (((mode->xres / 8) - 1) << 16));
 		newmode->fp_crtc_v_total_disp = (rinfo->panel_info.vblank & 0xffff) | ((mode->yres - 1) << 16);
 		newmode->fp_h_sync_strt_wid = ((rinfo->panel_info.hOver_plus & 0x1fff) | (hsync_wid << 16) | (h_sync_pol << 23));
 		newmode->fp_v_sync_strt_wid = ((rinfo->panel_info.vOver_plus & 0xfff) | (vsync_wid << 16) | (v_sync_pol  << 23));
 	}
+
 	/* do it! */
 	if (!rinfo->asleep)
 	{
@@ -1778,10 +1909,12 @@ int radeonfb_set_par(struct fb_info *info)
 		/* (re)initialize the engine */
 		radeon_engine_init(rinfo);
 	}
+
 	/* Update fix */
 	info->fix.line_length = rinfo->pitch*64;
 	info->fix.visual = rinfo->depth == 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
 	driver_mem_free(newmode);
+
 	return 0;
 }

--- a/radeon/radeon_cursor.c
+++ b/radeon/radeon_cursor.c
@@ -44,11 +44,13 @@
 *
 */

+#include "bas_types.h"
+#include "bas_printf.h"
 #include "radeonfb.h"

 #define DBG_RADEON
 #ifdef DBG_RADEON
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_RADEON */
@@ -66,20 +68,20 @@
 #define CURSOR_SWAPPING_DECL_MMIO
 #define CURSOR_SWAPPING_DECL	    unsigned long  __surface_cntl=0;
 #define CURSOR_SWAPPING_START() \
-	if(rinfo->big_endian) \
+    if (rinfo->big_endian) \
    OUTREG(SURFACE_CNTL, \
 	   ((__surface_cntl = INREG(SURFACE_CNTL)) | \
 	    NONSURF_AP0_SWP_32BPP) & \
 	   ~NONSURF_AP0_SWP_16BPP);
 #define CURSOR_SWAPPING_END() \
-	if(rinfo->big_endian) \
+    if (rinfo->big_endian) \
 	(OUTREG(SURFACE_CNTL, __surface_cntl));

 /* Set cursor foreground and background colors */
 void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
 {
 	struct radeonfb_info *rinfo = info->par;
-	unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base+rinfo->cursor_start);
+    unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base + rinfo->cursor_start);
 	int pixel, i;
 	CURSOR_SWAPPING_DECL_MMIO
 	CURSOR_SWAPPING_DECL
@@ -88,15 +90,17 @@ void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
 	fg |= 0xff000000;
 	bg |= 0xff000000;
 	/* Don't recolour the image if we don't have to. */
-	if(fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
+    if (fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
 		return;
 	CURSOR_SWAPPING_START();
-	/* Note: We assume that the pixels are either fully opaque or fully
+
+    /*
+     * Note: We assume that the pixels are either fully opaque or fully
 	 * transparent, so we won't premultiply them, and we can just
 	 * check for non-zero pixel values; those are either fg or bg
 	 */
-	for(i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
-		if((pixel = *pixels))
+    for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
+        if ((pixel = *pixels))
 			*pixels = (pixel == rinfo->cursor_fg) ? fg : bg;
 	CURSOR_SWAPPING_END();
 	rinfo->cursor_fg = fg;
@@ -112,27 +116,30 @@ void radeon_set_cursor_position(struct fb_info *info, int x, int y)
 	struct fb_var_screeninfo *mode = &info->var;
 	int xorigin = 0;
 	int yorigin = 0;
-	if(mode->vmode & FB_VMODE_DOUBLE)
+    if (mode->vmode & FB_VMODE_DOUBLE)
 		y <<= 1;
-	if(x < 0)
+    if (x < 0)
 		xorigin = 1 - x;
-	if(y < 0)
+    if (y < 0)
 	  yorigin = 1 - y;
+
 //	DPRINTVALHEX("radeonfb: RADEONSetCursorPosition: cursor_start ",rinfo->cursor_start);
 //	DPRINTVAL(" x ",x);
 //	DPRINTVAL(" y ",y);
 //	DPRINT("\r\n");
+
 	OUTREG(CUR_HORZ_VERT_OFF, (CUR_LOCK  | (xorigin << 16) | yorigin));
 	OUTREG(CUR_HORZ_VERT_POSN, (CUR_LOCK | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y)));
 	OUTREG(CUR_OFFSET, rinfo->cursor_start + yorigin * 256);
 	rinfo->cursor_x = (unsigned long)x;
-	if(mode->vmode & FB_VMODE_DOUBLE)
-		rinfo->cursor_y = (unsigned long)y >> 1;
+    if (mode->vmode & FB_VMODE_DOUBLE)
+        rinfo->cursor_y = (unsigned long) y >> 1;
 	else
-		rinfo->cursor_y = (unsigned long)y;
+        rinfo->cursor_y = (unsigned long) y;
 }

-/* Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
+/*
+ * Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
 * will be called after this, so we can ignore xorigin and yorigin.
 */
 void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom)
@@ -143,11 +150,14 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 	unsigned short chunk, mchunk;
 	unsigned long i, j, k;
 	CURSOR_SWAPPING_DECL
+
 //	DPRINTVALHEX("radeonfb: RADEONLoadCursorImage: cursor_start ",rinfo->cursor_start);
-//	DPRINT("\r\n");	
+//	DPRINT("\r\n");
+
 	save = INREG(CRTC_GEN_CNTL) & ~(unsigned long) (3 << 20);
 	save |= (unsigned long) (2 << 20);
 	OUTREG(CRTC_GEN_CNTL, save & (unsigned long)~CRTC_CUR_EN);
+
 	/*
 	 * Convert the bitmap to ARGB32.
 	 */
@@ -157,22 +167,22 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 	{
 	case 1:
 	default:
-		for(i = 0; i < CURSOR_HEIGHT; i++)
+        for (i = 0; i < CURSOR_HEIGHT; i++)
 		{
-			if(i < 16)
+            if (i < 16)
 			{
 				mchunk = *mask++;
 				chunk = *data++;
 			}
 			else
 				mchunk = chunk = 0;
-			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
+            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
 			{
-				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-					if(mchunk & 0x8000)
+                    if (mchunk & 0x8000)
 					{
-						if(chunk & 0x8000)
+                        if (chunk & 0x8000)
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 						else
 							*d++ = 0xffffffff; /* White, fully opaque. */
@@ -184,13 +194,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 		}
 		break;
 	case 2:
-		for(i = 0; i < CURSOR_HEIGHT; i++)
+        for (i = 0; i < CURSOR_HEIGHT; i++)
 		{
-			if(i < 16*2)
+            if (i < 16*2)
 			{
 				mchunk = *mask;
 				chunk = *data;
-				if((i & 1) == 1)
+                if ((i & 1) == 1)
 				{
 					mask++;
 					data++;
@@ -198,13 +208,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 			}
 			else
 				mchunk = chunk = 0;
-			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
+            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
 			{
-				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-					if(mchunk & 0x8000)
+                    if (mchunk & 0x8000)
 					{
-						if(chunk & 0x8000)
+                        if (chunk & 0x8000)
 						{
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 							*d++ = 0xff000000; 
@@ -225,13 +235,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 		}
 		break;
 	case 4:
-		for(i = 0; i < CURSOR_HEIGHT; i++)
+        for (i = 0; i < CURSOR_HEIGHT; i++)
 		{
-			if(i < 16*4)
+            if (i < 16 * 4)
 			{
 				mchunk = *mask;
 				chunk = *data;
-				if((i & 3) == 3)
+                if ((i & 3) == 3)
 				{
 					mask++;
 					data++;
@@ -239,13 +249,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 			}
 			else
 				mchunk = chunk = 0;
-			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
+            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
 			{
-				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-					if(mchunk & 0x8000)
+                    if (mchunk & 0x8000)
 					{
-						if(chunk & 0x8000)
+                        if (chunk & 0x8000)
 						{
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 							*d++ = 0xff000000; 
@@ -282,6 +292,7 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 void radeon_hide_cursor(struct fb_info *info)
 {
 	struct radeonfb_info *rinfo = info->par;
+
 //	DPRINT("radeonfb: RADEONHideCursor\r\n");
 	OUTREGP(CRTC_GEN_CNTL, 0, ~CRTC_CUR_EN);
 	rinfo->cursor_show = 0;
@@ -291,6 +302,7 @@ void radeon_hide_cursor(struct fb_info *info)
 void radeon_show_cursor(struct fb_info *info)
 {
 	struct radeonfb_info *rinfo = info->par;
+
 //	DPRINT("radeonfb: RADEONShowCursor\r\n");
 	OUTREGP(CRTC_GEN_CNTL, CRTC_CUR_EN, ~CRTC_CUR_EN);
 	rinfo->cursor_show = 1;
@@ -303,9 +315,9 @@ long radeon_cursor_init(struct fb_info *info)
 	int size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
 	unsigned long fbarea = offscreen_alloc(rinfo->info, size_bytes + 256);

-	dbg("radeonfb: %s: fbarea: %p\r\n", __FUNCTION__, fbarea);
+    dbg("radeonfb: %s: fbarea: %p\r\n", fbarea);

-	if(!fbarea)
+    if (!fbarea)
 		rinfo->cursor_start = 0;
 	else
 	{
--- a/sys/BaS.c
+++ b/sys/BaS.c
@@ -48,6 +48,7 @@
 #include "bootp.h"
 #include "interrupts.h"
 #include "exceptions.h"
+#include "net_timer.h"

 //#define BAS_DEBUG
 #if defined(BAS_DEBUG)
@@ -95,20 +96,20 @@ static inline bool pic_rxready(void)

 void write_pic_byte(uint8_t value)
 {
-    /* Wait until the transmitter is ready or 1000us are passed */
+	/* Wait until the transmitter is ready or 1000us are passed */
 	waitfor(1000, pic_txready);

-    /* Transmit the byte */
-    *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT) = value; // Really 8-bit
+	/* Transmit the byte */
+	*(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT) = value; // Really 8-bit
 }

 uint8_t read_pic_byte(void)
 {
-    /* Wait until a byte has been received or 1000us are passed */
+	/* Wait until a byte has been received or 1000us are passed */
 	waitfor(1000, pic_rxready);

-    /* Return the received byte */
-    return *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT); // Really 8-bit
+	/* Return the received byte */
+	return *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT); // Really 8-bit
 }

 void pic_init(void)
@@ -251,7 +252,7 @@ static ARP_INFO	arp_info;

 void network_init(void)
 {
-	uint8_t mac[6] = {0x00, 0xcf, 0x54, 0x12, 0x34, 0x56};
+	uint8_t mac[6] = {0x00, 0xcf, 0x54, 0x85, 0xcf, 0x01};	/* this is the original MAC address dbug assigns */
 	uint8_t bc[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; /* this is our broadcast MAC address */
 	IP_ADDR myip = {192, 168, 1, 100};
 	IP_ADDR gateway = {192, 168, 1, 1};
@@ -264,19 +265,19 @@ void network_init(void)

 	isr_init();		/* need to call that explicitely, otherwise isr table might be full */

-	if (!isr_register_handler(ISR_DBUG_ISR, vector, handler, NULL, (void *) &nif1))
+	if (!isr_register_handler(vector, handler, NULL, (void *) &nif1))
 	{
 		dbg("%s: unable to register handler for vector %d\r\n", __FUNCTION__, vector);
 		return;
 	}

-    /*
-     * Register the DMA interrupt handler
-     */
-    handler = dma_interrupt_handler;
-    vector = 112;
+	/*
+	 * Register the DMA interrupt handler
+	 */
+	handler = dma_interrupt_handler;
+	vector = 112;

-    if (!isr_register_handler(ISR_DBUG_ISR, vector, handler, NULL,NULL))
+	if (!isr_register_handler(vector, handler, NULL,NULL))
 	{
 		dbg("%s: Error: Unable to register handler for vector %s\r\n", __FUNCTION__, vector);
 		return;
@@ -290,10 +291,10 @@ void network_init(void)
 	memcpy(nif1.hwa, mac, 6);
 	memcpy(nif1.broadcast, bc, 6);

-	dbg("%s: ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n", __FUNCTION__, 
+	dbg("%s: ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n", __FUNCTION__,
 				nif1.hwa[0], nif1.hwa[1], nif1.hwa[2],
 				nif1.hwa[3], nif1.hwa[4], nif1.hwa[5]);
-	
+
 	timer_init(TIMER_NETWORK, TMR_INTC_LVL, TMR_INTC_PRI);

 	arp_init(&arp_info);
@@ -345,16 +346,16 @@ void BaS(void)
 	MCF_MMU_MMUCR = MCF_MMU_MMUCR_EN;			/* MMU on */
 	NOP();										/* force pipeline sync */
 	xprintf("finished\r\n");
-	
+
 	#ifdef MACHINE_FIREBEE
 	xprintf("IDE reset: ");
 	/* IDE reset */
 	* (volatile uint8_t *) (0xffff8802 - 2) = 14;
 	* (volatile uint8_t *) (0xffff8802 - 0) = 0x80;
 	wait(1);
-	
+
 	* (volatile uint8_t *) (0xffff8802 - 0) = 0;
-	
+
 	xprintf("finished\r\n");
 	xprintf("enable video: ");
 	/*
@@ -383,22 +384,22 @@ void BaS(void)
 #ifdef _NOT_USED_
 	screen_init();

-	    /* experimental */
-    {
-        int i;
-        uint32_t *scradr = 0xd00000;
+		/* experimental */
+	{
+		int i;
+		uint32_t *scradr = 0xd00000;

-        for (i = 0; i < 100; i++)
-        {
-            uint32_t *p = scradr;
-
-            for (p = scradr; p < scradr + 1024 * 150L; p++)
-            {
-				*p = 0xffffffff;
-		    }
+		for (i = 0; i < 100; i++)
+		{
+			uint32_t *p = scradr;

 			for (p = scradr; p < scradr + 1024 * 150L; p++)
-		    {
+			{
+				*p = 0xffffffff;
+			}
+
+			for (p = scradr; p < scradr + 1024 * 150L; p++)
+			{
 				*p = 0x0;
 			}
 		}
@@ -441,10 +442,11 @@ void BaS(void)

 	/* Jump into the OS */
 	typedef void void_func(void);
-	typedef struct {
+	struct rom_header
+	{
 		void *initial_sp;
 		void_func *initial_pc;
-	} ROM_HEADER;
+	};

 	xprintf("BaS initialization finished, enable interrupts\r\n");
 	enable_coldfire_interrupts();
@@ -453,6 +455,6 @@ void BaS(void)
 	network_init();

 	xprintf("call EmuTOS\r\n");
-	ROM_HEADER* os_header = (ROM_HEADER*)TOS;
+	struct rom_header *os_header = (struct rom_header *) TOS;
 	os_header->initial_pc();
 }
--- a/sys/cache.c
+++ b/sys/cache.c
@@ -44,24 +44,24 @@ uint32_t cacr_get(void)

 void flush_and_invalidate_caches(void)
 {
-	__asm__ (
-	"	clr.l		d0\n\t"
-	"	clr.l		d1\n\t"
-	"	move.l		d0,a0\n\t"
-	"cfa_setloop:\n\t"
-	"	cpushl		bc,(a0)				| flush\n\t"
-	"	lea			0x10(a0),a0			| index+1\n\t"
-	"	addq.l		#1,d1				| index+1\n\t"
-	"	cmpi.w		#512,d1				| all sets?\n\t"
-	"	bne.s		cfa_setloop			| no->\n\t"
-	"	clr.l		d1\n\t"
-	"	addq.l		#1,d0\n\t"
-	"	move.l		d0,a0\n\t"
-	"	cmpi.w		#4,d0				| all ways?\n\t"
-	"	bne.s		cfa_setloop			| no->\n\t"
-	/* input */	:
-	/* output */	:
-	/* clobber */	: "d0", "d1", "a0"
+    __asm__ __volatile__(
+            "	clr.l		d0                  \n\t"
+            "	clr.l		d1                  \n\t"
+            "	move.l		d0,a0               \n\t"
+            "cfa_setloop:                       \n\t"
+            "	cpushl		bc,(a0)				| flush\n\t"
+            "	lea			0x10(a0),a0			| index+1\n\t"
+            "	addq.l		#1,d1				| index+1\n\t"
+            "	cmpi.w		#512,d1				| all sets?\n\t"
+            "	bne.s		cfa_setloop			| no->\n\t"
+            "	clr.l		d1                  \n\t"
+            "	addq.l		#1,d0               \n\t"
+            "	move.l		d0,a0               \n\t"
+            "	cmpi.w		#4,d0				| all ways?\n\t"
+            "	bne.s		cfa_setloop			| no->\n\t"
+            /* input */	:
+            /* output */	:
+            /* clobber */	: "d0", "d1", "a0"
 	);
 }

@@ -81,25 +81,35 @@ void flush_icache_range(void *address, size_t size)
 	if (start_set > end_set) {
 		/* from the begining to the lowest address */
 		for (set = 0; set <= end_set; set += (0x10 - 3)) {
-			asm volatile("cpushl ic,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl ic,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl ic,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl ic,(%0)" : "=a" (set) : "a" (set));
+            __asm__ __volatile__(
+                        "       cpushl  ic,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  ic,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  ic,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  ic,(%[set])         \n\t"
+                 : /* output parameters  */
+                 : [set] "a" (set)    /* input parameters */
+                 :
+            );
 		}
 		/* next loop will finish the cache ie pass the hole */
 		end_set = LAST_ICACHE_ADDR;
 	}
 	for (set = start_set; set <= end_set; set += (0x10 - 3)) {
-		asm volatile("cpushl ic,(%0)\n\t"
-					"addq.l #1,%0\n\t"
-					"cpushl ic,(%0)\n\t"
-					"addq%.l #1,%0\n\t"
-					"cpushl ic,(%0)\n\t"
-					"addq.l #1,%0\n\t"
-					"cpushl ic,(%0)" : "=a" (set) : "a" (set));
+        __asm__ __volatile__(
+                    "       cpushl  ic,(%[set])             \n\t"
+                    "       addq.l  #1,%[set]               \n\t"
+                    "       cpushl  ic,(%[set])             \n\t"
+                    "       addq.l  #1,%[set]               \n\t"
+                    "       cpushl  ic,(%[set])             \n\t"
+                    "       addq.l  #1,%[set]               \n\t"
+                    "       cpushl  ic,(%[set])"
+                    : /* output parameters */
+                    : [set] "a" (set)
+                    :
+         );
 	}
 }

@@ -121,25 +131,37 @@ void flush_dcache_range(void *address, size_t size)

 	if (start_set > end_set) {
 		/* from the begining to the lowest address */
-		for (set = 0; set <= end_set; set += (0x10 - 3)) {
-			asm volatile("cpushl dc,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl dc,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl dc,(%0)\n\t"
-						"addq.l #1,%0\n\t"
-						"cpushl dc,(%0)" : "=a" (set) : "a" (set));
+        for (set = 0; set <= end_set; set += (0x10 - 3))
+        {
+            __asm__ __volatile__(
+                        "       cpushl  dc,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  dc,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  dc,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  dc,(%[set])         \n\t"
+                        : /* output parameters */
+                        : [set] "a" (set)
+                        : /* clobbered registers */
+            );
 		}
 		/* next loop will finish the cache ie pass the hole */
 		end_set = LAST_DCACHE_ADDR;
 	}
-	for (set = start_set; set <= end_set; set += (0x10 - 3)) {
-		asm volatile("cpushl dc,(%0)\n\t"
-					"addq.l #1,%0\n\t"
-					"cpushl dc,(%0)\n\t"
-					"addq%.l #1,%0\n\t"
-					"cpushl dc,(%0)\n\t"
-					"addq.l #1,%0\n\t"
-					"cpushl dc,(%0)" : "=a" (set) : "a" (set));
+    for (set = start_set; set <= end_set; set += (0x10 - 3))
+    {
+        __asm__ __volatile__(
+                    "       cpushl      dc,(%[set])     \n\t"
+                    "       addq.l      #1,%[set]       \n\t"
+                    "       cpushl      dc,(%[set])     \n\t"
+                    "       addq%.l     #1,%[set]       \n\t"
+                    "       cpushl      dc,(%[set])     \n\t"
+                    "       addq.l      #1,%[set]       \n\t"
+                    "       cpushl      dc,(%[set])     \n\t"
+                    : /* output parameters */
+                    : [set] "a" (set)
+                    : /* clobbered registers */
+        );
 	}
 }
--- a/sys/driver_mem.c
+++ b/sys/driver_mem.c
@@ -18,10 +18,14 @@
 #include "usb.h"
 #include "exceptions.h"		/* set_ipl() */

-#if MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
 #include "firebee.h"
-#elif MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
+#else
+#error "unknown machine!"
 #endif

 //#define DBG_DM
--- a/sys/exceptions.S
+++ b/sys/exceptions.S
--- a/sys/init_fpga.c
+++ b/sys/init_fpga.c
@@ -33,137 +33,151 @@
 #define FPGA_DATA0		(1 << 3)
 #define FPGA_CONF_DONE	(1 << 5)

-extern uint8_t _FPGA_FLASH_DATA[];
-#define FPGA_FLASH_DATA	&_FPGA_FLASH_DATA[0]
-extern uint8_t _FPGA_FLASH_DATA_SIZE[];
-#define FPGA_FLASH_DATA_SIZE	((uint32_t) &_FPGA_FLASH_DATA_SIZE[0])
+extern uint8_t _FPGA_CONFIG[];
+#define FPGA_FLASH_DATA	&_FPGA_CONFIG[0]
+extern uint8_t _FPGA_CONFIG_SIZE[];
+#define FPGA_FLASH_DATA_SIZE	((uint32_t) &_FPGA_CONFIG_SIZE[0])

+/*
+ * flag located in processor SRAM1 that indicates that the FPGA configuration has
+ * been loaded through the onboard JTAG interface.
+ * init_fpga() will honour this and not overwrite config.
+ */
+extern int32_t _FPGA_JTAG_LOADED;
+extern int32_t _FPGA_JTAG_VALID;
+#define VALID_JTAG 0xaffeaffe

-#ifdef _NOT_USED_
-void test_longword(void)
+void config_gpio_for_fpga_config(void)
 {
-	uint32_t *fpga_data = (uint32_t *) FPGA_FLASH_DATA;
-	const uint32_t *fpga_flash_data_end = (uint32_t *) FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE;
-	do
-	{
-		uint32_t value = *fpga_data++;
-		xprintf("LONGWORDS: addr=%p, value=%08x\r", fpga_data, value);
-	} while (fpga_data < fpga_flash_data_end);
-	xprintf("finished. \r\n");
+#if defined(MACHINE_FIREBEE)
+    /*
+     * Configure GPIO FEC1L port directions (needed to load FPGA configuration)
+     */
+    MCF_GPIO_PDDR_FEC1L = 0 |                   /* bit 7 = input */
+            0	|                               /* bit 6 = input */
+            0 |                                 /* bit 5 = input */
+            MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4 |   /* bit 4 = LED => output */
+            MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L3 |   /* bit 3 = PRG_DQ0 => output */
+            MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L2 |   /* bit 2 = FPGA_CONFIG => output */
+            MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L1 |   /* bit 1 = PRG_CLK (FPGA) => output */
+            0;                                  /* bit 0 => input */
+#endif /* MACHINE_FIREBEE */
 }

-void test_word(void)
+void config_gpio_for_jtag_config(void)
 {
-	uint16_t *fpga_data = (uint16_t *) FPGA_FLASH_DATA;
-	const uint16_t *fpga_flash_data_end = (uint16_t *) FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE;
-
-	do
-	{
-		uint16_t value = *fpga_data++;
-		xprintf("WORDS: addr=%p, value=%04x\r", fpga_data, value);
-	} while (fpga_data < fpga_flash_data_end);
-	xprintf("finished. \r\n");
+    /*
+     * configure FEC1L port directions to enable external JTAG configuration download to FPGA
+     */
+    MCF_GPIO_PDDR_FEC1L = 0 |
+            MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4;	/* bit 4 = LED => output */
+    /* all other bits = input */
+    /*
+     * unfortunately, the GPIO module cannot trigger interrupts. That means FPGA_CONFIG needs to be polled to detect
+     * external FPGA (re)configuration and reset the system in that case. Could be done from the OS as well...
+     */
 }

-void test_byte(void)
-{
-	uint8_t *fpga_data = (uint8_t *) FPGA_FLASH_DATA;
-	const uint8_t *fpga_flash_data_end = (uint8_t *) FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE;
-
-	do
-	{
-		uint8_t value = *fpga_data++;
-		xprintf("LONGWORDS: addr=%p, value=%08x\r", fpga_data, value);
-	} while (fpga_data < fpga_flash_data_end);
-	xprintf("finished. \r\n");
-}
-#endif /* _NOT_USED_ */
-
 /*
 * load FPGA
 */
-void init_fpga(void)
+bool init_fpga(void)
 {
-	uint8_t *fpga_data;
-	volatile int32_t time, start, end;
-	int i;
+    uint8_t *fpga_data;
+    volatile int32_t time, start, end;
+    int i;

-	xprintf("FPGA load config... ");
-	start = MCF_SLT0_SCNT; 
+    xprintf("FPGA load config...\r\n");
+    xprintf("_FPGA_JTAG_LOADED = %x, _FPGA_JTAG_VALID = %x)\r\n", _FPGA_JTAG_LOADED, _FPGA_JTAG_VALID);
+    if (_FPGA_JTAG_LOADED == 1 && _FPGA_JTAG_VALID == VALID_JTAG)
+    {
+        xprintf("detected _FPGA_JTAG_LOADED flag. Not overwriting FPGA config.\r\n");

-	MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;		/* FPGA clock => low */
+        /* reset the flag so that next boot will load config again from flash */
+        _FPGA_JTAG_LOADED = 0;
+        _FPGA_JTAG_VALID = 0;

-	/* pulling FPGA_CONFIG to low resets the FPGA */
-	MCF_GPIO_PODR_FEC1L &= ~FPGA_CONFIG;	/* FPGA config => low */
-	wait(10);			/* give it some time to do its reset stuff */
+        return true;
+    }
+    start = MCF_SLT0_SCNT;

-	while ((MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS) && (MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE));
+    config_gpio_for_fpga_config();
+    MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;                 /* FPGA clock => low */

-	MCF_GPIO_PODR_FEC1L |= FPGA_CONFIG;				/* pull FPGA_CONFIG high to start config cycle */
-	while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS));	/* wait until status becomes high */
+    /* pulling FPGA_CONFIG to low resets the FPGA */
+    MCF_GPIO_PODR_FEC1L &= ~FPGA_CONFIG;                /* FPGA config => low */
+    wait(10);                                           /* give it some time to do its reset stuff */

-	/*
-	 * excerpt from an Altera configuration manual:
-	 *
-	 * The low-to-high transition of nCONFIG on the FPGA begins the configuration cycle. The
-	 * configuration cycle consists of 3 stages<65>reset, configuration, and initialization.
-	 * While nCONFIG is low, the device is in reset. When the device comes out of reset,
-	 * nCONFIG must be at a logic high level in order for the device to release the open-drain
- 	 * nSTATUS pin. After nSTATUS is released, it is pulled high by a pull-up resistor and the FPGA
-	 * is ready to receive configuration data. Before and during configuration, all user I/O pins
-	 * are tri-stated. Stratix series, Arria series, and Cyclone series have weak pull-up resistors
-	 * on the I/O pins which are on, before and during configuration.
-	 *
-	 * To begin configuration, nCONFIG and nSTATUS must be at a logic high level. You can delay
-	 * configuration by holding the nCONFIG low. The device receives configuration data on its
-	 * DATA0 pins. Configuration data is latched into the FPGA on the rising edge of DCLK. After
-	 * the FPGA has received all configuration data successfully, it releases the CONF_DONE pin,
-	 * which is pulled high by a pull-up resistor. A low to high transition on CONF_DONE indicates
-	 * configuration is complete and initialization of the device can begin.
-	 */
+    while ((MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS) && (MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE));

-	const uint8_t *fpga_flash_data_end = FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE;
+    MCF_GPIO_PODR_FEC1L |= FPGA_CONFIG;                 /* pull FPGA_CONFIG high to start config cycle */
+    while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS))
+        ;                                               /* wait until status becomes high */

-	fpga_data = (uint8_t *) FPGA_FLASH_DATA;
-	do
-	{
-		uint8_t value = *fpga_data++;
-		for (i = 0; i < 8; i++, value >>= 1)
-		{
+    /*
+     * excerpt from an Altera configuration manual:
+     *
+     * The low-to-high transition of nCONFIG on the FPGA begins the configuration cycle. The
+     * configuration cycle consists of 3 stages<65>reset, configuration, and initialization.
+     * While nCONFIG is low, the device is in reset. When the device comes out of reset,
+     * nCONFIG must be at a logic high level in order for the device to release the open-drain
+     * nSTATUS pin. After nSTATUS is released, it is pulled high by a pull-up resistor and the FPGA
+     * is ready to receive configuration data. Before and during configuration, all user I/O pins
+     * are tri-stated. Stratix series, Arria series, and Cyclone series have weak pull-up resistors
+     * on the I/O pins which are on, before and during configuration.
+     *
+     * To begin configuration, nCONFIG and nSTATUS must be at a logic high level. You can delay
+     * configuration by holding the nCONFIG low. The device receives configuration data on its
+     * DATA0 pins. Configuration data is latched into the FPGA on the rising edge of DCLK. After
+     * the FPGA has received all configuration data successfully, it releases the CONF_DONE pin,
+     * which is pulled high by a pull-up resistor. A low to high transition on CONF_DONE indicates
+     * configuration is complete and initialization of the device can begin.
+     */

-			if (value & 1)
-			{
-				/* bit set -> toggle DATA0 to high */
-				MCF_GPIO_PODR_FEC1L |= FPGA_DATA0;
-			}
-			else
-			{
-				/* bit is cleared -> toggle DATA0 to low */
-				MCF_GPIO_PODR_FEC1L &= ~FPGA_DATA0;
-			}
-			/* toggle DCLK -> FPGA reads the bit */
-			MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
-			MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
-		}
-	} while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) && (fpga_data < fpga_flash_data_end));
+    const uint8_t *fpga_flash_data_end = FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE;

-	if (fpga_data < fpga_flash_data_end)
-	{
+    fpga_data = (uint8_t *) FPGA_FLASH_DATA;
+    do
+    {
+        uint8_t value = *fpga_data++;
+        for (i = 0; i < 8; i++, value >>= 1)
+        {
+
+            if (value & 1)
+            {
+                /* bit set -> toggle DATA0 to high */
+                MCF_GPIO_PODR_FEC1L |= FPGA_DATA0;
+            }
+            else
+            {
+                /* bit is cleared -> toggle DATA0 to low */
+                MCF_GPIO_PODR_FEC1L &= ~FPGA_DATA0;
+            }
+            /* toggle DCLK -> FPGA reads the bit */
+            MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
+            MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
+        }
+    } while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) && (fpga_data < fpga_flash_data_end));
+
+    if (fpga_data < fpga_flash_data_end)
+    {
 #ifdef _NOT_USED_
-		while (fpga_data++ < fpga_flash_data_end)
-		{
-			/* toggle a little more since it's fun ;) */
-			MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
-			MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
-		}
+        while (fpga_data++ < fpga_flash_data_end)
+        {
+            /* toggle a little more since it's fun ;) */
+            MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
+            MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
+        }
 #endif /* _NOT_USED_ */
-		end = MCF_SLT0_SCNT;
-		time = (start - end) / (SYSCLK / 1000) / 1000;
-		
-		xprintf("finished (took %f seconds).\r\n", time / 1000.0);
-	}
-	else
-	{
-		xprintf("FAILED!\r\n");
-	}
+        end = MCF_SLT0_SCNT;
+        time = (start - end) / (SYSCLK / 1000) / 1000;
+
+        xprintf("finished (took %f seconds).\r\n", time / 1000.0);
+        config_gpio_for_jtag_config();
+        return true;
+    }
+    xprintf("FAILED!\r\n");
+    config_gpio_for_jtag_config();
+
+    return false;
 }
--- a/sys/interrupts.c
+++ b/sys/interrupts.c
@@ -30,13 +30,16 @@
 #include "exceptions.h"
 #include "interrupts.h"
 #include "bas_printf.h"
+#include "startcf.h"
+#include "cache.h"
+#include "util.h"

 extern void (*rt_vbr[])(void);
 #define VBR	rt_vbr

 #define IRQ_DEBUG
 #if defined(IRQ_DEBUG)
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif
@@ -57,7 +60,7 @@ int register_interrupt_handler(uint8_t source, uint8_t level, uint8_t priority,

 	if (source < 1 || source > 63)
 	{
-		dbg("%s: interrupt source %d not defined\r\n", __FUNCTION__, source);
+		dbg("interrupt source %d not defined\r\n", source);
 		return -1;
 	}

@@ -68,7 +71,7 @@ int register_interrupt_handler(uint8_t source, uint8_t level, uint8_t priority,
 	{
 		if (ICR[i] == lp)
 		{
-			dbg("%s: level %d and priority %d already used for interrupt source %d!\r\n", __FUNCTION__,
+			dbg("level %d and priority %d already used for interrupt source %d!\r\n",
 					level, priority, i);
 			return -1;
 		}
@@ -88,31 +91,29 @@ int register_interrupt_handler(uint8_t source, uint8_t level, uint8_t priority,
 	return 0;
 }

-#ifndef UIF_MAX_ISR_ENTRY
-#define UIF_MAX_ISR_ENTRY   (20)
+#ifndef MAX_ISR_ENTRY
+#define MAX_ISR_ENTRY   (20)
 #endif


 typedef struct
 {
 	int     vector;
-	int     type;
 	int     (*handler)(void *, void *);
 	void    *hdev;
 	void    *harg;
 } ISRENTRY;

-ISRENTRY isrtab[UIF_MAX_ISR_ENTRY];
+ISRENTRY isrtab[MAX_ISR_ENTRY];


 void isr_init(void)
 {
 	int index;

-	for (index = 0; index < UIF_MAX_ISR_ENTRY; index++)
+	for (index = 0; index < MAX_ISR_ENTRY; index++)
 	{
 		isrtab[index].vector = 0;
-		isrtab[index].type = 0;
 		isrtab[index].handler = 0;
 		isrtab[index].hdev = 0;
 		isrtab[index].harg = 0;
@@ -120,41 +121,36 @@ void isr_init(void)
 }


-int isr_register_handler(int type, int vector, 
-		int (*handler)(void *, void *), void *hdev, void *harg)
+int isr_register_handler(int vector, int (*handler)(void *, void *), void *hdev, void *harg)
 {
 	/*
 	 * This function places an interrupt handler in the ISR table,
 	 * thereby registering it so that the low-level handler may call it.
 	 *
-	 * The two parameters are intended for the first arg to be a 
-	 * pointer to the device itself, and the second a pointer to a data 
+	 * The two parameters are intended for the first arg to be a
+	 * pointer to the device itself, and the second a pointer to a data
 	 * structure used by the device driver for that particular device.
 	 */
 	int index;

-	if ((vector == 0) || 
-			((type != ISR_DBUG_ISR) && (type != ISR_USER_ISR)) ||
-			(handler == NULL))
+	if ((vector == 0) || (handler == NULL))
 	{
-		dbg("%s: illegal type, vector or handler!\r\n", __FUNCTION__);
+		dbg("illegal vector or handler!\r\n");
 		return false;
 	}

-	for (index = 0; index < UIF_MAX_ISR_ENTRY; index++)
+	for (index = 0; index < MAX_ISR_ENTRY; index++)
 	{
-		if ((isrtab[index].vector == vector) &&
-				(isrtab[index].type == type))
+		if (isrtab[index].vector == vector)
 		{
-			/* only one entry of each type per vector */
-			dbg("%s: already set handler with this type and vector (%d, %d)\r\n", __FUNCTION__, type, vector);
+			/* one cross each, only! */
+			dbg("already set handler with this vector (%d, %d)\r\n", vector);
 			return false;
 		}

 		if (isrtab[index].vector == 0)
 		{
 			isrtab[index].vector = vector;
-			isrtab[index].type = type;
 			isrtab[index].handler = handler;
 			isrtab[index].hdev = hdev;
 			isrtab[index].harg = harg;
@@ -162,26 +158,24 @@ int isr_register_handler(int type, int vector,
 			return true;
 		}
 	}
-	dbg("%s: no available slots to register handler for vector %d\n\r", __FUNCTION__, vector);
+	dbg("no available slots to register handler for vector %d\n\r", vector);

 	return false;   /* no available slots */
 }

-void isr_remove_handler(int type, int (*handler)(void *, void *))
+void isr_remove_handler(int (*handler)(void *, void *))
 {
 	/*
 	 * This routine removes from the ISR table all
-	 * entries that matches 'type' and 'handler'.
+	 * entries that matches 'handler'.
 	 */
 	int index;

-	for (index = 0; index < UIF_MAX_ISR_ENTRY; index++)
+	for (index = 0; index < MAX_ISR_ENTRY; index++)
 	{
-		if ((isrtab[index].handler == handler) && 
-				(isrtab[index].type == type))
+		if (isrtab[index].handler == handler)
 		{
 			isrtab[index].vector = 0;
-			isrtab[index].type = 0;
 			isrtab[index].handler = 0;
 			isrtab[index].hdev = 0;
 			isrtab[index].harg = 0;
@@ -189,7 +183,7 @@ void isr_remove_handler(int type, int (*handler)(void *, void *))
 			return;
 		}
 	}
-	dbg("%s: no such handler registered (type=%d, handler=%p\r\n", __FUNCTION__, type, handler);
+	dbg("no such handler registered (handler=%p\r\n", handler);
 }


@@ -203,22 +197,216 @@ bool isr_execute_handler(int vector)
 	bool retval = false;

 	/*
-	 * First locate a BaS Interrupt Service Routine handler.
+	 * locate a BaS Interrupt Service Routine handler.
 	 */
-	for (index = 0; index < UIF_MAX_ISR_ENTRY; index++)
+	for (index = 0; index < MAX_ISR_ENTRY; index++)
 	{
-		if ((isrtab[index].vector == vector) &&
-				(isrtab[index].type == ISR_DBUG_ISR))
+		if (isrtab[index].vector == vector)
 		{
 			retval = true;
-		
+
 			if (isrtab[index].handler(isrtab[index].hdev, isrtab[index].harg))
 			{
 				return retval;
 			}
 		}
 	}
-	dbg("%s: no BaS isr handler for vector %d found\r\n", __FUNCTION__, vector);
+	dbg("no BaS isr handler for vector %d found\r\n", vector);
+
 	return retval;
 }

+/*
+ * PIC interrupt handler for Firebee
+ */
+void pic_interrupt_handler(void)
+{
+	uint8_t rcv_byte;
+
+	rcv_byte = MCF_PSC3_PSCRB_8BIT;
+	if (rcv_byte == 2)	// PIC requests RTC data
+	{
+		uint8_t *rtc_reg= (uint8_t *) 0xffff8961;
+		uint8_t *rtc_data = (uint8_t *) 0xffff8963;
+		int index = 0;
+
+		xprintf("PIC interrupt requesting RTC data\r\n");
+
+		MCF_PSC3_PSCTB_8BIT = 0x82;		// header byte to PIC
+		do
+		{
+			*rtc_reg = 0;
+			MCF_PSC3_PSCTB_8BIT = *rtc_data;
+		} while (index++ < 64);
+	}
+}
+
+extern int32_t video_sbt;
+extern int32_t video_tlb;
+
+void video_addr_timeout(void)
+{
+	uint32_t addr = 0x0L;
+	uint32_t *src;
+	uint32_t *dst;
+	uint32_t asid;
+
+	dbg("video address timeout\r\n");
+	flush_and_invalidate_caches();
+
+	do
+	{
+		uint32_t tlb;
+		uint32_t page_attr;
+
+		/*
+		 * search tlb entry id for addr (if not available, the MMU
+		 * will provide a new one based on its LRU algorithm)
+		 */
+		MCF_MMU_MMUAR = addr;
+		MCF_MMU_MMUOR =
+				MCF_MMU_MMUOR_STLB |
+				MCF_MMU_MMUOR_RW |
+				MCF_MMU_MMUOR_ACC;
+		NOP();
+		tlb = (MCF_MMU_MMUOR >> 16) & 0xffff;
+
+		/*
+		 * retrieve tlb entry with the found TLB entry id
+		 */
+		MCF_MMU_MMUAR = tlb;
+		MCF_MMU_MMUOR =
+				MCF_MMU_MMUOR_STLB |
+				MCF_MMU_MMUOR_ADR |
+				MCF_MMU_MMUOR_RW |
+				MCF_MMU_MMUOR_ACC;
+		NOP();
+
+		asid = (MCF_MMU_MMUTR >> 2) & 0x1fff;	/* fetch ASID of page */;
+		if (asid != sca_page_ID)                /* check if screen area */
+		{
+			addr += 0x100000;
+			continue;                           /* next page */
+		}
+
+		/* modify found TLB entry */
+		if (addr == 0x0)
+		{
+			page_attr =
+				MCF_MMU_MMUDR_LK |
+				MCF_MMU_MMUDR_SZ(0) |
+				MCF_MMU_MMUDR_CM(0) |
+				MCF_MMU_MMUDR_R |
+				MCF_MMU_MMUDR_W |
+				MCF_MMU_MMUDR_X;
+		}
+		else
+		{
+			page_attr =
+				MCF_MMU_MMUTR_SG |
+				MCF_MMU_MMUTR_V;
+		}
+
+
+		MCF_MMU_MMUTR = addr;
+		MCF_MMU_MMUDR = page_attr;
+		MCF_MMU_MMUOR =
+				MCF_MMU_MMUOR_STLB |
+				MCF_MMU_MMUOR_ADR |
+				MCF_MMU_MMUOR_ACC |
+				MCF_MMU_MMUOR_UAA;
+		NOP();
+
+		dst = (uint32_t *) 0x60000000 + addr;
+		src = (uint32_t *) addr;
+		while (dst < (uint32_t *) 0x60000000 + addr + 0x10000)
+		{
+			*dst++ = *src++;
+			*dst++ = *src++;
+			*dst++ = *src++;
+			*dst++ = *src++;
+		}
+
+
+
+		addr += 0x100000;
+	} while (addr < 0xd00000);
+	video_tlb = 0x2000;
+	video_sbt = 0;
+}
+
+
+/*
+ * blink the Firebee's LED to show we are still alive
+ */
+void blink_led(void)
+{
+	static uint16_t blinker = 0;
+
+	if ((blinker++ & 0x80) > 0)
+	{
+		MCF_GPIO_PODR_FEC1L |= (1 << 4);    /* LED off */
+	}
+	else
+	{
+		MCF_GPIO_PODR_FEC1L &= ~(1 << 4);   /* LED on */
+	}
+}
+
+/*
+ * Atari MFP interrupt registers.
+ *
+ * TODO: should go into a header file
+ */
+
+#define FALCON_MFP_IERA     *((volatile uint8_t *) 0xfffffa07)
+#define FALCON_MFP_IERB     *((volatile uint8_t *) 0xfffffa09)
+#define FALCON_MFP_IPRA     *((volatile uint8_t *) 0xfffffa0b)
+#define FALCON_MFP_IPRB     *((volatile uint8_t *) 0xfffffa0d)
+#define FALCON_MFP_IMRA     *((volatile uint8_t *) 0xfffffa13)
+#define FALCON_MFP_IMRB     *((volatile uint8_t *) 0xfffffa15)
+
+bool irq6_acsi_dma_interrupt(void)
+{
+	dbg("ACSI DMA interrupt\r\n");
+
+	/*
+	 * TODO: implement handler
+	 */
+
+	return false;
+}
+
+bool irq6_interrupt_handler(uint32_t sf1, uint32_t sf2)
+{
+	bool handled = false;
+
+	MCF_EPORT_EPFR |= (1 << 6);	/* clear int6 from edge port */
+
+	if (video_sbt != 0 && (video_sbt - 0x70000000) > MCF_SLT0_SCNT)
+	{
+		video_addr_timeout();
+		handled = true;
+	}
+
+	/*
+	 * check if ACSI DMA interrupt
+	 */
+
+	if (FALCON_MFP_IERA & (1 << 7))
+	{
+		/* ACSI interrupt is enabled */
+		if (FALCON_MFP_IPRA & (1 << 7))
+		{
+			irq6_acsi_dma_interrupt();
+			handled = true;
+		}
+	}
+
+	if (FALCON_MFP_IPRA || FALCON_MFP_IPRB)
+	{
+		blink_led();
+	}
+
+	return handled;
+}
--- a/sys/mmu.c
+++ b/sys/mmu.c
@@ -56,6 +56,8 @@
 #include "firebee.h"
 #elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
+#elif defined(MACHINE_M54455)
+#include "m54455.h"
 #else
 #error "unknown machine!"
 #endif /* MACHINE_FIREBEE */
@@ -80,7 +82,7 @@ inline uint32_t set_asid(uint32_t value)
 		"movec		%[value],ASID\n\t"
 		: /* no output */
 		: [value] "r" (value)
-		: 
+		:
 	);

 	rt_asid = value;
@@ -88,7 +90,7 @@ inline uint32_t set_asid(uint32_t value)
 	return ret;
 }

-							
+
 /*
 * set ACRx register
 * saves new value to rt_acrx and returns former value
@@ -97,7 +99,7 @@ inline uint32_t set_acr0(uint32_t value)
 {
 	extern uint32_t rt_acr0;
 	uint32_t ret = rt_acr0;
-	
+
 	__asm__ __volatile__(
 		"movec		%[value],ACR0\n\t"
 		: /* not output */
@@ -117,7 +119,7 @@ inline uint32_t set_acr1(uint32_t value)
 {
 	extern uint32_t rt_acr1;
 	uint32_t ret = rt_acr1;
-	
+
 	__asm__ __volatile__(
 		"movec		%[value],ACR1\n\t"
 		: /* not output */
@@ -138,7 +140,7 @@ inline uint32_t set_acr2(uint32_t value)
 {
 	extern uint32_t rt_acr2;
 	uint32_t ret = rt_acr2;
-	
+
 	__asm__ __volatile__(
 		"movec		%[value],ACR2\n\t"
 		: /* not output */
@@ -158,7 +160,7 @@ inline uint32_t set_acr3(uint32_t value)
 {
 	extern uint32_t rt_acr3;
 	uint32_t ret = rt_acr3;
-	
+
 	__asm__ __volatile__(
 		"movec		%[value],ACR3\n\t"
 		: /* not output */
@@ -193,7 +195,7 @@ void mmu_init(void)
 	uint32_t MMUBAR = (uint32_t) &_MMUBAR[0];
 	extern uint8_t _TOS[];
 	uint32_t TOS = (uint32_t) &_TOS[0];
-	
+
 	set_asid(0);			/* do not use address extension (ASID provides virtual 48 bit addresses */

 	/* set data access attributes in ACR0 and ACR1 */
@@ -203,29 +205,38 @@ void mmu_init(void)
 			ACR_AMM(0) |							/* control region > 16 MB */
 			ACR_S(ACR_S_ALL) |						/* match addresses in user and supervisor mode */
 			ACR_E(1) |								/* enable ACR */
-#if MACHINE_FIREBEE
-			ACR_ADMSK(0x3f) |						/* cover 1GB area from 0xc0000000 to 0xffffffff */
-			ACR_BA(0xc0000000));					/* (equals area from 3 to 4 GB */
-#elif MACHINE_M5484LITE
+#if defined(MACHINE_FIREBEE)
+			ACR_ADMSK(0x7f) |						/* cover 2GB area from 0x80000000 to 0xffffffff */
+			ACR_BA(0x80000000));					/* (equals area from 3 to 4 GB */
+#elif defined(MACHINE_M5484LITE)
 			ACR_ADMSK(0x7f) |						/* cover 2 GB area from 0x80000000 to 0xffffffff */
 			ACR_BA(0x80000000));
+#elif defined(MACHINE_M54455)
+			ACR_ADMSK(0x7f) |
+			ACR_BA(0x80000000));					/* FIXME: not determined yet */
+#else
+#error unknown machine!
 #endif /* MACHINE_FIREBEE */
-	
+
 	// set_acr1(0x601fc000);
 	set_acr1(ACR_W(0) |
 			ACR_SP(0) |
 			ACR_CM(0) |
-#if MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
 			ACR_CM(ACR_CM_CACHEABLE_WT) |			/* video RAM on the Firebee */
-#elif MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
 			ACR_CM(ACR_CM_CACHE_INH_PRECISE) |		/* Compact Flash on the M548xLITE */
+#elif defined(MACHINE_M54455)
+			ACR_CM(ACR_CM_CACHE_INH_PRECISE) |		/* FIXME: not determined yet */
+#else
+#error unknown machine!
 #endif /* MACHINE_FIREBEE */
 			ACR_AMM(0) |
 			ACR_S(ACR_S_ALL) |
 			ACR_E(1) |
 			ACR_ADMSK(0x1f) |
 			ACR_BA(0x60000000));
-	
+
 	/* set instruction access attributes in ACR2 and ACR3 */

 	//set_acr2(0xe007c400);
@@ -273,7 +284,7 @@ void mmu_init(void)
 	 * mapped to physical address 0x60d0'0000 (FPGA video memory)
 	 * video RAM: read write execute normal write true
 	 */
-	
+
 	MCF_MMU_MMUTR = 0x00d00000 |			/* virtual address */
 #if defined(MACHINE_FIREBEE)
 					MCF_MMU_MMUTR_ID(SCA_PAGE_ID) |
@@ -285,6 +296,10 @@ void mmu_init(void)
 	MCF_MMU_MMUDR = 0x60d00000 |			/* physical address */
 #elif defined(MACHINE_M5484LITE)
 	MCF_MMU_MMUDR = 0x00d00000 |			/* physical address */
+#elif defined(MACHINE_M54455)
+	MCF_MMU_MMUDR = 0x60d00000 |			/* FIXME: not determined yet */
+#else
+#error unknown machine!
 #endif /* MACHINE_FIREBEE */
 					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
 					MCF_MMU_MMUDR_CM(0x0) |	/* cachable writethrough */
@@ -370,7 +385,7 @@ void mmu_init(void)
 	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
 					MCF_MMU_MMUOR_ACC |     /* access TLB */
 					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
-					
+
 	/*
 	 * Map (locked) the very last MB of physical SDRAM (this is where the driver buffers reside) to the same
 	 * virtual address. Used uncached for drivers.
--- a/sys/startcf.S
+++ b/sys/startcf.S
@@ -1,3 +1,4 @@
+
 /*
 * This object file must be the first to be linked,
 * so it will be placed at the very beginning of the ROM.
@@ -49,7 +50,8 @@ _rom_entry:
 		lea 	__SUP_SP,a7
 		move.l	#0,(sp)

-		/* Initialize the processor caches.
+		/*
+		 * Initialize the processor caches.
 		 * The instruction cache is fully enabled.
 		 * The data cache is enabled, but cache-inhibited by default.
 		 * Later, the MMU will fully activate the data cache for specific areas.
--- a/sys/sysinit.c
+++ b/sys/sysinit.c
--- a/tos/jtagwait/Makefile
+++ b/tos/jtagwait/Makefile
@@ -0,0 +1,97 @@
+CROSS=Y
+
+CROSSBINDIR_IS_Y=m68k-atari-mint-
+CROSSBINDIR_IS_N=
+
+CROSSBINDIR=$(CROSSBINDIR_IS_$(CROSS))
+
+UNAME := $(shell uname)
+ifeq ($(CROSS), Y)
+ifeq ($(UNAME),Linux)
+PREFIX=m68k-atari-mint
+HATARI=hatari
+else
+PREFIX=m68k-atari-mint
+HATARI=/usr/local/bin/hatari
+endif
+else
+PREFIX=/usr
+endif
+
+DEPEND=depend
+TOPDIR = ../..
+
+INCLUDE=-I$(TOPDIR)/../libcmini/include -nostdlib
+LIBS=-lcmini -nostdlib -lgcc
+CC=$(PREFIX)/bin/gcc
+
+CC=$(CROSSBINDIR)gcc
+STRIP=$(CROSSBINDIR)strip
+STACK=$(CROSSBINDIR)stack
+
+APP=jtagwait.prg
+TEST_APP=$(APP)
+
+CFLAGS=\
+	-Os\
+	-g\
+	-Wl,-Map,mapfile\
+	-Wall
+	
+SRCDIR=sources
+INCDIR=include
+INCLUDE+=-I$(INCDIR)
+
+CSRCS=\
+	$(SRCDIR)/jtagwait.c
+ASRCS=
+
+COBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.c,%.o,$(CSRCS)))
+AOBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.S,%.o,$(ASRCS)))
+OBJS=$(COBJS) $(AOBJS)
+
+TRGTDIRS=./m5475 ./m5475/mshort
+OBJDIRS=$(patsubst %,%/objs,$(TRGTDIRS))
+
+#
+# multilib flags. These must match m68k-atari-mint-gcc -print-multi-lib output
+#
+m5475/$(APP):CFLAGS += -mcpu=5475
+m5475/mshort/$(APP): CFLAGS += -mcpu=5475 -mshort
+
+all:$(patsubst %,%/$(APP),$(TRGTDIRS))
+#
+# generate pattern rules for multilib object files.
+#
+define CC_TEMPLATE
+$(1)/objs/%.o:$(SRCDIR)/%.c
+	$(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@
+
+$(1)/objs/%.o:$(SRCDIR)/%.S
+	$(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@
+
+$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS))
+$(1)/$(APP): $$($(1)_OBJS)
+	$(CC) $$(CFLAGS) -o $$@ $(TOPDIR)/../libcmini/$(1)/startup.o $$($(1)_OBJS) -L$(TOPDIR)/../libcmini/$(1) $(LIBS)
+	$(STRIP) $$@
+endef
+$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR))))
+
+$(DEPEND): $(ASRCS) $(CSRCS)
+	-rm -f $(DEPEND)
+	for d in $(TRGTDIRS);\
+		do $(CC) $(CFLAGS) $(INCLUDE) -M $(ASRCS) $(CSRCS) | sed -e "s#^\(.*\).o:#$$d/objs/\1.o:#" >> $(DEPEND); \
+    done
+
+
+clean:
+	@rm -f $(patsubst %,%/objs/*.o,$(TRGTDIRS)) $(patsubst %,%/$(APP),$(TRGTDIRS))
+	@rm -f $(DEPEND) mapfile
+
+.PHONY: printvars
+printvars:
+	@$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
+	 
+ifneq (clean,$(MAKECMDGOALS))
+-include $(DEPEND)
+endif
--- a/tos/jtagwait/include/driver_vec.h
+++ b/tos/jtagwait/include/driver_vec.h
@@ -0,0 +1,125 @@
+/*
+ * driver_vec.h
+ *
+ * Interface for exposure of BaS drivers to the OS
+ *
+ * This file is part of BaS_gcc.
+ *
+ * BaS_gcc is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * BaS_gcc is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *  Created on: 24.10.2013
+ *      Author: Markus Fröschle
+ */
+
+#ifndef _DRIVER_VEC_H_
+#define _DRIVER_VEC_H_
+
+
+enum driver_type
+{
+	END_OF_DRIVERS,		/* marks end of driver list */
+	BLOCKDEV_DRIVER,
+	CHARDEV_DRIVER,
+	VIDEO_DRIVER,
+	XHDI_DRIVER,
+	MCD_DRIVER,
+};
+
+struct generic_driver_interface
+{
+	uint32_t (*init)(void);
+	uint32_t (*read)(void *buf, size_t count);
+	uint32_t (*write)(const void *buf, size_t count);
+	uint32_t (*ioctl)(uint32_t request, ...);
+};
+
+
+/* Chained buffer descriptor */
+typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
+struct MCD_bufDesc_struct {
+	uint32_t flags;         /* flags describing the DMA */
+    uint32_t csumResult;    /* checksum from checksumming performed since last checksum reset */
+	int8_t  *srcAddr;      /* the address to move data from */
+	int8_t  *destAddr;     /* the address to move data to */
+	int8_t  *lastDestAddr; /* the last address written to */
+    uint32_t dmaSize;       /* the number of bytes to transfer independent of the transfer size */
+    MCD_bufDesc *next; /* next buffer descriptor in chain */
+    uint32_t info;          /* private information about this descriptor;  DMA does not affect it */
+};
+
+/* Progress Query struct */
+typedef volatile struct MCD_XferProg_struct {
+	int8_t *lastSrcAddr;         /* the most-recent or last, post-increment source address */
+	int8_t *lastDestAddr;        /* the most-recent or last, post-increment destination address */
+	uint32_t  dmaSize;            /* the amount of data transferred for the current buffer */
+	MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */
+} MCD_XferProg;
+
+struct dma_driver_interface
+{
+	int32_t version;
+	int32_t magic;
+	int32_t (*dma_set_initiator)(int initiator);
+	uint32_t (*dma_get_initiator)(int requestor);
+	void (*dma_free_initiator)(int requestor);
+	int32_t (*dma_set_channel)(int requestor, void (*handler)(void));
+	int (*dma_get_channel)(int requestor);
+	void (*dma_free_channel)(int requestor);
+	void (*dma_clear_channel)(int channel);
+	int (*MCD_startDma)(int channel, int8_t *srcAddr, int16_t srcIncr, int8_t *destAddr, int16_t destIncr,
+						uint32_t dmaSize, uint32_t xferSize, uint32_t initiator, int32_t priority, uint32_t flags,
+						uint32_t funcDesc);
+	int (*MCD_dmaStatus)(int channel);
+	int (*MCD_XferProgrQuery)(int channel, MCD_XferProg *progRep);
+	int (*MCD_killDma)(int channel);
+	int (*MCD_continDma)(int channel);
+	int (*MCD_pauseDma)(int channel);
+	int (*MCD_resumeDma)(int channel);
+	int (*MCD_csumQuery)(int channel, uint32_t *csum);
+	void *(*dma_malloc)(long amount);
+	int (*dma_free)(void *addr);
+};
+	
+struct xhdi_driver_interface
+{
+	uint32_t (*xhdivec)();
+};
+
+union interface
+{
+	struct generic_driver_interface *gdi;
+	struct xhdi_driver_interface *xhdi;
+	struct dma_driver_interface *dma;
+};
+
+struct generic_interface
+{
+	enum driver_type type;
+	char name[16];
+	char description[64];
+	int version;
+	int revision;
+	union interface interface;
+};
+
+struct driver_table
+{
+	uint32_t bas_version;
+	uint32_t bas_revision;
+	uint32_t (*remove_handler)();			/* calling this will disable the BaS' hook into trap #0 */
+	struct generic_interface *interfaces;
+};
+
+
+#endif /* _DRIVER_VEC_H_ */
--- a/tos/jtagwait/jtagwait.config
+++ b/tos/jtagwait/jtagwait.config
@@ -0,0 +1 @@
+// ADD PREDEFINED MACROS HERE!
--- a/tos/jtagwait/jtagwait.creator
+++ b/tos/jtagwait/jtagwait.creator
@@ -0,0 +1 @@
+[General]
--- a/tos/jtagwait/jtagwait.creator.user
+++ b/tos/jtagwait/jtagwait.creator.user
@@ -0,0 +1,186 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE QtCreatorProject>
+<!-- Written by QtCreator 3.0.1, 2014-08-04T18:51:58. -->
+<qtcreator>
+ <data>
+  <variable>ProjectExplorer.Project.ActiveTarget</variable>
+  <value type="int">0</value>
+ </data>
+ <data>
+  <variable>ProjectExplorer.Project.EditorSettings</variable>
+  <valuemap type="QVariantMap">
+   <value type="bool" key="EditorConfiguration.AutoIndent">true</value>
+   <value type="bool" key="EditorConfiguration.AutoSpacesForTabs">false</value>
+   <value type="bool" key="EditorConfiguration.CamelCaseNavigation">true</value>
+   <valuemap type="QVariantMap" key="EditorConfiguration.CodeStyle.0">
+    <value type="QString" key="language">Cpp</value>
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--- a/tos/jtagwait/jtagwait.files
+++ b/tos/jtagwait/jtagwait.files
@@ -0,0 +1,3 @@
+include/driver_vec.h
+sources/jtagwait.c
+Makefile
--- a/tos/jtagwait/jtagwait.includes
+++ b/tos/jtagwait/jtagwait.includes
@@ -0,0 +1 @@
+include
--- a/tos/jtagwait/sources/jtagwait.c
+++ b/tos/jtagwait/sources/jtagwait.c
@@ -0,0 +1,75 @@
+#include <stdio.h>
+#include <mint/osbind.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "driver_vec.h"
+
+#define FPGA_JTAG_LOADED_FLAG               ((volatile bool *) 0xFF101000)
+
+#define _MBAR                               ((volatile uint8_t *) 0xFF000000)
+#define MCF_GPIO_PDDR_FEC1L                 ((volatile uint8_t *)(&_MBAR[0xA17]))
+#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4     (0x10)
+#define MCF_GPIO_PPDSDR_FEC1L               ((volatile uint8_t *)(&_MBAR[0xA27]))
+#define FPGA_CONFIG                     	(1 << 2)
+#define FPGA_CONF_DONE                      (1 << 5)
+
+static inline uint32_t set_ipl(uint32_t ipl)
+{
+    uint32_t ret;
+
+    __asm__ __volatile__(
+        "		move.w	sr,%[ret]\r\n"			/* retrieve status register */
+        "		andi.l	#0x07,%[ipl]\n\t"		/* mask out ipl bits on new value */
+        "		lsl.l	#8,%[ipl]\n\t"			/* shift them to position */
+        "		move.l	%[ret],d0\n\t"			/* retrieve original value */
+        "		andi.l	#0x0000f8ff,d0\n\t"		/* clear ipl part */
+        "		or.l	%[ipl],d0\n\t"			/* or in new value */
+        "		move.w	d0,sr\n\t"				/* put it in place */
+        "		andi.l	#0x0700,%[ret]\r\n"		/* mask out ipl bits */
+        "		lsr.l	#8,%[ret]\r\n"			/* shift them to position */
+        : [ret] "=&d" (ret)		/* output */
+        : [ipl] "d" (ipl)		/* input */
+        : "d0", "cc"	/* clobber */
+    );
+
+    return ret;
+}
+
+void wait_for_jtag(void)
+{
+    set_ipl(7);                     /* disable interrupts */
+    /*
+     * configure FEC1L port directions to enable external JTAG configuration download to FPGA
+     */
+    *MCF_GPIO_PDDR_FEC1L = 0 |
+                          MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4;	/* bit 4 = LED => output */
+                                                            /* all other bits = input */
+    /*
+     * now that this GPIO ports have been switched to input, we can poll for FPGA config
+     * started from the JTAG interface (CONFIGn goes high) and finish (CONF_DONE goes high)
+     */
+    while (*MCF_GPIO_PPDSDR_FEC1L & FPGA_CONFIG);           /* wait for JTAG reset */
+    while (!(*MCF_GPIO_PPDSDR_FEC1L & FPGA_CONFIG));        /* wait for JTAG config load starting */
+    while (!(*MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE));     /* wait for JTAG config load finished */
+
+    *FPGA_JTAG_LOADED_FLAG = true;     /* indicate jtag loaded FPGA config to BaS */
+
+    /*
+     * reboot after configuration finished
+     */
+    __asm__ __volatile__(
+        "jmp    0xE0000000\n\t"
+    );
+}
+
+int main(int argc, char *argv[])
+{
+    printf("\033E\r\nFPGA JTAG configuration support\r\n");
+    printf("You may now savely load a new FPGA configuration through the JTAG interface\r\n"
+           "and your Firebee will reboot once finished using that new configuration.\r\n");
+    Supexec(wait_for_jtag);
+
+    return 0;       /* just to make the compiler happy, we will never return */
+}
+
--- a/tos/mcdcook/Makefile
+++ b/tos/mcdcook/Makefile
@@ -0,0 +1,117 @@
+CROSS=Y
+
+CROSSBINDIR_IS_Y=m68k-atari-mint-
+CROSSBINDIR_IS_N=
+
+CROSSBINDIR=$(CROSSBINDIR_IS_$(CROSS))
+
+UNAME := $(shell uname)
+ifeq ($(CROSS), Y)
+ifeq ($(UNAME),Linux)
+PREFIX=m68k-atari-mint
+HATARI=hatari
+else
+PREFIX=m68k-atari-mint
+HATARI=/usr/local/bin/hatari
+endif
+else
+PREFIX=/usr
+endif
+
+DEPEND=depend
+TOPDIR= ../..
+
+INCLUDE=-I$(TOPDIR)/../libcmini/include -nostdlib
+LIBS=-lcmini -nostdlib -lgcc
+CC=$(PREFIX)/bin/gcc
+
+CC=$(CROSSBINDIR)gcc
+STRIP=$(CROSSBINDIR)strip
+STACK=$(CROSSBINDIR)stack
+
+APP=mcdcook.prg
+TEST_APP=$(APP)
+
+CFLAGS=\
+	-Os\
+	-g\
+	-Wl,-Map,mapfile\
+	-Wall
+	
+SRCDIR=sources
+INCDIR=include
+INCLUDE+=-I$(INCDIR)
+
+CSRCS=\
+	$(SRCDIR)/mcdcook.c
+ASRCS=
+
+COBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.c,%.o,$(CSRCS)))
+AOBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.S,%.o,$(ASRCS)))
+OBJS=$(COBJS) $(AOBJS)
+
+TRGTDIRS=. ./m68020-60 ./m5475 ./mshort ./m68020-60/mshort ./m5475/mshort
+OBJDIRS=$(patsubst %,%/objs,$(TRGTDIRS))
+
+#
+# multilib flags. These must match m68k-atari-mint-gcc -print-multi-lib output
+#
+m68020-60/$(APP):CFLAGS += -m68020-60
+m5475/$(APP):CFLAGS += -mcpu=5475
+mshort/$(APP):CFLAGS += -mshort
+m68020-60/mshort/$(APP): CFLAGS += -m68020-60 -mshort
+m5475/mshort/$(APP): CFLAGS += -mcpu=5475 -mshort
+
+ctest: $(TEST_APP)
+all:$(patsubst %,%/$(APP),$(TRGTDIRS))
+#
+# generate pattern rules for multilib object files.
+#
+define CC_TEMPLATE
+$(1)/objs/%.o:$(SRCDIR)/%.c
+	$(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@
+
+$(1)/objs/%.o:$(SRCDIR)/%.S
+	$(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@
+
+$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS))
+$(1)/$(APP): $$($(1)_OBJS)
+	$(CC) $$(CFLAGS) -o $$@ $(TOPDIR)/../libcmini/$(1)/startup.o $$($(1)_OBJS) -L$(TOPDIR)/../libcmini/$(1) $(LIBS)
+	$(STRIP) $$@
+endef
+$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR))))
+
+$(DEPEND): $(ASRCS) $(CSRCS)
+	-rm -f $(DEPEND)
+	for d in $(TRGTDIRS);\
+		do $(CC) $(CFLAGS) $(INCLUDE) -M $(ASRCS) $(CSRCS) | sed -e "s#^\(.*\).o:#$$d/objs/\1.o:#" >> $(DEPEND); \
+    done
+
+
+clean:
+	@rm -f $(patsubst %,%/objs/*.o,$(TRGTDIRS)) $(patsubst %,%/$(APP),$(TRGTDIRS))
+	@rm -f $(DEPEND) mapfile
+
+.PHONY: printvars
+printvars:
+	@$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
+	 
+ifneq (clean,$(MAKECMDGOALS))
+-include $(DEPEND)
+endif
+
+test: $(TEST_APP)
+	$(HATARI) --grab -w --tos $(TOPDIR)/../emutos/etos512k.img \
+	--machine falcon -s 14 --cpuclock 32 --cpulevel 3 --vdi true --vdi-planes 4 \
+	--vdi-width 640 --vdi-height 480 -d . $(APP)
+
+ftest: $(TEST_APP)
+	$(HATARI) --grab -w --tos /usr/share/hatari/TOS404.IMG \
+	--machine falcon --cpuclock 32 --cpulevel 3 \
+	-d . $(APP)
+	
+sttest: $(TEST_APP)
+	$(HATARI) --grab -w --tos "/usr/share/hatari/tos106de.img" \
+	--machine st --cpuclock 32 --cpulevel 3  --vdi true --vdi-planes 4 \
+	--vdi-width 640 --vdi-height 480 \
+	-d . $(APP)
--- a/tos/mcdcook/include/driver_vec.h
+++ b/tos/mcdcook/include/driver_vec.h
@@ -0,0 +1,125 @@
+/*
+ * driver_vec.h
+ *
+ * Interface for exposure of BaS drivers to the OS
+ *
+ * This file is part of BaS_gcc.
+ *
+ * BaS_gcc is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * BaS_gcc is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *  Created on: 24.10.2013
+ *      Author: Markus Fröschle
+ */
+
+#ifndef _DRIVER_VEC_H_
+#define _DRIVER_VEC_H_
+
+
+enum driver_type
+{
+	END_OF_DRIVERS,		/* marks end of driver list */
+	BLOCKDEV_DRIVER,
+	CHARDEV_DRIVER,
+	VIDEO_DRIVER,
+	XHDI_DRIVER,
+	MCD_DRIVER,
+};
+
+struct generic_driver_interface
+{
+	uint32_t (*init)(void);
+	uint32_t (*read)(void *buf, size_t count);
+	uint32_t (*write)(const void *buf, size_t count);
+	uint32_t (*ioctl)(uint32_t request, ...);
+};
+
+
+/* Chained buffer descriptor */
+typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
+struct MCD_bufDesc_struct {
+	uint32_t flags;         /* flags describing the DMA */
+    uint32_t csumResult;    /* checksum from checksumming performed since last checksum reset */
+	int8_t  *srcAddr;      /* the address to move data from */
+	int8_t  *destAddr;     /* the address to move data to */
+	int8_t  *lastDestAddr; /* the last address written to */
+    uint32_t dmaSize;       /* the number of bytes to transfer independent of the transfer size */
+    MCD_bufDesc *next; /* next buffer descriptor in chain */
+    uint32_t info;          /* private information about this descriptor;  DMA does not affect it */
+};
+
+/* Progress Query struct */
+typedef volatile struct MCD_XferProg_struct {
+	int8_t *lastSrcAddr;         /* the most-recent or last, post-increment source address */
+	int8_t *lastDestAddr;        /* the most-recent or last, post-increment destination address */
+	uint32_t  dmaSize;            /* the amount of data transferred for the current buffer */
+	MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */
+} MCD_XferProg;
+
+struct dma_driver_interface
+{
+	int32_t version;
+	int32_t magic;
+	int32_t (*dma_set_initiator)(int initiator);
+	uint32_t (*dma_get_initiator)(int requestor);
+	void (*dma_free_initiator)(int requestor);
+	int32_t (*dma_set_channel)(int requestor, void (*handler)(void));
+	int (*dma_get_channel)(int requestor);
+	void (*dma_free_channel)(int requestor);
+	void (*dma_clear_channel)(int channel);
+	int (*MCD_startDma)(int channel, int8_t *srcAddr, int16_t srcIncr, int8_t *destAddr, int16_t destIncr,
+						uint32_t dmaSize, uint32_t xferSize, uint32_t initiator, int32_t priority, uint32_t flags,
+						uint32_t funcDesc);
+	int (*MCD_dmaStatus)(int channel);
+	int (*MCD_XferProgrQuery)(int channel, MCD_XferProg *progRep);
+	int (*MCD_killDma)(int channel);
+	int (*MCD_continDma)(int channel);
+	int (*MCD_pauseDma)(int channel);
+	int (*MCD_resumeDma)(int channel);
+	int (*MCD_csumQuery)(int channel, uint32_t *csum);
+	void *(*dma_malloc)(long amount);
+	int (*dma_free)(void *addr);
+};
+	
+struct xhdi_driver_interface
+{
+	uint32_t (*xhdivec)();
+};
+
+union interface
+{
+	struct generic_driver_interface *gdi;
+	struct xhdi_driver_interface *xhdi;
+	struct dma_driver_interface *dma;
+};
+
+struct generic_interface
+{
+	enum driver_type type;
+	char name[16];
+	char description[64];
+	int version;
+	int revision;
+	union interface interface;
+};
+
+struct driver_table
+{
+	uint32_t bas_version;
+	uint32_t bas_revision;
+	uint32_t (*remove_handler)();			/* calling this will disable the BaS' hook into trap #0 */
+	struct generic_interface *interfaces;
+};
+
+
+#endif /* _DRIVER_VEC_H_ */
--- a/tos/mcdcook/sources/mcdcook.c
+++ b/tos/mcdcook/sources/mcdcook.c
@@ -0,0 +1,121 @@
+#include <stdio.h>
+#include <mint/osbind.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "driver_vec.h"
+
+struct driver_table *get_bas_drivers(void)
+{
+	struct driver_table *ret = NULL;
+
+	__asm__ __volatile(
+		"	trap	#0\n\t"
+		"	move.l	d0,%[ret]\n\t"
+		:	[ret] "=m" (ret)	/* output */
+		:						/* no inputs */
+		:						/* clobbered */
+	);
+	
+	return ret;
+}
+
+static uint32_t cookieptr(void)
+{
+	return * (uint32_t *) 0x5a0L;
+}
+
+void setcookie(uint32_t cookie, uint32_t value)
+{
+	uint32_t *cookiejar = (uint32_t *) Supexec(cookieptr);
+	int num_slots;
+	int max_slots;
+	
+	num_slots = max_slots = 0;
+	do
+	{
+		if (cookiejar[0] == cookie)
+		{
+			cookiejar[1] = value;
+			return;
+		}
+		cookiejar = &(cookiejar[2]);
+		num_slots++;
+	} while (cookiejar[-2]);
+	
+	/*
+	 * Here we are at the end of the list and did not find our cookie.
+	 * Let's check if there is any space left and append our value to the
+	 * list if so. If not, we are lost (extending the cookie jar does only
+	 * work from TSRs)
+	 */
+	if (cookiejar[-1])
+		max_slots = cookiejar[-1];
+	 
+	if (max_slots > num_slots)
+	{
+		 /* relief, there is space left, extend the list */
+		cookiejar[0] = cookiejar[-2];
+		cookiejar[1] = cookiejar[-1];
+		/* add the new element */
+		cookiejar[-2] = cookie;
+		cookiejar[-1] = value;
+	}
+	else
+		printf("cannot set cookie, cookie jar is full!\r\n");
+}
+
+# define COOKIE_DMAC	0x444D4143L /* FireTOS DMA API */
+
+static char *dt_to_str(enum driver_type dt)
+{
+	switch (dt)
+	{
+		case BLOCKDEV_DRIVER: return "generic block device driver";
+		case CHARDEV_DRIVER:  return "generic character device driver";
+		case VIDEO_DRIVER:    return "video/framebuffer driver";
+		case XHDI_DRIVER:     return "XHDI compatible hard disk driver";
+		case MCD_DRIVER:	  return "multichannel DMA driver";
+		default:              return "unknown driver type";
+	}
+}
+
+int main(int argc, char *argv[])
+{
+	struct driver_table *dt;
+	void *ssp;
+
+	(void) Cconws("retrieve BaS driver interface\r\n");
+	
+	ssp = (void *) Super(0L);
+	dt = get_bas_drivers();
+	if (dt)
+	{
+		struct generic_interface *ifc = &dt->interfaces[0];
+
+		printf("BaS driver table found at %p, BaS version is %d.%d\r\n", dt,
+				dt->bas_version, dt->bas_revision);
+
+		while (ifc->type != END_OF_DRIVERS)
+		{
+			printf("driver \"%s (%s)\" found,\r\n"
+				   "interface type is %d (%s),\r\n"
+				   "version %d.%d\r\n\r\n",
+					ifc->name, ifc->description, ifc->type, dt_to_str(ifc->type),
+					ifc->version, ifc->revision);
+			if (ifc->type == MCD_DRIVER)
+			{
+				setcookie(COOKIE_DMAC, ifc->interface.dma);
+				printf("\r\nDMAC cookie set to %p\r\n", ifc->interface.dma);
+			}
+			ifc++;
+		}
+	}
+	Super(ssp);
+	
+	while (Cconis()) Cconin();	/* eat keys */
+	printf("press any key to continue\n\r");
+	// while (! Cconis());
+	return 0;
+}
+
--- a/usb/usb_mouse.c
+++ b/usb/usb_mouse.c
@@ -48,7 +48,7 @@ static int usb_mouse_probe(struct usb_device *dev, unsigned int ifnum);
 int usb_mouse_deregister(struct usb_device *dev)
 {
 	dev->irq_handle = NULL;
-	if(new != NULL)
+	if (new != NULL)
 	{
 		driver_mem_free(new);
 		new = NULL;
@@ -61,8 +61,9 @@ int usb_mouse_deregister(struct usb_device *dev)
 /* registering the mouse */
 int usb_mouse_register(struct usb_device *dev)
 {
-	if(!mouse_installed && (dev->devnum != -1) && (usb_mouse_probe(dev, 0) == 1))
-	{ /* Ok, we found a mouse */
+	if (!mouse_installed && (dev->devnum != -1) && (usb_mouse_probe(dev, 0) == 1))
+	{
+		/* Ok, we found a mouse */
 		mse_printf("USB MOUSE found (USB: %d, devnum: %d)\r\n", dev->usbnum, dev->devnum);
 		mouse_installed = 1;
 		dev->deregister = usb_mouse_deregister;
@@ -76,12 +77,12 @@ int usb_mouse_register(struct usb_device *dev)
 int drv_usb_mouse_init(void)
 {
 	int i, j;
-	if(mouse_installed)
+	if (mouse_installed)
 		return -1;
 	/* scan all USB Devices */
-	for(j = 0; j < USB_MAX_BUS; j++)
+	for (j = 0; j < USB_MAX_BUS; j++)
 	{
-		for(i = 0; i < USB_MAX_DEVICE; i++)
+		for (i = 0; i < USB_MAX_DEVICE; i++)
 		{
 			struct usb_device *dev = usb_get_dev_index(i, j); /* get device */
 			if (dev == NULL)
@@ -109,27 +110,27 @@ static int usb_mouse_irq(struct usb_device *dev)
 	int level;
 #endif
 	int i, change = 0;
-	if((dev->irq_status != 0) || (dev->irq_act_len < 3) || (dev->irq_act_len > 8))
+	if ((dev->irq_status != 0) || (dev->irq_act_len < 3) || (dev->irq_act_len > 8))
 	{
 		mse_printf("USB MOUSE error %lX, len %d\r\n", dev->irq_status, dev->irq_act_len);
 		return 1;
 	}
-	for(i = 0; i < dev->irq_act_len; i++)
+	for (i = 0; i < dev->irq_act_len; i++)
 	{
-		if(new[i] != old[i])
+		if (new[i] != old[i])
 		{
 			change = 1;
 			break;
 		}
 	}
-	if(change)
+	if (change)
 	{
 		char wheel = 0, buttons, old_buttons;
 		mse_printf("USB MOUSE len:%d %02X %02X %02X %02X %02X %02X\r\n", dev->irq_act_len, new[0], new[1], new[2], new[3], new[4], new[5]);
 #ifdef CONFIG_USB_INTERRUPT_POLLING
 		level = set_ipl(7); /* mask interrupts */
 #endif
-		if((dev->irq_act_len >= 6) && (new[0] == 1)) /* report-ID */
+		if ((dev->irq_act_len >= 6) && (new[0] == 1)) /* report-ID */
 		{
 			buttons = new[1];
 			old_buttons = old[1];
@@ -143,24 +144,24 @@ static int usb_mouse_irq(struct usb_device *dev)
 			buttons = new[0];
 			old_buttons = old[0];
 			new[0] = ((new[0] & 1) << 1) + ((new[0] & 2) >> 1) + 0xF8;
-			if(dev->irq_act_len >= 3)
+			if (dev->irq_act_len >= 3)
 				wheel = new[3];
 		}
-		if((buttons ^ old_buttons) & 4) /* 3rd button */
+		if ((buttons ^ old_buttons) & 4) /* 3rd button */
 		{
-		  if(buttons & 4)
+		  if (buttons & 4)
 		  {
 				usb_kbd_send_code(0x72); /* ENTER */
 				usb_kbd_send_code(0xF2);
 			}
 		}
-		if(wheel != 0) /* actually like Eiffel */
+		if (wheel != 0) /* actually like Eiffel */
 		{
 #define REPEAT_WHEEL 3
 			int i;
-			if(wheel > 0)
+			if (wheel > 0)
 			{
-				for(i = 0; i < REPEAT_WHEEL; i++)
+				for (i = 0; i < REPEAT_WHEEL; i++)
 				{
 					usb_kbd_send_code(0x48); /* UP */
 					usb_kbd_send_code(0xC8);
@@ -168,7 +169,7 @@ static int usb_mouse_irq(struct usb_device *dev)
 			}
 			else
 			{
-				for(i = 0; i < REPEAT_WHEEL; i++)
+				for (i = 0; i < REPEAT_WHEEL; i++)
 				{
 					usb_kbd_send_code(0x50); /* DOWN */
 					usb_kbd_send_code(0xD0);
@@ -197,24 +198,24 @@ static int usb_mouse_probe(struct usb_device *dev, unsigned int ifnum)
 	struct usb_interface_descriptor *iface;
 	struct usb_endpoint_descriptor *ep;
 	int pipe, maxp;
-	if(dev->descriptor.bNumConfigurations != 1)
+	if (dev->descriptor.bNumConfigurations != 1)
 		return 0;
 	iface = &dev->config.if_desc[ifnum];
-	if(iface->bInterfaceClass != 3)
+	if (iface->bInterfaceClass != 3)
 		return 0;
-	if(iface->bInterfaceSubClass != 1)
+	if (iface->bInterfaceSubClass != 1)
 		return 0;
-	if(iface->bInterfaceProtocol != 2)
+	if (iface->bInterfaceProtocol != 2)
 		return 0;
-	if(iface->bNumEndpoints != 1)
+	if (iface->bNumEndpoints != 1)
 		return 0;
 	ep = &iface->ep_desc[0];
-	if(!(ep->bEndpointAddress & 0x80))
+	if (!(ep->bEndpointAddress & 0x80))
 		return 0;
-	if((ep->bmAttributes & 3) != 3)
+	if ((ep->bmAttributes & 3) != 3)
 		return 0;
 	new = (unsigned char *)driver_mem_alloc(8);
-	if(new == NULL)
+	if (new == NULL)
 		return 0;
 	mse_printf("USB MOUSE found set protocol...\r\n");
 	/* ok, we found a USB Mouse, install it */
--- a/util/bas_string.c
+++ b/util/bas_string.c
@@ -55,14 +55,14 @@ void *memset(void *s, int c, size_t n)
 }


-int memcmp(const char *s1, const char *s2, size_t max)
+int memcmp(const void *s1, const void *s2, size_t max)
 {
 	int i;
 	int cmp;

 	for (i = 0; i < max; i++)
 	{
-		cmp = (*s1 - *s2);
+        cmp = (* (const char *) s1 - * (const char *) s2);
 		if (cmp != 0) return cmp;
 	}
 	return cmp;
@@ -75,7 +75,7 @@ int strcmp(const char *s1, const char *s2)

 	for (i = 0; *s1++ && *s2++; i++)
 	{
-		cmp * (*s1 - *s2);
+		cmp = (*s1 - *s2);
 		if (cmp != 0) return cmp;
 	}
 	return cmp;
--- a/util/printf_helper.S
+++ b/util/printf_helper.S
@@ -34,3 +34,5 @@ printf_helper:
 			lea			__MBAR+0x860C,a0	// PSCSTB0 transmitter buffer register
 			move.b		d0,(a0)				// send byte
 			rts
+
+// vim: set syntax=asm68k :
--- a/util/wait.c
+++ b/util/wait.c
@@ -27,5 +27,45 @@

 #include <stdint.h>
 #include <MCF5475.h>
-
 #include <wait.h>
+
+uint32_t get_timer(void)
+{
+	return MCF_SLT_SCNT(0);
+}
+
+/*
+ * wait for the specified number of us on slice timer 0. Replaces the original routines that had
+ * the number of useconds to wait for hardcoded in their name.
+ */
+void wait(uint32_t us)
+{
+	int32_t target = MCF_SLT_SCNT(0) - (us * (SYSCLK / 1000));
+
+	while (MCF_SLT_SCNT(0) - target > 0);
+}
+
+/*
+ * same as above, but with milliseconds wait time
+ */
+void wait_ms(uint32_t ms)
+{
+	wait(ms * 1000);
+}
+/*
+ * wait for the specified number of us (same as above), but with a checker function
+ * which gets called while busy waiting and allows for an early return if it returns true
+ */
+bool waitfor(uint32_t us, checker_func condition)
+{
+	int32_t target = MCF_SLT_SCNT(0) - (us * (SYSCLK / 1000));
+	bool res;
+
+	do
+	{
+		if ((res = (*condition)()))
+			return res;
+	} while (MCF_SLT_SCNT(0) - target > 0);
+
+	return false;
+}
--- a/video/fbmodedb.c
+++ b/video/fbmodedb.c
@@ -18,7 +18,7 @@

 #define DBG_MODES
 #ifdef DBG_MODES
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_MODES */
--- a/video/fnt_st_8x16.c
+++ b/video/fnt_st_8x16.c
@@ -7,11 +7,10 @@
 * option any later version.  See doc/license.txt for details.
 */

-#include "config.h"
-#include "portab.h"
+#include "bas_types.h"
 #include "font.h"

-static const UWORD off_table[] =
+static const uint16_t off_table[] =
 {
    0x0000, 0x0008, 0x0010, 0x0018, 0x0020, 0x0028, 0x0030, 0x0038,
    0x0040, 0x0048, 0x0050, 0x0058, 0x0060, 0x0068, 0x0070, 0x0078,
@@ -48,7 +47,7 @@ static const UWORD off_table[] =
    0x0800,
 };

-static const UWORD dat_table[] =
+static const uint16_t dat_table[] =
 {
    0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
    0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1104,
--- a/video/videl.c
+++ b/video/videl.c
@@ -11,7 +11,12 @@
 * option any later version.  See doc/license.txt for details.
 */

-#define DBG_VIDEL 0
+#define DBG_VIDEL
+#ifdef DBG_VIDEL
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
+#else
+#define dbg(format, arg...) do { ; } while (0)
+#endif /* DBG_VIDEL */

 #include <stdint.h>
 #include <stdbool.h>
@@ -300,14 +305,14 @@ static uint16_t get_videl_bpp(void)

 static uint16_t get_videl_width(void)
 {
-    return (*(volatile uint16_t *)0xffff8210) * 16 / get_videl_bpp();
+    return ( * (volatile uint16_t *) 0xffff8210) * 16 / get_videl_bpp();
 }

 static uint16_t get_videl_height(void)
 {
-    uint16_t vdb = *(volatile uint16_t *)0xffff82a8;
-    uint16_t vde = *(volatile uint16_t *)0xffff82aa;
-    uint16_t vmode = *(volatile uint16_t *)0xffff82c2;
+    uint16_t vdb = * (volatile uint16_t *) 0xffff82a8;
+    uint16_t vde = * (volatile uint16_t *) 0xffff82aa;
+    uint16_t vmode = * (volatile uint16_t *) 0xffff82c2;

    /* visible y resolution:
     * Graphics display starts at line VDB and ends at line
@@ -332,11 +337,14 @@ const VMODE_ENTRY *lookup_videl_mode(int16_t mode,int16_t monitor)
 {
    const VMODE_ENTRY *vmode_init_table, *p;

-    if (mode&VIDEL_VGA) {
+    if (mode&VIDEL_VGA)
+    {
        vmode_init_table = vga_init_table;
        /* ignore bits that don't affect initialisation data */
        mode &= ~(VIDEL_VERTICAL|VIDEL_PAL);
-    } else {
+    }
+    else
+    {
        vmode_init_table = nonvga_init_table;
    }

@@ -368,34 +376,38 @@ static int16_t determine_width(int16_t mode)
 /*
 * determine vctl based on video mode and monitor type
 */
-static int16_t determine_vctl(int16_t mode,int16_t monitor)
+static int16_t determine_vctl(int16_t mode, int16_t monitor)
 {
    int16_t vctl;

-    if (mode&VIDEL_VGA) {
-        vctl = (mode&VIDEL_80COL) ? 0x08 : 0x04;
-        if (mode&VIDEL_VERTICAL)
+    if (mode & VIDEL_VGA)
+    {
+        vctl = (mode & VIDEL_80COL) ? 0x08 : 0x04;
+        if (mode & VIDEL_VERTICAL)
            vctl |= 0x01;
-    } else {
-        vctl = (mode&VIDEL_80COL) ? 0x04 : 0x00;
-        if (mode&VIDEL_VERTICAL)
+    }
+    else
+    {
+        vctl = (mode & VIDEL_80COL) ? 0x04 : 0x00;
+        if (mode & VIDEL_VERTICAL)
            vctl |= 0x02;
    }

-    if (!(mode&VIDEL_COMPAT))
+    if (!(mode & VIDEL_COMPAT))
        return vctl;

-    switch(mode&VIDEL_BPPMASK) {
-    case VIDEL_1BPP:
-        if (!(mode&VIDEL_VGA) && (monitor == MON_MONO))
-            vctl = 0x08;
-        break;
-    case VIDEL_2BPP:
-        vctl = (mode&VIDEL_VGA)? 0x09 : 0x04;
-        break;
-    case VIDEL_4BPP:
-        vctl = (mode&VIDEL_VGA)? 0x05 : 0x00;
-        break;
+    switch (mode & VIDEL_BPPMASK)
+    {
+        case VIDEL_1BPP:
+            if (!(mode & VIDEL_VGA) && (monitor == MON_MONO))
+                vctl = 0x08;
+            break;
+        case VIDEL_2BPP:
+            vctl = (mode & VIDEL_VGA)? 0x09 : 0x04;
+            break;
+        case VIDEL_4BPP:
+            vctl = (mode & VIDEL_VGA)? 0x05 : 0x00;
+            break;
    }

    return vctl;
@@ -407,25 +419,28 @@ static int16_t determine_vctl(int16_t mode,int16_t monitor)
 */
 static int16_t determine_regc0(int16_t mode,int16_t monitor)
 {
-    if (mode&VIDEL_VGA)
+    if (mode & VIDEL_VGA)
        return 0x0186;

-    if (!(mode&VIDEL_COMPAT))
-        return (monitor==MON_TV)?0x0183:0x0181;
+    if (!(mode & VIDEL_COMPAT))
+        return (monitor == MON_TV) ? 0x0183 : 0x0181;

    /* handle ST-compatible modes */
-    if ((mode&(VIDEL_80COL|VIDEL_BPPMASK)) == (VIDEL_80COL|VIDEL_1BPP)) {  /* 80-column, 2-colour */
-        switch(monitor) {
-        case MON_MONO:
-            return 0x0080;
-        case MON_TV:
-            return 0x0183;
-        default:
-            return 0x0181;
+    if ((mode & (VIDEL_80COL | VIDEL_BPPMASK)) == (VIDEL_80COL | VIDEL_1BPP))
+    {
+        /* 80-column, 2-colour */
+        switch(monitor)
+        {
+            case MON_MONO:
+                return 0x0080;
+            case MON_TV:
+                return 0x0183;
+            default:
+                return 0x0181;
        }
    }

-    return (monitor==MON_TV)?0x0083:0x0081;
+    return (monitor == MON_TV) ? 0x0083 : 0x0081;
 }


@@ -445,7 +460,7 @@ static int set_videl_vga(int16_t mode)
    if (!p)
        return -1;

-    videlregs[0x0a] = (mode&VIDEL_PAL) ? 2 : 0; /* video sync to 50Hz if PAL */
+    videlregs[0x0a] = (mode & VIDEL_PAL) ? 2 : 0; /* video sync to 50Hz if PAL */

    // FIXME: vsync() can't work if the screen is initially turned off
    //vsync(); /* wait for vbl so we're not interrupted :-) */
@@ -476,28 +491,30 @@ static int set_videl_vga(int16_t mode)
    videlword(0xc0) = determine_regc0(mode,monitor);
    videlword(0x66) = 0x0000;           /* clear SPSHIFT */

-    switch(mode&VIDEL_BPPMASK) {        /* set SPSHIFT / ST shift */
-    case VIDEL_1BPP:                    /* 2 colours (mono) */
-        if (monitor == MON_MONO)
-            videlregs[0x60] = 0x02;
-        else videlword(0x66) = 0x0400;
-        break;
-    case VIDEL_2BPP:                    /* 4 colours */
-        videlregs[0x60] = 0x01;
-        videlword(0x10) = linewidth;        /* writing to the ST shifter has    */
-        videlword(0xc2) = vctl;             /* just overwritten these registers */
-        break;
-    case VIDEL_4BPP:                    /* 16 colours */
-        /* if not ST-compatible, SPSHIFT was already set correctly above */
-        if (mode&VIDEL_COMPAT)
-            videlregs[0x60] = 0x00;         /* else set ST shifter */
-        break;
-    case VIDEL_8BPP:                    /* 256 colours */
-        videlword(0x66) = 0x0010;
-        break;
-    case VIDEL_TRUECOLOR:               /* 65536 colours (Truecolor) */
-        videlword(0x66) = 0x0100;
-        break;
+    switch(mode & VIDEL_BPPMASK)
+    {
+        /* set SPSHIFT / ST shift */
+        case VIDEL_1BPP:                    /* 2 colours (mono) */
+            if (monitor == MON_MONO)
+                videlregs[0x60] = 0x02;
+            else videlword(0x66) = 0x0400;
+            break;
+        case VIDEL_2BPP:                    /* 4 colours */
+            videlregs[0x60] = 0x01;
+            videlword(0x10) = linewidth;        /* writing to the ST shifter has    */
+            videlword(0xc2) = vctl;             /* just overwritten these registers */
+            break;
+        case VIDEL_4BPP:                    /* 16 colours */
+            /* if not ST-compatible, SPSHIFT was already set correctly above */
+            if (mode & VIDEL_COMPAT)
+                videlregs[0x60] = 0x00;         /* else set ST shifter */
+            break;
+        case VIDEL_8BPP:                    /* 256 colours */
+            videlword(0x66) = 0x0010;
+            break;
+        case VIDEL_TRUECOLOR:               /* 65536 colours (Truecolor) */
+            videlword(0x66) = 0x0100;
+            break;
    }

    return 0;
@@ -518,8 +535,8 @@ int16_t vsetmode(int16_t mode)
    if (mode == -1)
        return current_video_mode;

-#if DBG_VIDEL
-    kprintf("vsetmode(0x%04x)\n", mode);
+#ifdef DBG_VIDEL
+    xprintf("vsetmode(0x%04x)\n", mode);
 #endif

    if (set_videl_vga(mode) < 0)    /* invalid mode */
@@ -577,26 +594,30 @@ int32_t vgetsize(int16_t mode)
    monitor = vmontype();

    mode &= VIDEL_VALID;        /* ignore invalid bits */
-    if ((mode&VIDEL_BPPMASK) > VIDEL_TRUECOLOR) {   /* fixup invalid bpp */
+    if ((mode & VIDEL_BPPMASK) > VIDEL_TRUECOLOR)
+    {
+        /* fixup invalid bpp */
        mode &= ~VIDEL_BPPMASK;
        mode |= VIDEL_TRUECOLOR;
    }

-    p = lookup_videl_mode(mode,monitor);
-    if (!p) {                   /* invalid mode */
-        if (mode&VIDEL_COMPAT)
+    p = lookup_videl_mode(mode, monitor);
+    if (!p)
+    {
+        /* invalid mode */
+        if (mode & VIDEL_COMPAT)
            return ST_VRAM_SIZE;
        mode &= ~(VIDEL_OVERSCAN|VIDEL_PAL);/* ignore less-important bits */
-        p = lookup_videl_mode(mode,monitor);/* & try again */
+        p = lookup_videl_mode(mode, monitor);/* & try again */
        if (!p)                             /* "can't happen" */
            return FALCON_VRAM_SIZE;
    }

-    vctl = determine_vctl(mode,monitor);
+    vctl = determine_vctl(mode, monitor);
    height = p->vde - p->vdb;
-    if (!(vctl&0x02))
+    if (!(vctl & 0x02))
        height >>= 1;
-    if (vctl&0x01)
+    if (vctl & 0x01)
        height >>= 1;

    return (int32_t)determine_width(mode) * 2 * height;
@@ -605,18 +626,21 @@ int32_t vgetsize(int16_t mode)
 /*
 * convert from Falcon palette format to STe palette format
 */
-#define falc2ste(a) ((((a)>>1)&0x08)|(((a)>>5)&0x07))
+#define falc2ste(a) ((((a) >> 1) & 0x08) | (((a) >> 5) & 0x07))
+
 static void convert2ste(int16_t *ste,int32_t *falcon)
 {
-    union {
+    union
+    {
        int32_t l;
        uint8_t b[4];
    } u;
    int i;

-    for (i = 0; i < 16; i++) {
+    for (i = 0; i < 16; i++)
+    {
        u.l = *falcon++;
-        *ste++ = (falc2ste(u.b[0])<<8) | (falc2ste(u.b[1])<<4) | falc2ste(u.b[3]);
+        *ste++ = (falc2ste(u.b[0]) << 8) | (falc2ste(u.b[1]) << 4) | falc2ste(u.b[3]);
    }
 }

@@ -629,10 +653,10 @@ static int use_ste_palette(int16_t videomode)
    if (vmontype() == MON_MONO)                     /* always for ST mono monitor */
        return true;

-    if ((videomode&VIDEL_BPPMASK) == VIDEL_2BPP)    /* always for 4-colour modes */
+    if ((videomode & VIDEL_BPPMASK) == VIDEL_2BPP)    /* always for 4-colour modes */
        return true;

-    if ((videomode&VIDEL_COMPAT) && ((videomode&VIDEL_BPPMASK) == VIDEL_4BPP))
+    if ((videomode & VIDEL_COMPAT) && ((videomode & VIDEL_BPPMASK) == VIDEL_4BPP))
        return true;                                /* and for ST low */

    return false;
@@ -652,10 +676,11 @@ static int use_ste_palette(int16_t videomode)
 * address | 0x01      load first 16 Falcon palette regs from address
 *       0 | 0x01      load 256 Falcon palette regs from falcon_shadow_palette[]
 */
-int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
+int16_t vsetrgb(int16_t index,int16_t count, int32_t *rgb)
 {
    int32_t *shadow, *source;
-    union {
+    union
+    {
        int32_t l;
        uint8_t b[4];
    } u;
@@ -664,8 +689,8 @@ int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
    if ((index < 0) || (count <= 0))
        return -1; /* Generic error */

-    limit = (get_videl_bpp()<=4) ? 16 : 256;
-    if ((index+count) > limit)
+    limit = (get_videl_bpp() <= 4) ? 16 : 256;
+    if ((index + count) > limit)
        return -1; /* Generic error */

    /*
@@ -674,7 +699,7 @@ int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
     */
    shadow = falcon_shadow_palette + index;
    source = rgb;
-    while(count--) {
+    while (count--) {
        u.l = *source++;
        u.b[0] = u.b[1];                 /* shift R & G */
        u.b[1] = u.b[2];
@@ -696,7 +721,7 @@ int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
        return 0; /* OK */
    }

-    colorptr = (limit==256) ? (int16_t *) 0x01L : (int16_t *) ((int32_t) falcon_shadow_palette|0x01L);
+    colorptr = (limit == 256) ? (int16_t *) 0x01L : (int16_t *) ((int32_t) falcon_shadow_palette|0x01L);

 	set_palette(colorptr);
    return 0; /* OK */
@@ -708,7 +733,8 @@ int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
 int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb)
 {
    int32_t *shadow;
-    union {
+    union
+    {
        int32_t l;
        uint8_t b[4];
    } u;
@@ -717,12 +743,13 @@ int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb)
    if ((index < 0) || (count <= 0))
        return -1; /* Generic error */

-    limit = (get_videl_bpp()<=4) ? 16 : 256;
-    if ((index+count) > limit)
+    limit = (get_videl_bpp() <= 4) ? 16 : 256;
+    if ((index + count) > limit)
        return -1; /* Generic error */

    shadow = falcon_shadow_palette + index;
-    while(count--) {
+    while (count--)
+    {
        u.l = *shadow++;
        u.b[2] = u.b[1];        /* shift R & G right*/
        u.b[1] = u.b[0];
@@ -769,7 +796,7 @@ int16_t vfixmode(int16_t mode)
    if (mode & VIDEL_VGA)                       /* if mode has VGA set, */
        mode ^= (VIDEL_VERTICAL | VIDEL_VGA);   /* clear it & flip vertical */
    if (mode & VIDEL_COMPAT) {
-        if ((mode&VIDEL_BPPMASK) == VIDEL_1BPP)
+        if ((mode & VIDEL_BPPMASK) == VIDEL_1BPP)
            mode |= VIDEL_VERTICAL;         /* set vertical for ST high */
        else mode &= ~VIDEL_VERTICAL;       /* clear it for ST medium, low  */
    }
@@ -786,7 +813,7 @@ int16_t videl_check_moderez(int16_t moderez)

    current_mode = get_videl_mode();
    return_mode = vfixmode(moderez);/* adjust */
-    return (return_mode==current_mode)?0:return_mode;
+    return (return_mode == current_mode) ? 0 : return_mode;
 }

 uint32_t videl_vram_size(void)
@@ -832,7 +859,7 @@ void initialise_falcon_palette(int16_t mode)
     * although it is probably not important since we don't use those
     * registers.
     */
-    limit = ((mode&VIDEL_BPPMASK)==VIDEL_8BPP) ? 256 : 16;
+    limit = ((mode & VIDEL_BPPMASK) == VIDEL_8BPP) ? 256 : 16;
    for (i = 0; i < limit; i++)
        fcol_regs[i] = falcon_shadow_palette[i];

@@ -840,7 +867,7 @@ void initialise_falcon_palette(int16_t mode)
     * if appropriate, set up the STe shadow & real palette registers
     */
    if (use_ste_palette(mode)) {
-        convert2ste(ste_shadow_palette,falcon_shadow_palette);
+        convert2ste(ste_shadow_palette, falcon_shadow_palette);
        for (i = 0; i < 16; i++)
            col_regs[i] = ste_shadow_palette[i];
    }
--- a/xhdi/xhdi_vec.S
+++ b/xhdi/xhdi_vec.S
@@ -61,3 +61,5 @@ _xhdi_sd_install:
 		move.l	#_xhdi_vec,d0	// return our BaS vector to TOS
 		move.l	d0,a0			//
 		rte
+
+// vim: set syntax=asm68k :
Author	SHA1	Message	Date
Markus Fröschle	40162047d8	(hopefully) fixed a problem with hang when i2c communication to TFP410 fails	2014-12-28 22:47:43 +00:00
Markus Fröschle	f871794760	fixed bug that prevented proper detection of FPGA load skip request	2014-12-26 08:56:30 +00:00
Markus Fröschle	88c1bd2373	fixed errornous deactivation of FPGA load	2014-12-26 07:26:10 +00:00
Markus Fröschle	5163fd5813	file release to officially support m548x with EmuTOS	2014-08-06 06:25:41 +00:00
Markus Fröschle	1e471ec8cd	bumped version for release	2014-08-06 06:23:30 +00:00
Markus Fröschle	e3e202a7cc	added tos programs that are used to interface to BaS_gcc from TOS. These programs are currently not build by default (need to call make in their respective directory for now). They expect to find a libcmini copy on the same directory level than you have your BaS_gcc folder.	2014-08-02 08:25:07 +00:00
David Gálvez	8b8206cf97	Add format specifier to fix debug messages format	2014-07-13 15:18:23 +00:00
David Gálvez	77d134150a	Make PCI memory space uncachable	2014-07-10 16:46:21 +00:00
David Gálvez	8d62eb705f	Merge pci_BaS_gcc branch to trunk	2014-07-10 15:45:45 +00:00
Markus Fröschle	68aac6bf71	fixed formatting	2014-06-23 18:23:44 +00:00
Markus Fröschle	067b31c31d	fixed formatting	2014-06-23 05:46:13 +00:00
Markus Fröschle	53644425ea	fixed compiler warnings	2014-06-23 05:37:51 +00:00
Markus Fröschle	2ba3d52843	fixed a few compiler warnings	2014-06-23 05:32:49 +00:00
Markus Fröschle	7fd0c0c663	modified init_fpga() to honour JTAG configuration. Does not work currently and needs support from the TOS side (program not finished yet)	2014-06-22 16:00:49 +00:00
Markus Fröschle	ae44abc952	added Doxyfile for doxygen documentation	2014-06-21 19:53:54 +00:00
Markus Fröschle	1dc12f4b05	added BaS includes	2014-06-21 19:52:23 +00:00
Markus Fröschle	49e3eb31e4	added ST fonts	2014-06-21 19:48:22 +00:00
Markus Fröschle	6c006454be	version bump	2014-06-21 06:33:45 +00:00
Markus Fröschle	f61e97a7e0	some minor cosmetic fixes	2014-06-21 06:32:25 +00:00
Markus Fröschle	bc478f0e0a	reverted to last released to make it work again	2014-06-21 06:21:41 +00:00
Markus Fröschle	be773a7d0c	removed (now wrong) comment	2014-06-21 05:50:43 +00:00
Markus Fröschle	2bef4a39a5	completed locked TLB list	2014-06-20 20:24:37 +00:00
Markus Fröschle	291d3ad5bf	added locked TLB entries	2014-06-20 19:50:49 +00:00
Markus Fröschle	4a6987e3bb	started to revert to previous functionality	2014-06-20 18:35:08 +00:00
Markus Fröschle	69c982c795	moved FPGA config GPIO initialization into init_fpga.c to enable external JTAG FPGA configuration	2014-06-20 12:02:11 +00:00
David Gálvez	4d40bd775a	make PCI memory non-cacheable	2014-05-25 19:13:45 +00:00
David Gálvez	d98727a182	add missing parameter initialization	2014-05-25 17:00:19 +00:00
David Gálvez	73f75895bc	Add driver interface for PCI	2014-05-21 08:40:50 +00:00
David Gálvez	f0d0af7add	Create new branch for PCI development	2014-05-21 07:38:47 +00:00
Markus Fröschle	927833d601	eliminated wrong types warning when calling memcpy()	2014-05-12 07:40:55 +00:00
Markus Fröschle	65a7986e34	reformatted	2014-05-11 20:38:33 +00:00
Markus Fröschle	ccec42e55c	modified dbg() in several files	2014-05-11 20:31:57 +00:00
Markus Fröschle	dc646c75ad	reformatted assembler code	2014-05-11 14:08:27 +00:00
Markus Fröschle	b0fb7b8df3	fixed wrong MMU mapping of emulated Falcon video memory (phys and virt where the wrong way round)	2014-05-11 06:57:09 +00:00
Markus Fröschle	fb9c4aaa1d	modified project to support Qt Creator inferior debugging through BDM.	2014-05-11 06:40:48 +00:00
Markus Fröschle	2f311aedbf	modified dbg() macro corrected irq6 handler reimplemented MFP interrupt LED blinker in C	2014-05-10 13:21:11 +00:00
Markus Fröschle	5a836c6ca7	reformatted assembly	2014-04-22 10:47:36 +00:00
Markus Fröschle	e94becff75	added to QtCreator	2014-04-22 10:44:56 +00:00
Markus Fröschle	dee448549c	translated copy loop to C	2014-02-04 20:06:29 +00:00
Markus Fröschle	fcd3b885ce	started "translating" MMU update code for video pages	2014-02-04 07:17:51 +00:00
Markus Fröschle	91ae86a487	completed page loop	2014-02-03 21:42:25 +00:00
Markus Fröschle	25f66ae7f9	more conversion to C	2014-02-02 22:27:10 +00:00
Markus Fröschle	fe5b7d466d	translated more of the assembler code into C	2014-02-02 21:35:46 +00:00
Markus Fröschle	ff3514c2d0	added missing include file to SVN	2014-02-02 10:16:16 +00:00
Markus Fröschle	90371bb3c9	optimized for size - reduces codesize by half	2014-02-01 23:54:32 +00:00
Markus Fröschle	5a557524b0	moved PSC3 interrupt handler to C code	2014-02-01 23:37:30 +00:00
Markus Fröschle	1fb6c756ae	modified to throw errors if an unknown machine type is detected	2014-01-28 15:49:05 +00:00
Markus Fröschle	8a1da417e7	modified ACR settings	2014-01-28 14:11:08 +00:00
Markus Fröschle	703352fc9d	added m54455 (Freescale EVB) platform	2014-01-21 14:52:46 +00:00
Markus Fröschle	6a6e7cf84e	fixed: compare virtual address instead of physical in lookup_mapping()	2014-01-21 12:43:32 +00:00
Markus Fröschle	430f03a8ed	fixed bug in determining if access error hit in TLB (checked bit 0 instead of 1).	2014-01-20 14:23:55 +00:00
Markus Fröschle	d3fb521ad1	modified MMU mapping table to use symbolic constants from include file	2014-01-19 19:26:52 +00:00
Markus Fröschle	bf8cea26ab	simplified MMU code. Still hangs somewhere in EmuTOS	2014-01-19 18:27:05 +00:00
Markus Fröschle	0f5942436a	removed locked MMU pages	2014-01-18 20:59:42 +00:00
Markus Fröschle	8544307830	removed inlining in wait.c, added (simple) map-based MMU handling	2014-01-18 14:03:25 +00:00
Markus Fröschle	386a921f84	modified to map memory dynamically based on a static memory map	2014-01-18 08:04:44 +00:00
Markus Fröschle	58418f2436	moved ACR register handling macros to include file	2014-01-17 06:45:33 +00:00
Markus Fröschle	8025af85dd	modified access_error to do all MMU mappings dynamically	2014-01-16 20:42:04 +00:00
Markus Fröschle	1c316ec11b	extended mmu_map_page() by size and flags args	2014-01-16 16:29:29 +00:00
Markus Fröschle	3779d1cb2e	modified ACRs to cover complete SDRAM	2014-01-16 16:18:43 +00:00
Markus Fröschle	c9c76a4757	test using ACR0 & ACR2 to provide supervisor stack access	2014-01-15 16:03:54 +00:00
Markus Fröschle	afa9490c1e	fixed typo in strcmp()	2014-01-15 07:17:21 +00:00
Markus Fröschle	26cadc699a	fixed formatting	2014-01-14 21:39:05 +00:00
Markus Fröschle	9da82d046b	modified comments	2014-01-14 21:15:56 +00:00
Markus Fröschle	4112590363	moved page alignment responsibility to caller	2014-01-14 20:28:13 +00:00
Markus Fröschle	fdf945c702	fixed missing parameter in debug print	2014-01-14 18:18:20 +00:00
Markus Fröschle	9b89377caf	removed type field from isr_register_handler() and friends	2014-01-14 07:48:38 +00:00
Markus Fröschle	3966bfd6ec	fixed comments	2014-01-13 22:05:20 +00:00
Markus Fröschle	bdf5cd6c0d	added vim modeline to asm sources. Needs "set modeline:set modeline=5" in .vimrc	2014-01-13 21:34:24 +00:00
Markus Fröschle	ba1a951952	cleaned up debug printouts	2014-01-13 21:30:39 +00:00
Markus Fröschle	fcb5204fc8	renamed mmutr_miss() to mmu_map_page() (that's what its doing)	2014-01-13 21:26:42 +00:00
Markus Fröschle	63b19853a9	corrected FASTRAM_END comparision	2014-01-13 21:20:24 +00:00
Markus Fröschle	be94d72097	refactored assembler routines from exceptions.S into mmu.c (access exception handler). Seems to be better, but still hang.	2014-01-13 19:39:42 +00:00
Markus Fröschle	9b099d935c	implemented safe stack for access exception handler	2014-01-13 15:13:29 +00:00
Markus Fröschle	a97469a53d	switch to a safe stack in access_exception. Assembles, but not tested yet.	2014-01-13 07:19:09 +00:00
Markus Fröschle	3a1c07a2e8	added better matching descriptive text to debug messages	2014-01-08 13:57:35 +00:00
Markus Fröschle	4f29f6af80	FEC interrupts to level 1	2014-01-08 09:59:44 +00:00
Markus Fröschle	8d53a1feb9	fixed - carelessly choosen - interrupt level for FEC interrupts	2014-01-08 09:01:43 +00:00
Markus Fröschle	99e5352807	changed MAC address to original address dbug assigns	2014-01-07 10:50:22 +00:00
Markus Fröschle	785ca43b11	cleaned up	2014-01-07 05:57:17 +00:00
Markus Fröschle	a23abf0b5d	corresponds to the equivalent file release. Contains networking code for EmuTOS, PCI bus scan and card configuration. X86emu included but deactivated.	2014-01-06 19:50:52 +00:00