bumped version for release

added tos programs that are used to interface to BaS_gcc from TOS. These programs are currently not build by default (need to call make in their respective directory for now). They expect to find a libcmini copy on the same directory level than you have your BaS_gcc folder.
Add format specifier to fix debug messages format
2014-08-06 06:23:30 +00:00 · 2014-08-02 08:25:07 +00:00 · 2014-07-13 15:18:23 +00:00 · 2014-07-10 16:46:21 +00:00 · 2014-07-10 15:45:45 +00:00 · 2014-06-23 18:23:44 +00:00
32 changed files with 4691 additions and 1064 deletions
--- a/1689
+++ b/1689
--- a/4
+++ b/4
@@ -124,6 +124,7 @@ CSRCS= \
 	radeon_accel.c \
 	radeon_cursor.c \
 	radeon_monitor.c \
+	fnt_st_8x16.c \
 	\
 	x86decode.c \
 	x86sys.c \
@@ -143,7 +144,8 @@ ASRCS= \
 	startcf.S \
 	printf_helper.S \
 	exceptions.S \
-	xhdi_vec.S
+	xhdi_vec.S \
+	pci_wrappers.S

 SRCS=$(ASRCS) $(CSRCS)
 COBJS=$(patsubst %.c,%.o,$(CSRCS))
--- a/bas.lk.in
+++ b/bas.lk.in
@@ -23,7 +23,7 @@ MEMORY
 	*/
   bas_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00200000, LENGTH = 0x00100000
   /*
-    * driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
+	* driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
 	*/
   driver_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00100000, LENGTH = 0x00100000
 }
@@ -44,10 +44,11 @@ SECTIONS
 		OBJDIR/exceptions.o(.text)
 		OBJDIR/driver_vec.o(.text)
 		OBJDIR/interrupts.o(.text)
-		OBJDIR/mmu.o(.text)		
-		
+		OBJDIR/mmu.o(.text)
+
 		OBJDIR/BaS.o(.text)
 		OBJDIR/pci.o(.text)
+		OBJDIR/pci_wrappers.o(.text)
 		OBJDIR/usb.o(.text)
 		OBJDIR/driver_mem.o(.text)
 		OBJDIR/usb_mouse.o(.text)
@@ -108,7 +109,7 @@ SECTIONS
 		OBJDIR/xhdi_sd.o(.text)
 		OBJDIR/xhdi_interface.o(.text)
 		OBJDIR/xhdi_vec.o(.text)
-		
+
 #ifdef COMPILE_RAM
 		/*
 		 * if we compile to RAM anyway, there is no need to copy anything
@@ -118,7 +119,7 @@ SECTIONS
 		*(.data)
 		__BAS_DATA_END = .;
 		__BAS_BSS_START = .;
-		*(.bss)	
+		*(.bss)
 		__BAS_BSS_END = .;
 #endif /* COMPILE_RAM */

@@ -140,7 +141,7 @@ SECTIONS
 		*(.data)
 		__BAS_DATA_END = .;
 		__BAS_BSS_START = .;
-		*(.bss)	
+		*(.bss)
 		__BAS_BSS_END = .;

 		. = ALIGN(16);
@@ -153,16 +154,16 @@ SECTIONS
 		_driver_mem_buffer = .;
 		//. = . + DRIVER_MEM_BUFFER_SIZE;
 	} > driver_ram
-	
+
 	/*
 	 * Global memory map
 	 */

 	/* SDRAM Initialization */
- 	___SDRAM                = SDRAM_START;
- 	___SDRAM_SIZE           = SDRAM_SIZE;
+	___SDRAM                = SDRAM_START;
+	___SDRAM_SIZE           = SDRAM_SIZE;
 	_SDRAM_VECTOR_TABLE		= ___SDRAM;
-	
+
 	/* ST-RAM */
 	__STRAM                 = ___SDRAM;
 	__STRAM_END             = __TOS;
@@ -173,7 +174,7 @@ SECTIONS
 	/* FastRAM */
 	__FASTRAM               = 0x10000000;
 	__TARGET_ADDRESS		= TARGET_ADDRESS;
-	
+
 #if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
 	__FASTRAM_END           = __BAS_IN_RAM;
 #else
@@ -183,7 +184,7 @@ SECTIONS

 	/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
 	___BOOT_FLASH           = BOOTFLASH_BASE_ADDRESS;
- 	___BOOT_FLASH_SIZE      = BOOTFLASH_SIZE;
+	___BOOT_FLASH_SIZE      = BOOTFLASH_SIZE;

 #if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
 	/* BaS */
@@ -203,35 +204,40 @@ SECTIONS
 	__EMUTOS_SIZE           = 0x00100000;

 	/* where FPGA data lives in flash */
-	__FPGA_FLASH_DATA 		= 0xe0700000;
-	__FPGA_FLASH_DATA_SIZE 	= 0x100000;
+	__FPGA_CONFIG 		= 0xe0700000;
+	__FPGA_CONFIG_SIZE 	= 0x100000;

 	/* VIDEO RAM BASIS */
 	__VRAM                  = 0x60000000;

 	/* Memory mapped registers */
- 	__MBAR                  = 0xFF000000;
-	
+	__MBAR                  = 0xFF000000;
+
 	/* 32KB on-chip System SRAM */
- 	__SYS_SRAM              = __MBAR + 0x10000;
+	__SYS_SRAM              = __MBAR + 0x10000;
 	__SYS_SRAM_SIZE         = 0x00008000;

 	/* MMU memory mapped registers */
- 	__MMUBAR                = 0xFF040000;
+	__MMUBAR                = 0xFF040000;

 	/*
-	 * 4KB on-chip Core SRAM0: -> exception table 
+	 * 4KB on-chip Core SRAM0: -> exception table
 	 */
- 	__RAMBAR0               = 0xFF100000;
- 	__RAMBAR0_SIZE          = 0x00001000;
+	__RAMBAR0               = 0xFF100000;
+	__RAMBAR0_SIZE          = 0x00001000;

 	/* 4KB on-chip Core SRAM1 */
- 	__RAMBAR1               = 0xFF101000;
- 	__RAMBAR1_SIZE          = 0x00001000;
- 	__SUP_SP                = __RAMBAR0 + __RAMBAR0_SIZE - 4;
+	__RAMBAR1               = 0xFF101000;
+	__RAMBAR1_SIZE          = 0x00001000;
+	__SUP_SP                = __RAMBAR1 + __RAMBAR1_SIZE - 4;

+	/*
+	 * this flag (if 1) indicates that FPGA configuration has been loaded through JTAG
+	 * and shouldn't be overwritten on boot
+	 */
+	__FPGA_JTAG_LOADED		= __RAMBAR1;
 	/* system variables */
-	
+
 	/* RAMBAR0 0 to 0x7FF -> exception vectors */
 	_rt_mod    = __RAMBAR0 + 0x800;
 	_rt_ssp    = __RAMBAR0 + 0x804;
--- a/dma/dma.c
+++ b/dma/dma.c
@@ -39,7 +39,7 @@
 #error "unknown machine!"
 #endif /* MACHINE_FIREBEE */

-#define DBG_DMA
+// #define DBG_DMA
 #ifdef DBG_DMA
 #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
 #else
@@ -58,13 +58,13 @@ struct dma_channel
 static char used_reqs[32] =
 {
 	DMA_ALWAYS,  DMA_DSPI_RXFIFO, DMA_DSPI_TXFIFO, DMA_DREQ0,
-    DMA_PSC0_RX, DMA_PSC0_TX, DMA_USB_EP0,  DMA_USB_EP1,
-    DMA_USB_EP2,  DMA_USB_EP3,  DMA_PCI_TX,  DMA_PCI_RX,
-    DMA_PSC1_RX, DMA_PSC1_TX, DMA_I2C_RX,  DMA_I2C_TX,
-    0,           0,           0,           0,
-    0,           0,           0,           0,
-    0,           0,           0,           0,
-    0,           0,           0,           0
+	DMA_PSC0_RX, DMA_PSC0_TX, DMA_USB_EP0,  DMA_USB_EP1,
+	DMA_USB_EP2,  DMA_USB_EP3,  DMA_PCI_TX,  DMA_PCI_RX,
+	DMA_PSC1_RX, DMA_PSC1_TX, DMA_I2C_RX,  DMA_I2C_TX,
+	0,           0,           0,           0,
+	0,           0,           0,           0,
+	0,           0,           0,           0,
+	0,           0,           0,           0
 };

 static struct dma_channel dma_channel[NCHANNELS] =
@@ -225,7 +225,7 @@ int dma_set_initiator(int initiator)
 			else /* No empty slots */
 			{
 				dbg("%s: no free slot\r\n", __FUNCTION__);
-				
+
 				return 1;
 			}
 			break;
@@ -530,7 +530,7 @@ int dma_get_channel(int requestor)
 }

 /*
- * Remove the channel being initiated by the given requestor from 
+ * Remove the channel being initiated by the given requestor from
 * the active list
 *
 * Parameters:
@@ -551,8 +551,8 @@ void dma_free_channel(int requestor)
 	}
 }

-/* 
- * This is the catch-all interrupt handler for the mult-channel DMA 
+/*
+ * This is the catch-all interrupt handler for the mult-channel DMA
 */
 int dma_interrupt_handler(void *arg1, void *arg2)
 {
@@ -560,8 +560,8 @@ int dma_interrupt_handler(void *arg1, void *arg2)

 	(void) set_ipl(7);

-	/* 
-	 * Determine which interrupt(s) triggered by AND'ing the 
+	/*
+	 * Determine which interrupt(s) triggered by AND'ing the
 	 * pending interrupts with those that aren't masked.
 	 */
 	interrupts = MCF_DMA_DIPR & ~MCF_DMA_DIMR;
@@ -598,9 +598,9 @@ void *dma_memcpy(void *dst, void *src, size_t n)
 	int ret;

 #ifdef DBG_DMA
-    int32_t time;
-    int32_t start;
-    int32_t end;
+	int32_t time;
+	int32_t start;
+	int32_t end;

 	start = MCF_SLT0_SCNT;
 #endif /* DBG_DMA */
--- a/flash_scripts/flash_firebee_bas.bdm
+++ b/flash_scripts/flash_firebee_bas.bdm
@@ -1,4 +1,4 @@
-#!/usr/local/bin/bdmctrl 
+#!/usr/local/bin/bdmctrl -D2
 #
 # firebee board initialization for bdmctrl 
 #
@@ -21,32 +21,32 @@ write 0xFF000508 0x00001180 4
 write 0xFF000504 0x007F0001 4

 # SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
-write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
-write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
-write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
-write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
-write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
-write 0xFF000108 0x73622830 4 # SDCFG1
-write 0xFF00010C 0x46770000 4 # SDCFG2
+#write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
+#write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
+#write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
+#write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
+#write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
+#write 0xFF000108 0x73622830 4 # SDCFG1
+#write 0xFF00010C 0x46770000 4 # SDCFG2

-write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
-write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
-write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
-sleep 100
-write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
-write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
-write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
-write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
-write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
-sleep 10
+#write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
+#write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
+#write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
+#sleep 100
+#write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
+#write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
+#write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
+#write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
+#write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
+#sleep 10


 # use system sdram as flashlib scratch area.
 # TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
 # This seems to be related to large flash buffers and PC-relative adressing of the plugin
-flash-plugin 0x1000 0xf000 flash29.plugin
+#flash-plugin 0x1000 0xf000 flash29-5475.plugin
 # notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
-flash 0xE0000000
+flash 0xe0000000

 # Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS)
 #
@@ -55,17 +55,44 @@ flash 0xE0000000
 #
 # contrary to documentation, it seems we need to erase-wait after each sector

-erase 0xE0000000 0
-erase 0xE0000000 1
-erase 0xE0000000 2
-erase 0xE0000000 3
-erase 0xE0000000 4
-erase 0xE0000000 5
-erase 0xE0000000 7
-erase 0xE0000000 8
-erase 0xE0000000 9
-erase 0xE0000000 10
-erase-wait 0xE0000000
+erase 0xe0000000 0
+erase-wait 0xe0000000
+erase 0xe0000000 0x1000
+erase-wait 0xe0000000
+erase 0xe0000000 0x2000
+erase-wait 0xe0000000
+erase 0xe0000000 0x3000
+erase-wait 0xe0000000
+erase 0xe0000000 0x4000
+erase-wait 0xe0000000
+erase 0xe0000000 0x5000
+erase-wait 0xe0000000
+erase 0xe0000000 0x6000
+erase-wait 0xe0000000
+erase 0xe0000000 0x7000
+erase-wait 0xe0000000
+erase 0xe0000000 0x8000
+erase-wait 0xe0000000
+erase 0xe0000000 0x10000
+erase-wait 0xe0000000
+erase 0xe0000000 0x18000
+erase-wait 0xe0000000
+erase 0xe0000000 0x20000
+erase-wait 0xe0000000
+erase 0xe0000000 0x28000
+erase-wait 0xe0000000
+erase 0xe0000000 0x30000
+erase-wait 0xe0000000
+erase 0xe0000000 0x38000
+erase-wait 0xe0000000
+erase 0xe0000000 0x40000
+erase-wait 0xe0000000
+erase 0xe0000000 0x48000
+erase-wait 0xe0000000
+erase 0xe0000000 0x50000
+erase-wait 0xe0000000
+erase 0xe0000000 0x58000
+erase-wait 0xe0000000

 load -v ../firebee/bas.elf
 wait
--- a/if/driver_vec.c
+++ b/if/driver_vec.c
@@ -30,6 +30,7 @@
 #include "dma.h"
 #include "driver_vec.h"
 #include "driver_mem.h"
+#include "pci.h"

 /*
 * driver interface struct for the SD card BaS driver
@@ -69,6 +70,58 @@ static struct dma_driver_interface dma_interface =

 extern const struct fb_info *info_fb;

+/*
+ * driver interface struct for the PCI_BIOS BaS driver
+ */
+static struct pci_bios_interface pci_interface = 
+{
+	.subjar = 0,
+	.version = 0x00010000,
+	.find_pci_device = wrapper_find_pci_device,
+	.find_pci_classcode = wrapper_find_pci_classcode,
+	.read_config_byte = wrapper_read_config_byte,
+	.read_config_word = wrapper_read_config_word,
+	.read_config_longword = wrapper_read_config_longword,
+	.fast_read_config_byte = wrapper_fast_read_config_byte,
+	.fast_read_config_word = wrapper_fast_read_config_word,
+	.fast_read_config_longword = wrapper_fast_read_config_longword,
+	.write_config_byte = wrapper_write_config_byte,
+	.write_config_word = wrapper_write_config_word,
+	.write_config_longword = wrapper_write_config_longword,
+	.hook_interrupt = wrapper_hook_interrupt,
+	.unhook_interrupt = wrapper_unhook_interrupt,
+	.special_cycle = wrapper_special_cycle,
+	.get_routing = wrapper_get_routing,
+	.set_interrupt = wrapper_set_interrupt,
+	.get_resource = wrapper_get_resource,
+	.get_card_used = wrapper_get_card_used,
+	.set_card_used = wrapper_set_card_used,
+	.read_mem_byte = wrapper_read_mem_byte,
+	.read_mem_word = wrapper_read_mem_word,
+	.read_mem_longword = wrapper_read_mem_longword,
+	.fast_read_mem_byte = wrapper_fast_read_mem_byte,
+	.fast_read_mem_word = wrapper_fast_read_mem_word,
+	.fast_read_mem_longword = wrapper_fast_read_mem_longword,
+	.write_mem_byte = wrapper_write_mem_byte,
+	.write_mem_word = wrapper_write_mem_word,
+	.write_mem_longword = wrapper_write_mem_longword,
+	.read_io_byte = wrapper_read_io_byte,
+	.read_io_word = wrapper_read_io_word,
+	.read_io_longword = wrapper_read_io_longword,
+	.fast_read_io_byte = wrapper_fast_read_io_byte,
+	.fast_read_io_word = wrapper_fast_read_io_word,
+	.fast_read_io_longword = wrapper_fast_read_io_longword,
+	.write_io_byte = wrapper_write_io_byte,
+	.write_io_word = wrapper_write_io_word,
+	.write_io_longword = wrapper_write_io_longword,
+	.get_machine_id = wrapper_get_machine_id,
+	.get_pagesize = wrapper_get_pagesize,
+	.virt_to_bus = wrapper_virt_to_bus,
+	.bus_to_virt = wrapper_bus_to_virt,
+	.virt_to_phys = wrapper_virt_to_phys,
+	.phys_to_virt = wrapper_phys_to_virt,
+};
+
 /*
 * driver interface struct for the BaS framebuffer video driver
 */
@@ -105,7 +158,14 @@ static struct generic_interface interfaces[] =
 		.revision = 1,
 		.interface.fb = &framebuffer_interface,
 	},
-
+	{
+		.type = PCI_DRIVER,
+		.name = "PCI",
+		.description = "BaS PCI_BIOS driver",
+		.version = 0,
+		.revision = 1,
+		.interface.pci = &pci_interface,
+	},
 	/* insert new drivers here */

 	{
--- a/include/driver_vec.h
+++ b/include/driver_vec.h
@@ -27,15 +27,17 @@

 #include "xhdi_sd.h"
 #include "MCD_dma.h"
+#include "pci.h"

 enum driver_type
 {
-	END_OF_DRIVERS,		/* marks end of driver list */
-	BLOCKDEV_DRIVER,
-	CHARDEV_DRIVER,
-	VIDEO_DRIVER,
+//	BLOCKDEV_DRIVER,
+//	CHARDEV_DRIVER,
 	XHDI_DRIVER,
 	MCD_DRIVER,
+	VIDEO_DRIVER,
+	PCI_DRIVER,
+	END_OF_DRIVERS,		/* marks end of driver list */
 };

 struct generic_driver_interface
@@ -204,12 +206,66 @@ struct framebuffer_driver_interface
 	struct fb_info **framebuffer_info;	/* pointer to an fb_info struct (defined in include/fb.h) */
 };

+struct pci_bios_interface {
+	uint32_t subjar;
+	uint32_t version;
+	/* Although we declare this functions as standard gcc functions (cdecl),
+	 * they expect paramenters inside registers (fastcall) unsupported by gcc m68k.
+	 * Caller will take care of parameters passing convention.
+	 */
+	int32_t (*find_pci_device)	(uint32_t id, uint16_t index);
+	int32_t (*find_pci_classcode)	(uint32_t class, uint16_t index);
+	int32_t (*read_config_byte)	(int32_t handle, uint16_t reg, uint8_t *address);
+	int32_t (*read_config_word)	(int32_t handle, uint16_t reg, uint16_t *address);
+	int32_t (*read_config_longword)	(int32_t handle, uint16_t reg, uint32_t *address);
+	uint8_t (*fast_read_config_byte)	(int32_t handle, uint16_t reg);
+	uint16_t (*fast_read_config_word)	(int32_t handle, uint16_t reg);
+	uint32_t (*fast_read_config_longword)	(int32_t handle, uint16_t reg);
+	int32_t (*write_config_byte)	(int32_t handle, uint16_t reg, uint16_t val);
+	int32_t (*write_config_word)	(int32_t handle, uint16_t reg, uint16_t val);
+	int32_t (*write_config_longword)	(int32_t handle, uint16_t reg, uint32_t val);
+	int32_t (*hook_interrupt)	(int32_t handle, uint32_t *routine, uint32_t *parameter);
+	int32_t (*unhook_interrupt)	(int32_t handle);
+	int32_t (*special_cycle)	(uint16_t bus, uint32_t data);
+	int32_t (*get_routing)	(int32_t handle);
+	int32_t (*set_interrupt)	(int32_t handle);
+	int32_t (*get_resource)	(int32_t handle);
+	int32_t (*get_card_used)	(int32_t handle, uint32_t *address);
+	int32_t (*set_card_used)	(int32_t handle, uint32_t *callback);
+	int32_t (*read_mem_byte)	(int32_t handle, uint32_t offset, uint8_t *address);
+	int32_t (*read_mem_word)	(int32_t handle, uint32_t offset, uint16_t *address);
+	int32_t (*read_mem_longword)	(int32_t handle, uint32_t offset, uint32_t *address);
+	uint8_t (*fast_read_mem_byte)	(int32_t handle, uint32_t offset);
+	uint16_t (*fast_read_mem_word)	(int32_t handle, uint32_t offset);
+	uint32_t (*fast_read_mem_longword)	(int32_t handle, uint32_t offset);
+	int32_t (*write_mem_byte)	(int32_t handle, uint32_t offset, uint16_t val);
+	int32_t (*write_mem_word)	(int32_t handle, uint32_t offset, uint16_t val);
+	int32_t (*write_mem_longword)	(int32_t handle, uint32_t offset, uint32_t val);
+	int32_t (*read_io_byte)	(int32_t handle, uint32_t offset, uint8_t *address);
+	int32_t (*read_io_word)	(int32_t handle, uint32_t offset, uint16_t *address);
+	int32_t (*read_io_longword)	(int32_t handle, uint32_t offset, uint32_t *address);
+	uint8_t (*fast_read_io_byte)	(int32_t handle, uint32_t offset);
+	uint16_t (*fast_read_io_word)	(int32_t handle, uint32_t offset);
+	uint32_t (*fast_read_io_longword)	(int32_t handle, uint32_t offset);
+	int32_t (*write_io_byte)	(int32_t handle, uint32_t offset, uint16_t val);
+	int32_t (*write_io_word)	(int32_t handle, uint32_t offset, uint16_t val);
+	int32_t (*write_io_longword)	(int32_t handle, uint32_t offset, uint32_t val);
+	int32_t (*get_machine_id)	(void);
+	int32_t (*get_pagesize)	(void);
+	int32_t (*virt_to_bus)	(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+	int32_t (*bus_to_virt)	(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+	int32_t (*virt_to_phys)	(uint32_t address, PCI_CONV_ADR *pointer);
+	int32_t (*phys_to_virt)	(uint32_t address, PCI_CONV_ADR *pointer);
+//	int32_t reserved[2];
+};
+
 union interface
 {
 	struct generic_driver_interface *gdi;
 	struct xhdi_driver_interface *xhdi;
 	struct dma_driver_interface *dma;
 	struct framebuffer_driver_interface *fb;
+	struct pci_bios_interface *pci;
 };

 struct generic_interface
--- a/include/font.h
+++ b/include/font.h
@@ -0,0 +1,98 @@
+/*
+ * font.h - font specific definitions
+ *
+ * Copyright (c) 2001 Lineo, Inc.
+ * Copyright (c) 2004 by Authors:
+ *
+ * Authors:
+ *  MAD     Martin Doering
+ *
+ * This file is distributed under the GPL, version 2 or at your
+ * option any later version.  See doc/license.txt for details.
+ */
+
+#ifndef FONT_H
+#define FONT_H
+
+#include <stdint.h>
+
+/* font header flags */
+
+#define F_DEFAULT 1     /* this is the default font (face and size) */
+#define F_HORZ_OFF  2   /* there are left and right offset tables */
+#define F_STDFORM  4    /* is the font in standard format */
+#define F_MONOSPACE 8   /* is the font monospaced */
+
+/* font style bits */
+
+#define F_THICKEN 1
+#define F_LIGHT 2
+#define F_SKEW  4
+#define F_UNDER 8
+#define F_OUTLINE 16
+#define F_SHADOW        32
+
+/* font specific linea variables */
+
+extern const uint16_t *v_fnt_ad;   /* address of current monospace font */
+extern const uint16_t *v_off_ad;   /* address of font offset table */
+extern uint16_t v_fnt_nd;          /* ascii code of last cell in font */
+extern uint16_t v_fnt_st;          /* ascii code of first cell in font */
+extern uint16_t v_fnt_wr;          /* font cell wrap */
+
+/* character cell specific linea variables */
+
+extern uint16_t    v_cel_ht;       /* cell height (width is 8) */
+extern uint16_t    v_cel_mx;       /* needed by MiNT: columns on the screen minus 1 */
+extern uint16_t    v_cel_my;       /* needed by MiNT: rows on the screen minus 1 */
+extern uint16_t    v_cel_wr;       /* needed by MiNT: length (in int8_ts) of a line of characters */
+
+/*
+ * font_ring is a struct of four pointers, each of which points to
+ * a list of font headers linked together to form a string.
+ */
+
+extern struct font_head *font_ring[4];  /* Ring of available fonts */
+extern int16_t font_count;                 /* all three fonts and NULL */
+
+/* the font header descibes a font */
+
+struct font_head {
+    int16_t font_id;
+    int16_t point;
+    int8_t name[32];
+    uint16_t first_ade;
+    uint16_t last_ade;
+    uint16_t top;
+    uint16_t ascent;
+    uint16_t half;
+    uint16_t descent;
+    uint16_t bottom;
+    uint16_t max_char_width;
+    uint16_t max_cell_width;
+    uint16_t left_offset;          /* amount character slants left when skewed */
+    uint16_t right_offset;         /* amount character slants right */
+    uint16_t thicken;              /* number of pixels to smear */
+    uint16_t ul_size;              /* size of the underline */
+    uint16_t lighten;              /* mask to and with to lighten  */
+    uint16_t skew;                 /* mask for skewing */
+    uint16_t flags;
+
+    const uint8_t *hor_table;     /* horizontal offsets */
+    const uint16_t *off_table;     /* character offsets  */
+    const uint16_t *dat_table;     /* character definitions */
+    uint16_t form_width;
+    uint16_t form_height;
+
+    struct font_head *next_font;/* pointer to next font */
+    uint16_t font_seg;
+};
+
+
+
+/* prototypes */
+
+void font_init(void);           /* initialize BIOS font ring */
+void font_set_default(void);    /* choose the default font */
+
+#endif /* FONT_H */
--- a/include/pci.h
+++ b/include/pci.h
@@ -243,10 +243,94 @@ extern int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t va
 extern int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value);
 extern int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value);

-extern struct pci_rd *pci_get_resource(int32_t handle);
 extern int32_t pci_hook_interrupt(int32_t handle, void *interrupt_handler, void *parameter);
 extern int32_t pci_unhook_interrupt(int32_t handle);

+extern struct pci_rd *pci_get_resource(int32_t handle);
+
+/*
+ * Not implemented PCI_BIOS functions
+ */
+extern uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg);
+extern uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg);
+extern uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg);
+extern int32_t pci_special_cycle(uint16_t bus, uint32_t data);
+extern int32_t pci_get_routing(int32_t handle);
+extern int32_t pci_set_interrupt(int32_t handle);
+extern int32_t pci_get_card_used(int32_t handle, uint32_t *address);
+extern int32_t pci_set_card_used(int32_t handle, uint32_t *callback);
+extern int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset);
+extern uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset);
+extern uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset);
+extern int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset);
+extern uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset);
+extern uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset);
+extern int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t pci_get_machine_id(void);
+extern int32_t pci_get_pagesize(void);
+extern int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
+
+/*
+ * prototypes for PCI wrapper routines
+ */
+extern int32_t wrapper_find_pci_device(uint32_t id, uint16_t index);
+extern int32_t wrapper_find_pci_classcode(uint32_t class, uint16_t index);
+extern int32_t wrapper_read_config_byte(int32_t handle, uint16_t reg, uint8_t *address);
+extern int32_t wrapper_read_config_word(int32_t handle, uint16_t reg, uint16_t *address);
+extern int32_t wrapper_read_config_longword(int32_t handle, uint16_t reg, uint32_t *address);
+extern uint8_t wrapper_fast_read_config_byte(int32_t handle, uint16_t reg);
+extern uint16_t wrapper_fast_read_config_word(int32_t handle, uint16_t reg);
+extern uint32_t wrapper_fast_read_config_longword(int32_t handle, uint16_t reg);
+extern int32_t wrapper_write_config_byte(int32_t handle, uint16_t reg, uint16_t val);
+extern int32_t wrapper_write_config_word(int32_t handle, uint16_t reg, uint16_t val);
+extern int32_t wrapper_write_config_longword(int32_t handle, uint16_t reg, uint32_t val);
+extern int32_t wrapper_hook_interrupt(int32_t handle, uint32_t *routine, uint32_t *parameter);
+extern int32_t wrapper_unhook_interrupt(int32_t handle);
+extern int32_t wrapper_special_cycle(uint16_t bus, uint32_t data);
+extern int32_t wrapper_get_routing(int32_t handle);
+extern int32_t wrapper_set_interrupt(int32_t handle);
+extern int32_t wrapper_get_resource(int32_t handle);
+extern int32_t wrapper_get_card_used(int32_t handle, uint32_t *address);
+extern int32_t wrapper_set_card_used(int32_t handle, uint32_t *callback);
+extern int32_t wrapper_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t wrapper_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t wrapper_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t wrapper_fast_read_mem_byte(int32_t handle, uint32_t offset);
+extern uint16_t wrapper_fast_read_mem_word(int32_t handle, uint32_t offset);
+extern uint32_t wrapper_fast_read_mem_longword(int32_t handle, uint32_t offset);
+extern int32_t wrapper_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t wrapper_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t wrapper_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t wrapper_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t wrapper_fast_read_io_byte(int32_t handle, uint32_t offset);
+extern uint16_t wrapper_fast_read_io_word(int32_t handle, uint32_t offset);
+extern uint32_t wrapper_fast_read_io_longword(int32_t handle, uint32_t offset);
+extern int32_t wrapper_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t wrapper_get_machine_id(void);
+extern int32_t wrapper_get_pagesize(void);
+extern int32_t wrapper_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
+
 #define PCI_MK_CONF_ADDR(bus, device, function)	(MCF_PCI_PCICAR_E | \
 												((bus) << 16) | \
 												((device << 8) | \
--- a/include/version.h
+++ b/include/version.h
@@ -29,7 +29,7 @@
 */

 #define MAJOR_VERSION	0
-#define MINOR_VERSION	84
+#define MINOR_VERSION	86


 #endif /* VERSION_H_ */
--- a/net/fec.c
+++ b/net/fec.c
@@ -32,7 +32,7 @@
 #error Unknown machine!
 #endif

-#define DBG_FEC
+// #define DBG_FEC
 #ifdef DBG_FEC
 #define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
@@ -237,33 +237,33 @@ void fec_log_init(uint8_t ch)
 */
 void fec_log_dump(uint8_t ch)
 {
-    dbg("\r\n   FEC%d Log\r\n", __FUNCTION__, ch);
-    dbg("   ---------------\r\n", __FUNCTION__);
-    dbg(" Total: %4d\r\n", fec_log[ch].total);
-    dbg(" hberr: %4d\r\n", fec_log[ch].hberr);
-    dbg(" babr:  %4d\r\n", fec_log[ch].babr);
-    dbg(" babt:  %4d\r\n", fec_log[ch].babt);
-    dbg(" gra:   %4d\r\n", fec_log[ch].gra);
-    dbg(" txf:   %4d\r\n", fec_log[ch].txf);
-    dbg(" mii:   %4d\r\n", fec_log[ch].mii);
-    dbg(" lc:    %4d\r\n", fec_log[ch].lc);
-    dbg(" rl:    %4d\r\n", fec_log[ch].rl);
-    dbg(" xfun:  %4d\r\n", fec_log[ch].xfun);
-    dbg(" xferr: %4d\r\n", fec_log[ch].xferr);
-    dbg(" rferr: %4d\r\n", fec_log[ch].rferr);
-    dbg(" dtxf:  %4d\r\n", fec_log[ch].dtxf);
-    dbg(" drxf:  %4d\r\n", fec_log[ch].drxf);
-    dbg(" \r\nRFSW:\r\n");
-    dbg(" inv:   %4d\r\n", fec_log[ch].rfsw_inv);
-    dbg(" m:     %4d\r\n", fec_log[ch].rfsw_m);
-    dbg(" bc:    %4d\r\n", fec_log[ch].rfsw_bc);
-    dbg(" mc:    %4d\r\n", fec_log[ch].rfsw_mc);
-    dbg(" lg:    %4d\r\n", fec_log[ch].rfsw_lg);
-    dbg(" no:    %4d\r\n", fec_log[ch].rfsw_no);
-    dbg(" cr:    %4d\r\n", fec_log[ch].rfsw_cr);
-    dbg(" ov:    %4d\r\n", fec_log[ch].rfsw_ov);
-    dbg(" tr:    %4d\r\n", fec_log[ch].rfsw_tr);
-    dbg(" ---------------\r\n\r\n");
+	dbg("\r\n   FEC%d Log\r\n", __FUNCTION__, ch);
+	dbg("   ---------------\r\n", __FUNCTION__);
+	dbg(" Total: %4d\r\n", fec_log[ch].total);
+	dbg(" hberr: %4d\r\n", fec_log[ch].hberr);
+	dbg(" babr:  %4d\r\n", fec_log[ch].babr);
+	dbg(" babt:  %4d\r\n", fec_log[ch].babt);
+	dbg(" gra:   %4d\r\n", fec_log[ch].gra);
+	dbg(" txf:   %4d\r\n", fec_log[ch].txf);
+	dbg(" mii:   %4d\r\n", fec_log[ch].mii);
+	dbg(" lc:    %4d\r\n", fec_log[ch].lc);
+	dbg(" rl:    %4d\r\n", fec_log[ch].rl);
+	dbg(" xfun:  %4d\r\n", fec_log[ch].xfun);
+	dbg(" xferr: %4d\r\n", fec_log[ch].xferr);
+	dbg(" rferr: %4d\r\n", fec_log[ch].rferr);
+	dbg(" dtxf:  %4d\r\n", fec_log[ch].dtxf);
+	dbg(" drxf:  %4d\r\n", fec_log[ch].drxf);
+	dbg(" \r\nRFSW:\r\n");
+	dbg(" inv:   %4d\r\n", fec_log[ch].rfsw_inv);
+	dbg(" m:     %4d\r\n", fec_log[ch].rfsw_m);
+	dbg(" bc:    %4d\r\n", fec_log[ch].rfsw_bc);
+	dbg(" mc:    %4d\r\n", fec_log[ch].rfsw_mc);
+	dbg(" lg:    %4d\r\n", fec_log[ch].rfsw_lg);
+	dbg(" no:    %4d\r\n", fec_log[ch].rfsw_no);
+	dbg(" cr:    %4d\r\n", fec_log[ch].rfsw_cr);
+	dbg(" ov:    %4d\r\n", fec_log[ch].rfsw_ov);
+	dbg(" tr:    %4d\r\n", fec_log[ch].rfsw_tr);
+	dbg(" ---------------\r\n\r\n");
 }

 /*
@@ -538,19 +538,26 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
 {
 	uint32_t initiator;
 	int channel;
+#ifdef DBG_FEC
 	int res;
+#endif

 	/*
 	 * Make the initiator assignment
 	 */
-	res = dma_set_initiator(DMA_FEC_RX(ch));
-    dbg("dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", ch, res);
+#if defined(DBG_FEC)
+    res =
+#else
+    (void)
+#endif
+    dma_set_initiator(DMA_FEC_RX(ch));
+	dbg("dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", ch, res);

 	/*
 	 * Grab the initiator number
 	 */
 	initiator = dma_get_initiator(DMA_FEC_RX(ch));
-    dbg("dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", ch, initiator);
+	dbg("dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", ch, initiator);

 	/*
 	 * Determine the DMA channel running the task for the
@@ -558,7 +565,7 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
 	 */
 	channel = dma_set_channel(DMA_FEC_RX(ch),
 			(ch == 0) ? fec0_rx_frame : fec1_rx_frame);
-    dbg("DMA channel for FEC%1d: %d\r\n", ch, channel);
+	dbg("DMA channel for FEC%1d: %d\r\n", ch, channel);

 	/*
 	 * Start the Rx DMA task
@@ -572,18 +579,18 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
 			0,
 			initiator,
 			FECRX_DMA_PRI(ch),
-			0 
-			| MCD_FECRX_DMA   
+			0
+			| MCD_FECRX_DMA
 			| MCD_INTERRUPT
-			| MCD_TT_FLAGS_CW 
+			| MCD_TT_FLAGS_CW
 			| MCD_TT_FLAGS_RL
 			| MCD_TT_FLAGS_SP
 			,
-			0 
+			0
 			| MCD_NO_CSUM
 			| MCD_NO_BYTE_SWAP
 			);
-    dbg("Rx DMA task for FEC%1d started\r\n", ch);
+	dbg("Rx DMA task for FEC%1d started\r\n", ch);
 }

 /*
@@ -607,13 +614,13 @@ void fec_rx_continue(uint8_t ch)
 	 */
 	channel = dma_get_channel(DMA_FEC_RX(ch));

-    dbg("RX DMA channel for FEC%1d is %d\r\n", ch, channel);
+	dbg("RX DMA channel for FEC%1d is %d\r\n", ch, channel);

 	/*
 	 * Continue/restart the DMA task
 	 */
 	MCD_continDma(channel);
-    dbg("RX dma on channel %d continued\r\n", channel);
+	dbg("RX dma on channel %d continued\r\n", channel);
 }

 /*
@@ -642,9 +649,9 @@ void fec_rx_stop (uint8_t ch)
 	/* Kill the FEC Rx DMA task */
 	MCD_killDma(channel);

-	/* 
-	 * Free up the FEC requestor from the software maintained 
-	 * initiator list 
+	/*
+	 * Free up the FEC requestor from the software maintained
+	 * initiator list
 	 */
 	dma_free_initiator(DMA_FEC_RX(ch));

@@ -656,7 +663,7 @@ void fec_rx_stop (uint8_t ch)
 }

 /*
- * Receive Frame interrupt handler - this handler is called by the 
+ * Receive Frame interrupt handler - this handler is called by the
 * DMA interrupt handler indicating that a packet was successfully
 * transferred out of the Rx FIFO.
 *
@@ -671,7 +678,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 	NBUF *cur_nbuf, *new_nbuf;
 	int keep;

-    dbg("started\r\n");
+	dbg("started\r\n");

 	while ((pRxBD = fecbd_rx_alloc(ch)) != NULL)
 	{
@@ -684,7 +691,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 		 *  - No undefined bits should be set
 		 *  - The upper 5 bits of the length should be cleared
 		 */
-		if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608) 
+		if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608)
 				|| (pRxBD->length & 0xF800))
 		{
 			keep = false;
@@ -716,8 +723,8 @@ void fec_rx_frame(uint8_t ch, NIF *nif)

 		if (keep)
 		{
-			/* 
-			 * Pull the network buffer off the Rx ring queue 
+			/*
+			 * Pull the network buffer off the Rx ring queue
 			 */
 			cur_nbuf = nbuf_remove(NBUF_RX_RING);

@@ -733,7 +740,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			new_nbuf = nbuf_alloc();
 			if (new_nbuf == NULL)
 			{
-                dbg("nbuf_alloc() failed\n");
+				dbg("nbuf_alloc() failed\n");

 				/*
 				 * Can't allocate a new network buffer, so we
@@ -767,7 +774,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)


 			/*
-			 * Let the DMA know that there is a new Rx BD (in case the 
+			 * Let the DMA know that there is a new Rx BD (in case the
 			 * ring was full and the DMA was waiting for an empty one)
 			 */
 			fec_rx_continue(ch);
@@ -778,7 +785,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			eth_hdr = (ETH_HDR *) cur_nbuf->data;

 			/*
-			 * Pass the received packet up the network stack if the 
+			 * Pass the received packet up the network stack if the
 			 * protocol is supported in our network interface (NIF)
 			 */
 			if (nif_protocol_exist(nif, eth_hdr->type))
@@ -789,12 +796,12 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			else
 			{
 				nbuf_free(cur_nbuf);
-                dbg("got unsupported packet %d, trashed it\r\n", eth_hdr->type);
+				dbg("got unsupported packet %d, trashed it\r\n", eth_hdr->type);
 			}
 		}
-		else 
+		else
 		{
-			/* 
+			/*
 			 * This frame isn't a keeper
 			 * Reset the status and length, but don't need to get another
 			 * buffer since we are trashing the data in the current one
@@ -804,7 +811,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
 			pRxBD->status |= RX_BD_E;

 			/*
-			 * Move the current buffer from the beginning to the end of the 
+			 * Move the current buffer from the beginning to the end of the
 			 * Rx ring queue
 			 */
 			cur_nbuf = nbuf_remove(NBUF_RX_RING);
@@ -844,22 +851,28 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
 {
 	uint32_t initiator;
 	int channel;
-	int result;
 	void fec0_tx_frame(void);
 	void fec1_tx_frame(void);
+#ifdef DBG_FEC
 	int res;
+#endif

 	/*
 	 * Make the initiator assignment
 	 */
-	res = dma_set_initiator(DMA_FEC_TX(ch));
-    dbg("dma_set_initiator(%d) = %d\r\n", ch, res);
+#ifdef DBG_FEC
+    res =
+#else
+    (void)
+#endif
+    dma_set_initiator(DMA_FEC_TX(ch));
+	dbg("dma_set_initiator(%d) = %d\r\n", ch, res);

 	/*
 	 * Grab the initiator number
 	 */
 	initiator = dma_get_initiator(DMA_FEC_TX(ch));
-    dbg("dma_get_initiator(%d) = %d\r\n", ch, initiator);
+	dbg("dma_get_initiator(%d) = %d\r\n", ch, initiator);


 	/*
@@ -868,7 +881,7 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
 	 */
 	channel = dma_set_channel(DMA_FEC_TX(ch),
 			(ch == 0) ? fec0_tx_frame : fec1_tx_frame);
-    dbg("dma_set_channel(%d, ...) = %d\r\n", ch, channel);
+	dbg("dma_set_channel(%d, ...) = %d\r\n", ch, channel);

 	/*
 	 * Start the Tx DMA task
@@ -882,18 +895,18 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
 			0,
 			initiator,
 			FECTX_DMA_PRI(ch),
-			0 
-			| MCD_FECTX_DMA   
+			0
+			| MCD_FECTX_DMA
 			| MCD_INTERRUPT
-			| MCD_TT_FLAGS_CW 
+			| MCD_TT_FLAGS_CW
 			| MCD_TT_FLAGS_RL
 			| MCD_TT_FLAGS_SP
 			,
-			0 
+			0
 			| MCD_NO_CSUM
 			| MCD_NO_BYTE_SWAP
 			);
-    dbg("DMA tx task started\r\n");
+	dbg("DMA tx task started\r\n");
 }

 /*
@@ -916,13 +929,13 @@ void fec_tx_continue(uint8_t ch)
 	 * selected FEC
 	 */
 	channel = dma_get_channel(DMA_FEC_TX(ch));
-    dbg("dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n", ch, channel);
+	dbg("dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n", ch, channel);

 	/*
 	 * Continue/restart the DMA task
 	 */
 	MCD_continDma(channel);
-    dbg("DMA TX task continue\r\n");
+	dbg("DMA TX task continue\r\n");
 }

 /*
@@ -969,9 +982,9 @@ void fec_tx_stop(uint8_t ch)
 	/* Kill the FEC Tx DMA task */
 	MCD_killDma(channel);

-	/* 
-	 * Free up the FEC requestor from the software maintained 
-	 * initiator list 
+	/*
+	 * Free up the FEC requestor from the software maintained
+	 * initiator list
 	 */
 	dma_free_initiator(DMA_FEC_TX(ch));

@@ -983,7 +996,7 @@ void fec_tx_stop(uint8_t ch)
 }

 /*
- * Trasmit Frame interrupt handler - this handler is called by the 
+ * Trasmit Frame interrupt handler - this handler is called by the
 * DMA interrupt handler indicating that a packet was successfully
 * transferred to the Tx FIFO.
 *
@@ -996,7 +1009,7 @@ void fec_tx_frame(uint8_t ch)
 	NBUF *pNbuf;
 	bool is_empty = true;

-    dbg("\r\n");
+	dbg("\r\n");
 	while ((pTxBD = fecbd_tx_free(ch)) != NULL)
 	{
 		fec_log[ch].dtxf++;
@@ -1010,7 +1023,7 @@ void fec_tx_frame(uint8_t ch)
 		 * Free up the network buffer that was just transmitted
 		 */
 		nbuf_free(pNbuf);
-        dbg("free buffer %p from TX ring\r\n", pNbuf);
+		dbg("free buffer %p from TX ring\r\n", pNbuf);

 		/*
 		 * Re-initialize the Tx BD
@@ -1019,9 +1032,9 @@ void fec_tx_frame(uint8_t ch)
 		pTxBD->length = 0;
 		is_empty = false;

-	}    
+	}
 	if (is_empty)
-        dbg("transmit queue was empty!\r\n");
+		dbg("transmit queue was empty!\r\n");
 }

 void fec0_tx_frame(void)
@@ -1044,7 +1057,7 @@ void fec1_tx_frame(void)
 *  dst     Destination MAC Address
 *  src     Source MAC Address
 *  type    Ethernet Frame Type
- *  length  Number of bytes to be transmitted (doesn't include type, 
+ *  length  Number of bytes to be transmitted (doesn't include type,
 *          src, or dest byte count)
 *  pkt     Pointer packet network buffer
 *
@@ -1059,14 +1072,14 @@ int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NB
 	/* Check the length */
 	if ((nbuf->length + ETH_HDR_LEN) > ETH_MTU)
 	{
-        dbg("nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n",
-                nbuf->length, ETH_HDR_LEN, ETH_MTU);
+		dbg("nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n",
+				nbuf->length, ETH_HDR_LEN, ETH_MTU);
 		return 0;
 	}

-	/* 
-	 * Copy the destination address, source address, and Ethernet 
-	 * type into the packet 
+	/*
+	 * Copy the destination address, source address, and Ethernet
+	 * type into the packet
 	 */
 	memcpy(&nbuf->data[0],  dst,   6);
 	memcpy(&nbuf->data[6],  src,   6);
@@ -1082,7 +1095,7 @@ int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NB
 	 */
 	nbuf_add(NBUF_TX_RING, nbuf);

-	/* 
+	/*
 	 * Setup the buffer descriptor for transmission
 	 */
 	pTxBD->data = nbuf->data;
@@ -1192,7 +1205,7 @@ static void fec_irq_handler(uint8_t ch)
 	event = eir & MCF_FEC_EIMR(ch);

 	if (event != eir)
-        dbg("pending but not enabled: 0x%08x\r\n", (event ^ eir));
+		dbg("pending but not enabled: 0x%08x\r\n", (event ^ eir));

 	/*
 	 * Clear the event(s) in the EIR immediately
@@ -1203,8 +1216,8 @@ static void fec_irq_handler(uint8_t ch)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].rferr++;
-        dbg("RFERR\r\n");
-        dbg("FECRFSR%d = 0x%08x\r\n", ch, MCF_FEC_FECRFSR(ch));
+		dbg("RFERR\r\n");
+		dbg("FECRFSR%d = 0x%08x\r\n", ch, MCF_FEC_FECRFSR(ch));
 		//fec_eth_stop(ch);
 	}

@@ -1212,14 +1225,14 @@ static void fec_irq_handler(uint8_t ch)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].xferr++;
-        dbg("XFERR\r\n");
+		dbg("XFERR\r\n");
 	}

 	if (event & MCF_FEC_EIR_XFUN)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].xfun++;
-        dbg("XFUN\r\n");
+		dbg("XFUN\r\n");
 		//fec_eth_stop(ch);
 	}

@@ -1227,54 +1240,54 @@ static void fec_irq_handler(uint8_t ch)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].rl++;
-        dbg("RL\r\n");
+		dbg("RL\r\n");
 	}

 	if (event & MCF_FEC_EIR_LC)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].lc++;
-        dbg("LC\r\n");
+		dbg("LC\r\n");
 	}

 	if (event & MCF_FEC_EIR_MII)
 	{
 		fec_log[ch].mii++;
-        dbg("MII\r\n");
+		dbg("MII\r\n");
 	}

 	if (event & MCF_FEC_EIR_TXF)
 	{
 		fec_log[ch].txf++;
-        dbg("TXF\r\n");
+		dbg("TXF\r\n");
 		fec_log_dump(0);
 	}

 	if (event & MCF_FEC_EIR_GRA)
 	{
 		fec_log[ch].gra++;
-        dbg("GRA\r\n");
+		dbg("GRA\r\n");
 	}

 	if (event & MCF_FEC_EIR_BABT)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].babt++;
-        dbg("BABT\r\n");
+		dbg("BABT\r\n");
 	}

 	if (event & MCF_FEC_EIR_BABR)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].babr++;
-        dbg("BABR\r\n");
+		dbg("BABR\r\n");
 	}

 	if (event & MCF_FEC_EIR_HBERR)
 	{
 		fec_log[ch].total++;
 		fec_log[ch].hberr++;
-        dbg("HBERR\r\n");
+		dbg("HBERR\r\n");
 	}
 }

@@ -1284,7 +1297,7 @@ static void fec_irq_handler(uint8_t ch)
 */
 int fec0_interrupt_handler(void* arg1, void* arg2)
 {
-	(void) arg1;
+    (void) arg1;    /* not used */
 	(void) arg2;

 	fec_irq_handler(0);
@@ -1294,7 +1307,7 @@ int fec0_interrupt_handler(void* arg1, void* arg2)

 int fec1_interrupt_handler(void* arg1, void* arg2)
 {
-	(void) arg1;
+    (void) arg1;    /* not used */
 	(void) arg2;

 	fec_irq_handler(1);
@@ -1344,9 +1357,9 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
 		 */
 #if defined(MACHINE_FIREBEE)
 		if (am79c874_init(0, 0, speed, duplex))
-            dbg("PHY init completed\r\n");
+			dbg("PHY init completed\r\n");
 		else
-            dbg("PHY init failed\r\n");
+			dbg("PHY init failed\r\n");
 #elif defined(MACHINE_M548X)
 		bcm_5222_init(0, 0, speed, duplex);
 #else
@@ -1399,7 +1412,7 @@ void fec_eth_stop(uint8_t ch)
 	 */
 	level = set_ipl(7);

-    dbg("fec %d stopped\r\n", ch);
+	dbg("fec %d stopped\r\n", ch);
 	/*
 	 * Gracefully disable the receiver and transmitter
 	 */
@@ -1421,12 +1434,12 @@ void fec_eth_stop(uint8_t ch)
 	fec_log_dump(ch);
 #endif

-	/* 
+	/*
 	 * Flush the network buffers
 	 */
 	nbuf_flush();

-	/* 
+	/*
 	 * Restore interrupt level
 	 */
 	set_ipl(level);
--- a/pci/pci.c
+++ b/pci/pci.c
@@ -35,7 +35,7 @@

 //#define DEBUG_PCI
 #ifdef DEBUG_PCI
-#define dbg(format, arg...) do { xprintf("DEBUG: " format "", ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DEBUG_PCI */
@@ -162,7 +162,7 @@ static int32_t pci_get_interrupt_cause(int32_t *handles)
 			return handle;
 		}
 	}
-	dbg("%s: no interrupt cause found\r\n", __FUNCTION__);
+    dbg("%s: no interrupt cause found\r\n");
 	return -1;
 }

@@ -189,7 +189,7 @@ void irq5_handler(void)
 		newvalue = pci_call_interrupt_chain(handle, value);
 		if (newvalue == value)
 		{
-			dbg("%s: interrupt not handled!\r\n", __FUNCTION__);
+            dbg("%s: interrupt not handled!\r\n");
 		}
 	}
 }
@@ -211,7 +211,7 @@ void irq7_handler(void)
 		newvalue = pci_call_interrupt_chain(handle, value);
 		if (newvalue == value)
 		{
-			dbg("%s: interrupt not handled!\r\n", __FUNCTION__);
+            dbg("%s: interrupt not handled!\r\n");
 		}
 	}
 }
@@ -587,7 +587,168 @@ int32_t pci_unhook_interrupt(int32_t handle)
 	return PCI_SUCCESSFUL;
 }

+/*
+ * Not implemented PCI_BIOS functions
+ */

+uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_special_cycle(uint16_t bus, uint32_t data)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_routing(int32_t handle)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_set_interrupt(int32_t handle)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_card_used(int32_t handle, uint32_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_set_card_used(int32_t handle, uint32_t *callback)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_machine_id(void)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_pagesize(void)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer)
+{
+	return PCI_FUNC_NOT_SUPPORTED;
+}

 /*
 * pci_device_config()
@@ -649,7 +810,7 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
 			 */
 			struct pci_rd *rd = &descriptors[barnum]; 

-			dbg("%s: address = %08x\r\n", __FUNCTION__, address);
+            dbg("%s: address = %08x\r\n", address);
 			if (IS_PCI_MEM_BAR(address))
 			{
 				/* adjust base address to card's alignment requirements */
@@ -738,10 +899,10 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)

 		/* write it to PCIERBAR and enable ROM */
 		pci_write_config_longword(handle, PCIERBAR, swpl(address | 1));
-		dbg("%s: set PCIERBAR on device 0x%02x to 0x%08x\r\n", __FUNCTION__, handle, address | 1);
+        dbg("%s: set PCIERBAR on device 0x%02x to 0x%08x\r\n", handle, address | 1);

 		/* read value back just to be sure */
-		dbg("%s: PCIERBAR = %p\r\n", __FUNCTION__, swpl(pci_read_config_longword(handle, PCIERBAR)));
+        dbg("%s: PCIERBAR = %p\r\n", swpl(pci_read_config_longword(handle, PCIERBAR)));


 		rd->next = sizeof(struct pci_rd);
--- a/pci/pci_wrappers.S
+++ b/pci/pci_wrappers.S
@@ -0,0 +1,469 @@
+/*
+ * pci.S
+ *
+ * Purpose:		PCI configuration for the Coldfire builtin PCI bridge.
+ *
+ * Notes:
+ *
+ * This file is part of BaS_gcc.
+ *
+ * BaS_gcc is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * BaS_gcc is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *  Created on: 08.05.2014
+ *      Author: David Galvez
+ */
+
+.global _wrapper_find_pci_device
+.global _wrapper_find_pci_classcode
+
+.global _wrapper_read_config_longword
+.global _wrapper_read_config_word
+.global _wrapper_read_config_byte
+
+.global _wrapper_fast_read_config_byte
+.global _wrapper_fast_read_config_word
+.global _wrapper_fast_read_config_longword
+
+.global _wrapper_write_config_longword
+.global _wrapper_write_config_word
+.global _wrapper_write_config_byte
+
+.global _wrapper_get_resource
+.global _wrapper_hook_interrupt
+.global _wrapper_unhook_interrupt
+
+.global _wrapper_special_cycle
+.global _wrapper_get_routing
+.global _wrapper_set_interrupt
+.global _wrapper_get_resource
+.global _wrapper_get_card_used
+.global _wrapper_set_card_used
+
+.global _wrapper_read_mem_byte
+.global _wrapper_read_mem_word
+.global _wrapper_read_mem_longword
+
+.global _wrapper_fast_read_mem_byte
+.global _wrapper_fast_read_mem_word
+.global _wrapper_fast_read_mem_longword
+
+.global _wrapper_write_mem_byte
+.global _wrapper_write_mem_word
+.global _wrapper_write_mem_longword
+
+.global _wrapper_read_io_byte
+.global _wrapper_read_io_word
+.global _wrapper_read_io_longword
+
+.global _wrapper_fast_read_io_byte
+.global _wrapper_fast_read_io_word
+.global _wrapper_fast_read_io_longword
+
+.global _wrapper_write_io_byte
+.global _wrapper_write_io_word
+.global _wrapper_write_io_longword
+
+.global _wrapper_get_machine_id
+.global _wrapper_get_pagesize
+
+.global _wrapper_virt_to_bus
+.global _wrapper_bus_to_virt
+.global _wrapper_virt_to_phys
+.global _wrapper_phys_to_virt
+
+
+_wrapper_find_pci_device:
+	move.l D1,-(SP)			// index
+	move.l D0,-(SP)			// Vendor ID
+	move.l #16,D1
+	lsr.l D1,D0
+	move.l D0,-(SP)			// Device ID
+	jsr _pci_find_device
+	add.l #12,SP
+	rts
+
+_wrapper_find_pci_classcode:
+	move.l D1,-(SP)			// index
+	move.l D0,-(SP)			// ID
+	jsr _pci_find_classcode
+	addq.l #8,SP
+	rts
+
+_wrapper_read_config_byte:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_byte
+	move.l 8(SP),A0			// PCI_BIOS expects value in memory
+	move.l D0,(A0)
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+_wrapper_read_config_word:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_word
+	move.l 8(SP),A0			// little to big endian
+	move.l D0,(A0)
+	mvz.b 1(A0),D0
+	lsl.l #8,D0
+	move.b (A0),D0
+	move.l D0,(A0)			// PCI_BIOS expects value in memory, not in D0
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+_wrapper_read_config_longword:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_longword
+	move.l 8(SP),A0			// little to big endian
+	move.l D0,(A0)
+	mvz.b 3(A0),D0
+	lsl.l #8,D0
+	move.b 2(A0),D0
+	lsl.l #8,D0
+	move.b 1(A0),D0
+	lsl.l #8,D0
+	move.b (A0),D0
+	move.l D0,(A0)			// PCI_BIOS expects value in memory, not in D0
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_byte:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_word:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_longword:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_longword
+	addq.l #8,SP
+	rts
+
+_wrapper_write_config_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_byte
+	add.l #12,SP
+	rts
+
+_wrapper_write_config_word:
+	move.l D0,-(SP)			// make data little endian
+	moveq #0,D1
+	move.w D2,D1
+	lsr.l #8,D1
+	asl.l #8,D2
+	or.l D1,D2
+	move.l (SP)+,D0
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_word
+	add.l #12,SP
+	rts
+
+_wrapper_write_config_longword:
+	move.l D0,-(SP)
+	move.l D2,D0			// make data little endian
+	lsr.l #8,D0
+	asl.l #8,D2
+	and.l #0x00FF00FF,D0
+	and.l #0xFF00FF00,D2
+	or.l D0,D2
+	swap D2
+	move.l (SP)+,D0
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_longword
+	add.l #12,SP
+	rts
+
+_wrapper_hook_interrupt:
+	move.l A1,-(SP)			// parameter for interrupt handler
+	move.l A0,-(SP)			// pointer to interrupt handler
+	move.l D0,-(SP)			// handle
+	jsr _pci_hook_interrupt
+	add.l #12,SP
+	rts
+
+_wrapper_unhook_interrupt:
+	move.l D0,-(SP)			// handle
+	jsr _pci_unhook_interrupt
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_special_cycle:
+	move.l D1,-(SP)			// special cycle data
+	move.l D0,-(SP)			// bus number
+	jsr _pci_special_cycle
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_routing:
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_routing
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_set_interrupt:
+	move.l D1,-(SP)			// mode
+	move.l D0,-(SP)			// handle
+	jsr _pci_set_interrupt
+	addq.l #8,SP
+	rts
+
+_wrapper_get_resource:
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_resource
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_card_used:
+	move.l D1,-(SP)			// address
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_card_used
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_set_card_used:
+	move.l A0,-(SP)			// callback
+	move.l D0,-(SP)			// handle
+	jsr _pci_set_card_used
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_byte:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_word:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_longword:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_byte:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_word:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_longword:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_longword
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_word:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_longword:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_byte:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_word:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_longword:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_byte:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_word:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_longword:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_longword
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_word:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_longword:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_machine_id:
+	jsr _pci_get_machine_id
+	rts
+
+/* Not implemented */
+_wrapper_get_pagesize:
+	jsr _pci_get_pagesize
+	rts
+
+/* Not implemented */
+_wrapper_virt_to_bus:
+	move.l A0,-(SP)			// ptr
+	move.l D1,-(SP)			// address in virtual CPU space
+	move.l D0,-(SP)			// handle
+	jsr _pci_virt_to_bus
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_bus_to_virt:
+	move.l A0,-(SP)			// ptr
+	move.l D1,-(SP)			// PCI bus address
+	move.l D0,-(SP)			// handle
+	jsr _pci_bus_to_virt
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_virt_to_phys:
+	move.l A0,-(SP)			// ptr
+	move.l D0,-(SP)			// address in virtual CPU space
+	jsr _pci_virt_to_phys
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_phys_to_virt:
+	move.l A0,-(SP)			// ptr
+	move.l D0,-(SP)			// physical CPU address 
+	jsr _pci_phys_to_virt
+	addq.l #8,SP
+	rts
--- a/radeon/radeon_cursor.c
+++ b/radeon/radeon_cursor.c
@@ -44,11 +44,13 @@
 *
 */

+#include "bas_types.h"
+#include "bas_printf.h"
 #include "radeonfb.h"

 #define DBG_RADEON
 #ifdef DBG_RADEON
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_RADEON */
@@ -66,20 +68,20 @@
 #define CURSOR_SWAPPING_DECL_MMIO
 #define CURSOR_SWAPPING_DECL	    unsigned long  __surface_cntl=0;
 #define CURSOR_SWAPPING_START() \
-	if(rinfo->big_endian) \
+    if (rinfo->big_endian) \
    OUTREG(SURFACE_CNTL, \
 	   ((__surface_cntl = INREG(SURFACE_CNTL)) | \
 	    NONSURF_AP0_SWP_32BPP) & \
 	   ~NONSURF_AP0_SWP_16BPP);
 #define CURSOR_SWAPPING_END() \
-	if(rinfo->big_endian) \
+    if (rinfo->big_endian) \
 	(OUTREG(SURFACE_CNTL, __surface_cntl));

 /* Set cursor foreground and background colors */
 void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
 {
 	struct radeonfb_info *rinfo = info->par;
-	unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base+rinfo->cursor_start);
+    unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base + rinfo->cursor_start);
 	int pixel, i;
 	CURSOR_SWAPPING_DECL_MMIO
 	CURSOR_SWAPPING_DECL
@@ -88,15 +90,17 @@ void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
 	fg |= 0xff000000;
 	bg |= 0xff000000;
 	/* Don't recolour the image if we don't have to. */
-	if(fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
+    if (fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
 		return;
 	CURSOR_SWAPPING_START();
-	/* Note: We assume that the pixels are either fully opaque or fully
+
+    /*
+     * Note: We assume that the pixels are either fully opaque or fully
 	 * transparent, so we won't premultiply them, and we can just
 	 * check for non-zero pixel values; those are either fg or bg
 	 */
-	for(i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
-		if((pixel = *pixels))
+    for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
+        if ((pixel = *pixels))
 			*pixels = (pixel == rinfo->cursor_fg) ? fg : bg;
 	CURSOR_SWAPPING_END();
 	rinfo->cursor_fg = fg;
@@ -112,27 +116,30 @@ void radeon_set_cursor_position(struct fb_info *info, int x, int y)
 	struct fb_var_screeninfo *mode = &info->var;
 	int xorigin = 0;
 	int yorigin = 0;
-	if(mode->vmode & FB_VMODE_DOUBLE)
+    if (mode->vmode & FB_VMODE_DOUBLE)
 		y <<= 1;
-	if(x < 0)
+    if (x < 0)
 		xorigin = 1 - x;
-	if(y < 0)
+    if (y < 0)
 	  yorigin = 1 - y;
+
 //	DPRINTVALHEX("radeonfb: RADEONSetCursorPosition: cursor_start ",rinfo->cursor_start);
 //	DPRINTVAL(" x ",x);
 //	DPRINTVAL(" y ",y);
 //	DPRINT("\r\n");
+
 	OUTREG(CUR_HORZ_VERT_OFF, (CUR_LOCK  | (xorigin << 16) | yorigin));
 	OUTREG(CUR_HORZ_VERT_POSN, (CUR_LOCK | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y)));
 	OUTREG(CUR_OFFSET, rinfo->cursor_start + yorigin * 256);
 	rinfo->cursor_x = (unsigned long)x;
-	if(mode->vmode & FB_VMODE_DOUBLE)
-		rinfo->cursor_y = (unsigned long)y >> 1;
+    if (mode->vmode & FB_VMODE_DOUBLE)
+        rinfo->cursor_y = (unsigned long) y >> 1;
 	else
-		rinfo->cursor_y = (unsigned long)y;
+        rinfo->cursor_y = (unsigned long) y;
 }

-/* Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
+/*
+ * Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
 * will be called after this, so we can ignore xorigin and yorigin.
 */
 void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom)
@@ -143,11 +150,14 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 	unsigned short chunk, mchunk;
 	unsigned long i, j, k;
 	CURSOR_SWAPPING_DECL
+
 //	DPRINTVALHEX("radeonfb: RADEONLoadCursorImage: cursor_start ",rinfo->cursor_start);
-//	DPRINT("\r\n");	
+//	DPRINT("\r\n");
+
 	save = INREG(CRTC_GEN_CNTL) & ~(unsigned long) (3 << 20);
 	save |= (unsigned long) (2 << 20);
 	OUTREG(CRTC_GEN_CNTL, save & (unsigned long)~CRTC_CUR_EN);
+
 	/*
 	 * Convert the bitmap to ARGB32.
 	 */
@@ -157,22 +167,22 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 	{
 	case 1:
 	default:
-		for(i = 0; i < CURSOR_HEIGHT; i++)
+        for (i = 0; i < CURSOR_HEIGHT; i++)
 		{
-			if(i < 16)
+            if (i < 16)
 			{
 				mchunk = *mask++;
 				chunk = *data++;
 			}
 			else
 				mchunk = chunk = 0;
-			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
+            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
 			{
-				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-					if(mchunk & 0x8000)
+                    if (mchunk & 0x8000)
 					{
-						if(chunk & 0x8000)
+                        if (chunk & 0x8000)
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 						else
 							*d++ = 0xffffffff; /* White, fully opaque. */
@@ -184,13 +194,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 		}
 		break;
 	case 2:
-		for(i = 0; i < CURSOR_HEIGHT; i++)
+        for (i = 0; i < CURSOR_HEIGHT; i++)
 		{
-			if(i < 16*2)
+            if (i < 16*2)
 			{
 				mchunk = *mask;
 				chunk = *data;
-				if((i & 1) == 1)
+                if ((i & 1) == 1)
 				{
 					mask++;
 					data++;
@@ -198,13 +208,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 			}
 			else
 				mchunk = chunk = 0;
-			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
+            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
 			{
-				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-					if(mchunk & 0x8000)
+                    if (mchunk & 0x8000)
 					{
-						if(chunk & 0x8000)
+                        if (chunk & 0x8000)
 						{
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 							*d++ = 0xff000000; 
@@ -225,13 +235,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 		}
 		break;
 	case 4:
-		for(i = 0; i < CURSOR_HEIGHT; i++)
+        for (i = 0; i < CURSOR_HEIGHT; i++)
 		{
-			if(i < 16*4)
+            if (i < 16 * 4)
 			{
 				mchunk = *mask;
 				chunk = *data;
-				if((i & 3) == 3)
+                if ((i & 3) == 3)
 				{
 					mask++;
 					data++;
@@ -239,13 +249,13 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 			}
 			else
 				mchunk = chunk = 0;
-			for(j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
+            for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
 			{
-				for(k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
+                for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
 				{
-					if(mchunk & 0x8000)
+                    if (mchunk & 0x8000)
 					{
-						if(chunk & 0x8000)
+                        if (chunk & 0x8000)
 						{
 							*d++ = 0xff000000; /* Black, fully opaque. */				
 							*d++ = 0xff000000; 
@@ -282,6 +292,7 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 void radeon_hide_cursor(struct fb_info *info)
 {
 	struct radeonfb_info *rinfo = info->par;
+
 //	DPRINT("radeonfb: RADEONHideCursor\r\n");
 	OUTREGP(CRTC_GEN_CNTL, 0, ~CRTC_CUR_EN);
 	rinfo->cursor_show = 0;
@@ -291,6 +302,7 @@ void radeon_hide_cursor(struct fb_info *info)
 void radeon_show_cursor(struct fb_info *info)
 {
 	struct radeonfb_info *rinfo = info->par;
+
 //	DPRINT("radeonfb: RADEONShowCursor\r\n");
 	OUTREGP(CRTC_GEN_CNTL, CRTC_CUR_EN, ~CRTC_CUR_EN);
 	rinfo->cursor_show = 1;
@@ -303,9 +315,9 @@ long radeon_cursor_init(struct fb_info *info)
 	int size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
 	unsigned long fbarea = offscreen_alloc(rinfo->info, size_bytes + 256);

-	dbg("radeonfb: %s: fbarea: %p\r\n", __FUNCTION__, fbarea);
+    dbg("radeonfb: %s: fbarea: %p\r\n", fbarea);

-	if(!fbarea)
+    if (!fbarea)
 		rinfo->cursor_start = 0;
 	else
 	{
--- a/sys/BaS.c
+++ b/sys/BaS.c
@@ -96,20 +96,20 @@ static inline bool pic_rxready(void)

 void write_pic_byte(uint8_t value)
 {
-    /* Wait until the transmitter is ready or 1000us are passed */
+	/* Wait until the transmitter is ready or 1000us are passed */
 	waitfor(1000, pic_txready);

-    /* Transmit the byte */
-    *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT) = value; // Really 8-bit
+	/* Transmit the byte */
+	*(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT) = value; // Really 8-bit
 }

 uint8_t read_pic_byte(void)
 {
-    /* Wait until a byte has been received or 1000us are passed */
+	/* Wait until a byte has been received or 1000us are passed */
 	waitfor(1000, pic_rxready);

-    /* Return the received byte */
-    return *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT); // Really 8-bit
+	/* Return the received byte */
+	return *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT); // Really 8-bit
 }

 void pic_init(void)
@@ -271,13 +271,13 @@ void network_init(void)
 		return;
 	}

-    /*
-     * Register the DMA interrupt handler
-     */
-    handler = dma_interrupt_handler;
-    vector = 112;
+	/*
+	 * Register the DMA interrupt handler
+	 */
+	handler = dma_interrupt_handler;
+	vector = 112;

-    if (!isr_register_handler(vector, handler, NULL,NULL))
+	if (!isr_register_handler(vector, handler, NULL,NULL))
 	{
 		dbg("%s: Error: Unable to register handler for vector %s\r\n", __FUNCTION__, vector);
 		return;
@@ -291,10 +291,10 @@ void network_init(void)
 	memcpy(nif1.hwa, mac, 6);
 	memcpy(nif1.broadcast, bc, 6);

-	dbg("%s: ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n", __FUNCTION__, 
+	dbg("%s: ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n", __FUNCTION__,
 				nif1.hwa[0], nif1.hwa[1], nif1.hwa[2],
 				nif1.hwa[3], nif1.hwa[4], nif1.hwa[5]);
-	
+
 	timer_init(TIMER_NETWORK, TMR_INTC_LVL, TMR_INTC_PRI);

 	arp_init(&arp_info);
@@ -346,16 +346,16 @@ void BaS(void)
 	MCF_MMU_MMUCR = MCF_MMU_MMUCR_EN;			/* MMU on */
 	NOP();										/* force pipeline sync */
 	xprintf("finished\r\n");
-	
+
 	#ifdef MACHINE_FIREBEE
 	xprintf("IDE reset: ");
 	/* IDE reset */
 	* (volatile uint8_t *) (0xffff8802 - 2) = 14;
 	* (volatile uint8_t *) (0xffff8802 - 0) = 0x80;
 	wait(1);
-	
+
 	* (volatile uint8_t *) (0xffff8802 - 0) = 0;
-	
+
 	xprintf("finished\r\n");
 	xprintf("enable video: ");
 	/*
@@ -384,22 +384,22 @@ void BaS(void)
 #ifdef _NOT_USED_
 	screen_init();

-	    /* experimental */
-    {
-        int i;
-        uint32_t *scradr = 0xd00000;
+		/* experimental */
+	{
+		int i;
+		uint32_t *scradr = 0xd00000;

-        for (i = 0; i < 100; i++)
-        {
-            uint32_t *p = scradr;
-
-            for (p = scradr; p < scradr + 1024 * 150L; p++)
-            {
-				*p = 0xffffffff;
-		    }
+		for (i = 0; i < 100; i++)
+		{
+			uint32_t *p = scradr;

 			for (p = scradr; p < scradr + 1024 * 150L; p++)
-		    {
+			{
+				*p = 0xffffffff;
+			}
+
+			for (p = scradr; p < scradr + 1024 * 150L; p++)
+			{
 				*p = 0x0;
 			}
 		}
@@ -442,10 +442,11 @@ void BaS(void)

 	/* Jump into the OS */
 	typedef void void_func(void);
-	typedef struct {
+	struct rom_header
+	{
 		void *initial_sp;
 		void_func *initial_pc;
-	} ROM_HEADER;
+	};

 	xprintf("BaS initialization finished, enable interrupts\r\n");
 	enable_coldfire_interrupts();
@@ -454,6 +455,6 @@ void BaS(void)
 	network_init();

 	xprintf("call EmuTOS\r\n");
-	ROM_HEADER* os_header = (ROM_HEADER*)TOS;
+	struct rom_header *os_header = (struct rom_header *) TOS;
 	os_header->initial_pc();
 }
--- a/sys/exceptions.S
+++ b/sys/exceptions.S
--- a/sys/init_fpga.c
+++ b/sys/init_fpga.c
@@ -33,10 +33,16 @@
 #define FPGA_DATA0		(1 << 3)
 #define FPGA_CONF_DONE	(1 << 5)

-extern uint8_t _FPGA_FLASH_DATA[];
-#define FPGA_FLASH_DATA	&_FPGA_FLASH_DATA[0]
-extern uint8_t _FPGA_FLASH_DATA_SIZE[];
-#define FPGA_FLASH_DATA_SIZE	((uint32_t) &_FPGA_FLASH_DATA_SIZE[0])
+extern uint8_t _FPGA_CONFIG[];
+#define FPGA_FLASH_DATA	&_FPGA_CONFIG[0]
+extern uint8_t _FPGA_CONFIG_SIZE[];
+#define FPGA_FLASH_DATA_SIZE	((uint32_t) &_FPGA_CONFIG_SIZE[0])
+
+/*
+ * flag located in processor SRAM1 that indicates that the FPGA configuration has
+ * been loaded through JTAG. init_fpga() will honour this and not overwrite config.
+ */
+extern int32_t _FPGA_JTAG_LOADED;

 void config_gpio_for_fpga_config(void)
 {
@@ -78,7 +84,15 @@ bool init_fpga(void)
 	volatile int32_t time, start, end;
 	int i;

-	xprintf("FPGA load config... ");
+	xprintf("FPGA load config (_FPGA_JTAG_LOADED = %x)...", _FPGA_JTAG_LOADED);
+	if (_FPGA_JTAG_LOADED == 1)
+	{
+		xprintf("detected _FPGA_JTAG_LOADED flag. Not overwriting FPGA config.\r\n");
+
+		/* reset the flag so that next boot will load config again from flash */
+		_FPGA_JTAG_LOADED = 0;
+		return true;
+	}
 	start = MCF_SLT0_SCNT;

 	config_gpio_for_fpga_config();
--- a/sys/mmu.c
+++ b/sys/mmu.c
@@ -24,6 +24,26 @@
 * Copyright 2013        M. Froeschle
 */

+#define ACR_BA(x)                   ((x) & 0xffff0000)
+#define ACR_ADMSK(x)                (((x) & 0xffff) << 16)
+#define ACR_E(x)                    (((x) & 1) << 15)
+
+#define ACR_S(x)                    (((x) & 3) << 13)
+#define ACR_S_USERMODE              0
+#define ACR_S_SUPERVISOR_MODE       1
+#define ACR_S_ALL                   2
+
+#define ACR_AMM(x)                  (((x) & 1) << 10)
+
+#define ACR_CM(x)                   (((x) & 3) << 5)
+#define ACR_CM_CACHEABLE_WT         0x0
+#define ACR_CM_CACHEABLE_CB         0x1
+#define ACR_CM_CACHE_INH_PRECISE    0x2
+#define ACR_CM_CACHE_INH_IMPRECISE  0x3
+
+#define ACR_SP(x)           (((x) & 1) << 3)
+#define ACR_W(x)            (((x) & 1) << 2)
+
 #include <stdint.h>
 #include "bas_printf.h"
 #include "bas_types.h"
@@ -42,12 +62,12 @@
 #error "unknown machine!"
 #endif /* MACHINE_FIREBEE */

-#define DBG_MMU
-#ifdef DBG_MMU
-#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg);} while(0)
+//#define DEBUG_MMU
+#ifdef DEBUG_MMU
+#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg);} while(0)
 #else
 #define dbg(format, arg...) do {;} while (0)
-#endif /* DBG_MMU */
+#endif /* DEBUG_MMU */

 /*
 * set ASID register
@@ -59,11 +79,11 @@ inline uint32_t set_asid(uint32_t value)
 	uint32_t ret = rt_asid;

 	__asm__ __volatile__(
-			"movec		%[value],ASID\n\t"
-			: /* no output */
-			: [value] "r" (value)
-			:
-			);
+		"movec		%[value],ASID\n\t"
+		: /* no output */
+		: [value] "r" (value)
+		:
+	);

 	rt_asid = value;

@@ -81,11 +101,11 @@ inline uint32_t set_acr0(uint32_t value)
 	uint32_t ret = rt_acr0;

 	__asm__ __volatile__(
-			"movec		%[value],ACR0\n\t"
-			: /* not output */
-			: [value] "r" (value)
-			:
-			);
+		"movec		%[value],ACR0\n\t"
+		: /* not output */
+		: [value] "r" (value)
+		:
+	);
 	rt_acr0 = value;

 	return ret;
@@ -101,11 +121,11 @@ inline uint32_t set_acr1(uint32_t value)
 	uint32_t ret = rt_acr1;

 	__asm__ __volatile__(
-			"movec		%[value],ACR1\n\t"
-			: /* not output */
-			: [value] "r" (value)
-			:
-			);
+		"movec		%[value],ACR1\n\t"
+		: /* not output */
+		: [value] "r" (value)
+		:
+	);
 	rt_acr1 = value;

 	return ret;
@@ -122,11 +142,11 @@ inline uint32_t set_acr2(uint32_t value)
 	uint32_t ret = rt_acr2;

 	__asm__ __volatile__(
-			"movec		%[value],ACR2\n\t"
-			: /* not output */
-			: [value] "r" (value)
-			:
-			);
+		"movec		%[value],ACR2\n\t"
+		: /* not output */
+		: [value] "r" (value)
+		:
+	);
 	rt_acr2 = value;

 	return ret;
@@ -142,11 +162,11 @@ inline uint32_t set_acr3(uint32_t value)
 	uint32_t ret = rt_acr3;

 	__asm__ __volatile__(
-			"movec		%[value],ACR3\n\t"
-			: /* not output */
-			: [value] "r" (value)
-			:
-			);
+		"movec		%[value],ACR3\n\t"
+		: /* not output */
+		: [value] "r" (value)
+		:
+	);
 	rt_acr3 = value;

 	return ret;
@@ -158,375 +178,276 @@ inline uint32_t set_mmubar(uint32_t value)
 	uint32_t ret = rt_mmubar;

 	__asm__ __volatile__(
-			"movec		%[value],MMUBAR\n\t"
-			: /* no output */
-			: [value] "r" (value)
-			: /* no clobber */
-			);
+		"movec		%[value],MMUBAR\n\t"
+		: /* no output */
+		: [value] "r" (value)
+		: /* no clobber */
+	);
 	rt_mmubar = value;
 	NOP();

 	return ret;
 }

-
-
-/*
- * TODO: this would be nicer in an include file
- */
-extern uint8_t _SYS_SRAM[];
-#define SYS_SRAM_ADDRESS ((uint32_t) &_SYS_SRAM[0])
-extern uint8_t _SYS_SRAM_SIZE[];
-extern uint8_t _FASTRAM_END[];
-
-struct mmu_mapping
-{
-	uint32_t phys;
-	uint32_t virt;
-	uint32_t length;
-	uint32_t pagesize;
-	struct map_flags flags;
-};
-
-static struct mmu_mapping locked_map[] =
-{
-	{
-		/* Falcon video memory. Needs special care */
-		0x60d00000,
-		0xd00000,
-		0x100000,
-		MMU_PAGE_SIZE_1M,
-		{ CACHE_WRITETHROUGH, SV_USER, SCA_PAGE_ID, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
-	},
-};
-
-static int num_locked_mmu_maps = sizeof(locked_map) / sizeof(struct mmu_mapping);
-
-static struct mmu_mapping memory_map[] =
-{
-	/* map OS system vectors supervisor-protected */
-	{
-		0,
-		0,
-		0x800,
-		MMU_PAGE_SIZE_1K,
-		{ CACHE_WRITETHROUGH, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
-	},
-	{
-		0x800,
-		0x800,
-		0x800,
-		MMU_PAGE_SIZE_1K,
-		{ CACHE_WRITETHROUGH, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
-	},
-	{
-		/* when the first 4k are filled with 1k pages, we can switch to 8k pages */
-		0x1000,
-		0x1000,
-		0xff000,
-		MMU_PAGE_SIZE_8K,
-		{ CACHE_WRITETHROUGH, SV_USER, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
-	},
-	{
-		/* arrived at a 1Meg border, we can switch to 1Meg pages */
-		0x100000,
-		0x100000,
-		0xc00000,
-		MMU_PAGE_SIZE_1M,
-		{ CACHE_WRITETHROUGH, SV_USER, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
-	},
-	/* Falcon video ram left out intentionally here (see above) */
-	{
-		/* ROM */
-		0xe00000,
-		0xe00000,
-		0x100000,
-		MMU_PAGE_SIZE_1M,
-		{ CACHE_WRITETHROUGH, SV_USER, 0, ACCESS_READ | ACCESS_EXECUTE },
-	},
-	{
-		/* FASTRAM */
-		0x1000000,
-		0x1000000,
-		(uint32_t) _FASTRAM_END - 0x1000000,
-		MMU_PAGE_SIZE_1M,
-		{ CACHE_WRITETHROUGH, SV_USER, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
-	},
-	{
-		/* MBAR */
-		MBAR_ADDRESS,
-		MBAR_ADDRESS,
-		0x100000,
-		MMU_PAGE_SIZE_1M,
-		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
-	},
-	{
-		/* RAMBAR0 */
-		RAMBAR0_ADDRESS,
-		RAMBAR0_ADDRESS,
-		(uint32_t) _RAMBAR0_SIZE,
-		MMU_PAGE_SIZE_1K,
-		{ CACHE_WRITETHROUGH, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
-	},
-	{
-		/* RAMBAR1 */
-		RAMBAR1_ADDRESS,
-		RAMBAR1_ADDRESS,
-		(uint32_t) _RAMBAR1_SIZE,
-		MMU_PAGE_SIZE_1K,
-		{ CACHE_WRITETHROUGH, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
-	},
-	{
-		/* SYSTEM SRAM */
-		SYS_SRAM_ADDRESS,
-		SYS_SRAM_ADDRESS,
-		(uint32_t) _SYS_SRAM_SIZE,
-		MMU_PAGE_SIZE_8K,
-		{ CACHE_WRITETHROUGH, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE | ACCESS_EXECUTE },
-	},
-	{
-		/* Firebee FPGA registers */
-		(uint32_t) 0xf0000000,
-		(uint32_t) 0xf0000000,
-		(uint32_t) 0x08000000,
-		MMU_PAGE_SIZE_1M,
-		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
-	},
-	{
-		/* Falcon I/O registers */
-		(uint32_t) 0xfff00000,
-		(uint32_t) 0xfff00000,
-		(uint32_t) 0x100000,
-		MMU_PAGE_SIZE_1M,
-		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
-	},
-	{
-		/* the same, but different virtual address */
-		(uint32_t) 0x00f00000,
-		(uint32_t) 0xfff00000,
-		(uint32_t) 0x100000,
-		MMU_PAGE_SIZE_1M,
-		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
-	},
-	{
-		/* PCI memory */
-		(uint32_t) PCI_MEMORY_OFFSET,
-		(uint32_t) PCI_MEMORY_OFFSET,
-		(uint32_t) PCI_MEMORY_SIZE,
-		MMU_PAGE_SIZE_1M,
-		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
-	},
-	{
-		/* PCI I/O */
-		(uint32_t) PCI_IO_OFFSET,
-		(uint32_t) PCI_IO_OFFSET,
-		(uint32_t) PCI_IO_SIZE,
-		MMU_PAGE_SIZE_1M,
-		{ CACHE_NOCACHE_PRECISE, SV_PROTECT, 0, ACCESS_READ | ACCESS_WRITE },
-	}
-};
-
-static int num_mmu_maps = sizeof(memory_map) / sizeof(struct mmu_mapping);
-
-static struct mmu_mapping *lookup_mapping(uint32_t virt)
-{
-	int i;
-
-	/*
-	 * dumb, for now
-	 */
-
-	for (i = 0; i < num_mmu_maps; i++)
-	{
-		if (virt >= memory_map[i].virt && virt <= memory_map[i].virt + memory_map[i].length - 1)
-			return &memory_map[i];
-	}
-	return NULL;
-}
-
 void mmu_init(void)
 {
 	extern uint8_t _MMUBAR[];
 	uint32_t MMUBAR = (uint32_t) &_MMUBAR[0];
-	int i;
+	extern uint8_t _TOS[];
+	uint32_t TOS = (uint32_t) &_TOS[0];

 	set_asid(0);			/* do not use address extension (ASID provides virtual 48 bit addresses */

-	/*
-	 * need to set data ACRs in a way that supervisor access to all memory regions
-	 * becomes possible. Otherways it might be that the supervisor stack ends up in an unmapped
-	 * region when further MMU TLB entries force a page steal. This would lead to a double
-	 * fault since the CPU wouldn't be able to push its exception stack frame during an access
-	 * exception
-	 */
-
 	/* set data access attributes in ACR0 and ACR1 */
+	set_acr0(ACR_W(0) |								/* read and write accesses permitted */
+			ACR_SP(0) |								/* supervisor and user mode access permitted */
+			ACR_CM(ACR_CM_CACHE_INH_PRECISE) |		/* cache inhibit, precise */
+			ACR_AMM(0) |							/* control region > 16 MB */
+			ACR_S(ACR_S_ALL) |						/* match addresses in user and supervisor mode */
+			ACR_E(1) |								/* enable ACR */
+#if defined(MACHINE_FIREBEE)
+			ACR_ADMSK(0x7f) |						/* cover 2GB area from 0x80000000 to 0xffffffff */
+			ACR_BA(0x80000000));					/* (equals area from 3 to 4 GB */
+#elif defined(MACHINE_M5484LITE)
+			ACR_ADMSK(0x7f) |						/* cover 2 GB area from 0x80000000 to 0xffffffff */
+			ACR_BA(0x80000000));
+#elif defined(MACHINE_M54455)
+			ACR_ADMSK(0x7f) |
+			ACR_BA(0x80000000));					/* FIXME: not determined yet */
+#else
+#error unknown machine!
+#endif /* MACHINE_FIREBEE */

-	set_acr0(ACR_WRITE_PROTECT(0) |			/* read and write accesses permitted */
-			ACR_SUPERVISOR_PROTECT(0) |		/* supervisor and user mode access permitted */
-			ACR_CACHE_MODE(CACHE_WRITETHROUGH) |	/* cacheable, write through */
-			ACR_ADDRESS_MASK_MODE(1) | 		/* region 13 MByte */
-			ACR_S(ACR_S_SUPERVISOR_MODE) |	/* memory only visible from supervisor mode */
-			ACR_E(1) |						/* enable ACR */
-			ACR_ADMSK(0x0a) |				/* cover 12 MByte from 0x0 */
-			ACR_BA(0));						/* start from 0x0 */
-
-	set_acr1(ACR_WRITE_PROTECT(0) |			/* read and write accesses permitted */
-			ACR_SUPERVISOR_PROTECT(0) |		/* supervisor and user mode access permitted */
-			ACR_CACHE_MODE(CACHE_WRITETHROUGH) |	/* cacheable, write through */
-			ACR_ADDRESS_MASK_MODE(0) | 		/* region > 16 MByte */
-			ACR_S(ACR_S_SUPERVISOR_MODE) |	/* memory only visible from supervisor mode */
-			ACR_E(1) |						/* enable ACR */
-			ACR_ADMSK(0x1f) |				/* cover 495 MByte from 0x1000000 */
-			ACR_BA(0x01000000));			/* all Fast RAM */
-
-
-	/*
-	 * set instruction access attributes in ACR2 and ACR3. This is the same as above, basically:
-	 * enable supervisor access to all SDRAM
-	 */
-
-	set_acr2(ACR_WRITE_PROTECT(0) |
-			ACR_SUPERVISOR_PROTECT(0) |
-			ACR_CACHE_MODE(CACHE_WRITETHROUGH) |
-			ACR_ADDRESS_MASK_MODE(1) |
-			ACR_S(ACR_S_SUPERVISOR_MODE) |
-			ACR_E(1) |
-			ACR_ADMSK(0x0c) |
-			ACR_BA(0x0));
-
-	set_acr3(ACR_WRITE_PROTECT(0) |
-			ACR_SUPERVISOR_PROTECT(0) |
-			ACR_CACHE_MODE(CACHE_WRITETHROUGH) |
-			ACR_ADDRESS_MASK_MODE(0) |
-			ACR_S(ACR_S_SUPERVISOR_MODE) |
+	// set_acr1(0x601fc000);
+	set_acr1(ACR_W(0) |
+			ACR_SP(0) |
+			ACR_CM(0) |
+#if defined(MACHINE_FIREBEE)
+			ACR_CM(ACR_CM_CACHEABLE_WT) |			/* video RAM on the Firebee */
+#elif defined(MACHINE_M5484LITE)
+			ACR_CM(ACR_CM_CACHE_INH_PRECISE) |		/* Compact Flash on the M548xLITE */
+#elif defined(MACHINE_M54455)
+			ACR_CM(ACR_CM_CACHE_INH_PRECISE) |		/* FIXME: not determined yet */
+#else
+#error unknown machine!
+#endif /* MACHINE_FIREBEE */
+			ACR_AMM(0) |
+			ACR_S(ACR_S_ALL) |
 			ACR_E(1) |
 			ACR_ADMSK(0x1f) |
-			ACR_BA(0x0f));
+			ACR_BA(0x60000000));
+
+	/* set instruction access attributes in ACR2 and ACR3 */
+
+	//set_acr2(0xe007c400);
+	set_acr2(ACR_W(0) |
+			ACR_SP(0) |
+			ACR_CM(0) |
+			ACR_CM(ACR_CM_CACHEABLE_WT) |
+			ACR_AMM(1) |
+			ACR_S(ACR_S_ALL) |
+			ACR_E(1) |
+			ACR_ADMSK(0x7) |
+			ACR_BA(0xe0000000));
+
+	/* disable ACR3 */
+	set_acr3(0x0);

 	set_mmubar(MMUBAR + 1);		/* set and enable MMUBAR */

 	/* clear all MMU TLB entries */
 	MCF_MMU_MMUOR = MCF_MMU_MMUOR_CA;

-	/* map locked TLB entries */
-	for (i = 0; i < num_locked_mmu_maps; i++)
-	{
-		mmu_map_page(locked_map[i].virt, locked_map[i].phys, locked_map->pagesize, locked_map->flags);
+	/* create locked TLB entries */

-		if (locked_map[i].flags.page_id == SCA_PAGE_ID)
-		{
-			video_tlb = 0x2000;
-			video_sbt = 0x0;
-		}
-	}
+	/*
+	 * 0x0000'0000 - 0x000F'FFFF (first MB of physical memory) locked virtual = physical
+	 */
+	MCF_MMU_MMUTR = 0x0 | 					/* virtual address */
+					MCF_MMU_MMUTR_SG |		/* shared global */
+					MCF_MMU_MMUTR_V;		/* valid */
+	MCF_MMU_MMUDR = 0x0 |					/* physical address */
+					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
+					MCF_MMU_MMUDR_CM(0x1) |	/* cacheable, copyback */
+					MCF_MMU_MMUDR_R |		/* read access enable */
+					MCF_MMU_MMUDR_W |		/* write access enable */
+					MCF_MMU_MMUDR_X | 		/* execute access enable */
+					MCF_MMU_MMUDR_LK;		/* lock entry */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
+					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
+					MCF_MMU_MMUOR_ACC |     /* access TLB */
+					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
+
+	/*
+	 * 0x00d0'0000 - 0x00df'ffff (last megabyte of ST RAM = Falcon video memory) locked ID = 6
+	 * mapped to physical address 0x60d0'0000 (FPGA video memory)
+	 * video RAM: read write execute normal write true
+	 */
+
+	MCF_MMU_MMUTR = 0x00d00000 |			/* virtual address */
+#if defined(MACHINE_FIREBEE)
+					MCF_MMU_MMUTR_ID(SCA_PAGE_ID) |
+#endif /* MACHINE_FIREBEE */
+					MCF_MMU_MMUTR_SG |		/* shared global */
+					MCF_MMU_MMUTR_V;		/* valid */
+#if defined(MACHINE_FIREBEE)
+					/* map FPGA video memory for FireBee only */
+	MCF_MMU_MMUDR = 0x60d00000 |			/* physical address */
+#elif defined(MACHINE_M5484LITE)
+	MCF_MMU_MMUDR = 0x00d00000 |			/* physical address */
+#elif defined(MACHINE_M54455)
+	MCF_MMU_MMUDR = 0x60d00000 |			/* FIXME: not determined yet */
+#else
+#error unknown machine!
+#endif /* MACHINE_FIREBEE */
+					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
+					MCF_MMU_MMUDR_CM(0x0) |	/* cachable writethrough */
+					/* caveat: can't be supervisor protected since TOS puts the application stack there! */
+					//MCF_MMU_MMUDR_SP |		/* supervisor protect */
+					MCF_MMU_MMUDR_R |		/* read access enable */
+					MCF_MMU_MMUDR_W |		/* write access enable */
+					MCF_MMU_MMUDR_X |		/* execute access enable */
+					MCF_MMU_MMUDR_LK;		/* lock entry */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
+					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
+					MCF_MMU_MMUOR_ACC |     /* access TLB */
+					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
+
+#if defined(MACHINE_FIREBEE)
+	video_tlb = 0x2000;						/* set page as video page */
+	video_sbt = 0x0;						/* clear time */
+#endif /* MACHINE_FIREBEE */
+
+	/*
+	 * Make the TOS (in SDRAM) read-only
+	 * This maps virtual 0x00e0'0000 - 0x00ef'ffff to the same virtual address
+	 */
+	MCF_MMU_MMUTR = TOS |					/* virtual address */
+					MCF_MMU_MMUTR_SG |		/* shared global */
+					MCF_MMU_MMUTR_V;		/* valid */
+	MCF_MMU_MMUDR = TOS |					/* physical address */
+					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
+					MCF_MMU_MMUDR_CM(0x1) |	/* cachable copyback */
+					MCF_MMU_MMUDR_R |		/* read access enable */
+					//MCF_MMU_MMUDR_W |		/* write access enable (FIXME: for now) */
+					MCF_MMU_MMUDR_X |		/* execute access enable */
+					MCF_MMU_MMUDR_LK;		/* lock entry */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
+					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
+					MCF_MMU_MMUOR_ACC |     /* access TLB */
+					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
+
+#if MACHINE_FIREBEE
+	/*
+	 * Map FireBee I/O area (0xfff0'0000 - 0xffff'ffff physical) to the Falcon-compatible I/O
+	 * area (0x00f0'0000 - 0x00ff'ffff virtual) for the FireBee
+	 */
+
+	MCF_MMU_MMUTR = 0x00f00000 |			/* virtual address */
+					MCF_MMU_MMUTR_SG |		/* shared global */
+					MCF_MMU_MMUTR_V;		/* valid */
+	MCF_MMU_MMUDR = 0xfff00000 |			/* physical address */
+					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
+					MCF_MMU_MMUDR_CM(0x2) |	/* nocache precise */
+					MCF_MMU_MMUDR_SP |		/* supervisor protect */
+					MCF_MMU_MMUDR_R |		/* read access enable */
+					MCF_MMU_MMUDR_W |		/* write access enable */
+					MCF_MMU_MMUDR_X |		/* execute access enable */
+					MCF_MMU_MMUDR_LK;		/* lock entry */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
+					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
+					MCF_MMU_MMUOR_ACC |     /* access TLB */
+					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
+#endif /* MACHINE_FIREBEE */
+
+	/*
+	 * Map (locked) the second last MB of physical SDRAM (this is where BaS .data and .bss reside) to the same
+	 * virtual address. This is also used when BaS is in RAM
+	 */
+
+	MCF_MMU_MMUTR = (SDRAM_START + SDRAM_SIZE - 0x00200000) |	/* virtual address */
+					MCF_MMU_MMUTR_SG |		/* shared global */
+					MCF_MMU_MMUTR_V;		/* valid */
+	MCF_MMU_MMUDR = (SDRAM_START + SDRAM_SIZE - 0x00200000) |	/* physical address */
+					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
+					MCF_MMU_MMUDR_CM(0x0) |	/* cacheable writethrough */
+					MCF_MMU_MMUDR_SP |		/* supervisor protect */
+					MCF_MMU_MMUDR_R |		/* read access enable */
+					MCF_MMU_MMUDR_W |		/* write access enable */
+					MCF_MMU_MMUDR_X |		/* execute access enable */
+					MCF_MMU_MMUDR_LK;		/* lock entry */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
+					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
+					MCF_MMU_MMUOR_ACC |     /* access TLB */
+					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
+
+	/*
+	 * Map (locked) the very last MB of physical SDRAM (this is where the driver buffers reside) to the same
+	 * virtual address. Used uncached for drivers.
+	 */
+
+	MCF_MMU_MMUTR = (SDRAM_START + SDRAM_SIZE - 0x00100000) |	/* virtual address */
+					MCF_MMU_MMUTR_SG |		/* shared global */
+					MCF_MMU_MMUTR_V;		/* valid */
+	MCF_MMU_MMUDR = (SDRAM_START + SDRAM_SIZE - 0x00100000) |	/* physical address */
+					MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
+					MCF_MMU_MMUDR_CM(0x2) |	/* nocache precise */
+					MCF_MMU_MMUDR_SP |		/* supervisor protect */
+					MCF_MMU_MMUDR_R |		/* read access enable */
+					MCF_MMU_MMUDR_W |		/* write access enable */
+					//MCF_MMU_MMUDR_X |		/* execute access enable */
+					MCF_MMU_MMUDR_LK;		/* lock entry */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
+					MCF_MMU_MMUOR_UAA;		/* update allocation address field */
+	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
+					MCF_MMU_MMUOR_ACC |     /* access TLB */
+					MCF_MMU_MMUOR_UAA;      /* update allocation address field */
 }

-/*
- * handle an access error
- * upper level routine called from access_exception inside exceptions.S
- */
-bool access_exception(uint32_t pc, uint32_t format_status)
+void mmutr_miss(uint32_t address)
 {
-	int fault_status;
-	uint32_t fault_address;
-	uint32_t mmu_status;
+	dbg("MMU TLB MISS at 0x%08x\r\n", address);
+	flush_and_invalidate_caches();

-	/*
-	 * extract fault status from format_status exception stack field
-	 */
-	fault_status = format_status & 0xc030000;
-	mmu_status = MCF_MMU_MMUSR;
-
-	/*
-	 * determine if access fault was caused by a TLB miss
-	 */
-	switch (fault_status)
+	switch (address)
 	{
-		case 0x4010000:	/* TLB miss on opword of instruction fetch */
-		case 0x4020000:	/* TLB miss on extension word of instruction fetch */
-			//fault_address = pc;
-			//break;
-		case 0x8020000:	/* TLB miss on data write */
-		case 0xc020000:	/* TLB miss on data read or read-modify-write */
-			fault_address = MCF_MMU_MMUAR;
-			/*
-			 * the following line must stay commented or we risk a double fault (debugging
-			 * output requiring itself a page mapping):
-			 */
-			// dbg("access fault - TLB miss at %p. Fault status = 0x0%x\r\n", pc, fault_status);
+		case keyctl:
+		case keybd:
+			/* do something to emulate the IKBD access */
+			dbg("IKBD access\r\n");
+			break;
+
+		case midictl:
+		case midi:
+			/* do something to emulate MIDI access */
+			dbg("MIDI ACIA access\r\n");
 			break;

 		default:
-			return false;
+			/* add missed page to TLB */
+			MCF_MMU_MMUTR = (address & 0xfff00000) | /* virtual aligned to 1M */
+							MCF_MMU_MMUTR_SG |		/* shared global */
+							MCF_MMU_MMUTR_V;		/* valid */
+
+			MCF_MMU_MMUDR = (address & 0xfff00000) |	/* physical aligned to 1M */
+							MCF_MMU_MMUDR_SZ(0) |	/* 1 MB page size */
+							MCF_MMU_MMUDR_CM(0x1) |	/* cacheable copyback */
+							MCF_MMU_MMUDR_R |		/* read access enable */
+							MCF_MMU_MMUDR_W |		/* write access enable */
+							MCF_MMU_MMUDR_X;		/* execute access enable */
+
+			MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
+							MCF_MMU_MMUOR_UAA;		/* update allocation address field */
+
+			MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
+							MCF_MMU_MMUOR_ACC |     /* access TLB */
+							MCF_MMU_MMUOR_UAA;      /* update allocation address field */
 	}
-
-
-	if (mmu_status & MCF_MMU_MMUSR_HIT)		/* did the last fault hit in TLB? */
-	{
-		/*
-		 * if yes, then we already mapped that page during a previous turn and this is in fact a bus error
-		 */
-		return false;
-	}
-	else
-	{
-		struct mmu_mapping *map;
-
-
-		if ((map = lookup_mapping(fault_address)) != NULL)
-		{
-			uint32_t mask;
-
-			switch (map->pagesize)
-			{
-				case MMU_PAGE_SIZE_1M:
-					mask = ~(0x100000 - 1);
-					break;
-				case MMU_PAGE_SIZE_4K:
-					mask = ~(0x1000 - 1);
-					break;
-				case MMU_PAGE_SIZE_8K:
-					mask = ~(0x2000 - 1);
-					break;
-				case MMU_PAGE_SIZE_1K:
-					mask = ~(0x400 - 1);
-					break;
-			}
-
-			mmu_map_page(fault_address & mask, fault_address & mask, map->pagesize, map->flags);
-			return true;
-		}
-	}
-	return false;
-}
-
-
-void mmu_map_page(uint32_t virt, uint32_t phys, uint32_t map_size, struct map_flags flags)
-{
-
-	/*
-	 * add page to TLB
-	 */
-	MCF_MMU_MMUTR = virt |					/* virtual address */
-		MCF_MMU_MMUTR_ID(flags.page_id) |
-		MCF_MMU_MMUTR_SG |					/* shared global */
-		MCF_MMU_MMUTR_V;					/* valid */
-
-	MCF_MMU_MMUDR = phys |					/* physical address */
-		MCF_MMU_MMUDR_SZ(map_size) |		/* 1 MB page size */
-		MCF_MMU_MMUDR_CM(flags.cache_mode) |
-		(flags.access & ACCESS_READ ? MCF_MMU_MMUDR_R : 0) |		/* read access enable */
-		(flags.access & ACCESS_WRITE ? MCF_MMU_MMUDR_W : 0) |		/* write access enable */
-		(flags.access & ACCESS_EXECUTE ? MCF_MMU_MMUDR_X : 0);		/* execute access enable */
-
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC |		/* access TLB, data */
-		MCF_MMU_MMUOR_UAA;					/* update allocation address field */
-
-	MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | 	/* instruction */
-		MCF_MMU_MMUOR_ACC |     			/* access TLB */
-		MCF_MMU_MMUOR_UAA;      			/* update allocation address field */
-	dbg("mapped virt=%p to phys=%p\r\n", virt, phys);
 }


--- a/tos/jtagwait/Makefile
+++ b/tos/jtagwait/Makefile
@@ -0,0 +1,97 @@
+CROSS=Y
+
+CROSSBINDIR_IS_Y=m68k-atari-mint-
+CROSSBINDIR_IS_N=
+
+CROSSBINDIR=$(CROSSBINDIR_IS_$(CROSS))
+
+UNAME := $(shell uname)
+ifeq ($(CROSS), Y)
+ifeq ($(UNAME),Linux)
+PREFIX=m68k-atari-mint
+HATARI=hatari
+else
+PREFIX=m68k-atari-mint
+HATARI=/usr/local/bin/hatari
+endif
+else
+PREFIX=/usr
+endif
+
+DEPEND=depend
+TOPDIR = ../..
+
+INCLUDE=-I$(TOPDIR)/../libcmini/include -nostdlib
+LIBS=-lcmini -nostdlib -lgcc
+CC=$(PREFIX)/bin/gcc
+
+CC=$(CROSSBINDIR)gcc
+STRIP=$(CROSSBINDIR)strip
+STACK=$(CROSSBINDIR)stack
+
+APP=jtagwait.prg
+TEST_APP=$(APP)
+
+CFLAGS=\
+	-Os\
+	-g\
+	-Wl,-Map,mapfile\
+	-Wall
+	
+SRCDIR=sources
+INCDIR=include
+INCLUDE+=-I$(INCDIR)
+
+CSRCS=\
+	$(SRCDIR)/jtagwait.c
+ASRCS=
+
+COBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.c,%.o,$(CSRCS)))
+AOBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.S,%.o,$(ASRCS)))
+OBJS=$(COBJS) $(AOBJS)
+
+TRGTDIRS=./m5475 ./m5475/mshort
+OBJDIRS=$(patsubst %,%/objs,$(TRGTDIRS))
+
+#
+# multilib flags. These must match m68k-atari-mint-gcc -print-multi-lib output
+#
+m5475/$(APP):CFLAGS += -mcpu=5475
+m5475/mshort/$(APP): CFLAGS += -mcpu=5475 -mshort
+
+all:$(patsubst %,%/$(APP),$(TRGTDIRS))
+#
+# generate pattern rules for multilib object files.
+#
+define CC_TEMPLATE
+$(1)/objs/%.o:$(SRCDIR)/%.c
+	$(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@
+
+$(1)/objs/%.o:$(SRCDIR)/%.S
+	$(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@
+
+$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS))
+$(1)/$(APP): $$($(1)_OBJS)
+	$(CC) $$(CFLAGS) -o $$@ $(TOPDIR)/../libcmini/$(1)/startup.o $$($(1)_OBJS) -L$(TOPDIR)/../libcmini/$(1) $(LIBS)
+	$(STRIP) $$@
+endef
+$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR))))
+
+$(DEPEND): $(ASRCS) $(CSRCS)
+	-rm -f $(DEPEND)
+	for d in $(TRGTDIRS);\
+		do $(CC) $(CFLAGS) $(INCLUDE) -M $(ASRCS) $(CSRCS) | sed -e "s#^\(.*\).o:#$$d/objs/\1.o:#" >> $(DEPEND); \
+    done
+
+
+clean:
+	@rm -f $(patsubst %,%/objs/*.o,$(TRGTDIRS)) $(patsubst %,%/$(APP),$(TRGTDIRS))
+	@rm -f $(DEPEND) mapfile
+
+.PHONY: printvars
+printvars:
+	@$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
+	 
+ifneq (clean,$(MAKECMDGOALS))
+-include $(DEPEND)
+endif
--- a/tos/jtagwait/include/driver_vec.h
+++ b/tos/jtagwait/include/driver_vec.h
@@ -0,0 +1,125 @@
+/*
+ * driver_vec.h
+ *
+ * Interface for exposure of BaS drivers to the OS
+ *
+ * This file is part of BaS_gcc.
+ *
+ * BaS_gcc is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * BaS_gcc is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *  Created on: 24.10.2013
+ *      Author: Markus Fröschle
+ */
+
+#ifndef _DRIVER_VEC_H_
+#define _DRIVER_VEC_H_
+
+
+enum driver_type
+{
+	END_OF_DRIVERS,		/* marks end of driver list */
+	BLOCKDEV_DRIVER,
+	CHARDEV_DRIVER,
+	VIDEO_DRIVER,
+	XHDI_DRIVER,
+	MCD_DRIVER,
+};
+
+struct generic_driver_interface
+{
+	uint32_t (*init)(void);
+	uint32_t (*read)(void *buf, size_t count);
+	uint32_t (*write)(const void *buf, size_t count);
+	uint32_t (*ioctl)(uint32_t request, ...);
+};
+
+
+/* Chained buffer descriptor */
+typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
+struct MCD_bufDesc_struct {
+	uint32_t flags;         /* flags describing the DMA */
+    uint32_t csumResult;    /* checksum from checksumming performed since last checksum reset */
+	int8_t  *srcAddr;      /* the address to move data from */
+	int8_t  *destAddr;     /* the address to move data to */
+	int8_t  *lastDestAddr; /* the last address written to */
+    uint32_t dmaSize;       /* the number of bytes to transfer independent of the transfer size */
+    MCD_bufDesc *next; /* next buffer descriptor in chain */
+    uint32_t info;          /* private information about this descriptor;  DMA does not affect it */
+};
+
+/* Progress Query struct */
+typedef volatile struct MCD_XferProg_struct {
+	int8_t *lastSrcAddr;         /* the most-recent or last, post-increment source address */
+	int8_t *lastDestAddr;        /* the most-recent or last, post-increment destination address */
+	uint32_t  dmaSize;            /* the amount of data transferred for the current buffer */
+	MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */
+} MCD_XferProg;
+
+struct dma_driver_interface
+{
+	int32_t version;
+	int32_t magic;
+	int32_t (*dma_set_initiator)(int initiator);
+	uint32_t (*dma_get_initiator)(int requestor);
+	void (*dma_free_initiator)(int requestor);
+	int32_t (*dma_set_channel)(int requestor, void (*handler)(void));
+	int (*dma_get_channel)(int requestor);
+	void (*dma_free_channel)(int requestor);
+	void (*dma_clear_channel)(int channel);
+	int (*MCD_startDma)(int channel, int8_t *srcAddr, int16_t srcIncr, int8_t *destAddr, int16_t destIncr,
+						uint32_t dmaSize, uint32_t xferSize, uint32_t initiator, int32_t priority, uint32_t flags,
+						uint32_t funcDesc);
+	int (*MCD_dmaStatus)(int channel);
+	int (*MCD_XferProgrQuery)(int channel, MCD_XferProg *progRep);
+	int (*MCD_killDma)(int channel);
+	int (*MCD_continDma)(int channel);
+	int (*MCD_pauseDma)(int channel);
+	int (*MCD_resumeDma)(int channel);
+	int (*MCD_csumQuery)(int channel, uint32_t *csum);
+	void *(*dma_malloc)(long amount);
+	int (*dma_free)(void *addr);
+};
+	
+struct xhdi_driver_interface
+{
+	uint32_t (*xhdivec)();
+};
+
+union interface
+{
+	struct generic_driver_interface *gdi;
+	struct xhdi_driver_interface *xhdi;
+	struct dma_driver_interface *dma;
+};
+
+struct generic_interface
+{
+	enum driver_type type;
+	char name[16];
+	char description[64];
+	int version;
+	int revision;
+	union interface interface;
+};
+
+struct driver_table
+{
+	uint32_t bas_version;
+	uint32_t bas_revision;
+	uint32_t (*remove_handler)();			/* calling this will disable the BaS' hook into trap #0 */
+	struct generic_interface *interfaces;
+};
+
+
+#endif /* _DRIVER_VEC_H_ */
--- a/tos/jtagwait/jtagwait.config
+++ b/tos/jtagwait/jtagwait.config
@@ -0,0 +1 @@
+// ADD PREDEFINED MACROS HERE!
--- a/tos/jtagwait/jtagwait.creator
+++ b/tos/jtagwait/jtagwait.creator
@@ -0,0 +1 @@
+[General]
--- a/tos/jtagwait/jtagwait.creator.user
+++ b/tos/jtagwait/jtagwait.creator.user
@@ -0,0 +1,186 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE QtCreatorProject>
+<!-- Written by QtCreator 3.0.1, 2014-08-04T18:51:58. -->
+<qtcreator>
+ <data>
+  <variable>ProjectExplorer.Project.ActiveTarget</variable>
+  <value type="int">0</value>
+ </data>
+ <data>
+  <variable>ProjectExplorer.Project.EditorSettings</variable>
+  <valuemap type="QVariantMap">
+   <value type="bool" key="EditorConfiguration.AutoIndent">true</value>
+   <value type="bool" key="EditorConfiguration.AutoSpacesForTabs">false</value>
+   <value type="bool" key="EditorConfiguration.CamelCaseNavigation">true</value>
+   <valuemap type="QVariantMap" key="EditorConfiguration.CodeStyle.0">
+    <value type="QString" key="language">Cpp</value>
+    <valuemap type="QVariantMap" key="value">
+     <value type="QByteArray" key="CurrentPreferences">CppGlobal</value>
+    </valuemap>
+   </valuemap>
+   <valuemap type="QVariantMap" key="EditorConfiguration.CodeStyle.1">
+    <value type="QString" key="language">QmlJS</value>
+    <valuemap type="QVariantMap" key="value">
+     <value type="QByteArray" key="CurrentPreferences">QmlJSGlobal</value>
+    </valuemap>
+   </valuemap>
+   <value type="int" key="EditorConfiguration.CodeStyle.Count">2</value>
+   <value type="QByteArray" key="EditorConfiguration.Codec">UTF-8</value>
+   <value type="bool" key="EditorConfiguration.ConstrainTooltips">false</value>
+   <value type="int" key="EditorConfiguration.IndentSize">4</value>
+   <value type="bool" key="EditorConfiguration.KeyboardTooltips">false</value>
+   <value type="bool" key="EditorConfiguration.MouseNavigation">true</value>
+   <value type="int" key="EditorConfiguration.PaddingMode">1</value>
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--- a/tos/jtagwait/jtagwait.files
+++ b/tos/jtagwait/jtagwait.files
@@ -0,0 +1,3 @@
+include/driver_vec.h
+sources/jtagwait.c
+Makefile
--- a/tos/jtagwait/jtagwait.includes
+++ b/tos/jtagwait/jtagwait.includes
@@ -0,0 +1 @@
+include
--- a/tos/jtagwait/sources/jtagwait.c
+++ b/tos/jtagwait/sources/jtagwait.c
@@ -0,0 +1,75 @@
+#include <stdio.h>
+#include <mint/osbind.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "driver_vec.h"
+
+#define FPGA_JTAG_LOADED_FLAG               ((volatile bool *) 0xFF101000)
+
+#define _MBAR                               ((volatile uint8_t *) 0xFF000000)
+#define MCF_GPIO_PDDR_FEC1L                 ((volatile uint8_t *)(&_MBAR[0xA17]))
+#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4     (0x10)
+#define MCF_GPIO_PPDSDR_FEC1L               ((volatile uint8_t *)(&_MBAR[0xA27]))
+#define FPGA_CONFIG                     	(1 << 2)
+#define FPGA_CONF_DONE                      (1 << 5)
+
+static inline uint32_t set_ipl(uint32_t ipl)
+{
+    uint32_t ret;
+
+    __asm__ __volatile__(
+        "		move.w	sr,%[ret]\r\n"			/* retrieve status register */
+        "		andi.l	#0x07,%[ipl]\n\t"		/* mask out ipl bits on new value */
+        "		lsl.l	#8,%[ipl]\n\t"			/* shift them to position */
+        "		move.l	%[ret],d0\n\t"			/* retrieve original value */
+        "		andi.l	#0x0000f8ff,d0\n\t"		/* clear ipl part */
+        "		or.l	%[ipl],d0\n\t"			/* or in new value */
+        "		move.w	d0,sr\n\t"				/* put it in place */
+        "		andi.l	#0x0700,%[ret]\r\n"		/* mask out ipl bits */
+        "		lsr.l	#8,%[ret]\r\n"			/* shift them to position */
+        : [ret] "=&d" (ret)		/* output */
+        : [ipl] "d" (ipl)		/* input */
+        : "d0", "cc"	/* clobber */
+    );
+
+    return ret;
+}
+
+void wait_for_jtag(void)
+{
+    set_ipl(7);                     /* disable interrupts */
+    /*
+     * configure FEC1L port directions to enable external JTAG configuration download to FPGA
+     */
+    *MCF_GPIO_PDDR_FEC1L = 0 |
+                          MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4;	/* bit 4 = LED => output */
+                                                            /* all other bits = input */
+    /*
+     * now that this GPIO ports have been switched to input, we can poll for FPGA config
+     * started from the JTAG interface (CONFIGn goes high) and finish (CONF_DONE goes high)
+     */
+    while (*MCF_GPIO_PPDSDR_FEC1L & FPGA_CONFIG);           /* wait for JTAG reset */
+    while (!(*MCF_GPIO_PPDSDR_FEC1L & FPGA_CONFIG));        /* wait for JTAG config load starting */
+    while (!(*MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE));     /* wait for JTAG config load finished */
+
+    *FPGA_JTAG_LOADED_FLAG = true;     /* indicate jtag loaded FPGA config to BaS */
+
+    /*
+     * reboot after configuration finished
+     */
+    __asm__ __volatile__(
+        "jmp    0xE0000000\n\t"
+    );
+}
+
+int main(int argc, char *argv[])
+{
+    printf("\033E\r\nFPGA JTAG configuration support\r\n");
+    printf("You may now savely load a new FPGA configuration through the JTAG interface\r\n"
+           "and your Firebee will reboot once finished using that new configuration.\r\n");
+    Supexec(wait_for_jtag);
+
+    return 0;       /* just to make the compiler happy, we will never return */
+}
+
--- a/tos/mcdcook/Makefile
+++ b/tos/mcdcook/Makefile
@@ -0,0 +1,117 @@
+CROSS=Y
+
+CROSSBINDIR_IS_Y=m68k-atari-mint-
+CROSSBINDIR_IS_N=
+
+CROSSBINDIR=$(CROSSBINDIR_IS_$(CROSS))
+
+UNAME := $(shell uname)
+ifeq ($(CROSS), Y)
+ifeq ($(UNAME),Linux)
+PREFIX=m68k-atari-mint
+HATARI=hatari
+else
+PREFIX=m68k-atari-mint
+HATARI=/usr/local/bin/hatari
+endif
+else
+PREFIX=/usr
+endif
+
+DEPEND=depend
+TOPDIR= ../..
+
+INCLUDE=-I$(TOPDIR)/../libcmini/include -nostdlib
+LIBS=-lcmini -nostdlib -lgcc
+CC=$(PREFIX)/bin/gcc
+
+CC=$(CROSSBINDIR)gcc
+STRIP=$(CROSSBINDIR)strip
+STACK=$(CROSSBINDIR)stack
+
+APP=mcdcook.prg
+TEST_APP=$(APP)
+
+CFLAGS=\
+	-Os\
+	-g\
+	-Wl,-Map,mapfile\
+	-Wall
+	
+SRCDIR=sources
+INCDIR=include
+INCLUDE+=-I$(INCDIR)
+
+CSRCS=\
+	$(SRCDIR)/mcdcook.c
+ASRCS=
+
+COBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.c,%.o,$(CSRCS)))
+AOBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.S,%.o,$(ASRCS)))
+OBJS=$(COBJS) $(AOBJS)
+
+TRGTDIRS=. ./m68020-60 ./m5475 ./mshort ./m68020-60/mshort ./m5475/mshort
+OBJDIRS=$(patsubst %,%/objs,$(TRGTDIRS))
+
+#
+# multilib flags. These must match m68k-atari-mint-gcc -print-multi-lib output
+#
+m68020-60/$(APP):CFLAGS += -m68020-60
+m5475/$(APP):CFLAGS += -mcpu=5475
+mshort/$(APP):CFLAGS += -mshort
+m68020-60/mshort/$(APP): CFLAGS += -m68020-60 -mshort
+m5475/mshort/$(APP): CFLAGS += -mcpu=5475 -mshort
+
+ctest: $(TEST_APP)
+all:$(patsubst %,%/$(APP),$(TRGTDIRS))
+#
+# generate pattern rules for multilib object files.
+#
+define CC_TEMPLATE
+$(1)/objs/%.o:$(SRCDIR)/%.c
+	$(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@
+
+$(1)/objs/%.o:$(SRCDIR)/%.S
+	$(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@
+
+$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS))
+$(1)/$(APP): $$($(1)_OBJS)
+	$(CC) $$(CFLAGS) -o $$@ $(TOPDIR)/../libcmini/$(1)/startup.o $$($(1)_OBJS) -L$(TOPDIR)/../libcmini/$(1) $(LIBS)
+	$(STRIP) $$@
+endef
+$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR))))
+
+$(DEPEND): $(ASRCS) $(CSRCS)
+	-rm -f $(DEPEND)
+	for d in $(TRGTDIRS);\
+		do $(CC) $(CFLAGS) $(INCLUDE) -M $(ASRCS) $(CSRCS) | sed -e "s#^\(.*\).o:#$$d/objs/\1.o:#" >> $(DEPEND); \
+    done
+
+
+clean:
+	@rm -f $(patsubst %,%/objs/*.o,$(TRGTDIRS)) $(patsubst %,%/$(APP),$(TRGTDIRS))
+	@rm -f $(DEPEND) mapfile
+
+.PHONY: printvars
+printvars:
+	@$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V))))
+	 
+ifneq (clean,$(MAKECMDGOALS))
+-include $(DEPEND)
+endif
+
+test: $(TEST_APP)
+	$(HATARI) --grab -w --tos $(TOPDIR)/../emutos/etos512k.img \
+	--machine falcon -s 14 --cpuclock 32 --cpulevel 3 --vdi true --vdi-planes 4 \
+	--vdi-width 640 --vdi-height 480 -d . $(APP)
+
+ftest: $(TEST_APP)
+	$(HATARI) --grab -w --tos /usr/share/hatari/TOS404.IMG \
+	--machine falcon --cpuclock 32 --cpulevel 3 \
+	-d . $(APP)
+	
+sttest: $(TEST_APP)
+	$(HATARI) --grab -w --tos "/usr/share/hatari/tos106de.img" \
+	--machine st --cpuclock 32 --cpulevel 3  --vdi true --vdi-planes 4 \
+	--vdi-width 640 --vdi-height 480 \
+	-d . $(APP)
--- a/tos/mcdcook/include/driver_vec.h
+++ b/tos/mcdcook/include/driver_vec.h
@@ -0,0 +1,125 @@
+/*
+ * driver_vec.h
+ *
+ * Interface for exposure of BaS drivers to the OS
+ *
+ * This file is part of BaS_gcc.
+ *
+ * BaS_gcc is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * BaS_gcc is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *  Created on: 24.10.2013
+ *      Author: Markus Fröschle
+ */
+
+#ifndef _DRIVER_VEC_H_
+#define _DRIVER_VEC_H_
+
+
+enum driver_type
+{
+	END_OF_DRIVERS,		/* marks end of driver list */
+	BLOCKDEV_DRIVER,
+	CHARDEV_DRIVER,
+	VIDEO_DRIVER,
+	XHDI_DRIVER,
+	MCD_DRIVER,
+};
+
+struct generic_driver_interface
+{
+	uint32_t (*init)(void);
+	uint32_t (*read)(void *buf, size_t count);
+	uint32_t (*write)(const void *buf, size_t count);
+	uint32_t (*ioctl)(uint32_t request, ...);
+};
+
+
+/* Chained buffer descriptor */
+typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
+struct MCD_bufDesc_struct {
+	uint32_t flags;         /* flags describing the DMA */
+    uint32_t csumResult;    /* checksum from checksumming performed since last checksum reset */
+	int8_t  *srcAddr;      /* the address to move data from */
+	int8_t  *destAddr;     /* the address to move data to */
+	int8_t  *lastDestAddr; /* the last address written to */
+    uint32_t dmaSize;       /* the number of bytes to transfer independent of the transfer size */
+    MCD_bufDesc *next; /* next buffer descriptor in chain */
+    uint32_t info;          /* private information about this descriptor;  DMA does not affect it */
+};
+
+/* Progress Query struct */
+typedef volatile struct MCD_XferProg_struct {
+	int8_t *lastSrcAddr;         /* the most-recent or last, post-increment source address */
+	int8_t *lastDestAddr;        /* the most-recent or last, post-increment destination address */
+	uint32_t  dmaSize;            /* the amount of data transferred for the current buffer */
+	MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */
+} MCD_XferProg;
+
+struct dma_driver_interface
+{
+	int32_t version;
+	int32_t magic;
+	int32_t (*dma_set_initiator)(int initiator);
+	uint32_t (*dma_get_initiator)(int requestor);
+	void (*dma_free_initiator)(int requestor);
+	int32_t (*dma_set_channel)(int requestor, void (*handler)(void));
+	int (*dma_get_channel)(int requestor);
+	void (*dma_free_channel)(int requestor);
+	void (*dma_clear_channel)(int channel);
+	int (*MCD_startDma)(int channel, int8_t *srcAddr, int16_t srcIncr, int8_t *destAddr, int16_t destIncr,
+						uint32_t dmaSize, uint32_t xferSize, uint32_t initiator, int32_t priority, uint32_t flags,
+						uint32_t funcDesc);
+	int (*MCD_dmaStatus)(int channel);
+	int (*MCD_XferProgrQuery)(int channel, MCD_XferProg *progRep);
+	int (*MCD_killDma)(int channel);
+	int (*MCD_continDma)(int channel);
+	int (*MCD_pauseDma)(int channel);
+	int (*MCD_resumeDma)(int channel);
+	int (*MCD_csumQuery)(int channel, uint32_t *csum);
+	void *(*dma_malloc)(long amount);
+	int (*dma_free)(void *addr);
+};
+	
+struct xhdi_driver_interface
+{
+	uint32_t (*xhdivec)();
+};
+
+union interface
+{
+	struct generic_driver_interface *gdi;
+	struct xhdi_driver_interface *xhdi;
+	struct dma_driver_interface *dma;
+};
+
+struct generic_interface
+{
+	enum driver_type type;
+	char name[16];
+	char description[64];
+	int version;
+	int revision;
+	union interface interface;
+};
+
+struct driver_table
+{
+	uint32_t bas_version;
+	uint32_t bas_revision;
+	uint32_t (*remove_handler)();			/* calling this will disable the BaS' hook into trap #0 */
+	struct generic_interface *interfaces;
+};
+
+
+#endif /* _DRIVER_VEC_H_ */
--- a/tos/mcdcook/sources/mcdcook.c
+++ b/tos/mcdcook/sources/mcdcook.c
@@ -0,0 +1,121 @@
+#include <stdio.h>
+#include <mint/osbind.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "driver_vec.h"
+
+struct driver_table *get_bas_drivers(void)
+{
+	struct driver_table *ret = NULL;
+
+	__asm__ __volatile(
+		"	trap	#0\n\t"
+		"	move.l	d0,%[ret]\n\t"
+		:	[ret] "=m" (ret)	/* output */
+		:						/* no inputs */
+		:						/* clobbered */
+	);
+	
+	return ret;
+}
+
+static uint32_t cookieptr(void)
+{
+	return * (uint32_t *) 0x5a0L;
+}
+
+void setcookie(uint32_t cookie, uint32_t value)
+{
+	uint32_t *cookiejar = (uint32_t *) Supexec(cookieptr);
+	int num_slots;
+	int max_slots;
+	
+	num_slots = max_slots = 0;
+	do
+	{
+		if (cookiejar[0] == cookie)
+		{
+			cookiejar[1] = value;
+			return;
+		}
+		cookiejar = &(cookiejar[2]);
+		num_slots++;
+	} while (cookiejar[-2]);
+	
+	/*
+	 * Here we are at the end of the list and did not find our cookie.
+	 * Let's check if there is any space left and append our value to the
+	 * list if so. If not, we are lost (extending the cookie jar does only
+	 * work from TSRs)
+	 */
+	if (cookiejar[-1])
+		max_slots = cookiejar[-1];
+	 
+	if (max_slots > num_slots)
+	{
+		 /* relief, there is space left, extend the list */
+		cookiejar[0] = cookiejar[-2];
+		cookiejar[1] = cookiejar[-1];
+		/* add the new element */
+		cookiejar[-2] = cookie;
+		cookiejar[-1] = value;
+	}
+	else
+		printf("cannot set cookie, cookie jar is full!\r\n");
+}
+
+# define COOKIE_DMAC	0x444D4143L /* FireTOS DMA API */
+
+static char *dt_to_str(enum driver_type dt)
+{
+	switch (dt)
+	{
+		case BLOCKDEV_DRIVER: return "generic block device driver";
+		case CHARDEV_DRIVER:  return "generic character device driver";
+		case VIDEO_DRIVER:    return "video/framebuffer driver";
+		case XHDI_DRIVER:     return "XHDI compatible hard disk driver";
+		case MCD_DRIVER:	  return "multichannel DMA driver";
+		default:              return "unknown driver type";
+	}
+}
+
+int main(int argc, char *argv[])
+{
+	struct driver_table *dt;
+	void *ssp;
+
+	(void) Cconws("retrieve BaS driver interface\r\n");
+	
+	ssp = (void *) Super(0L);
+	dt = get_bas_drivers();
+	if (dt)
+	{
+		struct generic_interface *ifc = &dt->interfaces[0];
+
+		printf("BaS driver table found at %p, BaS version is %d.%d\r\n", dt,
+				dt->bas_version, dt->bas_revision);
+
+		while (ifc->type != END_OF_DRIVERS)
+		{
+			printf("driver \"%s (%s)\" found,\r\n"
+				   "interface type is %d (%s),\r\n"
+				   "version %d.%d\r\n\r\n",
+					ifc->name, ifc->description, ifc->type, dt_to_str(ifc->type),
+					ifc->version, ifc->revision);
+			if (ifc->type == MCD_DRIVER)
+			{
+				setcookie(COOKIE_DMAC, ifc->interface.dma);
+				printf("\r\nDMAC cookie set to %p\r\n", ifc->interface.dma);
+			}
+			ifc++;
+		}
+	}
+	Super(ssp);
+	
+	while (Cconis()) Cconin();	/* eat keys */
+	printf("press any key to continue\n\r");
+	// while (! Cconis());
+	return 0;
+}
+
--- a/video/fbmodedb.c
+++ b/video/fbmodedb.c
@@ -18,7 +18,7 @@

 #define DBG_MODES
 #ifdef DBG_MODES
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_MODES */
--- a/video/fnt_st_8x16.c
+++ b/video/fnt_st_8x16.c
@@ -7,11 +7,10 @@
 * option any later version.  See doc/license.txt for details.
 */

-#include "config.h"
-#include "portab.h"
+#include "bas_types.h"
 #include "font.h"

-static const UWORD off_table[] =
+static const uint16_t off_table[] =
 {
    0x0000, 0x0008, 0x0010, 0x0018, 0x0020, 0x0028, 0x0030, 0x0038,
    0x0040, 0x0048, 0x0050, 0x0058, 0x0060, 0x0068, 0x0070, 0x0078,
@@ -48,7 +47,7 @@ static const UWORD off_table[] =
    0x0800,
 };

-static const UWORD dat_table[] =
+static const uint16_t dat_table[] =
 {
    0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
    0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1104,
--- a/video/videl.c
+++ b/video/videl.c
@@ -11,7 +11,12 @@
 * option any later version.  See doc/license.txt for details.
 */

-#define DBG_VIDEL 0
+#define DBG_VIDEL
+#ifdef DBG_VIDEL
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
+#else
+#define dbg(format, arg...) do { ; } while (0)
+#endif /* DBG_VIDEL */

 #include <stdint.h>
 #include <stdbool.h>
@@ -300,14 +305,14 @@ static uint16_t get_videl_bpp(void)

 static uint16_t get_videl_width(void)
 {
-    return (*(volatile uint16_t *)0xffff8210) * 16 / get_videl_bpp();
+    return ( * (volatile uint16_t *) 0xffff8210) * 16 / get_videl_bpp();
 }

 static uint16_t get_videl_height(void)
 {
-    uint16_t vdb = *(volatile uint16_t *)0xffff82a8;
-    uint16_t vde = *(volatile uint16_t *)0xffff82aa;
-    uint16_t vmode = *(volatile uint16_t *)0xffff82c2;
+    uint16_t vdb = * (volatile uint16_t *) 0xffff82a8;
+    uint16_t vde = * (volatile uint16_t *) 0xffff82aa;
+    uint16_t vmode = * (volatile uint16_t *) 0xffff82c2;

    /* visible y resolution:
     * Graphics display starts at line VDB and ends at line
@@ -332,11 +337,14 @@ const VMODE_ENTRY *lookup_videl_mode(int16_t mode,int16_t monitor)
 {
    const VMODE_ENTRY *vmode_init_table, *p;

-    if (mode&VIDEL_VGA) {
+    if (mode&VIDEL_VGA)
+    {
        vmode_init_table = vga_init_table;
        /* ignore bits that don't affect initialisation data */
        mode &= ~(VIDEL_VERTICAL|VIDEL_PAL);
-    } else {
+    }
+    else
+    {
        vmode_init_table = nonvga_init_table;
    }

@@ -368,34 +376,38 @@ static int16_t determine_width(int16_t mode)
 /*
 * determine vctl based on video mode and monitor type
 */
-static int16_t determine_vctl(int16_t mode,int16_t monitor)
+static int16_t determine_vctl(int16_t mode, int16_t monitor)
 {
    int16_t vctl;

-    if (mode&VIDEL_VGA) {
-        vctl = (mode&VIDEL_80COL) ? 0x08 : 0x04;
-        if (mode&VIDEL_VERTICAL)
+    if (mode & VIDEL_VGA)
+    {
+        vctl = (mode & VIDEL_80COL) ? 0x08 : 0x04;
+        if (mode & VIDEL_VERTICAL)
            vctl |= 0x01;
-    } else {
-        vctl = (mode&VIDEL_80COL) ? 0x04 : 0x00;
-        if (mode&VIDEL_VERTICAL)
+    }
+    else
+    {
+        vctl = (mode & VIDEL_80COL) ? 0x04 : 0x00;
+        if (mode & VIDEL_VERTICAL)
            vctl |= 0x02;
    }

-    if (!(mode&VIDEL_COMPAT))
+    if (!(mode & VIDEL_COMPAT))
        return vctl;

-    switch(mode&VIDEL_BPPMASK) {
-    case VIDEL_1BPP:
-        if (!(mode&VIDEL_VGA) && (monitor == MON_MONO))
-            vctl = 0x08;
-        break;
-    case VIDEL_2BPP:
-        vctl = (mode&VIDEL_VGA)? 0x09 : 0x04;
-        break;
-    case VIDEL_4BPP:
-        vctl = (mode&VIDEL_VGA)? 0x05 : 0x00;
-        break;
+    switch (mode & VIDEL_BPPMASK)
+    {
+        case VIDEL_1BPP:
+            if (!(mode & VIDEL_VGA) && (monitor == MON_MONO))
+                vctl = 0x08;
+            break;
+        case VIDEL_2BPP:
+            vctl = (mode & VIDEL_VGA)? 0x09 : 0x04;
+            break;
+        case VIDEL_4BPP:
+            vctl = (mode & VIDEL_VGA)? 0x05 : 0x00;
+            break;
    }

    return vctl;
@@ -407,25 +419,28 @@ static int16_t determine_vctl(int16_t mode,int16_t monitor)
 */
 static int16_t determine_regc0(int16_t mode,int16_t monitor)
 {
-    if (mode&VIDEL_VGA)
+    if (mode & VIDEL_VGA)
        return 0x0186;

-    if (!(mode&VIDEL_COMPAT))
-        return (monitor==MON_TV)?0x0183:0x0181;
+    if (!(mode & VIDEL_COMPAT))
+        return (monitor == MON_TV) ? 0x0183 : 0x0181;

    /* handle ST-compatible modes */
-    if ((mode&(VIDEL_80COL|VIDEL_BPPMASK)) == (VIDEL_80COL|VIDEL_1BPP)) {  /* 80-column, 2-colour */
-        switch(monitor) {
-        case MON_MONO:
-            return 0x0080;
-        case MON_TV:
-            return 0x0183;
-        default:
-            return 0x0181;
+    if ((mode & (VIDEL_80COL | VIDEL_BPPMASK)) == (VIDEL_80COL | VIDEL_1BPP))
+    {
+        /* 80-column, 2-colour */
+        switch(monitor)
+        {
+            case MON_MONO:
+                return 0x0080;
+            case MON_TV:
+                return 0x0183;
+            default:
+                return 0x0181;
        }
    }

-    return (monitor==MON_TV)?0x0083:0x0081;
+    return (monitor == MON_TV) ? 0x0083 : 0x0081;
 }


@@ -445,7 +460,7 @@ static int set_videl_vga(int16_t mode)
    if (!p)
        return -1;

-    videlregs[0x0a] = (mode&VIDEL_PAL) ? 2 : 0; /* video sync to 50Hz if PAL */
+    videlregs[0x0a] = (mode & VIDEL_PAL) ? 2 : 0; /* video sync to 50Hz if PAL */

    // FIXME: vsync() can't work if the screen is initially turned off
    //vsync(); /* wait for vbl so we're not interrupted :-) */
@@ -476,28 +491,30 @@ static int set_videl_vga(int16_t mode)
    videlword(0xc0) = determine_regc0(mode,monitor);
    videlword(0x66) = 0x0000;           /* clear SPSHIFT */

-    switch(mode&VIDEL_BPPMASK) {        /* set SPSHIFT / ST shift */
-    case VIDEL_1BPP:                    /* 2 colours (mono) */
-        if (monitor == MON_MONO)
-            videlregs[0x60] = 0x02;
-        else videlword(0x66) = 0x0400;
-        break;
-    case VIDEL_2BPP:                    /* 4 colours */
-        videlregs[0x60] = 0x01;
-        videlword(0x10) = linewidth;        /* writing to the ST shifter has    */
-        videlword(0xc2) = vctl;             /* just overwritten these registers */
-        break;
-    case VIDEL_4BPP:                    /* 16 colours */
-        /* if not ST-compatible, SPSHIFT was already set correctly above */
-        if (mode&VIDEL_COMPAT)
-            videlregs[0x60] = 0x00;         /* else set ST shifter */
-        break;
-    case VIDEL_8BPP:                    /* 256 colours */
-        videlword(0x66) = 0x0010;
-        break;
-    case VIDEL_TRUECOLOR:               /* 65536 colours (Truecolor) */
-        videlword(0x66) = 0x0100;
-        break;
+    switch(mode & VIDEL_BPPMASK)
+    {
+        /* set SPSHIFT / ST shift */
+        case VIDEL_1BPP:                    /* 2 colours (mono) */
+            if (monitor == MON_MONO)
+                videlregs[0x60] = 0x02;
+            else videlword(0x66) = 0x0400;
+            break;
+        case VIDEL_2BPP:                    /* 4 colours */
+            videlregs[0x60] = 0x01;
+            videlword(0x10) = linewidth;        /* writing to the ST shifter has    */
+            videlword(0xc2) = vctl;             /* just overwritten these registers */
+            break;
+        case VIDEL_4BPP:                    /* 16 colours */
+            /* if not ST-compatible, SPSHIFT was already set correctly above */
+            if (mode & VIDEL_COMPAT)
+                videlregs[0x60] = 0x00;         /* else set ST shifter */
+            break;
+        case VIDEL_8BPP:                    /* 256 colours */
+            videlword(0x66) = 0x0010;
+            break;
+        case VIDEL_TRUECOLOR:               /* 65536 colours (Truecolor) */
+            videlword(0x66) = 0x0100;
+            break;
    }

    return 0;
@@ -518,8 +535,8 @@ int16_t vsetmode(int16_t mode)
    if (mode == -1)
        return current_video_mode;

-#if DBG_VIDEL
-    kprintf("vsetmode(0x%04x)\n", mode);
+#ifdef DBG_VIDEL
+    xprintf("vsetmode(0x%04x)\n", mode);
 #endif

    if (set_videl_vga(mode) < 0)    /* invalid mode */
@@ -577,26 +594,30 @@ int32_t vgetsize(int16_t mode)
    monitor = vmontype();

    mode &= VIDEL_VALID;        /* ignore invalid bits */
-    if ((mode&VIDEL_BPPMASK) > VIDEL_TRUECOLOR) {   /* fixup invalid bpp */
+    if ((mode & VIDEL_BPPMASK) > VIDEL_TRUECOLOR)
+    {
+        /* fixup invalid bpp */
        mode &= ~VIDEL_BPPMASK;
        mode |= VIDEL_TRUECOLOR;
    }

-    p = lookup_videl_mode(mode,monitor);
-    if (!p) {                   /* invalid mode */
-        if (mode&VIDEL_COMPAT)
+    p = lookup_videl_mode(mode, monitor);
+    if (!p)
+    {
+        /* invalid mode */
+        if (mode & VIDEL_COMPAT)
            return ST_VRAM_SIZE;
        mode &= ~(VIDEL_OVERSCAN|VIDEL_PAL);/* ignore less-important bits */
-        p = lookup_videl_mode(mode,monitor);/* & try again */
+        p = lookup_videl_mode(mode, monitor);/* & try again */
        if (!p)                             /* "can't happen" */
            return FALCON_VRAM_SIZE;
    }

-    vctl = determine_vctl(mode,monitor);
+    vctl = determine_vctl(mode, monitor);
    height = p->vde - p->vdb;
-    if (!(vctl&0x02))
+    if (!(vctl & 0x02))
        height >>= 1;
-    if (vctl&0x01)
+    if (vctl & 0x01)
        height >>= 1;

    return (int32_t)determine_width(mode) * 2 * height;
@@ -605,18 +626,21 @@ int32_t vgetsize(int16_t mode)
 /*
 * convert from Falcon palette format to STe palette format
 */
-#define falc2ste(a) ((((a)>>1)&0x08)|(((a)>>5)&0x07))
+#define falc2ste(a) ((((a) >> 1) & 0x08) | (((a) >> 5) & 0x07))
+
 static void convert2ste(int16_t *ste,int32_t *falcon)
 {
-    union {
+    union
+    {
        int32_t l;
        uint8_t b[4];
    } u;
    int i;

-    for (i = 0; i < 16; i++) {
+    for (i = 0; i < 16; i++)
+    {
        u.l = *falcon++;
-        *ste++ = (falc2ste(u.b[0])<<8) | (falc2ste(u.b[1])<<4) | falc2ste(u.b[3]);
+        *ste++ = (falc2ste(u.b[0]) << 8) | (falc2ste(u.b[1]) << 4) | falc2ste(u.b[3]);
    }
 }

@@ -629,10 +653,10 @@ static int use_ste_palette(int16_t videomode)
    if (vmontype() == MON_MONO)                     /* always for ST mono monitor */
        return true;

-    if ((videomode&VIDEL_BPPMASK) == VIDEL_2BPP)    /* always for 4-colour modes */
+    if ((videomode & VIDEL_BPPMASK) == VIDEL_2BPP)    /* always for 4-colour modes */
        return true;

-    if ((videomode&VIDEL_COMPAT) && ((videomode&VIDEL_BPPMASK) == VIDEL_4BPP))
+    if ((videomode & VIDEL_COMPAT) && ((videomode & VIDEL_BPPMASK) == VIDEL_4BPP))
        return true;                                /* and for ST low */

    return false;
@@ -652,10 +676,11 @@ static int use_ste_palette(int16_t videomode)
 * address | 0x01      load first 16 Falcon palette regs from address
 *       0 | 0x01      load 256 Falcon palette regs from falcon_shadow_palette[]
 */
-int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
+int16_t vsetrgb(int16_t index,int16_t count, int32_t *rgb)
 {
    int32_t *shadow, *source;
-    union {
+    union
+    {
        int32_t l;
        uint8_t b[4];
    } u;
@@ -664,8 +689,8 @@ int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
    if ((index < 0) || (count <= 0))
        return -1; /* Generic error */

-    limit = (get_videl_bpp()<=4) ? 16 : 256;
-    if ((index+count) > limit)
+    limit = (get_videl_bpp() <= 4) ? 16 : 256;
+    if ((index + count) > limit)
        return -1; /* Generic error */

    /*
@@ -674,7 +699,7 @@ int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
     */
    shadow = falcon_shadow_palette + index;
    source = rgb;
-    while(count--) {
+    while (count--) {
        u.l = *source++;
        u.b[0] = u.b[1];                 /* shift R & G */
        u.b[1] = u.b[2];
@@ -696,7 +721,7 @@ int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
        return 0; /* OK */
    }

-    colorptr = (limit==256) ? (int16_t *) 0x01L : (int16_t *) ((int32_t) falcon_shadow_palette|0x01L);
+    colorptr = (limit == 256) ? (int16_t *) 0x01L : (int16_t *) ((int32_t) falcon_shadow_palette|0x01L);

 	set_palette(colorptr);
    return 0; /* OK */
@@ -708,7 +733,8 @@ int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb)
 int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb)
 {
    int32_t *shadow;
-    union {
+    union
+    {
        int32_t l;
        uint8_t b[4];
    } u;
@@ -717,12 +743,13 @@ int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb)
    if ((index < 0) || (count <= 0))
        return -1; /* Generic error */

-    limit = (get_videl_bpp()<=4) ? 16 : 256;
-    if ((index+count) > limit)
+    limit = (get_videl_bpp() <= 4) ? 16 : 256;
+    if ((index + count) > limit)
        return -1; /* Generic error */

    shadow = falcon_shadow_palette + index;
-    while(count--) {
+    while (count--)
+    {
        u.l = *shadow++;
        u.b[2] = u.b[1];        /* shift R & G right*/
        u.b[1] = u.b[0];
@@ -769,7 +796,7 @@ int16_t vfixmode(int16_t mode)
    if (mode & VIDEL_VGA)                       /* if mode has VGA set, */
        mode ^= (VIDEL_VERTICAL | VIDEL_VGA);   /* clear it & flip vertical */
    if (mode & VIDEL_COMPAT) {
-        if ((mode&VIDEL_BPPMASK) == VIDEL_1BPP)
+        if ((mode & VIDEL_BPPMASK) == VIDEL_1BPP)
            mode |= VIDEL_VERTICAL;         /* set vertical for ST high */
        else mode &= ~VIDEL_VERTICAL;       /* clear it for ST medium, low  */
    }
@@ -786,7 +813,7 @@ int16_t videl_check_moderez(int16_t moderez)

    current_mode = get_videl_mode();
    return_mode = vfixmode(moderez);/* adjust */
-    return (return_mode==current_mode)?0:return_mode;
+    return (return_mode == current_mode) ? 0 : return_mode;
 }

 uint32_t videl_vram_size(void)
@@ -832,7 +859,7 @@ void initialise_falcon_palette(int16_t mode)
     * although it is probably not important since we don't use those
     * registers.
     */
-    limit = ((mode&VIDEL_BPPMASK)==VIDEL_8BPP) ? 256 : 16;
+    limit = ((mode & VIDEL_BPPMASK) == VIDEL_8BPP) ? 256 : 16;
    for (i = 0; i < limit; i++)
        fcol_regs[i] = falcon_shadow_palette[i];

@@ -840,7 +867,7 @@ void initialise_falcon_palette(int16_t mode)
     * if appropriate, set up the STe shadow & real palette registers
     */
    if (use_ste_palette(mode)) {
-        convert2ste(ste_shadow_palette,falcon_shadow_palette);
+        convert2ste(ste_shadow_palette, falcon_shadow_palette);
        for (i = 0; i < 16; i++)
            col_regs[i] = ste_shadow_palette[i];
    }
Author	SHA1	Message	Date
Markus Fröschle	1e471ec8cd	bumped version for release	2014-08-06 06:23:30 +00:00
Markus Fröschle	e3e202a7cc	added tos programs that are used to interface to BaS_gcc from TOS. These programs are currently not build by default (need to call make in their respective directory for now). They expect to find a libcmini copy on the same directory level than you have your BaS_gcc folder.	2014-08-02 08:25:07 +00:00
David Gálvez	8b8206cf97	Add format specifier to fix debug messages format	2014-07-13 15:18:23 +00:00
David Gálvez	77d134150a	Make PCI memory space uncachable	2014-07-10 16:46:21 +00:00
David Gálvez	8d62eb705f	Merge pci_BaS_gcc branch to trunk	2014-07-10 15:45:45 +00:00
Markus Fröschle	68aac6bf71	fixed formatting	2014-06-23 18:23:44 +00:00
Markus Fröschle	067b31c31d	fixed formatting	2014-06-23 05:46:13 +00:00
Markus Fröschle	53644425ea	fixed compiler warnings	2014-06-23 05:37:51 +00:00
Markus Fröschle	2ba3d52843	fixed a few compiler warnings	2014-06-23 05:32:49 +00:00
Markus Fröschle	7fd0c0c663	modified init_fpga() to honour JTAG configuration. Does not work currently and needs support from the TOS side (program not finished yet)	2014-06-22 16:00:49 +00:00
Markus Fröschle	ae44abc952	added Doxyfile for doxygen documentation	2014-06-21 19:53:54 +00:00
Markus Fröschle	1dc12f4b05	added BaS includes	2014-06-21 19:52:23 +00:00
Markus Fröschle	49e3eb31e4	added ST fonts	2014-06-21 19:48:22 +00:00
Markus Fröschle	6c006454be	version bump	2014-06-21 06:33:45 +00:00
Markus Fröschle	f61e97a7e0	some minor cosmetic fixes	2014-06-21 06:32:25 +00:00
Markus Fröschle	bc478f0e0a	reverted to last released to make it work again	2014-06-21 06:21:41 +00:00
Markus Fröschle	be773a7d0c	removed (now wrong) comment	2014-06-21 05:50:43 +00:00
Markus Fröschle	2bef4a39a5	completed locked TLB list	2014-06-20 20:24:37 +00:00
Markus Fröschle	291d3ad5bf	added locked TLB entries	2014-06-20 19:50:49 +00:00
Markus Fröschle	4a6987e3bb	started to revert to previous functionality	2014-06-20 18:35:08 +00:00
David Gálvez	73f75895bc	Add driver interface for PCI	2014-05-21 08:40:50 +00:00
David Gálvez	f0d0af7add	Create new branch for PCI development	2014-05-21 07:38:47 +00:00
Markus Fröschle	a23abf0b5d	corresponds to the equivalent file release. Contains networking code for EmuTOS, PCI bus scan and card configuration. X86emu included but deactivated.	2014-01-06 19:50:52 +00:00