Move functions declaration to header file

Fix date and time saving to PIC process.
Use wrapped functions to acces PIC registers.
2016-02-07 18:35:04 +00:00 · 2016-02-07 14:20:22 +00:00 · 2016-02-07 12:28:13 +00:00 · 2016-02-07 10:27:42 +00:00 · 2016-01-30 16:00:02 +00:00 · 2015-11-21 07:39:49 +00:00
259 changed files with 88790 additions and 68640 deletions
--- a/.gdbinit
+++ b/.gdbinit
@@ -1,8 +1,9 @@
 #set disassemble-next-line on
 define tr
-	!killall m68k-bdm-gdbserver
+	#!killall m68k-bdm-gdbserver
 	target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
-	#target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
+	#target remote localhost:1234
+	#target remote | m68k-bdm-gdbserver pipe /dev/tblcf1
 	#target dbug /dev/ttyS0
 	#monitor bdm-reset
 end
--- a/BaS_gcc.config
+++ b/BaS_gcc.config
@@ -1 +1,2 @@
 // ADD PREDEFINED MACROS HERE!
+#define MACHINE_FIREBEE
--- a/BaS_gcc.files
+++ b/BaS_gcc.files
@@ -4,20 +4,6 @@ dma/MCD_tasks.c
 dma/MCD_tasksInit.c
 exe/basflash.c
 exe/basflash_start.c
-firebee/bas.elf
-firebee/bas.lk
-firebee/bas.map
-firebee/bas.s19
-firebee/basflash.elf
-firebee/basflash.map
-firebee/basflash.s19
-firebee/bashflash.lk
-firebee/depend
-firebee/libbas.a
-firebee/ram.elf
-firebee/ram.lk
-firebee/ram.map
-firebee/ram.s19
 flash/flash.c
 flash/s19reader.c
 fs/cc932.c
@@ -53,6 +39,7 @@ include/fecbd.h
 include/ff.h
 include/ffconf.h
 include/firebee.h
+include/font.h
 include/i2c-algo-bit.h
 include/i2c.h
 include/icmp.h
@@ -111,6 +98,7 @@ include/tftp.h
 include/udp.h
 include/usb.h
 include/usb_defs.h
+include/usb_hub.h
 include/user_io.h
 include/util.h
 include/version.h
@@ -130,6 +118,239 @@ include/x86prim_ops.h
 include/x86regs.h
 include/xhdi_sd.h
 kbd/ikbd.c
+net/am79c874.c
+net/arp.c
+net/bcm5222.c
+net/bootp.c
+net/fec.c
+net/fecbd.c
+net/ip.c
+net/nbuf.c
+net/net_timer.c
+net/nif.c
+net/queue.c
+net/tftp.c
+net/udp.c
+nutil/s19header.c
+pci/ehci-hcd.c
+pci/ohci-hcd.c
+pci/pci.c
+radeon/radeon_accel.c
+radeon/radeon_base.c
+radeon/radeon_cursor.c
+radeon/radeon_monitor.c
+spi/dspi.c
+spi/mmc.c
+spi/sd_card.c
+sys/BaS.c
+sys/cache.c
+sys/driver_mem.c
+sys/fault_vectors.c
+sys/init_fpga.c
+sys/interrupts.c
+sys/mmu.c
+sys/sysinit.c
+tos/bascook/sources/bascook.c
+tos/jtagwait/include/bas_printf.h
+tos/jtagwait/include/bas_string.h
+tos/jtagwait/include/driver_vec.h
+tos/jtagwait/include/MCF5475.h
+tos/jtagwait/include/MCF5475_CLOCK.h
+tos/jtagwait/include/MCF5475_CTM.h
+tos/jtagwait/include/MCF5475_DMA.h
+tos/jtagwait/include/MCF5475_DSPI.h
+tos/jtagwait/include/MCF5475_EPORT.h
+tos/jtagwait/include/MCF5475_FBCS.h
+tos/jtagwait/include/MCF5475_FEC.h
+tos/jtagwait/include/MCF5475_GPIO.h
+tos/jtagwait/include/MCF5475_GPT.h
+tos/jtagwait/include/MCF5475_I2C.h
+tos/jtagwait/include/MCF5475_INTC.h
+tos/jtagwait/include/MCF5475_MMU.h
+tos/jtagwait/include/MCF5475_PAD.h
+tos/jtagwait/include/MCF5475_PCI.h
+tos/jtagwait/include/MCF5475_PCIARB.h
+tos/jtagwait/include/MCF5475_PSC.h
+tos/jtagwait/include/MCF5475_SDRAMC.h
+tos/jtagwait/include/MCF5475_SEC.h
+tos/jtagwait/include/MCF5475_SIU.h
+tos/jtagwait/include/MCF5475_SLT.h
+tos/jtagwait/include/MCF5475_SRAM.h
+tos/jtagwait/include/MCF5475_USB.h
+tos/jtagwait/include/MCF5475_XLB.h
+tos/jtagwait/sources/jtagwait.c
+usb/usb.c
+usb/usb_hub.c
+usb/usb_kbd.c
+tos/jtagwait/sources/bas_printf.c
+tos/jtagwait/sources/bas_string.c
+tos/vmem_test/Makefile
+tos/vmem_test/sources/bas_printf.c
+tos/vmem_test/sources/bas_string.c
+tos/vmem_test/sources/printf_helper.S
+tos/vmem_test/sources/vmem_test.c
+sys/startcf.S
+sys/exceptions.S
+util/bas_printf.c
+util/bas_string.c
+util/printf_helper.S
+util/wait.c
+bas.lk.in
+i2c/i2c.c
+Makefile
+x86emu/x86biosemu.c
+x86emu/x86emu.c
+x86emu/x86pcibios.c
+util/libgcc_helper.S
+util/setjmp.c
+util/setjmp.S
+include/x86emu_regs.h
+x86emu/x86emu_util.c
+include/setjmp.h
+video/video.c
+video/fbmem.c
+video/fbmodedb.c
+video/fbmon.c
+video/fnt_st_8x16.c
+video/offscreen.c
+video/vdi_fill.c
+video/videl.c
+video/video.c
+tos/jtagwait/Makefile
+tos/Makefile
+dma/dma.c
+dma/MCD_dmaApi.c
+dma/MCD_tasks.c
+dma/MCD_tasksInit.c
+exe/basflash.c
+exe/basflash_start.c
+firebee/bas.elf
+firebee/bas.lk
+firebee/bas.map
+firebee/bas.s19
+firebee/basflash.elf
+firebee/basflash.map
+firebee/basflash.s19
+firebee/bashflash.lk
+firebee/depend
+firebee/ram.elf
+firebee/ram.lk
+firebee/ram.s19
+flash/flash.c
+flash/s19reader.c
+flash_scripts/flash_firebee_bas.bdm
+flash_scripts/flash_firebee_etos.bdm
+flash_scripts/flash_firebee_firetos.bdm
+flash_scripts/flash_firebee_fpga.bdm
+flash_scripts/flash_m548x_bas.bdm
+flash_scripts/flash_m548x_dbug.bdm
+flash_scripts/flash_m548x_etos.bdm
+fs/cc932.c
+fs/cc936.c
+fs/cc949.c
+fs/cc950.c
+fs/ccsbcs.c
+fs/ff.c
+fs/unicode.c
+i2c/i2c.c
+if/driver_vec.c
+include/acia.h
+include/am79c874.h
+include/arp.h
+include/ati_ids.h
+include/bas_printf.h
+include/bas_string.h
+include/bas_types.h
+include/bas_utils.h
+include/bcm5222.h
+include/bootp.h
+include/cache.h
+include/diskio.h
+include/dma.h
+include/driver_mem.h
+include/driver_vec.h
+include/edid.h
+include/ehci.h
+include/eth.h
+include/exceptions.h
+include/fb.h
+include/fec.h
+include/fecbd.h
+include/ff.h
+include/ffconf.h
+include/firebee.h
+include/font.h
+include/i2c-algo-bit.h
+include/i2c.h
+include/icmp.h
+include/ikbd.h
+include/interrupts.h
+include/ip.h
+include/m54455.h
+include/m5484l.h
+include/MCD_dma.h
+include/mcd_initiators.h
+include/MCD_progCheck.h
+include/MCD_tasksInit.h
+include/MCF5475.h
+include/MCF5475_CLOCK.h
+include/MCF5475_CTM.h
+include/MCF5475_DMA.h
+include/MCF5475_DSPI.h
+include/MCF5475_EPORT.h
+include/MCF5475_FBCS.h
+include/MCF5475_FEC.h
+include/MCF5475_GPIO.h
+include/MCF5475_GPT.h
+include/MCF5475_I2C.h
+include/MCF5475_INTC.h
+include/MCF5475_MMU.h
+include/MCF5475_PAD.h
+include/MCF5475_PCI.h
+include/MCF5475_PCIARB.h
+include/MCF5475_PSC.h
+include/MCF5475_SDRAMC.h
+include/MCF5475_SEC.h
+include/MCF5475_SIU.h
+include/MCF5475_SLT.h
+include/MCF5475_SRAM.h
+include/MCF5475_USB.h
+include/MCF5475_XLB.h
+include/mmu.h
+include/mod_devicetable.h
+include/nbuf.h
+include/net.h
+include/net_timer.h
+include/nif.h
+include/ohci.h
+include/part.h
+include/pci.h
+include/pci_ids.h
+include/queue.h
+include/radeon_reg.h
+include/radeonfb.h
+include/s19reader.h
+include/screen.h
+include/sd_card.h
+include/setjmp.h
+include/startcf.h
+include/sysinit.h
+include/tftp.h
+include/udp.h
+include/usb.h
+include/usb_defs.h
+include/usb_hub.h
+include/user_io.h
+include/util.h
+include/version.h
+include/videl.h
+include/video.h
+include/wait.h
+include/x86emu.h
+include/x86emu_regs.h
+include/x86pcibios.h
+include/xhdi_sd.h
+kbd/ikbd.c
 m54455/bas.elf
 m54455/bas.lk
 m54455/bas.map
@@ -139,10 +360,8 @@ m54455/basflash.map
 m54455/basflash.s19
 m54455/bashflash.lk
 m54455/depend
-m54455/libbas.a
 m54455/ram.elf
 m54455/ram.lk
-m54455/ram.map
 m54455/ram.s19
 m5484lite/bas.elf
 m5484lite/bas.lk
@@ -153,10 +372,8 @@ m5484lite/basflash.map
 m5484lite/basflash.s19
 m5484lite/bashflash.lk
 m5484lite/depend
-m5484lite/libbas.a
 m5484lite/ram.elf
 m5484lite/ram.lk
-m5484lite/ram.map
 m5484lite/ram.s19
 net/am79c874.c
 net/arp.c
@@ -171,11 +388,11 @@ net/nif.c
 net/queue.c
 net/tftp.c
 net/udp.c
-nutil/s19header
 nutil/s19header.c
 pci/ehci-hcd.c
 pci/ohci-hcd.c
 pci/pci.c
+pci/pci_wrappers.S
 radeon/radeon_accel.c
 radeon/radeon_base.c
 radeon/radeon_cursor.c
@@ -193,11 +410,142 @@ sys/interrupts.c
 sys/mmu.c
 sys/startcf.S
 sys/sysinit.c
+tos/bascook/sources/bascook.c
+tos/bascook/bascook.prg
+tos/bascook/depend
+tos/bascook/Makefile
+tos/bascook/mapfile
+tos/jtagwait/include/bas_printf.h
+tos/jtagwait/include/bas_string.h
+tos/jtagwait/include/driver_vec.h
+tos/jtagwait/include/MCF5475.h
+tos/jtagwait/include/MCF5475_CLOCK.h
+tos/jtagwait/include/MCF5475_CTM.h
+tos/jtagwait/include/MCF5475_DMA.h
+tos/jtagwait/include/MCF5475_DSPI.h
+tos/jtagwait/include/MCF5475_EPORT.h
+tos/jtagwait/include/MCF5475_FBCS.h
+tos/jtagwait/include/MCF5475_FEC.h
+tos/jtagwait/include/MCF5475_GPIO.h
+tos/jtagwait/include/MCF5475_GPT.h
+tos/jtagwait/include/MCF5475_I2C.h
+tos/jtagwait/include/MCF5475_INTC.h
+tos/jtagwait/include/MCF5475_MMU.h
+tos/jtagwait/include/MCF5475_PAD.h
+tos/jtagwait/include/MCF5475_PCI.h
+tos/jtagwait/include/MCF5475_PCIARB.h
+tos/jtagwait/include/MCF5475_PSC.h
+tos/jtagwait/include/MCF5475_SDRAMC.h
+tos/jtagwait/include/MCF5475_SEC.h
+tos/jtagwait/include/MCF5475_SIU.h
+tos/jtagwait/include/MCF5475_SLT.h
+tos/jtagwait/include/MCF5475_SRAM.h
+tos/jtagwait/include/MCF5475_USB.h
+tos/jtagwait/include/MCF5475_XLB.h
+tos/jtagwait/m5475/mshort/jtagwait.prg
+tos/jtagwait/m5475/jtagwait.prg
+tos/jtagwait/sources/bas_printf.c
+tos/jtagwait/sources/bas_string.c
+tos/jtagwait/sources/jtagwait.c
+tos/jtagwait/sources/printf_helper.S
+tos/jtagwait/depend
+tos/jtagwait/jtagwait.config
+tos/jtagwait/jtagwait.creator
+tos/jtagwait/jtagwait.creator.user
+tos/jtagwait/jtagwait.files
+tos/jtagwait/jtagwait.includes
+tos/jtagwait/Makefile
+tos/jtagwait/mapfile
+tos/pci_test/include/bas_printf.h
+tos/pci_test/include/bas_string.h
+tos/pci_test/include/driver_vec.h
+tos/pci_test/include/MCF5475.h
+tos/pci_test/include/MCF5475_CLOCK.h
+tos/pci_test/include/MCF5475_CTM.h
+tos/pci_test/include/MCF5475_DMA.h
+tos/pci_test/include/MCF5475_DSPI.h
+tos/pci_test/include/MCF5475_EPORT.h
+tos/pci_test/include/MCF5475_FBCS.h
+tos/pci_test/include/MCF5475_FEC.h
+tos/pci_test/include/MCF5475_GPIO.h
+tos/pci_test/include/MCF5475_GPT.h
+tos/pci_test/include/MCF5475_I2C.h
+tos/pci_test/include/MCF5475_INTC.h
+tos/pci_test/include/MCF5475_MMU.h
+tos/pci_test/include/MCF5475_PAD.h
+tos/pci_test/include/MCF5475_PCI.h
+tos/pci_test/include/MCF5475_PCIARB.h
+tos/pci_test/include/MCF5475_PSC.h
+tos/pci_test/include/MCF5475_SDRAMC.h
+tos/pci_test/include/MCF5475_SEC.h
+tos/pci_test/include/MCF5475_SIU.h
+tos/pci_test/include/MCF5475_SLT.h
+tos/pci_test/include/MCF5475_SRAM.h
+tos/pci_test/include/MCF5475_USB.h
+tos/pci_test/include/MCF5475_XLB.h
+tos/pci_test/m5475/mshort/pci_test.prg
+tos/pci_test/m5475/pci_test.prg
+tos/pci_test/sources/bas_printf.c
+tos/pci_test/sources/bas_string.c
+tos/pci_test/sources/pci_test.c
+tos/pci_test/sources/printf_helper.S
+tos/pci_test/depend
+tos/pci_test/Makefile
+tos/pci_test/mapfile
+tos/pci_test/pci_test.config
+tos/pci_test/pci_test.creator
+tos/pci_test/pci_test.files
+tos/pci_test/pci_test.includes
+tos/vmem_test/include/bas_printf.h
+tos/vmem_test/include/bas_string.h
+tos/vmem_test/include/driver_vec.h
+tos/vmem_test/include/MCF5475.h
+tos/vmem_test/include/MCF5475_CLOCK.h
+tos/vmem_test/include/MCF5475_CTM.h
+tos/vmem_test/include/MCF5475_DMA.h
+tos/vmem_test/include/MCF5475_DSPI.h
+tos/vmem_test/include/MCF5475_EPORT.h
+tos/vmem_test/include/MCF5475_FBCS.h
+tos/vmem_test/include/MCF5475_FEC.h
+tos/vmem_test/include/MCF5475_GPIO.h
+tos/vmem_test/include/MCF5475_GPT.h
+tos/vmem_test/include/MCF5475_I2C.h
+tos/vmem_test/include/MCF5475_INTC.h
+tos/vmem_test/include/MCF5475_MMU.h
+tos/vmem_test/include/MCF5475_PAD.h
+tos/vmem_test/include/MCF5475_PCI.h
+tos/vmem_test/include/MCF5475_PCIARB.h
+tos/vmem_test/include/MCF5475_PSC.h
+tos/vmem_test/include/MCF5475_SDRAMC.h
+tos/vmem_test/include/MCF5475_SEC.h
+tos/vmem_test/include/MCF5475_SIU.h
+tos/vmem_test/include/MCF5475_SLT.h
+tos/vmem_test/include/MCF5475_SRAM.h
+tos/vmem_test/include/MCF5475_USB.h
+tos/vmem_test/include/MCF5475_XLB.h
+tos/vmem_test/m5475/mshort/vmem_test.prg
+tos/vmem_test/m5475/vmem_test.prg
+tos/vmem_test/sources/bas_printf.c
+tos/vmem_test/sources/bas_string.c
+tos/vmem_test/sources/printf_helper.S
+tos/vmem_test/sources/vmem_test.c
+tos/vmem_test/depend
+tos/vmem_test/Makefile
+tos/vmem_test/mapfile
+tos/vmem_test/vmem_test.config
+tos/vmem_test/vmem_test.creator
+tos/vmem_test/vmem_test.files
+tos/vmem_test/vmem_test.includes
+tos/Makefile
 usb/usb.c
+usb/usb_hub.c
+usb/usb_kbd.c
 usb/usb_mouse.c
 util/bas_printf.c
 util/bas_string.c
+util/libgcc_helper.S
 util/printf_helper.S
+util/setjmp.S
 util/wait.c
 video/fbmem.c
 video/fbmodedb.c
@@ -208,24 +556,57 @@ video/vdi_fill.c
 video/videl.c
 video/video.c
 x86emu/x86biosemu.c
-x86emu/x86debug.c
-x86emu/x86decode.c
-x86emu/x86fpu.c
-x86emu/x86ops.c
-x86emu/x86ops2.c
+x86emu/x86emu.c
+x86emu/x86emu_util.c
 x86emu/x86pcibios.c
-x86emu/x86prim_ops.c
-x86emu/x86sys.c
 xhdi/xhdi_interface.c
 xhdi/xhdi_sd.c
 xhdi/xhdi_vec.S
 bas.lk.in
 bas_firebee.bdm
+BaS_gcc.config
+BaS_gcc.creator
+BaS_gcc.creator.user
+BaS_gcc.creator.user.3.2-pre1
+BaS_gcc.creator.user.ori
+BaS_gcc.files
+BaS_gcc.includes
 bas_m5484.bdm
 basflash.lk.in
 check.bdm
 COPYING
 COPYING.LESSER
+Doxyfile
 dump.bdm
-mcf5474.gdb
 Makefile
+mcf5474.gdb
+svn-commit.tmp
+tos/pci_test/include/bas_printf.h
+tos/pci_test/include/bas_string.h
+tos/pci_test/include/driver_vec.h
+tos/pci_test/include/MCF5475_CLOCK.h
+tos/pci_test/include/MCF5475_CTM.h
+tos/pci_test/include/MCF5475_DMA.h
+tos/pci_test/include/MCF5475_DSPI.h
+tos/pci_test/include/MCF5475_EPORT.h
+tos/pci_test/include/MCF5475_FBCS.h
+tos/pci_test/include/MCF5475_FEC.h
+tos/pci_test/include/MCF5475_GPIO.h
+tos/pci_test/include/MCF5475_GPT.h
+tos/pci_test/include/MCF5475_I2C.h
+tos/pci_test/include/MCF5475_INTC.h
+tos/pci_test/include/MCF5475_MMU.h
+tos/pci_test/include/MCF5475_PAD.h
+tos/pci_test/include/MCF5475_PCI.h
+tos/pci_test/include/MCF5475_PCIARB.h
+tos/pci_test/include/MCF5475_PSC.h
+tos/pci_test/include/MCF5475_SDRAMC.h
+tos/pci_test/include/MCF5475_SEC.h
+tos/pci_test/include/MCF5475_SIU.h
+tos/pci_test/include/MCF5475_SLT.h
+tos/pci_test/include/MCF5475_SRAM.h
+tos/pci_test/include/MCF5475_USB.h
+tos/pci_test/include/MCF5475_XLB.h
+tos/pci_test/include/MCF5475.h
+tos/pci_test/include/pci.h
+memory_map.txt
--- a/BaS_gcc.includes
+++ b/BaS_gcc.includes
@@ -1,2 +1,44 @@
 include
-/usr/m68k-elf/include
+tos/jtagwait/include
+tos/pci_test/include
+/usr/m68k-atari-mint/include
+dma
+m54455
+sys
+pci
+tos/pci_test
+tos/jtagwait/m5475/mshort
+m5484lite
+tos/pci_test/include
+tos/bascook
+tos/vmem_test/m5475/mshort
+i2c
+fs
+tos/vmem_test/m5475
+tos/pci_test/m5475
+spi
+if
+tos/jtagwait/m5475
+util
+kbd
+flash_scripts
+video
+usb
+exe
+tos/vmem_test/sources
+tos
+nutil
+tos/jtagwait/sources
+x86emu
+flash
+tos/vmem_test/include
+tos/bascook/sources
+tos/pci_test/m5475/mshort
+.
+radeon
+net
+xhdi
+tos/vmem_test
+tos/pci_test/sources
+firebee
+tos/jtagwait
--- a/2343
+++ b/2343
--- a/95
+++ b/95
@@ -1,8 +1,9 @@
-# # Makefile for Firebee BaS
+# Makefile for Firebee BaS
 #
 # This Makefile is meant for cross compiling the BaS with Vincent Riviere's cross compilers.
 # If you want to compile native on an Atari (you will need at least GCC 4.6.3), set
 # TCPREFIX to be empty.
+#
 # If you want to compile with the m68k-elf- toolchain, set TCPREFIX accordingly. Requires an extra
 # installation, but allows source level debugging over BDM with a recent gdb (tested with 7.5),
 # the m68k BDM tools from sourceforge (http://bdm.sourceforge.net) and a BDM pod (TBLCF and P&E tested).
@@ -29,28 +30,33 @@ AR=$(TCPREFIX)ar
 RANLIB=$(TCPREFIX)ranlib
 NATIVECC=gcc

+ifeq (Y,$(COMPILE_ELF))
+LDLIBS=-lgcc
+else
+LDLIBS=-lgcc
+endif
+
 INCLUDE=-Iinclude
-CFLAGS=-mcpu=5474 \
-		-Wall \
-		-g3 \
+CFLAGS=	-Wall \
 	-fomit-frame-pointer \
 	-ffreestanding \
 	-fleading-underscore \
-		-Wa,--register-prefix-optional
+	-Wa,--register-prefix-optional \
+	-g
 CFLAGS_OPTIMIZED = -mcpu=5474 \
 		-Wall \
-		-g3 \
 		-O2 \
 		-fomit-frame-pointer \
 		-ffreestanding \
 		-fleading-underscore \
 		-Wa,--register-prefix-optional
+LDFLAGS=

-TRGTDIRS= ./firebee ./m5484lite ./m54455
+TRGTDIRS= ./firebee ./m5484lite
 OBJDIRS=$(patsubst %, %/objs,$(TRGTDIRS))
 TOOLDIR=util

-VPATH=dma exe flash fs if kbd pci spi sys usb net util video radeon x86emu xhdi
+VPATH=dma exe flash fs i2c if kbd pci spi sys usb net util video radeon x86emu xhdi

 # Linker control file. The final $(LDCFILE) is intermediate only (preprocessed version of $(LDCSRC)
 LDCFILE=bas.lk
@@ -83,19 +89,24 @@ CSRCS= \
 	s19reader.c \
 	flash.c \
 	dma.c \
+	i2c.c \
 	xhdi_sd.c \
 	xhdi_interface.c \
 	pci.c \
 	dspi.c \
 	driver_vec.c \
 	driver_mem.c \
+	\
 	MCD_dmaApi.c \
 	MCD_tasks.c \
 	MCD_tasksInit.c \
+	\
 	usb.c \
 	ohci-hcd.c \
 	ehci-hcd.c \
+	usb_hub.c \
 	usb_mouse.c \
+	usb_kbd.c \
 	ikbd.c \
 	\
 	nbuf.c \
@@ -124,16 +135,12 @@ CSRCS= \
 	radeon_accel.c \
 	radeon_cursor.c \
 	radeon_monitor.c \
+	fnt_st_8x16.c \
 	\
-	x86decode.c \
-	x86sys.c \
-	x86debug.c \
-	x86prim_ops.c \
-	x86ops.c \
-	x86ops2.c \
-	x86fpu.c \
-	x86biosemu.c \
+	x86emu.c \
 	x86pcibios.c \
+	x86biosemu.c \
+	x86emu_util.c \
 	\
 	basflash.c \
 	basflash_start.c
@@ -143,7 +150,13 @@ ASRCS= \
 	startcf.S \
 	printf_helper.S \
 	exceptions.S \
-	xhdi_vec.S
+	setjmp.S \
+	xhdi_vec.S \
+	pci_wrappers.S
+
+ifeq (Y,$(COMPILE_ELF))			# needed for __ vs ___ kludge
+	ASRCS += libgcc_helper.S
+endif

 SRCS=$(ASRCS) $(CSRCS)
 COBJS=$(patsubst %.c,%.o,$(CSRCS))
@@ -154,12 +167,18 @@ LIBBAS=libbas.a

 LIBS=$(patsubst %,%/$(LIBBAS),$(TRGTDIRS))

-all: fls ram bfl lib
+all: ver fls ram bfl lib tos
 fls: $(patsubst %,%/$(FLASH_EXEC),$(TRGTDIRS))
 ram: $(patsubst %,%/$(RAM_EXEC),$(TRGTDIRS))
 bfl: $(patsubst %,%/$(BASFLASH_EXEC),$(TRGTDIRS))
 lib: $(LIBS)

+.PHONY: ver
+ver:
+	touch include/version.h
+.PHONY: tos
+tos:
+	(cd tos; $(MAKE))

 .PHONY: clean
 clean:
@@ -173,34 +192,31 @@ clean:
 m5484lite/bas.$(EXE): MACHINE=MACHINE_M5484LITE
 m54455/bas.$(EXE): MACHINE=MACHINE_M54455
 firebee/bas.$(EXE): MACHINE=MACHINE_FIREBEE
+
 m5484lite/ram.$(EXE): MACHINE=MACHINE_M5484LITE
 m54455/ram.$(EXE): MACHINE=MACHINE_M54455
 firebee/ram.$(EXE): MACHINE=MACHINE_FIREBEE
+
 m5484lite/basflash.$(EXE): MACHINE=MACHINE_M5484LITE
 m54455/basflash.$(EXE): MACHINE=MACHINE_M54455
 firebee/basflash.$(EXE): MACHINE=MACHINE_FIREBEE

+m5484lite/bas.$(EXE): CFLAGS += -mcpu=5484
+m54455/bas.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
+firebee/bas.$(EXE): CFLAGS += -mcpu=5474
+
+m5484lite/ram.$(EXE): CFLAGS += -mcpu=5484
+m54455/ram.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
+firebee/ram.$(EXE): CFLAGS += -mcpu=5474
+
+m5484lite/basflash.$(EXE): CFLAGS += -mcpu=5484
+m54455/basflash.$(EXE): CFLAGS += -mcpu=54455 -msoft-float
+firebee/basflash.$(EXE): CFLAGS += -mcpu=5474
+
 #
 # generate pattern rules for different object files
 #
 define CC_TEMPLATE
-#ifeq (firebee,$(1))
-	#MACHINE=MACHINE_FIREBEE
-#else
-	#MACHINE=MACHINE_M5484LITE
-#endif
-
-# always optimize x86 emulator objects
-#$(1)/objs/x86decode.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-#$(1)/objs/x86sys.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
-#$(1)/objs/x86debug.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-#$(1)/objs/x86prim_ops.o:CFLAGS=$(CFLAGS_OPTIMIZED)
-#$(1)/objs/x86ops.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
-#$(1)/objs/x86ops2.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-#$(1)/objs/x86fpu.o:		CFLAGS=$(CFLAGS_OPTIMIZED)
-#$(1)/objs/x86biosemu.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-#$(1)/objs/x86pcibios.o:	CFLAGS=$(CFLAGS_OPTIMIZED)
-
 $(1)/objs/%.o:%.c
 	$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@

@@ -250,7 +266,8 @@ define EX_TEMPLATE
 $(1)_MAPFILE=$(1)/$$(basename $$(FLASH_EXEC)).map
 $(1)/$$(FLASH_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
 	$(CPP) $(INCLUDE) -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDCFILE)
-	$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE) --cref -T $(1)/$$(LDCFILE) -o $$@
+	#$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE) --cref -T $(1)/$$(LDCFILE) $(LDLIBS) -o $$@
+	$(CC) $$(CFLAGS) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDCFILE) $(LDLIBS) -o $$@
 ifeq ($(COMPILE_ELF),Y)
 	$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
 else
@@ -261,7 +278,8 @@ endif
 $(1)_MAPFILE_RAM=$(1)/$$(basename $$(RAM_EXEC)).map
 $(1)/$$(RAM_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
 	$(CPP) $(INCLUDE) -DCOMPILE_RAM -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDRFILE)
-	$(LD) -g --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) -o $$@
+	#$(LD) $(LDFLAGS) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) $(LDLIBS) -o $$@
+	$(CC) $$(CFLAGS) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDRFILE) $(LDLIBS) -o $$@
 ifeq ($(COMPILE_ELF),Y)
 	$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
 else
@@ -272,7 +290,8 @@ endif
 $(1)_MAPFILE_BFL=$(1)/$$(basename $$(BASFLASH_EXEC)).map
 $(1)/$$(BASFLASH_EXEC): $(1)/objs/basflash.o $(1)/objs/basflash_start.o $(1)/$(LIBBAS) $(LDCBFL)
 	$(CPP) $(INCLUDE) -P -DOBJDIR=$(1)/objs -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCBSRC) -o $(1)/$$(LDCBFS)
-	$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_BFL) --cref -T $(1)/$$(LDCFILE) -L$(1) -lbas -o $$@
+	#$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_BFL) --cref -T $(1)/$$(LDCFILE) -L$(1) -lbas $(LDLIBS) -o $$@
+	$(CC) -nostdlib -Wl,--oformat -Wl,$$(FORMAT) -Wl,-Map -Wl,$$($(1)_MAPFILE_BFL) -Wl,--cref -Wl,-T -Wl,$(1)/$$(LDCFILE) -L$(1) -lbas $(LDLIBS) -o $$@
 ifeq ($(COMPILE_ELF),Y)
 	$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
 else
--- a/bas.lk.in
+++ b/bas.lk.in
@@ -42,15 +42,19 @@ SECTIONS
 #endif /* MACHINE_FIREBEE */
                OBJDIR/wait.o(.text)
                OBJDIR/exceptions.o(.text)
+                OBJDIR/setjmp.o(.text)
                OBJDIR/driver_vec.o(.text)
                OBJDIR/interrupts.o(.text)
                OBJDIR/mmu.o(.text)

                OBJDIR/BaS.o(.text)
                OBJDIR/pci.o(.text)
+                OBJDIR/pci_wrappers.o(.text)
                OBJDIR/usb.o(.text)
                OBJDIR/driver_mem.o(.text)
+                OBJDIR/usb_hub.o(.text)
                OBJDIR/usb_mouse.o(.text)
+                OBJDIR/usb_kbd.o(.text)
                OBJDIR/ohci-hcd.o(.text)
                OBJDIR/ehci-hcd.o(.text)
                OBJDIR/wait.o(.text)
@@ -76,6 +80,9 @@ SECTIONS
                OBJDIR/s19reader.o(.text)
                OBJDIR/bas_printf.o(.text)
                OBJDIR/bas_string.o(.text)
+#if (FORMAT_ELF == 1)
+                OBJDIR/libgcc_helper.o(.text)
+#endif
                OBJDIR/printf_helper.o(.text)
                OBJDIR/cache.o(.text)
                OBJDIR/dma.o(.text)
@@ -90,15 +97,10 @@ SECTIONS
                OBJDIR/fbmodedb.o(.text)
                OBJDIR/offscreen.o(.text)

-		OBJDIR/x86decode.o(.text)
-		OBJDIR/x86ops.o(.text)
-		OBJDIR/x86ops2.o(.text)
-		OBJDIR/x86fpu.o(.text)
-		OBJDIR/x86sys.o(.text)
-		OBJDIR/x86biosemu.o(.text)
-		OBJDIR/x86debug.o(.text)
-		OBJDIR/x86prim_ops.o(.text)
+                OBJDIR/x86emu.o(.text)
+                OBJDIR/x86emu_util.o(.text)
                OBJDIR/x86pcibios.o(.text)
+                OBJDIR/x86biosemu.o(.text)

                OBJDIR/radeon_base.o(.text)
                OBJDIR/radeon_accel.o(.text)
@@ -123,11 +125,13 @@ SECTIONS
 #endif /* COMPILE_RAM */

 #if (FORMAT_ELF == 1)
+                *(.eh_frame)
                *(.rodata)
                *(.rodata.*)
 #endif
        } > bas_rom

+
 #if (TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS)
        /*
         * put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
@@ -203,8 +207,8 @@ SECTIONS
        __EMUTOS_SIZE           = 0x00100000;

        /* where FPGA data lives in flash */
-	__FPGA_FLASH_DATA 		= 0xe0700000;
-	__FPGA_FLASH_DATA_SIZE 	= 0x100000;
+        __FPGA_CONFIG       = 0xe0700000;
+        __FPGA_CONFIG_SIZE  = 0x100000;

        /* VIDEO RAM BASIS */
        __VRAM                  = 0x60000000;
@@ -219,6 +223,7 @@ SECTIONS
        /* MMU memory mapped registers */
        __MMUBAR                = 0xFF040000;

+#if !defined(MACHINE_M54455)        /* MCF54455 does not have RAMBAR0 and RAMBAR1 registers */
        /*
         * 4KB on-chip Core SRAM0: -> exception table
         */
@@ -228,10 +233,28 @@ SECTIONS
        /* 4KB on-chip Core SRAM1 */
        __RAMBAR1               = 0xFF101000;
        __RAMBAR1_SIZE          = 0x00001000;
- 	__SUP_SP                = __RAMBAR0 + __RAMBAR0_SIZE - 4;
+        __SUP_SP                = __RAMBAR1 + __RAMBAR1_SIZE - 4;
+#else
+        __RAMBAR0               = 0x80000000;   /* RAMBAR must be between 0x80000000 on MCF54455 */
+        __RAMBAR0_SIZE          = 0x1000;
+        __SUP_SP                = __RAMBAR0 + __RAMBAR0_SIZE + 0x1000 - 4;
+#endif
+
+    /*
+     * FPGA_JTAG_LOADED (if 1) indicates that FPGA configuration has been loaded through JTAG
+     * and shouldn't be overwritten on boot. For this to work (and not let us be faked
+     * by a random uninitialised value), __FPGA_JTAG_VALID is used as a "magic value" and must be
+     * 0xaffeaffe to make this work.
+     */
+#if !defined(MACHINE_M54455)        /* MCF54455 does not have RAMBAR0 and RAMBAR1 */
+    __FPGA_JTAG_LOADED      = __RAMBAR1;
+    __FPGA_JTAG_VALID       = __RAMBAR1 + 4;
+#else
+    __FPGA_JTAG_LOADED      = __RAMBAR0 + 0x1000;
+    __FPGA_JTAG_VALID       = __RAMBAR0 + 0x1000 + 4;
+#endif

    /* system variables */
-	
    /* RAMBAR0 0 to 0x7FF -> exception vectors */
    _rt_mod    = __RAMBAR0 + 0x800;
    _rt_ssp    = __RAMBAR0 + 0x804;
@@ -250,5 +273,4 @@ SECTIONS
    _video_tlb = __RAMBAR0 + 0x838;
    _video_sbt = __RAMBAR0 + 0x83C;
    _rt_mbar   = __RAMBAR0 + 0x844;     /* (c)0f */
-
 }
--- a/bas_firebee.bdm
+++ b/bas_firebee.bdm
@@ -63,10 +63,6 @@ write 0xFF000104 0x710D0F00 4	# SDCR (lock SDMR and enable refresh)
 sleep 100

 load -v firebee/ram.elf
-write-ctrl 0x80e	0x2700
-write-ctrl 0x2	0xa50c8120
-dump-register SR
-dump-register CACR
-dump-register MBAR
+
 execute
 wait
--- a/dma/MCD_dmaApi.c
+++ b/dma/MCD_dmaApi.c
@@ -8,7 +8,6 @@
 #include "MCD_dma.h"
 #include "MCD_tasksInit.h"
 #include "MCD_progCheck.h"
-#include "bas_types.h"

 /********************************************************************/
 /*
@@ -30,6 +29,7 @@ extern TaskTableEntry MCD_modelTaskTableSrc[NUMOFVARIANTS];
 volatile TaskTableEntry *MCD_taskTable;
 TaskTableEntry *MCD_modelTaskTable;

+
 /*
 * MCD_chStatus[] is an array of status indicators for remembering
 * whether a DMA has ever been attempted on each channel, pausing
@@ -46,7 +46,7 @@ static int MCD_chStatus[NCHANNELS] =
 /*
 * Prototypes for local functions
 */
-static void MCD_memcpy(int *dest, int *src, uint32_t size);
+static void MCD_memcpy (int *dest, int *src, u32 size);
 static void MCD_resmActions (int channel);

 /*
@@ -61,6 +61,7 @@ MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
 #endif
 MCD_bufDesc *MCD_relocBuffDesc;

+
 /*
 * Defines for the debug control register's functions
 */
@@ -119,9 +120,9 @@ struct MCD_remVariants_struct
 {
   int remDestRsdIncr[NCHANNELS];  /* -1,0,1 */
   int remSrcRsdIncr[NCHANNELS];   /* -1,0,1 */
-	int16_t remDestIncr[NCHANNELS]; /* DestIncr */
-	int16_t remSrcIncr[NCHANNELS]; /* srcIncr */
-	uint32_t remXferSize[NCHANNELS]; /* xferSize */
+   s16 remDestIncr[NCHANNELS];     /* DestIncr */
+   s16 remSrcIncr[NCHANNELS];      /* srcIncr */
+   u32 remXferSize[NCHANNELS];     /* xferSize */
 };

 /*
@@ -142,9 +143,9 @@ MCD_remVariant MCD_remVariants;
 *  MCD_TABLE_UNALIGNED if taskTableDest is not 512-byte aligned
 *  MCD_OK otherwise
 */
-extern uint32_t MCD_funcDescTab0[];
+extern u32 MCD_funcDescTab0[];

-int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)
+int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags)
 {
    int i;
    TaskTableEntry *entryPtr;
@@ -156,7 +157,7 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)
    if ((flags & MCD_RELOC_TASKS) != 0)
    {
        int fixedSize;
-		uint32_t *fixedPtr;
+        u32 *fixedPtr;
        /*int *tablePtr = taskTableDest;TBD*/
        int varTabsOffset, funcDescTabsOffset, contextSavesOffset;
        int taskDescTabsOffset;
@@ -166,7 +167,7 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)
        int i;

        /* check if physical address is aligned on 512 byte boundary */
-		if (((uint32_t) taskTableDest & 0x000001ff) != 0)
+        if (((u32)taskTableDest & 0x000001ff) != 0)
            return(MCD_TABLE_UNALIGNED);

        MCD_taskTable = taskTableDest; /* set up local pointer to task Table */
@@ -182,7 +183,7 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)

        taskTableSize = NCHANNELS * sizeof(TaskTableEntry);
        /* align variable tables to size */
-		varTabsOffset = taskTableSize + (uint32_t) taskTableDest;
+        varTabsOffset = taskTableSize + (u32)taskTableDest;
        if ((varTabsOffset & (VAR_TAB_SIZE - 1)) != 0)
            varTabsOffset = (varTabsOffset + VAR_TAB_SIZE) & (~VAR_TAB_SIZE);
        /* align function descriptor tables */
@@ -190,17 +191,17 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)
        funcDescTabsOffset = varTabsOffset + varTabsSize;

        if ((funcDescTabsOffset & (FUNCDESC_TAB_SIZE - 1)) != 0)
-			funcDescTabsOffset = (funcDescTabsOffset + FUNCDESC_TAB_SIZE)
-					& (~FUNCDESC_TAB_SIZE);
+            funcDescTabsOffset = (funcDescTabsOffset + FUNCDESC_TAB_SIZE) &
+            (~FUNCDESC_TAB_SIZE);

        funcDescTabsSize = FUNCDESC_TAB_NUM * FUNCDESC_TAB_SIZE;
        contextSavesOffset = funcDescTabsOffset + funcDescTabsSize;
        contextSavesSize = (NCHANNELS * CONTEXT_SAVE_SIZE);
-		fixedSize = taskTableSize + varTabsSize + funcDescTabsSize
-				+ contextSavesSize;
+        fixedSize = taskTableSize + varTabsSize + funcDescTabsSize +
+                    contextSavesSize;

        /* zero the thing out */
-		fixedPtr = (uint32_t *) taskTableDest;
+        fixedPtr = (u32 *)taskTableDest;
        for (i = 0;i<(fixedSize/4);i++)
            fixedPtr[i] = 0;

@@ -208,10 +209,9 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)
        /* set up fixed pointers */
        for (i = 0; i < NCHANNELS; i++)
        {
-			entryPtr[i].varTab = (uint32_t) varTabsOffset; /* update ptr to local value */
-			entryPtr[i].FDTandFlags = (uint32_t) funcDescTabsOffset
-					| MCD_TT_FLAGS_DEF;
-			entryPtr[i].contextSaveSpace = (uint32_t) contextSavesOffset;
+            entryPtr[i].varTab = (u32)varTabsOffset; /* update ptr to local value */
+            entryPtr[i].FDTandFlags = (u32)funcDescTabsOffset | MCD_TT_FLAGS_DEF;
+            entryPtr[i].contextSaveSpace = (u32)contextSavesOffset;
            varTabsOffset += VAR_TAB_SIZE;
 #ifdef MCD_INCLUDE_EU /* if not there is only one, just point to the same one */
            funcDescTabsOffset += FUNCDESC_TAB_SIZE;
@@ -233,18 +233,17 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)

        entryPtr = MCD_modelTaskTable; /* point to local version of
                                                            model task table */
-		taskDescTabsOffset = (uint32_t) MCD_modelTaskTable
-				+ (NUMOFVARIANTS * sizeof(TaskTableEntry));
+        taskDescTabsOffset = (u32)MCD_modelTaskTable +
+                            (NUMOFVARIANTS * sizeof(TaskTableEntry));

        /* copy actual task code and update TDT ptrs in local model task table */
        for (i = 0; i < NUMOFVARIANTS; i++)
        {
            taskDescTabSize = entryPtr[i].TDTend - entryPtr[i].TDTstart + 4;
-			MCD_memcpy((void*) taskDescTabsOffset, (void*) entryPtr[i].TDTstart,
-					taskDescTabSize);
-			entryPtr[i].TDTstart = (uint32_t) taskDescTabsOffset;
+            MCD_memcpy ((void*)taskDescTabsOffset, (void*)entryPtr[i].TDTstart, taskDescTabSize);
+            entryPtr[i].TDTstart = (u32)taskDescTabsOffset;
            taskDescTabsOffset += taskDescTabSize;
-			entryPtr[i].TDTend = (uint32_t) taskDescTabsOffset - 4;
+            entryPtr[i].TDTend = (u32)taskDescTabsOffset - 4;
        }
 #ifdef MCD_INCLUDE_EU /* Tack single DMA BDs onto end of code so API controls
                         where they are since DMA might write to them */        
@@ -259,7 +258,7 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)
        /* point the would-be relocated task tables and the
        buffer descriptors to the ones the linker generated */

-		if (((uint32_t) MCD_realTaskTableSrc & 0x000001ff) != 0)
+        if (((u32)MCD_realTaskTableSrc & 0x000001ff) != 0)
            return(MCD_TABLE_UNALIGNED);

        /* need to add code to make sure that every thing else is aligned properly TBD*/
@@ -268,8 +267,8 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)
        entryPtr = MCD_realTaskTableSrc;
        for (i = 0; i < NCHANNELS; i++)
        {
-			if (((entryPtr[i].varTab & (VAR_TAB_SIZE - 1)) != 0)
-					|| ((entryPtr[i].FDTandFlags & (FUNCDESC_TAB_SIZE - 1)) != 0))
+            if (((entryPtr[i].varTab & (VAR_TAB_SIZE - 1)) != 0) ||
+                ((entryPtr[i].FDTandFlags & (FUNCDESC_TAB_SIZE - 1)) != 0))
                return(MCD_TABLE_UNALIGNED);
        }

@@ -278,9 +277,10 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)
        MCD_relocBuffDesc = MCD_singleBufDescs;
    }

+
    /* Make all channels as totally inactive, and remember them as such: */

-	MCD_dmaBar->taskbar = (uint32_t) MCD_taskTable;
+    MCD_dmaBar->taskbar = (u32) MCD_taskTable;
    for (i = 0;  i < NCHANNELS;  i++)
    {
        MCD_dmaBar->taskControl[i] = 0x0;
@@ -312,7 +312,7 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags)
 */
 int MCD_dmaStatus (int channel)
 {
-	uint16_t tcrValue;
+    u16 tcrValue;

    if((channel < 0) || (channel >= NCHANNELS))
        return(MCD_CHANNEL_INVALID);
@@ -352,19 +352,20 @@ int MCD_dmaStatus(int channel)
 * Returns:     MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
 */

-int __attribute__((flatten)) MCD_startDma(int channel, /* the channel on which to run the DMA */
-		int8_t *srcAddr, /* the address to move data from, or physical buffer-descriptor address */
-		int16_t srcIncr, /* the amount to increment the source address per transfer */
-		int8_t *destAddr, /* the address to move data to */
-		int16_t destIncr, /* the amount to increment the destination address per transfer */
-		uint32_t dmaSize, /* the number of bytes to transfer independent of the transfer size */
-		uint32_t xferSize, /* the number bytes in of each data movement (1, 2, or 4) */
-		uint32_t initiator, /* what device initiates the DMA */
+int MCD_startDma (
+    int  channel,   /* the channel on which to run the DMA */
+    s8   *srcAddr,  /* the address to move data from, or physical buffer-descriptor address */
+    s16  srcIncr,   /* the amount to increment the source address per transfer */
+    s8   *destAddr, /* the address to move data to */
+    s16  destIncr,  /* the amount to increment the destination address per transfer */
+    u32  dmaSize,   /* the number of bytes to transfer independent of the transfer size */
+    u32  xferSize,  /* the number bytes in of each data movement (1, 2, or 4) */
+    u32  initiator, /* what device initiates the DMA */
    int  priority,  /* priority of the DMA */
-		uint32_t flags, /* flags describing the DMA */
-		uint32_t funcDesc /* a description of byte swapping, bit swapping, and CRC actions */
+    u32  flags,     /* flags describing the DMA */
+    u32  funcDesc   /* a description of byte swapping, bit swapping, and CRC actions */
 #ifdef MCD_NEED_ADDR_TRANS
-		int8_t *srcAddrVirt /* virtual buffer descriptor address TBD*/
+    s8   *srcAddrVirt /* virtual buffer descriptor address TBD*/
 #endif
 )
 {
@@ -373,7 +374,7 @@ int __attribute__((flatten)) MCD_startDma(int channel, /* the channel on which t
    short xferSizeIncr;
    int tcrCount = 0;
 #ifdef MCD_INCLUDE_EU
-	uint32_t *realFuncArray;
+    u32 *realFuncArray;
 #endif

    if((channel < 0) || (channel >= NCHANNELS))
@@ -393,7 +394,7 @@ int __attribute__((flatten)) MCD_startDma(int channel, /* the channel on which t
      since the register involved is in the same longword as other registers that users are in control
      of, setting it more than once is probably preferable.  That since the documentation doesn't seem
      to be completely consistent about the nature of the PTD control register. */
-	MCD_dmaBar->ptdControl |= (uint16_t) 0x8000;
+    MCD_dmaBar->ptdControl |= (u16) 0x8000;
 #if 1 /* Not sure what we need to keep here rtm TBD */
    /* Calculate additional parameters to the regular DMA calls. */
    srcRsdIncr = srcIncr < 0 ? -1 : (srcIncr > 0 ? 1 : 0);
@@ -409,37 +410,35 @@ int __attribute__((flatten)) MCD_startDma(int channel, /* the channel on which t
    MCD_remVariants.remXferSize[channel] = xferSize;
 #endif

-	cSave = (int*) (MCD_taskTable[channel].contextSaveSpace) + CSAVE_OFFSET
-			+ CURRBD;
+    cSave = (int*)(MCD_taskTable[channel].contextSaveSpace) + CSAVE_OFFSET + CURRBD;

 #ifdef MCD_INCLUDE_EU /* may move this to EU specific calls */
-	realFuncArray = (uint32_t *) (MCD_taskTable[channel].FDTandFlags & 0xffffff00);
+    realFuncArray = (u32 *) (MCD_taskTable[channel].FDTandFlags & 0xffffff00);
    /* Modify the LURC's normal and byte-residue-loop functions according to parameter. */
-	realFuncArray[(LURC*16)] = xferSize == 4 ? funcDesc : xferSize == 2 ? funcDesc & 0xfffff00f : funcDesc & 0xffff000f;
+    realFuncArray[(LURC*16)] = xferSize == 4 ?
+                                 funcDesc : xferSize == 2 ?
+                                     funcDesc & 0xfffff00f : funcDesc & 0xffff000f;
    realFuncArray[(LURC*16+1)] = (funcDesc & MCD_BYTE_SWAP_KILLER) | MCD_NO_BYTE_SWAP_ATALL;
 #endif
-	/*
-	 * Write the initiator field in the TCR, and also set the initiator-hold
-	 * bit.  Note that,due to a hardware quirk, this could collide with an
-	 * MDE access to the initiator-register file, so we have to verify that the write
-	 * reads back correctly.
-	 */
+   /* Write the initiator field in the TCR, and also set the initiator-hold
+      bit.  Note that,due to a hardware quirk, this could collide with an
+      MDE access to the initiator-register file, so we have to verify that the write
+      reads back correctly. */

-	MCD_dmaBar->taskControl[channel] = (initiator << 8) | TASK_CTL_HIPRITSKEN
-			| TASK_CTL_HLDINITNUM;
+    MCD_dmaBar->taskControl[channel] =
+        (initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM;

-	while (((MCD_dmaBar->taskControl[channel] & 0x1fff)
-			!= ((initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM))
-			&& (tcrCount < 1000))
+    while(((MCD_dmaBar->taskControl[channel] & 0x1fff) !=
+          ((initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM)) &&
+            (tcrCount < 1000))
    {
        tcrCount++;
        /*MCD_dmaBar->ptd_tcr[channel] = (initiator << 8) | 0x0020;*/
-		MCD_dmaBar->taskControl[channel] = (initiator << 8)
-				| TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM;
+        MCD_dmaBar->taskControl[channel] =
+            (initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM;
    }

-	MCD_dmaBar->priority[channel] = (uint8_t) priority & PRIORITY_PRI_MASK;
-
+    MCD_dmaBar->priority[channel] = (u8)priority & PRIORITY_PRI_MASK;
    /* should be albe to handle this stuff with only one write to ts reg - tbd */
    if (channel < 8 && channel >= 0)
    {
@@ -461,27 +460,23 @@ int __attribute__((flatten)) MCD_startDma(int channel, /* the channel on which t
    if (flags & MCD_FECTX_DMA)
    {
        /* TDTStart and TDTEnd */
-		MCD_taskTable[channel].TDTstart =
-				MCD_modelTaskTable[TASK_FECTX].TDTstart;
+        MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_FECTX].TDTstart;
        MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_FECTX].TDTend;
        MCD_startDmaENetXmit(srcAddr, srcAddr, destAddr, MCD_taskTable, channel);
    }
    else if (flags & MCD_FECRX_DMA)
    {
        /* TDTStart and TDTEnd */
-		MCD_taskTable[channel].TDTstart =
-				MCD_modelTaskTable[TASK_FECRX].TDTstart;
+        MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_FECRX].TDTstart;
        MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_FECRX].TDTend;
        MCD_startDmaENetRcv(srcAddr, srcAddr, destAddr, MCD_taskTable, channel);
    }
    else if(flags & MCD_SINGLE_DMA)
    {
-		/*
-		 * this buffer descriptor is used for storing off initial parameters for later
-		 * progress query calculation and for the DMA to write the resulting checksum
-		 * The DMA does not use this to determine how to operate, that info is passed
-		 * with the init routine
-		 */
+        /* this buffer descriptor is used for storing off initial parameters for later
+           progress query calculation and for the DMA to write the resulting checksum
+           The DMA does not use this to determine how to operate, that info is passed
+           with the init routine*/
        MCD_relocBuffDesc[channel].srcAddr = srcAddr;
        MCD_relocBuffDesc[channel].destAddr = destAddr;
        MCD_relocBuffDesc[channel].lastDestAddr = destAddr;  /* definitely not its final value */
@@ -491,77 +486,62 @@ int __attribute__((flatten)) MCD_startDma(int channel, /* the channel on which t
        MCD_relocBuffDesc[channel].next = 0;        /* not used */

        /* Initialize the progress-querying stuff to show no progress:*/
-		((volatile int *) MCD_taskTable[channel].contextSaveSpace)[SRCPTR
-				+ CSAVE_OFFSET] = (int) srcAddr;
-		((volatile int *) MCD_taskTable[channel].contextSaveSpace)[DESTPTR
-				+ CSAVE_OFFSET] = (int) destAddr;
-		((volatile int *) MCD_taskTable[channel].contextSaveSpace)[DCOUNT
-				+ CSAVE_OFFSET] = 0;
-		((volatile int *) MCD_taskTable[channel].contextSaveSpace)[CURRBD
-				+ CSAVE_OFFSET] = (uint32_t) &(MCD_relocBuffDesc[channel]);
+        ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET] = (int)srcAddr;
+        ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET] = (int)destAddr;
+        ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0;
+        ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET] =
+                                             (u32) &(MCD_relocBuffDesc[channel]);
        /* tbd - need to keep the user from trying to call the EU routine
           when MCD_INCLUDE_EU is not defined */
        if( funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2)
        {
           /* TDTStart and TDTEnd */
-			MCD_taskTable[channel].TDTstart =
-					MCD_modelTaskTable[TASK_SINGLENOEU].TDTstart;
-			MCD_taskTable[channel].TDTend =
-					MCD_modelTaskTable[TASK_SINGLENOEU].TDTend;
-			MCD_startDmaSingleNoEu(srcAddr, srcIncr, destAddr, destIncr,
-					dmaSize, xferSizeIncr, flags,
-					(int *) &(MCD_relocBuffDesc[channel]), cSave, MCD_taskTable,
-					channel);
+           MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_SINGLENOEU].TDTstart;
+           MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_SINGLENOEU].TDTend;
+           MCD_startDmaSingleNoEu(srcAddr, srcIncr, destAddr, destIncr, dmaSize,
+                                xferSizeIncr, flags, (int *)&(MCD_relocBuffDesc[channel]), cSave,
+                                MCD_taskTable, channel);
        }
        else
        {
           /* TDTStart and TDTEnd */
-			MCD_taskTable[channel].TDTstart =
-					MCD_modelTaskTable[TASK_SINGLEEU].TDTstart;
-			MCD_taskTable[channel].TDTend =
-					MCD_modelTaskTable[TASK_SINGLEEU].TDTend;
+           MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_SINGLEEU].TDTstart;
+           MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_SINGLEEU].TDTend;
           MCD_startDmaSingleEu(srcAddr, srcIncr, destAddr, destIncr, dmaSize,
-					xferSizeIncr, flags, (int *) &(MCD_relocBuffDesc[channel]),
-					cSave, MCD_taskTable, channel);
+                              xferSizeIncr, flags, (int *)&(MCD_relocBuffDesc[channel]), cSave,
+                              MCD_taskTable, channel);
        }
    }
    else
    { /* chained DMAS */
        /* Initialize the progress-querying stuff to show no progress:*/
 #if 1 /* (!defined(MCD_NEED_ADDR_TRANS)) */
-		((volatile int *) MCD_taskTable[channel].contextSaveSpace)[SRCPTR
-				+ CSAVE_OFFSET] = (int) ((MCD_bufDesc*) srcAddr)->srcAddr;
-		((volatile int *) MCD_taskTable[channel].contextSaveSpace)[DESTPTR
-				+ CSAVE_OFFSET] = (int) ((MCD_bufDesc*) srcAddr)->destAddr;
+        ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET]
+          = (int)((MCD_bufDesc*) srcAddr)->srcAddr;
+        ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET]
+          = (int)((MCD_bufDesc*) srcAddr)->destAddr;
 #else /* if using address translation, need the virtual addr of the first buffdesc */
-
        ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET]
          = (int)((MCD_bufDesc*) srcAddrVirt)->srcAddr;
        ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET]
          = (int)((MCD_bufDesc*) srcAddrVirt)->destAddr;
 #endif
-		((volatile int *) MCD_taskTable[channel].contextSaveSpace)[DCOUNT
-				+ CSAVE_OFFSET] = 0;
-		((volatile int *) MCD_taskTable[channel].contextSaveSpace)[CURRBD
-				+ CSAVE_OFFSET] = (uint32_t) srcAddr;
+        ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0;
+        ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET] = (u32) srcAddr;

        if( funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2)
        {
          /*TDTStart and TDTEnd*/
-			MCD_taskTable[channel].TDTstart =
-					MCD_modelTaskTable[TASK_CHAINNOEU].TDTstart;
-			MCD_taskTable[channel].TDTend =
-					MCD_modelTaskTable[TASK_CHAINNOEU].TDTend;
+          MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_CHAINNOEU].TDTstart;
+          MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_CHAINNOEU].TDTend;
          MCD_startDmaChainNoEu((int *)srcAddr, srcIncr, destIncr, xferSize,
                                    xferSizeIncr, cSave, MCD_taskTable, channel);
        }
        else
        {
          /*TDTStart and TDTEnd*/
-			MCD_taskTable[channel].TDTstart =
-					MCD_modelTaskTable[TASK_CHAINEU].TDTstart;
-			MCD_taskTable[channel].TDTend =
-					MCD_modelTaskTable[TASK_CHAINEU].TDTend;
+          MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_CHAINEU].TDTstart;
+          MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_CHAINEU].TDTend;
          MCD_startDmaChainEu((int *)srcAddr, srcIncr, destIncr, xferSize,
                                 xferSizeIncr, cSave, MCD_taskTable, channel);
        }
@@ -612,7 +592,7 @@ int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep)
    int destDiffBytes; /* Total number of bytes that we think actually got xfered. */
    int numIterations; /* number of iterations */
    int bytesNotXfered; /* bytes that did not get xfered. */
-	int8_t *LWAlignedInitDestAddr, *LWAlignedCurrDestAddr;
+    s8 *LWAlignedInitDestAddr, *LWAlignedCurrDestAddr;
    int subModVal, addModVal; /* Mode values to added and subtracted from the
                                final destAddr */

@@ -621,36 +601,25 @@ int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep)

    /* Read a trial value for the progress-reporting values*/
    prevRep.lastSrcAddr =
-			(int8_t *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR
-					+ CSAVE_OFFSET];
+          (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET];
    prevRep.lastDestAddr =
-			(int8_t *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR
-					+ CSAVE_OFFSET];
-	prevRep.dmaSize =
-			((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT
-					+ CSAVE_OFFSET];
+          (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET];
+    prevRep.dmaSize = ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET];
    prevRep.currBufDesc =
-			(MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD
-					+ CSAVE_OFFSET];
+          (MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET];
    /* Repeatedly reread those values until they match previous values: */
-	do
-	{
+    do {
        /* Waste a little bit of time to ensure stability: */
        for (i = 0;  i < STABTIME;  i++)
            i += i >> 2;  /* make sure this loop does something so that it doesn't get optimized out */
        /* Check them again: */
        progRep->lastSrcAddr =
-				(int8_t *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR
-						+ CSAVE_OFFSET];
+            (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET];
        progRep->lastDestAddr =
-				(int8_t *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR
-						+ CSAVE_OFFSET];
-		progRep->dmaSize =
-				((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT
-						+ CSAVE_OFFSET];
+            (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET];
+        progRep->dmaSize = ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET];
        progRep->currBufDesc =
-				(MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD
-						+ CSAVE_OFFSET];
+            (MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET];
       /* See if they match: */
       if (   prevRep.lastSrcAddr != progRep->lastSrcAddr
           || prevRep.lastDestAddr != progRep->lastDestAddr
@@ -668,42 +637,36 @@ int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep)
          again = MCD_FALSE;
    } while (again == MCD_TRUE);

+
    /* Update the dCount, srcAddr and destAddr */
    /* To calculate dmaCount, we consider destination address. C
       overs M1,P1,Z for destination */
-	switch (MCD_remVariants.remDestRsdIncr[channel])
-	{
+    switch(MCD_remVariants.remDestRsdIncr[channel]) {
        case MINUS1:
-		subModVal = ((int) progRep->lastDestAddr)
-				& ((MCD_remVariants.remXferSize[channel]) - 1);
-		addModVal = ((int) progRep->currBufDesc->destAddr)
-				& ((MCD_remVariants.remXferSize[channel]) - 1);
+           subModVal = ((int)progRep->lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
+           addModVal = ((int)progRep->currBufDesc->destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
           LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr) - addModVal;
           LWAlignedCurrDestAddr = (progRep->lastDestAddr) - subModVal;
           destDiffBytes = LWAlignedInitDestAddr - LWAlignedCurrDestAddr;
-		bytesNotXfered = (destDiffBytes / MCD_remVariants.remDestIncr[channel])
-				* (MCD_remVariants.remDestIncr[channel]
+           bytesNotXfered = (destDiffBytes/MCD_remVariants.remDestIncr[channel]) *
+                            ( MCD_remVariants.remDestIncr[channel]
                            + MCD_remVariants.remXferSize[channel]);
-		progRep->dmaSize = destDiffBytes - bytesNotXfered + addModVal
-				- subModVal;
+           progRep->dmaSize = destDiffBytes - bytesNotXfered + addModVal - subModVal;
           break;
        case ZERO:
           progRep->lastDestAddr = progRep->currBufDesc->destAddr;
           break;
        case PLUS1:
           /* This value has to be subtracted from the final calculated dCount. */
-		subModVal = ((int) progRep->currBufDesc->destAddr)
-				& ((MCD_remVariants.remXferSize[channel]) - 1);
+           subModVal = ((int)progRep->currBufDesc->destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
           /* These bytes are already in lastDestAddr. */
-		addModVal = ((int) progRep->lastDestAddr)
-				& ((MCD_remVariants.remXferSize[channel]) - 1);
+            addModVal = ((int)progRep->lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
            LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr) - subModVal;
            LWAlignedCurrDestAddr = (progRep->lastDestAddr) - addModVal;
            destDiffBytes = (progRep->lastDestAddr - LWAlignedInitDestAddr);
-		numIterations = (LWAlignedCurrDestAddr - LWAlignedInitDestAddr)
-				/ MCD_remVariants.remDestIncr[channel];
-		bytesNotXfered = numIterations
-				* (MCD_remVariants.remDestIncr[channel]
+            numIterations = ( LWAlignedCurrDestAddr - LWAlignedInitDestAddr)/MCD_remVariants.remDestIncr[channel];
+            bytesNotXfered =  numIterations *
+                ( MCD_remVariants.remDestIncr[channel]
                  - MCD_remVariants.remXferSize[channel]);
           progRep->dmaSize = destDiffBytes - bytesNotXfered - subModVal;
           break;
@@ -712,25 +675,23 @@ int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep)
    }

    /* This covers M1,P1,Z for source */
-	switch (MCD_remVariants.remSrcRsdIncr[channel])
-	{
+    switch(MCD_remVariants.remSrcRsdIncr[channel]) {
        case MINUS1:
-		progRep->lastSrcAddr = progRep->currBufDesc->srcAddr
-				+ (MCD_remVariants.remSrcIncr[channel]
-						* (progRep->dmaSize
-								/ MCD_remVariants.remXferSize[channel]));
+            progRep->lastSrcAddr =
+                progRep->currBufDesc->srcAddr +
+                 ( MCD_remVariants.remSrcIncr[channel] *
+                   (progRep->dmaSize/MCD_remVariants.remXferSize[channel]));
            break;
        case ZERO:
            progRep->lastSrcAddr = progRep->currBufDesc->srcAddr;
            break;
       case PLUS1:
-		progRep->lastSrcAddr = progRep->currBufDesc->srcAddr
-				+ (MCD_remVariants.remSrcIncr[channel]
-						* (progRep->dmaSize
-								/ MCD_remVariants.remXferSize[channel]));
-		break;
-	default:
+            progRep->lastSrcAddr =
+                progRep->currBufDesc->srcAddr +
+                 ( MCD_remVariants.remSrcIncr[channel] *
+                   (progRep->dmaSize/MCD_remVariants.remXferSize[channel]));
          break;
+       default: break;
    }

    return(MCD_OK);
@@ -746,11 +707,8 @@ int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep)
 */
 static void MCD_resmActions (int channel)
 {
-	uint32_t debugStatus;
-
   MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
-	debugStatus = MCD_dmaBar->debugStatus;
-	MCD_dmaBar->debugStatus = debugStatus;
+   MCD_dmaBar->debugStatus = MCD_dmaBar->debugStatus;
   MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT; /* This register is selected to know
                                        which initiator is actually asserted. */
   if((MCD_dmaBar->ptdDebug >> channel ) & 0x1)
@@ -914,7 +872,7 @@ int MCD_resumeDma(int channel)
 * Notes:
 *
 */
-int MCD_csumQuery(int channel, uint32_t *csum)
+int MCD_csumQuery (int channel, u32 *csum)
 {
 #ifdef MCD_INCLUDE_EU
    if((channel < 0) || (channel >= NCHANNELS))
@@ -965,9 +923,9 @@ int MCD_getVersion(char **longVersion)
 /* Private version of memcpy()
 * Note that everything this is used for is longword-aligned.
 */
-static void MCD_memcpy(int *dest, int *src, uint32_t size)
+static void MCD_memcpy (int *dest, int *src, u32 size)
 {
-	uint32_t i;
+    u32 i;

    for (i = 0;  i < size;  i += sizeof(int), dest++, src++)
        *dest = *src;
--- a/dma/MCD_tasks.c
+++ b/dma/MCD_tasks.c
@@ -7,253 +7,253 @@

 #include "MCD_dma.h"

-uint32_t MCD_varTab0[];
-uint32_t MCD_varTab1[];
-uint32_t MCD_varTab2[];
-uint32_t MCD_varTab3[];
-uint32_t MCD_varTab4[];
-uint32_t MCD_varTab5[];
-uint32_t MCD_varTab6[];
-uint32_t MCD_varTab7[];
-uint32_t MCD_varTab8[];
-uint32_t MCD_varTab9[];
-uint32_t MCD_varTab10[];
-uint32_t MCD_varTab11[];
-uint32_t MCD_varTab12[];
-uint32_t MCD_varTab13[];
-uint32_t MCD_varTab14[];
-uint32_t MCD_varTab15[];
+u32 MCD_varTab0[];
+u32 MCD_varTab1[];
+u32 MCD_varTab2[];
+u32 MCD_varTab3[];
+u32 MCD_varTab4[];
+u32 MCD_varTab5[];
+u32 MCD_varTab6[];
+u32 MCD_varTab7[];
+u32 MCD_varTab8[];
+u32 MCD_varTab9[];
+u32 MCD_varTab10[];
+u32 MCD_varTab11[];
+u32 MCD_varTab12[];
+u32 MCD_varTab13[];
+u32 MCD_varTab14[];
+u32 MCD_varTab15[];

-uint32_t MCD_funcDescTab0[];
+u32 MCD_funcDescTab0[];
 #ifdef MCD_INCLUDE_EU
-uint32_t MCD_funcDescTab1[];
-uint32_t MCD_funcDescTab2[];
-uint32_t MCD_funcDescTab3[];
-uint32_t MCD_funcDescTab4[];
-uint32_t MCD_funcDescTab5[];
-uint32_t MCD_funcDescTab6[];
-uint32_t MCD_funcDescTab7[];
-uint32_t MCD_funcDescTab8[];
-uint32_t MCD_funcDescTab9[];
-uint32_t MCD_funcDescTab10[];
-uint32_t MCD_funcDescTab11[];
-uint32_t MCD_funcDescTab12[];
-uint32_t MCD_funcDescTab13[];
-uint32_t MCD_funcDescTab14[];
-uint32_t MCD_funcDescTab15[];
+u32 MCD_funcDescTab1[];
+u32 MCD_funcDescTab2[];
+u32 MCD_funcDescTab3[];
+u32 MCD_funcDescTab4[];
+u32 MCD_funcDescTab5[];
+u32 MCD_funcDescTab6[];
+u32 MCD_funcDescTab7[];
+u32 MCD_funcDescTab8[];
+u32 MCD_funcDescTab9[];
+u32 MCD_funcDescTab10[];
+u32 MCD_funcDescTab11[];
+u32 MCD_funcDescTab12[];
+u32 MCD_funcDescTab13[];
+u32 MCD_funcDescTab14[];
+u32 MCD_funcDescTab15[];
 #endif

-uint32_t MCD_contextSave0[];
-uint32_t MCD_contextSave1[];
-uint32_t MCD_contextSave2[];
-uint32_t MCD_contextSave3[];
-uint32_t MCD_contextSave4[];
-uint32_t MCD_contextSave5[];
-uint32_t MCD_contextSave6[];
-uint32_t MCD_contextSave7[];
-uint32_t MCD_contextSave8[];
-uint32_t MCD_contextSave9[];
-uint32_t MCD_contextSave10[];
-uint32_t MCD_contextSave11[];
-uint32_t MCD_contextSave12[];
-uint32_t MCD_contextSave13[];
-uint32_t MCD_contextSave14[];
-uint32_t MCD_contextSave15[];
+u32 MCD_contextSave0[];
+u32 MCD_contextSave1[];
+u32 MCD_contextSave2[];
+u32 MCD_contextSave3[];
+u32 MCD_contextSave4[];
+u32 MCD_contextSave5[];
+u32 MCD_contextSave6[];
+u32 MCD_contextSave7[];
+u32 MCD_contextSave8[];
+u32 MCD_contextSave9[];
+u32 MCD_contextSave10[];
+u32 MCD_contextSave11[];
+u32 MCD_contextSave12[];
+u32 MCD_contextSave13[];
+u32 MCD_contextSave14[];
+u32 MCD_contextSave15[];

-uint32_t MCD_realTaskTableSrc[] =
+u32 MCD_realTaskTableSrc[] =
 {
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab0,   /* Task 0 Variable Table */
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_varTab0,   /* Task 0 Variable Table */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave0,  /* Task 0 context save space */
+    (u32)MCD_contextSave0,  /* Task 0 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab1,   /* Task 1 Variable Table */
+    (u32)MCD_varTab1,   /* Task 1 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab1,  /* Task 1 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab1,  /* Task 1 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave1,  /* Task 1 context save space */
+    (u32)MCD_contextSave1,  /* Task 1 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab2,   /* Task 2 Variable Table */
+    (u32)MCD_varTab2,   /* Task 2 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab2,  /* Task 2 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab2,  /* Task 2 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave2,  /* Task 2 context save space */
+    (u32)MCD_contextSave2,  /* Task 2 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab3,   /* Task 3 Variable Table */
+    (u32)MCD_varTab3,   /* Task 3 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab3,  /* Task 3 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab3,  /* Task 3 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave3,  /* Task 3 context save space */
+    (u32)MCD_contextSave3,  /* Task 3 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab4,   /* Task 4 Variable Table */
+    (u32)MCD_varTab4,   /* Task 4 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab4,  /* Task 4 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab4,  /* Task 4 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave4,  /* Task 4 context save space */
+    (u32)MCD_contextSave4,  /* Task 4 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab5,   /* Task 5 Variable Table */
+    (u32)MCD_varTab5,   /* Task 5 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab5,  /* Task 5 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab5,  /* Task 5 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave5,  /* Task 5 context save space */
+    (u32)MCD_contextSave5,  /* Task 5 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab6,   /* Task 6 Variable Table */
+    (u32)MCD_varTab6,   /* Task 6 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab6,  /* Task 6 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab6,  /* Task 6 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave6,  /* Task 6 context save space */
+    (u32)MCD_contextSave6,  /* Task 6 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab7,   /* Task 7 Variable Table */
+    (u32)MCD_varTab7,   /* Task 7 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab7,  /* Task 7 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab7,  /* Task 7 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave7,  /* Task 7 context save space */
+    (u32)MCD_contextSave7,  /* Task 7 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab8,   /* Task 8 Variable Table */
+    (u32)MCD_varTab8,   /* Task 8 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab8,  /* Task 8 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab8,  /* Task 8 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave8,  /* Task 8 context save space */
+    (u32)MCD_contextSave8,  /* Task 8 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab9,   /* Task 9 Variable Table */
+    (u32)MCD_varTab9,   /* Task 9 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab9,  /* Task 9 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab9,  /* Task 9 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave9,  /* Task 9 context save space */
+    (u32)MCD_contextSave9,  /* Task 9 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab10,  /* Task 10 Variable Table */
+    (u32)MCD_varTab10,  /* Task 10 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave10, /* Task 10 context save space */
+    (u32)MCD_contextSave10, /* Task 10 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab11,  /* Task 11 Variable Table */
+    (u32)MCD_varTab11,  /* Task 11 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave11, /* Task 11 context save space */
+    (u32)MCD_contextSave11, /* Task 11 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab12,  /* Task 12 Variable Table */
+    (u32)MCD_varTab12,  /* Task 12 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave12, /* Task 12 context save space */
+    (u32)MCD_contextSave12, /* Task 12 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab13,  /* Task 13 Variable Table */
+    (u32)MCD_varTab13,  /* Task 13 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave13, /* Task 13 context save space */
+    (u32)MCD_contextSave13, /* Task 13 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab14,  /* Task 14 Variable Table */
+    (u32)MCD_varTab14,  /* Task 14 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave14, /* Task 14 context save space */
+    (u32)MCD_contextSave14, /* Task 14 context save space */
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_varTab15,  /* Task 15 Variable Table */
+    (u32)MCD_varTab15,  /* Task 15 Variable Table */
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */
 #else
-    (uint32_t)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
 #endif
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_contextSave15, /* Task 15 context save space */
+    (u32)MCD_contextSave15, /* Task 15 context save space */
    0x00000000,
 };


-uint32_t MCD_varTab0[] =
+u32 MCD_varTab0[] =
 {   /* Task 0 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -290,7 +290,7 @@ uint32_t MCD_varTab0[] =
 };


-uint32_t MCD_varTab1[] =
+u32 MCD_varTab1[] =
 {   /* Task 1 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -326,7 +326,7 @@ uint32_t MCD_varTab1[] =
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab2[]=
+u32 MCD_varTab2[]=
 {   /* Task 2 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -362,7 +362,7 @@ uint32_t MCD_varTab2[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab3[]=
+u32 MCD_varTab3[]=
 {   /* Task 3 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -398,7 +398,7 @@ uint32_t MCD_varTab3[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab4[]=
+u32 MCD_varTab4[]=
 {   /* Task 4 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -434,7 +434,7 @@ uint32_t MCD_varTab4[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab5[]=
+u32 MCD_varTab5[]=
 {   /* Task 5 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -470,7 +470,7 @@ uint32_t MCD_varTab5[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab6[]=
+u32 MCD_varTab6[]=
 {   /* Task 6 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -506,7 +506,7 @@ uint32_t MCD_varTab6[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab7[]=
+u32 MCD_varTab7[]=
 {   /* Task 7 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -542,7 +542,7 @@ uint32_t MCD_varTab7[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab8[]=
+u32 MCD_varTab8[]=
 {   /* Task 8 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -578,7 +578,7 @@ uint32_t MCD_varTab8[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab9[]=
+u32 MCD_varTab9[]=
 {   /* Task 9 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -614,7 +614,7 @@ uint32_t MCD_varTab9[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab10[]=
+u32 MCD_varTab10[]=
 {   /* Task 10 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -650,7 +650,7 @@ uint32_t MCD_varTab10[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab11[]=
+u32 MCD_varTab11[]=
 {   /* Task 11 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -686,7 +686,7 @@ uint32_t MCD_varTab11[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab12[]=
+u32 MCD_varTab12[]=
 {   /* Task 12 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -722,7 +722,7 @@ uint32_t MCD_varTab12[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab13[]=
+u32 MCD_varTab13[]=
 {   /* Task 13 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -758,7 +758,7 @@ uint32_t MCD_varTab13[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab14[]=
+u32 MCD_varTab14[]=
 {   /* Task 14 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -794,7 +794,7 @@ uint32_t MCD_varTab14[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_varTab15[]=
+u32 MCD_varTab15[]=
 {   /* Task 15 Variable Table */
    0x00000000, /* var[0] */
    0x00000000, /* var[1] */
@@ -830,7 +830,7 @@ uint32_t MCD_varTab15[]=
    0x00000000, /* inc[7] */
 };

-uint32_t MCD_funcDescTab0[]=
+u32 MCD_funcDescTab0[]=
 {   /* Task 0 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -899,7 +899,7 @@ uint32_t MCD_funcDescTab0[]=
 };

 #ifdef MCD_INCLUDE_EU
-uint32_t MCD_funcDescTab1[]=
+u32 MCD_funcDescTab1[]=
 {   /* Task 1 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -967,7 +967,7 @@ uint32_t MCD_funcDescTab1[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab2[]=
+u32 MCD_funcDescTab2[]=
 {   /* Task 2 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1035,7 +1035,7 @@ uint32_t MCD_funcDescTab2[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab3[]=
+u32 MCD_funcDescTab3[]=
 {   /* Task 3 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1103,7 +1103,7 @@ uint32_t MCD_funcDescTab3[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab4[]=
+u32 MCD_funcDescTab4[]=
 {   /* Task 4 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1171,7 +1171,7 @@ uint32_t MCD_funcDescTab4[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab5[]=
+u32 MCD_funcDescTab5[]=
 {   /* Task 5 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1239,7 +1239,7 @@ uint32_t MCD_funcDescTab5[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab6[]=
+u32 MCD_funcDescTab6[]=
 {   /* Task 6 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1307,7 +1307,7 @@ uint32_t MCD_funcDescTab6[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab7[]=
+u32 MCD_funcDescTab7[]=
 {   /* Task 7 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1375,7 +1375,7 @@ uint32_t MCD_funcDescTab7[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab8[]=
+u32 MCD_funcDescTab8[]=
 {   /* Task 8 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1443,7 +1443,7 @@ uint32_t MCD_funcDescTab8[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab9[]=
+u32 MCD_funcDescTab9[]=
 {   /* Task 9 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1511,7 +1511,7 @@ uint32_t MCD_funcDescTab9[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab10[]=
+u32 MCD_funcDescTab10[]=
 {   /* Task 10 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1579,7 +1579,7 @@ uint32_t MCD_funcDescTab10[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab11[]=
+u32 MCD_funcDescTab11[]=
 {   /* Task 11 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1647,7 +1647,7 @@ uint32_t MCD_funcDescTab11[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab12[]=
+u32 MCD_funcDescTab12[]=
 {   /* Task 12 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1715,7 +1715,7 @@ uint32_t MCD_funcDescTab12[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab13[]=
+u32 MCD_funcDescTab13[]=
 {   /* Task 13 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1783,7 +1783,7 @@ uint32_t MCD_funcDescTab13[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab14[]=
+u32 MCD_funcDescTab14[]=
 {   /* Task 14 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1851,7 +1851,7 @@ uint32_t MCD_funcDescTab14[]=
    0x202f2000, /* andCrcRestartBit(), EU# 3 */
 };

-uint32_t MCD_funcDescTab15[]=
+u32 MCD_funcDescTab15[]=
 {   /* Task 15 Function Descriptor Table */
    0x00000000,
    0x00000000,
@@ -1920,45 +1920,45 @@ uint32_t MCD_funcDescTab15[]=
 };
 #endif /*MCD_INCLUDE_EU*/

-uint32_t MCD_contextSave0[128];  /* Task 0 context save space */
-uint32_t MCD_contextSave1[128];  /* Task 1 context save space */
-uint32_t MCD_contextSave2[128];  /* Task 2 context save space */
-uint32_t MCD_contextSave3[128];  /* Task 3 context save space */
-uint32_t MCD_contextSave4[128];  /* Task 4 context save space */
-uint32_t MCD_contextSave5[128];  /* Task 5 context save space */
-uint32_t MCD_contextSave6[128];  /* Task 6 context save space */
-uint32_t MCD_contextSave7[128];  /* Task 7 context save space */
-uint32_t MCD_contextSave8[128];  /* Task 8 context save space */
-uint32_t MCD_contextSave9[128];  /* Task 9 context save space */
-uint32_t MCD_contextSave10[128]; /* Task 10 context save space */
-uint32_t MCD_contextSave11[128]; /* Task 11 context save space */
-uint32_t MCD_contextSave12[128]; /* Task 12 context save space */
-uint32_t MCD_contextSave13[128]; /* Task 13 context save space */
-uint32_t MCD_contextSave14[128]; /* Task 14 context save space */
-uint32_t MCD_contextSave15[128]; /* Task 15 context save space */
+u32 MCD_contextSave0[128];  /* Task 0 context save space */
+u32 MCD_contextSave1[128];  /* Task 1 context save space */
+u32 MCD_contextSave2[128];  /* Task 2 context save space */
+u32 MCD_contextSave3[128];  /* Task 3 context save space */
+u32 MCD_contextSave4[128];  /* Task 4 context save space */
+u32 MCD_contextSave5[128];  /* Task 5 context save space */
+u32 MCD_contextSave6[128];  /* Task 6 context save space */
+u32 MCD_contextSave7[128];  /* Task 7 context save space */
+u32 MCD_contextSave8[128];  /* Task 8 context save space */
+u32 MCD_contextSave9[128];  /* Task 9 context save space */
+u32 MCD_contextSave10[128]; /* Task 10 context save space */
+u32 MCD_contextSave11[128]; /* Task 11 context save space */
+u32 MCD_contextSave12[128]; /* Task 12 context save space */
+u32 MCD_contextSave13[128]; /* Task 13 context save space */
+u32 MCD_contextSave14[128]; /* Task 14 context save space */
+u32 MCD_contextSave15[128]; /* Task 15 context save space */


-uint32_t MCD_ChainNoEu_TDT[];
-uint32_t MCD_SingleNoEu_TDT[];
+u32 MCD_ChainNoEu_TDT[];
+u32 MCD_SingleNoEu_TDT[];
 #ifdef MCD_INCLUDE_EU
-uint32_t MCD_ChainEu_TDT[];
-uint32_t MCD_SingleEu_TDT[];
+u32 MCD_ChainEu_TDT[];
+u32 MCD_SingleEu_TDT[];
 #endif
-uint32_t MCD_ENetRcv_TDT[];
-uint32_t MCD_ENetXmit_TDT[];
+u32 MCD_ENetRcv_TDT[];
+u32 MCD_ENetXmit_TDT[];

-uint32_t MCD_modelTaskTableSrc[]=
+u32 MCD_modelTaskTableSrc[]=
 {
-    (uint32_t)MCD_ChainNoEu_TDT,
-    (uint32_t)&((uint8_t*)MCD_ChainNoEu_TDT)[0x0000016c],
+    (u32)MCD_ChainNoEu_TDT,
+    (u32)&((u8*)MCD_ChainNoEu_TDT)[0x0000016c],
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_SingleNoEu_TDT,
-    (uint32_t)&((uint8_t*)MCD_SingleNoEu_TDT)[0x000000d4],
+    (u32)MCD_SingleNoEu_TDT,
+    (u32)&((u8*)MCD_SingleNoEu_TDT)[0x000000d4],
    0x00000000,
    0x00000000,
    0x00000000,
@@ -1966,16 +1966,16 @@ uint32_t MCD_modelTaskTableSrc[]=
    0x00000000,
    0x00000000,
 #ifdef MCD_INCLUDE_EU
-    (uint32_t)MCD_ChainEu_TDT,
-    (uint32_t)&((uint8_t*)MCD_ChainEu_TDT)[0x000001b4],
+    (u32)MCD_ChainEu_TDT,
+    (u32)&((u8*)MCD_ChainEu_TDT)[0x000001b4],
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_SingleEu_TDT,
-    (uint32_t)&((uint8_t*)MCD_SingleEu_TDT)[0x00000124],
+    (u32)MCD_SingleEu_TDT,
+    (u32)&((u8*)MCD_SingleEu_TDT)[0x00000124],
    0x00000000,
    0x00000000,
    0x00000000,
@@ -1983,16 +1983,16 @@ uint32_t MCD_modelTaskTableSrc[]=
    0x00000000,
    0x00000000,
 #endif    
-    (uint32_t)MCD_ENetRcv_TDT,
-    (uint32_t)&((uint8_t*)MCD_ENetRcv_TDT)[0x0000009c],
+    (u32)MCD_ENetRcv_TDT,
+    (u32)&((u8*)MCD_ENetRcv_TDT)[0x0000009c],
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
    0x00000000,
-    (uint32_t)MCD_ENetXmit_TDT,
-    (uint32_t)&((uint8_t*)MCD_ENetXmit_TDT)[0x000000d0],
+    (u32)MCD_ENetXmit_TDT,
+    (u32)&((u8*)MCD_ENetXmit_TDT)[0x000000d0],
    0x00000000,
    0x00000000,
    0x00000000,
@@ -2000,7 +2000,7 @@ uint32_t MCD_modelTaskTableSrc[]=
    0x00000000,
    0x00000000,
 };
-uint32_t MCD_ChainNoEu_TDT[]=
+u32 MCD_ChainNoEu_TDT[]=
 {
    0x80004000, /* 0000(:370):  LCDEXT: idx0 = 0x00000000; ; */
    0x8118801b, /* 0004(:370):  LCD: idx1 = var2; idx1 once var0; idx1 += inc3 */
@@ -2095,7 +2095,7 @@ uint32_t MCD_ChainNoEu_TDT[]=
    0x000001f8, /* 0168(:0):      NOP */
    0x000001f8, /* 016C(:0):    NOP */
 };
-uint32_t MCD_SingleNoEu_TDT[]=
+u32 MCD_SingleNoEu_TDT[]=
 {
    0x8198001b, /* 0000(:657):  LCD: idx0 = var3; idx0 once var0; idx0 += inc3 */
    0x7000000d, /* 0004(:658):    DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */
@@ -2153,7 +2153,7 @@ uint32_t MCD_SingleNoEu_TDT[]=
    0x040001f8, /* 00D4(:713):    DRD1A: FN=0 INT init=0 WS=0 RS=0 */
 };
 #ifdef MCD_INCLUDE_EU
-uint32_t MCD_ChainEu_TDT[]=
+u32 MCD_ChainEu_TDT[]=
 {
    0x80004000, /* 0000(:947):  LCDEXT: idx0 = 0x00000000; ; */
    0x8198801b, /* 0004(:947):  LCD: idx1 = var3; idx1 once var0; idx1 += inc3 */
@@ -2266,7 +2266,7 @@ uint32_t MCD_ChainEu_TDT[]=
    0x000001f8, /* 01B0(:0):      NOP */
    0x000001f8, /* 01B4(:0):    NOP */
 };
-uint32_t MCD_SingleEu_TDT[]=
+u32 MCD_SingleEu_TDT[]=
 {
    0x8218001b, /* 0000(:1248):  LCD: idx0 = var4; idx0 once var0; idx0 += inc3 */
    0x7000000d, /* 0004(:1249):    DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */
@@ -2344,7 +2344,7 @@ uint32_t MCD_SingleEu_TDT[]=
    0x040001f8, /* 0124(:1316):    DRD1A: FN=0 INT init=0 WS=0 RS=0 */
 };
 #endif
-uint32_t MCD_ENetRcv_TDT[]=
+u32 MCD_ENetRcv_TDT[]=
 {
    0x80004000, /* 0000(:1389):  LCDEXT: idx0 = 0x00000000; ; */
    0x81988000, /* 0004(:1389):  LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
@@ -2387,7 +2387,7 @@ uint32_t MCD_ENetRcv_TDT[]=
    0x040001f8, /* 0098(:1441):      DRD1A: FN=0 INT init=0 WS=0 RS=0 */
    0x000001f8, /* 009C(:0):    NOP */
 };
-uint32_t MCD_ENetXmit_TDT[]=
+u32 MCD_ENetXmit_TDT[]=
 {
    0x80004000, /* 0000(:1516):  LCDEXT: idx0 = 0x00000000; ; */
    0x81988000, /* 0004(:1516):  LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
--- a/dma/MCD_tasksInit.c
+++ b/dma/MCD_tasksInit.c
@@ -11,7 +11,6 @@
 */

 #include "MCD_dma.h"
-#include "MCD_tasksInit.h"

 extern dmaRegs *MCD_dmaBar;

@@ -23,33 +22,33 @@ extern dmaRegs *MCD_dmaBar;
 void  MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)currBD); /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 11, (uint32_t)xferSize);  /* var[11] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave);  /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)0x00000000); /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000000);    /* var[12] */
-    MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x80000000);    /* var[13] */
-    MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0x00000010);    /* var[14] */
-    MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000004);    /* var[15] */
-    MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x08000000);    /* var[16] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000);    /* inc[3] */
-    MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000000);    /* inc[4] */
-    MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000001);    /* inc[5] */
-    MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x40000000);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)xferSize);  /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)0x00000000); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 13, (u32)0x80000000);    /* var[13] */
+    MCD_SET_VAR(taskTable+channel, 14, (u32)0x00000010);    /* var[14] */
+    MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004);    /* var[15] */
+    MCD_SET_VAR(taskTable+channel, 16, (u32)0x08000000);    /* var[16] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000001);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x40000000);    /* inc[6] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }


@@ -57,29 +56,29 @@ void  MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer
 * Task 1
 */
 
-void  MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
+void  MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)srcAddr);    /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)destAddr);   /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)dmaSize);    /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)flags);  /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)currBD); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave);  /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000004); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x08000000);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000);    /* inc[3] */
-    MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000001);    /* inc[4] */
-    MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x40000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)srcAddr);    /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)destAddr);   /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)dmaSize);    /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)flags);  /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)currBD); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000004); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x08000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000001);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x40000000);    /* inc[5] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }


@@ -90,36 +89,36 @@ void  MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, s
 void  MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 12, (uint32_t)xferSize);  /* var[12] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave);  /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x00000000);    /* var[11] */
-    MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x00000000);    /* var[13] */
-    MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0x80000000);    /* var[14] */
-    MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000010);    /* var[15] */
-    MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x00000001);    /* var[16] */
-    MCD_SET_VAR(taskTable+channel, 17, (uint32_t)0x00000004);    /* var[17] */
-    MCD_SET_VAR(taskTable+channel, 18, (uint32_t)0x08000000);    /* var[18] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000);    /* inc[3] */
-    MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000000);    /* inc[4] */
-    MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0xc0000000);    /* inc[5] */
-    MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x80000001);    /* inc[6] */
-    MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0x40000000);    /* inc[7] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)xferSize);  /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000000);    /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 13, (u32)0x00000000);    /* var[13] */
+    MCD_SET_VAR(taskTable+channel, 14, (u32)0x80000000);    /* var[14] */
+    MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000010);    /* var[15] */
+    MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000001);    /* var[16] */
+    MCD_SET_VAR(taskTable+channel, 17, (u32)0x00000004);    /* var[17] */
+    MCD_SET_VAR(taskTable+channel, 18, (u32)0x08000000);    /* var[18] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0xc0000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000);    /* inc[7] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }


@@ -127,33 +126,33 @@ void  MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi
 * Task 3
 */
 
-void  MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
+void  MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)srcAddr);    /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)destAddr);   /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)dmaSize);    /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)flags);  /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)currBD); /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave);  /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000001);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x00000004);    /* var[11] */
-    MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x08000000);    /* var[12] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000);    /* inc[3] */
-    MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0xc0000000);    /* inc[4] */
-    MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000000);    /* inc[5] */
-    MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x80000001);    /* inc[6] */
-    MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0x40000000);    /* inc[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)srcAddr);    /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)destAddr);   /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)dmaSize);    /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));  /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)flags);  /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000001);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000004);    /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x08000000);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0xc0000000);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000);    /* inc[7] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }


@@ -161,29 +160,29 @@ void  MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, sho
 * Task 4
 */
 
-void  MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel)
+void  MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)bDBase); /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)rcvFifoPtr); /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x0000ffff); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x30000000);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x0fffffff);    /* var[11] */
-    MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000008);    /* var[12] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)0x00000000);    /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)0x60000000);    /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)0x20000004);    /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x40000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)rcvFifoPtr); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x0000ffff); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x30000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)0x0fffffff);    /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000008);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000);    /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000);    /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)0x20000004);    /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x40000000);    /* inc[3] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }


@@ -191,35 +190,35 @@ void  MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, vo
 * Task 5
 */
 
-void  MCD_startDmaENetXmit(int8_t *bDBase, int8_t *currBD, int8_t *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel)
+void  MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel)
 {

-    MCD_SET_VAR(taskTable+channel, 0, (uint32_t)bDBase); /* var[0] */
-    MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */
-    MCD_SET_VAR(taskTable+channel, 11, (uint32_t)xmitFifoPtr);   /* var[11] */
-    MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */
-    MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */
-    MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */
-    MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */
-    MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */
-    MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */
-    MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */
-    MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */
-    MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000);    /* var[10] */
-    MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000000);    /* var[12] */
-    MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x0000ffff);    /* var[13] */
-    MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0xffffffff);    /* var[14] */
-    MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000004);    /* var[15] */
-    MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x00000008);    /* var[16] */
-    MCD_SET_VAR(taskTable+channel, 24, (uint32_t)0x00000000);    /* inc[0] */
-    MCD_SET_VAR(taskTable+channel, 25, (uint32_t)0x60000000);    /* inc[1] */
-    MCD_SET_VAR(taskTable+channel, 26, (uint32_t)0x40000000);    /* inc[2] */
-    MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0xc000fffc);    /* inc[3] */
-    MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0xe0000004);    /* inc[4] */
-    MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000000);    /* inc[5] */
-    MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x4000ffff);    /* inc[6] */
-    MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0xe0000001);    /* inc[7] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)xmitFifoPtr);   /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 13, (u32)0x0000ffff);    /* var[13] */
+    MCD_SET_VAR(taskTable+channel, 14, (u32)0xffffffff);    /* var[14] */
+    MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004);    /* var[15] */
+    MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000008);    /* var[16] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000);    /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000);    /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)0x40000000);    /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0xc000fffc);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0xe0000004);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x4000ffff);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 31, (u32)0xe0000001);    /* inc[7] */

    /* Set the task's Enable bit in its Task Control Register */
-    MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000;
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
 }
--- a/dma/dma.c
+++ b/dma/dma.c
@@ -39,12 +39,13 @@
 #error "unknown machine!"
 #endif /* MACHINE_FIREBEE */

-#define DBG_DMA
+// #define DBG_DMA
 #ifdef DBG_DMA
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_DMA */
+#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0)

 extern char _SYS_SRAM[];
 #define SYS_SRAM &_SYS_SRAM[0]
@@ -75,36 +76,21 @@ static struct dma_channel dma_channel[NCHANNELS] =
    {-1, NULL}, {-1, NULL}, {-1, NULL}, {-1, NULL},
 };

-/********************************************************************/
 /*
 * Enable all DMA interrupts
 *
- * Parameters:
- *  pri     Interrupt Priority
- *  lvl     Interrupt Level
 */
-void dma_irq_enable(uint8_t lvl, uint8_t pri)
+void dma_irq_enable(void)
 {
-	/* Setup the DMA ICR (#48) */
-	MCF_INTC_ICR48 = 0
-		| MCF_INTC_ICR_IP(pri)
-		| MCF_INTC_ICR_IL(lvl);
-	dbg("%s:DMA irq assigned level %d, priority %d\r\n", __FUNCTION__, lvl, pri);
-
    /* Unmask all task interrupts */
    MCF_DMA_DIMR = 0;

    /* Clear the interrupt pending register */
    MCF_DMA_DIPR = 0;

-	/* Unmask the DMA interrupt in the interrupt controller */
-	MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK48;
-
-	dbg("%s: DMA task interrupts unmasked, pending interrupts cleared, interrupt controller active\r\n",
-		__FUNCTION__);
+    dbg("DMA task interrupts unmasked.\r\n");
 }

-/********************************************************************/
 /*
 * Disable all DMA interrupts
 */
@@ -119,7 +105,7 @@ void dma_irq_disable(void)
    /* Mask the DMA interrupt in the interrupt controller */
    MCF_INTC_IMRH |= MCF_INTC_IMRH_INT_MASK48;

-	dbg("%s: DMA interrupts masked and disabled\r\n", __FUNCTION__);
+    dbg("DMA interrupts masked and disabled\r\n");
 }

 int dma_set_initiator(int initiator)
@@ -177,7 +163,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot found\r\n", __FUNCTION__);
+                err("no free slot found\r\n");

                return 1;
            }
@@ -196,7 +182,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -210,7 +196,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -224,7 +210,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -238,7 +224,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -252,7 +238,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -266,7 +252,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -280,7 +266,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -294,7 +280,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -308,7 +294,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -322,7 +308,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -336,7 +322,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -349,7 +335,10 @@ int dma_set_initiator(int initiator)
                used_reqs[28] = DMA_USBEP6;
            }
            else /* No empty slots */
+            {
+                err("no free slot\r\n");
                return 1;
+            }
            break;

        case DMA_PSC2_RX:
@@ -359,7 +348,7 @@ int dma_set_initiator(int initiator)
                used_reqs[28] = DMA_PSC2_RX;            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -373,7 +362,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -387,7 +376,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -401,7 +390,7 @@ int dma_set_initiator(int initiator)
            }
            else /* No empty slots */
            {
-				dbg("%s: no free slot\r\n", __FUNCTION__);
+                err("no free slot\r\n");

                return 1;
            }
@@ -409,7 +398,7 @@ int dma_set_initiator(int initiator)

        default:
            {
-				dbg("%s: don't know what to do\r\n", __FUNCTION__);
+                err("don't know what to do\r\n");

                return 1;
            }
@@ -436,7 +425,7 @@ uint32_t dma_get_initiator(int requestor)
        if (used_reqs[i] == requestor)
            return i;
    }
-	dbg("%s: no initiator found for requestor %d\r\n", __FUNCTION__, requestor);
+    err("no initiator found for requestor %d\r\n", requestor);

    return 0;
 }
@@ -459,7 +448,7 @@ void dma_free_initiator(int requestor)
            break;
        }
    }
-	dbg("%s: DMA requestor %d freed\r\n", __FUNCTION__, requestor);
+    dbg("DMA requestor %d freed\r\n", requestor);
 }

 /*
@@ -476,9 +465,11 @@ int dma_set_channel(int requestor, void (*handler)(void))
    int i;

    /* Check to see if this requestor is already assigned to a channel */
-	dbg("%s: check if requestor %d is already assigned to a channel\r\n", __FUNCTION__, requestor);
+    dbg("check if requestor %d is already assigned to a channel\r\n", requestor);
    if ((i = dma_get_channel(requestor)) != -1)
+    {
        return i;
+    }

    for (i = 0; i < NCHANNELS; ++i)
    {
@@ -486,11 +477,11 @@ int dma_set_channel(int requestor, void (*handler)(void))
        {
            dma_channel[i].req = requestor;
            dma_channel[i].handler = handler;
-			dbg("%s: assigned channel %d to requestor %d\r\n", __FUNCTION__, i, requestor);
+            dbg("assigned channel %d to requestor %d\r\n", i, requestor);
            return i;
        }
    }
-	dbg("%s: no free DMA channel found for requestor %d\r\n", __FUNCTION__, requestor);
+    err("no free DMA channel found for requestor %d\r\n", requestor);

    /* All channels taken */
    return -1;
@@ -502,7 +493,7 @@ void dma_clear_channel(int channel)
    {
        dma_channel[channel].req = -1;
        dma_channel[channel].handler = NULL;
-		dbg("%s: cleared DMA channel %d\r\n", __FUNCTION__, channel);
+        dbg("cleared DMA channel %d\r\n", channel);
    }
 }

@@ -525,7 +516,7 @@ int dma_get_channel(int requestor)
        if (dma_channel[i].req == requestor)
            return i;
    }
-	dbg("%s: no channel occupied by requestor %d\r\n", __FUNCTION__, requestor);
+    dbg("no channel occupied by requestor %d\r\n", requestor);
    return -1;
 }

@@ -554,11 +545,12 @@ void dma_free_channel(int requestor)
 /*
 * This is the catch-all interrupt handler for the mult-channel DMA
 */
-int dma_interrupt_handler(void *arg1, void *arg2)
+bool dma_interrupt_handler(void *arg1, void *arg2)
 {
    int i, interrupts;
+    uint32_t ipl;

-	(void) set_ipl(7);
+    ipl = set_ipl(7);       /* do not disturb */

    /*
     * Determine which interrupt(s) triggered by AND'ing the
@@ -569,10 +561,11 @@ int dma_interrupt_handler(void *arg1, void *arg2)
    /* Make sure we are here for a reason */
    if (interrupts == 0)
    {
-		dbg("%s: not DMA interrupt! Spurious?\r\n", __FUNCTION__);
+        err("not DMA interrupt!\r\n");
        return 0;
    }

+    dbg("");
    /* Clear the interrupt in the pending register */
    MCF_DMA_DIPR = interrupts;

@@ -583,13 +576,15 @@ int dma_interrupt_handler(void *arg1, void *arg2)
            /* If there is a handler, call it */
            if (dma_channel[i].handler != NULL)
            {
-				dbg("%s: call handler for DMA channel %d (%p)\r\n", __FUNCTION__, i, dma_channel[i].handler);
+                dbg("call handler for DMA channel %d (%p)\r\n", i, dma_channel[i].handler);
                dma_channel[i].handler();
            }
        }
    }

-	return 1;	/* handled */
+    set_ipl(ipl);
+
+    return true;   /* handled */
 }
 /********************************************************************/

@@ -608,7 +603,7 @@ void *dma_memcpy(void *dst, void *src, size_t n)
    ret = MCD_startDma(1, src, 4, dst, 4, n, 4, DMA_ALWAYS, 0, MCD_SINGLE_DMA, 0);
    if (ret == MCD_OK)
    {
-		dbg("%s: DMA on channel 1 successfully started\r\n", __FUNCTION__);
+        dbg("DMA on channel 1 successfully started\r\n");
    }

    do
@@ -651,24 +646,34 @@ void *dma_memcpy(void *dst, void *src, size_t n)
 #ifdef DBG_DMA
    end = MCF_SLT0_SCNT;
    time = (start - end) / (SYSCLK / 1000) / 1000;
+    dbg("took %d ms (%f Mbytes/second)\r\n", time, n / (float) time / 1000.0);
 #endif /* DBG_DMA */
-	dbg("%s: took %d ms (%f Mbytes/second)\r\n", __FUNCTION__, time, n / (float) time / 1000.0);

    return dst;
 }

 int dma_init(void)
 {
+    int i;
    int res;

-	dbg("%s: MCD DMA API initialization: ", __FUNCTION__);
+    dbg("MCD DMA API initialization: ");
    res = MCD_initDma((dmaRegs *) &_MBAR[0x8000], SYS_SRAM, MCD_RELOC_TASKS | MCD_COMM_PREFETCH_EN);
    if (res != MCD_OK)
    {
-		dbg("%s: DMA API initialization failed (0x%x)\r\n", __FUNCTION__, res);
+        err("DMA API initialization failed (0x%x)\r\n", res);
        return 0;
    }

+    /*
+     * make sure dma_channel array is properly initialized
+     */
+    for (i = 0; i < NCHANNELS; i++)
+    {
+        dma_channel[i].req = -1;
+        dma_channel[i].handler = NULL;
+    }
+
    // test
    dma_memcpy((void *) 0x10000, (void *) 0x03e00000, 0x00100000);  /* copy one megabyte of flash to RAM */

--- a/exe/basflash.c
+++ b/exe/basflash.c
@@ -21,10 +21,9 @@
 *      Author: Markus Fröschle
 */

-#include <stdint.h>
-#include <stdbool.h>
-#include "bas_string.h"
+#include <bas_types.h>
 #include "bas_printf.h"
+#include "bas_string.h"
 #include "diskio.h"
 #include "ff.h"
 #include "s19reader.h"
--- a/exe/basflash_start.c
+++ b/exe/basflash_start.c
@@ -21,7 +21,7 @@
 *      Author: Markus Fröschle
 */

-#include <stdint.h>
+#include <bas_types.h>

 static uint32_t ownstack[4096];
 static uint32_t *stackptr = &ownstack[4095];
--- a/flash/flash.c
+++ b/flash/flash.c
@@ -1,10 +1,9 @@
-#include <stdint.h>
 #include <stddef.h>
 #include "bas_types.h"

-#if MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
 #include "firebee.h"
-#elif MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
 #endif /* MACHINE_FIREBEE */

--- a/flash/s19reader.c
+++ b/flash/s19reader.c
@@ -23,8 +23,7 @@
 * Copyright 2012        M. Froeschle
 */

-#include <stdint.h>
-#include <stdbool.h>
+#include <bas_types.h>

 #include "bas_printf.h"
 #include "bas_string.h"
@@ -47,7 +46,7 @@
 #define SREC_ADDR24(a)      (0x10000 * (a)[2] + 0x100 *  \
    (a)[3] + (a)[4])                                        /* 3 byte address field */
 #define SREC_ADDR32(a) 		(0x1000000 * a[2] + 0x10000 * \
-							a[3] + 0x100 * (a)[4] + (a)[5])	/* 4 byte address field */
+    (a)[3] + 0x100 * (a)[4] + (a)[5])   /* 4 byte address field */
 #define SREC_DATA16(a)      ((uint8_t *)&((a)[4]))          /* address of first byte of data in a record */
 #define SREC_DATA24(a)      ((uint8_t *)&((a)[5]))          /* address of first data byte in 24 bit record */
 #define SREC_DATA32(a)      ((uint8_t *)&((a)[6]))          /* adress of first byte of a record with 32 bit address field */
@@ -327,7 +326,7 @@ static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length)
 /*
 * this callback verifies the data against the S-record file contents after a write to destination
 */
-static err_t verify(uint8_t *dst, uint8_t *src, uint32_t length)
+static err_t verify(uint8_t *dst, uint8_t *src, size_t length)
 {
    uint8_t *end = src + length;

--- a/flash_scripts/flash_firebee_bas.bdm
+++ b/flash_scripts/flash_firebee_bas.bdm
@@ -1,71 +1,53 @@
-#!/usr/local/bin/bdmctrl 
+#!/usr/local/bin/bdmctrl -D2
 #
 # firebee board initialization for bdmctrl 
 #
 open $1
 reset
-sleep 10
+sleep 1

 wait

-# Turn on MBAR at 0xFF00_0000
-write-ctrl 0x0C0F 0xFF000000
-
-# set VBR
-write-ctrl 0x0801 0x00000000
-
-#
-# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
-write 0xFF000500 0xE0000000 4
-write 0xFF000508 0x00001180 4
-write 0xFF000504 0x007F0001 4
-
-# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
-write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
-write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
-write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
-write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
-write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
-write 0xFF000108 0x73622830 4 # SDCFG1
-write 0xFF00010C 0x46770000 4 # SDCFG2
-
-write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
-write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
-write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
-sleep 100
-write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
-write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
-write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
-write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
-write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
-sleep 10
-
-
 # use system sdram as flashlib scratch area.
 # TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
 # This seems to be related to large flash buffers and PC-relative adressing of the plugin
-flash-plugin 0x1000 0xf000 flash29.plugin
+#flash-plugin 0x1000 0xf000 flash29-5475.plugin
 # notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
-flash 0xE0000000
+flash 0xe0000000

 # Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS)
 #
 # Caution: sector offset numbers need to be the ones from the x16 address range
 # column and they vary in size - needs to be exactly as in the data sheet (p. 9)
 #
-# contrary to documentation, it seems we need to erase-wait after each sector

-erase 0xE0000000 0
-erase 0xE0000000 1
-erase 0xE0000000 2
-erase 0xE0000000 3
-erase 0xE0000000 4
-erase 0xE0000000 5
-erase 0xE0000000 7
-erase 0xE0000000 8
-erase 0xE0000000 9
-erase 0xE0000000 10
-erase-wait 0xE0000000
+erase 0xe0000000 0
+erase 0xe0000000 0x1000
+erase 0xe0000000 0x2000
+erase 0xe0000000 0x3000
+erase 0xe0000000 0x4000
+erase 0xe0000000 0x5000
+erase 0xe0000000 0x6000
+erase 0xe0000000 0x7000
+erase 0xe0000000 0x8000
+erase 0xe0000000 0x10000
+erase 0xe0000000 0x18000
+erase 0xe0000000 0x20000
+erase 0xe0000000 0x28000
+erase 0xe0000000 0x30000
+erase 0xe0000000 0x38000
+erase 0xe0000000 0x40000
+erase 0xe0000000 0x48000
+erase 0xe0000000 0x50000
+erase 0xe0000000 0x58000
+erase 0xe0000000 0x60000
+erase 0xe0000000 0x70000
+erase 0xe0000000 0x78000
+
+erase-wait 0xe0000000
+# should now have erased from 0xe0000000 to 0xe00fffff
+
+dump-mem 0xe0010000 0x20 b

 load -v ../firebee/bas.elf
 wait
--- a/flash_scripts/flash_m548x_bas.bdm
+++ b/flash_scripts/flash_m548x_bas.bdm
@@ -54,7 +54,7 @@ sleep 10
 #flash-plugin 0x1000 0xf000 flash29.plugin
 # notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
 flash 0xE0000000
-flash-plugin 0x1000 0xf000 flashintelc3.plugin
+#flash-plugin 0x1000 0xf000 flashintelc3.plugin

 # Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for bas)
 #
--- a/flash_scripts/flash_m548x_dbug.bdm
+++ b/flash_scripts/flash_m548x_dbug.bdm
@@ -10,20 +10,20 @@ wait
 write-ctrl 0x0801 0x00000000
 dump-register VBR

-# Turn on MBAR at 0xFF00_0000
-write-ctrl 0x0C0F 0xFF000000
+# Turn on MBAR at 0x1000_0000
+write-ctrl 0x0C0F 0x10000000
 dump-register MBAR

-# Turn on RAMBAR0 at address FF10_0000 
-write-ctrl 0x0C04 0xFF100007
+# Turn on RAMBAR0 at address 2000_0000 
+write-ctrl 0x0C04 0x20000007

 # Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently)
-write-ctrl 0x0C05 0xFF101001
+write-ctrl 0x0C05 0x20001001

 #
-# Init CS0 (BootFLASH @ E000_0000 - E03F_FFFF 4Mbytes)
-write 0xFF000500 0xE0000000 4
-write 0xFF000508 0x00041180 4
+# Init CS0 (BootFLASH @ FF80_0000 - FFBF_FFFF 4Mbytes)
+write 0xFF000500 0xFF800000 4
+write 0xFF000508 0x00100D80 4
 write 0xFF000504 0x003F0001 4

 # SDRAM Initialization @ 0000_0000 - 03FF_FFFF 64 Mbytes
@@ -52,27 +52,26 @@ sleep 10
 # This seems to be related to large flash buffers and PC-relative adressing of the plugin
 #flash-plugin 0x1000 0xf000 flash29.plugin
 # notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
-flash 0xE0000000
-flash-plugin 0x1000 0xf000 flashintelc3.plugin
+flash 0xFF800000
+#flash-plugin 0x1000 0xf000 flashintelc3.plugin

-# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for bas)
-#
-# Caution: sector offset numbers need to be the ones from the x16 address range
-# column and they vary in size - needs to be exactly as in the data sheet (p. 9)
+# Erase flash from 0xFF800000 to 0xFFBFFFFF (reserved space for bas)
 #
 # contrary to documentation, it seems we need to erase-wait after each sector

-#erase 0xE0000000 0x0
-#erase 0xE0002000 0x0
-#erase 0xE0000000 0x00004000
-#erase 0xE0000000 0x00005000
-#erase 0xE0000000 0x00006000
-#erase 0xE0000000 0x00007000
-#erase 0xE0000000 0x00008000
-#erase 0xE0000000 0x00009000
-#erase 0xE0000000 0x0000a000
-#erase 0xE0000000 0x0000b000
-#erase-wait 0xe0000000
-#blank-chk 0xE0000000 0x0
-load -v m5484lite_dbug_flash.elf
+erase 0xFF800000 0
+erase 0xFF800000 1
+erase 0xFF800000 2
+erase 0xFF800000 3
+erase 0xFF800000 4
+erase 0xFF800000 5
+erase 0xFF800000 6
+erase 0xFF800000 7
+erase 0xFF800000 8
+erase 0xFF800000 9
+erase 0xFF800000 10
+erase 0xFF800000 11
+erase 0xFF800000 12
+erase 0xFF800000 13
+load -v m548xlite_dbug_flash.elf
 wait
--- a/flash_scripts/flash_m548x_etos.bdm
+++ b/flash_scripts/flash_m548x_etos.bdm
@@ -63,4 +63,4 @@ erase 0xe0000000 37
 erase 0xe0000000 38
 erase 0xe0000000 39

-load ../../emutos/emutos-m548x_bas.elf
+load ../../emutos/emutos-m548xbas.elf
--- a/fs/ccsbcs.c
+++ b/fs/ccsbcs.c
@@ -26,12 +26,14 @@
 */

 #include <ff.h>
-#include <stdint.h>
+#include <bas_types.h>

 #if _CODE_PAGE == 437
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP437(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP437(0x80-0xFF) to Unicode conversion table */
    0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
    0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
    0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
@@ -53,7 +55,9 @@ const uint16_t Tbl[] = {	/*  CP437(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 720
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP720(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP720(0x80-0xFF) to Unicode conversion table */
    0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
    0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
    0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
@@ -75,7 +79,9 @@ const uint16_t Tbl[] = {	/*  CP720(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 737
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP737(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP737(0x80-0xFF) to Unicode conversion table */
    0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
    0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
    0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
@@ -97,7 +103,9 @@ const uint16_t Tbl[] = {	/*  CP737(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 775
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP775(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP775(0x80-0xFF) to Unicode conversion table */
    0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
    0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
    0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
@@ -119,7 +127,9 @@ const uint16_t Tbl[] = {	/*  CP775(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 850
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP850(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP850(0x80-0xFF) to Unicode conversion table */
    0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
    0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
    0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
@@ -141,7 +151,9 @@ const uint16_t Tbl[] = {	/*  CP850(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 852
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP852(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP852(0x80-0xFF) to Unicode conversion table */
    0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
    0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
    0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
@@ -163,7 +175,9 @@ const uint16_t Tbl[] = {	/*  CP852(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 855
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP855(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP855(0x80-0xFF) to Unicode conversion table */
    0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
    0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
    0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
@@ -185,7 +199,9 @@ const uint16_t Tbl[] = {	/*  CP855(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 857
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP857(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP857(0x80-0xFF) to Unicode conversion table */
    0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
    0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
    0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
@@ -207,7 +223,9 @@ const uint16_t Tbl[] = {	/*  CP857(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 858
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP858(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP858(0x80-0xFF) to Unicode conversion table */
    0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
    0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
    0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
@@ -229,7 +247,9 @@ const uint16_t Tbl[] = {	/*  CP858(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 862
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP862(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP862(0x80-0xFF) to Unicode conversion table */
    0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
    0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
    0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
@@ -251,7 +271,9 @@ const uint16_t Tbl[] = {	/*  CP862(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 866
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP866(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP866(0x80-0xFF) to Unicode conversion table */
    0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
    0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
    0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
@@ -273,7 +295,9 @@ const uint16_t Tbl[] = {	/*  CP866(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 874
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP874(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP874(0x80-0xFF) to Unicode conversion table */
    0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
    0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
    0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
@@ -295,7 +319,9 @@ const uint16_t Tbl[] = {	/*  CP874(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 1250
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP1250(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP1250(0x80-0xFF) to Unicode conversion table */
    0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
    0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
    0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
@@ -317,7 +343,9 @@ const uint16_t Tbl[] = {	/*  CP1250(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 1251
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP1251(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP1251(0x80-0xFF) to Unicode conversion table */
    0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
    0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
    0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
@@ -339,7 +367,9 @@ const uint16_t Tbl[] = {	/*  CP1251(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 1252
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP1252(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP1252(0x80-0xFF) to Unicode conversion table */
    0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
    0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
    0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
@@ -361,7 +391,9 @@ const uint16_t Tbl[] = {	/*  CP1252(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 1253
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP1253(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP1253(0x80-0xFF) to Unicode conversion table */
    0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
    0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
    0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
@@ -383,7 +415,9 @@ const uint16_t Tbl[] = {	/*  CP1253(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 1254
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP1254(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP1254(0x80-0xFF) to Unicode conversion table */
    0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
    0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
    0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
@@ -405,7 +439,9 @@ const uint16_t Tbl[] = {	/*  CP1254(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 1255
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP1255(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP1255(0x80-0xFF) to Unicode conversion table */
    0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
    0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
    0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
@@ -427,7 +463,9 @@ const uint16_t Tbl[] = {	/*  CP1255(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 1256
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP1256(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP1256(0x80-0xFF) to Unicode conversion table */
    0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
    0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
    0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
@@ -449,7 +487,9 @@ const uint16_t Tbl[] = {	/*  CP1256(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 1257
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP1257(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP1257(0x80-0xFF) to Unicode conversion table */
    0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
    0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
    0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
@@ -471,7 +511,9 @@ const uint16_t Tbl[] = {	/*  CP1257(0x80-0xFF) to Unicode conversion table */
 #elif _CODE_PAGE == 1258
 #define _TBLDEF 1
 static
-const uint16_t Tbl[] = {	/*  CP1258(0x80-0xFF) to Unicode conversion table */
+const uint16_t Tbl[] =
+{
+    /*  CP1258(0x80-0xFF) to Unicode conversion table */
    0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
    0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
    0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
@@ -529,8 +571,45 @@ uint16_t ff_wtoupper (	/* Upper converted character */
                        uint16_t chr		/* Input character */
                        )
 {
-	static const uint16_t tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 };
-	static const uint16_t tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
+    static const uint16_t tbl_lower[] =
+    {
+        0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
+        0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70,
+        0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78,
+        0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF,
+        0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7,
+        0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
+        0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8,
+        0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101,
+        0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F,
+        0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D,
+        0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B,
+        0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A,
+        0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148,
+        0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157,
+        0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165,
+        0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173,
+        0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1,
+        0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8,
+        0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF,
+        0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7,
+        0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433,
+        0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A,
+        0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441,
+        0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448,
+        0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F,
+        0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457,
+        0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F,
+        0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177,
+        0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F,
+        0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48,
+        0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50,
+        0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58,
+        0xFF59, 0xFF5A, 0
+    };
+    static const uint16_t tbl_upper[] =
+    {
+        0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
    int i;


--- a/fs/ff.c
+++ b/fs/ff.c
@@ -95,7 +95,7 @@
 /                   Changed option name _FS_SHARE to _FS_LOCK.
 /---------------------------------------------------------------------------*/

-#include <stdint.h>
+#include <bas_types.h>
 #include <ff.h>			/* FatFs configurations and declarations */
 #include <diskio.h>		/* Declarations of low level disk I/O functions */

@@ -142,7 +142,8 @@
 #if _FS_READONLY
 #error _FS_LOCK must be 0 on read-only cfg.
 #endif
-typedef struct {
+typedef struct
+{
    FATFS *fs;              /* File ID 1, volume (NULL:blank entry) */
    uint32_t clu;           /* File ID 2, directory */
    uint16_t idx;           /* File ID 3, directory index */
--- a/i2c/i2c.c
+++ b/i2c/i2c.c
@@ -0,0 +1,41 @@
+
+#include <bas_types.h>
+
+void i2c_init(void)
+{
+
+}
+
+void i2c_set_frequency(int hz)
+{
+}
+
+int i2c_read(int address, char *data, int length, bool repeated)
+{
+    return 0;
+}
+
+int i2c_read_byte(int ack)
+{
+    return 0;
+}
+
+int i2c_write(int address, const char *data, int length, bool repeated)
+{
+    return 0;
+}
+
+int i2c_write_byte(int data)
+{
+    return 0;
+}
+
+void i2c_start(void)
+{
+
+}
+
+void i2c_stop(void)
+{
+
+}
--- a/if/driver_vec.c
+++ b/if/driver_vec.c
@@ -23,13 +23,14 @@
 *      Author: Markus Fröschle
 */

-#include <stdint.h>
-#include <stddef.h>
+#include <bas_types.h>
 #include "version.h"
 #include "xhdi_sd.h"
 #include "dma.h"
 #include "driver_vec.h"
 #include "driver_mem.h"
+#include "pci.h"
+#include "mmu.h"

 /*
 * driver interface struct for the SD card BaS driver
@@ -55,20 +56,101 @@ static struct dma_driver_interface dma_interface =
    .dma_get_channel = dma_get_channel,
    .dma_free_channel = dma_free_channel,
    .dma_clear_channel = dma_clear_channel,
-	.MCD_startDma = MCD_startDma,
-	.MCD_dmaStatus = MCD_dmaStatus,
-	.MCD_XferProgrQuery = MCD_XferProgrQuery,
-	.MCD_killDma = MCD_killDma,
-	.MCD_continDma = MCD_continDma,
-	.MCD_pauseDma = MCD_pauseDma,
-	.MCD_resumeDma = MCD_resumeDma,
-	.MCD_csumQuery = MCD_csumQuery,
+    .MCD_startDma = (int (*)(long, int8_t *, unsigned int, int8_t *, unsigned int,
+                    unsigned int, unsigned int, unsigned int, int,
+                    unsigned int, unsigned int)) MCD_startDma,
+    .MCD_dmaStatus = (int32_t (*)(int32_t)) MCD_dmaStatus,
+    .MCD_XferProgrQuery = (int32_t (*)(int32_t, MCD_XferProg *)) MCD_XferProgrQuery,
+    .MCD_killDma = (int32_t (*)(int32_t)) MCD_killDma,
+    .MCD_continDma = (int32_t (*)(int32_t)) MCD_continDma,
+    .MCD_pauseDma = (int32_t (*)(int32_t)) MCD_pauseDma,
+    .MCD_resumeDma = (int32_t (*)(int32_t)) MCD_resumeDma,
+    .MCD_csumQuery = (int32_t (*)(int32_t, uint32_t *)) MCD_csumQuery,
    .dma_malloc = driver_mem_alloc,
    .dma_free = driver_mem_free
 };

-extern const struct fb_info *info_fb;
+extern struct fb_info *info_fb;

+/*
+ * driver interface struct for the PCI_BIOS BaS driver
+ */
+static struct pci_bios_interface pci_interface =
+{
+    .subjar = 0,
+    .version = 0x00010000,
+    .find_pci_device = wrapper_find_pci_device,
+    .find_pci_classcode = wrapper_find_pci_classcode,
+    .read_config_byte = wrapper_read_config_byte,
+    .read_config_word = wrapper_read_config_word,
+    .read_config_longword = wrapper_read_config_longword,
+    .fast_read_config_byte = wrapper_fast_read_config_byte,
+    .fast_read_config_word = wrapper_fast_read_config_word,
+    .fast_read_config_longword = wrapper_fast_read_config_longword,
+    .write_config_byte = wrapper_write_config_byte,
+    .write_config_word = wrapper_write_config_word,
+    .write_config_longword = wrapper_write_config_longword,
+    .hook_interrupt = wrapper_hook_interrupt,
+    .unhook_interrupt = wrapper_unhook_interrupt,
+    .special_cycle = wrapper_special_cycle,
+    .get_routing = wrapper_get_routing,
+    .set_interrupt = wrapper_set_interrupt,
+    .get_resource = wrapper_get_resource,
+    .get_card_used = wrapper_get_card_used,
+    .set_card_used = wrapper_set_card_used,
+    .read_mem_byte = wrapper_read_mem_byte,
+    .read_mem_word = wrapper_read_mem_word,
+    .read_mem_longword = wrapper_read_mem_longword,
+    .fast_read_mem_byte = wrapper_fast_read_mem_byte,
+    .fast_read_mem_word = wrapper_fast_read_mem_word,
+    .fast_read_mem_longword = wrapper_fast_read_mem_longword,
+    .write_mem_byte = wrapper_write_mem_byte,
+    .write_mem_word = wrapper_write_mem_word,
+    .write_mem_longword = wrapper_write_mem_longword,
+    .read_io_byte = wrapper_read_io_byte,
+    .read_io_word = wrapper_read_io_word,
+    .read_io_longword = wrapper_read_io_longword,
+    .fast_read_io_byte = wrapper_fast_read_io_byte,
+    .fast_read_io_word = wrapper_fast_read_io_word,
+    .fast_read_io_longword = wrapper_fast_read_io_longword,
+    .write_io_byte = wrapper_write_io_byte,
+    .write_io_word = wrapper_write_io_word,
+    .write_io_longword = wrapper_write_io_longword,
+    .get_machine_id = wrapper_get_machine_id,
+    .get_pagesize = wrapper_get_pagesize,
+    .virt_to_bus = wrapper_virt_to_bus,
+    .bus_to_virt = wrapper_bus_to_virt,
+    .virt_to_phys = wrapper_virt_to_phys,
+    .phys_to_virt = wrapper_phys_to_virt,
+};
+
+static struct pci_native_driver_interface_0_1 pci_native_interface_0_1 =
+{
+    .pci_read_config_longword = pci_read_config_longword,
+    .pci_read_config_word = pci_read_config_word,
+    .pci_read_config_byte = pci_read_config_byte,
+    .pci_write_config_longword = pci_write_config_longword,
+    .pci_write_config_word = pci_write_config_word,
+    .pci_write_config_byte = pci_write_config_byte,
+    .pci_hook_interrupt = pci_hook_interrupt,
+    .pci_unhook_interrupt = pci_unhook_interrupt,
+    .pci_get_resource = pci_get_resource,
+};
+
+static struct pci_native_driver_interface pci_native_interface =
+{
+    .pci_read_config_longword = pci_read_config_longword,
+    .pci_read_config_word = pci_read_config_word,
+    .pci_read_config_byte = pci_read_config_byte,
+    .pci_write_config_longword = pci_write_config_longword,
+    .pci_write_config_word = pci_write_config_word,
+    .pci_write_config_byte = pci_write_config_byte,
+    .pci_hook_interrupt = pci_hook_interrupt,
+    .pci_unhook_interrupt = pci_unhook_interrupt,
+    .pci_find_device = pci_find_device,
+    .pci_find_classcode = pci_find_classcode,
+    .pci_get_resource = pci_get_resource,
+};
 /*
 * driver interface struct for the BaS framebuffer video driver
 */
@@ -77,6 +159,17 @@ static struct framebuffer_driver_interface framebuffer_interface =
    .framebuffer_info = &info_fb
 };

+/*
+ * driver interface struct for the BaS MMU driver
+ */
+static struct mmu_driver_interface mmu_interface =
+{
+    .map_page_locked = &mmu_map_data_page_locked,
+    .unlock_page = &mmu_unlock_data_page,
+    .report_locked_pages = &mmu_report_locked_pages,
+    .report_pagesize = &mmu_report_pagesize
+};
+
 static struct generic_interface interfaces[] =
 {
    {
@@ -105,6 +198,38 @@ static struct generic_interface interfaces[] =
        .revision = 1,
        .interface.fb = &framebuffer_interface,
    },
+    {
+        .type = PCI_DRIVER,
+        .name = "PCI",
+        .description = "BaS PCI_BIOS driver",
+        .version = 0,
+        .revision = 1,
+        .interface.pci = &pci_interface,
+    },
+    {
+        .type = MMU_DRIVER,
+        .name = "MMU",
+        .description = "BaS MMU driver",
+        .version = 0,
+        .revision = 1,
+        .interface.mmu = &mmu_interface,
+    },
+    {
+        .type = PCI_NATIVE_DRIVER,
+        .name = "PCI_N",
+        .description = "BaS PCI native",
+        .version = 0,
+        .revision = 1,
+        .interface.pci_native = (struct pci_native_driver_interface *) &pci_native_interface_0_1,
+    },
+    {
+        .type = PCI_NATIVE_DRIVER,
+        .name = "PCI_N",
+        .description = "BaS PCI native",
+        .version = 0,
+        .revision = 2,
+        .interface.pci_native = &pci_native_interface,
+    },

    /* insert new drivers here */

@@ -113,6 +238,8 @@ static struct generic_interface interfaces[] =
    }
 };

+extern void remove_handler(void);   /* forward declaration */
+
 /*
 * this is the driver table we expose to the OS
 */
@@ -120,14 +247,51 @@ static struct driver_table bas_drivers =
 {
    .bas_version = MAJOR_VERSION,
    .bas_revision = MINOR_VERSION,
-	.remove_handler = NULL,
-	.interfaces = { interfaces }
+    .remove_handler = remove_handler,
+    .interfaces = interfaces
 };

+void remove_handler(void)
+{
+    extern void std_exc_vec(void);
+    uint32_t *trap_0_vector = (uint32_t *) 0x80;
+
+    *trap_0_vector = (uint32_t) std_exc_vec;
+}
+
+/*
+ * trap #0 entry point
+ *
+ * this is used to retrieve the driver table that gets exposed to the OS by BaS
+ */
 void __attribute__((interrupt)) get_bas_drivers(void)
 {
-	__asm__ __volatile__(
-		"move.l	#%[drivers],d0\n\t"
+    __asm__ __volatile(
+        /*
+         * (sp) should now point to the next instruction after the trap
+         * The trap itself is 2 bytes, the four bytes before that must
+         * read '_BAS', otherwise we are not meant by this call
+         */
+        "       move.l  a0,-(sp)                \n\t"   // save registers
+        "       move.l  d0,-(sp)                \n\t"
+        "       move.l  12(sp),a0               \n\t"   // get return address
+        "       move.l  -6(a0),d0               \n\t"   //
+        "       cmp.l   #0x5f424153,d0          \n\t"   // is it '_BAS'?
+        "       beq     fetch_drivers           \n\t"   // yes
+        /*
+         * This seems indeed a "normal" trap #0. Better pass control to "normal" trap #0 processing
+         * If trap #0 isn't set to something sensible, we'll probably crash here, but this must be
+         * prevented on the caller side.
+         */
+        "       move.l  (sp)+,d0                \n\t"   // restore registers
+        "       move.l  (sp)+,a0                \n\t"
+        "       move.l  0x80,-(sp)              \n\t"   // fetch vector
+        "       rts                             \n\t"   // and jump through it
+
+        "fetch_drivers:                         \n\t"
+        "       move.l	#%[drivers],d0          \n\t"   // return driver struct in d0
+        "       addq.l	#4,sp                   \n\t"   // adjust stack
+        "       move.l  (sp)+,a0                \n\t"   // restore register
        :                                   /* no output */
        :   [drivers] "o" (bas_drivers)     /* input */
        :                                   /* clobber */
--- a/include/MCD_dma.h
+++ b/include/MCD_dma.h
@@ -7,14 +7,11 @@
 #ifndef _MCD_API_H
 #define _MCD_API_H

-#include "bas_types.h"
-
 /*
 * Turn Execution Unit tasks ON (#define) or OFF (#undef)
 */
 #undef MCD_INCLUDE_EU
 //#define MCD_INCLUDE_EU
-
 /*
 * Number of DMA channels
 */
@@ -49,33 +46,39 @@
 /*
 * Portability typedefs
 */
+typedef int s32;
+typedef unsigned int u32;
+typedef short s16;
+typedef unsigned short u16;
+typedef char s8;
+typedef unsigned char u8;

 /*
 * These structures represent the internal registers of the
 * multi-channel DMA
 */
 struct dmaRegs_s {
-   uint32_t taskbar;         /* task table base address register */
-   uint32_t currPtr;
-   uint32_t endPtr;
-   uint32_t varTablePtr;
-   uint16_t dma_rsvd0;
-   uint16_t ptdControl;      /* ptd control */
-   uint32_t intPending;      /* interrupt pending register */
-   uint32_t intMask;         /* interrupt mask register */
-   uint16_t taskControl[16]; /* task control registers */
-   uint8_t  priority[32];    /* priority registers */
-   uint32_t initiatorMux;    /* initiator mux control */
-   uint32_t taskSize0;       /* task size control register 0. */
-   uint32_t taskSize1;       /* task size control register 1. */
-   uint32_t dma_rsvd1;       /* reserved */
-   uint32_t dma_rsvd2;       /* reserved */
-   uint32_t debugComp1;      /* debug comparator 1 */
-   uint32_t debugComp2;      /* debug comparator 2 */
-   uint32_t debugControl;    /* debug control */
-   uint32_t debugStatus;     /* debug status */
-   uint32_t ptdDebug;        /* priority task decode debug */
-   uint32_t dma_rsvd3[31];   /* reserved */
+   u32 taskbar;         /* task table base address register */
+   u32 currPtr;
+   u32 endPtr;
+   u32 varTablePtr;
+   u16 dma_rsvd0;
+   u16 ptdControl;      /* ptd control */
+   u32 intPending;      /* interrupt pending register */
+   u32 intMask;         /* interrupt mask register */
+   u16 taskControl[16]; /* task control registers */
+   u8  priority[32];    /* priority registers */
+   u32 initiatorMux;    /* initiator mux control */
+   u32 taskSize0;       /* task size control register 0. */
+   u32 taskSize1;       /* task size control register 1. */
+   u32 dma_rsvd1;       /* reserved */
+   u32 dma_rsvd2;       /* reserved */
+   u32 debugComp1;      /* debug comparator 1 */
+   u32 debugComp2;      /* debug comparator 2 */
+   u32 debugControl;    /* debug control */
+   u32 debugStatus;     /* debug status */
+   u32 ptdDebug;        /* priority task decode debug */
+   u32 dma_rsvd3[31];   /* reserved */
 };
 typedef volatile struct dmaRegs_s dmaRegs;

@@ -161,7 +164,7 @@ typedef volatile struct dmaRegs_s dmaRegs;
 */
 /* Byte swapping: */
 #define MCD_NO_BYTE_SWAP    0x00045670  /* to disable byte swapping. */
-#define MCD_BYTE_REVERSE    0x00076540  /* to reverse the bytes of each uint32_t of the DMAed data. */
+#define MCD_BYTE_REVERSE    0x00076540  /* to reverse the bytes of each u32 of the DMAed data. */
 #define MCD_U16_REVERSE     0x00067450  /* to reverse the 16-bit halves of
                                           each 32-bit data value being DMAed.*/
 #define MCD_U16_BYTE_REVERSE    0x00054760 /* to reverse the byte halves of each
@@ -228,44 +231,44 @@ typedef volatile struct dmaRegs_s dmaRegs;

 /* Task Table Entry struct*/
 typedef struct {
-    uint32_t TDTstart;   /* task descriptor table start */
-    uint32_t TDTend;     /* task descriptor table end */
-    uint32_t varTab;     /* variable table start */
-    uint32_t FDTandFlags;    /* function descriptor table start and flags */
-    volatile uint32_t descAddrAndStatus;
-    volatile uint32_t modifiedVarTab;
-    uint32_t contextSaveSpace;   /* context save space start */
-    uint32_t literalBases;
+    u32 TDTstart;   /* task descriptor table start */
+    u32 TDTend;     /* task descriptor table end */
+    u32 varTab;     /* variable table start */
+    u32 FDTandFlags;    /* function descriptor table start and flags */
+    volatile u32 descAddrAndStatus;
+    volatile u32 modifiedVarTab;
+    u32 contextSaveSpace;   /* context save space start */
+    u32 literalBases;
 } TaskTableEntry;


 /* Chained buffer descriptor */
 typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
 struct MCD_bufDesc_struct {
-   uint32_t flags;         /* flags describing the DMA */
-   uint32_t csumResult;    /* checksum from checksumming performed since last checksum reset */
-   int8_t  *srcAddr;      /* the address to move data from */
-   int8_t  *destAddr;     /* the address to move data to */
-   int8_t  *lastDestAddr; /* the last address written to */
-   uint32_t dmaSize;       /* the number of bytes to transfer independent of the transfer size */
+   u32 flags;         /* flags describing the DMA */
+   u32 csumResult;    /* checksum from checksumming performed since last checksum reset */
+   s8  *srcAddr;      /* the address to move data from */
+   s8  *destAddr;     /* the address to move data to */
+   s8  *lastDestAddr; /* the last address written to */
+   u32 dmaSize;       /* the number of bytes to transfer independent of the transfer size */
   MCD_bufDesc *next; /* next buffer descriptor in chain */
-   uint32_t info;          /* private information about this descriptor;  DMA does not affect it */
+   u32 info;          /* private information about this descriptor;  DMA does not affect it */
 };

 /* Progress Query struct */
 typedef volatile struct MCD_XferProg_struct {
-   int8_t *lastSrcAddr;         /* the most-recent or last, post-increment source address */
-   int8_t *lastDestAddr;        /* the most-recent or last, post-increment destination address */
-   uint32_t  dmaSize;            /* the amount of data transferred for the current buffer */
+   s8 *lastSrcAddr;         /* the most-recent or last, post-increment source address */
+   s8 *lastDestAddr;        /* the most-recent or last, post-increment destination address */
+   u32  dmaSize;            /* the amount of data transferred for the current buffer */
   MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */
 } MCD_XferProg;


 /* FEC buffer descriptor */
 typedef volatile struct MCD_bufDescFec_struct {
-    uint16_t statCtrl;
-    uint16_t length;
-    uint32_t dataPointer;
+    u16 statCtrl;
+    u16 length;
+    u32 dataPointer;
 } MCD_bufDescFec;


@@ -279,16 +282,16 @@ typedef volatile struct MCD_bufDescFec_struct {
 */
 int MCD_startDma (
   int channel,   /* the channel on which to run the DMA */
-   int8_t  *srcAddr,  /* the address to move data from, or buffer-descriptor address */
-   int16_t srcIncr,   /* the amount to increment the source address per transfer */
-   int8_t  *destAddr, /* the address to move data to */
-   int16_t destIncr,  /* the amount to increment the destination address per transfer */
-   uint32_t dmaSize,   /* the number of bytes to transfer independent of the transfer size */
-   uint32_t xferSize,  /* the number bytes in of each data movement (1, 2, or 4) */
-   uint32_t initiator, /* what device initiates the DMA */
+   s8  *srcAddr,  /* the address to move data from, or buffer-descriptor address */
+   s16 srcIncr,   /* the amount to increment the source address per transfer */
+   s8  *destAddr, /* the address to move data to */
+   s16 destIncr,  /* the amount to increment the destination address per transfer */
+   u32 dmaSize,   /* the number of bytes to transfer independent of the transfer size */
+   u32 xferSize,  /* the number bytes in of each data movement (1, 2, or 4) */
+   u32 initiator, /* what device initiates the DMA */
   int priority,  /* priority of the DMA */
-   uint32_t flags,     /* flags describing the DMA */
-   uint32_t funcDesc   /* a description of byte swapping, bit swapping, and CRC actions */
+   u32 flags,     /* flags describing the DMA */
+   u32 funcDesc   /* a description of byte swapping, bit swapping, and CRC actions */
 );

 /*
@@ -296,7 +299,7 @@ int MCD_startDma (
 * registers, relocating and creating the appropriate task structures, and
 * setting up some global settings
 */
-int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, uint32_t flags);
+int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags);

 /*
 * MCD_dmaStatus() returns the status of the DMA on the requested channel.
@@ -335,7 +338,7 @@ int MCD_resumeDma (int channel);
 /*
 * MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
 */
-int MCD_csumQuery (int channel, uint32_t *csum);
+int MCD_csumQuery (int channel, u32 *csum);

 /*
 * MCD_getCodeSize provides the packed size required by the microcoded task
@@ -350,7 +353,7 @@ int MCD_getCodeSize(void);
 int MCD_getVersion(char **longVersion);

 /* macro for setting a location in the variable table */
-#define MCD_SET_VAR(taskTab,idx,value) ((uint32_t *)(taskTab)->varTab)[idx] = value
+#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value
   /* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
      so I'm avoiding surrounding it with "do {} while(0)" */

--- a/include/MCD_tasksInit.h
+++ b/include/MCD_tasksInit.h
@@ -15,7 +15,7 @@ void  MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer
 /*
 * Task 1
 */
-void  MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
+void  MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);


 /*
@@ -27,18 +27,18 @@ void  MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi
 /*
 * Task 3
 */
-void  MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
+void  MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);


 /*
 * Task 4
 */
-void  MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel);
+void  MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel);


 /*
 * Task 5
 */
-void  MCD_startDmaENetXmit(int8_t *bDBase, int8_t *currBD, int8_t *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel);
+void  MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel);

 #endif  /* MCD_TSK_INIT_H */
--- a/include/MCF5475.h
+++ b/include/MCF5475.h
@@ -16,7 +16,7 @@
 #ifndef __MCF5475_H__
 #define __MCF5475_H__

-#include <stdint.h>
+#include <bas_types.h>
 /***
 * MCF5475 Derivative Memory map definitions from linker command files:
 * __MBAR, __MMUBAR, __RAMBAR0, __RAMBAR0_SIZE, __RAMBAR1, __RAMBAR1_SIZE
--- a/include/MCF5475_INTC.h
+++ b/include/MCF5475_INTC.h
@@ -107,7 +107,6 @@
 #define MCF_INTC_LIACK(x)                    (*(volatile uint8_t *)(&_MBAR[0x7E4 + ((x-1)*0x4)]))


-
 /* Bit definitions and macros for MCF_INTC_IPRH */
 #define MCF_INTC_IPRH_INT32                  (0x1)
 #define MCF_INTC_IPRH_INT33                  (0x2)
--- a/include/bas_types.h
+++ b/include/bas_types.h
@@ -30,5 +30,6 @@

 #include <stdint.h>
 #include <stdbool.h>
+#include <stddef.h>		/* for sizeof() etc. */

 #endif /* BAS_TYPES_H_ */
--- a/include/bas_utils.h
+++ b/include/bas_utils.h
@@ -26,4 +26,7 @@
 #define CLEAR_BIT(p,bit)        p &= ~(bit)
 #define CLEAR_BIT_NO(p,nr)      CLEAR_BIT(p, (1 << (nr)))

+extern void write_pic_byte(uint8_t value);
+extern uint8_t read_pic_byte(void);
+
 #endif /* _BAS_UTILS_H_ */
--- a/include/cache.h
+++ b/include/cache.h
@@ -25,8 +25,7 @@
 *
 */

-#include <stdint.h>
-#include <stddef.h>
+#include <bas_types.h>

 /*
 * CACR Cache Control Register
@@ -54,6 +53,7 @@
 #define CF_CACR_ICINVA      (0x00000100) /* Instr Cache Invalidate All       */
 #define CF_CACR_IDSP        (0x00000080) /* Ins default supervisor-protect   */
 #define CF_CACR_EUSP        (0x00000020) /* Switch stacks in user mode       */
+#define CF_CACR_DF          (0x00000010) /* Disable FPU                      */

 #define _DCACHE_SET_MASK ((DCACHE_SIZE/64-1)<<CACHE_WAYS)
 #define _ICACHE_SET_MASK ((ICACHE_SIZE/64-1)<<CACHE_WAYS)
@@ -83,7 +83,7 @@ extern uint32_t cacr_get(void);
 extern void cacr_set(uint32_t);
 extern void flush_icache_range(void *address, size_t size);
 extern void flush_dcache_range(void *address, size_t size);
-
+extern void flush_cache_range(void *address, size_t size);


 #endif /* _CACHE_H_ */
--- a/include/diskio.h
+++ b/include/diskio.h
@@ -12,7 +12,7 @@ extern "C" {
 #define _USE_WRITE	1	/* 1: Enable disk_write function */
 #define _USE_IOCTL	1	/* 1: Enable disk_ioctl fucntion */

-#include <stdint.h>
+#include <bas_types.h>


 /* Status of Disk Functions */
--- a/include/dma.h
+++ b/include/dma.h
@@ -26,10 +26,6 @@
 #include "MCD_dma.h"
 #include "bas_string.h"

-#define DMA_INTC_LVL        6
-#define DMA_INTC_PRI        0
-
-
 void *dma_memcpy(void *dst, void *src, size_t n);
 extern int dma_init(void);
 extern int dma_get_channel(int requestor);
@@ -39,9 +35,9 @@ extern void dma_clear_channel(int channel);
 extern uint32_t dma_get_initiator(int requestor);
 extern int dma_set_initiator(int initiator);
 extern void dma_free_initiator(int initiator);
-extern void dma_irq_enable(uint8_t lvl, uint8_t pri);
+extern void dma_irq_enable(void);
 extern void dma_irq_disable(void);
-extern int dma_interrupt_handler(void *arg1, void *arg2);
+extern bool dma_interrupt_handler(void *arg1, void *arg2);


 #endif /* _DMA_H_ */
--- a/include/driver_vec.h
+++ b/include/driver_vec.h
@@ -27,15 +27,19 @@

 #include "xhdi_sd.h"
 #include "MCD_dma.h"
+#include "pci.h"

 enum driver_type
 {
-	END_OF_DRIVERS,		/* marks end of driver list */
    BLOCKDEV_DRIVER,
    CHARDEV_DRIVER,
-	VIDEO_DRIVER,
    XHDI_DRIVER,
    MCD_DRIVER,
+    VIDEO_DRIVER,
+    PCI_DRIVER,
+    MMU_DRIVER,
+    PCI_NATIVE_DRIVER,
+    END_OF_DRIVERS = 0xffffffffL,        /* marks end of driver list */
 };

 struct generic_driver_interface
@@ -77,7 +81,8 @@ struct xhdi_driver_interface
    uint32_t (*xhdivec)();
 };

-/* Interpretation of offset for color fields: All offsets are from the right,
+/*
+ * Interpretation of offset for color fields: All offsets are from the right,
 * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
 * can use the offset as right argument to <<). A pixel afterwards is a bit
 * stream and is written to video memory as that unmodified. This implies
@@ -204,12 +209,109 @@ struct framebuffer_driver_interface
    struct fb_info **framebuffer_info;  /* pointer to an fb_info struct (defined in include/fb.h) */
 };

+struct pci_bios_interface
+{
+    uint32_t subjar;
+    uint32_t version;
+    /* Although we declare this functions as standard gcc functions (cdecl),
+     * they expect parameters inside registers (fastcall) unsupported by gcc m68k.
+     * Caller will take care of parameters passing convention.
+     */
+    int32_t (*find_pci_device)(uint32_t id, uint16_t index);
+    int32_t (*find_pci_classcode)(uint32_t class, uint16_t index);
+    int32_t (*read_config_byte)(int32_t handle, uint16_t reg, uint8_t *address);
+    int32_t (*read_config_word)(int32_t handle, uint16_t reg, uint16_t *address);
+    int32_t (*read_config_longword)(int32_t handle, uint16_t reg, uint32_t *address);
+    uint8_t (*fast_read_config_byte)(int32_t handle, uint16_t reg);
+    uint16_t (*fast_read_config_word)(int32_t handle, uint16_t reg);
+    uint32_t (*fast_read_config_longword)(int32_t handle, uint16_t reg);
+    int32_t (*write_config_byte)(int32_t handle, uint16_t reg, uint16_t val);
+    int32_t (*write_config_word)(int32_t handle, uint16_t reg, uint16_t val);
+    int32_t (*write_config_longword)(int32_t handle, uint16_t reg, uint32_t val);
+    int32_t (*hook_interrupt)(int32_t handle, uint32_t *routine, uint32_t *parameter);
+    int32_t (*unhook_interrupt)(int32_t handle);
+    int32_t (*special_cycle)(uint16_t bus, uint32_t data);
+    int32_t (*get_routing)(int32_t handle);
+    int32_t (*set_interrupt)(int32_t handle);
+    int32_t (*get_resource)(int32_t handle);
+    int32_t (*get_card_used)(int32_t handle, uint32_t *address);
+    int32_t (*set_card_used)(int32_t handle, uint32_t *callback);
+    int32_t (*read_mem_byte)(int32_t handle, uint32_t offset, uint8_t *address);
+    int32_t (*read_mem_word)(int32_t handle, uint32_t offset, uint16_t *address);
+    int32_t (*read_mem_longword)(int32_t handle, uint32_t offset, uint32_t *address);
+    uint8_t (*fast_read_mem_byte)(int32_t handle, uint32_t offset);
+    uint16_t (*fast_read_mem_word)(int32_t handle, uint32_t offset);
+    uint32_t (*fast_read_mem_longword)(int32_t handle, uint32_t offset);
+    int32_t (*write_mem_byte)(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_mem_word)(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_mem_longword)(int32_t handle, uint32_t offset, uint32_t val);
+    int32_t (*read_io_byte)(int32_t handle, uint32_t offset, uint8_t *address);
+    int32_t (*read_io_word)(int32_t handle, uint32_t offset, uint16_t *address);
+    int32_t (*read_io_longword)(int32_t handle, uint32_t offset, uint32_t *address);
+    uint8_t (*fast_read_io_byte)(int32_t handle, uint32_t offset);
+    uint16_t (*fast_read_io_word)(int32_t handle, uint32_t offset);
+    uint32_t (*fast_read_io_longword)(int32_t handle, uint32_t offset);
+    int32_t (*write_io_byte)(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_io_word)(int32_t handle, uint32_t offset, uint16_t val);
+    int32_t (*write_io_longword)(int32_t handle, uint32_t offset, uint32_t val);
+    int32_t (*get_machine_id)(void);
+    int32_t (*get_pagesize)(void);
+    int32_t (*virt_to_bus)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+    int32_t (*bus_to_virt)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+    int32_t (*virt_to_phys)(uint32_t address, PCI_CONV_ADR *pointer);
+    int32_t (*phys_to_virt)(uint32_t address, PCI_CONV_ADR *pointer);
+    //  int32_t reserved[2];
+};
+
+struct mmu_driver_interface
+{
+    int32_t (*map_page_locked)(uint32_t address, uint32_t length, int asid);
+    int32_t (*unlock_page)(uint32_t address, uint32_t length, int asid);
+    int32_t (*report_locked_pages)(uint32_t *num_itlb, uint32_t *num_dtlb);
+    uint32_t (*report_pagesize)(void);
+};
+
+struct pci_native_driver_interface_0_1
+{
+    uint32_t (*pci_read_config_longword)(int32_t handle, int offset);
+    uint16_t (*pci_read_config_word)(int32_t handle, int offset);
+    uint8_t (*pci_read_config_byte)(int32_t handle, int offset);
+
+    int32_t (*pci_write_config_longword)(int32_t handle, int offset, uint32_t value);
+    int32_t (*pci_write_config_word)(int32_t handle, int offset, uint16_t value);
+    int32_t (*pci_write_config_byte)(int32_t handle, int offset, uint8_t value);
+    int32_t (*pci_hook_interrupt)(int32_t handle, void *handler, void *parameter);
+    int32_t (*pci_unhook_interrupt)(int32_t handle);
+
+    struct pci_rd * (*pci_get_resource)(int32_t handle);
+};
+
+struct pci_native_driver_interface
+{
+    uint32_t (*pci_read_config_longword)(int32_t handle, int offset);
+    uint16_t (*pci_read_config_word)(int32_t handle, int offset);
+    uint8_t (*pci_read_config_byte)(int32_t handle, int offset);
+
+    int32_t (*pci_write_config_longword)(int32_t handle, int offset, uint32_t value);
+    int32_t (*pci_write_config_word)(int32_t handle, int offset, uint16_t value);
+    int32_t (*pci_write_config_byte)(int32_t handle, int offset, uint8_t value);
+    int32_t (*pci_hook_interrupt)(int32_t handle, void *handler, void *parameter);
+    int32_t (*pci_unhook_interrupt)(int32_t handle);
+    int32_t (*pci_find_device)(uint16_t device_id, uint16_t vendor_id, int index);
+    int32_t (*pci_find_classcode)(uint32_t classcode, int index);
+    struct pci_rd * (*pci_get_resource)(int32_t handle);
+};
+
 union interface
 {
    struct generic_driver_interface *gdi;
    struct xhdi_driver_interface *xhdi;
    struct dma_driver_interface *dma;
    struct framebuffer_driver_interface *fb;
+    struct pci_bios_interface *pci;
+    struct mmu_driver_interface *mmu;
+    struct pci_native_driver_interface_0_1 *pci_native_0_1;
+    struct pci_native_driver_interface *pci_native;
 };

 struct generic_interface
@@ -226,8 +328,8 @@ struct driver_table
 {
    uint32_t bas_version;
    uint32_t bas_revision;
-	uint32_t (*remove_handler)();			/* calling this will disable the BaS' hook into trap #0 */
-	struct generic_interface *interfaces[];
+    void (*remove_handler)(void);           /* calling this will disable the BaS' hook into trap #0 */
+    struct generic_interface *interfaces;
 };


--- a/include/ehci.h
+++ b/include/ehci.h
@@ -23,9 +23,6 @@
 #define USB_EHCI_H

 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	5
-#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
-#endif

 /* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
 #define DeviceRequest \
@@ -46,7 +43,8 @@
 /*
 * Register Space.
 */
-struct ehci_hccr {
+struct ehci_hccr
+{
    uint32_t cr_capbase;
 #define HC_LENGTH(p)		(((p) >> 0) & 0x00ff)
 #define HC_VERSION(p)		(((p) >> 16) & 0xffff)
@@ -58,7 +56,8 @@ struct ehci_hccr {
    uint8_t cr_hcsp_portrt[8];
 } __attribute__ ((packed));

-struct ehci_hcor {
+struct ehci_hcor
+{
    uint32_t or_usbcmd;
 #define CMD_PARK	(1 << 11)		/* enable "park" */
 #define CMD_PARK_CNT(c)	(((c) >> 8) & 3)	/* how many transfers to park */
@@ -104,7 +103,8 @@ struct ehci_hcor {
 #define USBMODE_CM_IDLE	(0 << 0)	/* idle state */

 /* Interface descriptor */
-struct usb_linux_interface_descriptor {
+struct usb_linux_interface_descriptor
+{
    unsigned char	bLength;
    unsigned char	bDescriptorType;
    unsigned char	bInterfaceNumber;
@@ -117,7 +117,8 @@ struct usb_linux_interface_descriptor {
 } __attribute__ ((packed));

 /* Configuration descriptor information.. */
-struct usb_linux_config_descriptor {
+struct usb_linux_config_descriptor
+{
    unsigned char	bLength;
    unsigned char	bDescriptorType;
    unsigned short	wTotalLength;
@@ -129,11 +130,11 @@ struct usb_linux_config_descriptor {
 } __attribute__ ((packed));

 #if defined CONFIG_EHCI_DESC_BIG_ENDIAN
-#define	ehci_readl(x)		(*((volatile u32 *)(x)))
-#define ehci_writel(a, b)	(*((volatile u32 *)(a)) = ((volatile u32)b))
+#define	ehci_readl(x)		(*((volatile uint32_t *)(x)))
+#define ehci_writel(a, b)	(*((volatile uint32_t *)(a)) = ((volatile uint32_t) b))
 #else
-#define ehci_readl(x)		swpl((*((volatile u32 *)(x))))
-#define ehci_writel(a, b)	(*((volatile u32 *)(a)) = swpl(((volatile u32)b)))
+#define ehci_readl(x)		swpl((*((volatile uint32_t *)(x))))
+#define ehci_writel(a, b)	(*((volatile uint32_t *)(a)) = swpl(((volatile uint32_t) b)))
 #endif

 #if defined CONFIG_EHCI_MMIO_BIG_ENDIAN
@@ -174,7 +175,8 @@ struct usb_linux_config_descriptor {
 */

 /* Queue Element Transfer Descriptor (qTD). */
-struct qTD {
+struct qTD
+{
    uint32_t qt_next;
 #define	QT_NEXT_TERMINATE	1
    uint32_t qt_altnext;
@@ -183,7 +185,8 @@ struct qTD {
 };

 /* Queue Head (QH). */
-struct QH {
+struct QH
+{
    uint32_t qh_link;
 #define	QH_LINK_TERMINATE	1
 #define	QH_LINK_TYPE_ITD	0
--- a/include/exceptions.h
+++ b/include/exceptions.h
@@ -1,7 +1,7 @@
 #ifndef _EXCEPTIONS_H_
 #define _EXCEPTIONS_H_

-#include <stdint.h>
+#include <bas_types.h>

 static inline uint32_t set_ipl(uint32_t ipl)
 {
@@ -19,7 +19,7 @@ static inline uint32_t set_ipl(uint32_t ipl)
 		"		lsr.l	#8,%[ret]\r\n"			/* shift them to position */
 		: [ret] "=&d" (ret)		/* output */
 		: [ipl] "d" (ipl)		/* input */
-		: "d0"	/* clobber */
+		: "cc", "d0"	/* clobber */
 	);

 	return ret;
--- a/include/fb.h
+++ b/include/fb.h
@@ -528,7 +528,6 @@ struct fb_videomode {
 extern const struct fb_videomode vesa_modes[];

 /* timer */
-extern void udelay(long usec);
 #ifdef COLDFIRE
 #ifdef MCF5445X
 #define US_TO_TIMER(a) (a)
@@ -541,6 +540,7 @@ extern void udelay(long usec);
 #define US_TO_TIMER(a) (((a)*256)/5000)
 #define TIMER_TO_US(a) (((a)*5000)/256)
 #endif
+
 extern void start_timeout(void);
 extern int end_timeout(long msec);
 extern void mdelay(long msec);
--- a/include/fec.h
+++ b/include/fec.h
@@ -87,8 +87,8 @@ extern int fec1_send(NIF *, uint8_t *, uint8_t *, uint16_t , NBUF *);
 extern void fec_irq_enable(uint8_t, uint8_t, uint8_t);
 extern void fec_irq_disable(uint8_t);
 extern void fec_interrupt_handler(uint8_t);
-extern int fec0_interrupt_handler(void *, void *);
-extern int fec1_interrupt_handler(void *, void *);
+extern bool fec0_interrupt_handler(void *, void *);
+extern bool fec1_interrupt_handler(void *, void *);
 extern void fec_eth_setup(uint8_t, uint8_t, uint8_t, uint8_t, const uint8_t *);
 extern void fec_eth_reset(uint8_t);
 extern void fec_eth_stop(uint8_t);
--- a/include/ff.h
+++ b/include/ff.h
@@ -21,7 +21,7 @@
 extern "C" {
 #endif

-#include <stdint.h>
+#include <bas_types.h>
 #include <ffconf.h>		/* FatFs configuration options */

 #if _FATFS != _FFCONF
--- a/include/font.h
+++ b/include/font.h
@@ -0,0 +1,98 @@
+/*
+ * font.h - font specific definitions
+ *
+ * Copyright (c) 2001 Lineo, Inc.
+ * Copyright (c) 2004 by Authors:
+ *
+ * Authors:
+ *  MAD     Martin Doering
+ *
+ * This file is distributed under the GPL, version 2 or at your
+ * option any later version.  See doc/license.txt for details.
+ */
+
+#ifndef FONT_H
+#define FONT_H
+
+#include <stdint.h>
+
+/* font header flags */
+
+#define F_DEFAULT 1     /* this is the default font (face and size) */
+#define F_HORZ_OFF  2   /* there are left and right offset tables */
+#define F_STDFORM  4    /* is the font in standard format */
+#define F_MONOSPACE 8   /* is the font monospaced */
+
+/* font style bits */
+
+#define F_THICKEN 1
+#define F_LIGHT 2
+#define F_SKEW  4
+#define F_UNDER 8
+#define F_OUTLINE 16
+#define F_SHADOW        32
+
+/* font specific linea variables */
+
+extern const uint16_t *v_fnt_ad;   /* address of current monospace font */
+extern const uint16_t *v_off_ad;   /* address of font offset table */
+extern uint16_t v_fnt_nd;          /* ascii code of last cell in font */
+extern uint16_t v_fnt_st;          /* ascii code of first cell in font */
+extern uint16_t v_fnt_wr;          /* font cell wrap */
+
+/* character cell specific linea variables */
+
+extern uint16_t    v_cel_ht;       /* cell height (width is 8) */
+extern uint16_t    v_cel_mx;       /* needed by MiNT: columns on the screen minus 1 */
+extern uint16_t    v_cel_my;       /* needed by MiNT: rows on the screen minus 1 */
+extern uint16_t    v_cel_wr;       /* needed by MiNT: length (in int8_ts) of a line of characters */
+
+/*
+ * font_ring is a struct of four pointers, each of which points to
+ * a list of font headers linked together to form a string.
+ */
+
+extern struct font_head *font_ring[4];  /* Ring of available fonts */
+extern int16_t font_count;                 /* all three fonts and NULL */
+
+/* the font header descibes a font */
+
+struct font_head {
+    int16_t font_id;
+    int16_t point;
+    int8_t name[32];
+    uint16_t first_ade;
+    uint16_t last_ade;
+    uint16_t top;
+    uint16_t ascent;
+    uint16_t half;
+    uint16_t descent;
+    uint16_t bottom;
+    uint16_t max_char_width;
+    uint16_t max_cell_width;
+    uint16_t left_offset;          /* amount character slants left when skewed */
+    uint16_t right_offset;         /* amount character slants right */
+    uint16_t thicken;              /* number of pixels to smear */
+    uint16_t ul_size;              /* size of the underline */
+    uint16_t lighten;              /* mask to and with to lighten  */
+    uint16_t skew;                 /* mask for skewing */
+    uint16_t flags;
+
+    const uint8_t *hor_table;     /* horizontal offsets */
+    const uint16_t *off_table;     /* character offsets  */
+    const uint16_t *dat_table;     /* character definitions */
+    uint16_t form_width;
+    uint16_t form_height;
+
+    struct font_head *next_font;/* pointer to next font */
+    uint16_t font_seg;
+};
+
+
+
+/* prototypes */
+
+void font_init(void);           /* initialize BIOS font ring */
+void font_set_default(void);    /* choose the default font */
+
+#endif /* FONT_H */
--- a/include/i2c-algo-bit.h
+++ b/include/i2c-algo-bit.h
@@ -32,7 +32,8 @@
 * manipulate the line states, and to init any hw-specific features. This is
 * only used if you have more than one hw-type of adapter running. 
 */
-struct i2c_algo_bit_data {
+struct i2c_algo_bit_data
+{
    void *data;		/* private data for lowlevel routines */
    void (*setsda) (void *data, int state);
    void (*setscl) (void *data, int state);
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -28,6 +28,8 @@
 #ifndef _I2C_H
 #define _I2C_H

+#include "bas_types.h"
+
 /* --- General options ------------------------------------------------	*/

 struct i2c_msg;
@@ -44,7 +46,8 @@ extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
 * be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584
 * to name two of the most common.
 */
-struct i2c_algorithm {
+struct i2c_algorithm
+{
    unsigned int id;
    int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num);
    /* --- ioctl like call to set div. parameters. */
@@ -55,7 +58,8 @@ struct i2c_algorithm {
 * i2c_adapter is the structure used to identify a physical i2c bus along
 * with the access algorithms necessary to access it.
 */
-struct i2c_adapter {
+struct i2c_adapter
+{
    struct i2c_algorithm *algo;     /* the algorithm to access the bus	*/
    void *algo_data;
    int timeout;
@@ -66,7 +70,8 @@ struct i2c_adapter {
 /*
 * I2C Message - used for pure i2c transaction, also from /dev interface
 */
-struct i2c_msg {
+struct i2c_msg
+{
    unsigned short addr;	/* slave address			*/
    unsigned short flags;
 #define I2C_M_TEN           0x10	/* we have a ten bit chip address	*/
@@ -79,4 +84,13 @@ struct i2c_msg {
    unsigned char *buf;     /* pointer to msg data			*/
 };

+extern void i2c_init(void);
+extern void i2c_set_frequency(int hz);
+extern int i2c_read(int address, char *data, int lengt, bool repeated);
+extern int i2c_read_byte(int ack);
+extern int i2c_write(int address, const char *data, int length, bool repeated);
+extern int i2c_write_byte(int data);
+extern void i2c_start(void);
+extern void i2c_stop(void);
+
 #endif /* _I2C_H */
--- a/include/interrupts.h
+++ b/include/interrupts.h
@@ -79,29 +79,71 @@
 #define INT_SOURCE_GPT0             62  // GPT0 timer interrupt


-#define FEC0_INTC_LVL	1			/* interrupt level for FEC0 */
-#define FEC0_INTC_PRI	2			/* interrupt priority for FEC0 */
+#define FEC0_INTC_LVL   6           /* interrupt level for FEC0 */
+#define FEC0_INTC_PRI   7           /* interrupt priority for FEC0 */

-#define FEC1_INTC_LVL	1			/* interrupt level for FEC1 */
-#define FEC1_INTC_PRI	2			/* interrupt priority for FEC1 */
+#define FEC1_INTC_LVL   6           /* interrupt level for FEC1 */
+#define FEC1_INTC_PRI   6           /* interrupt priority for FEC1 */

 #define FEC_INTC_LVL(x)     ((x == 0) ? FEC0_INTC_LVL : FEC1_INTC_LVL)
 #define FEC_INTC_PRI(x)     ((x == 0) ? FEC0_INTC_PRI : FEC1_INTC_PRI)

 #define FEC0RX_DMA_PRI      5
-#define FEC1RX_DMA_PRI      5
+#define FEC1RX_DMA_PRI      4
 #define FECRX_DMA_PRI(x)    ((x == 0) ? FEC0RX_DMA_PRI : FEC1RX_DMA_PRI)
-#define FEC0TX_DMA_PRI      6
-#define FEC1TX_DMA_PRI      6
+#define FEC0TX_DMA_PRI      2
+#define FEC1TX_DMA_PRI      1
 #define FECTX_DMA_PRI(x)    ((x == 0) ? FEC0TX_DMA_PRI : FEC1TX_DMA_PRI)

-extern int register_interrupt_handler(uint8_t source, uint8_t level, uint8_t priority, uint8_t intr, void (*handler)(void));
+#if defined(MACHINE_FIREBEE)

-#define ISR_DBUG_ISR	0x01
-#define ISR_USER_ISR 	0x02
+/* Firebee FPGA interrupt controller */
+#define FBEE_INTR_CONTROL   * ((volatile uint32_t *) 0xf0010000)
+#define FBEE_INTR_ENABLE    * ((volatile uint32_t *) 0xf0010004)
+#define FBEE_INTR_CLEAR     * ((volatile uint32_t *) 0xf0010008)
+#define FBEE_INTR_PENDING   * ((volatile uint32_t *) 0xff01000c)
+
+/* register bits for Firebee FPGA-based interrupt controller */
+#define FBEE_INTR_PIC               (1 << 0)        /* PIC interrupt enable/pending/clear bit */
+#define FBEE_INTR_ETHERNET          (1 << 1)        /* ethernet PHY interrupt enable/pending/clear bit */
+#define FBEE_INTR_DVI               (1 << 2)        /* TFP410 monitor sense interrupt enable/pending/clear bit */
+#define FBEE_INTR_PCI_INTA          (1 << 3)        /* /PCIINTA enable/pending clear bit */
+#define FBEE_INTR_PCI_INTB          (1 << 4)        /* /PCIINTB enable/pending clear bit */
+#define FBEE_INTR_PCI_INTC          (1 << 5)        /* /PCIINTC enable/pending clear bit */
+#define FBEE_INTR_PCI_INTD          (1 << 6)        /* /PCIINTD enable/pending clear bit */
+#define FBEE_INTR_DSP               (1 << 7)        /* DSP interrupt enable/pending/clear bit */
+#define FBEE_INTR_VSYNC             (1 << 8)        /* VSYNC interrupt enable/pending/clear bit */
+#define FBEE_INTR_HSYNC             (1 << 9)        /* HSYNC interrupt enable/pending/clear bit */
+
+#define FBEE_INTR_INT_HSYNC_IRQ2    (1 << 26)       /* these bits are only meaningful for the FBEE_INTR_ENABLE register */
+#define FBEE_INTR_INT_CTR0_IRQ3     (1 << 27)
+#define FBEE_INTR_INT_VSYNC_IRQ4    (1 << 28)
+#define FBEE_INTR_INT_FPGA_IRQ5     (1 << 29)
+#define FBEE_INTR_INT_MFP_IRQ6      (1 << 30)
+#define FBEE_INTR_INT_IRQ7          (1 << 31)
+
+/*
+ * Atari MFP interrupt registers.
+ */
+
+#define FALCON_MFP_IERA     *((volatile uint8_t *) 0xfffffa07)
+#define FALCON_MFP_IERB     *((volatile uint8_t *) 0xfffffa09)
+#define FALCON_MFP_IPRA     *((volatile uint8_t *) 0xfffffa0b)
+#define FALCON_MFP_IPRB     *((volatile uint8_t *) 0xfffffa0d)
+#define FALCON_MFP_IMRA     *((volatile uint8_t *) 0xfffffa13)
+#define FALCON_MFP_IMRB     *((volatile uint8_t *) 0xfffffa15)
+
+#endif /* MACHINE_FIREBEE */

 extern void isr_init(void);
-extern int isr_register_handler(int vector, int (*handler)(void *, void *), void *hdev, void *harg);
-extern void isr_remove_handler(int (*handler)(void *, void *));
+extern bool isr_set_prio_and_level(int int_source, int priority, int level);
+extern bool isr_enable_int_source(int int_source);
+extern bool isr_register_handler(int vector, int level, int priority, bool (*handler)(void *, void *), void *hdev, void *harg);
+extern void isr_remove_handler(bool (*handler)(void *, void *));
 extern bool isr_execute_handler(int vector);
+extern bool pic_interrupt_handler(void *arg1, void *arg2);
+extern bool xlbpci_interrupt_handler(void *arg1, void *arg2);
+extern bool pciarb_interrupt_handler(void *arg1, void *arg2);
+extern bool gpt0_interrupt_handler(void *arg1, void *arg2);
+extern bool irq5_handler(void *arg1, void *arg2);
 #endif /* _INTERRUPTS_H_ */
--- a/include/mmu.h
+++ b/include/mmu.h
@@ -24,6 +24,7 @@
 #ifndef _MMU_H_
 #define _MMU_H_

+#include <stddef.h>
 #include "bas_types.h"

 /*
@@ -54,10 +55,21 @@
 /*
 * MMU page sizes
 */
-#define MMU_PAGE_SIZE_1M	0
-#define MMU_PAGE_SIZE_4K	1
-#define MMU_PAGE_SIZE_8K	2
-#define MMU_PAGE_SIZE_1K	3
+
+enum mmu_page_size
+{
+    MMU_PAGE_SIZE_1M	= 0,
+    MMU_PAGE_SIZE_4K	= 1,
+    MMU_PAGE_SIZE_8K	= 2,
+    MMU_PAGE_SIZE_1K	= 3
+};
+
+#define SIZE_1M             0x100000        /* 1 Megabyte */
+#define SIZE_4K             0x1000          /* 4 KB */
+#define SIZE_8K             0x2000          /* 8 KB */
+#define SIZE_1K             0x400           /* 1 KB */
+
+#define DEFAULT_PAGE_SIZE   0x00100000      /* 1M pagesize */

 /*
 * cache modes
@@ -78,14 +90,6 @@
 #define	ACCESS_WRITE	(1 << 1)
 #define ACCESS_EXECUTE	(1 << 2)

-struct map_flags
-{
-	unsigned cache_mode:2;
-	unsigned protection:1;
-	unsigned page_id:8;
-	unsigned access:3;
-	unsigned unused:18;
-};

 /*
 * global variables from linker script
@@ -93,7 +97,16 @@ struct map_flags
 extern long video_tlb;
 extern long video_sbt;

-extern void mmu_init(void);
-extern void mmu_map_page(uint32_t virt, uint32_t phys, uint32_t map_size, struct map_flags flags);
+struct mmu_page_descriptor;

+extern void mmu_init(void);
+extern int mmu_map_page(int32_t virt, int32_t phys, enum mmu_page_size sz, uint8_t page_id, const struct mmu_page_descriptor *flags);
+
+/*
+ * API functions for the BaS driver interface
+ */
+extern int32_t mmu_map_data_page_locked(uint32_t address, uint32_t length, int asid);
+extern int32_t mmu_unlock_data_page(uint32_t address, uint32_t length, int asid);
+extern int32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb);
+extern uint32_t mmu_report_pagesize(void);
 #endif /* _MMU_H_ */
--- a/include/mod_devicetable.h
+++ b/include/mod_devicetable.h
@@ -3,10 +3,14 @@

 #define PCI_ANY_ID (~0)

-struct pci_device_id {
-	unsigned long vendor, device;		/* Vendor and device ID or PCI_ANY_ID*/
-	unsigned long subvendor, subdevice;	/* Subsystem ID's or PCI_ANY_ID */
-	unsigned long class, class_mask;	/* (class,subclass,prog-if) triplet */
+struct pci_device_id
+{
+    unsigned long vendor;       /* Vendor and device ID or PCI_ANY_ID*/
+    unsigned long device;
+    unsigned long subvendor;    /* Subsystem ID's or PCI_ANY_ID */
+    unsigned long subdevice;
+    unsigned long class;        /* (class,subclass,prog-if) triplet */
+    unsigned long class_mask;
 	unsigned long driver_data;	/* Data private to the driver */
 };

@@ -15,7 +19,8 @@ struct pci_device_id {
 #define IEEE1394_MATCH_SPECIFIER_ID	0x0004
 #define IEEE1394_MATCH_VERSION		0x0008

-struct ieee1394_device_id {
+struct ieee1394_device_id
+{
 	unsigned long match_flags;
 	unsigned long vendor_id;
 	unsigned long model_id;
@@ -81,7 +86,8 @@ struct ieee1394_device_id {
 * matches towards the beginning of your table, so that driver_info can
 * record quirks of specific products.
 */
-struct usb_device_id {
+struct usb_device_id
+{
 	/* which fields to match against? */
 	unsigned short		match_flags;

@@ -118,7 +124,8 @@ struct usb_device_id {
 #define USB_DEVICE_ID_MATCH_INT_PROTOCOL	0x0200

 /* s390 CCW devices */
-struct ccw_device_id {
+struct ccw_device_id
+{
 	unsigned short	match_flags;	/* which fields to match against */

    unsigned short	cu_type;        /* control unit type     */
@@ -138,15 +145,18 @@ struct ccw_device_id {
 #define PNP_ID_LEN	8
 #define PNP_MAX_DEVICES	8

-struct pnp_device_id {
+struct pnp_device_id
+{
 	unsigned char id[PNP_ID_LEN];
 	unsigned long driver_data;
 };

-struct pnp_card_device_id {
+struct pnp_card_device_id
+{
 	unsigned char id[PNP_ID_LEN];
 	unsigned long driver_data;
-	struct {
+    struct
+    {
 		unsigned char id[PNP_ID_LEN];
 	} devs[PNP_MAX_DEVICES];
 };
@@ -154,7 +164,8 @@ struct pnp_card_device_id {

 #define SERIO_ANY	0xff

-struct serio_device_id {
+struct serio_device_id
+{
 	unsigned char type;
 	unsigned char extra;
 	unsigned char id;
--- a/include/nbuf.h
+++ b/include/nbuf.h
@@ -10,7 +10,6 @@

 #include "bas_types.h"

-/********************************************************************/
 /*
 * Include the Queue structure definitions
 */
--- a/include/net_timer.h
+++ b/include/net_timer.h
@@ -8,9 +8,7 @@
 #ifndef _TIMER_H_
 #define _TIMER_H_

-#include <stdint.h>
-#include <stdbool.h>
-#include <stddef.h>
+#include <bas_types.h>

 typedef struct
 {
--- a/include/ohci.h
+++ b/include/ohci.h
@@ -9,7 +9,8 @@

 #define USB_OHCI_MAX_ROOT_PORTS	4

-static int cc_to_error[16] = {
+static int cc_to_error[16] =
+{

 /* mapping of the OHCI CC status to error codes */
    /* No  Error  */	       0,
@@ -30,8 +31,8 @@ static int cc_to_error[16] = {
    /* Not Access */	       -1
 };

-#ifdef DEBUG
-static const char *cc_to_string[16] = {
+static const char *cc_to_string[16] =
+{
    "No Error",
    "CRC: Last data packet from endpoint contained a CRC error.",
    "BITSTUFFING:\r\nLast data packet from endpoint contained a bit stuffing violation",
@@ -62,7 +63,6 @@ static const char *cc_to_string[16] = {
    "NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
             "on a list to be processed by the HC.(2)",
 };
-#endif /* DEBUG */

 /* ED States */

@@ -73,7 +73,8 @@ static const char *cc_to_string[16] = {
 #define ED_URB_DEL	0x08

 /* usb_ohci_ed */
-struct ed {
+struct ed
+{
    uint32_t hwINFO;
    uint32_t hwTailP;
    uint32_t hwHeadP;
@@ -134,7 +135,8 @@ typedef struct ed ed_t;

 #define MAXPSW 1

-struct td {
+struct td
+{
    uint32_t hwINFO;
    uint32_t hwCBP;		/* Current Buffer Pointer */
    uint32_t hwNextTD;		/* Next TD Pointer */
@@ -162,7 +164,8 @@ typedef struct td td_t;
 */

 #define NUM_INTS 32	/* part of the OHCI standard */
-struct ohci_hcca {
+struct ohci_hcca
+{
    uint32_t	int_table[NUM_INTS];	/* Interrupt ED table */
 #if defined(CONFIG_MPC5200)
    uint16_t	pad1;			/* set to 0 on each frame_no change */
@@ -180,7 +183,8 @@ struct ohci_hcca {
 * region.  This is Memory Mapped I/O.	You must use the readl() and
 * writel() macros defined in asm/io.h to access these!!
 */
-struct ohci_regs {
+struct ohci_regs
+{
    /* control and status registers */
    uint32_t	revision;
    uint32_t	control;
@@ -203,7 +207,8 @@ struct ohci_regs {
    uint32_t	periodicstart;
    uint32_t	lsthresh;
    /* Root hub ports */
-	struct	ohci_roothub_regs {
+    struct	ohci_roothub_regs
+    {
        uint32_t	a;
        uint32_t	b;
        uint32_t	status;
@@ -263,7 +268,8 @@ struct ohci_regs {


 /* Virtual Root HUB */
-struct virt_root_hub {
+struct virt_root_hub
+{
    int devnum; /* Address of Root Hub endpoint */
    void *dev;  /* was urb */
    void *int_addr;
@@ -383,7 +389,8 @@ typedef struct

 #define NUM_EDS 8		/* num of preallocated endpoint descriptors */

-struct ohci_device {
+struct ohci_device
+{
    ed_t	ed[NUM_EDS];
    int ed_cnt;
 };
@@ -395,7 +402,8 @@ struct ohci_device {
 * a subset of what the full implementation needs. (Linus)
 */

-typedef struct ohci {
+typedef struct ohci
+{
    /* ------- common part -------- */
    long handle;              /* PCI BIOS */
    const struct pci_device_id *ent;
@@ -443,7 +451,6 @@ static int ep_link(ohci_t * ohci, ed_t * ed);
 static int ep_unlink(ohci_t * ohci, ed_t * ed);
 static ed_t * ep_add_ed(ohci_t * ohci, struct usb_device * usb_dev, uint32_t pipe, int interval, int load);

-/*-------------------------------------------------------------------------*/

 /* we need more TDs than EDs */
 #define NUM_TD 64
--- a/include/part.h
+++ b/include/part.h
@@ -26,7 +26,8 @@
 typedef unsigned long long uint64_t;
 typedef unsigned long lbaint_t;

-typedef struct block_dev_desc {
+typedef struct block_dev_desc
+{
 	int		if_type;	/* type of the interface */
 	int		dev;		/* device number */
 	unsigned char	part_type;	/* partition type */
--- a/include/pci.h
+++ b/include/pci.h
@@ -21,13 +21,13 @@
 *      Author: Markus Fröschle
 */

-#include <stdint.h>
+#include <bas_types.h>
 #include "util.h"   /* for swpX() */

-#define	 PCI_MEMORY_OFFSET	(0x80000000)
-#define	 PCI_MEMORY_SIZE	(0x40000000)	/* 1 GByte PCI memory window */
-#define	 PCI_IO_OFFSET		(0xD0000000)
-#define	 PCI_IO_SIZE		(0x10000000)	/* 128 MByte PCI I/O window */
+#define  PCI_MEMORY_OFFSET  0x80000000
+#define  PCI_MEMORY_SIZE    0x40000000  /* 1 GByte PCI memory window */
+#define  PCI_IO_OFFSET      0xD0000000
+#define  PCI_IO_SIZE        0x10000000  /* 128 MByte PCI I/O window */

 /*
 * Note: the byte offsets are in little endian format, so you can't use them
@@ -91,9 +91,12 @@
 #define PCICSR_STEPPING     (1 << 7)    /* if set: stepping enabled */
 #define PCICSR_SERR         (1 << 8)    /* if set: SERR pin enabled */
 #define PCICSR_FAST_BTOB_E  (1 << 9)    /* if set: fast back-to-back enabled */
+#define PCICSR_INT_DISABLE  (1 << 10)   /* if set: disable interrupts from this device */
 /*
 * bit definitions for PCICSR upper half (Status Register)
 */
+#define PCICSR_INTERRUPT    (1 << 3)    /* device requested interrupt */
+#define PCICSR_CAPABILITIES (1 << 4)    /* if set, capabilities pointer is valid */
 #define PCICSR_66MHZ        (1 << 5)    /* 66 MHz capable */
 #define PCICSR_UDF          (1 << 6)    /* UDF supported */
 #define PCICSR_FAST_BTOB    (1 << 7)    /* Fast back-to-back enabled */
@@ -131,7 +134,7 @@ struct pci_rd          /* structure of resource descriptor    */
    unsigned long length;              /* length of resource                  */
    unsigned long offset;              /* offset PCI to phys. CPU Address     */
    unsigned long dmaoffset;           /* offset for DMA-transfers            */
-} __attribute__ ((packed));
+};

 typedef struct                       /* structure of address conversion     */
 {
@@ -192,7 +195,7 @@ typedef struct                       /* structure of address conversion     */

 /* register 0x08 macros */
 #define PCI_CLASS_CODE(i)   ((swpl((i)) & 0xff000000) >> 24)
-#define PCI_SUBCLASS(i)		((swpl((i)) & 0x00ff0000) >> 16)
+#define PCI_SUBCLASS(i)     ((swpl((i)) & 0xffff0000) >> 16)
 #define PCI_PROG_IF(i)      ((swpl((i)) & 0x0000ff00) >> 8)
 #define PCI_REVISION_ID(i)  ((swpl((i)) & 0x000000ff))

@@ -224,10 +227,14 @@ typedef struct                       /* structure of address conversion     */
 extern void init_eport(void);
 extern void init_xlbus_arbiter(void);
 extern void init_pci(void);
+extern int pci_handle2index(int32_t handle);

 extern int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index);
 extern int32_t pci_find_classcode(uint32_t classcode, int index);

+extern int32_t pci_get_interrupt_cause(void);
+extern int32_t pci_call_interrupt_chain(int32_t handle, int32_t data);
+
 /*
 * match bits for pci_find_classcode()
 */
@@ -243,10 +250,96 @@ extern int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t va
 extern int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value);
 extern int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value);

-extern struct pci_rd *pci_get_resource(int32_t handle);
-extern int32_t pci_hook_interrupt(int32_t handle, void *interrupt_handler, void *parameter);
+typedef int (*pci_interrupt_handler)(int param);
+
+extern int32_t pci_hook_interrupt(int32_t handle, void *handler, void *parameter);
 extern int32_t pci_unhook_interrupt(int32_t handle);

+extern struct pci_rd *pci_get_resource(int32_t handle);
+
+/*
+ * Not implemented PCI_BIOS functions
+ */
+extern uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg);
+extern uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg);
+extern uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg);
+extern int32_t pci_special_cycle(uint16_t bus, uint32_t data);
+extern int32_t pci_get_routing(int32_t handle);
+extern int32_t pci_set_interrupt(int32_t handle);
+extern int32_t pci_get_card_used(int32_t handle, uint32_t *address);
+extern int32_t pci_set_card_used(int32_t handle, uint32_t *callback);
+extern int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset);
+extern uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset);
+extern uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset);
+extern int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset);
+extern uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset);
+extern uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset);
+extern int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t pci_get_machine_id(void);
+extern int32_t pci_get_pagesize(void);
+extern int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
+
+/*
+ * prototypes for PCI wrapper routines
+ */
+extern int32_t wrapper_find_pci_device(uint32_t id, uint16_t index);
+extern int32_t wrapper_find_pci_classcode(uint32_t class, uint16_t index);
+extern int32_t wrapper_read_config_byte(int32_t handle, uint16_t reg, uint8_t *address);
+extern int32_t wrapper_read_config_word(int32_t handle, uint16_t reg, uint16_t *address);
+extern int32_t wrapper_read_config_longword(int32_t handle, uint16_t reg, uint32_t *address);
+extern uint8_t wrapper_fast_read_config_byte(int32_t handle, uint16_t reg);
+extern uint16_t wrapper_fast_read_config_word(int32_t handle, uint16_t reg);
+extern uint32_t wrapper_fast_read_config_longword(int32_t handle, uint16_t reg);
+extern int32_t wrapper_write_config_byte(int32_t handle, uint16_t reg, uint16_t val);
+extern int32_t wrapper_write_config_word(int32_t handle, uint16_t reg, uint16_t val);
+extern int32_t wrapper_write_config_longword(int32_t handle, uint16_t reg, uint32_t val);
+extern int32_t wrapper_hook_interrupt(int32_t handle, uint32_t *routine, uint32_t *parameter);
+extern int32_t wrapper_unhook_interrupt(int32_t handle);
+extern int32_t wrapper_special_cycle(uint16_t bus, uint32_t data);
+extern int32_t wrapper_get_routing(int32_t handle);
+extern int32_t wrapper_set_interrupt(int32_t handle);
+extern int32_t wrapper_get_resource(int32_t handle);
+extern int32_t wrapper_get_card_used(int32_t handle, uint32_t *address);
+extern int32_t wrapper_set_card_used(int32_t handle, uint32_t *callback);
+extern int32_t wrapper_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t wrapper_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t wrapper_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t wrapper_fast_read_mem_byte(int32_t handle, uint32_t offset);
+extern uint16_t wrapper_fast_read_mem_word(int32_t handle, uint32_t offset);
+extern uint32_t wrapper_fast_read_mem_longword(int32_t handle, uint32_t offset);
+extern int32_t wrapper_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_mem_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t wrapper_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address);
+extern int32_t wrapper_read_io_word(int32_t handle, uint32_t offset, uint16_t *address);
+extern int32_t wrapper_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address);
+extern uint8_t wrapper_fast_read_io_byte(int32_t handle, uint32_t offset);
+extern uint16_t wrapper_fast_read_io_word(int32_t handle, uint32_t offset);
+extern uint32_t wrapper_fast_read_io_longword(int32_t handle, uint32_t offset);
+extern int32_t wrapper_write_io_byte(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_io_word(int32_t handle, uint32_t offset, uint16_t val);
+extern int32_t wrapper_write_io_longword(int32_t handle, uint32_t offset, uint32_t val);
+extern int32_t wrapper_get_machine_id(void);
+extern int32_t wrapper_get_pagesize(void);
+extern int32_t wrapper_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer);
+extern int32_t wrapper_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer);
+
 #define PCI_MK_CONF_ADDR(bus, device, function) (MCF_PCI_PCICAR_E | \
                                                ((bus) << 16) | \
                                                ((device << 8) | \
@@ -257,5 +350,4 @@ extern int32_t pci_unhook_interrupt(int32_t handle);
 #define PCI_DEVICE_FROM_HANDLE(h)           (((h) & 0xf8) >> 3)
 #define PCI_FUNCTION_FROM_HANDLE(h)         (((h) & 0x7))

-extern void chip_errata_135(void); /* needed in ohci-hcd.c */
 #endif /* _PCI_H_ */
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -598,8 +598,10 @@
 #define PCI_DEVICE_ID_NEC_VL		0x0016 /* PCI-VL Bridge */
 #define PCI_DEVICE_ID_NEC_STARALPHA2	0x002c /* STAR ALPHA2 */
 #define PCI_DEVICE_ID_NEC_CBUS_2	0x002d /* PCI-Cbus Bridge */
+#define PCI_DEVICE_ID_NEC_USB_A     0x0031
 #define PCI_DEVICE_ID_NEC_USB		0x0035 /* PCI-USB Host */
 #define PCI_DEVICE_ID_NEC_USB_2		0x00e0 /* PCI-USB 2 Host */
+#define PCI_DEVICE_ID_NEC_USB_3     0x00f0
 #define PCI_DEVICE_ID_NEC_CBUS_3	0x003b
 #define PCI_DEVICE_ID_NEC_NAPCCARD	0x003e
 #define PCI_DEVICE_ID_NEC_PCX2		0x0046 /* PowerVR */
--- a/include/queue.h
+++ b/include/queue.h
@@ -8,8 +8,6 @@
 #ifndef _QUEUE_H_
 #define _QUEUE_H_

-/********************************************************************/
-
 /* 
 * Individual queue node
 */
--- a/include/radeonfb.h
+++ b/include/radeonfb.h
@@ -10,7 +10,9 @@
 #include "i2c-algo-bit.h"
 #include "util.h"			/* for swpX() */
 #include "wait.h"
+
 //#include "radeon_theatre.h"
+
 #include "radeon_reg.h"

 /* Buffer are aligned on 4096 byte boundaries */
--- a/include/sd_card.h
+++ b/include/sd_card.h
@@ -31,7 +31,7 @@
 #define _SD_CARD_H_

 #include <MCF5475.h>
-#include <stdint.h>
+#include <bas_types.h>

 extern void sd_card_init(void);

--- a/include/setjmp.h
+++ b/include/setjmp.h
@@ -0,0 +1,11 @@
+#ifndef _SETJMP_H_
+#define _SETJMP_H_
+
+#include "bas_types.h"
+
+typedef uint32_t jmp_buf[18];
+
+extern int setjmp(jmp_buf env);
+extern void longjmp(jmp_buf env, int val);
+
+#endif /* _SETJMP_H_ */
--- a/include/usb.h
+++ b/include/usb.h
@@ -26,7 +26,6 @@
 #ifndef _USB_H_
 #define _USB_H_

-//#include <stdlib.h>
 #include <bas_string.h>
 #include "driver_mem.h"
 #include "pci.h"
@@ -37,18 +36,10 @@

 extern long *tab_funcs_pci;

-#define in8(addr)		Fast_read_mem_byte(usb_handle,addr)
-#define in16r(addr)		Fast_read_mem_word(usb_handle,addr)
-#define in32r(addr)		Fast_read_mem_longword(usb_handle,addr)
-#define out8(addr,val)	Write_mem_byte(usb_handle,addr,val)
-#define out16r(addr,val)	Write_mem_word(usb_handle,addr,val)
-#define out32r(addr,val)	Write_mem_longword(usb_handle,addr,val)
-
-
 #define __u8 uint8_t
 #define __u16 uint16_t
 #define __u32 uint32_t
-#define u8 uint8_t
+//#define u8 uint8_t
 #define u16 uint16_t
 #define u32 uint32_t
 #define uint8_t uint8_t
@@ -74,15 +65,19 @@ extern int sprintD(char *s, const char *fmt, ...);

 #define USB_CNTL_TIMEOUT 100    /* 100 ms timeout */

+#define USB_BUFSIZ	512
+
 /* String descriptor */
-struct usb_string_descriptor {
+struct usb_string_descriptor
+{
    uint8_t	bLength;
    uint8_t	bDescriptorType;
    uint16_t	wData[1];
 } __attribute__ ((packed));

 /* device request (setup) */
-struct devrequest {
+struct devrequest
+{
    uint8_t	requesttype;
    uint8_t	request;
    uint16_t	value;
@@ -91,13 +86,15 @@ struct devrequest {
 } __attribute__ ((packed));

 /* All standard descriptors have these 2 fields in common */
-struct usb_descriptor_header {
+struct usb_descriptor_header
+{
    uint8_t	bLength;
    uint8_t	bDescriptorType;
 } __attribute__ ((packed));

 /* Device descriptor */
-struct usb_device_descriptor {
+struct usb_device_descriptor
+{
    uint8_t	bLength;
    uint8_t	bDescriptorType;
    uint16_t bcdUSB;
@@ -115,7 +112,8 @@ struct usb_device_descriptor {
 } __attribute__ ((packed));

 /* Endpoint descriptor */
-struct usb_endpoint_descriptor {
+struct usb_endpoint_descriptor
+{
    uint8_t	bLength;
    uint8_t	bDescriptorType;
    uint8_t	bEndpointAddress;
@@ -127,7 +125,8 @@ struct usb_endpoint_descriptor {
 } __attribute__ ((packed)) __attribute__ ((aligned(2)));

 /* Interface descriptor */
-struct usb_interface_descriptor {
+struct usb_interface_descriptor
+{
    uint8_t	bLength;
    uint8_t	bDescriptorType;
    uint8_t	bInterfaceNumber;
@@ -147,7 +146,8 @@ struct usb_interface_descriptor {


 /* Configuration descriptor information.. */
-struct usb_config_descriptor {
+struct usb_config_descriptor
+{
    uint8_t	bLength;
    uint8_t	bDescriptorType;
    uint16_t	wTotalLength;
@@ -161,7 +161,8 @@ struct usb_config_descriptor {
    struct usb_interface_descriptor if_desc[USB_MAXINTERFACES];
 } __attribute__ ((packed));

-enum {
+enum
+{
    /* Maximum packet size; encoded as 0,1,2,3 = 8,16,32,64 */
    PACKET_SIZE_8   = 0,
    PACKET_SIZE_16  = 1,
@@ -169,7 +170,8 @@ enum {
    PACKET_SIZE_64  = 3,
 };

-struct usb_device {
+struct usb_device
+{
    int	devnum;             /* Device number on USB bus */
    int	speed;              /* full/low/high */
    char mf[32];			/* manufacturer */
@@ -178,8 +180,10 @@ struct usb_device {

    /* Maximum packet size; one of: PACKET_SIZE_* */
    int maxpacketsize;
+
    /* one bit for each endpoint ([0] = IN, [1] = OUT) */
    unsigned int toggle[2];
+
    /* endpoint halts; one bit per endpoint # & direction;
     * [0] = IN, [1] = OUT
     */
@@ -197,6 +201,7 @@ struct usb_device {
    uint32_t irq_status;
    int irq_act_len;            /* transfered bytes */
    void *privptr;
+
    /*
     * Child devices -  if this is a hub device
     * Each instance needs its own set of data structures.
@@ -225,71 +230,66 @@ typedef struct
    } v;
 } USB_COOKIE;

-/**********************************************************************
+/*
 * this is how the lowlevel part communicate with the outer world
 */

-int ohci_usb_lowlevel_init(int32_t handle, const struct pci_device_id *ent, void **priv);
-int ohci_usb_lowlevel_stop(void *priv);
-int ohci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
-int ohci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
-int ohci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
-void ohci_usb_enable_interrupt(int enable);
+extern int ohci_usb_lowlevel_init(int32_t handle, const struct pci_device_id *ent, void **priv);
+extern int ohci_usb_lowlevel_stop(void *priv);
+extern int ohci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
+extern int ohci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
+extern int ohci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
+extern void ohci_usb_enable_interrupt(int enable);

-int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv);
-int ehci_usb_lowlevel_stop(void *priv);
-int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
-int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
-int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
-void ehci_usb_enable_interrupt(int enable);
+extern int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv);
+extern int ehci_usb_lowlevel_stop(void *priv);
+extern int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len);
+extern int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup);
+extern int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
+extern void ehci_usb_enable_interrupt(int enable);

-void usb_enable_interrupt(int enable);
+extern void usb_enable_interrupt(int enable);
+
+extern int usb_new_device(struct usb_device *dev);
+extern struct usb_device *usb_alloc_new_device(int bus_index, void *priv);
+extern void usb_disconnect(struct usb_device **pdev);

 #define USB_MAX_STOR_DEV 5
-block_dev_desc_t *usb_stor_get_dev(int index);
-int usb_stor_scan(void);
-int usb_stor_info(void);
-int usb_stor_register(struct usb_device *dev);
-int usb_stor_deregister(struct usb_device *dev);

-int drv_usb_kbd_init(void);
-int usb_kbd_register(struct usb_device *dev);
-int usb_kbd_deregister(struct usb_device *dev);
+extern block_dev_desc_t *usb_stor_get_dev(int index);
+extern int usb_stor_scan(void);
+extern int usb_stor_info(void);
+extern int usb_stor_register(struct usb_device *dev);
+extern int usb_stor_deregister(struct usb_device *dev);

-int drv_usb_mouse_init(void);
-int usb_mouse_register(struct usb_device *dev);
-int usb_mouse_deregister(struct usb_device *dev);
+extern int drv_usb_kbd_init(void);
+extern int usb_kbd_register(struct usb_device *dev);
+extern int usb_kbd_deregister(struct usb_device *dev);

-extern char usb_error_str[256];
-
-/* memory */
-void *usb_malloc(long amount);
-int usb_free(void *addr);
-int usb_mem_init(void);
-void usb_mem_stop(void);
+extern int drv_usb_mouse_init(void);
+extern int usb_mouse_register(struct usb_device *dev);
+extern int usb_mouse_deregister(struct usb_device *dev);

 /* routines */
-USB_COOKIE *usb_get_cookie(long id);
-void usb_error_msg(const char *const fmt, ... );
-int usb_init(int32_t handle, const struct pci_device_id *ent); /* initialize the USB Controller */
-int usb_stop(void); /* stop the USB Controller */
+extern int usb_init(int32_t handle, const struct pci_device_id *ent); /* initialize the USB Controller */
+extern int usb_stop(void); /* stop the USB Controller */

-int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol);
-int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id);
-struct usb_device *usb_get_dev_index(int index, int bus);
-int usb_control_msg(struct usb_device *dev, unsigned int pipe, uint8_t request, uint8_t requesttype, uint16_t value, 
- uint16_t index, void *data, uint16_t size, int timeout);
-int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout);
-int usb_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
-void usb_disable_asynch(int disable);
-int usb_maxpacket(struct usb_device *dev, uint32_t pipe);
-void wait_ms(uint32_t ms);
-int usb_get_configuration_no(struct usb_device *dev, uint8_t *buffer, int cfgno);
-int usb_get_report(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
-int usb_get_class_descriptor(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
-int usb_clear_halt(struct usb_device *dev, int pipe);
-int usb_string(struct usb_device *dev, int index, char *buf, size_t size);
-int usb_set_interface(struct usb_device *dev, int interface, int alternate);
+extern int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol);
+extern int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id);
+extern struct usb_device *usb_get_dev_index(int index, int bus);
+extern int usb_control_msg(struct usb_device *dev, unsigned int pipe, uint8_t request, uint8_t requesttype,
+                           uint16_t value, uint16_t index, void *data, uint16_t size, int timeout);
+extern int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout);
+extern int usb_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval);
+extern void usb_disable_asynch(int disable);
+extern int usb_maxpacket(struct usb_device *dev, uint32_t pipe);
+
+extern int usb_get_configuration_no(struct usb_device *dev, uint8_t *buffer, int cfgno);
+extern int usb_get_report(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
+extern int usb_get_class_descriptor(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size);
+extern int usb_clear_halt(struct usb_device *dev, int pipe);
+extern int usb_string(struct usb_device *dev, int index, char *buf, size_t size);
+extern int usb_set_interface(struct usb_device *dev, int interface, int alternate);

 /*
 * Calling this entity a "pipe" is glorifying it. A USB pipe
@@ -325,6 +325,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
 * specification, so that much of the uhci driver can just mask the bits
 * appropriately.
 */
+
 /* Create various pipes... */
 #define create_pipe(dev, endpoint) \
        (((dev)->devnum << 8) | (endpoint << 15) | \
@@ -391,19 +392,22 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
 /*************************************************************************
 * Hub Stuff
 */
-struct usb_port_status {
+struct usb_port_status
+{
    uint16_t wPortStatus;
    uint16_t wPortChange;
 } __attribute__ ((packed));

-struct usb_hub_status {
+struct usb_hub_status
+{
    uint16_t wHubStatus;
    uint16_t wHubChange;
 } __attribute__ ((packed));


 /* Hub descriptor */
-struct usb_hub_descriptor {
+struct usb_hub_descriptor
+{
    uint8_t  bLength;
    uint8_t  bDescriptorType;
    uint8_t  bNbrPorts;
@@ -417,7 +421,8 @@ struct usb_hub_descriptor {
 } __attribute__ ((packed));


-struct usb_hub_device {
+struct usb_hub_device
+{
    struct usb_device *pusb_dev;
    struct usb_hub_descriptor desc;
 };
--- a/include/usb_hub.h
+++ b/include/usb_hub.h
@@ -0,0 +1,10 @@
+#ifndef USB_HUB_H
+#define USB_HUB_H
+
+extern int bus_index;
+
+extern void usb_hub_reset(int bus_index);
+extern int usb_hub_probe(struct usb_device *dev, int ifnum);
+extern int hub_port_reset(struct usb_device *dev, int port, unsigned short *portstat);
+
+#endif // USB_HUB_H
--- a/include/util.h
+++ b/include/util.h
@@ -25,7 +25,7 @@
 #ifndef UTIL_H_
 #define UTIL_H_

-#include <stdint.h>
+#include <bas_types.h>

 #define NOP() __asm__ __volatile__("nop\n\t" : : : "memory")

--- a/include/version.h
+++ b/include/version.h
@@ -29,7 +29,7 @@
 */

 #define MAJOR_VERSION	0
-#define MINOR_VERSION	84
+#define MINOR_VERSION	88


 #endif /* VERSION_H_ */
--- a/include/videl.h
+++ b/include/videl.h
@@ -83,8 +83,8 @@ extern int16_t vsetmode(int16_t mode);
 extern int16_t vmontype(void);
 extern int16_t vsetsync(int16_t external);
 extern int32_t vgetsize(int16_t mode);
-extern int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb);
-extern int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb);
+extern int16_t vsetrgb(int16_t index,int16_t count, uint32_t *rgb);
+extern int16_t vgetrgb(int16_t index,int16_t count, uint32_t *rgb);

 /* misc routines */
 extern int16_t get_videl_mode(void);
--- a/include/video.h
+++ b/include/video.h
@@ -1,9 +1,7 @@
 #ifndef _VIDEO_H_
 #define _VIDEO_H_

-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
+#include <bas_types.h>
 #include "bas_printf.h"

 extern void video_init(void);
--- a/include/wait.h
+++ b/include/wait.h
@@ -44,6 +44,13 @@
 typedef bool (*checker_func)(void);

 extern void wait(uint32_t);
+extern void wait_us(uint32_t);  /* this is just an alias to the above */
+
+inline static void udelay(long us)
+{
+    wait((uint32_t) us);
+}
+
 extern bool waitfor(uint32_t us, checker_func condition);
 extern uint32_t get_timer(void);
 extern void wait_ms(uint32_t ms);
--- a/include/x86debug.h
+++ b/include/x86debug.h
@@ -1,241 +0,0 @@
-/****************************************************************************
-*
-*						Realmode X86 Emulator Library
-*
-*            	Copyright (C) 1996-1999 SciTech Software, Inc.
-* 				     Copyright (C) David Mosberger-Tang
-* 					   Copyright (C) 1999 Egbert Eich
-*
-*  ========================================================================
-*
-*  Permission to use, copy, modify, distribute, and sell this software and
-*  its documentation for any purpose is hereby granted without fee,
-*  provided that the above copyright notice appear in all copies and that
-*  both that copyright notice and this permission notice appear in
-*  supporting documentation, and that the name of the authors not be used
-*  in advertising or publicity pertaining to distribution of the software
-*  without specific, written prior permission.  The authors makes no
-*  representations about the suitability of this software for any purpose.
-*  It is provided "as is" without express or implied warranty.
-*
-*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-*  PERFORMANCE OF THIS SOFTWARE.
-*
-*  ========================================================================
-*
-* Language:		ANSI C
-* Environment:	Any
-* Developer:    Kendall Bennett
-*
-* Description:  Header file for debug definitions.
-*
-****************************************************************************/
-/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/debug.h,v 1.4 2000/11/21 23:10:27 tsi Exp $ */
-
-#include <stdint.h>
-#include "bas_printf.h"
-
-/*
- * for the X86 emulator, debug cannot be enabled and disabled on a per-file mode
- * as with all the other modules. It must be centrally enabled here.
- */
-
-#define DBG_X86EMU
-
-#ifdef DBG_X86EMU
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
-#else
-#define dbg(format, arg...) do { ; } while (0)
-#endif /* DBG_X86EMU */
-
-#ifndef __X86EMU_DEBUG_H
-#define __X86EMU_DEBUG_H
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-/* checks to be enabled for "runtime" */
-
-#define CHECK_IP_FETCH_F                0x1
-#define CHECK_SP_ACCESS_F               0x2
-#define CHECK_MEM_ACCESS_F              0x4 /*using regular linear pointer */
-#define CHECK_DATA_ACCESS_F             0x8 /*using segment:offset*/
-
-#ifdef DBG_X86EMU
-# define CHECK_IP_FETCH()              	(M.x86.check & CHECK_IP_FETCH_F)
-# define CHECK_SP_ACCESS()             	(M.x86.check & CHECK_SP_ACCESS_F)
-# define CHECK_MEM_ACCESS()            	(M.x86.check & CHECK_MEM_ACCESS_F)
-# define CHECK_DATA_ACCESS()           	(M.x86.check & CHECK_DATA_ACCESS_F)
-#else
-# define CHECK_IP_FETCH()
-# define CHECK_SP_ACCESS()
-# define CHECK_MEM_ACCESS()
-# define CHECK_DATA_ACCESS()
-#endif
-
-#ifdef DBG_X86EMU
-# define DEBUG_INSTRUMENT()    	(M.x86.debug & DEBUG_INSTRUMENT_F)
-# define DEBUG_DECODE()        	(M.x86.debug & DEBUG_DECODE_F)
-# define DEBUG_TRACE()         	(M.x86.debug & DEBUG_TRACE_F)
-# define DEBUG_STEP()          	(M.x86.debug & DEBUG_STEP_F)
-# define DEBUG_DISASSEMBLE()   	(M.x86.debug & DEBUG_DISASSEMBLE_F)
-# define DEBUG_BREAK()         	(M.x86.debug & DEBUG_BREAK_F)
-# define DEBUG_SVC()           	(M.x86.debug & DEBUG_SVC_F)
-# define DEBUG_SAVE_IP_CS()     (M.x86.debug & DEBUG_SAVE_IP_CS_F)
-
-# define DEBUG_FS()            	(M.x86.debug & DEBUG_FS_F)
-# define DEBUG_PROC()          	(M.x86.debug & DEBUG_PROC_F)
-# define DEBUG_SYSINT()        	(M.x86.debug & DEBUG_SYSINT_F)
-# define DEBUG_TRACECALL()     	(M.x86.debug & DEBUG_TRACECALL_F)
-# define DEBUG_TRACECALLREGS() 	(M.x86.debug & DEBUG_TRACECALL_REGS_F)
-# define DEBUG_SYS()           	(M.x86.debug & DEBUG_SYS_F)
-# define DEBUG_MEM_TRACE()     	(M.x86.debug & DEBUG_MEM_TRACE_F)
-# define DEBUG_IO_TRACE()      	(M.x86.debug & DEBUG_IO_TRACE_F)
-# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
-#else
-# define DEBUG_INSTRUMENT()    	0
-# define DEBUG_DECODE()        	0
-# define DEBUG_TRACE()         	0
-# define DEBUG_STEP()          	0
-# define DEBUG_DISASSEMBLE()   	0
-# define DEBUG_BREAK()         	0
-# define DEBUG_SVC()           	0
-# define DEBUG_SAVE_IP_CS()     0
-# define DEBUG_FS()            	0
-# define DEBUG_PROC()          	0
-# define DEBUG_SYSINT()        	0
-# define DEBUG_TRACECALL()     	0
-# define DEBUG_TRACECALLREGS() 	0
-# define DEBUG_SYS()           	0
-# define DEBUG_MEM_TRACE()     	0
-# define DEBUG_IO_TRACE()      	0
-# define DEBUG_DECODE_NOPRINT() 0
-#endif
-
-#ifdef DBG_X86EMU
-
-# define DECODE_PRINTF(x)     	if (DEBUG_DECODE()) \
-									x86emu_decode_printf(x)
-# define DECODE_PRINTF2(x,y)  	if (DEBUG_DECODE()) \
-									x86emu_decode_printf2(x,y)
-
-/*
- * The following allow us to look at the bytes of an instruction.  The
- * first INCR_INSTRN_LEN, is called everytime bytes are consumed in
- * the decoding process.  The SAVE_IP_CS is called initially when the
- * major opcode of the instruction is accessed.
- */
-#define INC_DECODED_INST_LEN(x)                    	\
-	if (DEBUG_DECODE())  	                       	\
-		x86emu_inc_decoded_inst_len(x)
-
-#define SAVE_IP_CS(x,y)                               			\
-	if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \
-              | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
-		M.x86.saved_cs = x;                          			\
-		M.x86.saved_ip = y;                          			\
-	}
-#else
-# define INC_DECODED_INST_LEN(x)
-# define DECODE_PRINTF(x)
-# define DECODE_PRINTF2(x,y)
-# define SAVE_IP_CS(x,y)
-#endif
-
-#ifdef DBG_X86EMU
-#define TRACE_REGS()                                   		\
-	if (DEBUG_DISASSEMBLE()) {                         		\
-		x86emu_just_disassemble();                        	\
-		goto EndOfTheInstructionProcedure;             		\
-	}                                                   	\
-	if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs()
-#else
-# define TRACE_REGS()
-#endif
-
-#ifdef DBG_X86EMU
-# define SINGLE_STEP()		if (DEBUG_STEP()) x86emu_single_step()
-#else
-# define SINGLE_STEP()
-#endif
-
-#define TRACE_AND_STEP()	\
-	TRACE_REGS();			\
-	SINGLE_STEP()
-
-#ifdef DBG_X86EMU
-# define START_OF_INSTR()
-# define END_OF_INSTR()		EndOfTheInstructionProcedure: x86emu_end_instr();
-# define END_OF_INSTR_NO_TRACE()	x86emu_end_instr();
-#else
-# define START_OF_INSTR()
-# define END_OF_INSTR()
-# define END_OF_INSTR_NO_TRACE()
-#endif
-
-#ifdef DBG_X86EMU
-# define  CALL_TRACE(u,v,w,x,s)		\
-	if (DEBUG_TRACECALLREGS())		\
-		x86emu_dump_regs();         \
-	if (DEBUG_TRACECALL()) {        \
-		xprintf("%x", u);           \
-		xprintf(":%x", v);			\
-		xprintf(": CALL ");			\
-		xprintf("%x", s); 			\
-		xprintf(" %x", w);			\
-		xprintf(":%x", x);			\
-		xprintf("%s", "\r\n");		\
-	}
-
-# define RETURN_TRACE(n,u,v)		\
-	if (DEBUG_TRACECALLREGS())		\
-		x86emu_dump_regs();			\
-	if (DEBUG_TRACECALL())			\
-	{								\
-		xprintf("%x", (unsigned long)u);	\
-		xprintf(":%x", (unsigned long)v);	\
-		xprintf(": CALL ");			\
-		xprintf("%x", n);			\
-		xprintf("\r\n");			\
-	}
-#else
-# define CALL_TRACE(u,v,w,x,s)
-# define RETURN_TRACE(n,u,v)
-#endif
-
-#ifdef DBG_X86EMU
-#define	DB(x)	x
-#else
-#define	DB(x)
-#endif
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-#ifdef  __cplusplus
-extern "C" {            			/* Use "C" linkage when in C++ mode */
-#endif
-
-extern void x86emu_inc_decoded_inst_len (int x);
-extern void x86emu_decode_printf (char *x);
-extern void x86emu_decode_printf2 (char *x, int y);
-extern void x86emu_just_disassemble (void);
-extern void x86emu_single_step (void);
-extern void x86emu_end_instr (void);
-extern void x86emu_dump_regs (void);
-extern void x86emu_dump_xregs (void);
-extern void x86emu_print_int_vect (uint16_t iv);
-extern void x86emu_instrument_instruction (void);
-extern void x86emu_check_ip_access (void);
-extern void x86emu_check_sp_access (void);
-extern void x86emu_check_mem_access (uint32_t p);
-extern void x86emu_check_data_access (unsigned int s, unsigned int o);
-
-#ifdef  __cplusplus
-}                       			/* End of "C" linkage for C++   	*/
-#endif
-
-#endif /* __X86EMU_DEBUG_H */
--- a/include/x86decode.h
+++ b/include/x86decode.h
@@ -1,89 +0,0 @@
-/****************************************************************************
-*
-*						Realmode X86 Emulator Library
-*
-*            	Copyright (C) 1996-1999 SciTech Software, Inc.
-* 				     Copyright (C) David Mosberger-Tang
-* 					   Copyright (C) 1999 Egbert Eich
-*
-*  ========================================================================
-*
-*  Permission to use, copy, modify, distribute, and sell this software and
-*  its documentation for any purpose is hereby granted without fee,
-*  provided that the above copyright notice appear in all copies and that
-*  both that copyright notice and this permission notice appear in
-*  supporting documentation, and that the name of the authors not be used
-*  in advertising or publicity pertaining to distribution of the software
-*  without specific, written prior permission.  The authors makes no
-*  representations about the suitability of this software for any purpose.
-*  It is provided "as is" without express or implied warranty.
-*
-*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-*  PERFORMANCE OF THIS SOFTWARE.
-*
-*  ========================================================================
-*
-* Language:		ANSI C
-* Environment:	Any
-* Developer:    Kendall Bennett
-*
-* Description:  Header file for instruction decoding logic.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_DECODE_H
-#define __X86EMU_DECODE_H
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-/* Instruction Decoding Stuff */
-
-#define FETCH_DECODE_MODRM(mod,rh,rl) 	fetch_decode_modrm(&mod,&rh,&rl)
-#define DECODE_RM_BYTE_REGISTER(r)    	decode_rm_byte_register(r)
-#define DECODE_RM_WORD_REGISTER(r)    	decode_rm_word_register(r)
-#define DECODE_RM_LONG_REGISTER(r)    	decode_rm_long_register(r)
-#define DECODE_CLEAR_SEGOVR()         	M.x86.mode &= ~SYSMODE_CLRMASK
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-#include "bas_types.h"
-
-#ifdef  __cplusplus
-extern "C" {            			/* Use "C" linkage when in C++ mode */
-#endif
-
-void x86emu_intr_raise(uint8_t type);
-void fetch_decode_modrm(int *mod, int *regh, int *regl);
-uint8_t fetch_byte_imm(void);
-uint16_t fetch_word_imm(void);
-uint32_t fetch_long_imm(void);
-uint8_t fetch_data_byte(unsigned int offset);
-uint8_t fetch_data_byte_abs(unsigned int segment, unsigned int offset);
-uint16_t fetch_data_word(unsigned int offset);
-uint16_t fetch_data_word_abs(unsigned int segment, unsigned int offset);
-uint32_t fetch_data_long(unsigned int offset);
-uint32_t fetch_data_long_abs(unsigned int segment, unsigned int offset);
-void store_data_byte(unsigned int offset, uint8_t val);
-void store_data_byte_abs(unsigned int segment, unsigned int offset, uint8_t val);
-void store_data_word(unsigned int offset, uint16_t val);
-void store_data_word_abs(unsigned int segment, unsigned int offset, uint16_t val);
-void store_data_long(unsigned int offset, uint32_t val);
-void store_data_long_abs(unsigned int segment, unsigned int offset, uint32_t val);
-uint8_t *decode_rm_byte_register(int reg);
-uint16_t *decode_rm_word_register(int reg);
-uint32_t *decode_rm_long_register(int reg);
-uint16_t *decode_rm_seg_register(int reg);
-unsigned decode_rm00_address(int rm);
-unsigned decode_rm01_address(int rm);
-unsigned decode_rm10_address(int rm);
-
-#ifdef  __cplusplus
-}                       			/* End of "C" linkage for C++   	*/
-#endif
-
-#endif /* __X86EMU_DECODE_H */
--- a/include/x86emu.h
+++ b/include/x86emu.h
@@ -1,3 +1,5 @@
+/*	$NetBSD: x86emu.h,v 1.1 2007/12/01 20:14:10 joerg Exp $	*/
+
 /****************************************************************************
 *
 *  Realmode X86 Emulator Library
@@ -5,6 +7,7 @@
 *  Copyright (C) 1996-1999 SciTech Software, Inc.
 *  Copyright (C) David Mosberger-Tang
 *  Copyright (C) 1999 Egbert Eich
+*  Copyright (C) 2007 Joerg Sonnenberger
 *
 *  ========================================================================
 *
@@ -26,167 +29,130 @@
 *  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
 *  PERFORMANCE OF THIS SOFTWARE.
 *
- *  ========================================================================
- *
- * Language:		ANSI C
- * Environment:	Any
- * Developer:    Kendall Bennett
- *
- * Description:  Header file for public specific functions.
- *               Any application linking against us should only
- *               include this header
- *
 ****************************************************************************/
-/* $XFree86: xc/extras/x86emu/include/x86emu.h,v 1.2 2000/11/21 23:10:25 tsi Exp $ */

 #ifndef __X86EMU_X86EMU_H
 #define __X86EMU_X86EMU_H

 #include "bas_types.h"
-#define	X86API
-#define	X86APIP	*
-#include "x86regs.h"
+#include "setjmp.h"

-typedef uint16_t X86EMU_pioAddr;
+/*
+ * General EAX, EBX, ECX, EDX type registers.  Note that for
+ * portability, and speed, the issue of byte swapping is not addressed
+ * in the registers.  All registers are stored in the default format
+ * available on the host machine.  The only critical issue is that the
+ * registers should line up EXACTLY in the same manner as they do in
+ * the 386.  That is:
+ *
+ * EAX & 0xff  === AL
+ * EAX & 0xffff == AX
+ *
+ * etc.  The result is that alot of the calculations can then be
+ * done using the native instruction set fully.
+ */

-/*---------------------- Macros and type definitions ----------------------*/

-//#pragma	pack(1)
+struct X86EMU_register32 {
+	uint32_t e_reg;
+};

-/****************************************************************************
-REMARKS:
-Data structure containing ponters to programmed I/O functions used by the
-emulator. This is used so that the user program can hook all programmed
-I/O for the emulator to handled as necessary by the user program. By
-default the emulator contains simple functions that do not do access the
-hardware in any way. To allow the emualtor access the hardware, you will
-need to override the programmed I/O functions using the X86EMU_setupPioFuncs
-function.
+struct X86EMU_register16 {
+	uint16_t filler0;
+	uint16_t x_reg;
+};

-HEADER:
-x86emu.h
+struct X86EMU_register8 {
+	uint8_t filler0, filler1;
+	uint8_t h_reg, l_reg;
+};

-MEMBERS:
-inb		- Function to read a byte from an I/O port
-inw		- Function to read a word from an I/O port
-inl     - Function to read a dword from an I/O port
-outb	- Function to write a byte to an I/O port
-outw    - Function to write a word to an I/O port
-outl    - Function to write a dword to an I/O port
- ****************************************************************************/
-typedef struct
+
+union X86EMU_register {
+	struct X86EMU_register32	I32_reg;
+	struct X86EMU_register16	I16_reg;
+	struct X86EMU_register8		I8_reg;
+};
+
+struct X86EMU_regs {
+	uint16_t		register_cs;
+	uint16_t		register_ds;
+	uint16_t		register_es;
+	uint16_t		register_fs;
+	uint16_t		register_gs;
+	uint16_t		register_ss;
+	uint32_t		register_flags;
+	union X86EMU_register	register_a;
+	union X86EMU_register	register_b;
+	union X86EMU_register	register_c;
+	union X86EMU_register	register_d;
+
+	union X86EMU_register	register_sp;
+	union X86EMU_register	register_bp;
+	union X86EMU_register	register_si;
+	union X86EMU_register	register_di;
+	union X86EMU_register	register_ip;
+
+	/*
+	 * MODE contains information on:
+	 *  REPE prefix             2 bits  repe,repne
+	 *  SEGMENT overrides       5 bits  normal,DS,SS,CS,ES
+	 *  Delayed flag set        3 bits  (zero, signed, parity)
+	 *  reserved                6 bits
+	 *  interrupt #             8 bits  instruction raised interrupt
+	 *  BIOS video segregs      4 bits  
+	 *  Interrupt Pending       1 bits  
+	 *  Extern interrupt        1 bits
+	 *  Halted                  1 bits
+	 */
+	uint32_t		mode;
+    volatile int	intr;   /* mask of pending interrupts */
+	uint8_t			intno;
+	uint8_t			__pad[3];
+};
+
+struct X86EMU
 {
-	uint8_t  	(X86APIP inb)(X86EMU_pioAddr addr);
-	uint16_t 	(X86APIP inw)(X86EMU_pioAddr addr);
-	uint32_t 	(X86APIP inl)(X86EMU_pioAddr addr);
-	void 	(X86APIP outb)(X86EMU_pioAddr addr, uint8_t val);
-	void 	(X86APIP outw)(X86EMU_pioAddr addr, uint16_t val);
-	void 	(X86APIP outl)(X86EMU_pioAddr addr, uint32_t val);
-} X86EMU_pioFuncs;
+    char            *mem_base;
+    size_t          mem_size;
+    void            *sys_private;
+    struct          X86EMU_regs	x86;

-/****************************************************************************
-REMARKS:
-Data structure containing ponters to memory access functions used by the
-emulator. This is used so that the user program can hook all memory
-access functions as necessary for the emulator. By default the emulator
-contains simple functions that only access the internal memory of the
-emulator. If you need specialised functions to handle access to different
-types of memory (ie: hardware framebuffer accesses and BIOS memory access
-etc), you will need to override this using the X86EMU_setupMemFuncs
-function.
+    jmp_buf         exec_state;

-HEADER:
-x86emu.h
+    uint64_t        cur_cycles;

-MEMBERS:
-rdb		- Function to read a byte from an address
-rdw		- Function to read a word from an address
-rdl     - Function to read a dword from an address
-wrb		- Function to write a byte to an address
-wrw    	- Function to write a word to an address
-wrl    	- Function to write a dword to an address
- ****************************************************************************/
-typedef struct {
-	uint8_t  	(X86APIP rdb)(uint32_t addr);
-	uint16_t 	(X86APIP rdw)(uint32_t addr);
-	uint32_t 	(X86APIP rdl)(uint32_t addr);
-	void 	(X86APIP wrb)(uint32_t addr, uint8_t val);
-	void 	(X86APIP wrw)(uint32_t addr, uint16_t val);
-	void	(X86APIP wrl)(uint32_t addr, uint32_t val);
-} X86EMU_memFuncs;
+	unsigned int	cur_mod:2;
+	unsigned int	cur_rl:3;
+	unsigned int	cur_rh:3;
+    uint32_t        cur_offset;

-/****************************************************************************
-  Here are the default memory read and write
-  function in case they are needed as fallbacks.
- ***************************************************************************/
-extern uint8_t X86API rdb(uint32_t addr);
-extern uint16_t X86API rdw(uint32_t addr);
-extern uint32_t X86API rdl(uint32_t addr);
-extern void X86API wrb(uint32_t addr, uint8_t val);
-extern void X86API wrw(uint32_t addr, uint16_t val);
-extern void X86API wrl(uint32_t addr, uint32_t val);
+    uint8_t         (*emu_rdb)(struct X86EMU *, uint32_t addr);
+    uint16_t        (*emu_rdw)(struct X86EMU *, uint32_t addr);
+    uint32_t        (*emu_rdl)(struct X86EMU *, uint32_t addr);
+    void            (*emu_wrb)(struct X86EMU *, uint32_t addr,uint8_t val);
+    void            (*emu_wrw)(struct X86EMU *, uint32_t addr, uint16_t val);
+    void            (*emu_wrl)(struct X86EMU *, uint32_t addr, uint32_t val);

-//#pragma	pack()
+    uint8_t         (*emu_inb)(struct X86EMU *, uint16_t addr);
+    uint16_t        (*emu_inw)(struct X86EMU *, uint16_t addr);
+    uint32_t        (*emu_inl)(struct X86EMU *, uint16_t addr);
+    void            (*emu_outb)(struct X86EMU *, uint16_t addr, uint8_t val);
+    void            (*emu_outw)(struct X86EMU *, uint16_t addr, uint16_t val);
+    void            (*emu_outl)(struct X86EMU *, uint16_t addr, uint32_t val);

-/*--------------------- type definitions -----------------------------------*/
+    void            (*_X86EMU_intrTab[256])(struct X86EMU *, int);
+};

-typedef void (X86APIP X86EMU_intrFuncs)(int num);
-extern X86EMU_intrFuncs _X86EMU_intrTab[256];

-/*-------------------------- Function Prototypes --------------------------*/
-
-#ifdef  __cplusplus
-extern "C" {            			/* Use "C" linkage when in C++ mode */
-#endif
-
-	void 	X86EMU_setupMemFuncs(X86EMU_memFuncs *funcs);
-	void 	X86EMU_setupPioFuncs(X86EMU_pioFuncs *funcs);
-	void 	X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
-	void 	X86EMU_prepareForInt(int num);
+void	X86EMU_init_default(struct X86EMU *);

 /* decode.c */

-	void 	X86EMU_exec(void);
-	void 	X86EMU_halt_sys(void);
+void 	X86EMU_exec(struct X86EMU *);
+void	X86EMU_exec_call(struct X86EMU *, uint16_t, uint16_t);
+void	X86EMU_exec_intr(struct X86EMU *, uint8_t);
+void 	X86EMU_halt_sys(struct X86EMU *);

-#ifdef	DBG_X86EMU
-#define	HALT_SYS() \
-	dbg("%s: halt_sys: file %s line %d\r\n", __FUNCTION__, __FILE__, __LINE__);\
-	X86EMU_halt_sys();
-#else
-#define	HALT_SYS()	X86EMU_halt_sys()
-#endif
-
-	/* Debug options */
-
-#define DEBUG_DECODE_F          0x000001 /* print decoded instruction  */
-#define DEBUG_TRACE_F           0x000002 /* dump regs before/after execution */
-#define DEBUG_STEP_F            0x000004
-#define DEBUG_DISASSEMBLE_F     0x000008
-#define DEBUG_BREAK_F           0x000010
-#define DEBUG_SVC_F             0x000020
-#define DEBUG_FS_F              0x000080
-#define DEBUG_PROC_F            0x000100
-#define DEBUG_SYSINT_F          0x000200 /* bios system interrupts. */
-#define DEBUG_TRACECALL_F       0x000400
-#define DEBUG_INSTRUMENT_F      0x000800
-#define DEBUG_MEM_TRACE_F       0x001000 
-#define DEBUG_IO_TRACE_F        0x002000 
-#define DEBUG_TRACECALL_REGS_F  0x004000
-#define DEBUG_DECODE_NOPRINT_F  0x008000 
-#define DEBUG_SAVE_IP_CS_F      0x010000
-#define DEBUG_SYS_F             (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
-
-	void 	X86EMU_trace_regs(void);
-	void 	X86EMU_trace_xregs(void);
-	void 	X86EMU_dump_memory(uint16_t seg, uint16_t off, uint32_t amt);
-	int 	X86EMU_trace_on(void);
-	int 	X86EMU_trace_off(void);
-	int		X86EMU_set_debug(int debug);
-	void	X86EMU_setMemBase(void *base, unsigned long size);
-
-#ifdef  __cplusplus
-}                       			/* End of "C" linkage for C++   	*/
-#endif

 #endif /* __X86EMU_X86EMU_H */
--- a/include/x86emu_regs.h
+++ b/include/x86emu_regs.h
@@ -0,0 +1,169 @@
+/*	$NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $	*/
+
+/****************************************************************************
+*
+*  Realmode X86 Emulator Library
+*
+*  Copyright (C) 1996-1999 SciTech Software, Inc.
+*  Copyright (C) David Mosberger-Tang
+*  Copyright (C) 1999 Egbert Eich
+*  Copyright (C) 2007 Joerg Sonnenberger
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_REGS_H
+#define __X86EMU_REGS_H
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+/* 8 bit registers */
+#define R_AH  register_a.I8_reg.h_reg
+#define R_AL  register_a.I8_reg.l_reg
+#define R_BH  register_b.I8_reg.h_reg
+#define R_BL  register_b.I8_reg.l_reg
+#define R_CH  register_c.I8_reg.h_reg
+#define R_CL  register_c.I8_reg.l_reg
+#define R_DH  register_d.I8_reg.h_reg
+#define R_DL  register_d.I8_reg.l_reg
+
+/* 16 bit registers */
+#define R_AX  register_a.I16_reg.x_reg
+#define R_BX  register_b.I16_reg.x_reg
+#define R_CX  register_c.I16_reg.x_reg
+#define R_DX  register_d.I16_reg.x_reg
+
+/* 32 bit extended registers */
+#define R_EAX  register_a.I32_reg.e_reg
+#define R_EBX  register_b.I32_reg.e_reg
+#define R_ECX  register_c.I32_reg.e_reg
+#define R_EDX  register_d.I32_reg.e_reg
+
+/* special registers */
+#define R_SP  register_sp.I16_reg.x_reg
+#define R_BP  register_bp.I16_reg.x_reg
+#define R_SI  register_si.I16_reg.x_reg
+#define R_DI  register_di.I16_reg.x_reg
+#define R_IP  register_ip.I16_reg.x_reg
+#define R_FLG register_flags
+
+/* special registers */
+#define R_ESP  register_sp.I32_reg.e_reg
+#define R_EBP  register_bp.I32_reg.e_reg
+#define R_ESI  register_si.I32_reg.e_reg
+#define R_EDI  register_di.I32_reg.e_reg
+#define R_EIP  register_ip.I32_reg.e_reg
+#define R_EFLG register_flags
+
+/* segment registers */
+#define R_CS  register_cs
+#define R_DS  register_ds
+#define R_SS  register_ss
+#define R_ES  register_es
+#define R_FS  register_fs
+#define R_GS  register_gs
+
+/* flag conditions   */
+#define FB_CF 0x0001            /* CARRY flag  */
+#define FB_PF 0x0004            /* PARITY flag */
+#define FB_AF 0x0010            /* AUX  flag   */
+#define FB_ZF 0x0040            /* ZERO flag   */
+#define FB_SF 0x0080            /* SIGN flag   */
+#define FB_TF 0x0100            /* TRAP flag   */
+#define FB_IF 0x0200            /* INTERRUPT ENABLE flag */
+#define FB_DF 0x0400            /* DIR flag    */
+#define FB_OF 0x0800            /* OVERFLOW flag */
+
+/* 80286 and above always have bit#1 set */
+#define F_ALWAYS_ON  (0x0002)   /* flag bits always on */
+
+/*
+ * Define a mask for only those flag bits we will ever pass back 
+ * (via PUSHF) 
+ */
+#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
+
+/* following bits masked in to a 16bit quantity */
+
+#define F_CF 0x0001             /* CARRY flag  */
+#define F_PF 0x0004             /* PARITY flag */
+#define F_AF 0x0010             /* AUX  flag   */
+#define F_ZF 0x0040             /* ZERO flag   */
+#define F_SF 0x0080             /* SIGN flag   */
+#define F_TF 0x0100             /* TRAP flag   */
+#define F_IF 0x0200             /* INTERRUPT ENABLE flag */
+#define F_DF 0x0400             /* DIR flag    */
+#define F_OF 0x0800             /* OVERFLOW flag */
+
+#define SET_FLAG(flag)        	(emu->x86.R_FLG |= (flag))
+#define CLEAR_FLAG(flag)      	(emu->x86.R_FLG &= ~(flag))
+#define ACCESS_FLAG(flag)     	(emu->x86.R_FLG & (flag))
+#define CLEARALL_FLAG(m)    	(emu->x86.R_FLG = 0)
+
+#define CONDITIONAL_SET_FLAG(COND,FLAG) \
+  if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
+
+#define F_PF_CALC 0x010000      /* PARITY flag has been calced    */
+#define F_ZF_CALC 0x020000      /* ZERO flag has been calced      */
+#define F_SF_CALC 0x040000      /* SIGN flag has been calced      */
+
+#define F_ALL_CALC      0xff0000        /* All have been calced   */
+
+/*
+ * Emulator machine state.
+ * Segment usage control.
+ */
+#define SYSMODE_SEG_DS_SS       0x00000001
+#define SYSMODE_SEGOVR_CS       0x00000002
+#define SYSMODE_SEGOVR_DS       0x00000004
+#define SYSMODE_SEGOVR_ES       0x00000008
+#define SYSMODE_SEGOVR_FS       0x00000010
+#define SYSMODE_SEGOVR_GS       0x00000020
+#define SYSMODE_SEGOVR_SS       0x00000040
+#define SYSMODE_PREFIX_REPE     0x00000080
+#define SYSMODE_PREFIX_REPNE    0x00000100
+#define SYSMODE_PREFIX_DATA     0x00000200
+#define SYSMODE_PREFIX_ADDR     0x00000400
+#define SYSMODE_INTR_PENDING    0x10000000
+#define SYSMODE_EXTRN_INTR      0x20000000
+#define SYSMODE_HALTED          0x40000000
+
+#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS      | \
+						 SYSMODE_SEGOVR_CS      | \
+						 SYSMODE_SEGOVR_DS      | \
+						 SYSMODE_SEGOVR_ES      | \
+						 SYSMODE_SEGOVR_FS      | \
+						 SYSMODE_SEGOVR_GS      | \
+						 SYSMODE_SEGOVR_SS)
+#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS      | \
+						 SYSMODE_SEGOVR_CS      | \
+						 SYSMODE_SEGOVR_DS      | \
+						 SYSMODE_SEGOVR_ES      | \
+						 SYSMODE_SEGOVR_FS      | \
+						 SYSMODE_SEGOVR_GS      | \
+						 SYSMODE_SEGOVR_SS      | \
+						 SYSMODE_PREFIX_DATA    | \
+						 SYSMODE_PREFIX_ADDR)
+
+#define  INTR_SYNCH           0x1
+
+#endif /* __X86EMU_REGS_H */
--- a/include/x86emui.h
+++ b/include/x86emui.h
@@ -1,99 +0,0 @@
-/****************************************************************************
-*
-*						Realmode X86 Emulator Library
-*
-*            	Copyright (C) 1996-1999 SciTech Software, Inc.
-* 				     Copyright (C) David Mosberger-Tang
-* 					   Copyright (C) 1999 Egbert Eich
-*
-*  ========================================================================
-*
-*  Permission to use, copy, modify, distribute, and sell this software and
-*  its documentation for any purpose is hereby granted without fee,
-*  provided that the above copyright notice appear in all copies and that
-*  both that copyright notice and this permission notice appear in
-*  supporting documentation, and that the name of the authors not be used
-*  in advertising or publicity pertaining to distribution of the software
-*  without specific, written prior permission.  The authors makes no
-*  representations about the suitability of this software for any purpose.
-*  It is provided "as is" without express or implied warranty.
-*
-*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-*  PERFORMANCE OF THIS SOFTWARE.
-*
-*  ========================================================================
-*
-* Language:		ANSI C
-* Environment:	Any
-* Developer:    Kendall Bennett
-*
-* Description:  Header file for system specific functions. These functions
-*				are always compiled and linked in the OS depedent libraries,
-*				and never in a binary portable driver.
-*
-****************************************************************************/
-
-/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/x86emui.h,v 1.4 2001/04/01 13:59:58 tsi Exp $ */
-
-#ifndef __X86EMU_X86EMUI_H
-#define __X86EMU_X86EMUI_H
-
-/*
- * If we are compiling in C++ mode, we can compile some functions as
- * inline to increase performance (however the code size increases quite
- * dramatically in this case).
- */
-
-#if	defined(__cplusplus) && !defined(_NO_INLINE)
-#define	_INLINE	inline
-#else
-#define	_INLINE static
-#endif
-
-/* Get rid of unused parameters in C++ compilation mode */
-
-#ifdef __cplusplus
-#define	X86EMU_UNUSED(v)
-#else
-#define	X86EMU_UNUSED(v)	v
-#endif
-
-#include "radeonfb.h"
-
-#include "x86emu.h"
-#include "x86regs.h"
-#include "x86decode.h"
-#include "x86ops.h"
-#include "x86prim_ops.h"
-#include "x86fpu.h"
-
-/*--------------------------- Inline Functions ----------------------------*/
-
-#ifdef  __cplusplus
-extern "C" {            			/* Use "C" linkage when in C++ mode */
-#endif
-
-extern uint8_t  	(X86APIP sys_rdb)(uint32_t addr);
-extern uint16_t 	(X86APIP sys_rdw)(uint32_t addr);
-extern uint32_t 	(X86APIP sys_rdl)(uint32_t addr);
-extern void (X86APIP sys_wrb)(uint32_t addr,uint8_t val);
-extern void (X86APIP sys_wrw)(uint32_t addr,uint16_t val);
-extern void (X86APIP sys_wrl)(uint32_t addr,uint32_t val);
-
-extern uint8_t  	(X86APIP sys_inb)(X86EMU_pioAddr addr);
-extern uint16_t 	(X86APIP sys_inw)(X86EMU_pioAddr addr);
-extern uint32_t 	(X86APIP sys_inl)(X86EMU_pioAddr addr);
-extern void (X86APIP sys_outb)(X86EMU_pioAddr addr,uint8_t val);
-extern void (X86APIP sys_outw)(X86EMU_pioAddr addr,uint16_t val);
-extern void	(X86APIP sys_outl)(X86EMU_pioAddr addr,uint32_t val);
-
-#ifdef  __cplusplus
-}                       			/* End of "C" linkage for C++   	*/
-#endif
-
-#endif /* __X86EMU_X86EMUI_H */
--- a/include/x86fpu.h
+++ b/include/x86fpu.h
@@ -1,61 +0,0 @@
-/****************************************************************************
-*
-*						Realmode X86 Emulator Library
-*
-*            	Copyright (C) 1996-1999 SciTech Software, Inc.
-* 				     Copyright (C) David Mosberger-Tang
-* 					   Copyright (C) 1999 Egbert Eich
-*
-*  ========================================================================
-*
-*  Permission to use, copy, modify, distribute, and sell this software and
-*  its documentation for any purpose is hereby granted without fee,
-*  provided that the above copyright notice appear in all copies and that
-*  both that copyright notice and this permission notice appear in
-*  supporting documentation, and that the name of the authors not be used
-*  in advertising or publicity pertaining to distribution of the software
-*  without specific, written prior permission.  The authors makes no
-*  representations about the suitability of this software for any purpose.
-*  It is provided "as is" without express or implied warranty.
-*
-*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-*  PERFORMANCE OF THIS SOFTWARE.
-*
-*  ========================================================================
-*
-* Language:		ANSI C
-* Environment:	Any
-* Developer:    Kendall Bennett
-*
-* Description:  Header file for FPU instruction decoding.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_FPU_H
-#define __X86EMU_FPU_H
-
-#ifdef  __cplusplus
-extern "C" {            			/* Use "C" linkage when in C++ mode */
-#endif
-
-/* these have to be defined, whether 8087 support compiled in or not. */
-
-extern void x86emuOp_esc_coprocess_d8 (uint8_t op1);
-extern void x86emuOp_esc_coprocess_d9 (uint8_t op1);
-extern void x86emuOp_esc_coprocess_da (uint8_t op1);
-extern void x86emuOp_esc_coprocess_db (uint8_t op1);
-extern void x86emuOp_esc_coprocess_dc (uint8_t op1);
-extern void x86emuOp_esc_coprocess_dd (uint8_t op1);
-extern void x86emuOp_esc_coprocess_de (uint8_t op1);
-extern void x86emuOp_esc_coprocess_df (uint8_t op1);
-
-#ifdef  __cplusplus
-}                       			/* End of "C" linkage for C++   	*/
-#endif
-
-#endif /* __X86EMU_FPU_H */
--- a/include/x86fpu_regs.h
+++ b/include/x86fpu_regs.h
@@ -1,116 +0,0 @@
-/****************************************************************************
-*
-*						Realmode X86 Emulator Library
-*
-*            	Copyright (C) 1996-1999 SciTech Software, Inc.
-* 				     Copyright (C) David Mosberger-Tang
-* 					   Copyright (C) 1999 Egbert Eich
-*
-*  ========================================================================
-*
-*  Permission to use, copy, modify, distribute, and sell this software and
-*  its documentation for any purpose is hereby granted without fee,
-*  provided that the above copyright notice appear in all copies and that
-*  both that copyright notice and this permission notice appear in
-*  supporting documentation, and that the name of the authors not be used
-*  in advertising or publicity pertaining to distribution of the software
-*  without specific, written prior permission.  The authors makes no
-*  representations about the suitability of this software for any purpose.
-*  It is provided "as is" without express or implied warranty.
-*
-*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-*  PERFORMANCE OF THIS SOFTWARE.
-*
-*  ========================================================================
-*
-* Language:		ANSI C
-* Environment:	Any
-* Developer:    Kendall Bennett
-*
-* Description:  Header file for FPU register definitions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_FPU_REGS_H
-#define __X86EMU_FPU_REGS_H
-
-#ifdef X86_FPU_SUPPORT
-
-#pragma	pack(1)
-
-/* Basic 8087 register can hold any of the following values: */
-
-union x86_fpu_reg_u {
-    s8                  tenbytes[10];
-    double              dval;
-    float               fval;
-    s16                 sval;
-    s32                 lval;
-	};
-
-struct x86_fpu_reg {
-	union x86_fpu_reg_u reg;
-	char                tag;
-	};
-
-/*
- * Since we are not going to worry about the problems of aliasing
- * registers, every time a register is modified, its result type is
- * set in the tag fields for that register.  If some operation
- * attempts to access the type in a way inconsistent with its current
- * storage format, then we flag the operation.  If common, we'll
- * attempt the conversion.
- */
-
-#define  X86_FPU_VALID          0x80
-#define  X86_FPU_REGTYP(r)      ((r) & 0x7F)
-
-#define  X86_FPU_WORD           0x0
-#define  X86_FPU_SHORT          0x1
-#define  X86_FPU_LONG           0x2
-#define  X86_FPU_FLOAT          0x3
-#define  X86_FPU_DOUBLE         0x4
-#define  X86_FPU_LDBL           0x5
-#define  X86_FPU_BSD            0x6
-
-#define  X86_FPU_STKTOP  0
-
-struct x86_fpu_registers
-{
-    struct x86_fpu_reg  x86_fpu_stack[8];
-    int                 x86_fpu_flags;
-    int                 x86_fpu_config;         /* rounding modes, etc. */
-    short               x86_fpu_tos, x86_fpu_bos;
-};
-
-#pragma	pack()
-
-/*
- * There are two versions of the following macro.
- *
- * One version is for opcode D9, for which there are more than 32
- * instructions encoded in the second byte of the opcode.
- *
- * The other version, deals with all the other 7 i87 opcodes, for
- * which there are only 32 strings needed to describe the
- * instructions.
- */
-
-#endif /* X86_FPU_SUPPORT */
-
-#ifdef DBG_X86EMU
-#define DECODE_PRINTINSTR32(t, mod, rh, rl)		\
-	DECODE_PRINTF(t[(mod << 3) + (rh)]);
-#define DECODE_PRINTINSTR256(t, mod, rh, rl)   	\
-	DECODE_PRINTF(t[(mod << 6) + (rh << 3) + (rl)]);
-#else
-#define DECODE_PRINTINSTR32(t,mod,rh,rl)
-#define DECODE_PRINTINSTR256(t,mod,rh,rl)
-#endif
-
-#endif /* __X86EMU_FPU_REGS_H */
--- a/include/x86ops.h
+++ b/include/x86ops.h
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-*						Realmode X86 Emulator Library
-*
-*            	Copyright (C) 1996-1999 SciTech Software, Inc.
-* 				     Copyright (C) David Mosberger-Tang
-* 					   Copyright (C) 1999 Egbert Eich
-*
-*  ========================================================================
-*
-*  Permission to use, copy, modify, distribute, and sell this software and
-*  its documentation for any purpose is hereby granted without fee,
-*  provided that the above copyright notice appear in all copies and that
-*  both that copyright notice and this permission notice appear in
-*  supporting documentation, and that the name of the authors not be used
-*  in advertising or publicity pertaining to distribution of the software
-*  without specific, written prior permission.  The authors makes no
-*  representations about the suitability of this software for any purpose.
-*  It is provided "as is" without express or implied warranty.
-*
-*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-*  PERFORMANCE OF THIS SOFTWARE.
-*
-*  ========================================================================
-*
-* Language:		ANSI C
-* Environment:	Any
-* Developer:    Kendall Bennett
-*
-* Description:  Header file for operand decoding functions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_OPS_H
-#define __X86EMU_OPS_H
-
-extern void (*x86emu_optab[0x100])(uint8_t op1);
-extern void (*x86emu_optab2[0x100])(uint8_t op2);
-
-#endif /* __X86EMU_OPS_H */
--- a/include/x86prim_asm.h
+++ b/include/x86prim_asm.h
@@ -1,971 +0,0 @@
-/****************************************************************************
-*
-*						Realmode X86 Emulator Library
-*
-*            	Copyright (C) 1996-1999 SciTech Software, Inc.
-* 				     Copyright (C) David Mosberger-Tang
-* 					   Copyright (C) 1999 Egbert Eich
-*
-*  ========================================================================
-*
-*  Permission to use, copy, modify, distribute, and sell this software and
-*  its documentation for any purpose is hereby granted without fee,
-*  provided that the above copyright notice appear in all copies and that
-*  both that copyright notice and this permission notice appear in
-*  supporting documentation, and that the name of the authors not be used
-*  in advertising or publicity pertaining to distribution of the software
-*  without specific, written prior permission.  The authors makes no
-*  representations about the suitability of this software for any purpose.
-*  It is provided "as is" without express or implied warranty.
-*
-*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-*  PERFORMANCE OF THIS SOFTWARE.
-*
-*  ========================================================================
-*
-* Language:		Watcom C++ 10.6 or later
-* Environment:	Any
-* Developer:    Kendall Bennett
-*
-* Description:  Inline assembler versions of the primitive operand
-*				functions for faster performance. At the moment this is
-*				x86 inline assembler, but these functions could be replaced
-*				with native inline assembler for each supported processor
-*				platform.
-*
-****************************************************************************/
-/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/prim_asm.h,v 1.3 2000/04/19 15:48:15 tsi Exp $ */
-
-#ifndef	__X86EMU_PRIM_ASM_H
-#define	__X86EMU_PRIM_ASM_H
-
-#ifdef	__WATCOMC__
-
-#ifndef	VALIDATE
-#define	__HAVE_INLINE_ASSEMBLER__
-#endif
-
-u32		get_flags_asm(void);
-#pragma aux get_flags_asm =			\
-	"pushf"                         \
-	"pop	eax"                  	\
-	value [eax]                     \
-	modify exact [eax];
-
-u16     aaa_word_asm(u32 *flags,u16 d);
-#pragma aux aaa_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"aaa"                  			\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] 				\
-	value [ax]                      \
-	modify exact [ax];
-
-u16     aas_word_asm(u32 *flags,u16 d);
-#pragma aux aas_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"aas"                  			\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] 				\
-	value [ax]                      \
-	modify exact [ax];
-
-u16     aad_word_asm(u32 *flags,u16 d);
-#pragma aux aad_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"aad"                  			\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] 				\
-	value [ax]                      \
-	modify exact [ax];
-
-u16     aam_word_asm(u32 *flags,u8 d);
-#pragma aux aam_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"aam"                  			\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] 				\
-	value [ax]                      \
-	modify exact [ax];
-
-u8      adc_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux adc_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"adc	al,bl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [bl]            \
-	value [al]                      \
-	modify exact [al bl];
-
-u16     adc_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux adc_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"adc	ax,bx"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [bx]            \
-	value [ax]                      \
-	modify exact [ax bx];
-
-u32     adc_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux adc_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"adc	eax,ebx"                \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [ebx]          \
-	value [eax]                     \
-	modify exact [eax ebx];
-
-u8      add_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux add_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"add	al,bl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [bl]            \
-	value [al]                      \
-	modify exact [al bl];
-
-u16     add_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux add_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"add	ax,bx"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [bx]            \
-	value [ax]                      \
-	modify exact [ax bx];
-
-u32     add_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux add_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"add	eax,ebx"                \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [ebx]          \
-	value [eax]                     \
-	modify exact [eax ebx];
-
-u8      and_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux and_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"and	al,bl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [bl]            \
-	value [al]                      \
-	modify exact [al bl];
-
-u16     and_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux and_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"and	ax,bx"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [bx]            \
-	value [ax]                      \
-	modify exact [ax bx];
-
-u32     and_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux and_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"and	eax,ebx"                \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [ebx]          \
-	value [eax]                     \
-	modify exact [eax ebx];
-
-u8      cmp_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux cmp_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"cmp	al,bl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [bl]            \
-	value [al]                      \
-	modify exact [al bl];
-
-u16     cmp_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux cmp_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"cmp	ax,bx"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [bx]            \
-	value [ax]                      \
-	modify exact [ax bx];
-
-u32     cmp_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux cmp_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"cmp	eax,ebx"                \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [ebx]          \
-	value [eax]                     \
-	modify exact [eax ebx];
-
-u8      daa_byte_asm(u32 *flags,u8 d);
-#pragma aux daa_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"daa"                  			\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al]            		\
-	value [al]                      \
-	modify exact [al];
-
-u8      das_byte_asm(u32 *flags,u8 d);
-#pragma aux das_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"das"                  			\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al]            		\
-	value [al]                      \
-	modify exact [al];
-
-u8      dec_byte_asm(u32 *flags,u8 d);
-#pragma aux dec_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"dec	al"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al]            		\
-	value [al]                      \
-	modify exact [al];
-
-u16     dec_word_asm(u32 *flags,u16 d);
-#pragma aux dec_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"dec	ax"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax]            		\
-	value [ax]                      \
-	modify exact [ax];
-
-u32     dec_long_asm(u32 *flags,u32 d);
-#pragma aux dec_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"dec	eax"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax]          		\
-	value [eax]                     \
-	modify exact [eax];
-
-u8      inc_byte_asm(u32 *flags,u8 d);
-#pragma aux inc_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"inc	al"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al]            		\
-	value [al]                      \
-	modify exact [al];
-
-u16     inc_word_asm(u32 *flags,u16 d);
-#pragma aux inc_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"inc	ax"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax]            		\
-	value [ax]                      \
-	modify exact [ax];
-
-u32     inc_long_asm(u32 *flags,u32 d);
-#pragma aux inc_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"inc	eax"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax]          		\
-	value [eax]                     \
-	modify exact [eax];
-
-u8      or_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux or_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"or	al,bl"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [bl]            \
-	value [al]                      \
-	modify exact [al bl];
-
-u16     or_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux or_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"or	ax,bx"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [bx]            \
-	value [ax]                      \
-	modify exact [ax bx];
-
-u32     or_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux or_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"or	eax,ebx"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [ebx]          \
-	value [eax]                     \
-	modify exact [eax ebx];
-
-u8      neg_byte_asm(u32 *flags,u8 d);
-#pragma aux neg_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"neg	al"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al]            		\
-	value [al]                      \
-	modify exact [al];
-
-u16     neg_word_asm(u32 *flags,u16 d);
-#pragma aux neg_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"neg	ax"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax]            		\
-	value [ax]                      \
-	modify exact [ax];
-
-u32     neg_long_asm(u32 *flags,u32 d);
-#pragma aux neg_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"neg	eax"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax]          		\
-	value [eax]                     \
-	modify exact [eax];
-
-u8      not_byte_asm(u32 *flags,u8 d);
-#pragma aux not_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"not	al"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al]            		\
-	value [al]                      \
-	modify exact [al];
-
-u16     not_word_asm(u32 *flags,u16 d);
-#pragma aux not_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"not	ax"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax]            		\
-	value [ax]                      \
-	modify exact [ax];
-
-u32     not_long_asm(u32 *flags,u32 d);
-#pragma aux not_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"not	eax"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax]          		\
-	value [eax]                     \
-	modify exact [eax];
-
-u8      rcl_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux rcl_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"rcl	al,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [cl]            \
-	value [al]                      \
-	modify exact [al cl];
-
-u16     rcl_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux rcl_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"rcl	ax,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [cl]            \
-	value [ax]                      \
-	modify exact [ax cl];
-
-u32     rcl_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux rcl_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"rcl	eax,cl"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [cl]          	\
-	value [eax]                     \
-	modify exact [eax cl];
-
-u8      rcr_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux rcr_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"rcr	al,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [cl]            \
-	value [al]                      \
-	modify exact [al cl];
-
-u16     rcr_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux rcr_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"rcr	ax,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [cl]            \
-	value [ax]                      \
-	modify exact [ax cl];
-
-u32     rcr_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux rcr_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"rcr	eax,cl"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [cl]          	\
-	value [eax]                     \
-	modify exact [eax cl];
-
-u8      rol_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux rol_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"rol	al,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [cl]            \
-	value [al]                      \
-	modify exact [al cl];
-
-u16     rol_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux rol_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"rol	ax,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [cl]            \
-	value [ax]                      \
-	modify exact [ax cl];
-
-u32     rol_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux rol_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"rol	eax,cl"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [cl]          	\
-	value [eax]                     \
-	modify exact [eax cl];
-
-u8      ror_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux ror_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"ror	al,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [cl]            \
-	value [al]                      \
-	modify exact [al cl];
-
-u16     ror_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux ror_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"ror	ax,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [cl]            \
-	value [ax]                      \
-	modify exact [ax cl];
-
-u32     ror_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux ror_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"ror	eax,cl"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [cl]          	\
-	value [eax]                     \
-	modify exact [eax cl];
-
-u8      shl_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux shl_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"shl	al,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [cl]            \
-	value [al]                      \
-	modify exact [al cl];
-
-u16     shl_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux shl_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"shl	ax,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [cl]            \
-	value [ax]                      \
-	modify exact [ax cl];
-
-u32     shl_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux shl_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"shl	eax,cl"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [cl]          	\
-	value [eax]                     \
-	modify exact [eax cl];
-
-u8      shr_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux shr_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"shr	al,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [cl]            \
-	value [al]                      \
-	modify exact [al cl];
-
-u16     shr_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux shr_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"shr	ax,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [cl]            \
-	value [ax]                      \
-	modify exact [ax cl];
-
-u32     shr_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux shr_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"shr	eax,cl"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [cl]          	\
-	value [eax]                     \
-	modify exact [eax cl];
-
-u8      sar_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux sar_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"sar	al,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [cl]            \
-	value [al]                      \
-	modify exact [al cl];
-
-u16     sar_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux sar_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"sar	ax,cl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [cl]            \
-	value [ax]                      \
-	modify exact [ax cl];
-
-u32     sar_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux sar_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"sar	eax,cl"                	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [cl]          	\
-	value [eax]                     \
-	modify exact [eax cl];
-
-u16		shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
-#pragma aux shld_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"shld	ax,dx,cl"               \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [dx] [cl]       \
-	value [ax]                      \
-	modify exact [ax dx cl];
-
-u32     shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
-#pragma aux shld_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"shld	eax,edx,cl"             \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [edx] [cl]     \
-	value [eax]                     \
-	modify exact [eax edx cl];
-
-u16		shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
-#pragma aux shrd_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"shrd	ax,dx,cl"               \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [dx] [cl]       \
-	value [ax]                      \
-	modify exact [ax dx cl];
-
-u32     shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
-#pragma aux shrd_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"shrd	eax,edx,cl"             \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [edx] [cl]     \
-	value [eax]                     \
-	modify exact [eax edx cl];
-
-u8      sbb_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux sbb_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"sbb	al,bl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [bl]            \
-	value [al]                      \
-	modify exact [al bl];
-
-u16     sbb_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux sbb_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"sbb	ax,bx"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [bx]            \
-	value [ax]                      \
-	modify exact [ax bx];
-
-u32     sbb_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux sbb_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"sbb	eax,ebx"                \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [ebx]          \
-	value [eax]                     \
-	modify exact [eax ebx];
-
-u8      sub_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux sub_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"sub	al,bl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [bl]            \
-	value [al]                      \
-	modify exact [al bl];
-
-u16     sub_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux sub_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"sub	ax,bx"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [bx]            \
-	value [ax]                      \
-	modify exact [ax bx];
-
-u32     sub_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux sub_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"sub	eax,ebx"                \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [ebx]          \
-	value [eax]                     \
-	modify exact [eax ebx];
-
-void	test_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux test_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"test	al,bl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [bl]            \
-	modify exact [al bl];
-
-void	test_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux test_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"test	ax,bx"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [bx]            \
-	modify exact [ax bx];
-
-void	test_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux test_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"test	eax,ebx"                \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [ebx]          \
-	modify exact [eax ebx];
-
-u8      xor_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux xor_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"xor	al,bl"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [al] [bl]            \
-	value [al]                      \
-	modify exact [al bl];
-
-u16     xor_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux xor_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"xor	ax,bx"                  \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [ax] [bx]            \
-	value [ax]                      \
-	modify exact [ax bx];
-
-u32     xor_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux xor_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"xor	eax,ebx"                \
-	"pushf"                         \
-	"pop	[edi]"            		\
-	parm [edi] [eax] [ebx]          \
-	value [eax]                     \
-	modify exact [eax ebx];
-
-void    imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
-#pragma aux imul_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"imul	bl"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],ax"				\
-	parm [edi] [esi] [al] [bl]      \
-	modify exact [esi ax bl];
-
-void    imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
-#pragma aux imul_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"imul	bx"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],ax"				\
-	"mov	[ecx],dx"				\
-	parm [edi] [esi] [ecx] [ax] [bx]\
-	modify exact [esi edi ax bx dx];
-
-void    imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
-#pragma aux imul_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"imul	ebx"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],eax"				\
-	"mov	[ecx],edx"				\
-	parm [edi] [esi] [ecx] [eax] [ebx] \
-	modify exact [esi edi eax ebx edx];
-
-void    mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
-#pragma aux mul_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"mul	bl"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],ax"				\
-	parm [edi] [esi] [al] [bl]      \
-	modify exact [esi ax bl];
-
-void    mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
-#pragma aux mul_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"mul	bx"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],ax"				\
-	"mov	[ecx],dx"				\
-	parm [edi] [esi] [ecx] [ax] [bx]\
-	modify exact [esi edi ax bx dx];
-
-void    mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
-#pragma aux mul_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"mul	ebx"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],eax"				\
-	"mov	[ecx],edx"				\
-	parm [edi] [esi] [ecx] [eax] [ebx] \
-	modify exact [esi edi eax ebx edx];
-
-void	idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
-#pragma aux idiv_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"idiv	bl"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],al"				\
-	"mov	[ecx],ah"				\
-	parm [edi] [esi] [ecx] [ax] [bl]\
-	modify exact [esi edi ax bl];
-
-void	idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
-#pragma aux idiv_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"idiv	bx"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],ax"				\
-	"mov	[ecx],dx"				\
-	parm [edi] [esi] [ecx] [ax] [dx] [bx]\
-	modify exact [esi edi ax dx bx];
-
-void	idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
-#pragma aux idiv_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"idiv	ebx"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],eax"				\
-	"mov	[ecx],edx"				\
-	parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
-	modify exact [esi edi eax edx ebx];
-
-void	div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
-#pragma aux div_byte_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"div	bl"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],al"				\
-	"mov	[ecx],ah"				\
-	parm [edi] [esi] [ecx] [ax] [bl]\
-	modify exact [esi edi ax bl];
-
-void	div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
-#pragma aux div_word_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"div	bx"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],ax"				\
-	"mov	[ecx],dx"				\
-	parm [edi] [esi] [ecx] [ax] [dx] [bx]\
-	modify exact [esi edi ax dx bx];
-
-void	div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
-#pragma aux div_long_asm =			\
-	"push	[edi]"            		\
-	"popf"                         	\
-	"div	ebx"                  	\
-	"pushf"                         \
-	"pop	[edi]"            		\
-	"mov	[esi],eax"				\
-	"mov	[ecx],edx"				\
-	parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
-	modify exact [esi edi eax edx ebx];
-
-#endif
-
-#endif /* __X86EMU_PRIM_ASM_H */
--- a/include/x86prim_ops.h
+++ b/include/x86prim_ops.h
@@ -1,232 +0,0 @@
-/****************************************************************************
-*
-*						Realmode X86 Emulator Library
-*
-*            	Copyright (C) 1996-1999 SciTech Software, Inc.
-* 				     Copyright (C) David Mosberger-Tang
-* 					   Copyright (C) 1999 Egbert Eich
-*
-*  ========================================================================
-*
-*  Permission to use, copy, modify, distribute, and sell this software and
-*  its documentation for any purpose is hereby granted without fee,
-*  provided that the above copyright notice appear in all copies and that
-*  both that copyright notice and this permission notice appear in
-*  supporting documentation, and that the name of the authors not be used
-*  in advertising or publicity pertaining to distribution of the software
-*  without specific, written prior permission.  The authors makes no
-*  representations about the suitability of this software for any purpose.
-*  It is provided "as is" without express or implied warranty.
-*
-*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-*  PERFORMANCE OF THIS SOFTWARE.
-*
-*  ========================================================================
-*
-* Language:		ANSI C
-* Environment:	Any
-* Developer:    Kendall Bennett
-*
-* Description:  Header file for primitive operation functions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_PRIM_OPS_H
-#define __X86EMU_PRIM_OPS_H
-
-#include "x86prim_asm.h"
-
-#ifdef  __cplusplus
-extern "C" {            			/* Use "C" linkage when in C++ mode */
-#endif
-
-uint16_t     aaa_word (uint16_t d);
-uint16_t     aas_word (uint16_t d);
-uint16_t     aad_word (uint16_t d);
-uint16_t     aam_word (uint8_t d);
-uint8_t      adc_byte (uint8_t d, uint8_t s);
-uint16_t     adc_word (uint16_t d, uint16_t s);
-uint32_t     adc_long (uint32_t d, uint32_t s);
-uint8_t      add_byte (uint8_t d, uint8_t s);
-uint16_t     add_word (uint16_t d, uint16_t s);
-uint32_t     add_long (uint32_t d, uint32_t s);
-uint8_t      and_byte (uint8_t d, uint8_t s);
-uint16_t     and_word (uint16_t d, uint16_t s);
-uint32_t     and_long (uint32_t d, uint32_t s);
-uint8_t      cmp_byte (uint8_t d, uint8_t s);
-uint16_t     cmp_word (uint16_t d, uint16_t s);
-uint32_t     cmp_long (uint32_t d, uint32_t s);
-uint8_t      daa_byte (uint8_t d);
-uint8_t      das_byte (uint8_t d);
-uint8_t      dec_byte (uint8_t d);
-uint16_t     dec_word (uint16_t d);
-uint32_t     dec_long (uint32_t d);
-uint8_t      inc_byte (uint8_t d);
-uint16_t     inc_word (uint16_t d);
-uint32_t     inc_long (uint32_t d);
-uint8_t      or_byte (uint8_t d, uint8_t s);
-uint16_t     or_word (uint16_t d, uint16_t s);
-uint32_t     or_long (uint32_t d, uint32_t s);
-uint8_t      neg_byte (uint8_t s);
-uint16_t     neg_word (uint16_t s);
-uint32_t     neg_long (uint32_t s);
-uint8_t      not_byte (uint8_t s);
-uint16_t     not_word (uint16_t s);
-uint32_t     not_long (uint32_t s);
-uint8_t      rcl_byte (uint8_t d, uint8_t s);
-uint16_t     rcl_word (uint16_t d, uint8_t s);
-uint32_t     rcl_long (uint32_t d, uint8_t s);
-uint8_t      rcr_byte (uint8_t d, uint8_t s);
-uint16_t     rcr_word (uint16_t d, uint8_t s);
-uint32_t     rcr_long (uint32_t d, uint8_t s);
-uint8_t      rol_byte (uint8_t d, uint8_t s);
-uint16_t     rol_word (uint16_t d, uint8_t s);
-uint32_t     rol_long (uint32_t d, uint8_t s);
-uint8_t      ror_byte (uint8_t d, uint8_t s);
-uint16_t     ror_word (uint16_t d, uint8_t s);
-uint32_t     ror_long (uint32_t d, uint8_t s);
-uint8_t      shl_byte (uint8_t d, uint8_t s);
-uint16_t     shl_word (uint16_t d, uint8_t s);
-uint32_t     shl_long (uint32_t d, uint8_t s);
-uint8_t      shr_byte (uint8_t d, uint8_t s);
-uint16_t     shr_word (uint16_t d, uint8_t s);
-uint32_t     shr_long (uint32_t d, uint8_t s);
-uint8_t      sar_byte (uint8_t d, uint8_t s);
-uint16_t     sar_word (uint16_t d, uint8_t s);
-uint32_t     sar_long (uint32_t d, uint8_t s);
-uint16_t     shld_word (uint16_t d, uint16_t fill, uint8_t s);
-uint32_t     shld_long (uint32_t d, uint32_t fill, uint8_t s);
-uint16_t     shrd_word (uint16_t d, uint16_t fill, uint8_t s);
-uint32_t     shrd_long (uint32_t d, uint32_t fill, uint8_t s);
-uint8_t      sbb_byte (uint8_t d, uint8_t s);
-uint16_t     sbb_word (uint16_t d, uint16_t s);
-uint32_t     sbb_long (uint32_t d, uint32_t s);
-uint8_t      sub_byte (uint8_t d, uint8_t s);
-uint16_t     sub_word (uint16_t d, uint16_t s);
-uint32_t     sub_long (uint32_t d, uint32_t s);
-void    test_byte (uint8_t d, uint8_t s);
-void    test_word (uint16_t d, uint16_t s);
-void    test_long (uint32_t d, uint32_t s);
-uint8_t      xor_byte (uint8_t d, uint8_t s);
-uint16_t     xor_word (uint16_t d, uint16_t s);
-uint32_t     xor_long (uint32_t d, uint32_t s);
-void    imul_byte (uint8_t s);
-void    imul_word (uint16_t s);
-void    imul_long (uint32_t s);
-void 	imul_long_direct(uint32_t *res_lo, uint32_t* res_hi,uint32_t d, uint32_t s);
-void    mul_byte (uint8_t s);
-void    mul_word (uint16_t s);
-void    mul_long (uint32_t s);
-void    idiv_byte (uint8_t s);
-void    idiv_word (uint16_t s);
-void    idiv_long (uint32_t s);
-void    div_byte (uint8_t s);
-void    div_word (uint16_t s);
-void    div_long (uint32_t s);
-void    ins (int size);
-void    outs (int size);
-uint16_t     mem_access_word (int addr);
-void    push_word (uint16_t w);
-void    push_long (uint32_t w);
-uint16_t     pop_word (void);
-uint32_t		pop_long (void);
-
-
-#if  defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM)
-
-#define	aaa_word(d)		aaa_word_asm(&M.x86.R_EFLG,d)
-#define aas_word(d)		aas_word_asm(&M.x86.R_EFLG,d)
-#define aad_word(d)		aad_word_asm(&M.x86.R_EFLG,d)
-#define aam_word(d)		aam_word_asm(&M.x86.R_EFLG,d)
-#define adc_byte(d,s)	adc_byte_asm(&M.x86.R_EFLG,d,s)
-#define adc_word(d,s)	adc_word_asm(&M.x86.R_EFLG,d,s)
-#define adc_long(d,s)	adc_long_asm(&M.x86.R_EFLG,d,s)
-#define add_byte(d,s) 	add_byte_asm(&M.x86.R_EFLG,d,s)
-#define add_word(d,s)	add_word_asm(&M.x86.R_EFLG,d,s)
-#define add_long(d,s)	add_long_asm(&M.x86.R_EFLG,d,s)
-#define and_byte(d,s)	and_byte_asm(&M.x86.R_EFLG,d,s)
-#define and_word(d,s)	and_word_asm(&M.x86.R_EFLG,d,s)
-#define and_long(d,s)	and_long_asm(&M.x86.R_EFLG,d,s)
-#define cmp_byte(d,s)	cmp_byte_asm(&M.x86.R_EFLG,d,s)
-#define cmp_word(d,s)	cmp_word_asm(&M.x86.R_EFLG,d,s)
-#define cmp_long(d,s)	cmp_long_asm(&M.x86.R_EFLG,d,s)
-#define daa_byte(d)		daa_byte_asm(&M.x86.R_EFLG,d)
-#define das_byte(d)		das_byte_asm(&M.x86.R_EFLG,d)
-#define dec_byte(d)		dec_byte_asm(&M.x86.R_EFLG,d)
-#define dec_word(d)		dec_word_asm(&M.x86.R_EFLG,d)
-#define dec_long(d)		dec_long_asm(&M.x86.R_EFLG,d)
-#define inc_byte(d)		inc_byte_asm(&M.x86.R_EFLG,d)
-#define inc_word(d)		inc_word_asm(&M.x86.R_EFLG,d)
-#define inc_long(d)		inc_long_asm(&M.x86.R_EFLG,d)
-#define or_byte(d,s)	or_byte_asm(&M.x86.R_EFLG,d,s)
-#define or_word(d,s)	or_word_asm(&M.x86.R_EFLG,d,s)
-#define or_long(d,s)	or_long_asm(&M.x86.R_EFLG,d,s)
-#define neg_byte(s)		neg_byte_asm(&M.x86.R_EFLG,s)
-#define neg_word(s)		neg_word_asm(&M.x86.R_EFLG,s)
-#define neg_long(s)		neg_long_asm(&M.x86.R_EFLG,s)
-#define not_byte(s)		not_byte_asm(&M.x86.R_EFLG,s)
-#define not_word(s)		not_word_asm(&M.x86.R_EFLG,s)
-#define not_long(s)		not_long_asm(&M.x86.R_EFLG,s)
-#define rcl_byte(d,s)	rcl_byte_asm(&M.x86.R_EFLG,d,s)
-#define rcl_word(d,s)	rcl_word_asm(&M.x86.R_EFLG,d,s)
-#define rcl_long(d,s)	rcl_long_asm(&M.x86.R_EFLG,d,s)
-#define rcr_byte(d,s)	rcr_byte_asm(&M.x86.R_EFLG,d,s)
-#define rcr_word(d,s)	rcr_word_asm(&M.x86.R_EFLG,d,s)
-#define rcr_long(d,s)	rcr_long_asm(&M.x86.R_EFLG,d,s)
-#define rol_byte(d,s)	rol_byte_asm(&M.x86.R_EFLG,d,s)
-#define rol_word(d,s)	rol_word_asm(&M.x86.R_EFLG,d,s)
-#define rol_long(d,s)	rol_long_asm(&M.x86.R_EFLG,d,s)
-#define ror_byte(d,s)	ror_byte_asm(&M.x86.R_EFLG,d,s)
-#define ror_word(d,s)	ror_word_asm(&M.x86.R_EFLG,d,s)
-#define ror_long(d,s)	ror_long_asm(&M.x86.R_EFLG,d,s)
-#define shl_byte(d,s)	shl_byte_asm(&M.x86.R_EFLG,d,s)
-#define shl_word(d,s)	shl_word_asm(&M.x86.R_EFLG,d,s)
-#define shl_long(d,s)	shl_long_asm(&M.x86.R_EFLG,d,s)
-#define shr_byte(d,s)	shr_byte_asm(&M.x86.R_EFLG,d,s)
-#define shr_word(d,s)	shr_word_asm(&M.x86.R_EFLG,d,s)
-#define shr_long(d,s)	shr_long_asm(&M.x86.R_EFLG,d,s)
-#define sar_byte(d,s)	sar_byte_asm(&M.x86.R_EFLG,d,s)
-#define sar_word(d,s)	sar_word_asm(&M.x86.R_EFLG,d,s)
-#define sar_long(d,s)	sar_long_asm(&M.x86.R_EFLG,d,s)
-#define shld_word(d,fill,s)	shld_word_asm(&M.x86.R_EFLG,d,fill,s)
-#define shld_long(d,fill,s)	shld_long_asm(&M.x86.R_EFLG,d,fill,s)
-#define shrd_word(d,fill,s)	shrd_word_asm(&M.x86.R_EFLG,d,fill,s)
-#define shrd_long(d,fill,s)	shrd_long_asm(&M.x86.R_EFLG,d,fill,s)
-#define sbb_byte(d,s)	sbb_byte_asm(&M.x86.R_EFLG,d,s)
-#define sbb_word(d,s)	sbb_word_asm(&M.x86.R_EFLG,d,s)
-#define sbb_long(d,s)	sbb_long_asm(&M.x86.R_EFLG,d,s)
-#define sub_byte(d,s)	sub_byte_asm(&M.x86.R_EFLG,d,s)
-#define sub_word(d,s)	sub_word_asm(&M.x86.R_EFLG,d,s)
-#define sub_long(d,s)	sub_long_asm(&M.x86.R_EFLG,d,s)
-#define test_byte(d,s)	test_byte_asm(&M.x86.R_EFLG,d,s)
-#define test_word(d,s)	test_word_asm(&M.x86.R_EFLG,d,s)
-#define test_long(d,s)	test_long_asm(&M.x86.R_EFLG,d,s)
-#define xor_byte(d,s)	xor_byte_asm(&M.x86.R_EFLG,d,s)
-#define xor_word(d,s)	xor_word_asm(&M.x86.R_EFLG,d,s)
-#define xor_long(d,s)	xor_long_asm(&M.x86.R_EFLG,d,s)
-#define imul_byte(s)	imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
-#define imul_word(s)	imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
-#define imul_long(s)	imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
-#define imul_long_direct(res_lo,res_hi,d,s)	imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s)
-#define mul_byte(s)		mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
-#define mul_word(s)		mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
-#define mul_long(s)		mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
-#define idiv_byte(s)	idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
-#define idiv_word(s)	idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
-#define idiv_long(s)	idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
-#define div_byte(s)		div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
-#define div_word(s)		div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
-#define div_long(s)		div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
-
-#endif
-
-#ifdef  __cplusplus
-}                       			/* End of "C" linkage for C++   	*/
-#endif
-
-#endif /* __X86EMU_PRIM_OPS_H */
--- a/include/x86regs.h
+++ b/include/x86regs.h
@@ -1,358 +0,0 @@
-/****************************************************************************
- *
- *						Realmode X86 Emulator Library
- *
- *            	Copyright (C) 1996-1999 SciTech Software, Inc.
- * 				     Copyright (C) David Mosberger-Tang
- * 					   Copyright (C) 1999 Egbert Eich
- *
- *  ========================================================================
- *
- *  Permission to use, copy, modify, distribute, and sell this software and
- *  its documentation for any purpose is hereby granted without fee,
- *  provided that the above copyright notice appear in all copies and that
- *  both that copyright notice and this permission notice appear in
- *  supporting documentation, and that the name of the authors not be used
- *  in advertising or publicity pertaining to distribution of the software
- *  without specific, written prior permission.  The authors makes no
- *  representations about the suitability of this software for any purpose.
- *  It is provided "as is" without express or implied warranty.
- *
- *  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- *  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- *  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- *  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
- *  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
- *  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- *  PERFORMANCE OF THIS SOFTWARE.
- *
- *  ========================================================================
- *
- * Language:		ANSI C
- * Environment:	Any
- * Developer:    Kendall Bennett
- *
- * Description:  Header file for x86 register definitions.
- *
- ****************************************************************************/
-/* $XFree86: xc/extras/x86emu/include/x86emu/regs.h,v 1.3 2001/10/28 03:32:25 tsi Exp $ */
-
-#ifndef __X86EMU_REGS_H
-#define __X86EMU_REGS_H
-#include "x86debug.h"
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-//#pragma pack(1)
-
-/*
- * General EAX, EBX, ECX, EDX type registers.  Note that for
- * portability, and speed, the issue of byte swapping is not addressed
- * in the registers.  All registers are stored in the default format
- * available on the host machine.  The only critical issue is that the
- * registers should line up EXACTLY in the same manner as they do in
- * the 386.  That is:
- *
- * EAX & 0xff  === AL
- * EAX & 0xffff == AX
- *
- * etc.  The result is that alot of the calculations can then be
- * done using the native instruction set fully.
- */
-
-typedef struct {
-	uint32_t e_reg;
-} I32_reg_t;
-
-typedef struct {
-	uint16_t filler0, x_reg;
-} I16_reg_t;
-
-typedef struct {
-	uint8_t filler0, filler1, h_reg, l_reg;
-} I8_reg_t;
-
-typedef union {
-	I32_reg_t   I32_reg;
-	I16_reg_t   I16_reg;
-	I8_reg_t    I8_reg;
-} i386_general_register;
-
-struct i386_general_regs {
-	i386_general_register A, B, C, D;
-};
-
-typedef struct i386_general_regs Gen_reg_t;
-
-struct i386_special_regs {
-	i386_general_register SP, BP, SI, DI, IP;
-	uint32_t FLAGS;
-};
-
-/*  
- * Segment registers here represent the 16 bit quantities
- * CS, DS, ES, SS.
- */
-
-struct i386_segment_regs {
-	uint16_t CS, DS, SS, ES, FS, GS;
-};
-
-/* 8 bit registers */
-#define R_AH  gen.A.I8_reg.h_reg
-#define R_AL  gen.A.I8_reg.l_reg
-#define R_BH  gen.B.I8_reg.h_reg
-#define R_BL  gen.B.I8_reg.l_reg
-#define R_CH  gen.C.I8_reg.h_reg
-#define R_CL  gen.C.I8_reg.l_reg
-#define R_DH  gen.D.I8_reg.h_reg
-#define R_DL  gen.D.I8_reg.l_reg
-
-/* 16 bit registers */
-#define R_AX  gen.A.I16_reg.x_reg
-#define R_BX  gen.B.I16_reg.x_reg
-#define R_CX  gen.C.I16_reg.x_reg
-#define R_DX  gen.D.I16_reg.x_reg
-
-/* 32 bit extended registers */
-#define R_EAX  gen.A.I32_reg.e_reg
-#define R_EBX  gen.B.I32_reg.e_reg
-#define R_ECX  gen.C.I32_reg.e_reg
-#define R_EDX  gen.D.I32_reg.e_reg
-
-/* special registers */
-#define R_SP  spc.SP.I16_reg.x_reg
-#define R_BP  spc.BP.I16_reg.x_reg
-#define R_SI  spc.SI.I16_reg.x_reg
-#define R_DI  spc.DI.I16_reg.x_reg
-#define R_IP  spc.IP.I16_reg.x_reg
-#define R_FLG spc.FLAGS
-
-/* special registers */
-#define R_SP  spc.SP.I16_reg.x_reg
-#define R_BP  spc.BP.I16_reg.x_reg
-#define R_SI  spc.SI.I16_reg.x_reg
-#define R_DI  spc.DI.I16_reg.x_reg
-#define R_IP  spc.IP.I16_reg.x_reg
-#define R_FLG spc.FLAGS
-
-/* special registers */
-#define R_ESP  spc.SP.I32_reg.e_reg
-#define R_EBP  spc.BP.I32_reg.e_reg
-#define R_ESI  spc.SI.I32_reg.e_reg
-#define R_EDI  spc.DI.I32_reg.e_reg
-#define R_EIP  spc.IP.I32_reg.e_reg
-#define R_EFLG spc.FLAGS
-
-/* segment registers */
-#define R_CS  seg.CS
-#define R_DS  seg.DS
-#define R_SS  seg.SS
-#define R_ES  seg.ES
-#define R_FS  seg.FS
-#define R_GS  seg.GS
-
-/* flag conditions   */
-#define FB_CF 0x0001            /* CARRY flag  */
-#define FB_PF 0x0004            /* PARITY flag */
-#define FB_AF 0x0010            /* AUX  flag   */
-#define FB_ZF 0x0040            /* ZERO flag   */
-#define FB_SF 0x0080            /* SIGN flag   */
-#define FB_TF 0x0100            /* TRAP flag   */
-#define FB_IF 0x0200            /* INTERRUPT ENABLE flag */
-#define FB_DF 0x0400            /* DIR flag    */
-#define FB_OF 0x0800            /* OVERFLOW flag */
-
-/* 80286 and above always have bit#1 set */
-#define F_ALWAYS_ON  (0x0002)   /* flag bits always on */
-
-/*
- * Define a mask for only those flag bits we will ever pass back 
- * (via PUSHF) 
- */
-#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
-
-/* following bits masked in to a 16bit quantity */
-
-#define F_CF 0x0001             /* CARRY flag  */
-#define F_PF 0x0004             /* PARITY flag */
-#define F_AF 0x0010             /* AUX  flag   */
-#define F_ZF 0x0040             /* ZERO flag   */
-#define F_SF 0x0080             /* SIGN flag   */
-#define F_TF 0x0100             /* TRAP flag   */
-#define F_IF 0x0200             /* INTERRUPT ENABLE flag */
-#define F_DF 0x0400             /* DIR flag    */
-#define F_OF 0x0800             /* OVERFLOW flag */
-
-#define TOGGLE_FLAG(flag)     	(M.x86.R_FLG ^= (flag))
-#define SET_FLAG(flag)        	(M.x86.R_FLG |= (flag))
-#define CLEAR_FLAG(flag)      	(M.x86.R_FLG &= ~(flag))
-#define ACCESS_FLAG(flag)     	(M.x86.R_FLG & (flag))
-#define CLEARALL_FLAG(m)    	(M.x86.R_FLG = 0)
-
-#define CONDITIONAL_SET_FLAG(COND,FLAG) \
-	if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
-
-#define F_PF_CALC 0x010000      /* PARITY flag has been calced    */
-#define F_ZF_CALC 0x020000      /* ZERO flag has been calced      */
-#define F_SF_CALC 0x040000      /* SIGN flag has been calced      */
-
-#define F_ALL_CALC      0xff0000        /* All have been calced   */
-
-/*
- * Emulator machine state.
- * Segment usage control.
- */
-#define SYSMODE_SEG_DS_SS       0x00000001
-#define SYSMODE_SEGOVR_CS       0x00000002
-#define SYSMODE_SEGOVR_DS       0x00000004
-#define SYSMODE_SEGOVR_ES       0x00000008
-#define SYSMODE_SEGOVR_FS       0x00000010
-#define SYSMODE_SEGOVR_GS       0x00000020
-#define SYSMODE_SEGOVR_SS       0x00000040
-#define SYSMODE_PREFIX_REPE     0x00000080
-#define SYSMODE_PREFIX_REPNE    0x00000100
-#define SYSMODE_PREFIX_DATA     0x00000200
-#define SYSMODE_PREFIX_ADDR     0x00000400
-#define SYSMODE_INTR_PENDING    0x10000000
-#define SYSMODE_EXTRN_INTR      0x20000000
-#define SYSMODE_HALTED          0x40000000
-
-#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS      | \
-		SYSMODE_SEGOVR_CS      | \
-		SYSMODE_SEGOVR_DS      | \
-		SYSMODE_SEGOVR_ES      | \
-		SYSMODE_SEGOVR_FS      | \
-		SYSMODE_SEGOVR_GS      | \
-		SYSMODE_SEGOVR_SS)
-#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS      | \
-		SYSMODE_SEGOVR_CS      | \
-		SYSMODE_SEGOVR_DS      | \
-		SYSMODE_SEGOVR_ES      | \
-		SYSMODE_SEGOVR_FS      | \
-		SYSMODE_SEGOVR_GS      | \
-		SYSMODE_SEGOVR_SS      | \
-		SYSMODE_PREFIX_DATA    | \
-		SYSMODE_PREFIX_ADDR)
-
-#define  INTR_SYNCH           0x1
-#define  INTR_ASYNCH          0x2
-#define  INTR_HALTED          0x4
-
-typedef struct {
-	struct i386_general_regs    gen;
-	struct i386_special_regs    spc;
-	struct i386_segment_regs    seg;
-	/*
-	 * MODE contains information on:
-	 *  REPE prefix             2 bits  repe,repne
-	 *  SEGMENT overrides       5 bits  normal,DS,SS,CS,ES
-	 *  Delayed flag set        3 bits  (zero, signed, parity)
-	 *  reserved                6 bits
-	 *  interrupt #             8 bits  instruction raised interrupt
-	 *  BIOS video segregs      4 bits  
-	 *  Interrupt Pending       1 bits  
-	 *  Extern interrupt        1 bits
-	 *  Halted                  1 bits
-	 */
-	uint32_t                         mode;
-	volatile int                intr;   /* mask of pending interrupts */
-	int                         debug;
-#ifdef DBG_X86EMU
-	int check;
-	uint16_t saved_ip;
-	uint16_t saved_cs;
-	int enc_pos;
-	int enc_str_pos;
-	//    char decode_buf[32]; /* encoded byte stream  */
-	char decoded_buf[256]; /* disassembled strings */
-#endif
-	uint8_t intno;
-	uint8_t __pad[3];
-} X86EMU_regs;
-
-/****************************************************************************
-REMARKS:
-Structure maintaining the emulator machine state.
-
-MEMBERS:
-mem_base		- Base real mode memory for the emulator
-abseg			- Base for the absegment
-mem_size		- Size of the real mode memory block for the emulator
-private			- private data pointer
-x86			- X86 registers
- ****************************************************************************/
-typedef struct
-{
-	unsigned long mem_base;
-	unsigned long mem_size;
-	unsigned long abseg;
-	void* private;
-	X86EMU_regs x86;
-} X86EMU_sysEnv;
-
-//#pragma pack()
-
-/*----------------------------- Global Variables --------------------------*/
-
-#ifdef  __cplusplus
-extern "C" {            			/* Use "C" linkage when in C++ mode */
-#endif
-
-/* Global emulator machine state.
- *
- * We keep it global to avoid pointer dereferences in the code for speed.
- */
-
-extern X86EMU_sysEnv	_X86EMU_env;
-
-#define M _X86EMU_env
-
-#define X86_EAX M.x86.R_EAX
-#define X86_EBX M.x86.R_EBX
-#define X86_ECX M.x86.R_ECX
-#define X86_EDX M.x86.R_EDX
-#define X86_ESI M.x86.R_ESI
-#define X86_EDI M.x86.R_EDI
-#define X86_EBP M.x86.R_EBP
-#define X86_EIP M.x86.R_EIP
-#define X86_ESP M.x86.R_ESP
-#define X86_EFLAGS M.x86.R_EFLG
-
-#define X86_FLAGS M.x86.R_FLG
-#define X86_AX M.x86.R_AX
-#define X86_BX M.x86.R_BX
-#define X86_CX M.x86.R_CX
-#define X86_DX M.x86.R_DX
-#define X86_SI M.x86.R_SI
-#define X86_DI M.x86.R_DI
-#define X86_BP M.x86.R_BP
-#define X86_IP M.x86.R_IP
-#define X86_SP M.x86.R_SP
-#define X86_CS M.x86.R_CS
-#define X86_DS M.x86.R_DS
-#define X86_ES M.x86.R_ES
-#define X86_SS M.x86.R_SS
-#define X86_FS M.x86.R_FS
-#define X86_GS M.x86.R_GS
-
-#define X86_AL M.x86.R_AL
-#define X86_BL M.x86.R_BL
-#define X86_CL M.x86.R_CL
-#define X86_DL M.x86.R_DL
-
-#define X86_AH M.x86.R_AH
-#define X86_BH M.x86.R_BH
-#define X86_CH M.x86.R_CH
-#define X86_DH M.x86.R_DH
-
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-/* Function to log information at runtime */
-
-#ifdef  __cplusplus
-}                       			/* End of "C" linkage for C++   	*/
-#endif
-
-#endif /* __X86EMU_REGS_H */
--- a/include/xhdi_sd.h
+++ b/include/xhdi_sd.h
@@ -85,7 +85,7 @@ typedef struct _BPB
 /* a riddle: how do you typedef a function pointer to a function that returns its own type? ;) */
 typedef void* (*xhdi_call_fun)(int xhdi_fun, ...);

-extern unsigned long xhdi_call(uint16_t *stack);
+extern uint32_t xhdi_call(uint16_t *stack);

 extern xhdi_call_fun xhdi_sd_install(xhdi_call_fun old_vector) __attribute__((__interrupt__));

--- a/kbd/ikbd.c
+++ b/kbd/ikbd.c
@@ -18,7 +18,7 @@

 */

-#include <stdint.h>
+#include <bas_types.h>
 #include "bas_printf.h"
 #include "bas_string.h"

--- a/mcf5474.gdb
+++ b/mcf5474.gdb
@@ -67,5 +67,5 @@ end

 tr
 ib
-add-symbol-file ../emutos/emutos2.img 0xe00000
-load firebee/ram.elf
+#add-symbol-file ../emutos/emutos2.img 0xe00000
+#load firebee/ram.elf
--- a/memory_map.txt
+++ b/memory_map.txt
@@ -0,0 +1,8 @@
+Firebee memory map
+==================
+
+		Virt. Start	Virt. End	Phys. Start	Phys. End
+ST-RAM		0x00000000	0x00dfffff	0x60000000	0x60dfffff
+TOS		0x00e00000	0x00efffff	0x00e00000	0x00efffff
+ST I/O area	0x00f00000	0x01000000	0xfff00000	0xffffffff
+TT-RAM		0x01000000	0x20ffffff	0x00000000	0x1fffffff
--- a/net/am79c874.c
+++ b/net/am79c874.c
@@ -26,7 +26,7 @@
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_AM79 */

-/********************************************************************/
+
 /* Initialize the AM79C874 PHY
 *
 * This function sets up the Auto-Negotiate Advertisement register
--- a/net/arp.c
+++ b/net/arp.c
@@ -13,7 +13,7 @@

 //#define DBG_ARP
 #ifdef DBG_ARP
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_ARP */
@@ -227,13 +227,10 @@ void arp_request(NIF *nif, uint8_t *pa)
    arp_frame_hdr *arpframe;
    int i, result;

-
-	dbg("%s\r\n", __FUNCTION__);
-
    pNbuf = nbuf_alloc();
    if (pNbuf == NULL)
    {
-		dbg("%s: arp_request couldn't allocate Tx buffer\n", __FUNCTION__);
+        dbg("could not allocate Tx buffer\n");
        return;
    }

@@ -263,7 +260,7 @@ void arp_request(NIF *nif, uint8_t *pa)
    pNbuf->length = ARP_HDR_LEN;

    /* Send the ARP request */
-	dbg("%s: sending ARP request\r\n", __FUNCTION__);
+    dbg("sending ARP request\r\n");
    result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf);

    if (result == 0)
@@ -315,11 +312,11 @@ uint8_t *arp_resolve(NIF *nif, uint16_t protocol, uint8_t *pa)
        timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT);
        while (timer_get_reference(TIMER_NETWORK))
        {
-			dbg("%s: try to resolve %d.%d.%d.%d\r\n", __FUNCTION__,
+            dbg("try to resolve %d.%d.%d.%d\r\n",
                pa[0], pa[1], pa[2], pa[3], pa[4]);
            if (arp_resolve_pa(nif, protocol, pa, &hwa))
            {
-				dbg("%s: resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n", __FUNCTION__,
+                dbg("resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n",
                    hwa[0], hwa[1], hwa[2], hwa[3], hwa[4], hwa[5], hwa[6]);

                return hwa;
@@ -369,6 +366,7 @@ void arp_handler(NIF *nif, NBUF *pNbuf)
            (rx_arpframe->ar_pro != ETH_FRM_IP) ||
            (rx_arpframe->ar_pln != 4))
    {
+        dbg("received packet is not an ARP packet, discard it\r\n");
        nbuf_free(pNbuf);
        return;
    }
@@ -384,10 +382,14 @@ void arp_handler(NIF *nif, NBUF *pNbuf)
            (rx_arpframe->ar_tpa[2] == addr[2]) &&
            (rx_arpframe->ar_tpa[3] == addr[3]) )
    {
+        dbg("received ARP packet is a permanent one, store it\r\n");
        longevity = ARP_ENTRY_PERM;
    }
    else
+    {
+        dbg("received ARP packet was not addressed to us, keep only temporarily\r\n");
        longevity = ARP_ENTRY_TEMP;
+    }

    /*
     * Add ARP info into the table
@@ -412,6 +414,7 @@ void arp_handler(NIF *nif, NBUF *pNbuf)
                    (rx_arpframe->ar_tpa[2] == addr[2]) &&
                    (rx_arpframe->ar_tpa[3] == addr[3]) )
            {
+                dbg("received arp request directed to us, replying\r\n");
                /*
                 * Reuse the current network buffer to assemble an ARP reply
                 */
@@ -465,12 +468,19 @@ void arp_handler(NIF *nif, NBUF *pNbuf)
                        pNbuf);
            }
            else
+            {
+                dbg("ARP request not addressed to us, discarding\r\n");
                nbuf_free(pNbuf);
+            }
            break;
+
        case ARP_REPLY:
            /*
             * The ARP Reply case is already taken care of
             */
+
+            /* missing break is intentional */
+
        default:
            nbuf_free(pNbuf);
            break;
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -90,16 +90,18 @@ void bootp_handler(NIF *nif, NBUF *nbuf)
    /* 
     * BOOTP protocol handler 
     */
-	uint8_t *addr;
    struct bootp_packet *rx_p;
    udp_frame_hdr *udpframe;

+    (void) udpframe;    /* FIXME: just to avoid compiler warning */
    dbg("\r\n");

    rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
    udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];

-	/* check packet if it is valid and if it is really intended for us */
+    /*
+     * check packet if it is valid and if it is really intended for us
+     */

    if (rx_p->type == BOOTP_TYPE_BOOTREPLY && rx_p->xid == XID)
    {
@@ -109,6 +111,7 @@ void bootp_handler(NIF *nif, NBUF *nbuf)
    }
    else
    {
+        dbg("received invalid bootp reply\r\n");
        /* not valid */
        return;
    }
--- a/net/fec.c
+++ b/net/fec.c
@@ -32,7 +32,7 @@
 #error Unknown machine!
 #endif

-#define DBG_FEC
+//#define DBG_FEC
 #ifdef DBG_FEC
 #define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
@@ -538,12 +538,19 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
 {
    uint32_t initiator;
    int channel;
+#ifdef DBG_FEC
    int res;
+#endif

    /*
     * Make the initiator assignment
     */
-	res = dma_set_initiator(DMA_FEC_RX(ch));
+#if defined(DBG_FEC)
+    res =
+#else
+    (void)
+#endif
+    dma_set_initiator(DMA_FEC_RX(ch));
    dbg("dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", ch, res);

    /*
@@ -564,9 +571,9 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
     * Start the Rx DMA task
     */
    MCD_startDma(channel,
-			(int8_t *) rxbd,
+            (s8 *) rxbd,
            0,
-			(int8_t *) MCF_FEC_FECRFDR(ch),
+            (s8 *) MCF_FEC_FECRFDR(ch),
            0,
            RX_BUF_SZ,
            0,
@@ -844,15 +851,21 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
 {
    uint32_t initiator;
    int channel;
-	int result;
    void fec0_tx_frame(void);
    void fec1_tx_frame(void);
+#ifdef DBG_FEC
    int res;
+#endif

    /*
     * Make the initiator assignment
     */
-	res = dma_set_initiator(DMA_FEC_TX(ch));
+#ifdef DBG_FEC
+    res =
+#else
+    (void)
+#endif
+    dma_set_initiator(DMA_FEC_TX(ch));
    dbg("dma_set_initiator(%d) = %d\r\n", ch, res);

    /*
@@ -874,9 +887,9 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
     * Start the Tx DMA task
     */
    MCD_startDma(channel,
-			(int8_t *) txbd,
+            (s8 *) txbd,
            0,
-			(int8_t*) MCF_FEC_FECTFDR(ch),
+            (s8 *) MCF_FEC_FECTFDR(ch),
            0,
            ETH_MTU,
            0,
@@ -1034,7 +1047,6 @@ void fec1_tx_frame(void)
    fec_tx_frame(1);
 }

-/********************************************************************/
 /*
 * Send a packet out the selected FEC
 *
@@ -1108,7 +1120,6 @@ int fec1_send(NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NBUF *nbuf)
    return fec_send(1, nif, dst, src, type, nbuf);
 }

-/********************************************************************/
 /*
 * Enable interrupts on the selected FEC
 *
@@ -1122,9 +1133,8 @@ void fec_irq_enable(uint8_t ch, uint8_t lvl, uint8_t pri)
    /*
     * Setup the appropriate ICR
     */
-	MCF_INTC_ICR((ch == 0) ? 39 : 38) = (uint8_t)(0
-			| MCF_INTC_ICR_IP(pri)
-			| MCF_INTC_ICR_IL(lvl));
+    MCF_INTC_ICR((ch == 0) ? 39 : 38) = MCF_INTC_ICR_IP(pri) |
+                                        MCF_INTC_ICR_IL(lvl);

    /*
     * Clear any pending FEC interrupt events
@@ -1145,7 +1155,7 @@ void fec_irq_enable(uint8_t ch, uint8_t lvl, uint8_t pri)
        MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK38;
 }

-/********************************************************************/
+
 /*
 * Disable interrupts on the selected FEC
 *
@@ -1169,7 +1179,6 @@ void fec_irq_disable(uint8_t ch)
        MCF_INTC_IMRH |= MCF_INTC_IMRH_INT_MASK38;
 }

-/********************************************************************/
 /*
 * FEC interrupt handler
 * All interrupts are multiplexed into a single vector for each
@@ -1180,7 +1189,7 @@ void fec_irq_disable(uint8_t ch)
 * Parameters:
 * ch       FEC channel
 */
-static void fec_irq_handler(uint8_t ch)
+static bool fec_irq_handler(uint8_t ch)
 {
    uint32_t event, eir;

@@ -1247,7 +1256,6 @@ static void fec_irq_handler(uint8_t ch)
    {
        fec_log[ch].txf++;
        dbg("TXF\r\n");
-		fec_log_dump(0);
    }

    if (event & MCF_FEC_EIR_GRA)
@@ -1276,33 +1284,38 @@ static void fec_irq_handler(uint8_t ch)
        fec_log[ch].hberr++;
        dbg("HBERR\r\n");
    }
+
+    return true;
 }

 /*
 * handler for FEC interrupts
 * arg2 is a pointer to the nif in this case
 */
-int fec0_interrupt_handler(void* arg1, void* arg2)
+bool fec0_interrupt_handler(void* arg1, void* arg2)
 {
-	(void) arg1;
+    bool res;
+
+    (void) arg1;    /* not used */
    (void) arg2;

-	fec_irq_handler(0);
+    res = fec_irq_handler(0);

-	return 1;
+    return res;
 }

-int fec1_interrupt_handler(void* arg1, void* arg2)
+bool fec1_interrupt_handler(void* arg1, void* arg2)
 {
-	(void) arg1;
+    bool res;
+
+    (void) arg1;    /* not used */
    (void) arg2;

-	fec_irq_handler(1);
+    res = fec_irq_handler(1);

-	return 1;
+    return res;
 }

-/********************************************************************/
 /*
 * Configure the selected Ethernet port and enable all operations
 *
@@ -1371,7 +1384,6 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
    MCF_FEC_ECR(ch) |= MCF_FEC_ECR_ETHER_EN;
 }

-/********************************************************************/
 /*
 * Reset the selected Ethernet port
 *
@@ -1383,7 +1395,7 @@ void fec_eth_reset(uint8_t ch)
    // To do
 }

-/********************************************************************/
+
 /*
 * Stop the selected Ethernet port
 *
--- a/net/fecbd.c
+++ b/net/fecbd.c
@@ -11,7 +11,7 @@
 #include "bas_printf.h"
 #include <stddef.h>

-#define DBG_FECBD
+//#define DBG_FECBD
 #ifdef DBG_FECBD
 #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
 #else
--- a/net/ip.c
+++ b/net/ip.c
@@ -6,14 +6,13 @@
 *
 * Modifications:
 */
+#include <bas_types.h>
 #include "net.h"
 #include "bas_printf.h"
 #include "bas_string.h"
-#include <stdint.h>
-#include <stddef.h>


-#define IP_DEBUG
+//#define IP_DEBUG
 #if defined(IP_DEBUG)
 #define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
@@ -297,9 +296,6 @@ void ip_handler(NIF *nif, NBUF *pNbuf)
        return;
    }

-	pNbuf->offset += (IP_IHL(ipframe) * 4);
-	pNbuf->length = (uint16_t)(IP_LENGTH(ipframe) - (IP_IHL(ipframe) * 4));
-
    /*
     * Call the appriopriate handler
     */
--- a/net/nbuf.c
+++ b/net/nbuf.c
@@ -12,9 +12,9 @@
 #include "bas_printf.h"


-//#define DBG_NBUF
+#define DBG_NBUF
 #if defined(DBG_NBUF)
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_NBUF */
@@ -48,7 +48,7 @@ int nbuf_init(void)
        queue_init(&nbuf_queue[i]);
    }

-	dbg("%s: Creating %d net buffers of %d bytes\r\n", __FUNCTION__, NBUF_MAX, NBUF_SZ);
+    dbg("Creating %d net buffers of %d bytes\r\n", NBUF_MAX, NBUF_SZ);

    for (i = 0; i < NBUF_MAX; ++i)
    {
@@ -76,7 +76,7 @@ int nbuf_init(void)
        queue_add(&nbuf_queue[NBUF_FREE], (QNODE *)nbuf);
    }

-	dbg("%s: NBUF allocation complete\r\n", __FUNCTION__);
+    dbg("NBUF allocation complete\r\n");

    return 0;
 }
@@ -87,7 +87,8 @@ int nbuf_init(void)
 void nbuf_flush(void)
 {
    NBUF *nbuf;
-	int i, level = set_ipl(7);
+    int i;
+    int level = set_ipl(7);
    int n = 0;

    for (i = 0; i < NBUF_MAX; ++i)
@@ -176,7 +177,8 @@ void nbuf_add(int q, NBUF *nbuf)
 void nbuf_reset(void)
 {
    NBUF *nbuf;
-	int i, level = set_ipl(7);
+    int i;
+    int level = set_ipl(7);

    for (i = 1; i < NBUF_MAXQ; ++i)
    {
@@ -193,7 +195,9 @@ void nbuf_debug_dump(void)
 {
 #ifdef DBG_NBUF
    NBUF *nbuf;
-	int i, j, level;
+    int i;
+    int j;
+    int level;

    level = set_ipl(7);

@@ -204,6 +208,7 @@ void nbuf_debug_dump(void)
        dbg("--------------------------------------\r\n");
        j = 0;
        nbuf = (NBUF *) queue_peek(&nbuf_queue[i]);
+
        while (nbuf != NULL)
        {
            dbg("%d\t0x%08x\t0x%04x\t0x%04x\r\n", j++, nbuf->data,
--- a/net/net_timer.c
+++ b/net/net_timer.c
@@ -5,16 +5,15 @@
 *
 * Notes:
 */
+
 #include "net_timer.h"
-#include <stdint.h>
-#include <stdbool.h>
 #include "bas_printf.h"
 #include "MCF5475.h"
 #include "interrupts.h"

 //#define DBG_TMR
 #ifdef DBG_TMR
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_TMR */
@@ -39,7 +38,7 @@ static NET_TIMER net_timer[4] =
 };


-int timer_default_isr(void *not_used, NET_TIMER *t)
+bool timer_default_isr(void *not_used, NET_TIMER *t)
 {
    (void) not_used;

@@ -48,7 +47,7 @@ int timer_default_isr(void *not_used, NET_TIMER *t)
     */
    MCF_GPT_GMS(t->ch) = 0;

-	dbg("%s: timer isr called for timer channel %d\r\n", __FUNCTION__);
+    dbg("timer isr called for timer channel %d\r\n");

    /*
     * Clear the reference - the desired seconds have expired
@@ -63,23 +62,29 @@ void timer_irq_enable(uint8_t ch)
    /*
     * Setup the appropriate ICR
     */
-	MCF_INTC_ICR(TIMER_VECTOR(ch) - 64) =
-		(uint8_t)(0
-				| MCF_INTC_ICR_IP(net_timer[ch].pri)
-				| MCF_INTC_ICR_IL(net_timer[ch].lvl));
+    MCF_INTC_ICR(TIMER_VECTOR(ch) - 64) = MCF_INTC_ICR_IP(net_timer[ch].pri) |
+                                          MCF_INTC_ICR_IL(net_timer[ch].lvl);

    /*
     * Unmask the FEC interrupt in the interrupt controller
     */
    if (ch == 3)
+    {
        MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK59;
+    }
    else if (ch == 2)
+    {
        MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK60;
+    }
    else if (ch == 1)
+    {
        MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK61;
+    }
    else
+    {
        MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK62;
    }
+}

 bool timer_set_secs(uint8_t ch, uint32_t secs)
 {
@@ -133,8 +138,7 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
     */
    if (!((ch <= 3) && (lvl <= 7) && (lvl >= 1) && (pri <= 7)))
    {
-		dbg("%s: illegal parameters (ch=%d, lvl=%d, pri=%d)\r\n", __FUNCTION__,
-				ch, lvl, pri);
+        dbg("illegal parameters (ch=%d, lvl=%d, pri=%d)\r\n", ch, lvl, pri);

        return false;
    }
@@ -154,16 +158,16 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
    /*
     * Register the timer interrupt handler
     */
-	if (!isr_register_handler(TIMER_VECTOR(ch), 
-				(int (*)(void *,void *)) timer_default_isr,
+    if (!isr_register_handler(TIMER_VECTOR(ch), 3, 0,
+                (bool (*)(void *,void *)) timer_default_isr,
                NULL,
                (void *) &net_timer[ch])
       )
    {
-		dbg("%s: could not register timer interrupt handler\r\n", __FUNCTION__);
+        dbg("could not register timer interrupt handler\r\n");
        return false;
    }
-	dbg("%s: timer handler registered\r\n", __FUNCTION__);
+    dbg("timer handler registered\r\n", __FUNCTION__);

    /*
     * Calculate the require CNT value to get a 1 second timeout
--- a/net/nif.c
+++ b/net/nif.c
@@ -11,12 +11,9 @@
 #include "bas_types.h"
 #include "bas_printf.h"

-#include <stdint.h>
-#include <stdbool.h>
-
 #define DBG_NIF
 #ifdef DBG_NIF
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_NIF */
@@ -56,13 +53,13 @@ void nif_protocol_handler(NIF *nif, uint16_t protocol, NBUF *pNbuf)
    {
        if (nif->protocol[index].protocol == protocol)
        {
-			dbg("%s: call protocol handler for protocol %d at %p\r\n", __FUNCTION__, protocol,
+            dbg("call protocol handler for protocol %d at %p\r\n", protocol,
                nif->protocol[index].handler);
            nif->protocol[index].handler(nif,pNbuf);
            return;
        }
    }
-	dbg("%s: no protocol handler found for protocol %d\r\n", __FUNCTION__, protocol);
+    dbg("no protocol handler found for protocol %d\r\n", protocol);
 }

 void *nif_get_protocol_info(NIF *nif, uint16_t protocol)
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -9,10 +9,7 @@
 *
 */

-#include <stdint.h>
-#include <stdbool.h>
-#include <stddef.h>
-
+#include "bas_types.h"
 #include "bas_printf.h"
 #include "bas_string.h"
 #include "net.h"
--- a/net/udp.c
+++ b/net/udp.c
@@ -14,7 +14,7 @@

 //#define DBG_UDP
 #if defined(DBG_UDP)
-#define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_UDP */
@@ -112,7 +112,7 @@ int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf)

    if (nif == NULL)
    {
-		dbg("%s: nif is NULL\r\n", __FUNCTION__);
+        dbg("nif is NULL\r\n");
        return 0;
    }

@@ -141,7 +141,7 @@ int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf)

    myip = ip_get_myip(nif_get_protocol_info(nif, ETH_FRM_IP));

-	dbg("%s: sent UDP request to %d.%d.%d.%d from %d.%d.%d.%d\r\n", __FUNCTION__,
+    dbg("sent UDP request to %d.%d.%d.%d from %d.%d.%d.%d\r\n",
            dest[0], dest[1], dest[2], dest[3],
            myip[0], myip[1], myip[2], myip[3]);

@@ -159,7 +159,7 @@ void udp_handler(NIF *nif, NBUF *pNbuf)

    udpframe = (udp_frame_hdr *) &pNbuf->data[pNbuf->offset];

-	dbg("%s: packet received\r\n", __FUNCTION__);
+    dbg("packet received\r\n",);

    /*
     * Adjust the length and valid data offset of the packet we are
@@ -176,7 +176,7 @@ void udp_handler(NIF *nif, NBUF *pNbuf)
        handler(nif, pNbuf);
    else
    {
-		dbg("%s: received UDP packet for non-supported port\n", __FUNCTION__);
+        dbg("received UDP packet for non-supported port\n");
        nbuf_free(pNbuf);
    }

--- a/pci/ehci-hcd.c
+++ b/pci/ehci-hcd.c
@@ -28,11 +28,17 @@
 #include "cache.h"
 #include "usb.h"
 #include "ehci.h"
+#include "pci.h"

-//extern xQueueHandle queue_poll_hub;
+#define DBG_EHCI
+#ifdef DBG_EHCI
+#define dbg(format, arg...) xprintf("DEBUG %s(): " format, __FUNCTION__, ## arg)
+#else
+#define dbg(format, arg...) do {} while (0)
+#endif /* DBG_EHCI */
+#define err(format, arg...) xprintf("ERROR %s(): " format, __FUNCTION__, ## arg)
+#define info(format, arg...) xprintf("INFO %s(): " format, __FUNCTION__, ## arg)

-#undef DEBUG
-#undef SHOW_INFO

 static char ehci_inited;
 static int rootdev;
@@ -40,7 +46,8 @@ static int rootdev;
 static uint16_t portreset;
 static uint16_t companion;

-struct descriptor {
+struct descriptor
+{
    struct usb_hub_descriptor hub;
    struct usb_device_descriptor device;
    struct usb_linux_config_descriptor config;
@@ -48,7 +55,8 @@ struct descriptor {
    struct usb_endpoint_descriptor endpoint;
 } __attribute__ ((packed));

-static struct descriptor rom_descriptor = {
+static struct descriptor rom_descriptor =
+{
 {
    0x8,	/* bDescLength */
    0x29,	/* bDescriptorType: hub descriptor */
@@ -106,12 +114,6 @@ static struct descriptor rom_descriptor = {
 },
 };

-#if defined(CONFIG_EHCI_IS_TDI)
-#define ehci_is_TDI()	(1)
-#else
-#define ehci_is_TDI()	(0)
-#endif
-
 struct pci_device_id ehci_usb_pci_table[] =
 {
 {
@@ -123,6 +125,15 @@ struct pci_device_id ehci_usb_pci_table[] =
    0,
    0
 }, /* NEC PCI OHCI module ids */
+{
+    PCI_VENDOR_ID_NEC,
+    PCI_DEVICE_ID_NEC_USB_3,
+    PCI_ANY_ID,
+    PCI_ANY_ID,
+    PCI_CLASS_SERIAL_USB_EHCI,
+    0,
+    0
+},
 {
    PCI_VENDOR_ID_PHILIPS,
    PCI_DEVICE_ID_PHILIPS_ISP1561_2,
@@ -166,25 +177,12 @@ static struct ehci
    const char *slot_name;
 } gehci;

-//#define DEBUG
-//#define SHOW_INFO
-
-#ifdef DEBUG
-#define debug(format, arg...) xprintf("DEBUG: " format "\r\n", ## arg)
-#else
-#define debug(format, arg...) do {} while (0)
-#endif /* DEBUG */
-#define err xprintf
-#ifdef SHOW_INFO
-#define info(format, arg...) xprintf("INFO: " format "\r\n", ## arg)
-#else
-#define info(format, arg...) do {} while (0)
-#endif
-
-
 static void cache_qtd(struct qTD *qtd, int flush)
 {
-	flush_and_invalidate_caches();
+    /*
+     * not needed
+     */
+    //flush_and_invalidate_caches();
 }

 static inline struct QH *qh_addr(struct QH *qh)
@@ -253,14 +251,18 @@ static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
    {
        result = ehci_readl(ptr);
        if (result == ~ (uint32_t) 0)
+        {
            return -1;
+        }
        result &= mask;
        if (result == done)
+        {
            return 0;
+        }
        wait(1);
        usec--;
-	}
-	while (usec > 0);
+    } while (usec > 0);
+
    return -1;
 }

@@ -271,35 +273,27 @@ static void ehci_free(void *p, size_t sz)
 static int ehci_reset(void)
 {
    uint32_t cmd;
-	uint32_t tmp;
-	uint32_t *reg_ptr;
    int ret = 0;

    if ((gehci.ent->vendor == PCI_VENDOR_ID_NEC) && (gehci.ent->device == PCI_DEVICE_ID_NEC_USB_2))
    {
-		debug("ehci_reset set 48MHz clock\r\n");
+        dbg("ehci_reset set 48MHz clock\r\n");
        pci_write_config_longword(gehci.handle, 0xE4, 0x20); // oscillator
+        wait(5);
    }
+
    cmd = ehci_readl(&gehci.hcor->or_usbcmd);
-	debug("%s cmd: 0x%08x\r\n", __FUNCTION__, cmd);
+    dbg("%s cmd: 0x%08x\r\n", __FUNCTION__, cmd);
+
    cmd |= CMD_RESET;
    ehci_writel(&gehci.hcor->or_usbcmd, cmd);
    ret = handshake((uint32_t *) &gehci.hcor->or_usbcmd, CMD_RESET, 0, 250);
-
    if (ret < 0)
    {
-		err("EHCI fail to reset");
+        err("*** EHCI fail to reset! ***\r\n");
        goto out;
    }

-	if (ehci_is_TDI())
-	{
-		reg_ptr = (uint32_t *)((u8 *)gehci.hcor + USBMODE);
-		tmp = ehci_readl(reg_ptr);
-		tmp |= USBMODE_CM_HC;
-		tmp |= USBMODE_BE;
-		ehci_writel(reg_ptr, tmp);
-	}
 out:
    return ret;
 }
@@ -318,7 +312,7 @@ static void *ehci_alloc(size_t sz, size_t align)
        case sizeof(struct qTD):
            if (ntds == 3)
            {
-				debug("out of TDs\r\n");
+                dbg("out of TDs\r\n");
                return NULL;
            }
            p = gehci.td[ntds];
@@ -326,7 +320,7 @@ static void *ehci_alloc(size_t sz, size_t align)
            break;

        default:
-			debug("unknown allocation size\r\n");
+            dbg("unknown allocation size\r\n");
            return NULL;
    }
    memset(p, sz, 0);
@@ -357,7 +351,7 @@ static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)

    if (idx == 5)
    {
-		debug("out of buffer pointers (%u bytes left)\r\n", sz);
+        dbg("out of buffer pointers (%u bytes left)\r\n", sz);
        return -1;
    }
    return 0;
@@ -370,23 +364,28 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
    volatile struct qTD *vtd;
    uint32_t ts;
    uint32_t *tdp;
-	uint32_t endpt, token, usbsts;
-	uint32_t c, toggle;
+    uint32_t endpt;
+    uint32_t token;
+    uint32_t usbsts;
+    uint32_t c;
+    uint32_t toggle;
    uint32_t cmd;
    int ret = 0;

-	debug("%s: dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\r\n", __FUNCTION__, dev, pipe, buffer, length, req);
+    dbg("%s: dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\r\n", __FUNCTION__, dev, pipe, buffer, length, req);

+#ifdef DBG_EHCI
    if (req != NULL)
-		debug("ehci_submit_async req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\r\n",
+        dbg("ehci_submit_async req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\r\n",
            req->request, req->request,
            req->requesttype, req->requesttype,
            swpw(req->value), swpw(req->value), swpw(req->index));
+#endif /* DBG_EHCI */

    qh = ehci_alloc(sizeof(struct QH), 32);
    if (qh == NULL)
    {
-		debug("unable to allocate QH\r\n");
+        dbg("unable to allocate QH\r\n");
        return -1;
    }
    qh->qh_link = swpl(((uint32_t) gehci.qh_list - gehci.dma_offset) | QH_LINK_TYPE_QH);
@@ -419,7 +418,7 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
        td = ehci_alloc(sizeof(struct qTD), 32);
        if (td == NULL)
        {
-			debug("unable to allocate SETUP td\r\n");
+            dbg("unable to allocate SETUP td\r\n");
            goto fail;
        }
        td->qt_next = swpl(QT_NEXT_TERMINATE);
@@ -428,7 +427,7 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
        td->qt_token = swpl(token);
        if (ehci_td_buffer(td, req, sizeof(*req)) != 0)
        {
-			debug("unable construct SETUP td\r\n");
+            dbg("unable construct SETUP td\r\n");
            ehci_free(td, sizeof(*td));
            goto fail;
        }
@@ -442,7 +441,7 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
        td = ehci_alloc(sizeof(struct qTD), 32);
        if (td == NULL)
        {
-			debug("unable to allocate DATA td\r\n");
+            dbg("unable to allocate DATA td\r\n");
            goto fail;
        }
        td->qt_next = swpl(QT_NEXT_TERMINATE);
@@ -451,7 +450,7 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
        td->qt_token = swpl(token);
        if (ehci_td_buffer(td, buffer, length) != 0)
        {
-			debug("unable construct DATA td\r\n");
+            dbg("unable construct DATA td\r\n");
            ehci_free(td, sizeof(*td));
            goto fail;
        }
@@ -464,7 +463,7 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
        td = ehci_alloc(sizeof(struct qTD), 32);
        if (td == NULL)
        {
-			debug("unable to allocate ACK td\r\n");
+            dbg("unable to allocate ACK td\r\n");
            goto fail;
        }
        td->qt_next = swpl(QT_NEXT_TERMINATE);
@@ -476,10 +475,12 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
    }

    gehci.qh_list->qh_link = swpl(((uint32_t)qh - gehci.dma_offset) | QH_LINK_TYPE_QH);
+
    /* Flush dcache */
    ehci_flush_dcache(gehci.qh_list);
    usbsts = ehci_readl(&gehci.hcor->or_usbsts);
    ehci_writel(&gehci.hcor->or_usbsts, (usbsts & 0x3f));
+
    /* Enable async. schedule. */
    cmd = ehci_readl(&gehci.hcor->or_usbcmd);
    cmd |= CMD_ASE;
@@ -491,6 +492,7 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
        err("EHCI fail timeout STD_ASS set (usbsts=%#x)", ehci_readl(&gehci.hcor->or_usbsts));
        goto fail;
    }
+
    /* Wait for TDs to be processed. */
    ts = 0;
    vtd = td;
@@ -500,11 +502,13 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
        ehci_invalidate_dcache(gehci.qh_list);
        token = swpl(vtd->qt_token);
        if (!(token & 0x80))
+        {
            break;
+        }
        wait(1 * 1000);
        ts++;
-	}
-	while(ts < 1000);
+    } while (ts < 1000);
+
    /* Disable async schedule. */
    cmd = ehci_readl(&gehci.hcor->or_usbcmd);
    cmd &= ~CMD_ASE;
@@ -520,7 +524,7 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
    token = swpl(qh->qh_overlay.qt_token);
    if (!(token & 0x80))
    {
-		debug("TOKEN=%#x\r\n", token);
+        dbg("TOKEN=%#x\r\n", token);
        switch(token & 0xfc)
        {
            case 0:
@@ -552,7 +556,7 @@ static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer
    else
    {
        dev->act_len = 0;
-		debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\r\n",
+        dbg("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\r\n",
            dev->devnum, ehci_readl(&gehci.hcor->or_usbsts),
            ehci_readl(&gehci.hcor->or_portsc[0]), ehci_readl(&gehci.hcor->or_portsc[1]));
    }
@@ -601,35 +605,38 @@ static int ehci_submit_root(struct usb_device *dev, uint32_t pipe, void *buffer,
    int len, srclen;
    uint32_t reg;
    uint32_t *status_reg;
+
    if (swpw(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
    {
        err("the requested port(%d) is not configured\r\n", swpw(req->index) - 1);
        return -1;
    }
+
    status_reg = (uint32_t *) &gehci.hcor->or_portsc[swpw(req->index) - 1];
    srclen = 0;
-	debug("ehci_submit_root req=%u (%#x), type=%u (%#x), value=%u, index=%u\r\n",
+    dbg("ehci_submit_root req=%u (%#x), type=%u (%#x), value=%u, index=%u\r\n",
        req->request, req->request, req->requesttype, req->requesttype, swpw(req->value), swpw(req->index));
    typeReq = req->request | req->requesttype << 8;
+
    switch(typeReq)
    {
        case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
            switch(swpw(req->value) >> 8)
            {
                case USB_DT_DEVICE:
-					debug("USB_DT_DEVICE request\r\n");
+                    dbg("USB_DT_DEVICE request\r\n");
                    srcptr = &gehci.descriptor->device;
                    srclen = 0x12;
                    break;

                case USB_DT_CONFIG:
-					debug("USB_DT_CONFIG config\r\n");
+                    dbg("USB_DT_CONFIG config\r\n");
                    srcptr = &gehci.descriptor->config;
                    srclen = 0x19;
                    break;

                case USB_DT_STRING:
-					debug("USB_DT_STRING config\r\n");
+                    dbg("USB_DT_STRING config\r\n");
                    switch(swpw(req->value) & 0xff)
                    {
                        case 0:	/* Language */
@@ -648,13 +655,13 @@ static int ehci_submit_root(struct usb_device *dev, uint32_t pipe, void *buffer,
                            break;

                        default:
-							debug("unknown value DT_STRING %x\r\n",
+                            dbg("unknown value DT_STRING %x\r\n",
                                swpw(req->value));
                            goto unknown;
                    }
                    break;
                default:
-					debug("unknown value %x\r\n", swpw(req->value));
+                    dbg("unknown value %x\r\n", swpw(req->value));
                    goto unknown;
            }
            break;
@@ -663,24 +670,24 @@ static int ehci_submit_root(struct usb_device *dev, uint32_t pipe, void *buffer,
            switch(swpw(req->value) >> 8)
            {
                case USB_DT_HUB:
-					debug("USB_DT_HUB config\r\n");
+                    dbg("USB_DT_HUB config\r\n");
                    srcptr = &gehci.descriptor->hub;
                    srclen = 0x8;
                    break;

                default:
-					debug("unknown value %x\r\n", swpw(req->value));
+                    dbg("unknown value %x\r\n", swpw(req->value));
                    goto unknown;
            }
            break;

        case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
-			debug("USB_REQ_SET_ADDRESS\r\n");
+            dbg("USB_REQ_SET_ADDRESS\r\n");
            rootdev = swpw(req->value);
            break;

        case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
-			debug("USB_REQ_SET_CONFIGURATION\r\n");
+            dbg("USB_REQ_SET_CONFIGURATION\r\n");
            /* Nothing to do */
            break;

@@ -721,24 +728,7 @@ static int ehci_submit_root(struct usb_device *dev, uint32_t pipe, void *buffer,
                tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
            if (reg & EHCI_PS_PP)
                tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
-			if (ehci_is_TDI())
-			{
-				switch((reg >> 26) & 3)
-				{
-					case 0:
-						break;

-					case 1:
-						tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
-						break;
-
-					case 2:
-					default:
-						tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
-						break;
-				}
-			}
-			else
            tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;

            if (reg & EHCI_PS_CSC)
@@ -773,10 +763,10 @@ static int ehci_submit_root(struct usb_device *dev, uint32_t pipe, void *buffer,
                    break;

                case USB_PORT_FEAT_RESET:
-					if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS && !ehci_is_TDI() && EHCI_PS_IS_LOWSPEED(reg))
+                    if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS && EHCI_PS_IS_LOWSPEED(reg))
                    {
                        /* Low speed device, give up ownership. */
-						debug("port %d low speed --> companion\r\n", swpw(req->index));
+                        dbg("port %d low speed --> companion\r\n", swpw(req->index));
                        reg |= EHCI_PS_PO;
                        ehci_writel(status_reg, reg);
                        companion |= (1 << swpw(req->index));
@@ -797,7 +787,7 @@ static int ehci_submit_root(struct usb_device *dev, uint32_t pipe, void *buffer,
                    break;

                default:
-					debug("unknown feature %x\r\n", swpw(req->value));
+                    dbg("unknown feature %x\r\n", swpw(req->value));
                    goto unknown;
            }
            /* unblock posted writes */
@@ -832,7 +822,7 @@ static int ehci_submit_root(struct usb_device *dev, uint32_t pipe, void *buffer,
                    break;

                default:
-					debug("unknown feature %x\r\n", swpw(req->value));
+                    dbg("unknown feature %x\r\n", swpw(req->value));
                    goto unknown;
            }
            ehci_writel(status_reg, reg);
@@ -841,7 +831,7 @@ static int ehci_submit_root(struct usb_device *dev, uint32_t pipe, void *buffer,
            break;

        default:
-			debug("Unknown request\r\n");
+            dbg("Unknown request\r\n");
            goto unknown;
    }
    wait(1 * 1000);
@@ -849,12 +839,12 @@ static int ehci_submit_root(struct usb_device *dev, uint32_t pipe, void *buffer,
    if (srcptr != NULL && len > 0)
        memcpy(buffer, srcptr, len);
    else
-		debug("Len is 0\r\n");
+        dbg("Len is 0\r\n");
    dev->act_len = len;
    dev->status = 0;
    return 0;
 unknown:
-	debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\r\n",
+    dbg("Unknown: requesttype=%x, request=%x, value=%x, index=%x, length=%x\r\n",
        req->requesttype, req->request, swpw(req->value), swpw(req->index), swpw(req->length));
    dev->act_len = 0;
    dev->status = USB_ST_STALLED;
@@ -865,10 +855,14 @@ unknown:
 static int hc_interrupt(struct ehci *ehci)
 {
    uint32_t status = ehci_readl(&ehci->hcor->or_usbsts);
+
+    dbg("\r\n");
+
    if (status & STS_PCD) /* port change detect */
    {
        uint32_t reg = ehci_readl(&ehci->hccr->cr_hcsparams);
        uint32_t i = HCS_N_PORTS(reg);
+
        while(i)
        {
            uint32_t pstatus = ehci_readl(&ehci->hcor->or_portsc[i-1]);
@@ -889,7 +883,7 @@ static int hc_interrupt(struct ehci *ehci)
    }
    ehci_writel(&ehci->hcor->or_usbsts, status);

-	return(1); /* interrupt was from this card */
+    return 1; /* interrupt was from this card */
 }

 void ehci_usb_enable_interrupt(int enable)
@@ -899,7 +893,7 @@ void ehci_usb_enable_interrupt(int enable)

 static int handle_usb_interrupt(struct ehci *ehci)
 {
-	return(hc_interrupt(ehci));
+    return hc_interrupt(ehci);
 }

 static void hc_free_buffers(struct ehci *ehci)
@@ -950,14 +944,17 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
        gehci.ent = ent;
    }
    else if (!gehci.handle) /* for restart USB cmd */
-		return(-1);	
+    {
+        dbg("!gehci.handle\r\n");
+        return -1;
+    }

    gehci.qh_list_unaligned = (struct QH *) driver_mem_alloc(sizeof(struct QH) + 32);
    if (gehci.qh_list_unaligned == NULL)
    {
-		debug("QHs malloc failed");
+        dbg("QHs malloc failed\r\n");
        hc_free_buffers(&gehci);
-		return(-1);
+        return -1;
    }

    gehci.qh_list = (struct QH *)(((uint32_t)gehci.qh_list_unaligned + 31) & ~31);
@@ -966,9 +963,10 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **

    if (gehci.qh_unaligned == NULL)
    {
-		debug("QHs malloc failed");
+        dbg("QHs malloc failed\r\n");
        hc_free_buffers(&gehci);
-		return(-1);
+
+        return -1;
    }
    gehci.qh = (struct QH *)(((uint32_t) gehci.qh_unaligned + 31) & ~31);
    memset(gehci.qh, 0, sizeof(struct QH));
@@ -978,9 +976,10 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
        gehci.td_unaligned[i] = (struct qTD *) driver_mem_alloc(sizeof(struct qTD) + 32);
        if (gehci.td_unaligned[i] == NULL)
        {
-			debug("TDs malloc failed");
+            dbg("TDs malloc failed\r\n");
            hc_free_buffers(&gehci);
-			return(-1);
+
+            return -1;
        }
        gehci.td[i] = (struct qTD *)(((uint32_t) gehci.td_unaligned[i] + 31) & ~31);
        memset(gehci.td[i], 0, sizeof(struct qTD));
@@ -989,9 +988,10 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
    gehci.descriptor = (struct descriptor *) driver_mem_alloc(sizeof(struct descriptor));
    if (gehci.descriptor == NULL)
    {
-		debug("decriptor malloc failed");
+        dbg("decriptor malloc failed\r\n");
        hc_free_buffers(&gehci);
-		return(-1);
+
+        return -1;
    }
    memcpy(gehci.descriptor, &rom_descriptor, sizeof(struct descriptor));

@@ -1000,7 +1000,7 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
        unsigned short flags;
        do
        {
-			debug("PCI USB descriptors (at %p): flags 0x%04x start 0x%08lx \r\n offset 0x%08lx dmaoffset 0x%08lx length 0x%08lx\r\n", pci_rsc_desc,
+            dbg("PCI USB descriptors (at %p): flags 0x%04x start 0x%08lx \r\n offset 0x%08lx dmaoffset 0x%08lx length 0x%08lx\r\n", pci_rsc_desc,
                pci_rsc_desc->flags, pci_rsc_desc->start, pci_rsc_desc->offset, pci_rsc_desc->dmaoffset, pci_rsc_desc->length);
            if (!(pci_rsc_desc->flags & FLG_IO))
            {
@@ -1023,7 +1023,9 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
    else
    {
        hc_free_buffers(&gehci);
-		return(-1); /* get_resource error */
+        dbg("pci_get_resource() error\r\n");
+
+        return -1;
    }

    if (usb_base_addr == 0xFFFFFFFF)
@@ -1048,7 +1050,10 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
    if (ehci_reset() != 0)
    {
        hc_free_buffers(&gehci);
-		return(-1);
+
+        dbg("ehci_reset() failed\r\n");
+
+        return -1;
    }

    /* Set head of reclaim list */
@@ -1058,20 +1063,28 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
    gehci.qh_list->qh_overlay.qt_next = swpl(QT_NEXT_TERMINATE);
    gehci.qh_list->qh_overlay.qt_altnext = swpl(QT_NEXT_TERMINATE);
    gehci.qh_list->qh_overlay.qt_token = swpl(0x40);
+
    /* Set async. queue head pointer. */
    ehci_writel(&gehci.hcor->or_asynclistaddr, (uint32_t) gehci.qh_list - gehci.dma_offset);
    reg = ehci_readl(&gehci.hccr->cr_hcsparams);
    gehci.descriptor->hub.bNbrPorts = HCS_N_PORTS(reg);
-	info("Register %x NbrPorts %d", reg, gehci.descriptor->hub.bNbrPorts);
+    info("Register %x NbrPorts %d\r\n", reg, gehci.descriptor->hub.bNbrPorts);

    /* Port Indicators */
    if (HCS_INDICATOR(reg))
+    {
        gehci.descriptor->hub.wHubCharacteristics |= 0x80;
+    }
+
    /* Port Power Control */
    if (HCS_PPC(reg))
+    {
        gehci.descriptor->hub.wHubCharacteristics |= 0x01;
+    }
+
    /* Start the host controller. */
    cmd = ehci_readl(&gehci.hcor->or_usbcmd);
+
    /*
     * Philips, Intel, and maybe others need CMD_RUN before the
     * root hub will detect new devices (why?); NEC doesn't
@@ -1079,21 +1092,29 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
    cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
    cmd |= CMD_RUN;
    ehci_writel(&gehci.hcor->or_usbcmd, cmd);
+
    /* take control over the ports */
    ehci_writel(&gehci.hcor->or_configflag, FLAG_CF);
+
    /* unblock posted write */
    cmd = ehci_readl(&gehci.hcor->or_usbcmd);
    wait(5 * 1000);
+
    reg = HC_VERSION(ehci_readl(&gehci.hccr->cr_capbase));
-	info("USB EHCI %x.%02x", reg >> 8, reg & 0xff);
+    info("USB EHCI host controller version %x.%02x\r\n", reg >> 8, reg & 0xff);
+
    /* turn on interrupts */
    pci_hook_interrupt(handle, handle_usb_interrupt, &gehci);
    ehci_writel(&gehci.hcor->or_usbintr, INTR_PCDE);
+
    rootdev = 0;
    if (priv != NULL)
+    {
        *priv = (void *) &gehci;
+    }
    ehci_inited = 1;
-	return(0);
+
+    return 0;
 }

 int ehci_usb_lowlevel_stop(void *priv)
@@ -1129,7 +1150,7 @@ int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, in
 {
    if (usb_pipetype(pipe) != PIPE_BULK)
    {
-		debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
+        dbg("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
        return -1;
    }
    return ehci_submit_async(dev, pipe, buffer, length, NULL);
@@ -1139,7 +1160,7 @@ int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer,
 {
    if (usb_pipetype(pipe) != PIPE_CONTROL)
    {
-		debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
+        dbg("non-control pipe (type=%lu)", usb_pipetype(pipe));
        return -1;
    }

@@ -1154,7 +1175,7 @@ int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer,

 int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int length, int interval)
 {
-	debug("submit_int_msg dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", dev, pipe, buffer, length, interval);
+    dbg("submit_int_msg dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", dev, pipe, buffer, length, interval);
    return -1;
 }

--- a/pci/ohci-hcd.c
+++ b/pci/ohci-hcd.c
--- a/pci/pci.c
+++ b/pci/pci.c
@@ -26,7 +26,7 @@

 #include <MCF5475.h>
 #include "pci.h"
-#include "stdint.h"
+#include "bas_types.h"
 #include "bas_printf.h"
 #include "bas_string.h"
 #include "util.h"
@@ -35,10 +35,11 @@

 //#define DEBUG_PCI
 #ifdef DEBUG_PCI
-#define dbg(format, arg...) do { xprintf("DEBUG: " format "", ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DEBUG_PCI */
+#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0)

 #define pci_config_wait() do { __asm__ __volatile("tpf" ::: "memory"); } while (0)

@@ -76,23 +77,28 @@ static int num_pci_classes = sizeof(pci_classes) / sizeof(struct pci_class);
 #define NUM_CARDS       10
 #define NUM_RESOURCES   7
 /* holds the handle of a card at position = array index */
-static int32_t handles[NUM_CARDS];	
-
-/* holds the interrupt handler addresses (see pci_hook_interrupt() and pci_unhook_interrupt()) of the PCI cards */
-struct pci_interrupt
-{
-	void (*handler)(void);
-	int32_t parameter;
-	struct pci_interrupt *next;
-};
-#define MAX_INTERRUPTS	(NUM_CARDS * 3)
-static struct pci_interrupt interrupts[MAX_INTERRUPTS];
+static int32_t handles[NUM_CARDS] = { -1 };

 /* holds the card's resource descriptors; filled in pci_device_config() */
 static struct pci_rd resource_descriptors[NUM_CARDS][NUM_RESOURCES];

+/*
+ * holds the interrupt handler addresses (see pci_hook_interrupt()
+ * and pci_unhook_interrupt()) of the PCI cards
+ */
+struct pci_interrupt
+{
+    int32_t handle;
+    int irq;
+    pci_interrupt_handler handler;
+    int32_t parameter;
+    struct pci_interrupt *next;
+};

-__attribute__((aligned(16))) void chip_errata_135(void)
+#define MAX_INTERRUPTS  (NUM_CARDS * 3)
+static struct pci_interrupt interrupts[MAX_INTERRUPTS];
+
+static inline __attribute__((aligned(16))) void chip_errata_135(void)
 {
    /*
     * Errata type: Silicon
@@ -126,101 +132,91 @@ __attribute__((aligned(16))) void chip_errata_135(void)
        "       tpf.l   #0x0            \n\t"
        "       tpf.l   #0x0            \n\t"
        "       tpf.l   #0x0            \n\t"
-		::: "memory");
+        ::: "d0", "memory");
 }

-
-
-__attribute__((interrupt)) void pci_arb_interrupt(void)
+static inline void chip_errata_055(int32_t handle)
 {
-	dbg("XLBARB slave error interrupt\r\n");
-	MCF_XLB_XARB_SR |= ~MCF_XLB_XARB_SR_SEA;
+    uint32_t dummy;
+
+    return;     /* test */
+
+    /* initiate PCI configuration access to device */
+    MCF_PCI_PCICAR = MCF_PCI_PCICAR_E |         /* enable configuration access special cycle */
+            MCF_PCI_PCICAR_BUSNUM(3) |          /* note: invalid bus number */
+            MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */
+            MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) |  /* function number */
+            MCF_PCI_PCICAR_DWORD(0);
+
+    /* issue a dummy read to an unsupported bus number (will fail) */
+    dummy =  * (volatile uint32_t *) PCI_IO_OFFSET; /* access device */
+
+    /* silently clear the PCI errors we produced just now */
+    MCF_PCI_PCIISR = 0xffffffff;     /* clear all errors */
+    MCF_PCI_PCIGSCR = MCF_PCI_PCIGSCR_PE | MCF_PCI_PCIGSCR_SE;
+
+    (void) dummy;
 }

-__attribute__((interrupt)) void xlb_pci_interrupt(void)
-{
-	dbg("XLBPCI interrupt\r\n");
-}
+/*
+ * Although this pragma stuff should work according to the GCC docs, it doesn't seem to
+ * with m68k-atari-mint-gcc. At least not currently.
+ * I nevertheless keep it here for future reference
+ */
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wunused-function"

-__attribute__((interrupt)) void pci_interrupt(void)
-{
-	dbg("PCI interrupt\r\n");
-}
-
-static int32_t pci_get_interrupt_cause(int32_t *handles)
+int32_t pci_get_interrupt_cause(void)
 {
    int32_t handle;
-
-	while ((handle = *handles++) != -1)
+    int32_t *hdl = &handles[0];
+    /*
+     * loop through all PCI devices...
+     */
+    dbg("");
+    while ((handle = *hdl++) != -1)
    {
-		uint32_t csr = swpl(pci_read_config_longword(handle, PCICSR)); 
+        uint16_t command_register = swpw(pci_read_config_word(handle, PCICR));
+        uint16_t status_register = swpw(pci_read_config_word(handle, PCISR));

-		if ((csr & (1 << 3)) && (csr & !(csr & (1 << 10))))
+        /*
+         * ...to see which device caused the interrupt
+         */
+        if ((status_register & PCICSR_INTERRUPT) && !(command_register & PCICSR_INT_DISABLE))
        {
            /* device has interrupts enabled and has an active interrupt, so its probably ours */

            return handle;
        }
    }
-	dbg("%s: no interrupt cause found\r\n", __FUNCTION__);
+    dbg("no interrupt cause found\r\n");
    return -1;
 }

-static int32_t pci_call_interrupt_chain(int32_t handle, int32_t data)
+int32_t pci_call_interrupt_chain(int32_t handle, int32_t data)
 {
+    int i;
+
+    dbg("");
+    for (i = 0; i < MAX_INTERRUPTS; i++)
+    {
+        if (interrupts[i].handle == handle)
+        {
+            interrupts[i].handler(data);
+
+            return 1;
+        }
+    }
    return data;    /* unmodified - means: not handled */
 }
+#pragma GCC diagnostic pop

-#ifdef MACHINE_M5484LITE
-/*
- * This gets called from irq5 in exceptions.S
- * Once we arrive here, the SR has been set to disable interrupts and the gcc scratch registers have been saved
- */
-void irq5_handler(void)
-{
-	int32_t handle;
-	int32_t value;
-	int32_t newvalue;

-	MCF_EPORT_EPFR |= (1 << 5);		/* clear interrupt from edge port */
-	xprintf("IRQ5!\r\n");
-	if ((handle = pci_get_interrupt_cause(handles)) > 0)
-	{
-		newvalue = pci_call_interrupt_chain(handle, value);
-		if (newvalue == value)
-		{
-			dbg("%s: interrupt not handled!\r\n", __FUNCTION__);
-		}
-	}
-}
-
-/*
- * This gets called from irq7 in exceptions.S
- * Once we arrive here, the SR has been set to disable interrupts and the gcc scratch registers have been saved
- */
-void irq7_handler(void)
-{
-	int32_t handle;
-	int32_t value;
-	int32_t newvalue;
-
-	MCF_EPORT_EPFR |= (1 << 7);
-	dbg("IRQ7!\r\n");
-	if ((handle = pci_get_interrupt_cause(handles)) > 0)
-	{
-		newvalue = pci_call_interrupt_chain(handle, value);
-		if (newvalue == value)
-		{
-			dbg("%s: interrupt not handled!\r\n", __FUNCTION__);
-		}
-	}
-}
-#endif /* MACHINE_M548X */

 /*
 * retrieve handle for i'th device
 */
-static int handle2index(int32_t handle)
+int pci_handle2index(int32_t handle)
 {
    int i;

@@ -248,7 +244,63 @@ static char *device_class(int classcode)
            return pci_classes[i].description;
        }
    }
-	return "not found";
+    return "unknown device class";
+}
+
+/*
+ * do error checking after a PCI transaction
+ */
+static int pci_check_status(void)
+{
+    uint32_t pcisr;
+    uint32_t pcigscr;
+
+    int ret = 0;
+
+    pcisr = MCF_PCI_PCIISR;             /* retrieve initiator status register */
+
+    if (pcisr & MCF_PCI_PCIISR_RE)
+    {
+        dbg("PCI initiator retry error. Cleared.\r\n");
+        MCF_PCI_PCIISR |= MCF_PCI_PCIISR_RE;
+
+        ret = 1;
+    }
+
+    if (pcisr & MCF_PCI_PCIISR_IA)
+    {
+        dbg("PCI initiator abort. Error cleared\r\n");
+        MCF_PCI_PCIISR |= MCF_PCI_PCIISR_IA;
+
+        ret = 1;
+    }
+
+    if (pcisr & MCF_PCI_PCIISR_TA)
+    {
+        dbg("PCI initiator target abort error. Error cleared\r\n");
+        MCF_PCI_PCIISR |= MCF_PCI_PCIISR_TA;
+
+        ret = 1;
+    }
+
+    pcigscr = MCF_PCI_PCIGSCR;
+
+    if (pcigscr & MCF_PCI_PCIGSCR_PE)
+    {
+        dbg("PCI parity error. Error cleared\r\n");
+        MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_PE;
+
+        ret = 1;
+    }
+
+    if (pcigscr & MCF_PCI_PCIGSCR_SE)
+    {
+        dbg("PCI system error. Error cleared\r\n");
+        MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_SE;
+
+        ret = 1;
+    }
+    return ret;
 }

 /*
@@ -267,16 +319,17 @@ uint32_t pci_read_config_longword(int32_t handle, int offset)
            MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) |  /* function number */
            MCF_PCI_PCICAR_DWORD(offset / 4);

-	__asm__ __volatile__("nop" ::: "memory");				/* this is what the Linux BSP does */
+    NOP();

-	pci_config_wait();
    value =  * (volatile uint32_t *) PCI_IO_OFFSET; /* access device */

-	__asm__ __volatile__("tpf" ::: "memory");				/* this is what the Linux BSP does */
+    NOP();

    /* finish PCI configuration access special cycle (allow regular PCI accesses) */
    MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;

+    pci_check_status();
+
    return value;
 }

@@ -293,15 +346,17 @@ uint16_t pci_read_config_word(int32_t handle, int offset)
            MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) |
            MCF_PCI_PCICAR_DWORD(offset / 4);

-	__asm__ __volatile("nop" ::: "memory");			/* this is what Linux BSP does */
+    NOP();

    value = * (volatile uint16_t *) PCI_IO_OFFSET + (offset & 2);

-	__asm__ __volatile("tpf" ::: "memory");
+    NOP();

    /* finish PCI configuration access special cycle */
    MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;

+    pci_check_status();
+
    return value;
 }

@@ -316,14 +371,16 @@ uint8_t pci_read_config_byte(int32_t handle, int offset)
        MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) |  /* function number */
        MCF_PCI_PCICAR_DWORD(offset / 4);

-	__asm__ __volatile__("nop" ::: "memory");
+    NOP();

    value = * (volatile uint8_t *) (PCI_IO_OFFSET + (offset & 3));

-	__asm__ __volatile__("tpf" ::: "memory");
+    NOP();

    MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;

+    pci_check_status();
+
    return value;
 }

@@ -335,22 +392,30 @@ uint8_t pci_read_config_byte(int32_t handle, int offset)
 int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t value)
 {
    /* initiate PCI configuration access to device */
+
+    dbg("initiate configuration access\r\n");
+
    MCF_PCI_PCICAR = MCF_PCI_PCICAR_E |             /* enable configuration access special cycle */
        MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) |
        MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) |     /* device number, devices 0 - 9 are reserved */
        MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) |  /* function number */
        MCF_PCI_PCICAR_DWORD(offset / 4);

-	__asm__ __volatile__("nop" ::: "memory");
+    NOP();

+    dbg("access device\r\n");
    * (volatile uint32_t *) PCI_IO_OFFSET = value;  /* access device */

-	__asm__ __volatile__("tpf" ::: "memory");
+    dbg("chip errata\r\n");
+    chip_errata_135();

+    NOP();
+
+    dbg("finish config space access cycle\r\n");
    /* finish configuration space access cycle */
    MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;

-	chip_errata_135();
+    pci_check_status();

    return PCI_SUCCESSFUL;
 }
@@ -366,17 +431,17 @@ int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value)
            MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) |
            MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) |
            MCF_PCI_PCICAR_DWORD(offset / 4);
+    chip_errata_135();

-	__asm__ __volatile__("tpf" ::: "memory");
+    NOP();

    * (volatile uint16_t *) (PCI_IO_OFFSET + (offset & 2)) = value;
-	
-	__asm__ __volatile__("tpf" ::: "memory");
+    chip_errata_135();

    /* finish configuration space access cycle */
    MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;

-	chip_errata_135();
+    pci_check_status();

    return PCI_SUCCESSFUL;
 }
@@ -391,17 +456,19 @@ int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value)
            MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) |
            MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) |
            MCF_PCI_PCICAR_DWORD(offset / 4);
+    chip_errata_135();

-	__asm__ __volatile__("tpf" ::: "memory");
+    NOP();

    * (volatile uint8_t *) (PCI_IO_OFFSET + (offset & 3)) = value;
+    chip_errata_135();

    __asm__ __volatile__("tpf" ::: "memory");

    /* finish configuration space access cycle */
    MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;

-	chip_errata_135();
+    pci_check_status();

    return PCI_SUCCESSFUL;
 }
@@ -415,11 +482,15 @@ struct pci_rd *pci_get_resource(int32_t handle)
    int index = -1;
    struct pci_rd *ret;

-	index = handle2index(handle);
+    index = pci_handle2index(handle);
    if (index == -1)
+    {
        ret = NULL;
+    }
    else
+    {
        ret = &resource_descriptors[index][0];
+    }

    dbg("pci_get_resource: resource struct for handle %lx (index %d) is at %p\r\n", handle, index, ret);

@@ -440,7 +511,7 @@ int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index)
    uint16_t n = 0;
    int32_t handle;

-	for (bus = 0; bus < 2; bus++)
+    for (bus = 0; bus < 1; bus++)
    {
        for (device = 10; device < 31; device++)
        {
@@ -474,10 +545,10 @@ int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index)
                    {
                        handle = PCI_HANDLE(bus, device, function);
                        value = pci_read_config_longword(handle, PCIIDR);
-						if (value != 0xFFFFFFFF)	/* device found */
+                        if (value != 0xffffffff)    /* device found */
                        {
                            if (vendor_id == 0xffff ||
-								(PCI_VENDOR_ID(value) == vendor_id && PCI_DEVICE_ID(value) == device_id))
+                                ((PCI_VENDOR_ID(value) == vendor_id) && (PCI_DEVICE_ID(value) == device_id)))
                            {
                                if (n == index)
                                {
@@ -498,6 +569,7 @@ int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index)
 * pci_find_classcode(uint32_t classcode, int index)
 *
 * Find the index'th pci device with a specific classcode. Bits 0-23 describe this classcode.
+ *
 * Bits 24 - 26 describe what needs to match: 24: prog interface, 25: PCI subclass, 26: PCI base class.
 * If no bits are set, there is a match for each device.
 */
@@ -517,6 +589,7 @@ int32_t pci_find_classcode(uint32_t classcode, int index)
            uint8_t htr;

            handle = PCI_HANDLE(bus, device, 0);
+            dbg("check handle %d\r\n", handle);

            value = pci_read_config_longword(handle, PCIIDR);

@@ -524,6 +597,11 @@ int32_t pci_find_classcode(uint32_t classcode, int index)
            {
                value = pci_read_config_longword(handle, PCICCR);

+                dbg("classcode to search for=%x\r\n", classcode);
+                dbg("PCI_CLASSCODE found=%x\r\n", PCI_CLASS_CODE(value));
+                dbg("PCI_SUBCLASS found=%x\r\n", PCI_SUBCLASS(value));
+                dbg("PCI_PROG_IF found=%x\r\n", PCI_PROG_IF(value));
+
                if ((classcode & (1 << 26) ? ((PCI_CLASS_CODE(value) == (classcode & 0xff))) : true) &&
                    (classcode & (1 << 25) ? ((PCI_SUBCLASS(value) == ((classcode & 0xff00) >> 8))) : true) &&
                    (classcode & (1 << 24) ? ((PCI_PROG_IF(value) == ((classcode & 0xff0000) >> 16))) : true))
@@ -574,20 +652,205 @@ int32_t pci_find_classcode(uint32_t classcode, int index)

 int32_t pci_hook_interrupt(int32_t handle, void *handler, void *parameter)
 {
-	/* FIXME: implement */
-	dbg("pci_hook_interrupt() still not implemented\r\n");
+    int i;
+
+    // pci_interrupt_handler h = handler;
+
+    /*
+     * find empty slot
+     */
+    for (i = 0; i < MAX_INTERRUPTS; i++)
+    {
+        if (interrupts[i].handle == 0)
+        {
+            interrupts[i].handle = handle;
+            interrupts[i].handler = handler;
+            interrupts[i].parameter = (int32_t) parameter;
+
            return PCI_SUCCESSFUL;
        }
+    }
+    return PCI_BUFFER_TOO_SMALL;
+}

 int32_t pci_unhook_interrupt(int32_t handle)
 {
-	/* FIXME: implement */
+    int i;
+
+    for (i = 0; i < MAX_INTERRUPTS; i++)
+    {
+        if (interrupts[i].handle == handle)
+        {
+            memset(&interrupts[i], 0, sizeof(struct pci_interrupt));

-	dbg("pci_unhook_interrupt() still not implemented\r\n");
            return PCI_SUCCESSFUL;
        }
+    }
+    return PCI_DEVICE_NOT_FOUND;
+}

+/*
+ * Not implemented PCI_BIOS functions
+ */

+uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_special_cycle(uint16_t bus, uint32_t data)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_routing(int32_t handle)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_set_interrupt(int32_t handle)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_card_used(int32_t handle, uint32_t *address)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_set_card_used(int32_t handle, uint32_t *callback)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_machine_id(void)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_get_pagesize(void)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}
+
+int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer)
+{
+    return PCI_FUNC_NOT_SUPPORTED;
+}

 /*
 * pci_device_config()
@@ -607,11 +870,17 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
    static uint32_t io_address = PCI_IO_OFFSET;
    uint16_t cr;

+    /*
+     * should make compiler happy (these are used only in debug builds)
+     */
+    (void) value;
+    (void) il;
+
    /* determine pci handle from bus, device + function number */
    handle = PCI_HANDLE(bus, device, function);

    /* find index into resource descriptor table for handle */
-	index = handle2index(handle);
+    index = pci_handle2index(handle);

    if (index == -1)
    {
@@ -649,7 +918,7 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
             */
            struct pci_rd *rd = &descriptors[barnum];

-			dbg("%s: address = %08x\r\n", __FUNCTION__, address);
+            dbg("address = %08x\r\n", address);
            if (IS_PCI_MEM_BAR(address))
            {
                /* adjust base address to card's alignment requirements */
@@ -670,7 +939,7 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)

                /* fill resource descriptor */
                rd->next = sizeof(struct pci_rd);
-				rd->flags = 0 | FLG_32BIT | FLG_16BIT | FLG_8BIT | 2; /* little endian, lane swapped */
+                rd->flags = 0 | FLG_32BIT | FLG_16BIT | FLG_8BIT | ORD_INTEL_LS; /* little endian, lane swapped */
                rd->start = address;
                rd->length = size;
                rd->offset = 0;
@@ -738,10 +1007,10 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)

        /* write it to PCIERBAR and enable ROM */
        pci_write_config_longword(handle, PCIERBAR, swpl(address | 1));
-		dbg("%s: set PCIERBAR on device 0x%02x to 0x%08x\r\n", __FUNCTION__, handle, address | 1);
+        dbg("set PCIERBAR on device 0x%02x to 0x%08x\r\n", handle, address | 1);

        /* read value back just to be sure */
-		dbg("%s: PCIERBAR = %p\r\n", __FUNCTION__, swpl(pci_read_config_longword(handle, PCIERBAR)));
+        dbg("PCIERBAR = %p\r\n", swpl(pci_read_config_longword(handle, PCIERBAR)));


        rd->next = sizeof(struct pci_rd);
@@ -763,9 +1032,11 @@ static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
    il = pci_read_config_byte(handle, PCIIPR);
    dbg("device requests interrupts on interrupt pin %d\r\n", il);

-	/* if so, register interrupts */
+    /* enable interrupt on PCI device */

-	/* TODO: register interrupts here */
+    il = pci_read_config_byte(handle, PCICR);
+    il &= ~PCICSR_INT_DISABLE;
+    pci_write_config_byte(handle, PCICR, il);

    /*
     * enable device memory or I/O access
@@ -779,10 +1050,11 @@ static void pci_bridge_config(uint16_t bus, uint16_t device, uint16_t function)

    if (function != 0)
    {
-		dbg("trying to configure a multi-function bridge. Cancelled\r\n");
+        err("trying to configure a multi-function bridge. Cancelled\r\n");
        return;
    }
    handle = PCI_HANDLE(bus, device, function);
+    dbg("handle=%d\r\n", handle);

    pci_write_config_longword(handle, PCIBAR0, 0x40000000);
    pci_write_config_longword(handle, PCIBAR1, 0x0);
@@ -807,6 +1079,7 @@ void pci_scan(void)
        uint32_t value;

        value = pci_read_config_longword(handle, PCIIDR);
+
        xprintf(" %02x | %02x | %02x |%04x|%04x|%04x| %s (0x%02x)\r\n",
                PCI_BUS_FROM_HANDLE(handle),
                PCI_DEVICE_FROM_HANDLE(handle),
@@ -818,6 +1091,8 @@ void pci_scan(void)

        /* save handle to index value so that we'll be able to later find our resources */
        handles[index] = handle;
+        handles[index + 1] = -1;
+
        if (PCI_VENDOR_ID(value) != 0x1057 && PCI_DEVICE_ID(value) != 0x5806) /* do not configure bridge */
        {
            /* configure memory and I/O for card */
@@ -827,11 +1102,12 @@ void pci_scan(void)
        }
        else
        {
+            dbg("");
            pci_bridge_config(PCI_BUS_FROM_HANDLE(handle),
                        PCI_DEVICE_FROM_HANDLE(handle),
                        PCI_FUNCTION_FROM_HANDLE(handle));
        }
-
+        dbg("");
        handle = pci_find_device(0x0, 0xFFFF, ++index);
    }
    xprintf("\r\n...finished\r\n");
@@ -843,15 +1119,16 @@ void init_eport(void)
    /* configure IRQ1-7 pins on EPORT falling edge triggered */
    MCF_EPORT_EPPAR = MCF_EPORT_EPPAR_EPPA7(MCF_EPORT_EPPAR_FALLING) |
            MCF_EPORT_EPPAR_EPPA6(MCF_EPORT_EPPAR_FALLING) |
-#if MACHINE_FIREBEE		/* irq5 level triggered on FireBee */
+#if defined(MACHINE_FIREBEE)     /* irq5 level triggered on FireBee */
            MCF_EPORT_EPPAR_EPPA5(MCF_EPORT_EPPAR_LEVEL) |
-#elif MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
            MCF_EPORT_EPPAR_EPPA5(MCF_EPORT_EPPAR_FALLING) |
 #endif /* MACHINE_FIREBEE */
            MCF_EPORT_EPPAR_EPPA4(MCF_EPORT_EPPAR_FALLING) |
            MCF_EPORT_EPPAR_EPPA3(MCF_EPORT_EPPAR_FALLING) |
            MCF_EPORT_EPPAR_EPPA2(MCF_EPORT_EPPAR_FALLING) |
            MCF_EPORT_EPPAR_EPPA1(MCF_EPORT_EPPAR_FALLING);
+
    MCF_EPORT_EPDDR = 0;    /* clear data direction register. All pins as input */
    MCF_EPORT_EPFR = -1;    /* clear all EPORT interrupt flags */
    MCF_EPORT_EPIER = 0xfe; /* enable all EPORT interrupts (for now) */
@@ -904,17 +1181,11 @@ void init_pci(void)
    xprintf("initializing PCI bridge:\r\n");

    (void) res; /* for now */
-	res = register_interrupt_handler(0, INT_SOURCE_PCIARB, 5, 5, pci_arb_interrupt);
-	dbg("registered interrupt handler for PCI arbiter: %s\r\n",
-			(res < 0 ? "failed" : "succeeded"));
-	register_interrupt_handler(0, INT_SOURCE_XLBPCI, 5, 5, xlb_pci_interrupt);
-	dbg("registered interrupt handler for XLB PCI: %s\r\n",
-			(res < 0 ? "failed" : "succeeded"));

    init_eport();
    init_xlbus_arbiter();

-	MCF_PCI_PCIGSCR = 1;	/* reset PCI */
+    MCF_PCI_PCIGSCR = -1;

    /*
     * setup the PCI arbiter
@@ -924,15 +1195,21 @@ void init_pci(void)
       | MCF_PCIARB_PACR_INTMINTEN              /* enable "internal master broken" interrupt */
       | MCF_PCIARB_PACR_EXTMINTEN(0x0f);       /* enable "external master broken" interrupt */

-#ifdef _NOT_USED_	/* since this is already done in sysinit.c */
-#if MACHINE_FIREBEE
-	//MCF_PAD_PAR_PCIBG = 0x3f; // FIXME: MiNT initialization hangs if this is enabled ???
-	//MCF_PAD_PAR_PCIBR = 0x3f;
+#if defined(MACHINE_FIREBEE)
+    MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_TBST |
+            MCF_PAD_PAR_PCIBG_PAR_PCIBG3_GPIO |
+            MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 |
+            MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 |
+            MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0;
+    MCF_PAD_PAR_PCIBR = MCF_PAD_PAR_PCIBR_PAR_PCIBR4_IRQ4 |
+            MCF_PAD_PAR_PCIBR_PAR_PCIBR3_GPIO |
+            MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 |
+            MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 |
+            MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0;
 #elif MACHINE_M5484LITE
    MCF_PAD_PAR_PCIBG = 0x3ff; /* enable all PCI bus grant and bus requests on the LITE board */
    MCF_PAD_PAR_PCIBR = 0x3ff;
 #endif /* MACHINE_FIREBEE */
-#endif /* _NOT_USED_ */

    MCF_PCI_PCISCR =  MCF_PCI_PCISCR_M |    /* memory access control enabled */
        MCF_PCI_PCISCR_B |                  /* bus master enabled */
@@ -942,42 +1219,50 @@ void init_pci(void)


    /* Setup burst parameters */
-	MCF_PCI_PCICR1 = MCF_PCI_PCICR1_CACHELINESIZE(8) |
-						MCF_PCI_PCICR1_LATTIMER(0xff); /* TODO: test increased latency timer */
-#ifdef _NOT_USED_
+    MCF_PCI_PCICR1 = MCF_PCI_PCICR1_CACHELINESIZE(0) |
+                        MCF_PCI_PCICR1_LATTIMER(0x20); /* TODO: test increased latency timer */
+
    MCF_PCI_PCICR2 = MCF_PCI_PCICR2_MINGNT(1) |
                    MCF_PCI_PCICR2_MAXLAT(32);
-#endif /* _NOT_USED_ */
-	MCF_PCI_PCICR2 = 0;		/* this is what Linux does */
+
+    // MCF_PCI_PCICR2 = 0;      /* this is what Linux does */

    /* error signaling */
-#ifdef NOT_USED
+
    MCF_PCI_PCIICR = MCF_PCI_PCIICR_TAE |   /* target abort enable */
        MCF_PCI_PCIICR_IAE;                 /* initiator abort enable */
-#endif /* NOT_USED */
-	MCF_PCI_PCIICR = 0;						/* this is what Linux does */
+
+    // MCF_PCI_PCIICR = 0;                      /* this is what Linux does */

    MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_SEE; /* system error interrupt enable */

    /* Configure Initiator Windows */

-	/* initiator window 0 base / translation adress register */
-	MCF_PCI_PCIIW0BTAR = (PCI_MEMORY_OFFSET | (((PCI_MEMORY_SIZE - 1) >> 8) & 0xffff0000))
-						  | ((PCI_MEMORY_OFFSET >> 16) & 0xff00); 
+    /*
+     * initiator window 0 base / translation adress register
+     * used for PCI memory access
+     */
+    MCF_PCI_PCIIW0BTAR = (PCI_MEMORY_OFFSET + ((PCI_MEMORY_SIZE - 1) >> 8))
+                          + (PCI_MEMORY_OFFSET >> 16);

+    NOP();
    dbg("PCIIW0BTAR=0x%08x\r\n", MCF_PCI_PCIIW0BTAR);

-	/* initiator window 1 base / translation adress register */
-	MCF_PCI_PCIIW1BTAR = (PCI_IO_OFFSET | ((PCI_IO_SIZE - 1) >> 8)) & 0xffff0000;
-
+    /*
+     * initiator window 1 base / translation adress register
+     * used for PCI I/O access
+     */
+    MCF_PCI_PCIIW1BTAR = (PCI_IO_OFFSET + ((PCI_IO_SIZE - 1) >> 8)) & 0xffff0000;
+    NOP();
    /* initiator window 2 base / translation address register */
    MCF_PCI_PCIIW2BTAR = 0L;   /* not used */
-
+    NOP();
    /* initiator window configuration register */
    MCF_PCI_PCIIWCR = MCF_PCI_PCIIWCR_WINCTRL0_MEMRDLINE |
                    MCF_PCI_PCIIWCR_WINCTRL1_IO |
                    MCF_PCI_PCIIWCR_WINCTRL0_E |
                    MCF_PCI_PCIIWCR_WINCTRL1_E;
+    NOP();

    /*
     * Initialize target control register.
@@ -990,13 +1275,15 @@ void init_pci(void)

    /* reset PCI devices */
    MCF_PCI_PCIGSCR &= ~MCF_PCI_PCIGSCR_PR;
-	do {;} while (MCF_PCI_PCIGSCR & MCF_PCI_PCIGSCR_PR); /* wait until reset finished */
+    do { NOP(); } while (MCF_PCI_PCIGSCR & MCF_PCI_PCIGSCR_PR); /* wait until reset finished */
    xprintf("finished\r\n");

    /* initialize/clear resource descriptor table */
    memset(&resource_descriptors, 0, NUM_CARDS * NUM_RESOURCES * sizeof(struct pci_rd));
+
    /* initialize/clear handles array */
    memset(handles, 0, NUM_CARDS * sizeof(int32_t));
+
    /* initialize/clear interrupts array */
    memset(interrupts, 0, MAX_INTERRUPTS * sizeof(struct pci_interrupt));

@@ -1004,7 +1291,7 @@ void init_pci(void)
     * give devices a chance to come up befor attempting to configure them,
     * necessary to properly detect the FireBee USB chip
     */
-	wait(400000);
+    wait_ms(400);

    /*
     * do normal initialization
--- a/pci/pci_wrappers.S
+++ b/pci/pci_wrappers.S
@@ -0,0 +1,469 @@
+/*
+ * pci.S
+ *
+ * Purpose:		PCI configuration for the Coldfire builtin PCI bridge.
+ *
+ * Notes:
+ *
+ * This file is part of BaS_gcc.
+ *
+ * BaS_gcc is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * BaS_gcc is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with BaS_gcc.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *  Created on: 08.05.2014
+ *      Author: David Galvez
+ */
+
+.global _wrapper_find_pci_device
+.global _wrapper_find_pci_classcode
+
+.global _wrapper_read_config_longword
+.global _wrapper_read_config_word
+.global _wrapper_read_config_byte
+
+.global _wrapper_fast_read_config_byte
+.global _wrapper_fast_read_config_word
+.global _wrapper_fast_read_config_longword
+
+.global _wrapper_write_config_longword
+.global _wrapper_write_config_word
+.global _wrapper_write_config_byte
+
+.global _wrapper_get_resource
+.global _wrapper_hook_interrupt
+.global _wrapper_unhook_interrupt
+
+.global _wrapper_special_cycle
+.global _wrapper_get_routing
+.global _wrapper_set_interrupt
+.global _wrapper_get_resource
+.global _wrapper_get_card_used
+.global _wrapper_set_card_used
+
+.global _wrapper_read_mem_byte
+.global _wrapper_read_mem_word
+.global _wrapper_read_mem_longword
+
+.global _wrapper_fast_read_mem_byte
+.global _wrapper_fast_read_mem_word
+.global _wrapper_fast_read_mem_longword
+
+.global _wrapper_write_mem_byte
+.global _wrapper_write_mem_word
+.global _wrapper_write_mem_longword
+
+.global _wrapper_read_io_byte
+.global _wrapper_read_io_word
+.global _wrapper_read_io_longword
+
+.global _wrapper_fast_read_io_byte
+.global _wrapper_fast_read_io_word
+.global _wrapper_fast_read_io_longword
+
+.global _wrapper_write_io_byte
+.global _wrapper_write_io_word
+.global _wrapper_write_io_longword
+
+.global _wrapper_get_machine_id
+.global _wrapper_get_pagesize
+
+.global _wrapper_virt_to_bus
+.global _wrapper_bus_to_virt
+.global _wrapper_virt_to_phys
+.global _wrapper_phys_to_virt
+
+
+_wrapper_find_pci_device:
+	move.l D1,-(SP)			// index
+	move.l D0,-(SP)			// Vendor ID
+	move.l #16,D1
+	lsr.l D1,D0
+	move.l D0,-(SP)			// Device ID
+	jsr _pci_find_device
+	add.l #12,SP
+	rts
+
+_wrapper_find_pci_classcode:
+	move.l D1,-(SP)			// index
+	move.l D0,-(SP)			// ID
+	jsr _pci_find_classcode
+	addq.l #8,SP
+	rts
+
+_wrapper_read_config_byte:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_byte
+	move.l 8(SP),A0			// PCI_BIOS expects value in memory
+	move.l D0,(A0)
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+_wrapper_read_config_word:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_word
+	move.l 8(SP),A0			// little to big endian
+	move.l D0,(A0)
+	mvz.b 1(A0),D0
+	lsl.l #8,D0
+	move.b (A0),D0
+	move.l D0,(A0)			// PCI_BIOS expects value in memory, not in D0
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+_wrapper_read_config_longword:
+	move.l A0,-(SP)			// pointer to space for read data
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_config_longword
+	move.l 8(SP),A0			// little to big endian
+	move.l D0,(A0)
+	mvz.b 3(A0),D0
+	lsl.l #8,D0
+	move.b 2(A0),D0
+	lsl.l #8,D0
+	move.b 1(A0),D0
+	lsl.l #8,D0
+	move.b (A0),D0
+	move.l D0,(A0)			// PCI_BIOS expects value in memory, not in D0
+	add.l #12,SP
+	move.l #0,D0
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_byte:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_word:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_config_longword:
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_fast_read_config_longword
+	addq.l #8,SP
+	rts
+
+_wrapper_write_config_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_byte
+	add.l #12,SP
+	rts
+
+_wrapper_write_config_word:
+	move.l D0,-(SP)			// make data little endian
+	moveq #0,D1
+	move.w D2,D1
+	lsr.l #8,D1
+	asl.l #8,D2
+	or.l D1,D2
+	move.l (SP)+,D0
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_word
+	add.l #12,SP
+	rts
+
+_wrapper_write_config_longword:
+	move.l D0,-(SP)
+	move.l D2,D0			// make data little endian
+	lsr.l #8,D0
+	asl.l #8,D2
+	and.l #0x00FF00FF,D0
+	and.l #0xFF00FF00,D2
+	or.l D0,D2
+	swap D2
+	move.l (SP)+,D0
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// PCI register
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_config_longword
+	add.l #12,SP
+	rts
+
+_wrapper_hook_interrupt:
+	move.l A1,-(SP)			// parameter for interrupt handler
+	move.l A0,-(SP)			// pointer to interrupt handler
+	move.l D0,-(SP)			// handle
+	jsr _pci_hook_interrupt
+	add.l #12,SP
+	rts
+
+_wrapper_unhook_interrupt:
+	move.l D0,-(SP)			// handle
+	jsr _pci_unhook_interrupt
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_special_cycle:
+	move.l D1,-(SP)			// special cycle data
+	move.l D0,-(SP)			// bus number
+	jsr _pci_special_cycle
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_routing:
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_routing
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_set_interrupt:
+	move.l D1,-(SP)			// mode
+	move.l D0,-(SP)			// handle
+	jsr _pci_set_interrupt
+	addq.l #8,SP
+	rts
+
+_wrapper_get_resource:
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_resource
+	addq.l #4,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_card_used:
+	move.l D1,-(SP)			// address
+	move.l D0,-(SP)			// handle
+	jsr _pci_get_card_used
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_set_card_used:
+	move.l A0,-(SP)			// callback
+	move.l D0,-(SP)			// handle
+	jsr _pci_set_card_used
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_byte:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_word:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_mem_longword:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_byte:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_word:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_mem_longword:
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_mem_longword
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_word:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_mem_longword:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI memory address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_mem_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_byte:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_word:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_read_io_longword:
+	move.l A0,-(SP)			// pointer to data in memory
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_byte:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_byte
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_word:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_word
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_fast_read_io_longword:
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_read_io_longword
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_byte:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_byte
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_word:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_word
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_write_io_longword:
+	move.l D2,-(SP)			// data to write
+	move.l D1,-(SP)			// address to access (in PCI I/O address space)
+	move.l D0,-(SP)			// handle
+	jsr _pci_write_io_longword
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_get_machine_id:
+	jsr _pci_get_machine_id
+	rts
+
+/* Not implemented */
+_wrapper_get_pagesize:
+	jsr _pci_get_pagesize
+	rts
+
+/* Not implemented */
+_wrapper_virt_to_bus:
+	move.l A0,-(SP)			// ptr
+	move.l D1,-(SP)			// address in virtual CPU space
+	move.l D0,-(SP)			// handle
+	jsr _pci_virt_to_bus
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_bus_to_virt:
+	move.l A0,-(SP)			// ptr
+	move.l D1,-(SP)			// PCI bus address
+	move.l D0,-(SP)			// handle
+	jsr _pci_bus_to_virt
+	add.l #12,SP
+	rts
+
+/* Not implemented */
+_wrapper_virt_to_phys:
+	move.l A0,-(SP)			// ptr
+	move.l D0,-(SP)			// address in virtual CPU space
+	jsr _pci_virt_to_phys
+	addq.l #8,SP
+	rts
+
+/* Not implemented */
+_wrapper_phys_to_virt:
+	move.l A0,-(SP)			// ptr
+	move.l D0,-(SP)			// physical CPU address 
+	jsr _pci_phys_to_virt
+	addq.l #8,SP
+	rts
--- a/radeon/radeon_base.c
+++ b/radeon/radeon_base.c
@@ -59,14 +59,16 @@
 #include "ati_ids.h"
 #include "driver_mem.h"
 #include "bas_printf.h"
+#include "bas_string.h"
 #include "exceptions.h"		/* for set_ipl() */

 #define DBG_RADEON
 #ifdef DBG_RADEON
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG (%s()): " format, __FUNCTION__, ##arg);} while(0)
 #else
 #define dbg(format, arg...) do {;} while (0)
 #endif /* DBG_RADEON */
+#define err(format, arg...) do { xprintf("ERROR (%s()): " format, __FUNCTION__, ##arg); } while(0)

 extern void run_bios(struct radeonfb_info *rinfo);

@@ -239,7 +241,8 @@ extern struct fb_info *info_fb;
 #define rinfo ((struct radeonfb_info *) info_fb->par)
 static uint32_t inreg(uint32_t addr)
 {
-	return INREG(addr);
+    return swpl(*(uint32_t *)(rinfo->mmio_base + addr));
+    //return INREG(addr);
 }

 static void outreg(uint32_t addr, uint32_t val)
@@ -360,7 +363,13 @@ static int radeon_map_ROM(struct radeonfb_info *rinfo)

    uint32_t temp;

-	temp = INREG(MPP_TB_CONFIG);
+    dbg("mmio_base=%p\r\n", rinfo->mmio_base);
+    dbg("bios_seg=%p\r\n", rinfo->bios_seg);
+    dbg("bios_seg_phys=%p\r\n", rinfo->bios_seg_phys);
+
+    temp = inreg(MPP_TB_CONFIG);
+
+    dbg("temp=%d\r\n", temp);
    temp &= 0x00ffffffu;
    temp |= 0x04 << 24;
    OUTREG(MPP_TB_CONFIG, temp);
@@ -368,21 +377,22 @@ static int radeon_map_ROM(struct radeonfb_info *rinfo)

    if (rinfo->bios_seg == NULL)
    {
-		dbg("%s: ROM failed to map\r\n", __FUNCTION__);
+        dbg("ROM failed to map\r\n");
        return -1;
    }

    /* Very simple test to make sure it appeared */
    if (BIOS_IN16(0) != 0xaa55)
    {
-		dbg("%s: Invalid ROM signature", __FUNCTION__);
+        dbg("Invalid ROM signature");
        goto failed;
    }

    /* Look for the PCI data to check the ROM type */
    dptr = BIOS_IN16(0x18);

-	/* Check the PCI data signature. If it's wrong, we still assume a normal x86 ROM
+    /*
+     * Check the PCI data signature. If it's wrong, we still assume a normal x86 ROM
     * for now, until I've verified this works everywhere. The goal here is more
     * to phase out Open Firmware images.
     *
@@ -408,35 +418,35 @@ static int radeon_map_ROM(struct radeonfb_info *rinfo)
     */
    if (BIOS_IN32(dptr) !=  (('R' << 24) | ('I' << 16) | ('C' << 8) | 'P'))
    {
-		dbg("%s: PCI DATA signature in ROM incorrect: %p\r\n", __FUNCTION__, BIOS_IN32(dptr));
+        dbg("PCI DATA signature in ROM incorrect: %p\r\n", BIOS_IN32(dptr));
        goto anyway;
    }
    rom_type = BIOS_IN8(dptr + 0x14);
    switch(rom_type)
    {
        case 0:
-		dbg("%s: Found Intel x86 BIOS ROM Image\r\n", __FUNCTION__);
+            dbg("Found Intel x86 BIOS ROM Image\r\n");
            break;
        case 1:
-		dbg("%s: Found Open Firmware ROM Image\r\n", __FUNCTION__);
+            dbg("Found Open Firmware ROM Image\r\n");
            goto failed;
        case 2:
-		dbg("%s: Found HP PA-RISC ROM Image\r\n", __FUNCTION__);
+            dbg("Found HP PA-RISC ROM Image\r\n");
            goto failed;
        default:
-		dbg("%s: Found unknown type %d ROM Image\r\n", rom_type, __FUNCTION__);
+            dbg("Found unknown type %d ROM Image\r\n", rom_type);
            goto failed;
    }
 anyway:
    /* Locate the flat panel infos, do some sanity checking !!! */
    rinfo->fp_bios_start = BIOS_IN16(0x48);
-	dbg("%s: BIOS start offset: %p\r\n", __FUNCTION__, BIOS_IN16(0x48));
+    dbg("BIOS start offset: %p\r\n", BIOS_IN16(0x48));

    /* Save BIOS PLL informations */
    {
        uint16_t pll_info_block = BIOS_IN16(rinfo->fp_bios_start + 0x30);

-		dbg("%s: BIOS PLL info block offset: %p\r\n", __FUNCTION__, BIOS_IN16(rinfo->fp_bios_start + 0x30));
+        dbg("BIOS PLL info block offset: %p\r\n", BIOS_IN16(rinfo->fp_bios_start + 0x30));
        rinfo->bios_pll.sclk		= BIOS_IN16(pll_info_block + 0x08);
        rinfo->bios_pll.mclk		= BIOS_IN16(pll_info_block + 0x0a);
        rinfo->bios_pll.ref_clk	= BIOS_IN16(pll_info_block + 0x0e);
@@ -470,7 +480,7 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)
     * Ugh, we cut interrupts, bad bad bad, but we want some precision
     * here, so... --BenH
     */
-	dbg("%s: radeon_probe_pll_params\r\n", __FUNCTION__);
+    dbg("radeon_probe_pll_params\r\n");

    /* Flush PCI buffers ? */
    tmp = INREG16(DEVICE_ID);
@@ -515,15 +525,15 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)
    set_ipl(ipl);

    hz = US_TO_TIMER(1000000.0) / (double)(stop_tv - start_tv);
-	dbg("%s:hz %d\r\n", __FUNCTION__, (int32_t) hz);
+    dbg("hz %d\r\n", (int32_t) hz);

    hTotal = ((INREG(CRTC_H_TOTAL_DISP) & 0x1ff) + 1) * 8;
    vTotal = ((INREG(CRTC_V_TOTAL_DISP) & 0x3ff) + 1);
-	dbg("%s:hTotal=%d\r\n", __FUNCTION__, hTotal);
-	dbg("%s:vTotal=%d\r\n", __FUNCTION__, vTotal);
+    dbg("hTotal=%d\r\n", hTotal);
+    dbg("vTotal=%d\r\n", vTotal);

    vclk = (double) hTotal * (double) vTotal * hz;
-	dbg("%s:vclk=%d\r\n", __FUNCTION__, (int) vclk);
+    dbg("vclk=%d\r\n", (int) vclk);

    switch ((INPLL(PPLL_REF_DIV) & 0x30000) >> 16)
    {
@@ -595,7 +605,7 @@ static int radeon_probe_pll_params(struct radeonfb_info *rinfo)
        xtal = 2950;
    else
    {
-		dbg("%s: xtal calculation failed: %d\r\n", __FUNCTION__, xtal);
+        dbg("xtal calculation failed: %d\r\n", xtal);
        return -1; /* error */
    }

@@ -628,7 +638,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
     * incomplete, however.  It does provide ppll_max and _min values
     * even for most other methods, however.
     */
-	dbg("%s:\r\n", __FUNCTION__);
+    dbg("\r\n");

    switch(rinfo->chipset)
    {
@@ -701,7 +711,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
        rinfo->pll.ref_div	= rinfo->bios_pll.ref_div;
        rinfo->pll.ppll_min	= rinfo->bios_pll.ppll_min;
        rinfo->pll.ppll_max	= rinfo->bios_pll.ppll_max;
-		dbg("%s: Retreived PLL infos from BIOS\r\n", __FUNCTION__);
+        dbg("Retreived PLL infos from BIOS\r\n");

        goto found;
    }
@@ -712,14 +722,14 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
     */
    if (radeon_probe_pll_params(rinfo) == 0)
    {
-		dbg("%s: Retreived PLL infos from registers\r\n", __FUNCTION__);
+        dbg("Retreived PLL infos from registers\r\n");
        goto found;
    }

    /*
     * Fall back to already-set defaults...
     */
-	dbg("%s: Used default PLL infos\r\n", __FUNCTION__);
+    dbg("Used default PLL infos\r\n");

 found:
    /*
@@ -732,9 +742,9 @@ found:
    if (rinfo->pll.sclk == 0)
        rinfo->pll.sclk = 20000;

-	dbg("%s: Reference=%d MHz (RefDiv=0x%x) Memory=%d MHz\r\n", __FUNCTION__,
+    dbg("Reference=%d MHz (RefDiv=0x%x) Memory=%d MHz\r\n",
        rinfo->pll.ref_clk / 100, rinfo->pll.ref_div, rinfo->pll.mclk / 100);
-	dbg("%s: System=%d MHz PLL min %d, max %d\r\n", __FUNCTION__,
+    dbg("System=%d MHz PLL min %d, max %d\r\n",
        rinfo->pll.sclk / 100, rinfo->pll.ppll_min, rinfo->pll.ppll_max);
 }

@@ -753,13 +763,13 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
    int nom, den;
    uint32_t pitch;

-	dbg("%s:\r\n", __FUNCTION__);
+    dbg("\r\n");

    /* clocks over 135 MHz have heat isues with DVI on RV100 */
    if ((rinfo->mon1_type == MT_DFP) && (rinfo->family == CHIP_FAMILY_RV100) && ((100000000 / var->pixclock) > 13500))
    {
-		dbg("%s: mode %d x %d x %d", __FUNCTION__, var->xres, var->yres, var->bits_per_pixel);
-		dbg("%s:  rejected, RV100 DVI clock over 135 MHz\r\n", __FUNCTION__);
+        dbg("mode %d x %d x %d", var->xres, var->yres, var->bits_per_pixel);
+        dbg("rejected, RV100 DVI clock over 135 MHz\r\n");

        return -1; //-EINVAL;
    }
@@ -862,7 +872,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)

    if (((v.xres_virtual * v.yres_virtual * nom) / den) > info->screen_size)
    {
-		dbg("%s: mode %d x %d rejected (screen size too small)\r\n", __FUNCTION__, v.xres_virtual, v.yres_virtual);
+        dbg("mode %d x %d rejected (screen size too small)\r\n", v.xres_virtual, v.yres_virtual);
        return -1; //-EINVAL;
    }

@@ -884,7 +894,7 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
    v.red.msb_right = v.green.msb_right = v.blue.msb_right = 0;
    v.transp.offset = v.transp.length = v.transp.msb_right = 0;

-	dbg("%s: using mode %d x %d \r\n", __FUNCTION__, v.xres, v.yres);
+    dbg("using mode %d x %d \r\n", v.xres, v.yres);

    memcpy(var, &v, sizeof(v));

@@ -1986,8 +1996,8 @@ static int radeon_set_fbinfo(struct radeonfb_info *rinfo)
    else if (info->screen_size > MIN_MAPPED_VRAM)
        info->screen_size = MIN_MAPPED_VRAM;

-	dbg("%s: ram_base %p\r\n", __FUNCTION__, info->screen_base);
-	dbg("%s: ram_size %p\r\n", __FUNCTION__, info->ram_size);
+    dbg("ram_base %p\r\n", info->screen_base);
+    dbg("ram_size %p\r\n", info->ram_size);

    /* Fill fix common fields */
    memcpy(info->fix.id, rinfo->name, sizeof(info->fix.id));
@@ -2089,24 +2099,24 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
     */
    switch(rinfo->family)
    {
-		case CHIP_FAMILY_LEGACY: dbg("%s chip type: %s\r\n", __FUNCTION__, "LEGACY"); break;	
-		case CHIP_FAMILY_RADEON: dbg("%s chip type: %s\r\n", __FUNCTION__, "RADEON"); break;	
-		case CHIP_FAMILY_RV100: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV100"); break;	
-		case CHIP_FAMILY_RS100: dbg("%s chip type: %s\r\n", __FUNCTION__, "RS100"); break;	
-		case CHIP_FAMILY_RV200: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV200"); break;	
-		case CHIP_FAMILY_RS200: dbg("%s chip type: %s\r\n", __FUNCTION__, "RS200"); break;	
-		case CHIP_FAMILY_R200: dbg("%s chip type: %s\r\n", __FUNCTION__, "R200"); break;	
-		case CHIP_FAMILY_RV250: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV250"); break;	
-		case CHIP_FAMILY_RS300: dbg("%s chip type: %s\r\n", __FUNCTION__, "RS300"); break;	
-		case CHIP_FAMILY_RV280: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV280"); break;	
-		case CHIP_FAMILY_R300: dbg("%s chip type: %s\r\n", __FUNCTION__, "R300"); break;	
-		case CHIP_FAMILY_R350: dbg("%s chip type: %s\r\n", __FUNCTION__, "R350"); break;	
-		case CHIP_FAMILY_RV350: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV350"); break;	
-		case CHIP_FAMILY_RV380: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV380"); break;	
-		case CHIP_FAMILY_R420: dbg("%s chip type: %s\r\n", __FUNCTION__, "R420"); break;	
-		default: dbg("%s chip type: %s\r\n", "UNKNOW"); break;
+        case CHIP_FAMILY_LEGACY: dbg("chip type: %s\r\n", "LEGACY"); break;
+        case CHIP_FAMILY_RADEON: dbg("chip type: %s\r\n", "RADEON"); break;
+        case CHIP_FAMILY_RV100: dbg("chip type: %s\r\n", "RV100"); break;
+        case CHIP_FAMILY_RS100: dbg("chip type: %s\r\n", "RS100"); break;
+        case CHIP_FAMILY_RV200: dbg("chip type: %s\r\n", "RV200"); break;
+        case CHIP_FAMILY_RS200: dbg("chip type: %s\r\n", "RS200"); break;
+        case CHIP_FAMILY_R200: dbg("chip type: %s\r\n", "R200"); break;
+        case CHIP_FAMILY_RV250: dbg("chip type: %s\r\n", "RV250"); break;
+        case CHIP_FAMILY_RS300: dbg("chip type: %s\r\n", "RS300"); break;
+        case CHIP_FAMILY_RV280: dbg("chip type: %s\r\n", "RV280"); break;
+        case CHIP_FAMILY_R300: dbg("chip type: %s\r\n", "R300"); break;
+        case CHIP_FAMILY_R350: dbg("chip type: %s\r\n", "R350"); break;
+        case CHIP_FAMILY_RV350: dbg("chip type: %s\r\n", "RV350"); break;
+        case CHIP_FAMILY_RV380: dbg("chip type: %s\r\n", "RV380"); break;
+        case CHIP_FAMILY_R420: dbg("chip type: %s\r\n", "R420"); break;
+        default: dbg("chip type: %s\r\n", "UNKNOW"); break;
    }
-	dbg("%s: found %d KB of %d bits wide %s video RAM\r\n", __FUNCTION__, rinfo->video_ram / 1024,
+    dbg("found %d KB of %d bits wide %s video RAM\r\n", rinfo->video_ram / 1024,
        rinfo->vram_width, rinfo->vram_ddr ? "DDR " : "SDRAM ");
 }

@@ -2116,11 +2126,11 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
    struct radeonfb_info *rinfo;
    struct pci_rd *pci_rsc_desc;

-	dbg("%s:\r\n", __FUNCTION__);
+    dbg("\r\n");
    info = framebuffer_alloc(sizeof(struct radeonfb_info));
    if (!info)
    {
-		dbg("%s: could not allocate frame buffer\r\n", __FUNCTION__);
+        dbg("could not allocate frame buffer\r\n");
        return -1; // -ENOMEM;
    }

@@ -2128,8 +2138,11 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)

    rinfo->info = info;
    rinfo->handle = handle;
+
+    strcpy((char *) rinfo->name, "ATI Radeon XX ");
    rinfo->name[11] = (char) (ent->device >> 8);
    rinfo->name[12] = (char) ent->device;
+
    rinfo->family = ent->driver_data & CHIP_FAMILY_MASK;
    rinfo->chipset = ent->device;
    rinfo->has_CRTC2 = (ent->driver_data & CHIP_HAS_CRTC2) != 0;
@@ -2137,7 +2150,7 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
    rinfo->is_IGP = (ent->driver_data & CHIP_IS_IGP) != 0;

    /* Set base addrs */
-	dbg("%s: Set base addrs\r\n", __FUNCTION__);
+    dbg("Set base addrs\r\n");
    rinfo->fb_base_phys = rinfo->mmio_base_phys = rinfo->io_base_phys = 0xFFFFFFFF;
    rinfo->mapped_vram = 0;
    rinfo->mmio_base = rinfo->io_base = NULL;
@@ -2149,10 +2162,10 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
        uint16_t flags;
        do
        {
-			dbg("%s: flags %p\r\n", __FUNCTION__, pci_rsc_desc->flags);
-			dbg("%s:	start %p\r\n", __FUNCTION__, pci_rsc_desc->start);
-			dbg("%s:	offset 0x%x\r\n", __FUNCTION__, pci_rsc_desc->offset);
-			dbg("%s:	length 0x%x\r\n", __FUNCTION__, pci_rsc_desc->length);
+            dbg("flags %p\r\n", pci_rsc_desc->flags);
+            dbg("	start %p\r\n", pci_rsc_desc->start);
+            dbg("	offset 0x%x\r\n", pci_rsc_desc->offset);
+            dbg("	length 0x%x\r\n", pci_rsc_desc->length);

            if (!(pci_rsc_desc->flags & FLG_IO))
            {
@@ -2165,30 +2178,44 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
                    if ((pci_rsc_desc->flags & FLG_ENDMASK) == ORD_MOTOROLA)
                    {
                        rinfo->big_endian = 0; /* host bridge make swapping intel -> motorola */
-						dbg("%s: host bridge is big endian\r\n", __FUNCTION__);
+                        dbg("host bridge is big endian\r\n");
                    }
                    else
                    {
                        rinfo->big_endian = 1; /* radeon make swapping intel -> motorola */
-						dbg("%s: host bridge is little endian\r\n", __FUNCTION__);
+                        dbg("host bridge is little endian\r\n");
                    }
+
+                    xprintf("framebuffer dump:\r\n");
+                    hexdump((uint8_t *) rinfo->fb_base_phys, 0x10);
+                    xprintf("change framebuffer contents\r\n");
+                    * (uint32_t *) rinfo->fb_base_phys = 0x01234567;
+                    * (uint32_t *) (rinfo->fb_base_phys + 8) = 0x89abcdef;
+                    hexdump((uint8_t *) rinfo->fb_base_phys, 0x10);
+
                }
                else if ((pci_rsc_desc->length >= RADEON_REGSIZE) && (pci_rsc_desc->length < 0x100000))
                {
                    if (pci_rsc_desc->flags & FLG_ROM)
                    {
-						dbg("%s: FLG_ROM resource descriptor found\r\n", __FUNCTION__);
-						dbg("%s:	start = %p, size = 0x%x\r\n", __FUNCTION__, pci_rsc_desc->start, pci_rsc_desc->length);
-						dbg("%s:	bios_seg = %p\r\n", __FUNCTION__, rinfo->bios_seg);
+                        dbg("FLG_ROM resource descriptor found\r\n");
+                        dbg("	start = %p, size = 0x%x\r\n", pci_rsc_desc->start, pci_rsc_desc->length);
+                        dbg("	bios_seg = %p\r\n", rinfo->bios_seg);

                        if (rinfo->bios_seg == NULL)
                        {
                            rinfo->bios_seg_phys = pci_rsc_desc->start;
                            if (BIOS_IN16(0) == 0xaa55)
+                            {
                                rinfo->bios_seg = (void *) (pci_rsc_desc->offset + pci_rsc_desc->start);
+                            }
                            else
                            {
-								dbg("%s: BIOS_IN16(0) was %x (expected 0xaa55)\r\n", __FUNCTION__, BIOS_IN16(0));
+                                dbg("rinfo->bios_seg[0] (%p) was %x (expected 0xaa55)\r\n",
+                                    rinfo->bios_seg_phys, * (uint16_t *) rinfo->bios_seg_phys);
+                                xprintf("bios_seg_phys dump:\r\n");
+                                hexdump((uint8_t *) rinfo->bios_seg_phys, 0x100);
+
                                rinfo->bios_seg_phys = 0;
                            }
                        }
@@ -2199,6 +2226,9 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
                        {
                            rinfo->mmio_base = (void *)(pci_rsc_desc->offset + pci_rsc_desc->start);
                            rinfo->mmio_base_phys = pci_rsc_desc->start;
+
+                            xprintf("mmio_base dump:\r\n");
+                            hexdump((uint8_t *) rinfo->mmio_base_phys, 0x100);
                        }
                    }
                }
@@ -2209,6 +2239,9 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
                {
                    rinfo->io_base = (void *)(pci_rsc_desc->offset + pci_rsc_desc->start);
                    rinfo->io_base_phys = pci_rsc_desc->start;
+
+                    xprintf("io_base dump:\r\n");
+                    hexdump((uint8_t *) rinfo->io_base_phys, 0x100);
                }
            }
            flags = pci_rsc_desc->flags;
@@ -2216,24 +2249,24 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
        } while (!(flags & FLG_LAST));
    }
    else
-		dbg("%s: get_resource error\r\n", __FUNCTION__);
+        dbg("get_resource error\r\n");

    /* map the regions */
-	dbg("%s: map memory regions\r\n", __FUNCTION__);
+    dbg("map memory regions\r\n");
    if (rinfo->mmio_base == NULL)
    {
-		dbg("%s: cannot map MMIO\r\n", __FUNCTION__);
+        dbg("cannot map MMIO\r\n");
        framebuffer_release(info);
        return -2; //(-EIO);
    }
-	dbg("%s: mmio_base_phys %p, mmio_base %p\r\n", __FUNCTION__, rinfo->mmio_base_phys, rinfo->mmio_base);
-	dbg("%s: io_base_phys %p, io_base %p\r\n", __FUNCTION__, rinfo->io_base_phys, rinfo->io_base);
-	dbg("%s: fb_base_phys %p, fb_base %p\r\n", __FUNCTION__, rinfo->fb_base_phys, rinfo->fb_base);
+    dbg("mmio_base_phys %p, mmio_base %p\r\n", rinfo->mmio_base_phys, rinfo->mmio_base);
+    dbg("io_base_phys %p, io_base %p\r\n", rinfo->io_base_phys, rinfo->io_base);
+    dbg("fb_base_phys %p, fb_base %p\r\n", rinfo->fb_base_phys, rinfo->fb_base);

    /*
     * Check for errata
     */
-	dbg("%s: check for errata\r\n", __FUNCTION__);
+    dbg("check for errata\r\n");
    rinfo->errata = 0;
    if (rinfo->family == CHIP_FAMILY_R300
            && (INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) == CFG_ATI_REV_A11)
@@ -2249,22 +2282,22 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
     * Map the BIOS ROM if any and retreive PLL parameters from
     * the BIOS.
     */
-	dbg("%s: bios_seg_phys %p\r\n", __FUNCTION__, rinfo->bios_seg_phys);
-	dbg("%s: map the BIOS ROM\r\n", __FUNCTION__);
+    dbg("bios_seg_phys %p\r\n", rinfo->bios_seg_phys);
+    dbg("map the BIOS ROM\r\n");
    radeon_map_ROM(rinfo);

    /* Run VGA BIOS */
    if ((rinfo->bios_seg != NULL))
    {
-		dbg("%s: run VGA BIOS\r\n", __FUNCTION__);
+        dbg("run VGA BIOS\r\n");
        run_bios(rinfo);
    }
    else
    {
-		dbg("%s: could not run VGA bios - rinfo->bios_seg is NULL\r\n", __FUNCTION__);
+        dbg("could not run VGA bios - rinfo->bios_seg is NULL\r\n");
    }

-	dbg("%s: fixup display base address \r\n", __FUNCTION__);
+    dbg("fixup display base address \r\n");

    OUTREG(MC_FB_LOCATION, 0x7fff0000);
    rinfo->fb_local_base = 0;
@@ -2279,52 +2312,52 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
    OUTREG(OV0_BASE_ADDR, 0);

    /* Get VRAM size and type */
-	dbg("%s: get VRAM size\r\n", __FUNCTION__);
+    dbg("get VRAM size\r\n");
    radeon_identify_vram(rinfo);

    if ((rinfo->fb_base == NULL)
            || ((rinfo->video_ram > rinfo->mapped_vram) && (rinfo->mapped_vram < MIN_MAPPED_VRAM * 2)))
    {
-		dbg("%s: cannot map FB, video ram: %d KB\r\n", __FUNCTION__, rinfo->mapped_vram / 1024);
+        dbg("cannot map FB, video ram: %d KB\r\n", rinfo->mapped_vram / 1024);
        framebuffer_release(info);
        return -2; //(-EIO);
    }
    else
    {
-		dbg("%s: %d KB of VRAM mapped to %p\r\n", __FUNCTION__, rinfo->mapped_vram / 1024, rinfo->fb_base);
+        dbg("%d KB of VRAM mapped to %p\r\n", rinfo->mapped_vram / 1024, rinfo->fb_base);
    }

    /* Get informations about the board's PLL */
-	dbg("%s: get informations about the board's PLL\r\n", __FUNCTION__);
+    dbg("get informations about the board's PLL\r\n");
    radeon_get_pllinfo(rinfo);

 #ifdef CONFIG_FB_RADEON_I2C
    /* Register I2C bus */
-	dbg("%s: register I2C bus\r\n", __FUNCTION__);
+    dbg("register I2C bus\r\n");
    radeon_create_i2c_busses(rinfo);
 #endif /* CONFIG_FB_RADEON_I2C */

    /* set all the vital stuff */
-	dbg("%s: set all the vital stuff\r\n", __FUNCTION__);
+    dbg("set all the vital stuff\r\n");
    radeon_set_fbinfo(rinfo);

    /* set offscreen memory descriptor */
-	dbg("%s: set offscreen memory descriptor\r\n", __FUNCTION__);
+    dbg("set offscreen memory descriptor\r\n");
    offscreen_init(info);

    /* Probe screen types */
-	dbg("%s: probe screen types, monitor_layout: 0x%x\r\n", __FUNCTION__, monitor_layout);
+    dbg("probe screen types, monitor_layout: 0x%x\r\n", monitor_layout);
    radeon_probe_screens(rinfo, monitor_layout, (int) ignore_edid);

    /* Build mode list, check out panel native model */
-	dbg("%s: build mode list\r\n", __FUNCTION__);
+    dbg("build mode list\r\n");
    radeon_check_modes(rinfo, &resolution);

    /*
     * save current mode regs before we switch into the new one
     * so we can restore this upon exit
     */
-	dbg("%s: save current mode\r\n", __FUNCTION__);
+    dbg("save current mode\r\n");
    radeon_save_state(rinfo, &rinfo->init_state);
    memcpy(&rinfo->state, &rinfo->init_state, sizeof(struct radeon_regs));

@@ -2332,7 +2365,7 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
    //	DPRINT("radeonfb: radeonfb_pci_register: setup power management\r\n");
    //	radeonfb_pm_init(rinfo, (int)default_dynclk);

-	dbg("%s: install VBL timer\r\n", __FUNCTION__);
+    dbg("install VBL timer\r\n");
    rinfo->lvds_timer = 0;
 #ifndef DRIVER_IN_ROM
    install_vbl_timer(radeon_timer_func, 1); /* remove old vector */
--- a/radeon/radeon_cursor.c
+++ b/radeon/radeon_cursor.c
@@ -44,11 +44,13 @@
 *
 */

+#include "bas_types.h"
+#include "bas_printf.h"
 #include "radeonfb.h"

 #define DBG_RADEON
 #ifdef DBG_RADEON
-#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif /* DBG_RADEON */
@@ -91,7 +93,9 @@ void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
    if (fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
        return;
    CURSOR_SWAPPING_START();
-	/* Note: We assume that the pixels are either fully opaque or fully
+
+    /*
+     * Note: We assume that the pixels are either fully opaque or fully
     * transparent, so we won't premultiply them, and we can just
     * check for non-zero pixel values; those are either fg or bg
     */
@@ -118,10 +122,12 @@ void radeon_set_cursor_position(struct fb_info *info, int x, int y)
        xorigin = 1 - x;
    if (y < 0)
        yorigin = 1 - y;
+
    //	DPRINTVALHEX("radeonfb: RADEONSetCursorPosition: cursor_start ",rinfo->cursor_start);
    //	DPRINTVAL(" x ",x);
    //	DPRINTVAL(" y ",y);
    //	DPRINT("\r\n");
+
    OUTREG(CUR_HORZ_VERT_OFF, (CUR_LOCK  | (xorigin << 16) | yorigin));
    OUTREG(CUR_HORZ_VERT_POSN, (CUR_LOCK | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y)));
    OUTREG(CUR_OFFSET, rinfo->cursor_start + yorigin * 256);
@@ -132,7 +138,8 @@ void radeon_set_cursor_position(struct fb_info *info, int x, int y)
        rinfo->cursor_y = (unsigned long) y;
 }

-/* Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
+/*
+ * Copy cursor image from `image' to video memory.  RADEONSetCursorPosition
 * will be called after this, so we can ignore xorigin and yorigin.
 */
 void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom)
@@ -143,11 +150,14 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
    unsigned short chunk, mchunk;
    unsigned long i, j, k;
    CURSOR_SWAPPING_DECL
+
            //	DPRINTVALHEX("radeonfb: RADEONLoadCursorImage: cursor_start ",rinfo->cursor_start);
            //	DPRINT("\r\n");
+
            save = INREG(CRTC_GEN_CNTL) & ~(unsigned long) (3 << 20);
    save |= (unsigned long) (2 << 20);
    OUTREG(CRTC_GEN_CNTL, save & (unsigned long)~CRTC_CUR_EN);
+
    /*
     * Convert the bitmap to ARGB32.
     */
@@ -282,6 +292,7 @@ void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsign
 void radeon_hide_cursor(struct fb_info *info)
 {
    struct radeonfb_info *rinfo = info->par;
+
    //	DPRINT("radeonfb: RADEONHideCursor\r\n");
    OUTREGP(CRTC_GEN_CNTL, 0, ~CRTC_CUR_EN);
    rinfo->cursor_show = 0;
@@ -291,6 +302,7 @@ void radeon_hide_cursor(struct fb_info *info)
 void radeon_show_cursor(struct fb_info *info)
 {
    struct radeonfb_info *rinfo = info->par;
+
    //	DPRINT("radeonfb: RADEONShowCursor\r\n");
    OUTREGP(CRTC_GEN_CNTL, CRTC_CUR_EN, ~CRTC_CUR_EN);
    rinfo->cursor_show = 1;
@@ -303,7 +315,7 @@ long radeon_cursor_init(struct fb_info *info)
    int size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
    unsigned long fbarea = offscreen_alloc(rinfo->info, size_bytes + 256);

-	dbg("radeonfb: %s: fbarea: %p\r\n", __FUNCTION__, fbarea);
+    dbg("radeonfb: %s: fbarea: %p\r\n", fbarea);

    if (!fbarea)
        rinfo->cursor_start = 0;
--- a/spi/dspi.c
+++ b/spi/dspi.c
@@ -25,7 +25,6 @@
 *      Author: mfro
 */

-#include <stdint.h>
 #include <bas_types.h>
 #include <MCF5475.h>

@@ -36,9 +35,9 @@ struct baudrate
    int	divider;
 };

-static const int system_clock = 133000000;	/* System clock in Hz */
+static const int system_clock = 132000000;	/* System clock in Hz */

-struct baudrate baudrates[] =
+static struct baudrate baudrates[] =
 {
    { 0b0000, 0b00,	4 },
    { 0b0000, 0b01,	6 },
--- a/spi/mmc.c
+++ b/spi/mmc.c
@@ -1,4 +1,3 @@
-#include <stdint.h>
 #include <bas_types.h>
 #include <sd_card.h>
 #include <bas_printf.h>
--- a/sys/BaS.c
+++ b/sys/BaS.c
@@ -21,8 +21,7 @@
 * Copyright 2012        M. Froeschle
 */

-#include <stdint.h>
-#include <stdbool.h>
+#include <bas_types.h>

 #include "MCF5475.h"
 #include "startcf.h"
@@ -32,6 +31,7 @@
 #include "bas_printf.h"
 #include "bas_string.h"
 #include "bas_types.h"
+#include "bas_utils.h"
 #include "sd_card.h"
 #include "wait.h"

@@ -49,13 +49,16 @@
 #include "interrupts.h"
 #include "exceptions.h"
 #include "net_timer.h"
+#include "pci.h"
+#include "video.h"

 //#define BAS_DEBUG
 #if defined(BAS_DEBUG)
-#define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
 #define dbg(format, arg...) do { ; } while (0)
 #endif
+#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0)

 /* imported routines */
 extern int vec_init();
@@ -78,7 +81,9 @@ extern uint8_t _EMUTOS_SIZE[];
 static inline bool pic_txready(void)
 {
    if (MCF_PSC3_PSCSR & MCF_PSC_PSCSR_TXRDY)
+    {
        return true;
+    }

    return false;
 }
@@ -89,26 +94,36 @@ static inline bool pic_txready(void)
 static inline bool pic_rxready(void)
 {
    if (MCF_PSC3_PSCSR & MCF_PSC_PSCSR_RXRDY)
+    {
        return true;
+    }

    return false;
 }

 void write_pic_byte(uint8_t value)
 {
-    /* Wait until the transmitter is ready or 1000us are passed */
+    /*
+     * Wait until the transmitter is ready or 1000us are passed
+     */
    waitfor(1000, pic_txready);

-    /* Transmit the byte */
+    /*
+     * Transmit the byte
+     */
    *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT) = value; // Really 8-bit
 }

 uint8_t read_pic_byte(void)
 {
-    /* Wait until a byte has been received or 1000us are passed */
+    /*
+     * Wait until a byte has been received or 1000us are passed
+     */
    waitfor(1000, pic_rxready);

-    /* Return the received byte */
+    /*
+     * Return the received byte
+     */
    return * (volatile uint8_t *) (&MCF_PSC3_PSCTB_8BIT); // Really 8-bit
 }

@@ -118,13 +133,17 @@ void pic_init(void)

    xprintf("initialize the PIC: ");

-	/* Send the PIC initialization string */
+    /*
+     * Send the PIC initialization string
+     */
    write_pic_byte('A');
    write_pic_byte('C');
    write_pic_byte('P');
    write_pic_byte('F');

-	/* Read the 3-char answer string. Should be "OK!". */
+    /*
+     * Read the 3-char answer string. Should be "OK!".
+     */
    answer[0] = read_pic_byte();
    answer[1] = read_pic_byte();
    answer[2] = read_pic_byte();
@@ -132,7 +151,7 @@ void pic_init(void)

    if (answer[0] != 'O' || answer[1] != 'K' || answer[2] != '!')
    {
-		dbg("%s: PIC initialization failed. Already initialized?\r\n", __FUNCTION__);
+        dbg("PIC initialization failed. Already initialized?\r\n");
    }
    else
    {
@@ -168,74 +187,97 @@ void nvram_init(void)
    xprintf("finished\r\n");
 }

-#define KBD_ACIA_CONTROL		((uint8_t *) 0xfffffc00)
-#define MIDI_ACIA_CONTROL		((uint8_t *) 0xfffffc04)
-#define MFP_INTR_IN_SERVICE_A	((uint8_t *) 0xfffffa0f)
-#define MFP_INTR_IN_SERVICE_B	((uint8_t *) 0xfffffa11)
+#define KBD_ACIA_CONTROL        * ((uint8_t *) 0xfffffc00)
+#define MIDI_ACIA_CONTROL       * ((uint8_t *) 0xfffffc04)
+#define MFP_INTR_IN_SERVICE_A   * ((uint8_t *) 0xfffffa0f)
+#define MFP_INTR_IN_SERVICE_B   * ((uint8_t *) 0xfffffa11)

 void acia_init()
 {
    xprintf("init ACIA: ");
    /* init ACIA */
-	* KBD_ACIA_CONTROL = 3;		/* master reset */
+    KBD_ACIA_CONTROL = 3;                   /* master reset */
    NOP();

-	* MIDI_ACIA_CONTROL = 3;	/* master reset */
+    MIDI_ACIA_CONTROL = 3;                  /* master reset */
    NOP();

-	* KBD_ACIA_CONTROL = 0x96;	/* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */
+    KBD_ACIA_CONTROL = 0x96;                /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */
    NOP();

-	* MFP_INTR_IN_SERVICE_A = -1;
+    MFP_INTR_IN_SERVICE_A = 0xff;
    NOP();

-	* MFP_INTR_IN_SERVICE_B = -1;
+    MFP_INTR_IN_SERVICE_B = 0xff;
    NOP();

    xprintf("finished\r\n");
 }

-/* ACP interrupt controller */
-#define FPGA_INTR_CONTRL	(volatile uint32_t *) 0xf0010000
-#define FPGA_INTR_ENABLE	(volatile uint8_t *)  0xf0010004
-#define FPGA_INTR_PENDIN	(volatile uint32_t *) 0xf0010008
-
 void enable_coldfire_interrupts()
 {
    xprintf("enable interrupts: ");
-#if MACHINE_FIREBEE
-	*FPGA_INTR_CONTRL = 0L;				/* disable all interrupts */
+#if defined(MACHINE_FIREBEE)
+    FBEE_INTR_CONTROL = 0L;                 /* disable all interrupts */
 #endif /* MACHINE_FIREBEE */
+
    MCF_EPORT_EPPAR = 0xaaa8;               /* all interrupts on falling edge */

-#if MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
    /*
     * TIN0 on the Coldfire is connected to the FPGA. TIN0 triggers every write
     * access to 0xff8201 (vbasehi), i.e. everytime the video base address is written
     */
    MCF_GPT0_GMS = MCF_GPT_GMS_ICT(1) |     /* timer 0 on, video change capture on rising edge */
            MCF_GPT_GMS_IEN |
-			MCF_GPT_GMS_TMS(1);
-										/* route GPT0 interrupt on interrupt controller */
-	MCF_INTC_ICR62 = 0x3f;				/* interrupt level 7, interrupt priority 7 */
-
-	*FPGA_INTR_ENABLE  = 0xfe;	/* enable int 1-7 */
-	MCF_EPORT_EPIER = 0xfe;				/* int 1-7 on */
-	MCF_EPORT_EPFR = 0xff;				/* clear all pending interrupts */
-	MCF_INTC_IMRL = 0xffffff00;			/* int 1-7 on */
+            MCF_GPT_GMS_TMS(1);             /* route GPT0 interrupt on interrupt controller */
+    MCF_INTC_ICR62 = MCF_INTC_ICR_IL(7) |
+                     MCF_INTC_ICR_IP(6);    /* interrupt level 7, interrupt priority 7 */
    MCF_INTC_IMRH = 0xbffffffe;             /* psc3 and timer 0 int on */
 #endif

    xprintf("finished\r\n");
 }

+void enable_pci_interrupts()
+{
+    dbg("enable PCI interrupts\r\n");
+    MCF_EPORT_EPIER = 0xfe;                 /* int 1-7 on */
+    MCF_EPORT_EPFR = 0xff;                  /* clear all pending interrupts */
+    MCF_INTC_IMRL = 0xffffff00;             /* int 1-7 on */
+    MCF_INTC_IMRH = 0;
+#if defined(MACHINE_FIREBEE)
+    FBEE_INTR_ENABLE = FBEE_INTR_INT_IRQ7 | /* enable pseudo bus error */
+            FBEE_INTR_INT_MFP_IRQ6 |        /* enable MFP interrupts */
+            FBEE_INTR_INT_FPGA_IRQ5 |       /* enable Firebee (PIC, PCI, ETH PHY, DVI, DSP) interrupts */
+            FBEE_INTR_INT_VSYNC_IRQ4 |      /* enable vsync interrupts */
+            FBEE_INTR_PCI_INTA |            /* enable PCI interrupts */
+            FBEE_INTR_PCI_INTB |
+            FBEE_INTR_PCI_INTC |
+            FBEE_INTR_PCI_INTD;
+            ;
+#elif defined(MACHINE_M5484LITE)
+    /*
+     * MCF 5484 interrupts are configured at the CPLD for the FireEngine
+     */
+
+    /* TODO: enable PCI interrupts on the LITEKIT */
+#elif defined(MACHINE_M54455)
+    /* MCF 54455 interrupts are configured at the FPGA */
+
+    /* TODO: enable PCI interrupts on the MCF54455 */
+#else
+#error unknown machine!
+#endif
+}
+
 void disable_coldfire_interrupts()
 {
-#ifdef MACHINE_FIREBEE
-	*FPGA_INTR_ENABLE = 0;		/* disable all interrupts */
+#if defined(MACHINE_FIREBEE)
+    FBEE_INTR_ENABLE = 0;                   /* disable all interrupts */
 #endif /* MACHINE_FIREBEE */
+
    MCF_EPORT_EPIER = 0x0;
-	MCF_EPORT_EPFR = 0x0;
    MCF_INTC_IMRL = 0xfffffffe;
    MCF_INTC_IMRH = 0xffffffff;
 }
@@ -243,75 +285,96 @@ void disable_coldfire_interrupts()


 NIF nif1;
-#ifdef MACHINE_M5484LITE
+#if defined(MACHINE_M5484LITE)
+    /*
+     * on the MCF 5484 LITEKIT, the second FEC interface is usable
+     */
 NIF nif2;
 #endif
-static IP_INFO ip_info;
-static ARP_INFO	arp_info;

-
-void network_init(void)
+bool spurious_interrupt_handler(void *arg1, void *arg2)
 {
-	uint8_t mac[6] = {0x00, 0xcf, 0x54, 0x85, 0xcf, 0x01};	/* this is the original MAC address dbug assigns */
-	uint8_t bc[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; /* this is our broadcast MAC address */
-	IP_ADDR myip = {192, 168, 1, 100};
-	IP_ADDR gateway = {192, 168, 1, 1};
-	IP_ADDR netmask = {255, 255, 255, 0};
-	int vector;
-	int (*handler)(void *, void *);
+    dbg("IMRH=%lx, IMRL=%lx\r\n", MCF_INTC_IMRH, MCF_INTC_IMRL);
+    dbg("IPRH=%lx, IPRL=%lx\r\n", MCF_INTC_IPRH, MCF_INTC_IPRL);
+    dbg("IRLR=%x\r\n", MCF_INTC_IRLR);

-	handler = fec0_interrupt_handler;
-	vector = 103;
+    return true;
+}

+/*
+ * initialize the interrupt handler tables to dispatch interrupt requests from Coldfire devices
+ */
+void init_isr(void)
+{
    isr_init();                             /* need to call that explicitely, otherwise isr table might be full */

-	if (!isr_register_handler(vector, handler, NULL, (void *) &nif1))
+    /*
+     * register spurious interrupt handler
+     */
+    if (!isr_register_handler(24, 6, 6, spurious_interrupt_handler, NULL, NULL))
    {
-		dbg("%s: unable to register handler for vector %d\r\n", __FUNCTION__, vector);
-		return;
+        dbg("unable to register spurious interrupt handler\r\n");
+    }
+
+    /*
+     * register the FEC interrupt handler
+     */
+    if (!isr_register_handler(64 + INT_SOURCE_FEC0, 5, 1, fec0_interrupt_handler, NULL, (void *) &nif1))
+    {
+        dbg("unable to register isr for FEC0\r\n");
    }

    /*
     * Register the DMA interrupt handler
     */
-    handler = dma_interrupt_handler;
-    vector = 112;

-    if (!isr_register_handler(vector, handler, NULL,NULL))
+    if (!isr_register_handler(64 + INT_SOURCE_DMA, 5, 3, dma_interrupt_handler, NULL, NULL))
    {
-		dbg("%s: Error: Unable to register handler for vector %s\r\n", __FUNCTION__, vector);
-		return;
+        dbg("unable to register isr for DMA\r\n");
    }

-	nif_init(&nif1);
-	nif1.mtu = ETH_MTU;
-	nif1.send = fec0_send;
-	fec_eth_setup(0, FEC_MODE_MII, FEC_MII_100BASE_TX, FEC_MII_FULL_DUPLEX, mac);
-	// fec_eth_setup(1, FEC_MODE_MII, FEC_MII_100BASE_TX, FEC_MII_FULL_DUPLEX, mac);
-	memcpy(nif1.hwa, mac, 6);
-	memcpy(nif1.broadcast, bc, 6);
+#if defined(MACHINE_FIREBEE)
+    /*
+     * register GPT0 timer interrupt vector
+     */
+    if (!isr_register_handler(64 + INT_SOURCE_GPT0, 5, 2, gpt0_interrupt_handler, NULL, NULL))
+    {
+        dbg("unable to register isr for GPT0 timer\r\n");
+    }

-	dbg("%s: ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n", __FUNCTION__, 
-				nif1.hwa[0], nif1.hwa[1], nif1.hwa[2],
-				nif1.hwa[3], nif1.hwa[4], nif1.hwa[5]);
+    /*
+     * register the PIC interrupt handler
+     */
+    if (!isr_register_handler(64 + INT_SOURCE_PSC3, 5, 5, pic_interrupt_handler, NULL, NULL))
+    {
+        dbg("Error: unable to register ISR for PSC3\r\n");
+    }
+#endif /* MACHINE_FIREBEE */

-	timer_init(TIMER_NETWORK, TMR_INTC_LVL, TMR_INTC_PRI);
+    /*
+     * register the XLB PCI interrupt handler
+     */
+    if (!isr_register_handler(64 + INT_SOURCE_XLBPCI, 7, 0, xlbpci_interrupt_handler, NULL, NULL))
+    {
+        dbg("Error: unable to register isr for XLB PCI interrupts\r\n");
+    }

-	arp_init(&arp_info);
-	nif_bind_protocol(&nif1, ETH_FRM_ARP, arp_handler, (void *) &arp_info);
+    MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE |          /* slave error acknowledge interrupt */
+                       MCF_XLB_XARB_IMR_MME |           /* multiple master at prio 0 interrupt */
+                       MCF_XLB_XARB_IMR_TTAE |          /* TT address only interrupt */
+                       MCF_XLB_XARB_IMR_TTRE |          /* TT reserved interrupt enable */
+                       MCF_XLB_XARB_IMR_ECWE |          /* external control word interrupt */
+                       MCF_XLB_XARB_IMR_TTME |          /* TBST/TSIZ mismatch interrupt */
+                       MCF_XLB_XARB_IMR_BAE;            /* bus activity tenure timeout interrupt */

-	ip_init(&ip_info, myip, gateway, netmask);
-	nif_bind_protocol(&nif1, ETH_FRM_IP, ip_handler, (void *) &ip_info);
+    if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 5, 0, pciarb_interrupt_handler, NULL, NULL))
+    {
+        dbg("Error: unable to register isr for PCIARB interrupts\r\n");

-	udp_init();
-
-	dma_irq_enable(6, 6);
-
-	set_ipl(0);
-
-	bootp_request(&nif1, 0);
-
-	fec_eth_stop(0);
+        return;
+    }
+    MCF_PCIARB_PACR = MCF_PCIARB_PACR_EXTMINTEN(0x1f) | /* external master broken interrupt */
+                      MCF_PCIARB_PACR_INTMINTEN;        /* internal master broken interrupt */
 }

 void BaS(void)
@@ -319,22 +382,25 @@ void BaS(void)
    uint8_t *src;
    uint8_t *dst = (uint8_t *) TOS;

-#if MACHINE_FIREBEE	/* LITE board has no pic and (currently) no nvram */
+#if defined(MACHINE_FIREBEE)        /* LITE board has no pic and (currently) no nvram */
    pic_init();
    nvram_init();
 #endif /* MACHINE_FIREBEE */

-	xprintf("copy EmuTOS: ");
+    xprintf("initialize MMU: ");
+    mmu_init();
+    xprintf("finished\r\n");

+    xprintf("initialize Coldfire DMA: ");
+    dma_init();
+    xprintf("finished\r\n");
+
+    xprintf("copy EmuTOS: ");
    /* copy EMUTOS */
    src = (uint8_t *) EMUTOS;
    dma_memcpy(dst, src, EMUTOS_SIZE);
    xprintf("finished\r\n");

-	xprintf("initialize MMU: ");
-	mmu_init();
-	xprintf("finished\r\n");
-
    xprintf("initialize exception vector table: ");
    vec_init();
    xprintf("finished\r\n");
@@ -347,7 +413,7 @@ void BaS(void)
    NOP();                                      /* force pipeline sync */
    xprintf("finished\r\n");

-	#ifdef MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
    xprintf("IDE reset: ");
    /* IDE reset */
    * (volatile uint8_t *) (0xffff8802 - 2) = 14;
@@ -358,54 +424,19 @@ void BaS(void)

    xprintf("finished\r\n");
    xprintf("enable video: ");
+
    /*
     * video setup (25MHz)
     */
-	* (volatile uint32_t *) (0xf0000410 + 0) = 0x032002ba;	/* horizontal 640x480 */
-	* (volatile uint32_t *) (0xf0000410 + 4) = 0x020c020a;	/* vertical 640x480 */
-	* (volatile uint32_t *) (0xf0000410 + 8) = 0x0190015d;	/* horizontal 320x240 */
-	* (volatile uint32_t *) (0xf0000410 + 12) = 0x020C020A;	/* vertical 320x230 */
-
-#ifdef _NOT_USED_
-//  32MHz
-	* (volatile uint32_t *) (0xf0000410 + 0) = 0x037002ba;	/* horizontal 640x480 */
-	* (volatile uint32_t *) (0xf0000410 + 4) = 0x020d020a;	/* vertical 640x480 */
-	* (volatile uint32_t *) (0xf0000410 + 8) = 0x02a001e0;	/* horizontal 320x240 */
-	* (volatile uint32_t *) (0xf0000410 + 12) = 0x05a00160;	/* vertical 320x230 */
-#endif /* _NOT_USED_ */
+    * (volatile uint32_t *) 0xf0000410 = 0x032002ba;  /* horizontal 640x480 */
+    * (volatile uint32_t *) 0xf0000414 = 0x020c020a;  /* vertical 640x480 */
+    * (volatile uint32_t *) 0xf0000418 = 0x0190015d;  /* horizontal 320x240 */
+    * (volatile uint32_t *) 0xf000041c = 0x020c020a; /* vertical 320x230 */

    /* fifo on, refresh on, ddrcs and cke on, video dac on */
-	* (volatile uint32_t *) (0xf0000410 - 0x20) = 0x01070002;
+    * (volatile uint32_t *) 0xf0000400 = 0x01070082;

    xprintf("finished\r\n");
-
-	enable_coldfire_interrupts();
-
-#ifdef _NOT_USED_
-	screen_init();
-
-	    /* experimental */
-    {
-        int i;
-        uint32_t *scradr = 0xd00000;
-
-        for (i = 0; i < 100; i++)
-        {
-            uint32_t *p = scradr;
-
-            for (p = scradr; p < scradr + 1024 * 150L; p++)
-            {
-				*p = 0xffffffff;
-		    }
-
-			for (p = scradr; p < scradr + 1024 * 150L; p++)
-		    {
-				*p = 0x0;
-			}
-		}
-	}
-#endif /* _NOT_USED_ */
-
 #endif /* MACHINE_FIREBEE */

    sd_card_init();
@@ -413,9 +444,9 @@ void BaS(void)
    /*
     * memory setup
     */
-	memset((void *) 0x400, 0, 0x400);
+    memset((void *) 0x200, 0, 0x400);

-#ifdef MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
    /* set Falcon bus control register */
    /* sets bit 3 and 6. Both are undefined on an original Falcon? */

@@ -434,7 +465,7 @@ void BaS(void)
    * (uint32_t *) 0x5a4 = FASTRAM_END; /* ramtop TOS system variable */
    * (uint32_t *) 0x5a8 = 0x1357bd13;  /* ramvalid TOS system variable */

-#ifdef MACHINE_FIREBEE /* m5484lite has no ACIA and no dip switch... */
+#if defined(MACHINE_FIREBEE) /* m5484lite has no ACIA and no dip switch... */
    acia_init();
 #endif /* MACHINE_FIREBEE */

@@ -442,18 +473,63 @@ void BaS(void)

    /* Jump into the OS */
    typedef void void_func(void);
-	typedef struct {
+    struct rom_header
+    {
        void *initial_sp;
        void_func *initial_pc;
-	} ROM_HEADER;
+    };

    xprintf("BaS initialization finished, enable interrupts\r\n");
-	enable_coldfire_interrupts();
+    init_isr();

-	//set_ipl(0);
-	network_init();
+    enable_coldfire_interrupts();
+    MCF_INTC_IMRH = 0;
+    MCF_INTC_IMRL = 0;
+
+    dma_irq_enable();
+    fec_irq_enable(0, 5, 1);
+
+    enable_pci_interrupts();
+    init_pci();
+    video_init();
+
+    /* initialize USB devices */
+    init_usb();
+
+    set_ipl(7);     /* disable interrupts */
+
+    /*
+     * start FireTOS if DIP switch is set accordingly
+     */
+    if (!(DIP_SWITCH & (1 << 6)))
+    {
+        extern uint8_t _FIRETOS[];
+#define FIRETOS ((uint32_t)_FIRETOS) /* where FireTOS is stored in flash */
+
+        /* make sure MMU is disabled */
+        MCF_MMU_MMUCR = 0;  /* MMU off */
+        NOP();              /* force pipeline sync */
+
+        /* ST RAM */
+
+        * (uint32_t *) 0x42e = STRAM_END;   /* phystop TOS system variable */
+        * (uint32_t *) 0x420 = 0x752019f3;  /* memvalid TOS system variable */
+        * (uint32_t *) 0x43a = 0x237698aa;  /* memval2 TOS system variable */
+        * (uint32_t *) 0x51a = 0x5555aaaa;  /* memval3 TOS system variable */
+
+        /* TT-RAM */
+
+        * (uint32_t *) 0x5a4 = FASTRAM_END; /* ramtop TOS system variable */
+        * (uint32_t *) 0x5a8 = 0x1357bd13;  /* ramvalid TOS system variable */
+
+        xprintf("call FireTOS\r\n");
+        /* Jump into FireTOS */
+        typedef void void_func(void);
+        void_func* FireTOS = (void_func*) FIRETOS;
+        FireTOS();  // Should never return
+    }

    xprintf("call EmuTOS\r\n");
-	ROM_HEADER* os_header = (ROM_HEADER*)TOS;
+    struct rom_header *os_header = (struct rom_header *) TOS;
    os_header->initial_pc();
 }
--- a/sys/cache.c
+++ b/sys/cache.c
@@ -29,10 +29,11 @@ void cacr_set(uint32_t value)
    extern uint32_t rt_cacr;

    rt_cacr = value;
-	__asm__ __volatile__("movec	%0, cacr\n\t"
+    __asm__ __volatile__(
+        "           movec	%0, cacr\n\t"
        : /* output */
        : "r" (rt_cacr)
-						 : /* clobbers */);
+        : "memory" /* clobbers */);
 }

 uint32_t cacr_get(void)
@@ -42,6 +43,23 @@ uint32_t cacr_get(void)
    return rt_cacr;
 }

+void disable_data_cache(void)
+{
+    flush_and_invalidate_caches();
+    cacr_set((cacr_get() | CF_CACR_DCINVA) & ~CF_CACR_DEC);
+}
+
+void disable_instruction_cache(void)
+{
+    flush_and_invalidate_caches();
+    cacr_set((cacr_get() | CF_CACR_ICINVA) & ~CF_CACR_IEC);
+}
+
+void enable_data_cache(void)
+{
+    cacr_set(cacr_get() & ~CF_CACR_DCINVA);
+}
+
 void flush_and_invalidate_caches(void)
 {
    __asm__ __volatile__(
@@ -61,7 +79,7 @@ void flush_and_invalidate_caches(void)
            "	bne.s		cfa_setloop			| no->\n\t"
            /* input */	:
            /* output */	:
-            /* clobber */	: "d0", "d1", "a0"
+            /* clobber */	: "cc", "d0", "d1", "a0"
    );
 }

@@ -80,7 +98,8 @@ void flush_icache_range(void *address, size_t size)

    if (start_set > end_set) {
        /* from the begining to the lowest address */
-		for (set = 0; set <= end_set; set += (0x10 - 3)) {
+        for (set = 0; set <= end_set; set += (0x10 - 3))
+        {
            __asm__ __volatile__(
                        "       cpushl  ic,(%[set])         \n\t"
                        "       addq.l  #1,%[set]           \n\t"
@@ -91,7 +110,7 @@ void flush_icache_range(void *address, size_t size)
                        "       cpushl  ic,(%[set])         \n\t"
                 : /* output parameters  */
                 : [set] "a" (set)  /* input parameters */
-                 :
+                 : "cc"             /* clobbered registers */
            );
        }
        /* next loop will finish the cache ie pass the hole */
@@ -108,7 +127,7 @@ void flush_icache_range(void *address, size_t size)
                    "       cpushl  ic,(%[set])"
                    : /* output parameters */
                    : [set] "a" (set)
-                    :
+                    : "cc"
         );
    }
 }
@@ -143,7 +162,7 @@ void flush_dcache_range(void *address, size_t size)
                        "       cpushl  dc,(%[set])         \n\t"
                        : /* output parameters */
                        : [set] "a" (set)
-                        : /* clobbered registers */
+                        : "cc" /* clobbered registers */
            );
        }
        /* next loop will finish the cache ie pass the hole */
@@ -161,7 +180,62 @@ void flush_dcache_range(void *address, size_t size)
                    "       cpushl      dc,(%[set])     \n\t"
                    : /* output parameters */
                    : [set] "a" (set)
-                    : /* clobbered registers */
+                    : "cc" /* clobbered registers */
+        );
+    }
+}
+
+
+/*
+ * flush and invalidate a specific region from the both caches. We do not know if the area is cached
+ * at all, we do not know in which of the four ways it is cached, but we know the index where they
+ * would be cached if they are, so we only need to flush and invalidate only a subset of the 512 index
+ * entries, but all four ways.
+ */
+void flush_cache_range(void *address, size_t size)
+{
+    unsigned long set;
+    unsigned long start_set;
+    unsigned long end_set;
+    void *endaddr;
+
+    endaddr = address + size;
+    start_set = (uint32_t) address & _DCACHE_SET_MASK;
+    end_set = (uint32_t) endaddr & _DCACHE_SET_MASK;
+
+    if (start_set > end_set) {
+        /* from the begining to the lowest address */
+        for (set = 0; set <= end_set; set += (0x10 - 3))
+        {
+            __asm__ __volatile__(
+                        "       cpushl  bc,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  bc,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  bc,(%[set])         \n\t"
+                        "       addq.l  #1,%[set]           \n\t"
+                        "       cpushl  bc,(%[set])         \n\t"
+                        : /* output parameters */
+                        : [set] "a" (set)
+                        : "cc" /* clobbered registers */
+            );
+        }
+        /* next loop will finish the cache ie pass the hole */
+        end_set = LAST_DCACHE_ADDR;
+    }
+    for (set = start_set; set <= end_set; set += (0x10 - 3))
+    {
+        __asm__ __volatile__(
+                    "       cpushl      bc,(%[set])     \n\t"
+                    "       addq.l      #1,%[set]       \n\t"
+                    "       cpushl      bc,(%[set])     \n\t"
+                    "       addq%.l     #1,%[set]       \n\t"
+                    "       cpushl      bc,(%[set])     \n\t"
+                    "       addq.l      #1,%[set]       \n\t"
+                    "       cpushl      bc,(%[set])     \n\t"
+                    : /* output parameters */
+                    : [set] "a" (set)
+                    : "cc" /* clobbered registers */
        );
    }
 }
--- a/sys/driver_mem.c
+++ b/sys/driver_mem.c
@@ -11,8 +11,7 @@
 * option any later version.
 */

-#include <stdint.h>
-#include <stdbool.h>
+#include <bas_types.h>
 #include "bas_string.h"
 #include "bas_printf.h"
 #include "usb.h"
@@ -29,12 +28,12 @@
 #endif

 //#define DBG_DM
-
 #ifdef	DBG_DM
-#define	dbg(fmt, args...)	xprintf(fmt, ##args)
+#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
 #else
-#define dbg(fmt, args...)
+#define dbg(format, arg...) do { ; } while (0)
 #endif
+#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0)

 extern long offscren_reserved(void);

@@ -273,7 +272,7 @@ void *driver_mem_alloc(uint32_t amount)

    if (amount == -1L)
    {
-		return((void *)ffit(-1L, &pmd));
+        return (void *) ffit(-1L, &pmd);
    }

    if (amount <= 0 )
@@ -296,7 +295,7 @@ void *driver_mem_alloc(uint32_t amount)
    set_ipl(level);
    dbg("%s: driver_mem_alloc(%d) = 0x%08X\r\n", __FUNCTION__, amount, ret);

-	return(ret);
+    return ret;
 }

 static int use_count = 0;
@@ -320,7 +319,8 @@ int driver_mem_init(void)
    }
    use_count++;
    dbg("%s: driver_mem now has a use count of %d\r\n", __FUNCTION__, use_count);
-	return(0);
+
+    return 0;
 }

 void driver_mem_release(void)
--- a/sys/exceptions.S
+++ b/sys/exceptions.S
@@ -20,12 +20,10 @@
 *      Author: Markus Fröschle
 */

-#define DBG_EXC
-
 #include "startcf.h"
-#if MACHINE_FIREBEE
+#if defined(MACHINE_FIREBEE)
 #include "firebee.h"
-#elif MACHINE_M5484LITE
+#elif defined(MACHINE_M5484LITE)
 #include "m5484l.h"
 #endif /* MACHINE_FIREBEE */

@@ -42,33 +40,40 @@
        .extern _video_tlb
        .extern _video_sbt
        .extern _flush_and_invalidate_caches
+        .extern _get_bas_drivers

        /* PCI interrupt handlers */
        .extern _irq5_handler
+        .extern _irq6_handler
        .extern _irq7_handler

-/* Register read/write macros */
-#define MCF_MMU_MMUCR            	__MMUBAR
-#define MCF_MMU_MMUOR			__MMUBAR+0x04
-#define MCF_MMU_MMUSR                   __MMUBAR+0x08
-#define MCF_MMU_MMUAR                   __MMUBAR+0x10
-#define MCF_MMU_MMUTR                   __MMUBAR+0x14
-#define MCF_MMU_MMUDR                   __MMUBAR+0x18
-
-#define MCF_EPORT_EPPAR                 __MBAR+0xF00
-#define MCF_EPORT_EPDDR                 __MBAR+0xF04
-#define MCF_EPORT_EPIER                 __MBAR+0xF05
-#define MCF_EPORT_EPDR                  __MBAR+0xF08
-#define MCF_EPORT_EPPDR                 __MBAR+0xF09
-#define MCF_EPORT_EPFR                  __MBAR+0xF0C
-
-#define MCF_GPIO_PODR_FEC1L             __MBAR+0xA07
-#define MCF_PSC0_PSCTB_8BIT             __MBAR+0x860C
-
-#define MCF_PSC3_PSCRB_8BIT             __MBAR+0x890C
-#define MCF_PSC3_PSCTB_8BIT             __MBAR+0x890C
-
        .global _vec_init
+        .global _std_exc_vec                /* needed by driver_vec.c */
+
+/* Register read/write equates */
+
+        /* MMU */
+        .equ    MCF_MMU_MMUCR, __MMUBAR
+        .equ    MCF_MMU_MMUOR, __MMUBAR+0x04
+        .equ    MCF_MMU_MMUSR, __MMUBAR+0x08
+        .equ    MCF_MMU_MMUAR, __MMUBAR+0x10
+        .equ    MCF_MMU_MMUTR, __MMUBAR+0x14
+        .equ    MCF_MMU_MMUDR, __MMUBAR+0x18
+
+        /* EPORT flag register */
+        .equ    MCF_EPORT_EPFR, __MBAR+0xf0c
+
+        /* FEC1 port output data direction register */
+        .equ    MCF_GPIO_PODR_FEC1L, __MBAR+0xa07
+
+        /* PSC0 transmit buffer register */
+        .equ    MCF_PSC0_PSCTB_8BIT, __MBAR+0x860c
+
+        /* GPT mode select register */
+        .equ    MCF_GPT0_GMS, __MBAR+0x800
+
+        /* Slice timer 0 count register */
+        .equ    MCF_SLT0_SCNT, __MBAR+0x908

        // interrupt sources
        .equ    INT_SOURCE_EPORT_EPF1,1         // edge port flag 1
@@ -125,108 +130,30 @@
 // Atari register equates (provided by FPGA)
        .equ    vbasehi, 0xffff8201

+/*
+ * macros
+ */

-/* MMU register read/write macros */
-
-#define MCF_MMU_MMUCR			    __MMUBAR
-#define MCF_MMU_MMUOR			    __MMUBAR+0x04
-#define MCF_MMU_MMUSR			    __MMUBAR+0x08
-#define MCF_MMU_MMUAR			    __MMUBAR+0x10
-#define MCF_MMU_MMUTR			    __MMUBAR+0x14
-#define MCF_MMU_MMUDR			    __MMUBAR+0x18
-
-
-/* Bit definitions and macros for MCF_MMU_MMUCR */
-#define MCF_MMU_MMUCR_EN                     (0x1)
-#define MCF_MMU_MMUCR_ASM                    (0x2)
-
-/* Bit definitions and macros for MCF_MMU_MMUOR */
-#define MCF_MMU_MMUOR_UAA                    (0x1)
-#define MCF_MMU_MMUOR_ACC                    (0x2)
-#define MCF_MMU_MMUOR_RW                     (0x4)
-#define MCF_MMU_MMUOR_ADR                    (0x8)
-#define MCF_MMU_MMUOR_ITLB                   (0x10)
-#define MCF_MMU_MMUOR_CAS                    (0x20)
-#define MCF_MMU_MMUOR_CNL                    (0x40)
-#define MCF_MMU_MMUOR_CA                     (0x80)
-#define MCF_MMU_MMUOR_STLB                   (0x100)
-#define MCF_MMU_MMUOR_AA(x)                  (((x)&0xFFFF)<<0x10)
-
-/* Bit definitions and macros for MCF_MMU_MMUSR */
-#define MCF_MMU_MMUSR_HIT                    (0x2)
-#define MCF_MMU_MMUSR_WF                     (0x8)
-#define MCF_MMU_MMUSR_RF                     (0x10)
-#define MCF_MMU_MMUSR_SPF                    (0x20)
-
-/* Bit definitions and macros for MCF_MMU_MMUAR */
-#define MCF_MMU_MMUAR_FA(x)                  (((x)&0xFFFFFFFF)<<0)
-
-/* Bit definitions and macros for MCF_MMU_MMUTR */
-#define MCF_MMU_MMUTR_V                      (0x1)
-#define MCF_MMU_MMUTR_SG                     (0x2)
-#define MCF_MMU_MMUTR_ID(x)                  (((x)&0xFF)<<0x2)
-#define MCF_MMU_MMUTR_VA(x)                  (((x)&0x3FFFFF)<<0xA)
-
-/* Bit definitions and macros for MCF_MMU_MMUDR */
-#define MCF_MMU_MMUDR_LK                     (0x2)
-#define MCF_MMU_MMUDR_X                      (0x4)
-#define MCF_MMU_MMUDR_W                      (0x8)
-#define MCF_MMU_MMUDR_R                      (0x10)
-#define MCF_MMU_MMUDR_SP                     (0x20)
-#define MCF_MMU_MMUDR_CM(x)                  (((x)&0x3)<<0x6)
-#define MCF_MMU_MMUDR_SZ(x)                  (((x)&0x3)<<0x8)
-#define MCF_MMU_MMUDR_PA(x)                  (((x)&0x3FFFFF)<<0xA)
-
-#define	 std_mmutr	(MCF_MMU_MMUTR_SG|MCF_MMU_MMUTR_V)
-#define	 writethrough_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(00)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
-#define	 copyback_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(01)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
-
-		// equates for (experimental) video page copying via Coldfire DMA
-		.equ	MCD_SINGLE_DMA, 0x100
-		.equ	MCD_TT_FLAGS_CW, 0x2
-		.equ	MCD_TT_FLAGS_RL, 0x1
-		.equ	MCD_TT_FLAGS_SP, 0x4
-		.equ	DMA_ALWAYS, 0
-
-/* Register read/write macros */
-#define MCF_GPT0_GMS                         __MBAR+0x800
-#define MCF_SLT0_SCNT                        __MBAR+0x908
-
-		.altmacro
+/*
+ * used for "forwarding" interrupt handlers. This just clears the "pending interrupt"
+ * flag from the EDGE PORT flag register, set the status register to the appropriate interrupt
+ * mask an jump through the corresponging vector
+ */
        .macro  irq vector,int_mask,clr_int
-		move.w	#0x2700,sr			// disable interrupt
-		subq.l	#8,a7
-		movem.l	d0/a5,(a7)			// save registers
+        move.w  #0x2700,sr                      // disable interrupts
+        subq.l  #8,sp
+        movem.l d0/a5,(sp)                      // save registers

        lea     MCF_EPORT_EPFR,a5
        move.b  #\clr_int,(a5)                  // clear int pending

-		movem.l	(a7),d0/a5			// restore registers
-		addq.l	#8,a7
-		move.l	\vector,-(a7)
+        movem.l (sp),d0/a5                      // restore registers
+        addq.l  #8,sp
+        move.l  \vector,-(sp)
        move    #0x2\int_mask\()00,sr
        rts
        .endm

-/*
- * FIXME: this is a GNU gas kludge. Ugly, but I just can't come up with any smarter solution
- *
- * GNU as does not support multi-character constants. At least I don't know of any way it would.
- * The following might look more than strange, but I considered the statement
- *
- * mchar	move.l, 'T,'E,'S,'T,-(SP)
- *
- * somewhat more readable than
- *
- * move.l #1413829460,-(SP)
- *
- * If anybody knows of any better way on how to do this - please do!
- *
- */
-	.macro mchar  st,a,b,c,d,tgt
-	\st #\a << 24|\b<<16|\c<<8|\d,\tgt
-	.endm
-
        .text
 _vec_init:
        move.l  a2,-(sp)                        // Backup registers
@@ -240,6 +167,9 @@ _vec_init:
        move.l  d0,a0
        move.l  a0,a2

+/*
+ * first, set standard vector for all exceptions
+ */
 init_vec:
        move.l  #256,d0
        lea     std_exc_vec(pc),a1              // standard vector
@@ -248,46 +178,48 @@ init_vec_loop:
        subq.l  #1,d0
        bne     init_vec_loop

+// set individual interrupt handler assignments
+
        move.l  #__SUP_SP,(a0)                  // set initial stack pointer at start of exception vector table

        lea     reset_vector(pc),a1             // set reset vector
        move.l  a1,0x04(a0)

-		lea	access_exception(pc),a1		// set illegal access exception handler
+        lea     access(pc),a1                   // set illegal access exception handler
        move.l  a1,0x08(a0)

-		.extern	_get_bas_drivers
+// install spurious interrupt handler
+        lea     _lowlevel_isr_handler,a1
+        move.l	a1,0x60(a0)
+
 // trap #0 (without any parameters for now) is used to provide BaS' driver addresses to the OS
        lea     _get_bas_drivers(pc),a1
        move.l  a1,0x80(a0)                     // trap #0 exception vector

-#ifdef MACHINE_FIREBEE
-// ACP interrupts 1-7 (user-defined, generated by FPGA on the FireBee, M5484LITE has irq7 and irq5 for PCI)
+// MFP non-autovector interrupt handlers. Those are just rerouted to their autovector counterparts
+
        lea     irq1(pc),a1
        move.l  a1,0x104(a0)
+
        lea     irq2(pc),a1
        move.l  a1,0x108(a0)
+
        lea     irq3(pc),a1
        move.l  a1,0x10c(a0)
+
        lea     irq4(pc),a1
        move.l  a1,0x110(a0)
+
        lea     irq5(pc),a1
        move.l  a1,0x114(a0)
+
        lea     irq6(pc),a1
        move.l  a1,0x118(a0)
+
        lea     irq7(pc),a1
        move.l  a1,0x11c(a0)

-// install PSC vectors (used for PIC communication on the FireBee)
-		lea	handler_psc3(pc),a1
-		// PSC3 interrupt source = 32
-		move.l	a1,(INT_SOURCE_PSC3 + 64) * 4(a0)

-// timer vectors (triggers when vbashi gets changed, used for video page copy)
-		lea	handler_gpt0(pc),a1
-		// GPT0 interrupt source = 62
-		move.l	a1,(INT_SOURCE_GPT0 + 64) * 4(a0)
-#endif /* MACHINE_FIREBEE */

 // install lowlevel_isr_handler for the three GPT timers
        lea     _lowlevel_isr_handler(pc),a1
@@ -295,16 +227,28 @@ init_vec_loop:
        move.l  a1,(INT_SOURCE_GPT2 + 64) * 4(a0)
        move.l  a1,(INT_SOURCE_GPT3 + 64) * 4(a0)

+// install lowlevel_isr_handler for the PSC3 interrupt
+        move.l  a1,(INT_SOURCE_PSC3 + 64) * 4(a0)
+
+// install lowlevel_isr_handler for Coldfire DMA interrupts
+        move.l  a1,(INT_SOURCE_DMA + 64) * 4(a0)
+
+// install lowlevel_isr_handler for the XLBPCI interrupt
+        move.l  a1,(INT_SOURCE_XLBPCI + 64) * 4(a0)
+
 // install lowlevel_isr_handler for the FEC0  interrupt
        move.l  a1,(INT_SOURCE_FEC0 + 64) * 4(a0)

 #ifndef MACHINE_FIREBEE
-// FEC1 not wired on the FireBee
+// FEC1 not wired on the FireBee (used for FPGA as GPIO), but available on other machines
        move.l  a1,(INT_SOURCE_FEC1 + 64) * 4(a0)
 #endif

-// install lowlevel_isr_handler for DMA interrupts
-		move.l	a1,(INT_SOURCE_DMA + 64) * 4(a0)
+#ifdef MACHINE_FIREBEE
+
+// timer vectors (triggers when vbashi gets changed, used for video page copy)
+        move.l  a1,(INT_SOURCE_GPT0 + 64) * 4(a0)
+#endif /* MACHINE_FIREBEE */

        move.l  (sp)+,a2                        // Restore registers
        rts
@@ -315,12 +259,13 @@ init_vec_loop:
 */
 vector_table_start:
 std_exc_vec:
+_std_exc_vec:
        move.w	#0x2700,sr                      // disable interrupt
-		subq.l	#8,a7
+        subq.l  #8,sp
        movem.l d0/a5,(sp)                      // save registers
        move.w  8(sp),d0                        // fetch vector
        and.l   #0x3fc,d0                       // mask out vector number
-
+//#define DBG_EXC
 #ifdef DBG_EXC
        // printout vector number of exception

@@ -352,13 +297,13 @@ noprint:
        move.l  (a5),d0                         // fetch exception routine address

        move.l  4(sp),a5                        // restore a5
-		move.l	d0,4(a7)			// store exception routine address
+        move.l  d0,4(sp)                        // store exception routine address

-		move.w	10(a7),d0			// restore original SR
+        move.w	10(sp),d0                       // restore original SR (irq mask)
        bset	#13,d0                          // set supervisor bit
        move.w	d0,sr                           //
-		move.l	(a7)+,d0			// restore d0
-		rts					// jump to exception routine
+        move.l  (sp)+,d0                        // restore d0
+        rts                                     // jump to exception handler

 exception_text:
        .ascii  "DEBUG: EXCEPTION %d caught at %p"
@@ -366,52 +311,46 @@ exception_text:
        .align  4

 reset_vector:
-		move.w	#0x2700,sr			// disable interrupt
+        move.w  #0x2700,sr                      // disable interrupts
        move.l  #0x31415926,d0
        cmp.l   0x426,d0                        // _resvalid: reset vector valid?
        beq     std_exc_vec                     // yes->
        jmp     _rom_entry                      // no, cold start machine

-//
-// Triggered when code tries to access a memory area that is not known to the MMU yet.
-// This is either a "classic" bus error or the MMU hit a "legal" page not yet mapped.
-//
-access_exception:
-		move.w	#0x2700,sr			// avoid us being interrupted by the video handler
-							// (this would probably overwrite the MMUAR register)
+access:
+        move.w  #0x2700,sr                      // disable interrupts

-		// save gcc scratch registers, others will be handled by called function
-		lea	-4*4(sp),sp
-		movem.l	d0-d1/a0-a1,(sp)
+        link    a6,#-4 * 4                      // make room for gcc scratch registers
+        movem.l d0-d1/a0-a1,(sp)                // save them

+        move.l  4(a6),-(sp)                     // push format_status
+        move.l  8(a6),-(sp)                     // pc at exception
+        move.l  MCF_MMU_MMUAR,-(sp)             // MMU fault address
+        move.l  MCF_MMU_MMUSR,-(sp)             // MMU status regisrter
+        move.w  #0x2300,sr                      // can lower interrupt mask now that MMU status is safe
+        jsr     _mmutr_miss                     // call C routine
+        lea     4 * 4(sp),sp                    // adjust stack

-		lea	4*4(sp),a0			// original stack pointer
-
-		move.l	(a0),-(sp)			// format status word
-		move.l	4(a0),-(sp)			// program counter at access error
-
-		jsr	_access_exception		// note the underscore
-		lea	2*4(sp),sp			// adjust stack
-
-		tst.l	d0				// handled?
-
-		movem.l	(sp),d0-d1/a0-a1		// restore scratch registers
-		lea		4*4(sp),sp
-
-		beq	bus_error			// no
+        tst.l   d0                              // exception handler signals bus error
+        bne     bus_error

+        movem.l (sp),d0-d1/a0-a1                // restore registers
+        unlk    a6
        rte

 bus_error:
-		bra	std_exc_vec
+        movem.l (sp),d0-d1/a0-a1                // restore registers
+        unlk    a6
+        bra     std_exc_vec                     // FIXME: this seems to be bogous...

 zero_divide:
-		move.l	a0,-(a7)
-		move.l	d0,-(a7)
-		move.l	12(a7),a0			// pc
+        move.w  #0x2700,sr                      // disable interrupt
+        move.l  a0,-(sp)
+        move.l  d0,-(sp)
+        move.l  12(sp),a0                       // pc
        move.w  (a0)+,d0                        // command word
        btst    #7,d0                           // long?
-		beq	zd_word				// nein->
+        beq     zd_word                         // no->
        addq.l  #2,a0

 zd_word:
@@ -430,282 +369,104 @@ zd_nal:	cmp.w	#0x3c,d0				// immediate?
        beq     zd_end                          // no
        addq.l  #2,a0
 zd_end:
-		move.l	a0,12(a7)
-		move.l	(a7)+,d0
-		move.l	(a7)+,a0
+        move.l  a0,12(sp)
+        move.l  (sp)+,d0
+        move.l  (sp)+,a0
        rte

-irq1:
-		irq	0x64,1,0x02
+#ifdef _NOT_USED_
+linea:
+        move.w  #0x2700,sr                      // disable interrupt
+        halt
+        nop
+        nop
+linef:
+        move.w  #0x2700,sr                      // disable interrupt
+        halt
+        nop
+        nop
+format:
+        move.w  #0x2700,sr                      // disable interrupt
+        halt
+        nop
+        nop

-irq2:		// hbl
-		//	move.b	#3,2(a7)
-		//	rte
-		irq	0x68,2,0x04
+//floating point
+flpoow:
+        move.w  #0x2700,sr                      // disable interrupt
+        halt
+        nop
+        nop
+#endif /* _NOT_USED */

-irq3:
-		irq	0x6c,3,0x08

-irq4:		// vbl
-		irq	0x70,4,0x10
+irq1:           irq     0x64, 1, 0x02           // Level 1 autovector interrupt (unused)
+irq2:           irq     0x68, 2, 0x04           // Level 2 autovector interrupt (horizontal blank)
+irq3:           irq     0x6c, 3, 0x08           // Level 3 autovector interrupt (unused)
+irq4:           irq     0x70, 4, 0x10           // Level 4 autovector interrupt (vertical blank)

-#if MACHINE_M5484LITE					// handlers for M5484LITE

-irq5:							// irq5 is tied to PCI INTC# and PCI INTD# on the M5484LITE
-		move.w	#0x2700,sr			// disable interrupts

-		lea	-4*4(sp),sp			// save gcc scratch registers
+#if defined(MACHINE_FIREBEE)                    /* these handlers are only meaningful for the Firebee */
+irq5:           //move.w  #0x2700,sr            // disable interrupts
+        subq.l	#4,sp                           // extra space
+
+        link	a6,#-4 * 4                      // save gcc scratch registers
        movem.l	d0-d1/a0-a1,(sp)

        jsr	_irq5_handler                       // call C handler routine

+        tst.b	d0                              // handled?
+        beq	irq5_forward
+
        movem.l	(sp),d0-d1/a0-a1                // restore registers
-		lea	4*4(sp),sp
+        unlk	a6
+        addq.l	#4,sp

        rte                                     // return from exception

-irq5text:
-		.ascii	"IRQ5!"
-		.dc.b	13,10,0
-
-irq6:
-		irq	0x74,5,0x20
-
-irq7:							// irq7 is tied to PCI INTA# and PCI INTB# on the M5484LITE
-
-		move.w	#0x2700,sr			// disable interrupts
-
-		lea	-4*4(sp),sp			// save gcc scratch registers
-		movem.l	d0-d1/a0-a1,(sp)
-
-		jsr	_irq7_handler			// call C handler routine
+irq5_forward:   move.l	0x74,a0                 // fetch OS irq5 vector
+        add.l	_rt_vbr,a0                      // add runtime vbr
+        move.l	a0,4(a6)                        // put on stack

        movem.l	(sp),d0-d1/a0-a1                // restore registers
-		lea	4*4(sp),sp
-
-		rte					// return from exception
-
-irq7text:
-		.ascii	"IRQ7!"
-		.dc.b	13,10,0
-
-#elif MACHINE_FIREBEE		/* these handlers are only meaningful for the Firebee */
-irq5:
-		irq	0x74,5,0x20
-
-		.extern	_irq6_interrupt_handler		// highlevel C handler
-
-irq6:	// MFP interrupt from FPGA
-		move.w	#0x2700,sr			// disable interrupts
-
-		lea	-4 * 4(sp),sp			// save gcc scratch registers
-		movem.l	d0-d1/a0-a1,(sp)
-
-		move.l	4 * 4(sp),-(sp)			// push original exception stack frame
-		move.l	5 * 4(sp),-(sp)
-		jsr	_irq6_interrupt_handler		// call highlevel C handler
-		lea.l	2 * 4(sp),sp
-
-		tst.l	d0				// completely handled?
-
-		movem.l	(sp),d0-d1/a0-a1		// restore registers saved above
-		lea	4 * 4(sp),sp			// adjust stack
-
-		beq	irq6_os				// call OS handler
-		rte
-
-irq6_os:	// call native OS irq6 handler
-		move.l	a5,-(sp)			// save registers: TODO: this could be done more effective
-		move.l	d0,-(sp)
-		move.l	0xf0020000,a5			// fetch vector
-		add.l	_rt_vbr,a5			// add vector base
-		move.l	(a5),d0				// fetch handler
-		move.l	4(sp),a5			// restore a5
-		move.l	d0,4(sp)			// prepare indirect return
-		move.l	(sp)+,d0			// restore d0
-		move.w	#0x2600,sr			// set interrupt mask
-		rts
-
-#ifdef _NOT_USED_	/* functionality moved to _irq6_interrupt_handler() (C) */
-		subq.l	#8,a7
-		movem.l	d0/a5,(a7)			// save registers
-
-		lea	MCF_EPORT_EPFR,a5		// clear int6 from edge port
-		bset	#6,(a5)
-
-		// there was a potential bug here before: would also clear all other edge port interrupts that might have happened...
-		// move.b	#0x40,(a5)			// clear int6 from edge port
-
-// screen adr change timed out?
-		move.l	_video_sbt,d0
-		beq	irq6_non_sca			// nothing to do if 0
-		sub.l	#0x70000000,d0			// substract 14 seconds
-		lea	MCF_SLT0_SCNT,a5
-		cmp.l	(a5),d0				// time reached?
-		ble	irq6_non_sca			// not yet
-
-		lea	-28(a7),a7			// save more registers
-		movem.l	d0-d4/a0-a1,(a7)		//
-		clr.l	d3				// beginn mit 0
-		jsr	_flush_and_invalidate_caches
-
- // eintrag suchen
- irq6_next_sca:
-		move.l	d3,d0
-		move.l	d0,MCF_MMU_MMUAR		// addresse
-		move.l	#0x106,d4
-		move.l	d4,MCF_MMU_MMUOR		// suchen ->
-		nop
-		move.l	MCF_MMU_MMUOR,d4
-		clr.w	d4
-		swap	d4
-		move.l	d4,MCF_MMU_MMUAR
-		mvz.w	#0x10e,d4
-		move.l	d4,MCF_MMU_MMUOR		// einträge holen aus mmu
-		nop
-		move.l	MCF_MMU_MMUTR,d4		// ID holen
-		lsr.l	#2,d4				// bit 9 bis 2
-		cmp.w	#sca_page_ID,d4			// ist screen change ID?
-		bne	irq6_sca_pn			// nein -> page keine screen area next
-// eintrag <EFBFBD>ndern
-		add.l	#std_mmutr,d0
-		move.l	d3,d1				// page 0?
-		beq	irq6_sca_pn0			// ja ->
-		add.l	#copyback_mmudr,d1		// sonst page cb
-		bra	irq6_sca_pn1c
-irq6_sca_pn0:
-		add.l	#writethrough_mmudr|MCF_MMU_MMUDR_LK,d1	// page wt and locked
-irq6_sca_pn1c:
-		mvz.w	#0x10b,d2			// MMU update
-		move.l	d0,MCF_MMU_MMUTR
-		move.l	d1,MCF_MMU_MMUDR
-		move.l	d2,MCF_MMU_MMUOR		// setze tlb data only
-		nop
-// page copy
-		move.l	d3,a0
-		add.l	#0x60000000,a0
-		move.l	d3,a1
-		move.l	#0x10000,d4			// one whole page (1 MB)
-
-irq6_sca_pn:
-		add.l	#0x00100000,d3			// next
-		cmp.l	#0x00d00000,d3			// ende?
-		blt		irq6_next_sca		// nein->
-
-		move.l	#0x2000,d0
-		move.l	d0,_video_tlb			// anfangszustand wieder herstellen
-		clr.l	_video_sbt			// zeit löschen
-
-		movem.l	(sp),d0-d4/a0-a1		// restore registers
-		lea	7 * 4(sp),sp
-
-irq6_non_sca:
-// test auf acsi dma -----------------------------------------------------------------
-	lea		0xfffffa0b,a5
-	bset	#7,-4(a5)			// int ena
-	btst.b	#7,(a5)				// acsi dma int?
-	beq		non_acsi_dma
-	bsr		acsi_dma
-non_acsi_dma:
-// ----------------------------------------------------------------------------------
-		tst.b	(a5)
-		bne	irq6_1
-		tst.b	2(a5)
-		bne	irq6_1
-		movem.l	(a7),d0/a5
-		addq.l	#8,a7
-		rte
-irq6_1:
-		lea	MCF_GPIO_PODR_FEC1L,a5
-		bclr.b	#4,(a5)					// led on
-		lea	blinker,a5
-		addq.l	#1,(a5)					// +1
-		move.l	(a5),d0
-		and.l	#0x80,d0
-		bne	irq6_2
-		lea	MCF_GPIO_PODR_FEC1L,a5
-		bset.b	#4,(a5)					// led off
-irq6_2:
-		move.l	0xf0020000,a5				// vector holen
-		add.l	_rt_vbr,a5			    	// basis
-		move.l	(a5),d0					// vector holen
-		move.l	4(a7),a5				// a5 zurück
-		move.l	d0,4(a7)				// vector eintragen
-		move.l	(a7)+,d0				// d0 zurück
-		move	#0x2600,sr
-		rts
-
-		.data
-blinker:.long	0
-
-
-	.text
+        unlk	a6			//
+        move.w	#0x2500,sr                      // set interrupt level
+        rts                                     // jump through vector

 /*
- * pseudo dma
+ * irq6 needs special treatment since - because the Coldfire only supports autovector interrupts
+ * - the exception vector is provided by the simulated MFP from the FPGA
 */
-acsi_dma:							// atari dma
-		move.l  a1,-(a7)
-		move.l  d1,-(a7)
+irq6:		move.w	#0x2700,sr                  // disable interrupt
+        subq.l	#4,sp                           // extra space

-		lea	MCF_PSC0_PSCTB_8BIT,a1	// ++ vr
-		mchar move.l, 'D,'M','A,'\ ,(a1)
-		//move.l	#"DMA ",(a1)
-		mchar	move.l,'I,'N,'T,'!,(a1)
-		// move.l	#'INT!',(a1)
+        link	a6,#-4 * 4                      // save gcc scratch registers
+        movem.l d0-d1/a0-a1,(sp)

-		lea 	0xf0020110,a5		// fifo daten
-acsi_dma_start:
-		move.l	-12(a5),a1			// dma adresse
-		move.l	-8(a5),d0			// byt counter
-		ble		acsi_dma_end
-		btst.b	#0,-16(a5)			// write? (dma modus reg)
-		bne		acsi_dma_wl			// ja->
-acsi_dma_rl:
-	tst.b	-4(a5) 				// dma req?
-	bpl		acsi_dma_finished	// nein->
-	move.l	(a5),(a1)+			// read 4 bytes
-	move.l	(a5),(a1)+			// read 4 bytes
-	move.l	(a5),(a1)+			// read 4 bytes
-	move.l	(a5),(a1)+			// read 4 bytes
+        move.l	8(a6),-(sp)                     // format status word
+        move.l	12(a6),-(sp)                    // pc at exception
+        jsr     _irq6_handler                   // call C handler
+        lea     8(sp),sp                        // fix stack

-	moveq	#'.',d1
-	move.b	d1,MCF_PSC0_PSCTB_8BIT
+        tst.b	d0                              // interrupt handled?
+        beq	irq6_forward                        // no, forward to TOS

-	sub.l	#16,d0				// byt counter -16
-	bpl		acsi_dma_rl
-	bra		acsi_dma_finished
-acsi_dma_wl:
-	tst.b	-4(a5) 				// dma req?
-	bpl		acsi_dma_finished	// nein->
-	move.l	(a1)+,(a5)			// write 4 byts
-	move.l	(a1)+,(a5)			// write 4 byts
-	move.l	(a1)+,(a5)			// write 4 byts
-	move.l	(a1)+,(a5)			// write 4 byts
+        movem.l	(sp),d0-d1/a0-a1                // restore registers
+        unlk	a6
+        addq.l	#4,sp                           // "extra space" not needed in this case
+        rte

-	moveq	#'.',d1
-	move.b	d1,MCF_PSC0_PSCTB_8BIT
+irq6_forward:
+        move.l	0xf0020000,a0                   // fetch "MFP interrupt vector" from FPGA
+        add.l	_rt_vbr,a0                      // add runtime VBR
+        move.l  (a0),4(a6)                      // fetch handler address and put it on "extra space"

-		sub.l	#16,d0				// byt counter -16
-		bpl		acsi_dma_wl
-acsi_dma_finished:
-		move.l	a1,-12(a5)			// adresse zur<EFBFBD>ck
-		move.l	d0,-8(a5)			// byt counter zur<EFBFBD>ck
-acsi_dma_end:
-	tst.b	-4(a5) 				// dma req?
-	bmi		acsi_dma_start		// ja->
-	lea		0xfffffa0b,a5
-	bclr.b	#7,4(a5)			// clear int in service mfp
-	bclr.b	#7,(a5)				// clear int pending mfp 0xfffffa0b
+        movem.l (sp),d0-d1/a0-a1
+        unlk	a6
+        move.w	#0x2600,sr                      // set interrupt mask to MFP level

-		move.w	#0x0d0a,d1
-		move.w	d1,MCF_PSC0_PSCTB_8BIT
-
-		move.l	(a7)+,d1
-		move.l	(a7)+,a1
-		rts
-
-#endif /* _NOT_USED_ */
+        rts                                     // jump through vector

 /*
 * irq 7 = pseudo bus error
@@ -732,143 +493,109 @@ irq7:
        move.l	(sp)+,a0
        rts                                     // Forward to the Access Error handler

-/*
- * psc3 com PIC MCF
- */
-handler_psc3:
-		.extern _pic_interrupt_handler
+#else                                           // handlers for M5484LITE
+
+irq5:
+        move.w	#0x2700,sr                      // disable interrupts
+        subq.l	#4,sp                           // extra space
+
+        link	a6,#-4 * 4                      // save gcc scratch registers
+        movem.l	d0-d1/a0-a1,(sp)
+
+        jsr     _irq5_handler                   // call C handler routine
+
+        tst.b	d0                              // handled?
+        beq     irq5_forward
+
+        movem.l	(sp),d0-d1/a0-a1                // restore registers
+        unlk	a6
+        addq.l	#4,sp
+
+        rte                                     // return from exception
+
+irq5_forward:
+        move.l	0x74,a0                         // fetch OS irq5 vector
+        add.l	_rt_vbr,a0                      // add runtime vbr
+        move.l	a0,4(a6)                        // put on stack
+
+        movem.l	(sp),d0-d1/a0-a1                // restore registers
+        unlk	a6                              //
+        move.w	#0x2500,sr                      // set interrupt level
+        rts                                     // jump through vector
+
+irq6:
+        irq 0x74,5,0x20
+
+irq7:                                           // irq7 is tied to PCI INTA# and PCI INTB# on the M5484LITE
+
+        move.w	#0x2700,sr                      // disable interrupts

-		move.w	#0x2700,sr				// disable interrupt
        lea	-4*4(sp),sp                         // save gcc scratch registers
        movem.l	d0-d1/a0-a1,(sp)

-		jsr	_pic_interrupt_handler			// call high level interrupt handler
+        jsr	_irq7_handler                       // call C handler routine

        movem.l	(sp),d0-d1/a0-a1                // restore registers
-		rte
+        lea	4 * 4(sp),sp

-/*
- * general purpose timer 0 (GPT0): video change, later also others. GPT0 is used as
- * input trigger. It is connected to the TIN0 signal of the FPGA which triggers it everytime
- * vbasehi is written to, i.e. when the video base address gets changed
- */
-handler_gpt0:
-		move	#0x2700,sr				// disable interrupts
+        rte                                     // return from exception

-		lea	-28(a7),a7				// save registers
-		movem.l	d0-d4/a0-a1,(a7)
-
-		mvz.b	vbasehi,d0				// screen base address high
-		cmp.w	#2,d0					// screen base lower than 0x20000?
-		blt	video_chg_end				// yes, do nothing
-		cmp.w	#0xd0,d0				// lower than 0xd00000? - normal Falcon video area, mapped
-								// to 60d00000 (FPGA video memory)
-		blt	sca_other
-
-		lea	MCF_SLT0_SCNT,a0
-		move.l	(a0),_video_sbt				// save time
-
-		bra	video_chg_end
-		// FIXME: don't we need to get out here?
-
-sca_other:
-		lsl.l	#8,d0					// build new screen start address from Atari register contents
-		move.b	0xffff8203,d0				// mid byte
-		lsl.l	#8,d0
-		move.b  0xffff820d,d0				// low byte
-		move.l	d0,d3
-
-video_chg_1page:
-// check if page is already marked as video page
-		moveq	#20,d4
-		move.l	d0,d2
-		lsr.l	d4,d2					// new page
-		move.l	_video_tlb,d4
-		bset.l	d2,d4					// set as changed
-		bne	video_chg_2page				// was it set already?
-		move.l	d4,_video_tlb
-		jsr	_flush_and_invalidate_caches
-
-video_copy_data:
-		move.l	d4,_video_tlb
-		and.l	#0x00f00000,d0
-		move.l	d0,a0
-		move.l	a0,a1
-		add.l	#0x60000000,a1
-		move.l	#0x10000,d4				// whole page
-
-video_copy_data_loop:
-		move.l	(a0)+,(a1)+				// copy video page contents to real screen
-		move.l	(a0)+,(a1)+
-		move.l	(a0)+,(a1)+
-		move.l	(a0)+,(a1)+
-		subq.l	#1,d4
-		bne	video_copy_data_loop
-
-// eintrag suchen
-		move.l	d0,MCF_MMU_MMUAR			// adress
-		move.l	#0x106,d4
-		move.l	d4,MCF_MMU_MMUOR			// search -> new one will be offered if not found
-		nop
-		move.l	MCF_MMU_MMUOR,d4
-		clr.w	d4
-		swap	d4
-		move.l	d4,MCF_MMU_MMUAR
-		move.l	d0,d1
-		add.l	#MCF_MMU_MMUTR_ID(sca_page_ID)|std_mmutr,d0
-		add.l	#0x60000000|writethrough_mmudr|MCF_MMU_MMUDR_LK,d1
-		mvz.w	#0x10b,d2				// MMU update
-		move.l	d0,MCF_MMU_MMUTR
-		move.l	d1,MCF_MMU_MMUDR
-		move.l	d2,MCF_MMU_MMUOR			// setzen vidoe maped to 60xxx only data
-		nop
-
-video_chg_2page:
-// test of adjacent page is needed also
-		move.l	d3,d0
-		mvz.w	0xffff8210,d4				// byts pro zeile
-		mvz.w	0xffff82aa,d2				// zeilen ende
-		mvz.w	0xffff82a8,d1				// zeilenstart
-		sub.l	d1,d2					// differenz = anzahl zeilen
-		mulu	d2,d4					// maximal 480 zeilen
-		add.l	d4,d0					// video gr<EFBFBD>sse
-		cmp.l	#__STRAM_END,d0				// maximale addresse
-		bge	video_chg_end				// wenn gleich oder gr<EFBFBD>sser -> fertig
-		moveq	#20,d4
-		move.l	d0,d2
-		lsr.l	d4,d2					// neue page
-		move.l	_video_tlb,d4
-		bset.l	d2,d4					// setzen als ge<EFBFBD>ndert
-		beq	video_copy_data				// nein nochmal
-video_chg_end:
-		lea	MCF_GPT0_GMS,a0				// clear interrupt
-		bclr.b	#0,3(a0)
-		nop
-		bset.b	#0,3(a0)
-
-		movem.l	(a7),d0-d4/a0-a1			// restore saved registers
-		lea	7 * 4(sp),a7
-		rte
+irq7text:
+        .data
+        .ascii	"IRQ7!"
+        .dc.b	13,10,0
+        .text
 #endif /* MACHINE_FIREBEE */

 /*
 * low-level interrupt service routine for routines registered with
- * isr_register_handler()
+ * isr_register_handler(int vector). If the higlevel routine (isr_execute_handler())
+ * returns != true, the call is forwarded to the OS (through its own vector base).
 */
        .global _lowlevel_isr_handler
        .extern _isr_execute_handler

-_lowlevel_isr_handler:
-		move.w	#0x2700,sr				// disable interrupts
-		link	a6,#-4*4				// make room for
-		movem.l	d0-d1/a0-a1,(sp)			// gcc scratch registers and save them

-		move.w	4(a6),d0				// fetch vector number from stack
+/*
+ * stack format (after link instruction) is like this:
+ *
+ * +12      program counter (return address)
+ * +8       format_status
+ * +4       save area for rts (if we need to jump through the OS vector)
+ * (a6) ->  saved a6 (from link)
+ * -4
+ * -8
+ * -12
+ * (sp) ->  gcc scratch registers save area
+ */
+_lowlevel_isr_handler:
+        subq.l	#4,sp                           // extra space
+        link	a6,#-4 * 4                      // make room for
+        movem.l	d0-d1/a0-a1,(sp)                // gcc scratch registers and save them,
+                                                // other registers will be taken care of by gcc itself
+
+        move.w	8(a6),d0                        // fetch vector number from stack
        lsr.l	#2,d0                           // move it in place
-		andi.l	#0x000000ff,d0				// mask it out
+        andi.l	#0xff,d0                        // mask it out
        move.l	d0,-(sp)                        // push it
        jsr     _isr_execute_handler            // call the C handler
-		lea	4(sp),sp				// adjust stack
+        addq.l	#4,sp                           // adjust stack
+        tst.b	d0                              // handled?
+        beq	lowlevel_forward                    // no, forward it to TOS
+
        movem.l	(sp),d0-d1/a0-a1                // restore registers
-		unlk	a6					// cleanup stack
+        unlk	a6
+        addq.l	#4,sp                           // eliminate extra space
+
        rte
+
+lowlevel_forward:
+        move.l	8(a6),d0                        // fetch OS irq vector
+        lsr.l	#2,d0                           // move it in place
+        andi.l	#0xff,d0                        // mask out vector number
+        add.l	_rt_vbr,d0                      // add runtime vbr
+        move.l	d0,4(a6)                        // put on stack as return address
+
+        movem.l	(sp),d0-d1/a0-a1                // restore registers
+        unlk	a6                              //
+        rts                                     // jump through vector
--- a/Show More
+++ b/Show More