Markus Fröschle
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ef585d16c2
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start of flexbus_register implementation to simplify that
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2016-01-17 20:28:18 +00:00 |
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Markus Fröschle
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5a0a331c09
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fix 13MHz clock sdc
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2016-01-17 08:43:20 +00:00 |
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Markus Fröschle
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04a67e175e
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do not automatically insert delay chains
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2016-01-16 22:11:51 +00:00 |
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Markus Fröschle
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a16e3b7074
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reformat
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2016-01-16 22:04:05 +00:00 |
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Markus Fröschle
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694d5386d1
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fix timing
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2016-01-16 21:38:17 +00:00 |
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Markus Fröschle
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71499cffcb
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fix output delay
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2016-01-15 17:38:29 +00:00 |
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Markus Fröschle
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45894cb3f2
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simplify processes
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2016-01-15 08:37:40 +00:00 |
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Markus Fröschle
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85b4c0f33d
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fix video base address and video counter register
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2016-01-14 22:02:44 +00:00 |
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Markus Fröschle
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e6cc4daf5c
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reformat
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2016-01-14 16:49:11 +00:00 |
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Markus Fröschle
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e8bb97b338
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reformat
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2016-01-14 07:17:08 +00:00 |
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Markus Fröschle
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d5f341d7b5
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remove unused connections
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2016-01-14 06:45:15 +00:00 |
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Markus Fröschle
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829675f564
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formatting
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2016-01-14 06:44:52 +00:00 |
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Markus Fröschle
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d410f3c8fa
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remove unused generated signals
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2016-01-13 16:43:54 +00:00 |
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Markus Fröschle
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30227f5f4e
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reactivated delay chain
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2016-01-13 15:04:24 +00:00 |
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Markus Fröschle
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014d28e80f
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reformat
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2016-01-13 13:23:46 +00:00 |
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Markus Fröschle
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7c35d1a9e6
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remove AHDL files
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2016-01-13 12:54:00 +00:00 |
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Markus Fröschle
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d3e950cb42
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finish conversion to vhdl
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2016-01-13 12:53:03 +00:00 |
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Markus Fröschle
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9901817422
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reformat internal signals
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2016-01-13 07:27:57 +00:00 |
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Markus Fröschle
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9bd96486a6
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renamed pixel_clk_i
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2016-01-13 07:16:24 +00:00 |
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Markus Fröschle
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c2a1b0b9f7
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add file
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2016-01-12 17:11:58 +00:00 |
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Markus Fröschle
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b4666bc264
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reformat
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2016-01-12 17:11:07 +00:00 |
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Markus Fröschle
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02ab7f3bf6
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fix ports
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2016-01-12 17:10:19 +00:00 |
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Markus Fröschle
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2c9e60e5e1
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fix formatting
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2016-01-12 08:00:20 +00:00 |
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Markus Fröschle
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1215add87d
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fix wire loop
still works (kind of) - pixel errors in MiNT, does not boot (no picture) with "pure" EmuTOS?
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2016-01-12 07:58:07 +00:00 |
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Markus Fröschle
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26e1aef29b
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reformat converted VHDL
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2016-01-12 07:14:33 +00:00 |
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Markus Fröschle
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69e2ed8cb1
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translate DDR_CTR to vhd
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2016-01-11 17:55:18 +00:00 |
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Markus Fröschle
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717a5d301a
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fix min instead of max
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2016-01-11 17:07:35 +00:00 |
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Markus Fröschle
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d281dcf94e
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add more DDR clk signals to sdc
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2016-01-11 17:05:39 +00:00 |
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Markus Fröschle
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17c41a655f
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translate interrupt_controller to vhd
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2016-01-11 16:11:04 +00:00 |
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Markus Fröschle
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5b8820e371
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replace video.bdf with video.vhd
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2016-01-11 08:43:42 +00:00 |
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Markus Fröschle
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b7a6d78726
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convert firebee1.bdf to vhdl
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2016-01-11 08:18:06 +00:00 |
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Markus Fröschle
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d919644895
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reformat
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2016-01-11 07:13:36 +00:00 |
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Markus Fröschle
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af43584a42
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modify settings
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2016-01-10 19:05:15 +00:00 |
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Markus Fröschle
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0691977684
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rename Video.bdf to lower case
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2016-01-10 10:24:30 +00:00 |
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Markus Fröschle
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d954c5dc60
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rename to make it usable as alternative in Quartus
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2016-01-10 07:44:20 +00:00 |
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Markus Fröschle
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a5f1703404
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remove delay chains
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2016-01-09 21:36:02 +00:00 |
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Markus Fröschle
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582fcc5de5
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rename video registers to their Falcon names
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2016-01-09 18:49:18 +00:00 |
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Markus Fröschle
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fe7eb5cae7
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fix ACP web address
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2015-11-18 06:41:49 +00:00 |
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Markus Fröschle
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a021006b32
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patch with Fredi's lp fix (and others)
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2015-10-26 06:48:18 +00:00 |
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Markus Fröschle
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9e857c1f99
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formatting
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2015-10-18 19:33:25 +00:00 |
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Markus Fröschle
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25bee36d5e
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reformat
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2015-10-18 19:27:57 +00:00 |
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Markus Fröschle
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47c793dae2
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added another false path to fix timing
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2015-10-18 01:02:05 +00:00 |
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Markus Fröschle
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dc98f061fd
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fix timing (set_false_path was missing)
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2015-10-18 00:57:04 +00:00 |
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Markus Fröschle
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2fd6484413
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changed component name to lower case
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2015-10-17 16:10:06 +00:00 |
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Markus Fröschle
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fcbb96896f
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add missing project file
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2015-10-17 10:58:27 +00:00 |
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Markus Fröschle
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3a58676b8b
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basically working config. Resolution changes still scramble the screen, however
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2015-10-17 09:40:48 +00:00 |
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Markus Fröschle
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03a110f03b
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improved timing, added timing constraints, got rid of CLK_33M
Design compiles and runs, but still has issues with different screen resolutions and video clocks
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2015-09-23 09:49:05 +00:00 |
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Markus Fröschle
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ca251a2cf1
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cleanup
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2015-09-21 05:32:56 +00:00 |
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Markus Fröschle
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79a27d2bd6
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cleanup
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2015-09-21 05:21:50 +00:00 |
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Markus Fröschle
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391065fc54
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cleanup
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2015-09-21 05:16:42 +00:00 |
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