reformat converted VHDL
This commit is contained in:
Markus Fröschle
@@ -15,45 +15,47 @@ CONSTANT FIFO_HWM = 500;
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SUBDESIGN ddr_ctr
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(
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-- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
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FB_ADR[31..0] : INPUT;
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nFB_CS1 : INPUT;
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nFB_CS2 : INPUT;
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nFB_CS3 : INPUT;
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nFB_OE : INPUT;
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FB_SIZE0 : INPUT;
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FB_SIZE1 : INPUT;
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nRSTO : INPUT;
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MAIN_CLK : INPUT;
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FB_ALE : INPUT;
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nFB_WR : INPUT;
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DDR_SYNC_66M : INPUT;
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CLR_FIFO : INPUT;
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VIDEO_RAM_CTR[15..0] : INPUT;
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BLITTER_ADR[31..0] : INPUT;
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BLITTER_SIG : INPUT;
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BLITTER_WR : INPUT;
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DDRCLK0 : INPUT;
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CLK33M : INPUT;
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FIFO_MW[8..0] : INPUT;
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VA[12..0] : OUTPUT;
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nVWE : OUTPUT;
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nVRAS : OUTPUT;
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nVCS : OUTPUT;
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VCKE : OUTPUT;
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nVCAS : OUTPUT;
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FB_LE[3..0] : OUTPUT;
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FB_VDOE[3..0] : OUTPUT;
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SR_FIFO_WRE : OUTPUT;
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SR_DDR_FB : OUTPUT;
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SR_DDR_WR : OUTPUT;
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SR_DDRWR_D_SEL : OUTPUT;
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SR_VDMP[7..0] : OUTPUT;
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VIDEO_DDR_TA : OUTPUT;
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SR_BLITTER_DACK : OUTPUT;
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BA[1..0] : OUTPUT;
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DDRWR_D_SEL1 : OUTPUT;
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VDM_SEL[3..0] : OUTPUT;
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FB_AD[31..0] : BIDIR;
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FB_ADR[31..0] : INPUT;
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nFB_CS1 : INPUT;
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nFB_CS2 : INPUT;
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nFB_CS3 : INPUT;
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nFB_OE : INPUT;
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FB_SIZE0 : INPUT;
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FB_SIZE1 : INPUT;
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nRSTO : INPUT;
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MAIN_CLK : INPUT;
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FB_ALE : INPUT;
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nFB_WR : INPUT;
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DDR_SYNC_66M : INPUT;
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CLR_FIFO : INPUT;
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VIDEO_RAM_CTR[15..0] : INPUT;
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BLITTER_ADR[31..0] : INPUT;
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BLITTER_SIG : INPUT;
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BLITTER_WR : INPUT;
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CLK33M : INPUT;
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FIFO_MW[8..0] : INPUT;
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DDRCLK0 : INPUT;
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VA[12..0] : OUTPUT;
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nVWE : OUTPUT;
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nVRAS : OUTPUT;
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nVCS : OUTPUT;
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VCKE : OUTPUT;
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nVCAS : OUTPUT;
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BA[1..0] : OUTPUT;
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VDM_SEL[3..0] : OUTPUT;
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FB_LE[3..0] : OUTPUT;
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FB_VDOE[3..0] : OUTPUT;
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SR_FIFO_WRE : OUTPUT;
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SR_DDR_FB : OUTPUT;
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SR_DDR_WR : OUTPUT;
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SR_DDRWR_D_SEL : OUTPUT;
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SR_VDMP[7..0] : OUTPUT;
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VIDEO_DDR_TA : OUTPUT;
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SR_BLITTER_DACK : OUTPUT;
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DDRWR_D_SEL1 : OUTPUT;
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FB_AD[31..0] : BIDIR;
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-- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
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)
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@@ -657,10 +659,10 @@ BEGIN
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VIDEO_CNT_M = !nFB_CS1 & FB_ADR[19..1]==H"7C103"; -- 8207/2
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VIDEO_CNT_H = !nFB_CS1 & FB_ADR[19..1]==H"7C102"; -- 8204,5/2
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% FB_AD[31..24] = lpm_bustri_BYT(
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FB_AD[31..24] = lpm_bustri_BYT(
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VIDEO_BASE_H & (0, VIDEO_BASE_X_D[])
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# VIDEO_CNT_H & (0, VIDEO_ACT_ADR[26..24]),
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(VIDEO_BASE_H # VIDEO_CNT_H) & !nFB_OE); %
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(VIDEO_BASE_H # VIDEO_CNT_H) & !nFB_OE);
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FB_AD[23..16] = lpm_bustri_BYT(
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VIDEO_BASE_L & VIDEO_BASE_L_D[]
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2065
Video/DDR_CTR.vhd
2065
Video/DDR_CTR.vhd
File diff suppressed because it is too large
Load Diff
1261
Video/video.vhd
1261
Video/video.vhd
File diff suppressed because it is too large
Load Diff
364
firebee1.qsf
364
firebee1.qsf
@@ -670,186 +670,186 @@ set_global_assignment -name SYNCHRONIZER_IDENTIFICATION AUTO
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set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON
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set_global_assignment -name SAVE_DISK_SPACE OFF
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set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
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set_global_assignment -name SOURCE_FILE altpll_reconfig1.cmp
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set_global_assignment -name VHDL_FILE Interrupt_Handler/interrupt_handler.vhd
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set_global_assignment -name SOURCE_FILE altpll4.cmp
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set_global_assignment -name SDC_FILE firebee1.sdc
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set_global_assignment -name VHDL_FILE firebee1.vhd
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set_global_assignment -name VHDL_FILE Video/video.vhd
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set_global_assignment -name VHDL_FILE Video/mux41.vhd
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set_global_assignment -name VHDL_FILE Video/mux41_5.vhd
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set_global_assignment -name VHDL_FILE Video/mux41_4.vhd
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set_global_assignment -name VHDL_FILE Video/mux41_3.vhd
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set_global_assignment -name VHDL_FILE Video/mux41_2.vhd
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set_global_assignment -name VHDL_FILE Video/mux41_1.vhd
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set_global_assignment -name VHDL_FILE Video/mux41_0.vhd
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set_global_assignment -name VHDL_FILE Video/BLITTER/BLITTER.vhd
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set_global_assignment -name AHDL_FILE Video/DDR_CTR.tdf
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set_global_assignment -name SOURCE_FILE Video/lpm_bustri7.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_bustri7.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_ff4.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_fifoDZ.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_compare1.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_constant3.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_ff6.cmp
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set_global_assignment -name SOURCE_FILE Video/altddio_out0.cmp
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set_global_assignment -name SOURCE_FILE Video/altddio_out1.cmp
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set_global_assignment -name SOURCE_FILE Video/altddio_bidir0.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_constant2.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_bustri0.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_bustri0.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_constant4.cmp
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set_global_assignment -name SOURCE_FILE Video/altdpram2.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_fifoDZ.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_latch1.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_mux0.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg4.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_bustri3.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg5.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_bustri3.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg6.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_bustri4.cmp
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set_global_assignment -name SOURCE_FILE Video/altddio_out2.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_constant0.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_mux1.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_constant1.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_mux2.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_bustri5.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_ff0.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_ff1.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg0.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_ff1.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_ff2.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_ff3.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_ff3.vhd
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set_global_assignment -name AHDL_FILE Video/VIDEO_MOD_MUX_CLUTCTR.tdf
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set_global_assignment -name VHDL_FILE Video/lpm_ff2.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_fifo_dc0.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_mux3.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_mux4.cmp
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set_global_assignment -name SOURCE_FILE Video/altdpram0.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_mux5.cmp
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set_global_assignment -name VHDL_FILE Video/altdpram0.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_mux6.cmp
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set_global_assignment -name SOURCE_FILE Video/altdpram1.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ2.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_muxDZ2.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_muxDZ.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_ff5.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_bustri1.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg1.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_ff0.cmp
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set_global_assignment -name QIP_FILE Video/lpm_shiftreg0.qip
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set_global_assignment -name QIP_FILE Video/altdpram0.qip
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set_global_assignment -name QIP_FILE Video/lpm_bustri1.qip
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set_global_assignment -name QIP_FILE Video/altdpram1.qip
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set_global_assignment -name QIP_FILE Video/lpm_bustri2.qip
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set_global_assignment -name QIP_FILE Video/lpm_bustri4.qip
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set_global_assignment -name QIP_FILE Video/lpm_constant0.qip
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set_global_assignment -name QIP_FILE Video/lpm_constant1.qip
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set_global_assignment -name QIP_FILE Video/lpm_mux0.qip
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set_global_assignment -name QIP_FILE Video/lpm_mux1.qip
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set_global_assignment -name QIP_FILE Video/lpm_mux2.qip
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set_global_assignment -name QIP_FILE Video/lpm_constant2.qip
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set_global_assignment -name QIP_FILE Video/altdpram2.qip
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set_global_assignment -name QIP_FILE Video/lpm_shiftreg3.qip
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set_global_assignment -name QIP_FILE Video/altddio_bidir0.qip
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set_global_assignment -name QIP_FILE Video/altddio_out0.qip
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set_global_assignment -name QIP_FILE Video/lpm_mux5.qip
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set_global_assignment -name QIP_FILE Video/lpm_shiftreg5.qip
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set_global_assignment -name QIP_FILE Video/lpm_shiftreg6.qip
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set_global_assignment -name QIP_FILE Video/lpm_shiftreg4.qip
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set_global_assignment -name QIP_FILE Video/altddio_out1.qip
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set_global_assignment -name QIP_FILE Video/altddio_out2.qip
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set_global_assignment -name QIP_FILE Video/lpm_bustri6.qip
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set_global_assignment -name QIP_FILE Video/lpm_mux6.qip
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set_global_assignment -name QIP_FILE Video/lpm_mux3.qip
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set_global_assignment -name QIP_FILE Video/lpm_mux4.qip
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set_global_assignment -name QIP_FILE Video/lpm_constant3.qip
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set_global_assignment -name QIP_FILE Video/lpm_muxDZ.qip
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set_global_assignment -name QIP_FILE Video/lpm_muxVDM.qip
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set_global_assignment -name QIP_FILE Video/lpm_shiftreg1.qip
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set_global_assignment -name QIP_FILE Video/lpm_latch1.qip
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set_global_assignment -name QIP_FILE Video/lpm_constant4.qip
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set_global_assignment -name QIP_FILE Video/lpm_shiftreg2.qip
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set_global_assignment -name QIP_FILE Video/BLITTER/lpm_clshift0.qip
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set_global_assignment -name SOURCE_FILE Video/BLITTER/blitter.tdf.ALT
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set_global_assignment -name QIP_FILE Video/lpm_compare1.qip
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set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg2.cmp
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set_global_assignment -name SOURCE_FILE Video/lpm_bustri2.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_fifo_dc0.vhd
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set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg3.cmp
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set_global_assignment -name VHDL_FILE Video/lpm_bustri5.vhd
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set_global_assignment -name QIP_FILE Video/lpm_ff4.qip
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set_global_assignment -name QIP_FILE Video/lpm_ff5.qip
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set_global_assignment -name QIP_FILE Video/lpm_ff6.qip
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set_global_assignment -name SOURCE_FILE Video/lpm_bustri6.cmp
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set_global_assignment -name QIP_FILE Video/BLITTER/altsyncram0.qip
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set_global_assignment -name VHDL_FILE DSP/DSP.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_control.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_pkg.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_registers.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_soc_top.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_top.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_am_detector.vhd
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set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo0.cmp
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/dcfifo0.vhd
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set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo1.cmp
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF_pgk.vhd
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set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo0.qip
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set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo1.qip
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_control.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_crc_logic.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_digital_pll.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_pkg.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_registers.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top_soc.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_transceiver.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top_soc.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_gpio.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_pkg.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_timers.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top_soc.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_ctrl.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_rx.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_top.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_tx.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_pkg.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
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set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_wave.vhd
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set_global_assignment -name VHDL_FILE lpm_latch0.vhd
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set_global_assignment -name SOURCE_FILE lpm_latch0.cmp
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set_global_assignment -name QIP_FILE altpll1.qip
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set_global_assignment -name QIP_FILE altpll2.qip
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set_global_assignment -name QIP_FILE altpll3.qip
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set_global_assignment -name SOURCE_FILE altpll0.cmp
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set_global_assignment -name SOURCE_FILE altpll2.cmp
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set_global_assignment -name VHDL_FILE altpll2.vhd
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set_global_assignment -name SOURCE_FILE altpll3.cmp
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set_global_assignment -name VHDL_FILE altpll3.vhd
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set_global_assignment -name SOURCE_FILE lpm_counter0.cmp
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set_global_assignment -name VHDL_FILE altpll1.vhd
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set_global_assignment -name SOURCE_FILE altpll1.cmp
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set_global_assignment -name QIP_FILE altpll0.qip
|
||||
set_global_assignment -name QIP_FILE lpm_counter0.qip
|
||||
set_global_assignment -name QIP_FILE lpm_bustri_LONG.qip
|
||||
set_global_assignment -name QIP_FILE lpm_bustri_BYT.qip
|
||||
set_global_assignment -name QIP_FILE lpm_bustri_WORD.qip
|
||||
set_global_assignment -name QIP_FILE altddio_out3.qip
|
||||
set_global_assignment -name SOURCE_FILE firebee1.fit.summary_alt
|
||||
set_global_assignment -name QIP_FILE altpll4.qip
|
||||
set_global_assignment -name QIP_FILE lpm_mux0.qip
|
||||
set_global_assignment -name QIP_FILE lpm_shiftreg0.qip
|
||||
set_global_assignment -name QIP_FILE lpm_counter1.qip
|
||||
set_global_assignment -name QIP_FILE altiobuf_bidir0.qip
|
||||
set_global_assignment -name VHDL_FILE Video/DDR_CTR.vhd
|
||||
set_global_assignment -name SOURCE_FILE altpll_reconfig1.cmp
|
||||
set_global_assignment -name VHDL_FILE Interrupt_Handler/interrupt_handler.vhd
|
||||
set_global_assignment -name SOURCE_FILE altpll4.cmp
|
||||
set_global_assignment -name SDC_FILE firebee1.sdc
|
||||
set_global_assignment -name VHDL_FILE firebee1.vhd
|
||||
set_global_assignment -name VHDL_FILE Video/video.vhd
|
||||
set_global_assignment -name VHDL_FILE Video/mux41.vhd
|
||||
set_global_assignment -name VHDL_FILE Video/mux41_5.vhd
|
||||
set_global_assignment -name VHDL_FILE Video/mux41_4.vhd
|
||||
set_global_assignment -name VHDL_FILE Video/mux41_3.vhd
|
||||
set_global_assignment -name VHDL_FILE Video/mux41_2.vhd
|
||||
set_global_assignment -name VHDL_FILE Video/mux41_1.vhd
|
||||
set_global_assignment -name VHDL_FILE Video/mux41_0.vhd
|
||||
set_global_assignment -name VHDL_FILE Video/BLITTER/BLITTER.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri7.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_bustri7.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff4.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_fifoDZ.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_compare1.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_constant3.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff6.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/altddio_out0.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/altddio_out1.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/altddio_bidir0.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_constant2.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri0.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_bustri0.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_constant4.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/altdpram2.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_fifoDZ.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_latch1.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux0.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg4.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri3.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg5.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_bustri3.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg6.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri4.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/altddio_out2.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_constant0.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux1.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_constant1.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux2.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri5.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_ff0.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff1.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg0.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_ff1.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff2.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff3.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_ff3.vhd
|
||||
set_global_assignment -name AHDL_FILE Video/VIDEO_MOD_MUX_CLUTCTR.tdf
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_ff2.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_fifo_dc0.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux3.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux4.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/altdpram0.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux5.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/altdpram0.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux6.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/altdpram1.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ2.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_muxDZ2.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_muxDZ.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff5.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri1.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg1.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff0.cmp
|
||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg0.qip
|
||||
set_global_assignment -name QIP_FILE Video/altdpram0.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_bustri1.qip
|
||||
set_global_assignment -name QIP_FILE Video/altdpram1.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_bustri2.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_bustri4.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_constant0.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_constant1.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_mux0.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_mux1.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_mux2.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_constant2.qip
|
||||
set_global_assignment -name QIP_FILE Video/altdpram2.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg3.qip
|
||||
set_global_assignment -name QIP_FILE Video/altddio_bidir0.qip
|
||||
set_global_assignment -name QIP_FILE Video/altddio_out0.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_mux5.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg5.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg6.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg4.qip
|
||||
set_global_assignment -name QIP_FILE Video/altddio_out1.qip
|
||||
set_global_assignment -name QIP_FILE Video/altddio_out2.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_bustri6.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_mux6.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_mux3.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_mux4.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_constant3.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_muxDZ.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_muxVDM.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg1.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_latch1.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_constant4.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg2.qip
|
||||
set_global_assignment -name QIP_FILE Video/BLITTER/lpm_clshift0.qip
|
||||
set_global_assignment -name SOURCE_FILE Video/BLITTER/blitter.tdf.ALT
|
||||
set_global_assignment -name QIP_FILE Video/lpm_compare1.qip
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg2.cmp
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri2.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_fifo_dc0.vhd
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg3.cmp
|
||||
set_global_assignment -name VHDL_FILE Video/lpm_bustri5.vhd
|
||||
set_global_assignment -name QIP_FILE Video/lpm_ff4.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_ff5.qip
|
||||
set_global_assignment -name QIP_FILE Video/lpm_ff6.qip
|
||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri6.cmp
|
||||
set_global_assignment -name QIP_FILE Video/BLITTER/altsyncram0.qip
|
||||
set_global_assignment -name VHDL_FILE DSP/DSP.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_control.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_pkg.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_registers.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_soc_top.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_top.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_am_detector.vhd
|
||||
set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo0.cmp
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/dcfifo0.vhd
|
||||
set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo1.cmp
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF_pgk.vhd
|
||||
set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo0.qip
|
||||
set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo1.qip
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_control.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_crc_logic.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_digital_pll.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_pkg.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_registers.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top_soc.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_transceiver.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top_soc.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_gpio.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_pkg.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_timers.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top_soc.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_rx.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_top.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_tx.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_pkg.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
|
||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_wave.vhd
|
||||
set_global_assignment -name VHDL_FILE lpm_latch0.vhd
|
||||
set_global_assignment -name SOURCE_FILE lpm_latch0.cmp
|
||||
set_global_assignment -name QIP_FILE altpll1.qip
|
||||
set_global_assignment -name QIP_FILE altpll2.qip
|
||||
set_global_assignment -name QIP_FILE altpll3.qip
|
||||
set_global_assignment -name SOURCE_FILE altpll0.cmp
|
||||
set_global_assignment -name SOURCE_FILE altpll2.cmp
|
||||
set_global_assignment -name VHDL_FILE altpll2.vhd
|
||||
set_global_assignment -name SOURCE_FILE altpll3.cmp
|
||||
set_global_assignment -name VHDL_FILE altpll3.vhd
|
||||
set_global_assignment -name SOURCE_FILE lpm_counter0.cmp
|
||||
set_global_assignment -name VHDL_FILE altpll1.vhd
|
||||
set_global_assignment -name SOURCE_FILE altpll1.cmp
|
||||
set_global_assignment -name QIP_FILE altpll0.qip
|
||||
set_global_assignment -name QIP_FILE lpm_counter0.qip
|
||||
set_global_assignment -name QIP_FILE lpm_bustri_LONG.qip
|
||||
set_global_assignment -name QIP_FILE lpm_bustri_BYT.qip
|
||||
set_global_assignment -name QIP_FILE lpm_bustri_WORD.qip
|
||||
set_global_assignment -name QIP_FILE altddio_out3.qip
|
||||
set_global_assignment -name SOURCE_FILE firebee1.fit.summary_alt
|
||||
set_global_assignment -name QIP_FILE altpll4.qip
|
||||
set_global_assignment -name QIP_FILE lpm_mux0.qip
|
||||
set_global_assignment -name QIP_FILE lpm_shiftreg0.qip
|
||||
set_global_assignment -name QIP_FILE lpm_counter1.qip
|
||||
set_global_assignment -name QIP_FILE altiobuf_bidir0.qip
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||
24
firebee1.sdc
24
firebee1.sdc
@@ -133,16 +133,20 @@ set_output_delay -add_delay -clock [get_clocks {MAIN_CLK}] -max 1.500 [get_port
|
||||
set_output_delay -add_delay -clock [get_clocks {MAIN_CLK}] -max 1.500 {nFB_TA}
|
||||
|
||||
# video RAM access
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -min 1.500 [get_ports {VA[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -max 1.500 [get_ports {VA[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -min 1.500 [get_ports {VD[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -max 1.500 [get_ports {VD[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -min 1.500 [get_ports {VDQS[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -max 1.500 [get_ports {VDQS[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -min 1.500 [get_ports {VDM[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -max 1.500 [get_ports {VDM[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -min 1.500 {nVCAS nVRAS nVWE nVCS VCKE DDRCLK nDDRCLK BA[*]}
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -max 1.500 {nVCAS nVRAS nVWE nVCS VCKE DDRCLK nDDRCLK BA[*]}
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -min 0.500 [get_ports {VA[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -max 0.500 [get_ports {VA[*]}]
|
||||
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -min 0.500 [get_ports {VD[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -max 0.500 [get_ports {VD[*]}]
|
||||
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -min 0.500 [get_ports {VDQS[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -max 0.500 [get_ports {VDQS[*]}]
|
||||
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -min 0.500 [get_ports {VDM[*]}]
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -max 0.500 [get_ports {VDM[*]}]
|
||||
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -min 0.500 {nVCAS nVRAS nVWE nVCS VCKE DDRCLK nDDRCLK BA[*]}
|
||||
set_output_delay -add_delay -clock [get_clocks {i_ddr_clk_pll|altpll_component|auto_generated|pll1|clk[0]}] -max 0.500 {nVCAS nVRAS nVWE nVCS VCKE DDRCLK nDDRCLK BA[*]}
|
||||
|
||||
|
||||
#**************************************************************
|
||||
|
||||
Reference in New Issue
Block a user