Commit Graph

23 Commits

Author SHA1 Message Date
Markus Fröschle
694d5386d1 fix timing 2016-01-16 21:38:17 +00:00
Markus Fröschle
71499cffcb fix output delay 2016-01-15 17:38:29 +00:00
Markus Fröschle
45894cb3f2 simplify processes 2016-01-15 08:37:40 +00:00
Markus Fröschle
02ab7f3bf6 fix ports 2016-01-12 17:10:19 +00:00
Markus Fröschle
26e1aef29b reformat converted VHDL 2016-01-12 07:14:33 +00:00
Markus Fröschle
717a5d301a fix min instead of max 2016-01-11 17:07:35 +00:00
Markus Fröschle
d281dcf94e add more DDR clk signals to sdc 2016-01-11 17:05:39 +00:00
Markus Fröschle
17c41a655f translate interrupt_controller to vhd 2016-01-11 16:11:04 +00:00
Markus Fröschle
d919644895 reformat 2016-01-11 07:13:36 +00:00
Markus Fröschle
fe7eb5cae7 fix ACP web address 2015-11-18 06:41:49 +00:00
Markus Fröschle
a021006b32 patch with Fredi's lp fix (and others) 2015-10-26 06:48:18 +00:00
Markus Fröschle
47c793dae2 added another false path to fix timing 2015-10-18 01:02:05 +00:00
Markus Fröschle
dc98f061fd fix timing (set_false_path was missing) 2015-10-18 00:57:04 +00:00
Markus Fröschle
3a58676b8b basically working config. Resolution changes still scramble the screen, however 2015-10-17 09:40:48 +00:00
Markus Fröschle
03a110f03b improved timing, added timing constraints, got rid of CLK_33M
Design compiles and runs, but still has issues with different screen resolutions and video clocks
2015-09-23 09:49:05 +00:00
Markus Fröschle
32d08e5ac6 added derive_clock_uncertainty 2015-09-20 19:50:38 +00:00
Markus Fröschle
2db99fe6ee more false_path settings 2015-09-20 19:24:59 +00:00
Markus Fröschle
d01b0a5810 upgrade lpm components 2015-09-20 18:08:31 +00:00
Markus Fröschle
65b01bd377 reformatted, forced tighter timing
Config works, but screen is still scrambled
2015-09-20 17:13:10 +00:00
Markus Fröschle
967a41de02 add false paths to design constraints 2015-09-20 16:23:52 +00:00
Markus Fröschle
e3bf989be7 reformatted. 2015-09-20 14:54:16 +00:00
Markus Fröschle
a7bf118e2d get rid of CLK33M 2015-09-20 12:32:02 +00:00
Markus Fröschle
ea60ec7f91 add TimeQuest Synopsis Design Constraint file 2015-09-20 07:01:21 +00:00