Markus Fröschle
|
51d9e1f5f6
|
modified DDR_CTRL state machine as exact copy of Fredi's HDL original
|
2014-12-28 10:01:08 +00:00 |
|
Markus Fröschle
|
c90e9e1b8c
|
reverted DDR_CTR to original version
|
2014-12-28 06:48:41 +00:00 |
|
Markus Fröschle
|
2adda3f946
|
various changes
|
2014-12-27 20:21:33 +00:00 |
|
Markus Fröschle
|
5cb3becb63
|
reformatted
|
2014-12-27 07:07:46 +00:00 |
|
Markus Fröschle
|
851e2a455f
|
DDR RAM read and write both seem to work but writing is eeeextreeeeeeemly slow for now...
|
2014-12-26 20:01:53 +00:00 |
|
Markus Fröschle
|
0c26287af7
|
moved logic into process
|
2014-12-26 19:47:22 +00:00 |
|
Markus Fröschle
|
df5164157d
|
fixed earlier misunderstandings, but still doesn't work
|
2014-12-26 16:29:40 +00:00 |
|
Markus Fröschle
|
8706322f96
|
added to the DDR RAM model
reformatted (converted tabs to spaces)
|
2014-12-25 15:20:14 +00:00 |
|
Markus Fröschle
|
06688a9a02
|
got rid of BIT signal types
|
2014-12-24 17:07:51 +00:00 |
|
Markus Fröschle
|
5a923ddada
|
fixed formatting
|
2014-12-24 16:24:21 +00:00 |
|
Markus Fröschle
|
ef1807665e
|
removed UNSIGNED() conversions that are not needed anymore
|
2014-12-24 16:17:17 +00:00 |
|
Markus Fröschle
|
517599bc33
|
reenabled all modules
|
2014-12-24 16:11:12 +00:00 |
|
Markus Fröschle
|
e7e4fa4e75
|
added a little bus toggling to the test bench
|
2014-12-24 09:42:57 +00:00 |
|
Markus Fröschle
|
63c0a2f167
|
added testbench files
|
2014-12-23 18:25:15 +00:00 |
|
Markus Fröschle
|
5cc8c3bbbf
|
fixed type inconistencies
|
2014-12-23 16:44:21 +00:00 |
|
Markus Fröschle
|
c197609be6
|
started "full fledged" testbench to analyze where fb_ta_n gets lost
|
2014-12-23 14:56:53 +00:00 |
|
Markus Fröschle
|
5c9253c6a9
|
implemented video_control_register as ALIAS
fb_ta_n stuck at GND?
|
2014-12-23 11:21:56 +00:00 |
|
Markus Fröschle
|
a4835a305c
|
experimental
|
2014-12-23 08:59:40 +00:00 |
|
Markus Fröschle
|
1f50d16cfc
|
got rid of several unnecessary UNSIGNED() type conversions
|
2014-12-23 08:33:59 +00:00 |
|
Markus Fröschle
|
85ec4c726c
|
added io_register.vhd
|
2014-12-22 22:14:33 +00:00 |
|
Markus Fröschle
|
1612d52010
|
more formatting
|
2014-12-22 21:09:46 +00:00 |
|
Markus Fröschle
|
0f55615b45
|
converted more STD_LOGIC_VECTORs to UNSIGNED
|
2014-12-22 19:58:01 +00:00 |
|
Markus Fröschle
|
822f5a64d2
|
finished fixing formatting
|
2014-12-22 12:36:35 +00:00 |
|
Markus Fröschle
|
e2c69a75f6
|
changed all STD_LOGIC_VECTOR signals to UNSIGNED to ease calculations
|
2014-12-22 12:09:53 +00:00 |
|
Markus Fröschle
|
7963f9c8ae
|
fixed formatting
|
2014-12-22 08:50:22 +00:00 |
|
Markus Fröschle
|
7d98e35c50
|
fixed fifo_mw initialization
|
2014-12-22 08:40:35 +00:00 |
|
Markus Fröschle
|
4bb0527539
|
fifo_mw never got a value assigned - fixed for testbench, but still open for toplevel
|
2014-12-22 08:31:07 +00:00 |
|
Markus Fröschle
|
3e769ceeb4
|
DDR2 simulation compiles in ModelSim
|
2014-12-22 05:57:17 +00:00 |
|
Markus Fröschle
|
1aab3c25d2
|
further extended testbench.
Need to fix difference between clock ticks and TIME in original code
|
2014-12-21 20:40:51 +00:00 |
|
Markus Fröschle
|
ff7faf4395
|
more formatting and corrections of testbench code
|
2014-12-21 10:55:49 +00:00 |
|
Markus Fröschle
|
db93ec6026
|
updated testbench (not functional yet)
|
2014-12-21 08:32:20 +00:00 |
|
Markus Fröschle
|
132f136d3a
|
relaxed timing and uncommented unneeded components in toplevel until timing issues are solved
added lots of set_false_path statements to sort out timing problems
|
2014-12-20 12:26:32 +00:00 |
|
Markus Fröschle
|
9f288fc3d0
|
fixed formatting
|
2014-12-20 10:13:32 +00:00 |
|
Markus Fröschle
|
0c95b41b15
|
commented everything which is not needed to debug video system/DDR controller for now
|
2014-12-20 09:12:56 +00:00 |
|
Markus Fröschle
|
6d3b09f87b
|
fixed formatting
|
2014-12-20 09:05:03 +00:00 |
|
Markus Fröschle
|
fe27ee2e22
|
fixed formatting errors
|
2014-12-20 08:48:21 +00:00 |
|
Markus Fröschle
|
599b23bdcf
|
renamed directory hierarchy and toplevel entity
|
2014-12-20 08:34:53 +00:00 |
|
Markus Fröschle
|
c51e6c6098
|
reformatted
|
2014-12-20 08:25:53 +00:00 |
|
Markus Fröschle
|
cbff11f5d8
|
renamed files
|
2014-12-20 08:22:10 +00:00 |
|
Markus Fröschle
|
91ea8fc622
|
reformatted
|
2014-12-20 01:21:36 +00:00 |
|
Markus Fröschle
|
3b0e69127f
|
now gets accepted by Modelsim
|
2014-09-01 14:24:55 +00:00 |
|
Markus Fröschle
|
bc33af04ab
|
fixed various "comparison with different length" errors
|
2014-08-20 05:44:46 +00:00 |
|
Markus Fröschle
|
27824cd8e6
|
fixed wrong chip select for video frequency timer (VFT) register
|
2014-08-17 08:47:35 +00:00 |
|
Markus Fröschle
|
9b1cb2255b
|
fixed missing (not "translated" from the original .tdf) statements
|
2014-08-14 05:33:56 +00:00 |
|
Markus Fröschle
|
cf659204c8
|
fixed formatting
|
2014-08-09 19:17:09 +00:00 |
|
Markus Fröschle
|
2aee4d9c45
|
fixed a bug in wiring of I_RECONFIG (data_in was connected to FB_ADR(24 downto 16) instead ot FB_AD(24 downto 16) and reformatted files
|
2014-08-08 17:48:19 +00:00 |
|
Markus Fröschle
|
cf56eece67
|
fixed a few more problems resulting from changing libraries
|
2014-08-06 19:49:32 +00:00 |
|
Markus Fröschle
|
4c5b6d02e9
|
fixed formatting
|
2014-08-04 20:50:39 +00:00 |
|
Markus Fröschle
|
b40ddd37fc
|
|
2014-08-04 20:27:57 +00:00 |
|
Markus Fröschle
|
4c2be14e28
|
removed all dependencies to obsolete ieee.std_logic_arith and ieee.std_logic_unsigned in favour of ieee.numeric_std. There are a few things that still need to be fixed because of that, however.
|
2014-08-04 17:23:47 +00:00 |
|