Markus Fröschle
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cfdf59d7d7
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networking looks good?
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2015-01-14 18:38:33 +00:00 |
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Markus Fröschle
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be732799a1
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video DDR RAM initialization seems to use an octal number???
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2015-01-13 07:05:08 +00:00 |
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Markus Fröschle
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c7a1641405
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successfully compiled BaS_gcc over NFS on a Linux host from the Firebee:
network test passed
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2015-01-12 21:37:44 +00:00 |
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Markus Fröschle
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f6d4bfeea2
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added skeleton for planned i2c API
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2015-01-12 14:00:20 +00:00 |
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Markus Fröschle
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de2d671a15
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fixed missing unmask of DMA task interrupts
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2015-01-12 10:49:01 +00:00 |
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Markus Fröschle
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c09f0d735e
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implemented initial version of XLB PCI interrupt handler. For now it
just reports and clears errors.
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2015-01-12 07:25:16 +00:00 |
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Markus Fröschle
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7c1844d73c
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activated more Coldfire interrupt sources
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2015-01-11 17:02:40 +00:00 |
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Markus Fröschle
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fe65b2ca00
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replaced DMA API routines by fresh download with originals
moved more interrupt handlers to generalized handler
cleaned up lowlevel interrupt handling
fixed wrong assignment of interrupt masks
reformatted
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2015-01-11 10:27:36 +00:00 |
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Markus Fröschle
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504d11dbfd
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changed return type of interrupt handlers
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2015-01-10 17:44:04 +00:00 |
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Markus Fröschle
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00b29437d8
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did more changes to interrupt code, but still crashes in networking
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2015-01-10 17:19:56 +00:00 |
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Markus Fröschle
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388ff72886
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This version is working again, except network. For some reason, the DMA
interrupts don't seem to be triggered.
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2015-01-09 20:12:03 +00:00 |
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Markus Fröschle
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6da4e0f182
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(re) implemented irq1-4 + irq7
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2015-01-09 16:01:58 +00:00 |
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Markus Fröschle
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1ed3bfab0c
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(re)implemented irq1-irq4+irq7 handlers
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2015-01-09 15:57:42 +00:00 |
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Markus Fröschle
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1787a5bbe8
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fixed wrong offset on MFP interrupt
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2015-01-09 15:08:44 +00:00 |
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Markus Fröschle
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4fee11270d
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Not tested. Hopefully fixed interrupts.
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2015-01-08 16:36:55 +00:00 |
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Markus Fröschle
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922be63d2a
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fixed formatting
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2015-01-07 13:54:35 +00:00 |
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Markus Fröschle
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2eb79b156a
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reformatted
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2014-12-30 22:25:36 +00:00 |
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Markus Fröschle
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3daaa49e79
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reduced wait times
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2014-12-30 14:21:05 +00:00 |
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Markus Fröschle
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320230ce31
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merged latest fixes from R_0_8_6 branch
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2014-12-29 14:44:55 +00:00 |
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Markus Fröschle
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8cb34bfe15
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vmem_ctrl cannot be read on the current FPGA version
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2014-12-29 14:37:39 +00:00 |
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Markus Fröschle
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51d9e1f5f6
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modified DDR_CTRL state machine as exact copy of Fredi's HDL original
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2014-12-28 10:01:08 +00:00 |
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Markus Fröschle
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c90e9e1b8c
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reverted DDR_CTR to original version
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2014-12-28 06:48:41 +00:00 |
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Markus Fröschle
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acaafef944
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added more tests
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2014-12-27 20:22:09 +00:00 |
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Markus Fröschle
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2adda3f946
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various changes
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2014-12-27 20:21:33 +00:00 |
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Markus Fröschle
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6fcd8c2cf2
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disabled caches for tests to work reliably
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2014-12-27 16:49:57 +00:00 |
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Markus Fröschle
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5cb3becb63
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reformatted
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2014-12-27 07:07:46 +00:00 |
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Markus Fröschle
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525253f70a
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compile ELF by default
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2014-12-26 22:15:38 +00:00 |
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Markus Fröschle
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09b8c3acb7
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reformatted
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2014-12-26 22:14:57 +00:00 |
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Markus Fröschle
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851e2a455f
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DDR RAM read and write both seem to work but writing is eeeextreeeeeeemly slow for now...
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2014-12-26 20:01:53 +00:00 |
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Markus Fröschle
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0cc08d4bed
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more FPGA tests
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2014-12-26 20:01:03 +00:00 |
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Markus Fröschle
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0c26287af7
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moved logic into process
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2014-12-26 19:47:22 +00:00 |
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Markus Fröschle
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df5164157d
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fixed earlier misunderstandings, but still doesn't work
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2014-12-26 16:29:40 +00:00 |
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Markus Fröschle
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22f39a7414
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added more FPGA tests
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2014-12-26 15:35:01 +00:00 |
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Markus Fröschle
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aea1a66956
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do first tests with FPGA config. SDRAM doesn't seem to work, reading and writing of Firebee CLUT does work, hovever.
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2014-12-26 12:31:44 +00:00 |
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Markus Fröschle
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6ecdcbb3d1
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added test program for FPGA
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2014-12-26 11:38:27 +00:00 |
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Markus Fröschle
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551375c12e
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fixed to support bugfix from 0.8.6
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2014-12-26 10:33:53 +00:00 |
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Markus Fröschle
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8081df42a6
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merged fixes from 0.8.6.1 (errornous skip of FPGA load)
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2014-12-26 09:36:45 +00:00 |
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Markus Fröschle
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b1c7851f34
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start merging R_0.8.6.1 (jtag load bug fix)
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2014-12-26 09:07:22 +00:00 |
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Markus Fröschle
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8706322f96
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added to the DDR RAM model
reformatted (converted tabs to spaces)
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2014-12-25 15:20:14 +00:00 |
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Markus Fröschle
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a7eb46e158
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used design assistant to force the fitter to put more effort into getting the timing right which removed negative slack
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2014-12-25 10:08:53 +00:00 |
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Markus Fröschle
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674406e4d3
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formatting
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2014-12-24 17:54:51 +00:00 |
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Markus Fröschle
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06688a9a02
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got rid of BIT signal types
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2014-12-24 17:07:51 +00:00 |
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Markus Fröschle
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5a923ddada
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fixed formatting
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2014-12-24 16:24:21 +00:00 |
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Markus Fröschle
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ef1807665e
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removed UNSIGNED() conversions that are not needed anymore
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2014-12-24 16:17:17 +00:00 |
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Markus Fröschle
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517599bc33
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reenabled all modules
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2014-12-24 16:11:12 +00:00 |
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Markus Fröschle
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e7e4fa4e75
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added a little bus toggling to the test bench
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2014-12-24 09:42:57 +00:00 |
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Markus Fröschle
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766d75a5d3
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fixed pin assignments for renamed pins fb_cs_n[..]
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2014-12-23 22:35:03 +00:00 |
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Markus Fröschle
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71db27849b
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started implementing SAMSUNG's Verilog DDR model in VHDL
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2014-12-23 22:30:23 +00:00 |
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Markus Fröschle
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63c0a2f167
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added testbench files
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2014-12-23 18:25:15 +00:00 |
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Markus Fröschle
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5eac75430e
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renamed files, fixed testbench
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2014-12-23 18:20:11 +00:00 |
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