Markus Fröschle
|
9b1cb2255b
|
fixed missing (not "translated" from the original .tdf) statements
|
2014-08-14 05:33:56 +00:00 |
|
Markus Fröschle
|
3691c94c5c
|
added constraints for global clock signals
|
2014-08-14 05:30:45 +00:00 |
|
Markus Fröschle
|
beb4eed5b8
|
added missing files
|
2014-08-10 18:23:55 +00:00 |
|
Markus Fröschle
|
6074b0c9f1
|
fixed dbg() printout macro
|
2014-08-10 18:22:59 +00:00 |
|
Markus Fröschle
|
670181c8d4
|
added additional functions for cache handling
|
2014-08-10 18:21:49 +00:00 |
|
Markus Fröschle
|
ecdba7d62a
|
fixed warning regarding incompatible pointers
|
2014-08-10 18:20:15 +00:00 |
|
Markus Fröschle
|
92dddd3ca9
|
made stack location symbolic
|
2014-08-10 17:19:10 +00:00 |
|
Markus Fröschle
|
852bf8928f
|
modified jtagwait to allow to set reset start address when renamed to .TTP
|
2014-08-10 14:39:06 +00:00 |
|
Markus Fröschle
|
1134454984
|
disabled SignalTap
|
2014-08-09 19:45:29 +00:00 |
|
Markus Fröschle
|
cf659204c8
|
fixed formatting
|
2014-08-09 19:17:09 +00:00 |
|
Markus Fröschle
|
e9f5ee1ed3
|
added missing assignments and wrong pins for differential clock
|
2014-08-09 17:34:08 +00:00 |
|
Markus Fröschle
|
4ba8ac1426
|
added missing check for _FPGA_JTAG_VALID
|
2014-08-09 13:56:28 +00:00 |
|
Markus Fröschle
|
7c9a551635
|
added missing files forgot on last commit
|
2014-08-09 13:10:13 +00:00 |
|
Markus Fröschle
|
fd72b7ce9e
|
support for JTAGWAIT.PRG (configure FPGA from JTAG port) implemented
|
2014-08-09 13:07:28 +00:00 |
|
Markus Fröschle
|
f55cae6c0f
|
simplified PLL initialization
|
2014-08-08 19:52:07 +00:00 |
|
Markus Fröschle
|
2aee4d9c45
|
fixed a bug in wiring of I_RECONFIG (data_in was connected to FB_ADR(24 downto 16) instead ot FB_AD(24 downto 16) and reformatted files
|
2014-08-08 17:48:19 +00:00 |
|
Markus Fröschle
|
f0cfdc9d0b
|
simplified pll initialization
|
2014-08-08 16:13:14 +00:00 |
|
Markus Fröschle
|
cf56eece67
|
fixed a few more problems resulting from changing libraries
|
2014-08-06 19:49:32 +00:00 |
|
Markus Fröschle
|
630a82de9a
|
bumped version for release
|
2014-08-06 06:23:30 +00:00 |
|
Markus Fröschle
|
4c5b6d02e9
|
fixed formatting
|
2014-08-04 20:50:39 +00:00 |
|
Markus Fröschle
|
b40ddd37fc
|
|
2014-08-04 20:27:57 +00:00 |
|
Markus Fröschle
|
4c2be14e28
|
removed all dependencies to obsolete ieee.std_logic_arith and ieee.std_logic_unsigned in favour of ieee.numeric_std. There are a few things that still need to be fixed because of that, however.
|
2014-08-04 17:23:47 +00:00 |
|
Markus Fröschle
|
d96e0b82bc
|
added tos programs that are used to interface to BaS_gcc from TOS. These programs are currently not build by default (need to call make in their respective directory for now). They expect to find a libcmini copy on the same directory level than you have your BaS_gcc folder.
|
2014-08-02 08:25:07 +00:00 |
|
David Gálvez
|
5f896320fa
|
Add format specifier to fix debug messages format
|
2014-07-13 15:18:23 +00:00 |
|
David Gálvez
|
d1767a50e9
|
Make PCI memory space uncachable
|
2014-07-10 16:46:21 +00:00 |
|
David Gálvez
|
bf32e899d1
|
Merge pci_BaS_gcc branch to trunk
|
2014-07-10 15:45:45 +00:00 |
|
Markus Fröschle
|
fe7d35a212
|
fixed typo
|
2014-07-09 19:14:40 +00:00 |
|
Markus Fröschle
|
948fd2c798
|
fixed formatting
|
2014-06-23 18:23:44 +00:00 |
|
Markus Fröschle
|
f1f66f5fd9
|
fixed formatting
|
2014-06-23 05:46:13 +00:00 |
|
Markus Fröschle
|
2666b1de47
|
fixed compiler warnings
|
2014-06-23 05:37:51 +00:00 |
|
Markus Fröschle
|
138649e19f
|
fixed a few compiler warnings
|
2014-06-23 05:32:49 +00:00 |
|
Markus Fröschle
|
8935f0bbc4
|
modified init_fpga() to honour JTAG configuration. Does not work
currently and needs support from the TOS side (program not finished yet)
|
2014-06-22 16:00:49 +00:00 |
|
Markus Fröschle
|
d1297a5b0e
|
added Doxyfile for doxygen documentation
|
2014-06-21 19:53:54 +00:00 |
|
Markus Fröschle
|
4efc487ca6
|
added BaS includes
|
2014-06-21 19:52:23 +00:00 |
|
Markus Fröschle
|
96319f252d
|
added ST fonts
|
2014-06-21 19:48:22 +00:00 |
|
Markus Fröschle
|
9d717fbac7
|
version bump
|
2014-06-21 06:33:45 +00:00 |
|
Markus Fröschle
|
f7e8610263
|
some minor cosmetic fixes
|
2014-06-21 06:32:25 +00:00 |
|
Markus Fröschle
|
4f81b597a6
|
reverted to last released to make it work again
|
2014-06-21 06:21:41 +00:00 |
|
Markus Fröschle
|
aacdc671a8
|
removed (now wrong) comment
|
2014-06-21 05:50:43 +00:00 |
|
Markus Fröschle
|
b3af46394a
|
completed locked TLB list
|
2014-06-20 20:24:37 +00:00 |
|
Markus Fröschle
|
e4a7e1df5a
|
added locked TLB entries
|
2014-06-20 19:50:49 +00:00 |
|
Markus Fröschle
|
69a84effee
|
started to revert to previous functionality
|
2014-06-20 18:35:08 +00:00 |
|
Markus Fröschle
|
453c974c4f
|
moved FPGA config GPIO initialization into init_fpga.c to enable external JTAG FPGA configuration
|
2014-06-20 12:02:11 +00:00 |
|
Markus Fröschle
|
dd3a3e9da4
|
started simulator for DDR RAM
|
2014-06-16 14:35:54 +00:00 |
|
Markus Fröschle
|
90bc4c409e
|
more testbench code
|
2014-06-15 06:05:23 +00:00 |
|
Markus Fröschle
|
55889b9e7b
|
started memory write state machine in testbench
|
2014-06-13 21:23:35 +00:00 |
|
Markus Fröschle
|
40e6a71e47
|
started testbench bus transaction implementation
|
2014-06-13 06:26:42 +00:00 |
|
Markus Fröschle
|
05a13bdf16
|
added clock signals
|
2014-06-11 17:52:44 +00:00 |
|
Markus Fröschle
|
8d0ede14c8
|
worked on testbench
|
2014-06-11 16:41:25 +00:00 |
|
Markus Fröschle
|
2c29f6a232
|
tried less restrictive option to speed up synthesis
|
2014-06-10 06:52:16 +00:00 |
|