Markus Fröschle
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27824cd8e6
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fixed wrong chip select for video frequency timer (VFT) register
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2014-08-17 08:47:35 +00:00 |
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Markus Fröschle
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282c631601
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added false_path to CLK_MAIN
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2014-08-17 08:43:43 +00:00 |
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Markus Fröschle
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b73b59f372
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fixed wrong pin assignment for FB_WRn
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2014-08-17 08:42:26 +00:00 |
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Markus Fröschle
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9b1cb2255b
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fixed missing (not "translated" from the original .tdf) statements
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2014-08-14 05:33:56 +00:00 |
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Markus Fröschle
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3691c94c5c
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added constraints for global clock signals
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2014-08-14 05:30:45 +00:00 |
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Markus Fröschle
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beb4eed5b8
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added missing files
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2014-08-10 18:23:55 +00:00 |
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Markus Fröschle
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6074b0c9f1
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fixed dbg() printout macro
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2014-08-10 18:22:59 +00:00 |
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Markus Fröschle
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670181c8d4
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added additional functions for cache handling
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2014-08-10 18:21:49 +00:00 |
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Markus Fröschle
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ecdba7d62a
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fixed warning regarding incompatible pointers
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2014-08-10 18:20:15 +00:00 |
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Markus Fröschle
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92dddd3ca9
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made stack location symbolic
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2014-08-10 17:19:10 +00:00 |
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Markus Fröschle
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852bf8928f
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modified jtagwait to allow to set reset start address when renamed to .TTP
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2014-08-10 14:39:06 +00:00 |
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Markus Fröschle
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1134454984
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disabled SignalTap
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2014-08-09 19:45:29 +00:00 |
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Markus Fröschle
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cf659204c8
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fixed formatting
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2014-08-09 19:17:09 +00:00 |
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Markus Fröschle
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e9f5ee1ed3
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added missing assignments and wrong pins for differential clock
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2014-08-09 17:34:08 +00:00 |
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Markus Fröschle
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4ba8ac1426
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added missing check for _FPGA_JTAG_VALID
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2014-08-09 13:56:28 +00:00 |
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Markus Fröschle
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7c9a551635
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added missing files forgot on last commit
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2014-08-09 13:10:13 +00:00 |
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Markus Fröschle
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fd72b7ce9e
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support for JTAGWAIT.PRG (configure FPGA from JTAG port) implemented
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2014-08-09 13:07:28 +00:00 |
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Markus Fröschle
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f55cae6c0f
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simplified PLL initialization
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2014-08-08 19:52:07 +00:00 |
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Markus Fröschle
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2aee4d9c45
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fixed a bug in wiring of I_RECONFIG (data_in was connected to FB_ADR(24 downto 16) instead ot FB_AD(24 downto 16) and reformatted files
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2014-08-08 17:48:19 +00:00 |
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Markus Fröschle
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f0cfdc9d0b
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simplified pll initialization
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2014-08-08 16:13:14 +00:00 |
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Markus Fröschle
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cf56eece67
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fixed a few more problems resulting from changing libraries
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2014-08-06 19:49:32 +00:00 |
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Markus Fröschle
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630a82de9a
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bumped version for release
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2014-08-06 06:23:30 +00:00 |
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Markus Fröschle
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4c5b6d02e9
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fixed formatting
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2014-08-04 20:50:39 +00:00 |
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Markus Fröschle
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b40ddd37fc
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2014-08-04 20:27:57 +00:00 |
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Markus Fröschle
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4c2be14e28
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removed all dependencies to obsolete ieee.std_logic_arith and ieee.std_logic_unsigned in favour of ieee.numeric_std. There are a few things that still need to be fixed because of that, however.
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2014-08-04 17:23:47 +00:00 |
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Markus Fröschle
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d96e0b82bc
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added tos programs that are used to interface to BaS_gcc from TOS. These programs are currently not build by default (need to call make in their respective directory for now). They expect to find a libcmini copy on the same directory level than you have your BaS_gcc folder.
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2014-08-02 08:25:07 +00:00 |
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David Gálvez
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5f896320fa
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Add format specifier to fix debug messages format
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2014-07-13 15:18:23 +00:00 |
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David Gálvez
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d1767a50e9
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Make PCI memory space uncachable
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2014-07-10 16:46:21 +00:00 |
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David Gálvez
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bf32e899d1
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Merge pci_BaS_gcc branch to trunk
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2014-07-10 15:45:45 +00:00 |
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Markus Fröschle
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fe7d35a212
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fixed typo
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2014-07-09 19:14:40 +00:00 |
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Markus Fröschle
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948fd2c798
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fixed formatting
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2014-06-23 18:23:44 +00:00 |
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Markus Fröschle
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f1f66f5fd9
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fixed formatting
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2014-06-23 05:46:13 +00:00 |
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Markus Fröschle
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2666b1de47
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fixed compiler warnings
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2014-06-23 05:37:51 +00:00 |
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Markus Fröschle
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138649e19f
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fixed a few compiler warnings
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2014-06-23 05:32:49 +00:00 |
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Markus Fröschle
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8935f0bbc4
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modified init_fpga() to honour JTAG configuration. Does not work
currently and needs support from the TOS side (program not finished yet)
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2014-06-22 16:00:49 +00:00 |
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Markus Fröschle
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d1297a5b0e
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added Doxyfile for doxygen documentation
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2014-06-21 19:53:54 +00:00 |
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Markus Fröschle
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4efc487ca6
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added BaS includes
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2014-06-21 19:52:23 +00:00 |
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Markus Fröschle
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96319f252d
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added ST fonts
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2014-06-21 19:48:22 +00:00 |
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Markus Fröschle
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9d717fbac7
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version bump
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2014-06-21 06:33:45 +00:00 |
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Markus Fröschle
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f7e8610263
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some minor cosmetic fixes
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2014-06-21 06:32:25 +00:00 |
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Markus Fröschle
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4f81b597a6
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reverted to last released to make it work again
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2014-06-21 06:21:41 +00:00 |
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Markus Fröschle
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aacdc671a8
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removed (now wrong) comment
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2014-06-21 05:50:43 +00:00 |
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Markus Fröschle
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b3af46394a
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completed locked TLB list
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2014-06-20 20:24:37 +00:00 |
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Markus Fröschle
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e4a7e1df5a
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added locked TLB entries
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2014-06-20 19:50:49 +00:00 |
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Markus Fröschle
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69a84effee
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started to revert to previous functionality
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2014-06-20 18:35:08 +00:00 |
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Markus Fröschle
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453c974c4f
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moved FPGA config GPIO initialization into init_fpga.c to enable external JTAG FPGA configuration
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2014-06-20 12:02:11 +00:00 |
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Markus Fröschle
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dd3a3e9da4
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started simulator for DDR RAM
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2014-06-16 14:35:54 +00:00 |
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Markus Fröschle
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90bc4c409e
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more testbench code
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2014-06-15 06:05:23 +00:00 |
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Markus Fröschle
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55889b9e7b
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started memory write state machine in testbench
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2014-06-13 21:23:35 +00:00 |
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Markus Fröschle
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40e6a71e47
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started testbench bus transaction implementation
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2014-06-13 06:26:42 +00:00 |
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