modified comments

This commit is contained in:
Markus Fröschle
2014-01-14 21:15:56 +00:00
parent cdaefc9343
commit f53d4b4a67

View File

@@ -49,7 +49,8 @@ _rom_entry:
lea __SUP_SP,a7
move.l #0,(sp)
/* Initialize the processor caches.
/*
* Initialize the processor caches.
* The instruction cache is fully enabled.
* The data cache is enabled, but cache-inhibited by default.
* Later, the MMU will fully activate the data cache for specific areas.