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@@ -49,7 +49,8 @@ _rom_entry:
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lea __SUP_SP,a7
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move.l #0,(sp)
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/* Initialize the processor caches.
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/*
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* Initialize the processor caches.
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* The instruction cache is fully enabled.
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* The data cache is enabled, but cache-inhibited by default.
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* Later, the MMU will fully activate the data cache for specific areas.
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