First full HDL version
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27
FPGA_quartus_GE/UNUSED
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27
FPGA_quartus_GE/UNUSED
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@@ -0,0 +1,27 @@
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-- Clearbox generated Memory Initialization File (.mif)
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WIDTH=3;
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DEPTH=16;
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ADDRESS_RADIX=HEX;
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DATA_RADIX=HEX;
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CONTENT BEGIN
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00 : 7;
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01 : 6;
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02 : 5;
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03 : 4;
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04 : 3;
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05 : 2;
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06 : 1;
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07 : 0;
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08 : 7;
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09 : 6;
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0a : 5;
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0b : 4;
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0c : 3;
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0d : 2;
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0e : 1;
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0f : 0;
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END;
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