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This commit is contained in:
Markus Fröschle
2014-12-20 08:22:10 +00:00
parent 91ea8fc622
commit cbff11f5d8
5 changed files with 2 additions and 52 deletions
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2
vhdl/rtl/vhdl/Firebee_V1/Firebee_V1_Top.vhd → vhdl/rtl/vhdl/Firebee_V1/Firebee_Top.vhd
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@@ -788,7 +788,7 @@ BEGIN
END IF; END IF;
END PROCESS VDP_Q_BUFFER; END PROCESS VDP_Q_BUFFER;
I_DDR_CTRL: DDR_CTRL_V1 I_DDR_CTRL: DDR_CTRL
PORT MAP( PORT MAP(
CLK_MAIN => CLK_MAIN, CLK_MAIN => CLK_MAIN,
ddr_sync_66m => ddr_sync_66m, ddr_sync_66m => ddr_sync_66m,

30
vhdl/rtl/vhdl/Firebee_V1/Firebee_V1.sdc
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@@ -1,30 +0,0 @@
#**************************************************************
# Time Information
#**************************************************************
set_time_format -unit ps
#**************************************************************
# Create Clock
#**************************************************************
# create_clock -name CLK -period 100.000 -waveform {0.000 50.000} [get_ports {CLK}]
create_clock -period 30.303 -name CLK_MAIN [get_ports {CLK_MAIN}]
create_clock -period 30.303 -name CLK_33M [get_ports {CLK_33M}]
derive_pll_clocks -use_net_name
derive_clock_uncertainty
#set_clock_groups -exclusive -group {CLK_2M0}
#set_clock_groups -exclusive -group {CLK_500K}
#set_clock_groups -exclusive -group {CLK_2M4576}
#set_clock_groups -exclusive -group {CLK_24M576}
#set_clock_groups -exclusive -group {CLK_FDC}
#set_clock_groups -exclusive -group {CLK_VIDEO}
#set_clock_groups -exclusive -group {CLK_25M}
#set_clock_groups -exclusive -group {CLK_48M}
#set_clock_groups -exclusive -group {CLK_PIXEL}

2
vhdl/rtl/vhdl/Firebee_V1/Firebee_V1_pkg.vhd → vhdl/rtl/vhdl/Firebee_V1/Firebee_pkg.vhd
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@@ -154,7 +154,7 @@ package firebee_pkg is
); );
end component; end component;
component DDR_CTRL_V1 is component DDR_CTRL is
port( port(
CLK_MAIN : in std_logic; CLK_MAIN : in std_logic;
DDR_SYNC_66M : in std_logic; DDR_SYNC_66M : in std_logic;

10
vhdl/rtl/vhdl/Firebee_V1/altpll1_waveforms.html
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@@ -1,10 +0,0 @@
<html>
<head>
<title>Sample Waveforms for "altpll1.vhd" </title>
</head>
<body>
<h2><CENTER>Sample behavioral waveforms for design file "altpll1.vhd" </CENTER></h2>
<P></P>
<P></P>
</body>
</html>

10
vhdl/rtl/vhdl/Firebee_V1/altpll2_waveforms.html
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@@ -1,10 +0,0 @@
<html>
<head>
<title>Sample Waveforms for "altpll2.vhd" </title>
</head>
<body>
<h2><CENTER>Sample behavioral waveforms for design file "altpll2.vhd" </CENTER></h2>
<P></P>
<P></P>
</body>
</html>