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bit checks to wait for FPGA ready were the wrong way round.

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Allowed the compiler to use m68k bitfield instructions (-mbitfield). Now produces nearly the same code than Fredi's assembler sources.
This commit is contained in:
Markus Fröschle
2012-10-16 06:13:48 +00:00
parent fbe077dbf5
commit c69f2487e3
2 changed files with 2 additions and 2 deletions
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2
Makefile
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@@ -18,7 +18,7 @@ CC=$(TCPREFIX)gcc
LD=$(TCPREFIX)ld
INCLUDE=-Iinclude
CFLAGS=-mcpu=5474 -Wall -Wno-multichar -Os -fomit-frame-pointer
CFLAGS=-mcpu=5474 -mbitfield -Wall -Wno-multichar -Os -fomit-frame-pointer
SRCDIR=sources
OBJDIR=objs

2
sources/sysinit.c
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@@ -219,7 +219,7 @@ void init_fpga(void)
MCF_GPIO_PODR_FEC1L &= ~(1 << 1); /* FPGA clock => low */
MCF_GPIO_PODR_FEC1L &= ~(1 << 2); /* FPGA config => low */
while ((! (MCF_GPIO_PPDSDR_FEC1L & (1 << 0))) && (! (MCF_GPIO_PPDSDR_FEC1L & (1 << 5))));
while (((MCF_GPIO_PPDSDR_FEC1L & (1 << 0))) || ((MCF_GPIO_PPDSDR_FEC1L & (1 << 5))));
wait_10us();
MCF_GPIO_PODR_FEC1L |= (1 << 2);