fix formatting
This commit is contained in:
Markus Fröschle
@@ -55,8 +55,8 @@
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#define CF_CACR_EUSP (0x00000020) /* Switch stacks in user mode */
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#define CF_CACR_DF (0x00000010) /* Disable FPU */
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#define _DCACHE_SET_MASK ((DCACHE_SIZE/64-1)<<CACHE_WAYS)
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#define _ICACHE_SET_MASK ((ICACHE_SIZE/64-1)<<CACHE_WAYS)
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#define _DCACHE_SET_MASK ((DCACHE_SIZE / 64 - 1) << CACHE_WAYS)
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#define _ICACHE_SET_MASK ((ICACHE_SIZE / 64 - 1) << CACHE_WAYS)
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#define LAST_DCACHE_ADDR _DCACHE_SET_MASK
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#define LAST_ICACHE_ADDR _ICACHE_SET_MASK
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@@ -68,15 +68,15 @@
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#define CACHE_WAYS 0x0004 /* 4 way */
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#define CACHE_DISABLE_MODE (CF_CACR_DCINVA+ \
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CF_CACR_BCINVA+ \
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CF_CACR_ICINVA)
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#define CACHE_DISABLE_MODE (CF_CACR_DCINVA + \
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CF_CACR_BCINVA + \
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CF_CACR_ICINVA)
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#define CACHE_INITIAL_MODE (CF_CACR_DEC+ \
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CF_CACR_BEC+ \
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CF_CACR_IEC+ \
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CF_CACR_DESB+ \
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CF_CACR_EUSP)
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#define CACHE_INITIAL_MODE (CF_CACR_DEC + \
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CF_CACR_BEC + \
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CF_CACR_IEC + \
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CF_CACR_DESB + \
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CF_CACR_EUSP)
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extern void flush_and_invalidate_caches(void);
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extern uint32_t cacr_get(void);
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@@ -9,8 +9,8 @@
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extern "C" {
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#endif
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#define _USE_WRITE 1 /* 1: Enable disk_write function */
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#define _USE_IOCTL 1 /* 1: Enable disk_ioctl fucntion */
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#define _USE_WRITE 1 /* 1: Enable disk_write function */
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#define _USE_IOCTL 1 /* 1: Enable disk_ioctl fucntion */
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#include <bas_types.h>
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@@ -20,11 +20,11 @@ typedef uint8_t DSTATUS;
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/* Results of Disk Functions */
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typedef enum {
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RES_OK = 0, /* 0: Successful */
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RES_ERROR, /* 1: R/W Error */
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RES_WRPRT, /* 2: Write Protected */
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RES_NOTRDY, /* 3: Not Ready */
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RES_PARERR /* 4: Invalid Parameter */
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RES_OK = 0, /* 0: Successful */
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RES_ERROR, /* 1: R/W Error */
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RES_WRPRT, /* 2: Write Protected */
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RES_NOTRDY, /* 3: Not Ready */
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RES_PARERR /* 4: Invalid Parameter */
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} DRESULT;
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@@ -43,45 +43,45 @@ DRESULT disk_ioctl (uint8_t, uint8_t, void*);
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/* Disk Status Bits (DSTATUS) */
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#define STA_NOINIT 0x01 /* Drive not initialized */
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#define STA_NODISK 0x02 /* No medium in the drive */
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#define STA_PROTECT 0x04 /* Write protected */
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#define STA_NOINIT 0x01 /* Drive not initialized */
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#define STA_NODISK 0x02 /* No medium in the drive */
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#define STA_PROTECT 0x04 /* Write protected */
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/* Command code for disk_ioctrl fucntion */
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/* Generic command (used by FatFs) */
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#define CTRL_SYNC 0 /* Flush disk cache (for write functions) */
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#define GET_SECTOR_COUNT 1 /* Get media size (for only f_mkfs()) */
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#define GET_SECTOR_SIZE 2 /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
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#define GET_BLOCK_SIZE 3 /* Get erase block size (for only f_mkfs()) */
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#define CTRL_ERASE_SECTOR 4 /* Force erased a block of sectors (for only _USE_ERASE) */
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#define CTRL_SYNC 0 /* Flush disk cache (for write functions) */
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#define GET_SECTOR_COUNT 1 /* Get media size (for only f_mkfs()) */
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#define GET_SECTOR_SIZE 2 /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
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#define GET_BLOCK_SIZE 3 /* Get erase block size (for only f_mkfs()) */
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#define CTRL_ERASE_SECTOR 4 /* Force erased a block of sectors (for only _USE_ERASE) */
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/* Generic command (not used by FatFs) */
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#define CTRL_POWER 5 /* Get/Set power status */
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#define CTRL_LOCK 6 /* Lock/Unlock media removal */
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#define CTRL_EJECT 7 /* Eject media */
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#define CTRL_FORMAT 8 /* Create physical format on the media */
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#define CTRL_POWER 5 /* Get/Set power status */
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#define CTRL_LOCK 6 /* Lock/Unlock media removal */
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#define CTRL_EJECT 7 /* Eject media */
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#define CTRL_FORMAT 8 /* Create physical format on the media */
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/* MMC/SDC specific ioctl command */
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#define MMC_GET_TYPE 10 /* Get card type */
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#define MMC_GET_CSD 11 /* Get CSD */
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#define MMC_GET_CID 12 /* Get CID */
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#define MMC_GET_OCR 13 /* Get OCR */
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#define MMC_GET_SDSTAT 14 /* Get SD status */
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#define MMC_GET_TYPE 10 /* Get card type */
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#define MMC_GET_CSD 11 /* Get CSD */
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#define MMC_GET_CID 12 /* Get CID */
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#define MMC_GET_OCR 13 /* Get OCR */
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#define MMC_GET_SDSTAT 14 /* Get SD status */
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/* ATA/CF specific ioctl command */
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#define ATA_GET_REV 20 /* Get F/W revision */
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#define ATA_GET_MODEL 21 /* Get model name */
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#define ATA_GET_SN 22 /* Get serial number */
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#define ATA_GET_REV 20 /* Get F/W revision */
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#define ATA_GET_MODEL 21 /* Get model name */
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#define ATA_GET_SN 22 /* Get serial number */
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/* MMC card type flags (MMC_GET_TYPE) */
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#define CT_MMC 0x01 /* MMC ver 3 */
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#define CT_SD1 0x02 /* SD ver 1 */
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#define CT_SD2 0x04 /* SD ver 2 */
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#define CT_SDC (CT_SD1|CT_SD2) /* SD */
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#define CT_BLOCK 0x08 /* Block addressing */
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#define CT_MMC 0x01 /* MMC ver 3 */
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#define CT_SD1 0x02 /* SD ver 1 */
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#define CT_SD2 0x04 /* SD ver 2 */
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#define CT_SDC (CT_SD1 | CT_SD2) /* SD */
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#define CT_BLOCK 0x08 /* Block addressing */
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#ifdef __cplusplus
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@@ -40,9 +40,9 @@
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*/
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typedef struct
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{
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uint16_t status; /* control and status */
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uint16_t length; /* transfer length */
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uint8_t *data; /* buffer address */
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uint16_t status; /* control and status */
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uint16_t length; /* transfer length */
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uint8_t *data; /* buffer address */
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} FECBD;
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/*
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@@ -27,24 +27,24 @@
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* Author: Markus Fröschle
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*/
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#define SYSCLK 132000 /* NOTE: 132 _is_ correct. 133 _is_ wrong. Do not change! */
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#define SYSCLK 132000 /* NOTE: 132 _is_ correct. 133 _is_ wrong. Do not change! */
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#define BOOTFLASH_BASE_ADDRESS 0xE0000000
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#define BOOTFLASH_SIZE 0x800000 /* FireBee has 8 MByte Flash */
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#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1)
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#define BOOTFLASH_BASE_ADDRESS 0xE0000000
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#define BOOTFLASH_SIZE 0x800000 /* FireBee has 8 MByte Flash */
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#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1)
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#define SDRAM_START 0x00000000 /* start at address 0 */
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#define SDRAM_SIZE 0x20000000 /* 512 MB on the Firebee */
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#define SDRAM_START 0x00000000 /* start at address 0 */
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#define SDRAM_SIZE 0x20000000 /* 512 MB on the Firebee */
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#ifdef COMPILE_RAM
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#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000)
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#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000)
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#else
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#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
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#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
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#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
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#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
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#endif /* COMPILE_RAM */
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#define DRIVER_MEM_BUFFER_SIZE 0x100000
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#define DRIVER_MEM_BUFFER_SIZE 0x100000
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#define EMUTOS_BASE_ADDRESS 0xe0600000
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@@ -27,24 +27,24 @@
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* Author: Markus Fröschle
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*/
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#define SYSCLK 133000
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#define SYSCLK 133000
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#define BOOTFLASH_BASE_ADDRESS 0xe0000000
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#define BOOTFLASH_SIZE 0x800000
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#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1)
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#define BOOTFLASH_BASE_ADDRESS 0xe0000000
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#define BOOTFLASH_SIZE 0x800000
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#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1)
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#define SDRAM_START 0x40000000 /* start at address 40000000 */
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#define SDRAM_SIZE 0x10000000 /* 256 MB */
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#define SDRAM_START 0x40000000 /* start at address 40000000 */
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#define SDRAM_SIZE 0x10000000 /* 256 MB */
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#ifdef COMPILE_RAM
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#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000)
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#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000)
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#else
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#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
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#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
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#endif /* COMPILE_RAM */
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#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
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#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
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#define DRIVER_MEM_BUFFER_SIZE 0x100000
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#define DRIVER_MEM_BUFFER_SIZE 0x100000
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#define EMUTOS_BASE_ADDRESS 0xe0100000
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#define EMUTOS_BASE_ADDRESS 0xe0100000
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#endif /* _M54455_H_ */
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@@ -27,24 +27,24 @@
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* Author: Markus Fröschle
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*/
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#define SYSCLK 100000UL
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#define SYSCLK 100000UL
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#define BOOTFLASH_BASE_ADDRESS 0xe0000000
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#define BOOTFLASH_SIZE 0x400000 /* LITEKIT has 4MB flash */
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#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1)
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#define BOOTFLASH_BASE_ADDRESS 0xe0000000
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#define BOOTFLASH_SIZE 0x400000 /* LITEKIT has 4MB flash */
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#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1)
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#define SDRAM_START 0x00000000 /* start at address 0 */
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#define SDRAM_SIZE 0x4000000 /* 64 MB on the LITEKIT */
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#define SDRAM_START 0x00000000 /* start at address 0 */
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#define SDRAM_SIZE 0x4000000 /* 64 MB on the LITEKIT */
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#ifdef COMPILE_RAM
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#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000)
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#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000)
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#else
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#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
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#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
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#endif /* COMPILE_RAM */
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#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
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#define BFL_TARGET_ADDRESS 0x0100000 /* load address for basflash */
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#define DRIVER_MEM_BUFFER_SIZE 0x100000
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#define DRIVER_MEM_BUFFER_SIZE 0x100000
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#define EMUTOS_BASE_ADDRESS 0xe0100000
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#define EMUTOS_BASE_ADDRESS 0xe0100000
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#endif /* _M5484L_H_ */
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@@ -35,7 +35,6 @@
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#include "sd_card.h"
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#include "wait.h"
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#include "diskio.h"
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#include "ff.h"
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#include "s19reader.h"
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#include "mmu.h"
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@@ -63,23 +63,23 @@ void enable_data_cache(void)
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void flush_and_invalidate_caches(void)
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{
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__asm__ __volatile__(
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" clr.l d0 \n\t"
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" clr.l d1 \n\t"
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" move.l d0,a0 \n\t"
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"1: \n\t"
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" cpushl bc,(a0) | flush\n\t"
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" lea 0x10(a0),a0 | index+1\n\t"
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" addq.l #1,d1 | index+1\n\t"
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" cmpi.w #512,d1 | all sets?\n\t"
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" bne.s 1b | no->\n\t"
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" clr.l d1 \n\t"
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" addq.l #1,d0 \n\t"
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" move.l d0,a0 \n\t"
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" cmpi.w #4,d0 | all ways?\n\t"
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" bne.s 1b | no->\n\t"
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/* input */ :
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/* output */ :
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/* clobber */ : "cc", "d0", "d1", "a0"
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" clr.l d0 \n\t"
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" clr.l d1 \n\t"
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" move.l d0,a0 \n\t"
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"cfa_setloop%=: \n\t"
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" cpushl bc,(a0) | flush\n\t"
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" lea 0x10(a0),a0 | index+1\n\t"
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" addq.l #1,d1 | index+1\n\t"
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" cmpi.w #512,d1 | all sets?\n\t"
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" bne.s cfa_setloop%= | no->\n\t"
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" clr.l d1 \n\t"
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" addq.l #1,d0 \n\t"
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" move.l d0,a0 \n\t"
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" cmpi.w #4,d0 | all ways?\n\t"
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" bne.s cfa_setloop%= | no->\n\t"
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/* input */ :
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/* output */ :
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/* clobber */ : "cc", "d0", "d1", "a0"
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);
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}
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