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fixex wrong parentheses in pci_write_config_longword()

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This commit is contained in:
Markus Fröschle
2013-11-13 21:08:52 +00:00
parent 16ff2be32f
commit ab59c42046
4 changed files with 25 additions and 8 deletions
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5
BaS_gcc/.gdbinit
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@@ -1,13 +1,12 @@
#set disassemble-next-line on #set disassemble-next-line on
define tr define tr
#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3 target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
target remote | m68k-bdm-gdbserver pipe /dev/tblcf3 #target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
#target dbug /dev/ttyS0 #target dbug /dev/ttyS0
#monitor bdm-reset #monitor bdm-reset
end end
define tbtr define tbtr
target remote | m68k-bdm-gdbserver pipe /dev/tblcf3 target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
monitor bdm-reset
end end
source mcf5474.gdb source mcf5474.gdb
set breakpoint auto-hw set breakpoint auto-hw

2
BaS_gcc/mcf5474.gdb
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@@ -61,6 +61,6 @@ define ib
setup-dram setup-dram
end end
ib
tr tr
ib
load load

10
BaS_gcc/sources/pci.c
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@@ -98,7 +98,9 @@ void chip_errata_135(void)
__asm__ __volatile( __asm__ __volatile(
" .extern __MBAR\n\t" " .extern __MBAR\n\t"
" bra .errata\n\t"
" .align 16\n\t" /* force function start to 16-byte boundary */ " .align 16\n\t" /* force function start to 16-byte boundary */
".errata:\n\t"
" clr.l d0\n\t" " clr.l d0\n\t"
" move.l d0,__MBAR+0xF0C\n\t" /* Must use direct addressing. write to EPORT module */ " move.l d0,__MBAR+0xF0C\n\t" /* Must use direct addressing. write to EPORT module */
/* xlbus -> slavebus -> eport, writing '0' to register */ /* xlbus -> slavebus -> eport, writing '0' to register */
@@ -212,11 +214,11 @@ uint8_t pci_read_config_byte(int32_t handle, int offset)
MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */ MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */
MCF_PCI_PCICAR_DWORD(offset / 4); MCF_PCI_PCICAR_DWORD(offset / 4);
__asm__ __volatile__("nop"); __asm__ __volatile__("nop" ::: "memory");
value = * (volatile uint8_t *) PCI_IO_OFFSET + (offset & 3); value = * (volatile uint8_t *) (PCI_IO_OFFSET + (offset & 3));
__asm__ __volatile__("tpf"); __asm__ __volatile__("tpf" ::: "memory");
MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E; MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;
@@ -237,7 +239,7 @@ int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t value)
MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */ MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */
MCF_PCI_PCICAR_DWORD(offset / 4); MCF_PCI_PCICAR_DWORD(offset / 4);
__asm__ __volatile__("tpf"); __asm__ __volatile__("nop");
* (volatile uint32_t *) PCI_IO_OFFSET = value; /* access device */ * (volatile uint32_t *) PCI_IO_OFFSET = value; /* access device */

16
BaS_gcc/sources/sysinit.c
View File

@@ -120,11 +120,19 @@ void init_gpio(void)
* /PCIBG1 used as /PCIBG1 * /PCIBG1 used as /PCIBG1
* /PCIBG0 used as /PCIBG0 * /PCIBG0 used as /PCIBG0
*/ */
#if MACHINE_FIREBEE
MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_TBST | MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_TBST |
MCF_PAD_PAR_PCIBG_PAR_PCIBG3_GPIO | MCF_PAD_PAR_PCIBG_PAR_PCIBG3_GPIO |
MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 | MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 |
MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 | MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 |
MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0; MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0;
#elif MACHINE_M5484LITE
MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_PCIBG4 |
MCF_PAD_PAR_PCIBG_PAR_PCIBG3_PCIBG3 |
MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 |
MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 |
MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0;
#endif /* MACHINE_FIREBEE */
/* /*
* configure PCI request pin assignment on GPIO module: * configure PCI request pin assignment on GPIO module:
@@ -134,11 +142,19 @@ void init_gpio(void)
* /PCIBR1 as /PCIBR1 * /PCIBR1 as /PCIBR1
* /PCIBR0 as /PCIBR0 * /PCIBR0 as /PCIBR0
*/ */
#if MACHINE_FIREBEE
MCF_PAD_PAR_PCIBR = MCF_PAD_PAR_PCIBR_PAR_PCIBR4_IRQ4 | MCF_PAD_PAR_PCIBR = MCF_PAD_PAR_PCIBR_PAR_PCIBR4_IRQ4 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR3_GPIO | MCF_PAD_PAR_PCIBR_PAR_PCIBR3_GPIO |
MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 | MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 | MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0; MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0;
#elif MACHINE_M5484LITE
MCF_PAD_PAR_PCIBR = MCF_PAD_PAR_PCIBR_PAR_PCIBR4_PCIBR4 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR3_PCIBR3 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0;
#endif /* MACHINE_FIREBEE */
/* /*
* configure PSC3 pin assignment on GPIO module: * configure PSC3 pin assignment on GPIO module: