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make pll_base local

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This commit is contained in:
Markus Fröschle
2012-12-13 14:41:00 +00:00
parent b03e68f898
commit 894d53bb88
2 changed files with 6 additions and 1 deletions
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4
SD_CARD/BaS_gcc/.cproject
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@@ -320,6 +320,8 @@
</profile> </profile>
</scannerConfigBuildInfo> </scannerConfigBuildInfo>
</storageModule> </storageModule>
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
</cconfiguration> </cconfiguration>
<cconfiguration id="cdt.managedbuild.toolchain.gnu.cross.base.500844171.756690686"> <cconfiguration id="cdt.managedbuild.toolchain.gnu.cross.base.500844171.756690686">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="cdt.managedbuild.toolchain.gnu.cross.base.500844171.756690686" moduleId="org.eclipse.cdt.core.settings" name="firebee-cross"> <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="cdt.managedbuild.toolchain.gnu.cross.base.500844171.756690686" moduleId="org.eclipse.cdt.core.settings" name="firebee-cross">
@@ -654,6 +656,8 @@
</profile> </profile>
</scannerConfigBuildInfo> </scannerConfigBuildInfo>
</storageModule> </storageModule>
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
</cconfiguration> </cconfiguration>
</storageModule> </storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0"> <storageModule moduleId="cdtBuildSystem" version="4.0.0">

3
SD_CARD/BaS_gcc/sources/sysinit.c
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@@ -328,10 +328,11 @@ void wait_pll(void)
} while ((* (volatile int16_t *) 0xf0000800 < 0) && MCF_SLT0_SCNT > trgt); } while ((* (volatile int16_t *) 0xf0000800 < 0) && MCF_SLT0_SCNT > trgt);
} }
static volatile uint8_t *pll_base = (volatile uint8_t *) 0xf0000600;
void init_pll(void) void init_pll(void)
{ {
static volatile uint8_t *pll_base = (volatile uint8_t *) 0xf0000600;
xprintf("FPGA PLL initialization: "); xprintf("FPGA PLL initialization: ");
wait_pll(); wait_pll();