diff --git a/SD_CARD/BaS_gcc/.cproject b/SD_CARD/BaS_gcc/.cproject
index 9d6a853..c19c953 100644
--- a/SD_CARD/BaS_gcc/.cproject
+++ b/SD_CARD/BaS_gcc/.cproject
@@ -320,6 +320,8 @@
 					</profile>
 				</scannerConfigBuildInfo>
 			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
 		</cconfiguration>
 		<cconfiguration id="cdt.managedbuild.toolchain.gnu.cross.base.500844171.756690686">
 			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="cdt.managedbuild.toolchain.gnu.cross.base.500844171.756690686" moduleId="org.eclipse.cdt.core.settings" name="firebee-cross">
@@ -654,6 +656,8 @@
 					</profile>
 				</scannerConfigBuildInfo>
 			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
 		</cconfiguration>
 	</storageModule>
 	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
diff --git a/SD_CARD/BaS_gcc/sources/sysinit.c b/SD_CARD/BaS_gcc/sources/sysinit.c
index 6d3c847..ed369c2 100644
--- a/SD_CARD/BaS_gcc/sources/sysinit.c
+++ b/SD_CARD/BaS_gcc/sources/sysinit.c
@@ -328,10 +328,11 @@ void wait_pll(void)
 	} while ((* (volatile int16_t *) 0xf0000800 < 0) && MCF_SLT0_SCNT > trgt);
 }
 
-static volatile uint8_t *pll_base = (volatile uint8_t *) 0xf0000600;
 
 void init_pll(void)
 {
+	static volatile uint8_t *pll_base = (volatile uint8_t *) 0xf0000600;
+
 	xprintf("FPGA PLL initialization: ");
 
 	wait_pll();