more fiddling with leading underscore in symbols
This commit is contained in:
2
flash.lk
2
flash.lk
@@ -3,7 +3,7 @@ MEMORY {
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}
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SECTIONS {
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_Bas_base = 0x1FE00000;
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___Bas_base = ABSOLUTE(0x1FE00000);
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/* Board Memory map definitions from linker command files:
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* __SDRAM,__SDRAM_SIZE, __CODE_FLASH, __CODE_FLASH_SIZE
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@@ -23,19 +23,19 @@
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* linker symbols must be defined in the linker command file.
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*/
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extern uint8_t __MBAR[];
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extern uint8_t __MMUBAR[];
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extern uint8_t __RAMBAR0[];
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extern uint8_t __RAMBAR0_SIZE[];
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extern uint8_t __RAMBAR1[];
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extern uint8_t __RAMBAR1_SIZE[];
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extern uint8_t _MBAR[];
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extern uint8_t _MMUBAR[];
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extern uint8_t _RAMBAR0[];
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extern uint8_t _RAMBAR0_SIZE[];
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extern uint8_t _RAMBAR1[];
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extern uint8_t _RAMBAR1_SIZE[];
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#define MBAR_ADDRESS (uint32_t)__MBAR
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#define MMUBAR_ADDRESS (uint32_t)__MMUBAR
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#define RAMBAR0_ADDRESS (uint32_t)__RAMBAR0
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#define RAMBAR0_SIZE (uint32_t)__RAMBAR0_SIZE
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#define RAMBAR1_ADDRESS (uint32_t)__RAMBAR1
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#define RAMBAR1_SIZE (uint32_t)__RAMBAR1_SIZE
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#define MBAR_ADDRESS (uint32_t)_MBAR
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#define MMUBAR_ADDRESS (uint32_t)_MMUBAR
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#define RAMBAR0_ADDRESS (uint32_t)_RAMBAR0
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#define RAMBAR0_SIZE (uint32_t)_RAMBAR0_SIZE
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#define RAMBAR1_ADDRESS (uint32_t)_RAMBAR1
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#define RAMBAR1_SIZE (uint32_t)_RAMBAR1_SIZE
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#include "MCF5475_SIU.h"
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@@ -24,7 +24,7 @@
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_CLOCK_SPCR (*(volatile uint32_t*)(&__MBAR[0x300]))
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#define MCF_CLOCK_SPCR (*(volatile uint32_t*)(&_MBAR[0x300]))
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/* Bit definitions and macros for MCF_CLOCK_SPCR */
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@@ -24,16 +24,16 @@
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_CTM_CTCR0 (*(volatile uint32_t*)(&__MBAR[0x7F00]))
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#define MCF_CTM_CTCR1 (*(volatile uint32_t*)(&__MBAR[0x7F04]))
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#define MCF_CTM_CTCR2 (*(volatile uint32_t*)(&__MBAR[0x7F08]))
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#define MCF_CTM_CTCR3 (*(volatile uint32_t*)(&__MBAR[0x7F0C]))
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#define MCF_CTM_CTCR4 (*(volatile uint32_t*)(&__MBAR[0x7F10]))
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#define MCF_CTM_CTCR5 (*(volatile uint32_t*)(&__MBAR[0x7F14]))
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#define MCF_CTM_CTCR6 (*(volatile uint32_t*)(&__MBAR[0x7F18]))
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#define MCF_CTM_CTCR7 (*(volatile uint32_t*)(&__MBAR[0x7F1C]))
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#define MCF_CTM_CTCRF(x) (*(volatile uint32_t*)(&__MBAR[0x7F00 + ((x)*0x4)]))
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#define MCF_CTM_CTCRV(x) (*(volatile uint32_t*)(&__MBAR[0x7F10 + ((x-4)*0x4)]))
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#define MCF_CTM_CTCR0 (*(volatile uint32_t*)(&_MBAR[0x7F00]))
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#define MCF_CTM_CTCR1 (*(volatile uint32_t*)(&_MBAR[0x7F04]))
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#define MCF_CTM_CTCR2 (*(volatile uint32_t*)(&_MBAR[0x7F08]))
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#define MCF_CTM_CTCR3 (*(volatile uint32_t*)(&_MBAR[0x7F0C]))
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#define MCF_CTM_CTCR4 (*(volatile uint32_t*)(&_MBAR[0x7F10]))
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#define MCF_CTM_CTCR5 (*(volatile uint32_t*)(&_MBAR[0x7F14]))
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#define MCF_CTM_CTCR6 (*(volatile uint32_t*)(&_MBAR[0x7F18]))
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#define MCF_CTM_CTCR7 (*(volatile uint32_t*)(&_MBAR[0x7F1C]))
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#define MCF_CTM_CTCRF(x) (*(volatile uint32_t*)(&_MBAR[0x7F00 + ((x)*0x4)]))
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#define MCF_CTM_CTCRV(x) (*(volatile uint32_t*)(&_MBAR[0x7F10 + ((x-4)*0x4)]))
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/* Bit definitions and macros for MCF_CTM_CTCRF */
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@@ -24,69 +24,69 @@
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_DMA_TASKBAR (*(volatile uint32_t*)(&__MBAR[0x8000]))
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#define MCF_DMA_CP (*(volatile uint32_t*)(&__MBAR[0x8004]))
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#define MCF_DMA_EP (*(volatile uint32_t*)(&__MBAR[0x8008]))
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#define MCF_DMA_VP (*(volatile uint32_t*)(&__MBAR[0x800C]))
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#define MCF_DMA_PTD (*(volatile uint32_t*)(&__MBAR[0x8010]))
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#define MCF_DMA_DIPR (*(volatile uint32_t*)(&__MBAR[0x8014]))
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#define MCF_DMA_DIMR (*(volatile uint32_t*)(&__MBAR[0x8018]))
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#define MCF_DMA_TCR0 (*(volatile uint16_t*)(&__MBAR[0x801C]))
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#define MCF_DMA_TCR1 (*(volatile uint16_t*)(&__MBAR[0x801E]))
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#define MCF_DMA_TCR2 (*(volatile uint16_t*)(&__MBAR[0x8020]))
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#define MCF_DMA_TCR3 (*(volatile uint16_t*)(&__MBAR[0x8022]))
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#define MCF_DMA_TCR4 (*(volatile uint16_t*)(&__MBAR[0x8024]))
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#define MCF_DMA_TCR5 (*(volatile uint16_t*)(&__MBAR[0x8026]))
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#define MCF_DMA_TCR6 (*(volatile uint16_t*)(&__MBAR[0x8028]))
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#define MCF_DMA_TCR7 (*(volatile uint16_t*)(&__MBAR[0x802A]))
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#define MCF_DMA_TCR8 (*(volatile uint16_t*)(&__MBAR[0x802C]))
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#define MCF_DMA_TCR9 (*(volatile uint16_t*)(&__MBAR[0x802E]))
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#define MCF_DMA_TCR10 (*(volatile uint16_t*)(&__MBAR[0x8030]))
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#define MCF_DMA_TCR11 (*(volatile uint16_t*)(&__MBAR[0x8032]))
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#define MCF_DMA_TCR12 (*(volatile uint16_t*)(&__MBAR[0x8034]))
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#define MCF_DMA_TCR13 (*(volatile uint16_t*)(&__MBAR[0x8036]))
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#define MCF_DMA_TCR14 (*(volatile uint16_t*)(&__MBAR[0x8038]))
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#define MCF_DMA_TCR15 (*(volatile uint16_t*)(&__MBAR[0x803A]))
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#define MCF_DMA_PRIOR0 (*(volatile uint8_t *)(&__MBAR[0x803C]))
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#define MCF_DMA_PRIOR1 (*(volatile uint8_t *)(&__MBAR[0x803D]))
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#define MCF_DMA_PRIOR2 (*(volatile uint8_t *)(&__MBAR[0x803E]))
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#define MCF_DMA_PRIOR3 (*(volatile uint8_t *)(&__MBAR[0x803F]))
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#define MCF_DMA_PRIOR4 (*(volatile uint8_t *)(&__MBAR[0x8040]))
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#define MCF_DMA_PRIOR5 (*(volatile uint8_t *)(&__MBAR[0x8041]))
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#define MCF_DMA_PRIOR6 (*(volatile uint8_t *)(&__MBAR[0x8042]))
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#define MCF_DMA_PRIOR7 (*(volatile uint8_t *)(&__MBAR[0x8043]))
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#define MCF_DMA_PRIOR8 (*(volatile uint8_t *)(&__MBAR[0x8044]))
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#define MCF_DMA_PRIOR9 (*(volatile uint8_t *)(&__MBAR[0x8045]))
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#define MCF_DMA_PRIOR10 (*(volatile uint8_t *)(&__MBAR[0x8046]))
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#define MCF_DMA_PRIOR11 (*(volatile uint8_t *)(&__MBAR[0x8047]))
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#define MCF_DMA_PRIOR12 (*(volatile uint8_t *)(&__MBAR[0x8048]))
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#define MCF_DMA_PRIOR13 (*(volatile uint8_t *)(&__MBAR[0x8049]))
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#define MCF_DMA_PRIOR14 (*(volatile uint8_t *)(&__MBAR[0x804A]))
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#define MCF_DMA_PRIOR15 (*(volatile uint8_t *)(&__MBAR[0x804B]))
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#define MCF_DMA_PRIOR16 (*(volatile uint8_t *)(&__MBAR[0x804C]))
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#define MCF_DMA_PRIOR17 (*(volatile uint8_t *)(&__MBAR[0x804D]))
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#define MCF_DMA_PRIOR18 (*(volatile uint8_t *)(&__MBAR[0x804E]))
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#define MCF_DMA_PRIOR19 (*(volatile uint8_t *)(&__MBAR[0x804F]))
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#define MCF_DMA_PRIOR20 (*(volatile uint8_t *)(&__MBAR[0x8050]))
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#define MCF_DMA_PRIOR21 (*(volatile uint8_t *)(&__MBAR[0x8051]))
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#define MCF_DMA_PRIOR22 (*(volatile uint8_t *)(&__MBAR[0x8052]))
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#define MCF_DMA_PRIOR23 (*(volatile uint8_t *)(&__MBAR[0x8053]))
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#define MCF_DMA_PRIOR24 (*(volatile uint8_t *)(&__MBAR[0x8054]))
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#define MCF_DMA_PRIOR25 (*(volatile uint8_t *)(&__MBAR[0x8055]))
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#define MCF_DMA_PRIOR26 (*(volatile uint8_t *)(&__MBAR[0x8056]))
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#define MCF_DMA_PRIOR27 (*(volatile uint8_t *)(&__MBAR[0x8057]))
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#define MCF_DMA_PRIOR28 (*(volatile uint8_t *)(&__MBAR[0x8058]))
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#define MCF_DMA_PRIOR29 (*(volatile uint8_t *)(&__MBAR[0x8059]))
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#define MCF_DMA_PRIOR30 (*(volatile uint8_t *)(&__MBAR[0x805A]))
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#define MCF_DMA_PRIOR31 (*(volatile uint8_t *)(&__MBAR[0x805B]))
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#define MCF_DMA_IMCR (*(volatile uint32_t*)(&__MBAR[0x805C]))
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#define MCF_DMA_TSKSZ0 (*(volatile uint32_t*)(&__MBAR[0x8060]))
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#define MCF_DMA_TSKSZ1 (*(volatile uint32_t*)(&__MBAR[0x8064]))
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#define MCF_DMA_DBGCOMP0 (*(volatile uint32_t*)(&__MBAR[0x8070]))
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#define MCF_DMA_DBGCOMP2 (*(volatile uint32_t*)(&__MBAR[0x8074]))
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#define MCF_DMA_DBGCTL (*(volatile uint32_t*)(&__MBAR[0x8078]))
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#define MCF_DMA_TCR(x) (*(volatile uint16_t*)(&__MBAR[0x801C + ((x)*0x2)]))
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#define MCF_DMA_PRIOR(x) (*(volatile uint8_t *)(&__MBAR[0x803C + ((x)*0x1)]))
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#define MCF_DMA_TASKBAR (*(volatile uint32_t*)(&_MBAR[0x8000]))
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#define MCF_DMA_CP (*(volatile uint32_t*)(&_MBAR[0x8004]))
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#define MCF_DMA_EP (*(volatile uint32_t*)(&_MBAR[0x8008]))
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#define MCF_DMA_VP (*(volatile uint32_t*)(&_MBAR[0x800C]))
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#define MCF_DMA_PTD (*(volatile uint32_t*)(&_MBAR[0x8010]))
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#define MCF_DMA_DIPR (*(volatile uint32_t*)(&_MBAR[0x8014]))
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#define MCF_DMA_DIMR (*(volatile uint32_t*)(&_MBAR[0x8018]))
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#define MCF_DMA_TCR0 (*(volatile uint16_t*)(&_MBAR[0x801C]))
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#define MCF_DMA_TCR1 (*(volatile uint16_t*)(&_MBAR[0x801E]))
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#define MCF_DMA_TCR2 (*(volatile uint16_t*)(&_MBAR[0x8020]))
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#define MCF_DMA_TCR3 (*(volatile uint16_t*)(&_MBAR[0x8022]))
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#define MCF_DMA_TCR4 (*(volatile uint16_t*)(&_MBAR[0x8024]))
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#define MCF_DMA_TCR5 (*(volatile uint16_t*)(&_MBAR[0x8026]))
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#define MCF_DMA_TCR6 (*(volatile uint16_t*)(&_MBAR[0x8028]))
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#define MCF_DMA_TCR7 (*(volatile uint16_t*)(&_MBAR[0x802A]))
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#define MCF_DMA_TCR8 (*(volatile uint16_t*)(&_MBAR[0x802C]))
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#define MCF_DMA_TCR9 (*(volatile uint16_t*)(&_MBAR[0x802E]))
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#define MCF_DMA_TCR10 (*(volatile uint16_t*)(&_MBAR[0x8030]))
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#define MCF_DMA_TCR11 (*(volatile uint16_t*)(&_MBAR[0x8032]))
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#define MCF_DMA_TCR12 (*(volatile uint16_t*)(&_MBAR[0x8034]))
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#define MCF_DMA_TCR13 (*(volatile uint16_t*)(&_MBAR[0x8036]))
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#define MCF_DMA_TCR14 (*(volatile uint16_t*)(&_MBAR[0x8038]))
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#define MCF_DMA_TCR15 (*(volatile uint16_t*)(&_MBAR[0x803A]))
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#define MCF_DMA_PRIOR0 (*(volatile uint8_t *)(&_MBAR[0x803C]))
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#define MCF_DMA_PRIOR1 (*(volatile uint8_t *)(&_MBAR[0x803D]))
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#define MCF_DMA_PRIOR2 (*(volatile uint8_t *)(&_MBAR[0x803E]))
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#define MCF_DMA_PRIOR3 (*(volatile uint8_t *)(&_MBAR[0x803F]))
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#define MCF_DMA_PRIOR4 (*(volatile uint8_t *)(&_MBAR[0x8040]))
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#define MCF_DMA_PRIOR5 (*(volatile uint8_t *)(&_MBAR[0x8041]))
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#define MCF_DMA_PRIOR6 (*(volatile uint8_t *)(&_MBAR[0x8042]))
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#define MCF_DMA_PRIOR7 (*(volatile uint8_t *)(&_MBAR[0x8043]))
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#define MCF_DMA_PRIOR8 (*(volatile uint8_t *)(&_MBAR[0x8044]))
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#define MCF_DMA_PRIOR9 (*(volatile uint8_t *)(&_MBAR[0x8045]))
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#define MCF_DMA_PRIOR10 (*(volatile uint8_t *)(&_MBAR[0x8046]))
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#define MCF_DMA_PRIOR11 (*(volatile uint8_t *)(&_MBAR[0x8047]))
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#define MCF_DMA_PRIOR12 (*(volatile uint8_t *)(&_MBAR[0x8048]))
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#define MCF_DMA_PRIOR13 (*(volatile uint8_t *)(&_MBAR[0x8049]))
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#define MCF_DMA_PRIOR14 (*(volatile uint8_t *)(&_MBAR[0x804A]))
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#define MCF_DMA_PRIOR15 (*(volatile uint8_t *)(&_MBAR[0x804B]))
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#define MCF_DMA_PRIOR16 (*(volatile uint8_t *)(&_MBAR[0x804C]))
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#define MCF_DMA_PRIOR17 (*(volatile uint8_t *)(&_MBAR[0x804D]))
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#define MCF_DMA_PRIOR18 (*(volatile uint8_t *)(&_MBAR[0x804E]))
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#define MCF_DMA_PRIOR19 (*(volatile uint8_t *)(&_MBAR[0x804F]))
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#define MCF_DMA_PRIOR20 (*(volatile uint8_t *)(&_MBAR[0x8050]))
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#define MCF_DMA_PRIOR21 (*(volatile uint8_t *)(&_MBAR[0x8051]))
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#define MCF_DMA_PRIOR22 (*(volatile uint8_t *)(&_MBAR[0x8052]))
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#define MCF_DMA_PRIOR23 (*(volatile uint8_t *)(&_MBAR[0x8053]))
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#define MCF_DMA_PRIOR24 (*(volatile uint8_t *)(&_MBAR[0x8054]))
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#define MCF_DMA_PRIOR25 (*(volatile uint8_t *)(&_MBAR[0x8055]))
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#define MCF_DMA_PRIOR26 (*(volatile uint8_t *)(&_MBAR[0x8056]))
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#define MCF_DMA_PRIOR27 (*(volatile uint8_t *)(&_MBAR[0x8057]))
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#define MCF_DMA_PRIOR28 (*(volatile uint8_t *)(&_MBAR[0x8058]))
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#define MCF_DMA_PRIOR29 (*(volatile uint8_t *)(&_MBAR[0x8059]))
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#define MCF_DMA_PRIOR30 (*(volatile uint8_t *)(&_MBAR[0x805A]))
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#define MCF_DMA_PRIOR31 (*(volatile uint8_t *)(&_MBAR[0x805B]))
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#define MCF_DMA_IMCR (*(volatile uint32_t*)(&_MBAR[0x805C]))
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#define MCF_DMA_TSKSZ0 (*(volatile uint32_t*)(&_MBAR[0x8060]))
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#define MCF_DMA_TSKSZ1 (*(volatile uint32_t*)(&_MBAR[0x8064]))
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#define MCF_DMA_DBGCOMP0 (*(volatile uint32_t*)(&_MBAR[0x8070]))
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#define MCF_DMA_DBGCOMP2 (*(volatile uint32_t*)(&_MBAR[0x8074]))
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#define MCF_DMA_DBGCTL (*(volatile uint32_t*)(&_MBAR[0x8078]))
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#define MCF_DMA_TCR(x) (*(volatile uint16_t*)(&_MBAR[0x801C + ((x)*0x2)]))
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#define MCF_DMA_PRIOR(x) (*(volatile uint8_t *)(&_MBAR[0x803C + ((x)*0x1)]))
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/* Bit definitions and macros for MCF_DMA_TASKBAR */
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@@ -24,31 +24,31 @@
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_DSPI_DMCR (*(volatile uint32_t*)(&__MBAR[0x8A00]))
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#define MCF_DSPI_DTCR (*(volatile uint32_t*)(&__MBAR[0x8A08]))
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#define MCF_DSPI_DCTAR0 (*(volatile uint32_t*)(&__MBAR[0x8A0C]))
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#define MCF_DSPI_DCTAR1 (*(volatile uint32_t*)(&__MBAR[0x8A10]))
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#define MCF_DSPI_DCTAR2 (*(volatile uint32_t*)(&__MBAR[0x8A14]))
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#define MCF_DSPI_DCTAR3 (*(volatile uint32_t*)(&__MBAR[0x8A18]))
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#define MCF_DSPI_DCTAR4 (*(volatile uint32_t*)(&__MBAR[0x8A1C]))
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#define MCF_DSPI_DCTAR5 (*(volatile uint32_t*)(&__MBAR[0x8A20]))
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#define MCF_DSPI_DCTAR6 (*(volatile uint32_t*)(&__MBAR[0x8A24]))
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#define MCF_DSPI_DCTAR7 (*(volatile uint32_t*)(&__MBAR[0x8A28]))
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#define MCF_DSPI_DSR (*(volatile uint32_t*)(&__MBAR[0x8A2C]))
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#define MCF_DSPI_DIRSR (*(volatile uint32_t*)(&__MBAR[0x8A30]))
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#define MCF_DSPI_DTFR (*(volatile uint32_t*)(&__MBAR[0x8A34]))
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#define MCF_DSPI_DRFR (*(volatile uint32_t*)(&__MBAR[0x8A38]))
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#define MCF_DSPI_DTFDR0 (*(volatile uint32_t*)(&__MBAR[0x8A3C]))
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#define MCF_DSPI_DTFDR1 (*(volatile uint32_t*)(&__MBAR[0x8A40]))
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#define MCF_DSPI_DTFDR2 (*(volatile uint32_t*)(&__MBAR[0x8A44]))
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#define MCF_DSPI_DTFDR3 (*(volatile uint32_t*)(&__MBAR[0x8A48]))
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#define MCF_DSPI_DRFDR0 (*(volatile uint32_t*)(&__MBAR[0x8A7C]))
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#define MCF_DSPI_DRFDR1 (*(volatile uint32_t*)(&__MBAR[0x8A80]))
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#define MCF_DSPI_DRFDR2 (*(volatile uint32_t*)(&__MBAR[0x8A84]))
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#define MCF_DSPI_DRFDR3 (*(volatile uint32_t*)(&__MBAR[0x8A88]))
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#define MCF_DSPI_DCTAR(x) (*(volatile uint32_t*)(&__MBAR[0x8A0C + ((x)*0x4)]))
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#define MCF_DSPI_DTFDR(x) (*(volatile uint32_t*)(&__MBAR[0x8A3C + ((x)*0x4)]))
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#define MCF_DSPI_DRFDR(x) (*(volatile uint32_t*)(&__MBAR[0x8A7C + ((x)*0x4)]))
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#define MCF_DSPI_DMCR (*(volatile uint32_t*)(&_MBAR[0x8A00]))
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#define MCF_DSPI_DTCR (*(volatile uint32_t*)(&_MBAR[0x8A08]))
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#define MCF_DSPI_DCTAR0 (*(volatile uint32_t*)(&_MBAR[0x8A0C]))
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#define MCF_DSPI_DCTAR1 (*(volatile uint32_t*)(&_MBAR[0x8A10]))
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#define MCF_DSPI_DCTAR2 (*(volatile uint32_t*)(&_MBAR[0x8A14]))
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#define MCF_DSPI_DCTAR3 (*(volatile uint32_t*)(&_MBAR[0x8A18]))
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#define MCF_DSPI_DCTAR4 (*(volatile uint32_t*)(&_MBAR[0x8A1C]))
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#define MCF_DSPI_DCTAR5 (*(volatile uint32_t*)(&_MBAR[0x8A20]))
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#define MCF_DSPI_DCTAR6 (*(volatile uint32_t*)(&_MBAR[0x8A24]))
|
||||
#define MCF_DSPI_DCTAR7 (*(volatile uint32_t*)(&_MBAR[0x8A28]))
|
||||
#define MCF_DSPI_DSR (*(volatile uint32_t*)(&_MBAR[0x8A2C]))
|
||||
#define MCF_DSPI_DIRSR (*(volatile uint32_t*)(&_MBAR[0x8A30]))
|
||||
#define MCF_DSPI_DTFR (*(volatile uint32_t*)(&_MBAR[0x8A34]))
|
||||
#define MCF_DSPI_DRFR (*(volatile uint32_t*)(&_MBAR[0x8A38]))
|
||||
#define MCF_DSPI_DTFDR0 (*(volatile uint32_t*)(&_MBAR[0x8A3C]))
|
||||
#define MCF_DSPI_DTFDR1 (*(volatile uint32_t*)(&_MBAR[0x8A40]))
|
||||
#define MCF_DSPI_DTFDR2 (*(volatile uint32_t*)(&_MBAR[0x8A44]))
|
||||
#define MCF_DSPI_DTFDR3 (*(volatile uint32_t*)(&_MBAR[0x8A48]))
|
||||
#define MCF_DSPI_DRFDR0 (*(volatile uint32_t*)(&_MBAR[0x8A7C]))
|
||||
#define MCF_DSPI_DRFDR1 (*(volatile uint32_t*)(&_MBAR[0x8A80]))
|
||||
#define MCF_DSPI_DRFDR2 (*(volatile uint32_t*)(&_MBAR[0x8A84]))
|
||||
#define MCF_DSPI_DRFDR3 (*(volatile uint32_t*)(&_MBAR[0x8A88]))
|
||||
#define MCF_DSPI_DCTAR(x) (*(volatile uint32_t*)(&_MBAR[0x8A0C + ((x)*0x4)]))
|
||||
#define MCF_DSPI_DTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8A3C + ((x)*0x4)]))
|
||||
#define MCF_DSPI_DRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8A7C + ((x)*0x4)]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_DSPI_DMCR */
|
||||
|
||||
@@ -24,12 +24,12 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_EPORT_EPPAR (*(volatile uint16_t*)(&__MBAR[0xF00]))
|
||||
#define MCF_EPORT_EPDDR (*(volatile uint8_t *)(&__MBAR[0xF04]))
|
||||
#define MCF_EPORT_EPIER (*(volatile uint8_t *)(&__MBAR[0xF05]))
|
||||
#define MCF_EPORT_EPDR (*(volatile uint8_t *)(&__MBAR[0xF08]))
|
||||
#define MCF_EPORT_EPPDR (*(volatile uint8_t *)(&__MBAR[0xF09]))
|
||||
#define MCF_EPORT_EPFR (*(volatile uint8_t *)(&__MBAR[0xF0C]))
|
||||
#define MCF_EPORT_EPPAR (*(volatile uint16_t*)(&_MBAR[0xF00]))
|
||||
#define MCF_EPORT_EPDDR (*(volatile uint8_t *)(&_MBAR[0xF04]))
|
||||
#define MCF_EPORT_EPIER (*(volatile uint8_t *)(&_MBAR[0xF05]))
|
||||
#define MCF_EPORT_EPDR (*(volatile uint8_t *)(&_MBAR[0xF08]))
|
||||
#define MCF_EPORT_EPPDR (*(volatile uint8_t *)(&_MBAR[0xF09]))
|
||||
#define MCF_EPORT_EPFR (*(volatile uint8_t *)(&_MBAR[0xF0C]))
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -24,33 +24,33 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_FBCS0_CSAR (*(volatile uint32_t*)(&__MBAR[0x500]))
|
||||
#define MCF_FBCS0_CSMR (*(volatile uint32_t*)(&__MBAR[0x504]))
|
||||
#define MCF_FBCS0_CSCR (*(volatile uint32_t*)(&__MBAR[0x508]))
|
||||
#define MCF_FBCS0_CSAR (*(volatile uint32_t*)(&_MBAR[0x500]))
|
||||
#define MCF_FBCS0_CSMR (*(volatile uint32_t*)(&_MBAR[0x504]))
|
||||
#define MCF_FBCS0_CSCR (*(volatile uint32_t*)(&_MBAR[0x508]))
|
||||
|
||||
#define MCF_FBCS1_CSAR (*(volatile uint32_t*)(&__MBAR[0x50C]))
|
||||
#define MCF_FBCS1_CSMR (*(volatile uint32_t*)(&__MBAR[0x510]))
|
||||
#define MCF_FBCS1_CSCR (*(volatile uint32_t*)(&__MBAR[0x514]))
|
||||
#define MCF_FBCS1_CSAR (*(volatile uint32_t*)(&_MBAR[0x50C]))
|
||||
#define MCF_FBCS1_CSMR (*(volatile uint32_t*)(&_MBAR[0x510]))
|
||||
#define MCF_FBCS1_CSCR (*(volatile uint32_t*)(&_MBAR[0x514]))
|
||||
|
||||
#define MCF_FBCS2_CSAR (*(volatile uint32_t*)(&__MBAR[0x518]))
|
||||
#define MCF_FBCS2_CSMR (*(volatile uint32_t*)(&__MBAR[0x51C]))
|
||||
#define MCF_FBCS2_CSCR (*(volatile uint32_t*)(&__MBAR[0x520]))
|
||||
#define MCF_FBCS2_CSAR (*(volatile uint32_t*)(&_MBAR[0x518]))
|
||||
#define MCF_FBCS2_CSMR (*(volatile uint32_t*)(&_MBAR[0x51C]))
|
||||
#define MCF_FBCS2_CSCR (*(volatile uint32_t*)(&_MBAR[0x520]))
|
||||
|
||||
#define MCF_FBCS3_CSAR (*(volatile uint32_t*)(&__MBAR[0x524]))
|
||||
#define MCF_FBCS3_CSMR (*(volatile uint32_t*)(&__MBAR[0x528]))
|
||||
#define MCF_FBCS3_CSCR (*(volatile uint32_t*)(&__MBAR[0x52C]))
|
||||
#define MCF_FBCS3_CSAR (*(volatile uint32_t*)(&_MBAR[0x524]))
|
||||
#define MCF_FBCS3_CSMR (*(volatile uint32_t*)(&_MBAR[0x528]))
|
||||
#define MCF_FBCS3_CSCR (*(volatile uint32_t*)(&_MBAR[0x52C]))
|
||||
|
||||
#define MCF_FBCS4_CSAR (*(volatile uint32_t*)(&__MBAR[0x530]))
|
||||
#define MCF_FBCS4_CSMR (*(volatile uint32_t*)(&__MBAR[0x534]))
|
||||
#define MCF_FBCS4_CSCR (*(volatile uint32_t*)(&__MBAR[0x538]))
|
||||
#define MCF_FBCS4_CSAR (*(volatile uint32_t*)(&_MBAR[0x530]))
|
||||
#define MCF_FBCS4_CSMR (*(volatile uint32_t*)(&_MBAR[0x534]))
|
||||
#define MCF_FBCS4_CSCR (*(volatile uint32_t*)(&_MBAR[0x538]))
|
||||
|
||||
#define MCF_FBCS5_CSAR (*(volatile uint32_t*)(&__MBAR[0x53C]))
|
||||
#define MCF_FBCS5_CSMR (*(volatile uint32_t*)(&__MBAR[0x540]))
|
||||
#define MCF_FBCS5_CSCR (*(volatile uint32_t*)(&__MBAR[0x544]))
|
||||
#define MCF_FBCS5_CSAR (*(volatile uint32_t*)(&_MBAR[0x53C]))
|
||||
#define MCF_FBCS5_CSMR (*(volatile uint32_t*)(&_MBAR[0x540]))
|
||||
#define MCF_FBCS5_CSCR (*(volatile uint32_t*)(&_MBAR[0x544]))
|
||||
|
||||
#define MCF_FBCS_CSAR(x) (*(volatile uint32_t*)(&__MBAR[0x500 + ((x)*0xC)]))
|
||||
#define MCF_FBCS_CSMR(x) (*(volatile uint32_t*)(&__MBAR[0x504 + ((x)*0xC)]))
|
||||
#define MCF_FBCS_CSCR(x) (*(volatile uint32_t*)(&__MBAR[0x508 + ((x)*0xC)]))
|
||||
#define MCF_FBCS_CSAR(x) (*(volatile uint32_t*)(&_MBAR[0x500 + ((x)*0xC)]))
|
||||
#define MCF_FBCS_CSMR(x) (*(volatile uint32_t*)(&_MBAR[0x504 + ((x)*0xC)]))
|
||||
#define MCF_FBCS_CSCR(x) (*(volatile uint32_t*)(&_MBAR[0x508 + ((x)*0xC)]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_FBCS_CSAR */
|
||||
|
||||
@@ -24,278 +24,278 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_FEC0_EIR (*(volatile uint32_t*)(&__MBAR[0x9004]))
|
||||
#define MCF_FEC0_EIMR (*(volatile uint32_t*)(&__MBAR[0x9008]))
|
||||
#define MCF_FEC0_ECR (*(volatile uint32_t*)(&__MBAR[0x9024]))
|
||||
#define MCF_FEC0_MMFR (*(volatile uint32_t*)(&__MBAR[0x9040]))
|
||||
#define MCF_FEC0_MSCR (*(volatile uint32_t*)(&__MBAR[0x9044]))
|
||||
#define MCF_FEC0_MIBC (*(volatile uint32_t*)(&__MBAR[0x9064]))
|
||||
#define MCF_FEC0_RCR (*(volatile uint32_t*)(&__MBAR[0x9084]))
|
||||
#define MCF_FEC0_RHR (*(volatile uint32_t*)(&__MBAR[0x9088]))
|
||||
#define MCF_FEC0_TCR (*(volatile uint32_t*)(&__MBAR[0x90C4]))
|
||||
#define MCF_FEC0_PALR (*(volatile uint32_t*)(&__MBAR[0x90E4]))
|
||||
#define MCF_FEC0_PAHR (*(volatile uint32_t*)(&__MBAR[0x90E8]))
|
||||
#define MCF_FEC0_OPD (*(volatile uint32_t*)(&__MBAR[0x90EC]))
|
||||
#define MCF_FEC0_IAUR (*(volatile uint32_t*)(&__MBAR[0x9118]))
|
||||
#define MCF_FEC0_IALR (*(volatile uint32_t*)(&__MBAR[0x911C]))
|
||||
#define MCF_FEC0_GAUR (*(volatile uint32_t*)(&__MBAR[0x9120]))
|
||||
#define MCF_FEC0_GALR (*(volatile uint32_t*)(&__MBAR[0x9124]))
|
||||
#define MCF_FEC0_FECTFWR (*(volatile uint32_t*)(&__MBAR[0x9144]))
|
||||
#define MCF_FEC0_FECRFDR (*(volatile uint32_t*)(&__MBAR[0x9184]))
|
||||
#define MCF_FEC0_FECRFSR (*(volatile uint32_t*)(&__MBAR[0x9188]))
|
||||
#define MCF_FEC0_FECRFCR (*(volatile uint32_t*)(&__MBAR[0x918C]))
|
||||
#define MCF_FEC0_FECRLRFP (*(volatile uint32_t*)(&__MBAR[0x9190]))
|
||||
#define MCF_FEC0_FECRLWFP (*(volatile uint32_t*)(&__MBAR[0x9194]))
|
||||
#define MCF_FEC0_FECRFAR (*(volatile uint32_t*)(&__MBAR[0x9198]))
|
||||
#define MCF_FEC0_FECRFRP (*(volatile uint32_t*)(&__MBAR[0x919C]))
|
||||
#define MCF_FEC0_FECRFWP (*(volatile uint32_t*)(&__MBAR[0x91A0]))
|
||||
#define MCF_FEC0_FECTFDR (*(volatile uint32_t*)(&__MBAR[0x91A4]))
|
||||
#define MCF_FEC0_FECTFSR (*(volatile uint32_t*)(&__MBAR[0x91A8]))
|
||||
#define MCF_FEC0_FECTFCR (*(volatile uint32_t*)(&__MBAR[0x91AC]))
|
||||
#define MCF_FEC0_FECTLRFP (*(volatile uint32_t*)(&__MBAR[0x91B0]))
|
||||
#define MCF_FEC0_FECTLWFP (*(volatile uint32_t*)(&__MBAR[0x91B4]))
|
||||
#define MCF_FEC0_FECTFAR (*(volatile uint32_t*)(&__MBAR[0x91B8]))
|
||||
#define MCF_FEC0_FECTFRP (*(volatile uint32_t*)(&__MBAR[0x91BC]))
|
||||
#define MCF_FEC0_FECTFWP (*(volatile uint32_t*)(&__MBAR[0x91C0]))
|
||||
#define MCF_FEC0_FECFRST (*(volatile uint32_t*)(&__MBAR[0x91C4]))
|
||||
#define MCF_FEC0_FECCTCWR (*(volatile uint32_t*)(&__MBAR[0x91C8]))
|
||||
#define MCF_FEC0_RMON_T_DROP (*(volatile uint32_t*)(&__MBAR[0x9200]))
|
||||
#define MCF_FEC0_RMON_T_PACKETS (*(volatile uint32_t*)(&__MBAR[0x9204]))
|
||||
#define MCF_FEC0_RMON_T_BC_PKT (*(volatile uint32_t*)(&__MBAR[0x9208]))
|
||||
#define MCF_FEC0_RMON_T_MC_PKT (*(volatile uint32_t*)(&__MBAR[0x920C]))
|
||||
#define MCF_FEC0_RMON_T_CRC_ALIGN (*(volatile uint32_t*)(&__MBAR[0x9210]))
|
||||
#define MCF_FEC0_RMON_T_UNDERSIZE (*(volatile uint32_t*)(&__MBAR[0x9214]))
|
||||
#define MCF_FEC0_RMON_T_OVERSIZE (*(volatile uint32_t*)(&__MBAR[0x9218]))
|
||||
#define MCF_FEC0_RMON_T_FRAG (*(volatile uint32_t*)(&__MBAR[0x921C]))
|
||||
#define MCF_FEC0_RMON_T_JAB (*(volatile uint32_t*)(&__MBAR[0x9220]))
|
||||
#define MCF_FEC0_RMON_T_COL (*(volatile uint32_t*)(&__MBAR[0x9224]))
|
||||
#define MCF_FEC0_RMON_T_P64 (*(volatile uint32_t*)(&__MBAR[0x9228]))
|
||||
#define MCF_FEC0_RMON_T_P65TO127 (*(volatile uint32_t*)(&__MBAR[0x922C]))
|
||||
#define MCF_FEC0_RMON_T_P128TO255 (*(volatile uint32_t*)(&__MBAR[0x9230]))
|
||||
#define MCF_FEC0_RMON_T_P256TO511 (*(volatile uint32_t*)(&__MBAR[0x9234]))
|
||||
#define MCF_FEC0_RMON_T_P512TO1023 (*(volatile uint32_t*)(&__MBAR[0x9238]))
|
||||
#define MCF_FEC0_RMON_T_P1024TO2047 (*(volatile uint32_t*)(&__MBAR[0x923C]))
|
||||
#define MCF_FEC0_RMON_T_P_GTE2048 (*(volatile uint32_t*)(&__MBAR[0x9240]))
|
||||
#define MCF_FEC0_RMON_T_OCTETS (*(volatile uint32_t*)(&__MBAR[0x9244]))
|
||||
#define MCF_FEC0_IEEE_T_DROP (*(volatile uint32_t*)(&__MBAR[0x9248]))
|
||||
#define MCF_FEC0_IEEE_T_FRAME_OK (*(volatile uint32_t*)(&__MBAR[0x924C]))
|
||||
#define MCF_FEC0_IEEE_T_1COL (*(volatile uint32_t*)(&__MBAR[0x9250]))
|
||||
#define MCF_FEC0_IEEE_T_MCOL (*(volatile uint32_t*)(&__MBAR[0x9254]))
|
||||
#define MCF_FEC0_IEEE_T_DEF (*(volatile uint32_t*)(&__MBAR[0x9258]))
|
||||
#define MCF_FEC0_IEEE_T_LCOL (*(volatile uint32_t*)(&__MBAR[0x925C]))
|
||||
#define MCF_FEC0_IEEE_T_EXCOL (*(volatile uint32_t*)(&__MBAR[0x9260]))
|
||||
#define MCF_FEC0_IEEE_T_MACERR (*(volatile uint32_t*)(&__MBAR[0x9264]))
|
||||
#define MCF_FEC0_IEEE_T_CSERR (*(volatile uint32_t*)(&__MBAR[0x9268]))
|
||||
#define MCF_FEC0_IEEE_T_SQE (*(volatile uint32_t*)(&__MBAR[0x926C]))
|
||||
#define MCF_FEC0_IEEE_T_FDXFC (*(volatile uint32_t*)(&__MBAR[0x9270]))
|
||||
#define MCF_FEC0_IEEE_T_OCTETS_OK (*(volatile uint32_t*)(&__MBAR[0x9274]))
|
||||
#define MCF_FEC0_RMON_R_DROP (*(volatile uint32_t*)(&__MBAR[0x9280]))
|
||||
#define MCF_FEC0_RMON_R_PACKETS (*(volatile uint32_t*)(&__MBAR[0x9284]))
|
||||
#define MCF_FEC0_RMON_R_BC_PKT (*(volatile uint32_t*)(&__MBAR[0x9288]))
|
||||
#define MCF_FEC0_RMON_R_MC_PKT (*(volatile uint32_t*)(&__MBAR[0x928C]))
|
||||
#define MCF_FEC0_RMON_R_CRC_ALIGN (*(volatile uint32_t*)(&__MBAR[0x9290]))
|
||||
#define MCF_FEC0_RMON_R_UNDERSIZE (*(volatile uint32_t*)(&__MBAR[0x9294]))
|
||||
#define MCF_FEC0_RMON_R_OVERSIZE (*(volatile uint32_t*)(&__MBAR[0x9298]))
|
||||
#define MCF_FEC0_RMON_R_FRAG (*(volatile uint32_t*)(&__MBAR[0x929C]))
|
||||
#define MCF_FEC0_RMON_R_JAB (*(volatile uint32_t*)(&__MBAR[0x92A0]))
|
||||
#define MCF_FEC0_RMON_R_RESVD_0 (*(volatile uint32_t*)(&__MBAR[0x92A4]))
|
||||
#define MCF_FEC0_RMON_R_P64 (*(volatile uint32_t*)(&__MBAR[0x92A8]))
|
||||
#define MCF_FEC0_RMON_R_P65TO127 (*(volatile uint32_t*)(&__MBAR[0x92AC]))
|
||||
#define MCF_FEC0_RMON_R_P128TO255 (*(volatile uint32_t*)(&__MBAR[0x92B0]))
|
||||
#define MCF_FEC0_RMON_R_P256TO511 (*(volatile uint32_t*)(&__MBAR[0x92B4]))
|
||||
#define MCF_FEC0_RMON_R_P512TO1023 (*(volatile uint32_t*)(&__MBAR[0x92B8]))
|
||||
#define MCF_FEC0_RMON_R_P1024TO2047 (*(volatile uint32_t*)(&__MBAR[0x92BC]))
|
||||
#define MCF_FEC0_RMON_R_P_GTE2048 (*(volatile uint32_t*)(&__MBAR[0x92C0]))
|
||||
#define MCF_FEC0_RMON_R_OCTETS (*(volatile uint32_t*)(&__MBAR[0x92C4]))
|
||||
#define MCF_FEC0_IEEE_R_DROP (*(volatile uint32_t*)(&__MBAR[0x92C8]))
|
||||
#define MCF_FEC0_IEEE_R_FRAME_OK (*(volatile uint32_t*)(&__MBAR[0x92CC]))
|
||||
#define MCF_FEC0_IEEE_R_CRC (*(volatile uint32_t*)(&__MBAR[0x92D0]))
|
||||
#define MCF_FEC0_IEEE_R_ALIGN (*(volatile uint32_t*)(&__MBAR[0x92D4]))
|
||||
#define MCF_FEC0_IEEE_R_MACERR (*(volatile uint32_t*)(&__MBAR[0x92D8]))
|
||||
#define MCF_FEC0_IEEE_R_FDXFC (*(volatile uint32_t*)(&__MBAR[0x92DC]))
|
||||
#define MCF_FEC0_IEEE_R_OCTETS_OK (*(volatile uint32_t*)(&__MBAR[0x92E0]))
|
||||
#define MCF_FEC0_EIR (*(volatile uint32_t*)(&_MBAR[0x9004]))
|
||||
#define MCF_FEC0_EIMR (*(volatile uint32_t*)(&_MBAR[0x9008]))
|
||||
#define MCF_FEC0_ECR (*(volatile uint32_t*)(&_MBAR[0x9024]))
|
||||
#define MCF_FEC0_MMFR (*(volatile uint32_t*)(&_MBAR[0x9040]))
|
||||
#define MCF_FEC0_MSCR (*(volatile uint32_t*)(&_MBAR[0x9044]))
|
||||
#define MCF_FEC0_MIBC (*(volatile uint32_t*)(&_MBAR[0x9064]))
|
||||
#define MCF_FEC0_RCR (*(volatile uint32_t*)(&_MBAR[0x9084]))
|
||||
#define MCF_FEC0_RHR (*(volatile uint32_t*)(&_MBAR[0x9088]))
|
||||
#define MCF_FEC0_TCR (*(volatile uint32_t*)(&_MBAR[0x90C4]))
|
||||
#define MCF_FEC0_PALR (*(volatile uint32_t*)(&_MBAR[0x90E4]))
|
||||
#define MCF_FEC0_PAHR (*(volatile uint32_t*)(&_MBAR[0x90E8]))
|
||||
#define MCF_FEC0_OPD (*(volatile uint32_t*)(&_MBAR[0x90EC]))
|
||||
#define MCF_FEC0_IAUR (*(volatile uint32_t*)(&_MBAR[0x9118]))
|
||||
#define MCF_FEC0_IALR (*(volatile uint32_t*)(&_MBAR[0x911C]))
|
||||
#define MCF_FEC0_GAUR (*(volatile uint32_t*)(&_MBAR[0x9120]))
|
||||
#define MCF_FEC0_GALR (*(volatile uint32_t*)(&_MBAR[0x9124]))
|
||||
#define MCF_FEC0_FECTFWR (*(volatile uint32_t*)(&_MBAR[0x9144]))
|
||||
#define MCF_FEC0_FECRFDR (*(volatile uint32_t*)(&_MBAR[0x9184]))
|
||||
#define MCF_FEC0_FECRFSR (*(volatile uint32_t*)(&_MBAR[0x9188]))
|
||||
#define MCF_FEC0_FECRFCR (*(volatile uint32_t*)(&_MBAR[0x918C]))
|
||||
#define MCF_FEC0_FECRLRFP (*(volatile uint32_t*)(&_MBAR[0x9190]))
|
||||
#define MCF_FEC0_FECRLWFP (*(volatile uint32_t*)(&_MBAR[0x9194]))
|
||||
#define MCF_FEC0_FECRFAR (*(volatile uint32_t*)(&_MBAR[0x9198]))
|
||||
#define MCF_FEC0_FECRFRP (*(volatile uint32_t*)(&_MBAR[0x919C]))
|
||||
#define MCF_FEC0_FECRFWP (*(volatile uint32_t*)(&_MBAR[0x91A0]))
|
||||
#define MCF_FEC0_FECTFDR (*(volatile uint32_t*)(&_MBAR[0x91A4]))
|
||||
#define MCF_FEC0_FECTFSR (*(volatile uint32_t*)(&_MBAR[0x91A8]))
|
||||
#define MCF_FEC0_FECTFCR (*(volatile uint32_t*)(&_MBAR[0x91AC]))
|
||||
#define MCF_FEC0_FECTLRFP (*(volatile uint32_t*)(&_MBAR[0x91B0]))
|
||||
#define MCF_FEC0_FECTLWFP (*(volatile uint32_t*)(&_MBAR[0x91B4]))
|
||||
#define MCF_FEC0_FECTFAR (*(volatile uint32_t*)(&_MBAR[0x91B8]))
|
||||
#define MCF_FEC0_FECTFRP (*(volatile uint32_t*)(&_MBAR[0x91BC]))
|
||||
#define MCF_FEC0_FECTFWP (*(volatile uint32_t*)(&_MBAR[0x91C0]))
|
||||
#define MCF_FEC0_FECFRST (*(volatile uint32_t*)(&_MBAR[0x91C4]))
|
||||
#define MCF_FEC0_FECCTCWR (*(volatile uint32_t*)(&_MBAR[0x91C8]))
|
||||
#define MCF_FEC0_RMON_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9200]))
|
||||
#define MCF_FEC0_RMON_T_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9204]))
|
||||
#define MCF_FEC0_RMON_T_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9208]))
|
||||
#define MCF_FEC0_RMON_T_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x920C]))
|
||||
#define MCF_FEC0_RMON_T_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9210]))
|
||||
#define MCF_FEC0_RMON_T_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9214]))
|
||||
#define MCF_FEC0_RMON_T_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9218]))
|
||||
#define MCF_FEC0_RMON_T_FRAG (*(volatile uint32_t*)(&_MBAR[0x921C]))
|
||||
#define MCF_FEC0_RMON_T_JAB (*(volatile uint32_t*)(&_MBAR[0x9220]))
|
||||
#define MCF_FEC0_RMON_T_COL (*(volatile uint32_t*)(&_MBAR[0x9224]))
|
||||
#define MCF_FEC0_RMON_T_P64 (*(volatile uint32_t*)(&_MBAR[0x9228]))
|
||||
#define MCF_FEC0_RMON_T_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x922C]))
|
||||
#define MCF_FEC0_RMON_T_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9230]))
|
||||
#define MCF_FEC0_RMON_T_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9234]))
|
||||
#define MCF_FEC0_RMON_T_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9238]))
|
||||
#define MCF_FEC0_RMON_T_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x923C]))
|
||||
#define MCF_FEC0_RMON_T_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9240]))
|
||||
#define MCF_FEC0_RMON_T_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9244]))
|
||||
#define MCF_FEC0_IEEE_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9248]))
|
||||
#define MCF_FEC0_IEEE_T_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x924C]))
|
||||
#define MCF_FEC0_IEEE_T_1COL (*(volatile uint32_t*)(&_MBAR[0x9250]))
|
||||
#define MCF_FEC0_IEEE_T_MCOL (*(volatile uint32_t*)(&_MBAR[0x9254]))
|
||||
#define MCF_FEC0_IEEE_T_DEF (*(volatile uint32_t*)(&_MBAR[0x9258]))
|
||||
#define MCF_FEC0_IEEE_T_LCOL (*(volatile uint32_t*)(&_MBAR[0x925C]))
|
||||
#define MCF_FEC0_IEEE_T_EXCOL (*(volatile uint32_t*)(&_MBAR[0x9260]))
|
||||
#define MCF_FEC0_IEEE_T_MACERR (*(volatile uint32_t*)(&_MBAR[0x9264]))
|
||||
#define MCF_FEC0_IEEE_T_CSERR (*(volatile uint32_t*)(&_MBAR[0x9268]))
|
||||
#define MCF_FEC0_IEEE_T_SQE (*(volatile uint32_t*)(&_MBAR[0x926C]))
|
||||
#define MCF_FEC0_IEEE_T_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9270]))
|
||||
#define MCF_FEC0_IEEE_T_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9274]))
|
||||
#define MCF_FEC0_RMON_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9280]))
|
||||
#define MCF_FEC0_RMON_R_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9284]))
|
||||
#define MCF_FEC0_RMON_R_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9288]))
|
||||
#define MCF_FEC0_RMON_R_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x928C]))
|
||||
#define MCF_FEC0_RMON_R_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9290]))
|
||||
#define MCF_FEC0_RMON_R_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9294]))
|
||||
#define MCF_FEC0_RMON_R_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9298]))
|
||||
#define MCF_FEC0_RMON_R_FRAG (*(volatile uint32_t*)(&_MBAR[0x929C]))
|
||||
#define MCF_FEC0_RMON_R_JAB (*(volatile uint32_t*)(&_MBAR[0x92A0]))
|
||||
#define MCF_FEC0_RMON_R_RESVD_0 (*(volatile uint32_t*)(&_MBAR[0x92A4]))
|
||||
#define MCF_FEC0_RMON_R_P64 (*(volatile uint32_t*)(&_MBAR[0x92A8]))
|
||||
#define MCF_FEC0_RMON_R_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x92AC]))
|
||||
#define MCF_FEC0_RMON_R_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x92B0]))
|
||||
#define MCF_FEC0_RMON_R_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x92B4]))
|
||||
#define MCF_FEC0_RMON_R_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x92B8]))
|
||||
#define MCF_FEC0_RMON_R_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x92BC]))
|
||||
#define MCF_FEC0_RMON_R_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x92C0]))
|
||||
#define MCF_FEC0_RMON_R_OCTETS (*(volatile uint32_t*)(&_MBAR[0x92C4]))
|
||||
#define MCF_FEC0_IEEE_R_DROP (*(volatile uint32_t*)(&_MBAR[0x92C8]))
|
||||
#define MCF_FEC0_IEEE_R_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x92CC]))
|
||||
#define MCF_FEC0_IEEE_R_CRC (*(volatile uint32_t*)(&_MBAR[0x92D0]))
|
||||
#define MCF_FEC0_IEEE_R_ALIGN (*(volatile uint32_t*)(&_MBAR[0x92D4]))
|
||||
#define MCF_FEC0_IEEE_R_MACERR (*(volatile uint32_t*)(&_MBAR[0x92D8]))
|
||||
#define MCF_FEC0_IEEE_R_FDXFC (*(volatile uint32_t*)(&_MBAR[0x92DC]))
|
||||
#define MCF_FEC0_IEEE_R_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x92E0]))
|
||||
|
||||
#define MCF_FEC1_EIR (*(volatile uint32_t*)(&__MBAR[0x9804]))
|
||||
#define MCF_FEC1_EIMR (*(volatile uint32_t*)(&__MBAR[0x9808]))
|
||||
#define MCF_FEC1_ECR (*(volatile uint32_t*)(&__MBAR[0x9824]))
|
||||
#define MCF_FEC1_MMFR (*(volatile uint32_t*)(&__MBAR[0x9840]))
|
||||
#define MCF_FEC1_MSCR (*(volatile uint32_t*)(&__MBAR[0x9844]))
|
||||
#define MCF_FEC1_MIBC (*(volatile uint32_t*)(&__MBAR[0x9864]))
|
||||
#define MCF_FEC1_RCR (*(volatile uint32_t*)(&__MBAR[0x9884]))
|
||||
#define MCF_FEC1_RHR (*(volatile uint32_t*)(&__MBAR[0x9888]))
|
||||
#define MCF_FEC1_TCR (*(volatile uint32_t*)(&__MBAR[0x98C4]))
|
||||
#define MCF_FEC1_PALR (*(volatile uint32_t*)(&__MBAR[0x98E4]))
|
||||
#define MCF_FEC1_PAHR (*(volatile uint32_t*)(&__MBAR[0x98E8]))
|
||||
#define MCF_FEC1_OPD (*(volatile uint32_t*)(&__MBAR[0x98EC]))
|
||||
#define MCF_FEC1_IAUR (*(volatile uint32_t*)(&__MBAR[0x9918]))
|
||||
#define MCF_FEC1_IALR (*(volatile uint32_t*)(&__MBAR[0x991C]))
|
||||
#define MCF_FEC1_GAUR (*(volatile uint32_t*)(&__MBAR[0x9920]))
|
||||
#define MCF_FEC1_GALR (*(volatile uint32_t*)(&__MBAR[0x9924]))
|
||||
#define MCF_FEC1_FECTFWR (*(volatile uint32_t*)(&__MBAR[0x9944]))
|
||||
#define MCF_FEC1_FECRFDR (*(volatile uint32_t*)(&__MBAR[0x9984]))
|
||||
#define MCF_FEC1_FECRFSR (*(volatile uint32_t*)(&__MBAR[0x9988]))
|
||||
#define MCF_FEC1_FECRFCR (*(volatile uint32_t*)(&__MBAR[0x998C]))
|
||||
#define MCF_FEC1_FECRLRFP (*(volatile uint32_t*)(&__MBAR[0x9990]))
|
||||
#define MCF_FEC1_FECRLWFP (*(volatile uint32_t*)(&__MBAR[0x9994]))
|
||||
#define MCF_FEC1_FECRFAR (*(volatile uint32_t*)(&__MBAR[0x9998]))
|
||||
#define MCF_FEC1_FECRFRP (*(volatile uint32_t*)(&__MBAR[0x999C]))
|
||||
#define MCF_FEC1_FECRFWP (*(volatile uint32_t*)(&__MBAR[0x99A0]))
|
||||
#define MCF_FEC1_FECTFDR (*(volatile uint32_t*)(&__MBAR[0x99A4]))
|
||||
#define MCF_FEC1_FECTFSR (*(volatile uint32_t*)(&__MBAR[0x99A8]))
|
||||
#define MCF_FEC1_FECTFCR (*(volatile uint32_t*)(&__MBAR[0x99AC]))
|
||||
#define MCF_FEC1_FECTLRFP (*(volatile uint32_t*)(&__MBAR[0x99B0]))
|
||||
#define MCF_FEC1_FECTLWFP (*(volatile uint32_t*)(&__MBAR[0x99B4]))
|
||||
#define MCF_FEC1_FECTFAR (*(volatile uint32_t*)(&__MBAR[0x99B8]))
|
||||
#define MCF_FEC1_FECTFRP (*(volatile uint32_t*)(&__MBAR[0x99BC]))
|
||||
#define MCF_FEC1_FECTFWP (*(volatile uint32_t*)(&__MBAR[0x99C0]))
|
||||
#define MCF_FEC1_FECFRST (*(volatile uint32_t*)(&__MBAR[0x99C4]))
|
||||
#define MCF_FEC1_FECCTCWR (*(volatile uint32_t*)(&__MBAR[0x99C8]))
|
||||
#define MCF_FEC1_RMON_T_DROP (*(volatile uint32_t*)(&__MBAR[0x9A00]))
|
||||
#define MCF_FEC1_RMON_T_PACKETS (*(volatile uint32_t*)(&__MBAR[0x9A04]))
|
||||
#define MCF_FEC1_RMON_T_BC_PKT (*(volatile uint32_t*)(&__MBAR[0x9A08]))
|
||||
#define MCF_FEC1_RMON_T_MC_PKT (*(volatile uint32_t*)(&__MBAR[0x9A0C]))
|
||||
#define MCF_FEC1_RMON_T_CRC_ALIGN (*(volatile uint32_t*)(&__MBAR[0x9A10]))
|
||||
#define MCF_FEC1_RMON_T_UNDERSIZE (*(volatile uint32_t*)(&__MBAR[0x9A14]))
|
||||
#define MCF_FEC1_RMON_T_OVERSIZE (*(volatile uint32_t*)(&__MBAR[0x9A18]))
|
||||
#define MCF_FEC1_RMON_T_FRAG (*(volatile uint32_t*)(&__MBAR[0x9A1C]))
|
||||
#define MCF_FEC1_RMON_T_JAB (*(volatile uint32_t*)(&__MBAR[0x9A20]))
|
||||
#define MCF_FEC1_RMON_T_COL (*(volatile uint32_t*)(&__MBAR[0x9A24]))
|
||||
#define MCF_FEC1_RMON_T_P64 (*(volatile uint32_t*)(&__MBAR[0x9A28]))
|
||||
#define MCF_FEC1_RMON_T_P65TO127 (*(volatile uint32_t*)(&__MBAR[0x9A2C]))
|
||||
#define MCF_FEC1_RMON_T_P128TO255 (*(volatile uint32_t*)(&__MBAR[0x9A30]))
|
||||
#define MCF_FEC1_RMON_T_P256TO511 (*(volatile uint32_t*)(&__MBAR[0x9A34]))
|
||||
#define MCF_FEC1_RMON_T_P512TO1023 (*(volatile uint32_t*)(&__MBAR[0x9A38]))
|
||||
#define MCF_FEC1_RMON_T_P1024TO2047 (*(volatile uint32_t*)(&__MBAR[0x9A3C]))
|
||||
#define MCF_FEC1_RMON_T_P_GTE2048 (*(volatile uint32_t*)(&__MBAR[0x9A40]))
|
||||
#define MCF_FEC1_RMON_T_OCTETS (*(volatile uint32_t*)(&__MBAR[0x9A44]))
|
||||
#define MCF_FEC1_IEEE_T_DROP (*(volatile uint32_t*)(&__MBAR[0x9A48]))
|
||||
#define MCF_FEC1_IEEE_T_FRAME_OK (*(volatile uint32_t*)(&__MBAR[0x9A4C]))
|
||||
#define MCF_FEC1_IEEE_T_1COL (*(volatile uint32_t*)(&__MBAR[0x9A50]))
|
||||
#define MCF_FEC1_IEEE_T_MCOL (*(volatile uint32_t*)(&__MBAR[0x9A54]))
|
||||
#define MCF_FEC1_IEEE_T_DEF (*(volatile uint32_t*)(&__MBAR[0x9A58]))
|
||||
#define MCF_FEC1_IEEE_T_LCOL (*(volatile uint32_t*)(&__MBAR[0x9A5C]))
|
||||
#define MCF_FEC1_IEEE_T_EXCOL (*(volatile uint32_t*)(&__MBAR[0x9A60]))
|
||||
#define MCF_FEC1_IEEE_T_MACERR (*(volatile uint32_t*)(&__MBAR[0x9A64]))
|
||||
#define MCF_FEC1_IEEE_T_CSERR (*(volatile uint32_t*)(&__MBAR[0x9A68]))
|
||||
#define MCF_FEC1_IEEE_T_SQE (*(volatile uint32_t*)(&__MBAR[0x9A6C]))
|
||||
#define MCF_FEC1_IEEE_T_FDXFC (*(volatile uint32_t*)(&__MBAR[0x9A70]))
|
||||
#define MCF_FEC1_IEEE_T_OCTETS_OK (*(volatile uint32_t*)(&__MBAR[0x9A74]))
|
||||
#define MCF_FEC1_RMON_R_DROP (*(volatile uint32_t*)(&__MBAR[0x9A80]))
|
||||
#define MCF_FEC1_RMON_R_PACKETS (*(volatile uint32_t*)(&__MBAR[0x9A84]))
|
||||
#define MCF_FEC1_RMON_R_BC_PKT (*(volatile uint32_t*)(&__MBAR[0x9A88]))
|
||||
#define MCF_FEC1_RMON_R_MC_PKT (*(volatile uint32_t*)(&__MBAR[0x9A8C]))
|
||||
#define MCF_FEC1_RMON_R_CRC_ALIGN (*(volatile uint32_t*)(&__MBAR[0x9A90]))
|
||||
#define MCF_FEC1_RMON_R_UNDERSIZE (*(volatile uint32_t*)(&__MBAR[0x9A94]))
|
||||
#define MCF_FEC1_RMON_R_OVERSIZE (*(volatile uint32_t*)(&__MBAR[0x9A98]))
|
||||
#define MCF_FEC1_RMON_R_FRAG (*(volatile uint32_t*)(&__MBAR[0x9A9C]))
|
||||
#define MCF_FEC1_RMON_R_JAB (*(volatile uint32_t*)(&__MBAR[0x9AA0]))
|
||||
#define MCF_FEC1_RMON_R_RESVD_0 (*(volatile uint32_t*)(&__MBAR[0x9AA4]))
|
||||
#define MCF_FEC1_RMON_R_P64 (*(volatile uint32_t*)(&__MBAR[0x9AA8]))
|
||||
#define MCF_FEC1_RMON_R_P65TO127 (*(volatile uint32_t*)(&__MBAR[0x9AAC]))
|
||||
#define MCF_FEC1_RMON_R_P128TO255 (*(volatile uint32_t*)(&__MBAR[0x9AB0]))
|
||||
#define MCF_FEC1_RMON_R_P256TO511 (*(volatile uint32_t*)(&__MBAR[0x9AB4]))
|
||||
#define MCF_FEC1_RMON_R_P512TO1023 (*(volatile uint32_t*)(&__MBAR[0x9AB8]))
|
||||
#define MCF_FEC1_RMON_R_P1024TO2047 (*(volatile uint32_t*)(&__MBAR[0x9ABC]))
|
||||
#define MCF_FEC1_RMON_R_P_GTE2048 (*(volatile uint32_t*)(&__MBAR[0x9AC0]))
|
||||
#define MCF_FEC1_RMON_R_OCTETS (*(volatile uint32_t*)(&__MBAR[0x9AC4]))
|
||||
#define MCF_FEC1_IEEE_R_DROP (*(volatile uint32_t*)(&__MBAR[0x9AC8]))
|
||||
#define MCF_FEC1_IEEE_R_FRAME_OK (*(volatile uint32_t*)(&__MBAR[0x9ACC]))
|
||||
#define MCF_FEC1_IEEE_R_CRC (*(volatile uint32_t*)(&__MBAR[0x9AD0]))
|
||||
#define MCF_FEC1_IEEE_R_ALIGN (*(volatile uint32_t*)(&__MBAR[0x9AD4]))
|
||||
#define MCF_FEC1_IEEE_R_MACERR (*(volatile uint32_t*)(&__MBAR[0x9AD8]))
|
||||
#define MCF_FEC1_IEEE_R_FDXFC (*(volatile uint32_t*)(&__MBAR[0x9ADC]))
|
||||
#define MCF_FEC1_IEEE_R_OCTETS_OK (*(volatile uint32_t*)(&__MBAR[0x9AE0]))
|
||||
#define MCF_FEC1_EIR (*(volatile uint32_t*)(&_MBAR[0x9804]))
|
||||
#define MCF_FEC1_EIMR (*(volatile uint32_t*)(&_MBAR[0x9808]))
|
||||
#define MCF_FEC1_ECR (*(volatile uint32_t*)(&_MBAR[0x9824]))
|
||||
#define MCF_FEC1_MMFR (*(volatile uint32_t*)(&_MBAR[0x9840]))
|
||||
#define MCF_FEC1_MSCR (*(volatile uint32_t*)(&_MBAR[0x9844]))
|
||||
#define MCF_FEC1_MIBC (*(volatile uint32_t*)(&_MBAR[0x9864]))
|
||||
#define MCF_FEC1_RCR (*(volatile uint32_t*)(&_MBAR[0x9884]))
|
||||
#define MCF_FEC1_RHR (*(volatile uint32_t*)(&_MBAR[0x9888]))
|
||||
#define MCF_FEC1_TCR (*(volatile uint32_t*)(&_MBAR[0x98C4]))
|
||||
#define MCF_FEC1_PALR (*(volatile uint32_t*)(&_MBAR[0x98E4]))
|
||||
#define MCF_FEC1_PAHR (*(volatile uint32_t*)(&_MBAR[0x98E8]))
|
||||
#define MCF_FEC1_OPD (*(volatile uint32_t*)(&_MBAR[0x98EC]))
|
||||
#define MCF_FEC1_IAUR (*(volatile uint32_t*)(&_MBAR[0x9918]))
|
||||
#define MCF_FEC1_IALR (*(volatile uint32_t*)(&_MBAR[0x991C]))
|
||||
#define MCF_FEC1_GAUR (*(volatile uint32_t*)(&_MBAR[0x9920]))
|
||||
#define MCF_FEC1_GALR (*(volatile uint32_t*)(&_MBAR[0x9924]))
|
||||
#define MCF_FEC1_FECTFWR (*(volatile uint32_t*)(&_MBAR[0x9944]))
|
||||
#define MCF_FEC1_FECRFDR (*(volatile uint32_t*)(&_MBAR[0x9984]))
|
||||
#define MCF_FEC1_FECRFSR (*(volatile uint32_t*)(&_MBAR[0x9988]))
|
||||
#define MCF_FEC1_FECRFCR (*(volatile uint32_t*)(&_MBAR[0x998C]))
|
||||
#define MCF_FEC1_FECRLRFP (*(volatile uint32_t*)(&_MBAR[0x9990]))
|
||||
#define MCF_FEC1_FECRLWFP (*(volatile uint32_t*)(&_MBAR[0x9994]))
|
||||
#define MCF_FEC1_FECRFAR (*(volatile uint32_t*)(&_MBAR[0x9998]))
|
||||
#define MCF_FEC1_FECRFRP (*(volatile uint32_t*)(&_MBAR[0x999C]))
|
||||
#define MCF_FEC1_FECRFWP (*(volatile uint32_t*)(&_MBAR[0x99A0]))
|
||||
#define MCF_FEC1_FECTFDR (*(volatile uint32_t*)(&_MBAR[0x99A4]))
|
||||
#define MCF_FEC1_FECTFSR (*(volatile uint32_t*)(&_MBAR[0x99A8]))
|
||||
#define MCF_FEC1_FECTFCR (*(volatile uint32_t*)(&_MBAR[0x99AC]))
|
||||
#define MCF_FEC1_FECTLRFP (*(volatile uint32_t*)(&_MBAR[0x99B0]))
|
||||
#define MCF_FEC1_FECTLWFP (*(volatile uint32_t*)(&_MBAR[0x99B4]))
|
||||
#define MCF_FEC1_FECTFAR (*(volatile uint32_t*)(&_MBAR[0x99B8]))
|
||||
#define MCF_FEC1_FECTFRP (*(volatile uint32_t*)(&_MBAR[0x99BC]))
|
||||
#define MCF_FEC1_FECTFWP (*(volatile uint32_t*)(&_MBAR[0x99C0]))
|
||||
#define MCF_FEC1_FECFRST (*(volatile uint32_t*)(&_MBAR[0x99C4]))
|
||||
#define MCF_FEC1_FECCTCWR (*(volatile uint32_t*)(&_MBAR[0x99C8]))
|
||||
#define MCF_FEC1_RMON_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9A00]))
|
||||
#define MCF_FEC1_RMON_T_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9A04]))
|
||||
#define MCF_FEC1_RMON_T_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A08]))
|
||||
#define MCF_FEC1_RMON_T_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A0C]))
|
||||
#define MCF_FEC1_RMON_T_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9A10]))
|
||||
#define MCF_FEC1_RMON_T_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A14]))
|
||||
#define MCF_FEC1_RMON_T_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A18]))
|
||||
#define MCF_FEC1_RMON_T_FRAG (*(volatile uint32_t*)(&_MBAR[0x9A1C]))
|
||||
#define MCF_FEC1_RMON_T_JAB (*(volatile uint32_t*)(&_MBAR[0x9A20]))
|
||||
#define MCF_FEC1_RMON_T_COL (*(volatile uint32_t*)(&_MBAR[0x9A24]))
|
||||
#define MCF_FEC1_RMON_T_P64 (*(volatile uint32_t*)(&_MBAR[0x9A28]))
|
||||
#define MCF_FEC1_RMON_T_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x9A2C]))
|
||||
#define MCF_FEC1_RMON_T_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9A30]))
|
||||
#define MCF_FEC1_RMON_T_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9A34]))
|
||||
#define MCF_FEC1_RMON_T_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9A38]))
|
||||
#define MCF_FEC1_RMON_T_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x9A3C]))
|
||||
#define MCF_FEC1_RMON_T_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9A40]))
|
||||
#define MCF_FEC1_RMON_T_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9A44]))
|
||||
#define MCF_FEC1_IEEE_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9A48]))
|
||||
#define MCF_FEC1_IEEE_T_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x9A4C]))
|
||||
#define MCF_FEC1_IEEE_T_1COL (*(volatile uint32_t*)(&_MBAR[0x9A50]))
|
||||
#define MCF_FEC1_IEEE_T_MCOL (*(volatile uint32_t*)(&_MBAR[0x9A54]))
|
||||
#define MCF_FEC1_IEEE_T_DEF (*(volatile uint32_t*)(&_MBAR[0x9A58]))
|
||||
#define MCF_FEC1_IEEE_T_LCOL (*(volatile uint32_t*)(&_MBAR[0x9A5C]))
|
||||
#define MCF_FEC1_IEEE_T_EXCOL (*(volatile uint32_t*)(&_MBAR[0x9A60]))
|
||||
#define MCF_FEC1_IEEE_T_MACERR (*(volatile uint32_t*)(&_MBAR[0x9A64]))
|
||||
#define MCF_FEC1_IEEE_T_CSERR (*(volatile uint32_t*)(&_MBAR[0x9A68]))
|
||||
#define MCF_FEC1_IEEE_T_SQE (*(volatile uint32_t*)(&_MBAR[0x9A6C]))
|
||||
#define MCF_FEC1_IEEE_T_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9A70]))
|
||||
#define MCF_FEC1_IEEE_T_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9A74]))
|
||||
#define MCF_FEC1_RMON_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9A80]))
|
||||
#define MCF_FEC1_RMON_R_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9A84]))
|
||||
#define MCF_FEC1_RMON_R_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A88]))
|
||||
#define MCF_FEC1_RMON_R_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A8C]))
|
||||
#define MCF_FEC1_RMON_R_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9A90]))
|
||||
#define MCF_FEC1_RMON_R_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A94]))
|
||||
#define MCF_FEC1_RMON_R_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A98]))
|
||||
#define MCF_FEC1_RMON_R_FRAG (*(volatile uint32_t*)(&_MBAR[0x9A9C]))
|
||||
#define MCF_FEC1_RMON_R_JAB (*(volatile uint32_t*)(&_MBAR[0x9AA0]))
|
||||
#define MCF_FEC1_RMON_R_RESVD_0 (*(volatile uint32_t*)(&_MBAR[0x9AA4]))
|
||||
#define MCF_FEC1_RMON_R_P64 (*(volatile uint32_t*)(&_MBAR[0x9AA8]))
|
||||
#define MCF_FEC1_RMON_R_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x9AAC]))
|
||||
#define MCF_FEC1_RMON_R_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9AB0]))
|
||||
#define MCF_FEC1_RMON_R_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9AB4]))
|
||||
#define MCF_FEC1_RMON_R_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9AB8]))
|
||||
#define MCF_FEC1_RMON_R_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x9ABC]))
|
||||
#define MCF_FEC1_RMON_R_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9AC0]))
|
||||
#define MCF_FEC1_RMON_R_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9AC4]))
|
||||
#define MCF_FEC1_IEEE_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9AC8]))
|
||||
#define MCF_FEC1_IEEE_R_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x9ACC]))
|
||||
#define MCF_FEC1_IEEE_R_CRC (*(volatile uint32_t*)(&_MBAR[0x9AD0]))
|
||||
#define MCF_FEC1_IEEE_R_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9AD4]))
|
||||
#define MCF_FEC1_IEEE_R_MACERR (*(volatile uint32_t*)(&_MBAR[0x9AD8]))
|
||||
#define MCF_FEC1_IEEE_R_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9ADC]))
|
||||
#define MCF_FEC1_IEEE_R_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9AE0]))
|
||||
|
||||
#define MCF_FEC_EIR(x) (*(volatile uint32_t*)(&__MBAR[0x9004 + ((x)*0x800)]))
|
||||
#define MCF_FEC_EIMR(x) (*(volatile uint32_t*)(&__MBAR[0x9008 + ((x)*0x800)]))
|
||||
#define MCF_FEC_ECR(x) (*(volatile uint32_t*)(&__MBAR[0x9024 + ((x)*0x800)]))
|
||||
#define MCF_FEC_MMFR(x) (*(volatile uint32_t*)(&__MBAR[0x9040 + ((x)*0x800)]))
|
||||
#define MCF_FEC_MSCR(x) (*(volatile uint32_t*)(&__MBAR[0x9044 + ((x)*0x800)]))
|
||||
#define MCF_FEC_MIBC(x) (*(volatile uint32_t*)(&__MBAR[0x9064 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RCR(x) (*(volatile uint32_t*)(&__MBAR[0x9084 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RHR(x) (*(volatile uint32_t*)(&__MBAR[0x9088 + ((x)*0x800)]))
|
||||
#define MCF_FEC_TCR(x) (*(volatile uint32_t*)(&__MBAR[0x90C4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_PALR(x) (*(volatile uint32_t*)(&__MBAR[0x90E4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_PAHR(x) (*(volatile uint32_t*)(&__MBAR[0x90E8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_OPD(x) (*(volatile uint32_t*)(&__MBAR[0x90EC + ((x)*0x800)]))
|
||||
#define MCF_FEC_IAUR(x) (*(volatile uint32_t*)(&__MBAR[0x9118 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IALR(x) (*(volatile uint32_t*)(&__MBAR[0x911C + ((x)*0x800)]))
|
||||
#define MCF_FEC_GAUR(x) (*(volatile uint32_t*)(&__MBAR[0x9120 + ((x)*0x800)]))
|
||||
#define MCF_FEC_GALR(x) (*(volatile uint32_t*)(&__MBAR[0x9124 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFWR(x) (*(volatile uint32_t*)(&__MBAR[0x9144 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFDR(x) (*(volatile uint32_t*)(&__MBAR[0x9184 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFSR(x) (*(volatile uint32_t*)(&__MBAR[0x9188 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFCR(x) (*(volatile uint32_t*)(&__MBAR[0x918C + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRLRFP(x) (*(volatile uint32_t*)(&__MBAR[0x9190 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRLWFP(x) (*(volatile uint32_t*)(&__MBAR[0x9194 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFAR(x) (*(volatile uint32_t*)(&__MBAR[0x9198 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFRP(x) (*(volatile uint32_t*)(&__MBAR[0x919C + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFWP(x) (*(volatile uint32_t*)(&__MBAR[0x91A0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFDR(x) (*(volatile uint32_t*)(&__MBAR[0x91A4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFSR(x) (*(volatile uint32_t*)(&__MBAR[0x91A8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFCR(x) (*(volatile uint32_t*)(&__MBAR[0x91AC + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTLRFP(x) (*(volatile uint32_t*)(&__MBAR[0x91B0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTLWFP(x) (*(volatile uint32_t*)(&__MBAR[0x91B4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFAR(x) (*(volatile uint32_t*)(&__MBAR[0x91B8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFRP(x) (*(volatile uint32_t*)(&__MBAR[0x91BC + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFWP(x) (*(volatile uint32_t*)(&__MBAR[0x91C0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECFRST(x) (*(volatile uint32_t*)(&__MBAR[0x91C4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECCTCWR(x) (*(volatile uint32_t*)(&__MBAR[0x91C8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_DROP(x) (*(volatile uint32_t*)(&__MBAR[0x9200 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_PACKETS(x) (*(volatile uint32_t*)(&__MBAR[0x9204 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_BC_PKT(x) (*(volatile uint32_t*)(&__MBAR[0x9208 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_MC_PKT(x) (*(volatile uint32_t*)(&__MBAR[0x920C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_CRC_ALIGN(x) (*(volatile uint32_t*)(&__MBAR[0x9210 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_UNDERSIZE(x) (*(volatile uint32_t*)(&__MBAR[0x9214 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_OVERSIZE(x) (*(volatile uint32_t*)(&__MBAR[0x9218 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_FRAG(x) (*(volatile uint32_t*)(&__MBAR[0x921C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_JAB(x) (*(volatile uint32_t*)(&__MBAR[0x9220 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_COL(x) (*(volatile uint32_t*)(&__MBAR[0x9224 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P64(x) (*(volatile uint32_t*)(&__MBAR[0x9228 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P65TO127(x) (*(volatile uint32_t*)(&__MBAR[0x922C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P128TO255(x) (*(volatile uint32_t*)(&__MBAR[0x9230 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P256TO511(x) (*(volatile uint32_t*)(&__MBAR[0x9234 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P512TO1023(x) (*(volatile uint32_t*)(&__MBAR[0x9238 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P1024TO2047(x) (*(volatile uint32_t*)(&__MBAR[0x923C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P_GTE2048(x) (*(volatile uint32_t*)(&__MBAR[0x9240 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_OCTETS(x) (*(volatile uint32_t*)(&__MBAR[0x9244 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_DROP(x) (*(volatile uint32_t*)(&__MBAR[0x9248 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_FRAME_OK(x) (*(volatile uint32_t*)(&__MBAR[0x924C + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_1COL(x) (*(volatile uint32_t*)(&__MBAR[0x9250 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_MCOL(x) (*(volatile uint32_t*)(&__MBAR[0x9254 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_DEF(x) (*(volatile uint32_t*)(&__MBAR[0x9258 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_LCOL(x) (*(volatile uint32_t*)(&__MBAR[0x925C + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_EXCOL(x) (*(volatile uint32_t*)(&__MBAR[0x9260 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_MACERR(x) (*(volatile uint32_t*)(&__MBAR[0x9264 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_CSERR(x) (*(volatile uint32_t*)(&__MBAR[0x9268 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_SQE(x) (*(volatile uint32_t*)(&__MBAR[0x926C + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_FDXFC(x) (*(volatile uint32_t*)(&__MBAR[0x9270 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_OCTETS_OK(x) (*(volatile uint32_t*)(&__MBAR[0x9274 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_DROP(x) (*(volatile uint32_t*)(&__MBAR[0x9280 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_PACKETS(x) (*(volatile uint32_t*)(&__MBAR[0x9284 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_BC_PKT(x) (*(volatile uint32_t*)(&__MBAR[0x9288 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_MC_PKT(x) (*(volatile uint32_t*)(&__MBAR[0x928C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_CRC_ALIGN(x) (*(volatile uint32_t*)(&__MBAR[0x9290 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_UNDERSIZE(x) (*(volatile uint32_t*)(&__MBAR[0x9294 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_OVERSIZE(x) (*(volatile uint32_t*)(&__MBAR[0x9298 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_FRAG(x) (*(volatile uint32_t*)(&__MBAR[0x929C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_JAB(x) (*(volatile uint32_t*)(&__MBAR[0x92A0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_RESVD_0(x) (*(volatile uint32_t*)(&__MBAR[0x92A4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P64(x) (*(volatile uint32_t*)(&__MBAR[0x92A8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P65TO127(x) (*(volatile uint32_t*)(&__MBAR[0x92AC + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P128TO255(x) (*(volatile uint32_t*)(&__MBAR[0x92B0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P256TO511(x) (*(volatile uint32_t*)(&__MBAR[0x92B4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P512TO1023(x) (*(volatile uint32_t*)(&__MBAR[0x92B8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P1024TO2047(x) (*(volatile uint32_t*)(&__MBAR[0x92BC + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P_GTE2048(x) (*(volatile uint32_t*)(&__MBAR[0x92C0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_OCTETS(x) (*(volatile uint32_t*)(&__MBAR[0x92C4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_DROP(x) (*(volatile uint32_t*)(&__MBAR[0x92C8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_FRAME_OK(x) (*(volatile uint32_t*)(&__MBAR[0x92CC + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_CRC(x) (*(volatile uint32_t*)(&__MBAR[0x92D0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_ALIGN(x) (*(volatile uint32_t*)(&__MBAR[0x92D4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_MACERR(x) (*(volatile uint32_t*)(&__MBAR[0x92D8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_FDXFC(x) (*(volatile uint32_t*)(&__MBAR[0x92DC + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_OCTETS_OK(x) (*(volatile uint32_t*)(&__MBAR[0x92E0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_EIR(x) (*(volatile uint32_t*)(&_MBAR[0x9004 + ((x)*0x800)]))
|
||||
#define MCF_FEC_EIMR(x) (*(volatile uint32_t*)(&_MBAR[0x9008 + ((x)*0x800)]))
|
||||
#define MCF_FEC_ECR(x) (*(volatile uint32_t*)(&_MBAR[0x9024 + ((x)*0x800)]))
|
||||
#define MCF_FEC_MMFR(x) (*(volatile uint32_t*)(&_MBAR[0x9040 + ((x)*0x800)]))
|
||||
#define MCF_FEC_MSCR(x) (*(volatile uint32_t*)(&_MBAR[0x9044 + ((x)*0x800)]))
|
||||
#define MCF_FEC_MIBC(x) (*(volatile uint32_t*)(&_MBAR[0x9064 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RCR(x) (*(volatile uint32_t*)(&_MBAR[0x9084 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RHR(x) (*(volatile uint32_t*)(&_MBAR[0x9088 + ((x)*0x800)]))
|
||||
#define MCF_FEC_TCR(x) (*(volatile uint32_t*)(&_MBAR[0x90C4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_PALR(x) (*(volatile uint32_t*)(&_MBAR[0x90E4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_PAHR(x) (*(volatile uint32_t*)(&_MBAR[0x90E8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_OPD(x) (*(volatile uint32_t*)(&_MBAR[0x90EC + ((x)*0x800)]))
|
||||
#define MCF_FEC_IAUR(x) (*(volatile uint32_t*)(&_MBAR[0x9118 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IALR(x) (*(volatile uint32_t*)(&_MBAR[0x911C + ((x)*0x800)]))
|
||||
#define MCF_FEC_GAUR(x) (*(volatile uint32_t*)(&_MBAR[0x9120 + ((x)*0x800)]))
|
||||
#define MCF_FEC_GALR(x) (*(volatile uint32_t*)(&_MBAR[0x9124 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFWR(x) (*(volatile uint32_t*)(&_MBAR[0x9144 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x9184 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFSR(x) (*(volatile uint32_t*)(&_MBAR[0x9188 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFCR(x) (*(volatile uint32_t*)(&_MBAR[0x918C + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRLRFP(x) (*(volatile uint32_t*)(&_MBAR[0x9190 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRLWFP(x) (*(volatile uint32_t*)(&_MBAR[0x9194 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFAR(x) (*(volatile uint32_t*)(&_MBAR[0x9198 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFRP(x) (*(volatile uint32_t*)(&_MBAR[0x919C + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECRFWP(x) (*(volatile uint32_t*)(&_MBAR[0x91A0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x91A4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFSR(x) (*(volatile uint32_t*)(&_MBAR[0x91A8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFCR(x) (*(volatile uint32_t*)(&_MBAR[0x91AC + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTLRFP(x) (*(volatile uint32_t*)(&_MBAR[0x91B0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTLWFP(x) (*(volatile uint32_t*)(&_MBAR[0x91B4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFAR(x) (*(volatile uint32_t*)(&_MBAR[0x91B8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFRP(x) (*(volatile uint32_t*)(&_MBAR[0x91BC + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECTFWP(x) (*(volatile uint32_t*)(&_MBAR[0x91C0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECFRST(x) (*(volatile uint32_t*)(&_MBAR[0x91C4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_FECCTCWR(x) (*(volatile uint32_t*)(&_MBAR[0x91C8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9200 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_PACKETS(x) (*(volatile uint32_t*)(&_MBAR[0x9204 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_BC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x9208 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_MC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x920C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_CRC_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x9210 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_UNDERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9214 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_OVERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9218 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_FRAG(x) (*(volatile uint32_t*)(&_MBAR[0x921C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_JAB(x) (*(volatile uint32_t*)(&_MBAR[0x9220 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_COL(x) (*(volatile uint32_t*)(&_MBAR[0x9224 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P64(x) (*(volatile uint32_t*)(&_MBAR[0x9228 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P65TO127(x) (*(volatile uint32_t*)(&_MBAR[0x922C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P128TO255(x) (*(volatile uint32_t*)(&_MBAR[0x9230 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P256TO511(x) (*(volatile uint32_t*)(&_MBAR[0x9234 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P512TO1023(x) (*(volatile uint32_t*)(&_MBAR[0x9238 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P1024TO2047(x) (*(volatile uint32_t*)(&_MBAR[0x923C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_P_GTE2048(x) (*(volatile uint32_t*)(&_MBAR[0x9240 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_T_OCTETS(x) (*(volatile uint32_t*)(&_MBAR[0x9244 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9248 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_FRAME_OK(x) (*(volatile uint32_t*)(&_MBAR[0x924C + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_1COL(x) (*(volatile uint32_t*)(&_MBAR[0x9250 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_MCOL(x) (*(volatile uint32_t*)(&_MBAR[0x9254 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_DEF(x) (*(volatile uint32_t*)(&_MBAR[0x9258 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_LCOL(x) (*(volatile uint32_t*)(&_MBAR[0x925C + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_EXCOL(x) (*(volatile uint32_t*)(&_MBAR[0x9260 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_MACERR(x) (*(volatile uint32_t*)(&_MBAR[0x9264 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_CSERR(x) (*(volatile uint32_t*)(&_MBAR[0x9268 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_SQE(x) (*(volatile uint32_t*)(&_MBAR[0x926C + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_FDXFC(x) (*(volatile uint32_t*)(&_MBAR[0x9270 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_T_OCTETS_OK(x) (*(volatile uint32_t*)(&_MBAR[0x9274 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9280 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_PACKETS(x) (*(volatile uint32_t*)(&_MBAR[0x9284 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_BC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x9288 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_MC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x928C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_CRC_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x9290 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_UNDERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9294 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_OVERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9298 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_FRAG(x) (*(volatile uint32_t*)(&_MBAR[0x929C + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_JAB(x) (*(volatile uint32_t*)(&_MBAR[0x92A0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_RESVD_0(x) (*(volatile uint32_t*)(&_MBAR[0x92A4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P64(x) (*(volatile uint32_t*)(&_MBAR[0x92A8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P65TO127(x) (*(volatile uint32_t*)(&_MBAR[0x92AC + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P128TO255(x) (*(volatile uint32_t*)(&_MBAR[0x92B0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P256TO511(x) (*(volatile uint32_t*)(&_MBAR[0x92B4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P512TO1023(x) (*(volatile uint32_t*)(&_MBAR[0x92B8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P1024TO2047(x) (*(volatile uint32_t*)(&_MBAR[0x92BC + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_P_GTE2048(x) (*(volatile uint32_t*)(&_MBAR[0x92C0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_RMON_R_OCTETS(x) (*(volatile uint32_t*)(&_MBAR[0x92C4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x92C8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_FRAME_OK(x) (*(volatile uint32_t*)(&_MBAR[0x92CC + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_CRC(x) (*(volatile uint32_t*)(&_MBAR[0x92D0 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x92D4 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_MACERR(x) (*(volatile uint32_t*)(&_MBAR[0x92D8 + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_FDXFC(x) (*(volatile uint32_t*)(&_MBAR[0x92DC + ((x)*0x800)]))
|
||||
#define MCF_FEC_IEEE_R_OCTETS_OK(x) (*(volatile uint32_t*)(&_MBAR[0x92E0 + ((x)*0x800)]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_FEC_EIR */
|
||||
|
||||
@@ -24,70 +24,70 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_GPIO_PODR_FBCTL (*(volatile uint8_t *)(&__MBAR[0xA00]))
|
||||
#define MCF_GPIO_PDDR_FBCTL (*(volatile uint8_t *)(&__MBAR[0xA10]))
|
||||
#define MCF_GPIO_PPDSDR_FBCTL (*(volatile uint8_t *)(&__MBAR[0xA20]))
|
||||
#define MCF_GPIO_PCLRR_FBCTL (*(volatile uint8_t *)(&__MBAR[0xA30]))
|
||||
#define MCF_GPIO_PODR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA00]))
|
||||
#define MCF_GPIO_PDDR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA10]))
|
||||
#define MCF_GPIO_PPDSDR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA20]))
|
||||
#define MCF_GPIO_PCLRR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA30]))
|
||||
|
||||
#define MCF_GPIO_PODR_FBCS (*(volatile uint8_t *)(&__MBAR[0xA01]))
|
||||
#define MCF_GPIO_PDDR_FBCS (*(volatile uint8_t *)(&__MBAR[0xA11]))
|
||||
#define MCF_GPIO_PPDSDR_FBCS (*(volatile uint8_t *)(&__MBAR[0xA21]))
|
||||
#define MCF_GPIO_PCLRR_FBCS (*(volatile uint8_t *)(&__MBAR[0xA31]))
|
||||
#define MCF_GPIO_PODR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA01]))
|
||||
#define MCF_GPIO_PDDR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA11]))
|
||||
#define MCF_GPIO_PPDSDR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA21]))
|
||||
#define MCF_GPIO_PCLRR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA31]))
|
||||
|
||||
#define MCF_GPIO_PODR_DMA (*(volatile uint8_t *)(&__MBAR[0xA02]))
|
||||
#define MCF_GPIO_PDDR_DMA (*(volatile uint8_t *)(&__MBAR[0xA12]))
|
||||
#define MCF_GPIO_PPDSDR_DMA (*(volatile uint8_t *)(&__MBAR[0xA22]))
|
||||
#define MCF_GPIO_PCLRR_DMA (*(volatile uint8_t *)(&__MBAR[0xA32]))
|
||||
#define MCF_GPIO_PODR_DMA (*(volatile uint8_t *)(&_MBAR[0xA02]))
|
||||
#define MCF_GPIO_PDDR_DMA (*(volatile uint8_t *)(&_MBAR[0xA12]))
|
||||
#define MCF_GPIO_PPDSDR_DMA (*(volatile uint8_t *)(&_MBAR[0xA22]))
|
||||
#define MCF_GPIO_PCLRR_DMA (*(volatile uint8_t *)(&_MBAR[0xA32]))
|
||||
|
||||
#define MCF_GPIO_PODR_FEC0H (*(volatile uint8_t *)(&__MBAR[0xA04]))
|
||||
#define MCF_GPIO_PDDR_FEC0H (*(volatile uint8_t *)(&__MBAR[0xA14]))
|
||||
#define MCF_GPIO_PPDSDR_FEC0H (*(volatile uint8_t *)(&__MBAR[0xA24]))
|
||||
#define MCF_GPIO_PCLRR_FEC0H (*(volatile uint8_t *)(&__MBAR[0xA34]))
|
||||
#define MCF_GPIO_PODR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA04]))
|
||||
#define MCF_GPIO_PDDR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA14]))
|
||||
#define MCF_GPIO_PPDSDR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA24]))
|
||||
#define MCF_GPIO_PCLRR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA34]))
|
||||
|
||||
#define MCF_GPIO_PODR_FEC0L (*(volatile uint8_t *)(&__MBAR[0xA05]))
|
||||
#define MCF_GPIO_PDDR_FEC0L (*(volatile uint8_t *)(&__MBAR[0xA15]))
|
||||
#define MCF_GPIO_PPDSDR_FEC0L (*(volatile uint8_t *)(&__MBAR[0xA25]))
|
||||
#define MCF_GPIO_PCLRR_FEC0L (*(volatile uint8_t *)(&__MBAR[0xA35]))
|
||||
#define MCF_GPIO_PODR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA05]))
|
||||
#define MCF_GPIO_PDDR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA15]))
|
||||
#define MCF_GPIO_PPDSDR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA25]))
|
||||
#define MCF_GPIO_PCLRR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA35]))
|
||||
|
||||
#define MCF_GPIO_PODR_FEC1H (*(volatile uint8_t *)(&__MBAR[0xA06]))
|
||||
#define MCF_GPIO_PDDR_FEC1H (*(volatile uint8_t *)(&__MBAR[0xA16]))
|
||||
#define MCF_GPIO_PPDSDR_FEC1H (*(volatile uint8_t *)(&__MBAR[0xA26]))
|
||||
#define MCF_GPIO_PCLRR_FEC1H (*(volatile uint8_t *)(&__MBAR[0xA36]))
|
||||
#define MCF_GPIO_PODR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA06]))
|
||||
#define MCF_GPIO_PDDR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA16]))
|
||||
#define MCF_GPIO_PPDSDR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA26]))
|
||||
#define MCF_GPIO_PCLRR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA36]))
|
||||
|
||||
#define MCF_GPIO_PODR_FEC1L (*(volatile uint8_t *)(&__MBAR[0xA07]))
|
||||
#define MCF_GPIO_PDDR_FEC1L (*(volatile uint8_t *)(&__MBAR[0xA17]))
|
||||
#define MCF_GPIO_PPDSDR_FEC1L (*(volatile uint8_t *)(&__MBAR[0xA27]))
|
||||
#define MCF_GPIO_PCLRR_FEC1L (*(volatile uint8_t *)(&__MBAR[0xA37]))
|
||||
#define MCF_GPIO_PODR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA07]))
|
||||
#define MCF_GPIO_PDDR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA17]))
|
||||
#define MCF_GPIO_PPDSDR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA27]))
|
||||
#define MCF_GPIO_PCLRR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA37]))
|
||||
|
||||
#define MCF_GPIO_PODR_FECI2C (*(volatile uint8_t *)(&__MBAR[0xA08]))
|
||||
#define MCF_GPIO_PDDR_FECI2C (*(volatile uint8_t *)(&__MBAR[0xA18]))
|
||||
#define MCF_GPIO_PPDSDR_FECI2C (*(volatile uint8_t *)(&__MBAR[0xA28]))
|
||||
#define MCF_GPIO_PCLRR_FECI2C (*(volatile uint8_t *)(&__MBAR[0xA38]))
|
||||
#define MCF_GPIO_PODR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA08]))
|
||||
#define MCF_GPIO_PDDR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA18]))
|
||||
#define MCF_GPIO_PPDSDR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA28]))
|
||||
#define MCF_GPIO_PCLRR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA38]))
|
||||
|
||||
#define MCF_GPIO_PODR_PCIBG (*(volatile uint8_t *)(&__MBAR[0xA09]))
|
||||
#define MCF_GPIO_PDDR_PCIBG (*(volatile uint8_t *)(&__MBAR[0xA19]))
|
||||
#define MCF_GPIO_PPDSDR_PCIBG (*(volatile uint8_t *)(&__MBAR[0xA29]))
|
||||
#define MCF_GPIO_PCLRR_PCIBG (*(volatile uint8_t *)(&__MBAR[0xA39]))
|
||||
#define MCF_GPIO_PODR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA09]))
|
||||
#define MCF_GPIO_PDDR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA19]))
|
||||
#define MCF_GPIO_PPDSDR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA29]))
|
||||
#define MCF_GPIO_PCLRR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA39]))
|
||||
|
||||
#define MCF_GPIO_PODR_PCIBR (*(volatile uint8_t *)(&__MBAR[0xA0A]))
|
||||
#define MCF_GPIO_PDDR_PCIBR (*(volatile uint8_t *)(&__MBAR[0xA1A]))
|
||||
#define MCF_GPIO_PPDSDR_PCIBR (*(volatile uint8_t *)(&__MBAR[0xA2A]))
|
||||
#define MCF_GPIO_PCLRR_PCIBR (*(volatile uint8_t *)(&__MBAR[0xA3A]))
|
||||
#define MCF_GPIO_PODR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA0A]))
|
||||
#define MCF_GPIO_PDDR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA1A]))
|
||||
#define MCF_GPIO_PPDSDR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA2A]))
|
||||
#define MCF_GPIO_PCLRR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA3A]))
|
||||
|
||||
#define MCF_GPIO2_PODR_PSC3PSC (*(volatile uint8_t *)(&__MBAR[0xA0C]))
|
||||
#define MCF_GPIO2_PDDR_PSC3PSC (*(volatile uint8_t *)(&__MBAR[0xA1C]))
|
||||
#define MCF_GPIO2_PPDSDR_PSC3PSC (*(volatile uint8_t *)(&__MBAR[0xA2C]))
|
||||
#define MCF_GPIO2_PCLRR_PSC3PSC (*(volatile uint8_t *)(&__MBAR[0xA3C]))
|
||||
#define MCF_GPIO2_PODR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA0C]))
|
||||
#define MCF_GPIO2_PDDR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA1C]))
|
||||
#define MCF_GPIO2_PPDSDR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA2C]))
|
||||
#define MCF_GPIO2_PCLRR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA3C]))
|
||||
|
||||
#define MCF_GPIO0_PODR_PSC1PSC (*(volatile uint8_t *)(&__MBAR[0xA0D]))
|
||||
#define MCF_GPIO0_PDDR_PSC1PSC (*(volatile uint8_t *)(&__MBAR[0xA1D]))
|
||||
#define MCF_GPIO0_PPDSDR_PSC1PSC (*(volatile uint8_t *)(&__MBAR[0xA2D]))
|
||||
#define MCF_GPIO0_PCLRR_PSC1PSC (*(volatile uint8_t *)(&__MBAR[0xA3D]))
|
||||
#define MCF_GPIO0_PODR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA0D]))
|
||||
#define MCF_GPIO0_PDDR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA1D]))
|
||||
#define MCF_GPIO0_PPDSDR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA2D]))
|
||||
#define MCF_GPIO0_PCLRR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA3D]))
|
||||
|
||||
#define MCF_GPIO_PODR_DSPI (*(volatile uint8_t *)(&__MBAR[0xA0E]))
|
||||
#define MCF_GPIO_PDDR_DSPI (*(volatile uint8_t *)(&__MBAR[0xA1E]))
|
||||
#define MCF_GPIO_PPDSDR_DSPI (*(volatile uint8_t *)(&__MBAR[0xA2E]))
|
||||
#define MCF_GPIO_PCLRR_DSPI (*(volatile uint8_t *)(&__MBAR[0xA3E]))
|
||||
#define MCF_GPIO_PODR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA0E]))
|
||||
#define MCF_GPIO_PDDR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA1E]))
|
||||
#define MCF_GPIO_PPDSDR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA2E]))
|
||||
#define MCF_GPIO_PCLRR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA3E]))
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -24,30 +24,30 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_GPT0_GMS (*(volatile uint32_t*)(&__MBAR[0x800]))
|
||||
#define MCF_GPT0_GCIR (*(volatile uint32_t*)(&__MBAR[0x804]))
|
||||
#define MCF_GPT0_GPWM (*(volatile uint32_t*)(&__MBAR[0x808]))
|
||||
#define MCF_GPT0_GSR (*(volatile uint32_t*)(&__MBAR[0x80C]))
|
||||
#define MCF_GPT0_GMS (*(volatile uint32_t*)(&_MBAR[0x800]))
|
||||
#define MCF_GPT0_GCIR (*(volatile uint32_t*)(&_MBAR[0x804]))
|
||||
#define MCF_GPT0_GPWM (*(volatile uint32_t*)(&_MBAR[0x808]))
|
||||
#define MCF_GPT0_GSR (*(volatile uint32_t*)(&_MBAR[0x80C]))
|
||||
|
||||
#define MCF_GPT1_GMS (*(volatile uint32_t*)(&__MBAR[0x810]))
|
||||
#define MCF_GPT1_GCIR (*(volatile uint32_t*)(&__MBAR[0x814]))
|
||||
#define MCF_GPT1_GPWM (*(volatile uint32_t*)(&__MBAR[0x818]))
|
||||
#define MCF_GPT1_GSR (*(volatile uint32_t*)(&__MBAR[0x81C]))
|
||||
#define MCF_GPT1_GMS (*(volatile uint32_t*)(&_MBAR[0x810]))
|
||||
#define MCF_GPT1_GCIR (*(volatile uint32_t*)(&_MBAR[0x814]))
|
||||
#define MCF_GPT1_GPWM (*(volatile uint32_t*)(&_MBAR[0x818]))
|
||||
#define MCF_GPT1_GSR (*(volatile uint32_t*)(&_MBAR[0x81C]))
|
||||
|
||||
#define MCF_GPT2_GMS (*(volatile uint32_t*)(&__MBAR[0x820]))
|
||||
#define MCF_GPT2_GCIR (*(volatile uint32_t*)(&__MBAR[0x824]))
|
||||
#define MCF_GPT2_GPWM (*(volatile uint32_t*)(&__MBAR[0x828]))
|
||||
#define MCF_GPT2_GSR (*(volatile uint32_t*)(&__MBAR[0x82C]))
|
||||
#define MCF_GPT2_GMS (*(volatile uint32_t*)(&_MBAR[0x820]))
|
||||
#define MCF_GPT2_GCIR (*(volatile uint32_t*)(&_MBAR[0x824]))
|
||||
#define MCF_GPT2_GPWM (*(volatile uint32_t*)(&_MBAR[0x828]))
|
||||
#define MCF_GPT2_GSR (*(volatile uint32_t*)(&_MBAR[0x82C]))
|
||||
|
||||
#define MCF_GPT3_GMS (*(volatile uint32_t*)(&__MBAR[0x830]))
|
||||
#define MCF_GPT3_GCIR (*(volatile uint32_t*)(&__MBAR[0x834]))
|
||||
#define MCF_GPT3_GPWM (*(volatile uint32_t*)(&__MBAR[0x838]))
|
||||
#define MCF_GPT3_GSR (*(volatile uint32_t*)(&__MBAR[0x83C]))
|
||||
#define MCF_GPT3_GMS (*(volatile uint32_t*)(&_MBAR[0x830]))
|
||||
#define MCF_GPT3_GCIR (*(volatile uint32_t*)(&_MBAR[0x834]))
|
||||
#define MCF_GPT3_GPWM (*(volatile uint32_t*)(&_MBAR[0x838]))
|
||||
#define MCF_GPT3_GSR (*(volatile uint32_t*)(&_MBAR[0x83C]))
|
||||
|
||||
#define MCF_GPT_GMS(x) (*(volatile uint32_t*)(&__MBAR[0x800 + ((x)*0x10)]))
|
||||
#define MCF_GPT_GCIR(x) (*(volatile uint32_t*)(&__MBAR[0x804 + ((x)*0x10)]))
|
||||
#define MCF_GPT_GPWM(x) (*(volatile uint32_t*)(&__MBAR[0x808 + ((x)*0x10)]))
|
||||
#define MCF_GPT_GSR(x) (*(volatile uint32_t*)(&__MBAR[0x80C + ((x)*0x10)]))
|
||||
#define MCF_GPT_GMS(x) (*(volatile uint32_t*)(&_MBAR[0x800 + ((x)*0x10)]))
|
||||
#define MCF_GPT_GCIR(x) (*(volatile uint32_t*)(&_MBAR[0x804 + ((x)*0x10)]))
|
||||
#define MCF_GPT_GPWM(x) (*(volatile uint32_t*)(&_MBAR[0x808 + ((x)*0x10)]))
|
||||
#define MCF_GPT_GSR(x) (*(volatile uint32_t*)(&_MBAR[0x80C + ((x)*0x10)]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_GPT_GMS */
|
||||
|
||||
@@ -24,12 +24,12 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_I2C_I2ADR (*(volatile uint8_t *)(&__MBAR[0x8F00]))
|
||||
#define MCF_I2C_I2FDR (*(volatile uint8_t *)(&__MBAR[0x8F04]))
|
||||
#define MCF_I2C_I2CR (*(volatile uint8_t *)(&__MBAR[0x8F08]))
|
||||
#define MCF_I2C_I2SR (*(volatile uint8_t *)(&__MBAR[0x8F0C]))
|
||||
#define MCF_I2C_I2DR (*(volatile uint8_t *)(&__MBAR[0x8F10]))
|
||||
#define MCF_I2C_I2ICR (*(volatile uint8_t *)(&__MBAR[0x8F20]))
|
||||
#define MCF_I2C_I2ADR (*(volatile uint8_t *)(&_MBAR[0x8F00]))
|
||||
#define MCF_I2C_I2FDR (*(volatile uint8_t *)(&_MBAR[0x8F04]))
|
||||
#define MCF_I2C_I2CR (*(volatile uint8_t *)(&_MBAR[0x8F08]))
|
||||
#define MCF_I2C_I2SR (*(volatile uint8_t *)(&_MBAR[0x8F0C]))
|
||||
#define MCF_I2C_I2DR (*(volatile uint8_t *)(&_MBAR[0x8F10]))
|
||||
#define MCF_I2C_I2ICR (*(volatile uint8_t *)(&_MBAR[0x8F20]))
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -24,87 +24,87 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_INTC_IPRH (*(volatile uint32_t*)(&__MBAR[0x700]))
|
||||
#define MCF_INTC_IPRL (*(volatile uint32_t*)(&__MBAR[0x704]))
|
||||
#define MCF_INTC_IMRH (*(volatile uint32_t*)(&__MBAR[0x708]))
|
||||
#define MCF_INTC_IMRL (*(volatile uint32_t*)(&__MBAR[0x70C]))
|
||||
#define MCF_INTC_INTFRCH (*(volatile uint32_t*)(&__MBAR[0x710]))
|
||||
#define MCF_INTC_INTFRCL (*(volatile uint32_t*)(&__MBAR[0x714]))
|
||||
#define MCF_INTC_IRLR (*(volatile uint8_t *)(&__MBAR[0x718]))
|
||||
#define MCF_INTC_IACKLPR (*(volatile uint8_t *)(&__MBAR[0x719]))
|
||||
#define MCF_INTC_ICR01 (*(volatile uint8_t *)(&__MBAR[0x741]))
|
||||
#define MCF_INTC_ICR02 (*(volatile uint8_t *)(&__MBAR[0x742]))
|
||||
#define MCF_INTC_ICR03 (*(volatile uint8_t *)(&__MBAR[0x743]))
|
||||
#define MCF_INTC_ICR04 (*(volatile uint8_t *)(&__MBAR[0x744]))
|
||||
#define MCF_INTC_ICR05 (*(volatile uint8_t *)(&__MBAR[0x745]))
|
||||
#define MCF_INTC_ICR06 (*(volatile uint8_t *)(&__MBAR[0x746]))
|
||||
#define MCF_INTC_ICR07 (*(volatile uint8_t *)(&__MBAR[0x747]))
|
||||
#define MCF_INTC_ICR08 (*(volatile uint8_t *)(&__MBAR[0x748]))
|
||||
#define MCF_INTC_ICR09 (*(volatile uint8_t *)(&__MBAR[0x749]))
|
||||
#define MCF_INTC_ICR10 (*(volatile uint8_t *)(&__MBAR[0x74A]))
|
||||
#define MCF_INTC_ICR11 (*(volatile uint8_t *)(&__MBAR[0x74B]))
|
||||
#define MCF_INTC_ICR12 (*(volatile uint8_t *)(&__MBAR[0x74C]))
|
||||
#define MCF_INTC_ICR13 (*(volatile uint8_t *)(&__MBAR[0x74D]))
|
||||
#define MCF_INTC_ICR14 (*(volatile uint8_t *)(&__MBAR[0x74E]))
|
||||
#define MCF_INTC_ICR15 (*(volatile uint8_t *)(&__MBAR[0x74F]))
|
||||
#define MCF_INTC_ICR16 (*(volatile uint8_t *)(&__MBAR[0x750]))
|
||||
#define MCF_INTC_ICR17 (*(volatile uint8_t *)(&__MBAR[0x751]))
|
||||
#define MCF_INTC_ICR18 (*(volatile uint8_t *)(&__MBAR[0x752]))
|
||||
#define MCF_INTC_ICR19 (*(volatile uint8_t *)(&__MBAR[0x753]))
|
||||
#define MCF_INTC_ICR20 (*(volatile uint8_t *)(&__MBAR[0x754]))
|
||||
#define MCF_INTC_ICR21 (*(volatile uint8_t *)(&__MBAR[0x755]))
|
||||
#define MCF_INTC_ICR22 (*(volatile uint8_t *)(&__MBAR[0x756]))
|
||||
#define MCF_INTC_ICR23 (*(volatile uint8_t *)(&__MBAR[0x757]))
|
||||
#define MCF_INTC_ICR24 (*(volatile uint8_t *)(&__MBAR[0x758]))
|
||||
#define MCF_INTC_ICR25 (*(volatile uint8_t *)(&__MBAR[0x759]))
|
||||
#define MCF_INTC_ICR26 (*(volatile uint8_t *)(&__MBAR[0x75A]))
|
||||
#define MCF_INTC_ICR27 (*(volatile uint8_t *)(&__MBAR[0x75B]))
|
||||
#define MCF_INTC_ICR28 (*(volatile uint8_t *)(&__MBAR[0x75C]))
|
||||
#define MCF_INTC_ICR29 (*(volatile uint8_t *)(&__MBAR[0x75D]))
|
||||
#define MCF_INTC_ICR30 (*(volatile uint8_t *)(&__MBAR[0x75E]))
|
||||
#define MCF_INTC_ICR31 (*(volatile uint8_t *)(&__MBAR[0x75F]))
|
||||
#define MCF_INTC_ICR32 (*(volatile uint8_t *)(&__MBAR[0x760]))
|
||||
#define MCF_INTC_ICR33 (*(volatile uint8_t *)(&__MBAR[0x761]))
|
||||
#define MCF_INTC_ICR34 (*(volatile uint8_t *)(&__MBAR[0x762]))
|
||||
#define MCF_INTC_ICR35 (*(volatile uint8_t *)(&__MBAR[0x763]))
|
||||
#define MCF_INTC_ICR36 (*(volatile uint8_t *)(&__MBAR[0x764]))
|
||||
#define MCF_INTC_ICR37 (*(volatile uint8_t *)(&__MBAR[0x765]))
|
||||
#define MCF_INTC_ICR38 (*(volatile uint8_t *)(&__MBAR[0x766]))
|
||||
#define MCF_INTC_ICR39 (*(volatile uint8_t *)(&__MBAR[0x767]))
|
||||
#define MCF_INTC_ICR40 (*(volatile uint8_t *)(&__MBAR[0x768]))
|
||||
#define MCF_INTC_ICR41 (*(volatile uint8_t *)(&__MBAR[0x769]))
|
||||
#define MCF_INTC_ICR42 (*(volatile uint8_t *)(&__MBAR[0x76A]))
|
||||
#define MCF_INTC_ICR43 (*(volatile uint8_t *)(&__MBAR[0x76B]))
|
||||
#define MCF_INTC_ICR44 (*(volatile uint8_t *)(&__MBAR[0x76C]))
|
||||
#define MCF_INTC_ICR45 (*(volatile uint8_t *)(&__MBAR[0x76D]))
|
||||
#define MCF_INTC_ICR46 (*(volatile uint8_t *)(&__MBAR[0x76E]))
|
||||
#define MCF_INTC_ICR47 (*(volatile uint8_t *)(&__MBAR[0x76F]))
|
||||
#define MCF_INTC_ICR48 (*(volatile uint8_t *)(&__MBAR[0x770]))
|
||||
#define MCF_INTC_ICR49 (*(volatile uint8_t *)(&__MBAR[0x771]))
|
||||
#define MCF_INTC_ICR50 (*(volatile uint8_t *)(&__MBAR[0x772]))
|
||||
#define MCF_INTC_ICR51 (*(volatile uint8_t *)(&__MBAR[0x773]))
|
||||
#define MCF_INTC_ICR52 (*(volatile uint8_t *)(&__MBAR[0x774]))
|
||||
#define MCF_INTC_ICR53 (*(volatile uint8_t *)(&__MBAR[0x775]))
|
||||
#define MCF_INTC_ICR54 (*(volatile uint8_t *)(&__MBAR[0x776]))
|
||||
#define MCF_INTC_ICR55 (*(volatile uint8_t *)(&__MBAR[0x777]))
|
||||
#define MCF_INTC_ICR56 (*(volatile uint8_t *)(&__MBAR[0x778]))
|
||||
#define MCF_INTC_ICR57 (*(volatile uint8_t *)(&__MBAR[0x779]))
|
||||
#define MCF_INTC_ICR58 (*(volatile uint8_t *)(&__MBAR[0x77A]))
|
||||
#define MCF_INTC_ICR59 (*(volatile uint8_t *)(&__MBAR[0x77B]))
|
||||
#define MCF_INTC_ICR60 (*(volatile uint8_t *)(&__MBAR[0x77C]))
|
||||
#define MCF_INTC_ICR61 (*(volatile uint8_t *)(&__MBAR[0x77D]))
|
||||
#define MCF_INTC_ICR62 (*(volatile uint8_t *)(&__MBAR[0x77E]))
|
||||
#define MCF_INTC_ICR63 (*(volatile uint8_t *)(&__MBAR[0x77F]))
|
||||
#define MCF_INTC_SWIACK (*(volatile uint8_t *)(&__MBAR[0x7E0]))
|
||||
#define MCF_INTC_L1IACK (*(volatile uint8_t *)(&__MBAR[0x7E4]))
|
||||
#define MCF_INTC_L2IACK (*(volatile uint8_t *)(&__MBAR[0x7E8]))
|
||||
#define MCF_INTC_L3IACK (*(volatile uint8_t *)(&__MBAR[0x7EC]))
|
||||
#define MCF_INTC_L4IACK (*(volatile uint8_t *)(&__MBAR[0x7F0]))
|
||||
#define MCF_INTC_L5IACK (*(volatile uint8_t *)(&__MBAR[0x7F4]))
|
||||
#define MCF_INTC_L6IACK (*(volatile uint8_t *)(&__MBAR[0x7F8]))
|
||||
#define MCF_INTC_L7IACK (*(volatile uint8_t *)(&__MBAR[0x7FC]))
|
||||
#define MCF_INTC_ICR(x) (*(volatile uint8_t *)(&__MBAR[0x741 + ((x-1)*0x1)]))
|
||||
#define MCF_INTC_LIACK(x) (*(volatile uint8_t *)(&__MBAR[0x7E4 + ((x-1)*0x4)]))
|
||||
#define MCF_INTC_IPRH (*(volatile uint32_t*)(&_MBAR[0x700]))
|
||||
#define MCF_INTC_IPRL (*(volatile uint32_t*)(&_MBAR[0x704]))
|
||||
#define MCF_INTC_IMRH (*(volatile uint32_t*)(&_MBAR[0x708]))
|
||||
#define MCF_INTC_IMRL (*(volatile uint32_t*)(&_MBAR[0x70C]))
|
||||
#define MCF_INTC_INTFRCH (*(volatile uint32_t*)(&_MBAR[0x710]))
|
||||
#define MCF_INTC_INTFRCL (*(volatile uint32_t*)(&_MBAR[0x714]))
|
||||
#define MCF_INTC_IRLR (*(volatile uint8_t *)(&_MBAR[0x718]))
|
||||
#define MCF_INTC_IACKLPR (*(volatile uint8_t *)(&_MBAR[0x719]))
|
||||
#define MCF_INTC_ICR01 (*(volatile uint8_t *)(&_MBAR[0x741]))
|
||||
#define MCF_INTC_ICR02 (*(volatile uint8_t *)(&_MBAR[0x742]))
|
||||
#define MCF_INTC_ICR03 (*(volatile uint8_t *)(&_MBAR[0x743]))
|
||||
#define MCF_INTC_ICR04 (*(volatile uint8_t *)(&_MBAR[0x744]))
|
||||
#define MCF_INTC_ICR05 (*(volatile uint8_t *)(&_MBAR[0x745]))
|
||||
#define MCF_INTC_ICR06 (*(volatile uint8_t *)(&_MBAR[0x746]))
|
||||
#define MCF_INTC_ICR07 (*(volatile uint8_t *)(&_MBAR[0x747]))
|
||||
#define MCF_INTC_ICR08 (*(volatile uint8_t *)(&_MBAR[0x748]))
|
||||
#define MCF_INTC_ICR09 (*(volatile uint8_t *)(&_MBAR[0x749]))
|
||||
#define MCF_INTC_ICR10 (*(volatile uint8_t *)(&_MBAR[0x74A]))
|
||||
#define MCF_INTC_ICR11 (*(volatile uint8_t *)(&_MBAR[0x74B]))
|
||||
#define MCF_INTC_ICR12 (*(volatile uint8_t *)(&_MBAR[0x74C]))
|
||||
#define MCF_INTC_ICR13 (*(volatile uint8_t *)(&_MBAR[0x74D]))
|
||||
#define MCF_INTC_ICR14 (*(volatile uint8_t *)(&_MBAR[0x74E]))
|
||||
#define MCF_INTC_ICR15 (*(volatile uint8_t *)(&_MBAR[0x74F]))
|
||||
#define MCF_INTC_ICR16 (*(volatile uint8_t *)(&_MBAR[0x750]))
|
||||
#define MCF_INTC_ICR17 (*(volatile uint8_t *)(&_MBAR[0x751]))
|
||||
#define MCF_INTC_ICR18 (*(volatile uint8_t *)(&_MBAR[0x752]))
|
||||
#define MCF_INTC_ICR19 (*(volatile uint8_t *)(&_MBAR[0x753]))
|
||||
#define MCF_INTC_ICR20 (*(volatile uint8_t *)(&_MBAR[0x754]))
|
||||
#define MCF_INTC_ICR21 (*(volatile uint8_t *)(&_MBAR[0x755]))
|
||||
#define MCF_INTC_ICR22 (*(volatile uint8_t *)(&_MBAR[0x756]))
|
||||
#define MCF_INTC_ICR23 (*(volatile uint8_t *)(&_MBAR[0x757]))
|
||||
#define MCF_INTC_ICR24 (*(volatile uint8_t *)(&_MBAR[0x758]))
|
||||
#define MCF_INTC_ICR25 (*(volatile uint8_t *)(&_MBAR[0x759]))
|
||||
#define MCF_INTC_ICR26 (*(volatile uint8_t *)(&_MBAR[0x75A]))
|
||||
#define MCF_INTC_ICR27 (*(volatile uint8_t *)(&_MBAR[0x75B]))
|
||||
#define MCF_INTC_ICR28 (*(volatile uint8_t *)(&_MBAR[0x75C]))
|
||||
#define MCF_INTC_ICR29 (*(volatile uint8_t *)(&_MBAR[0x75D]))
|
||||
#define MCF_INTC_ICR30 (*(volatile uint8_t *)(&_MBAR[0x75E]))
|
||||
#define MCF_INTC_ICR31 (*(volatile uint8_t *)(&_MBAR[0x75F]))
|
||||
#define MCF_INTC_ICR32 (*(volatile uint8_t *)(&_MBAR[0x760]))
|
||||
#define MCF_INTC_ICR33 (*(volatile uint8_t *)(&_MBAR[0x761]))
|
||||
#define MCF_INTC_ICR34 (*(volatile uint8_t *)(&_MBAR[0x762]))
|
||||
#define MCF_INTC_ICR35 (*(volatile uint8_t *)(&_MBAR[0x763]))
|
||||
#define MCF_INTC_ICR36 (*(volatile uint8_t *)(&_MBAR[0x764]))
|
||||
#define MCF_INTC_ICR37 (*(volatile uint8_t *)(&_MBAR[0x765]))
|
||||
#define MCF_INTC_ICR38 (*(volatile uint8_t *)(&_MBAR[0x766]))
|
||||
#define MCF_INTC_ICR39 (*(volatile uint8_t *)(&_MBAR[0x767]))
|
||||
#define MCF_INTC_ICR40 (*(volatile uint8_t *)(&_MBAR[0x768]))
|
||||
#define MCF_INTC_ICR41 (*(volatile uint8_t *)(&_MBAR[0x769]))
|
||||
#define MCF_INTC_ICR42 (*(volatile uint8_t *)(&_MBAR[0x76A]))
|
||||
#define MCF_INTC_ICR43 (*(volatile uint8_t *)(&_MBAR[0x76B]))
|
||||
#define MCF_INTC_ICR44 (*(volatile uint8_t *)(&_MBAR[0x76C]))
|
||||
#define MCF_INTC_ICR45 (*(volatile uint8_t *)(&_MBAR[0x76D]))
|
||||
#define MCF_INTC_ICR46 (*(volatile uint8_t *)(&_MBAR[0x76E]))
|
||||
#define MCF_INTC_ICR47 (*(volatile uint8_t *)(&_MBAR[0x76F]))
|
||||
#define MCF_INTC_ICR48 (*(volatile uint8_t *)(&_MBAR[0x770]))
|
||||
#define MCF_INTC_ICR49 (*(volatile uint8_t *)(&_MBAR[0x771]))
|
||||
#define MCF_INTC_ICR50 (*(volatile uint8_t *)(&_MBAR[0x772]))
|
||||
#define MCF_INTC_ICR51 (*(volatile uint8_t *)(&_MBAR[0x773]))
|
||||
#define MCF_INTC_ICR52 (*(volatile uint8_t *)(&_MBAR[0x774]))
|
||||
#define MCF_INTC_ICR53 (*(volatile uint8_t *)(&_MBAR[0x775]))
|
||||
#define MCF_INTC_ICR54 (*(volatile uint8_t *)(&_MBAR[0x776]))
|
||||
#define MCF_INTC_ICR55 (*(volatile uint8_t *)(&_MBAR[0x777]))
|
||||
#define MCF_INTC_ICR56 (*(volatile uint8_t *)(&_MBAR[0x778]))
|
||||
#define MCF_INTC_ICR57 (*(volatile uint8_t *)(&_MBAR[0x779]))
|
||||
#define MCF_INTC_ICR58 (*(volatile uint8_t *)(&_MBAR[0x77A]))
|
||||
#define MCF_INTC_ICR59 (*(volatile uint8_t *)(&_MBAR[0x77B]))
|
||||
#define MCF_INTC_ICR60 (*(volatile uint8_t *)(&_MBAR[0x77C]))
|
||||
#define MCF_INTC_ICR61 (*(volatile uint8_t *)(&_MBAR[0x77D]))
|
||||
#define MCF_INTC_ICR62 (*(volatile uint8_t *)(&_MBAR[0x77E]))
|
||||
#define MCF_INTC_ICR63 (*(volatile uint8_t *)(&_MBAR[0x77F]))
|
||||
#define MCF_INTC_SWIACK (*(volatile uint8_t *)(&_MBAR[0x7E0]))
|
||||
#define MCF_INTC_L1IACK (*(volatile uint8_t *)(&_MBAR[0x7E4]))
|
||||
#define MCF_INTC_L2IACK (*(volatile uint8_t *)(&_MBAR[0x7E8]))
|
||||
#define MCF_INTC_L3IACK (*(volatile uint8_t *)(&_MBAR[0x7EC]))
|
||||
#define MCF_INTC_L4IACK (*(volatile uint8_t *)(&_MBAR[0x7F0]))
|
||||
#define MCF_INTC_L5IACK (*(volatile uint8_t *)(&_MBAR[0x7F4]))
|
||||
#define MCF_INTC_L6IACK (*(volatile uint8_t *)(&_MBAR[0x7F8]))
|
||||
#define MCF_INTC_L7IACK (*(volatile uint8_t *)(&_MBAR[0x7FC]))
|
||||
#define MCF_INTC_ICR(x) (*(volatile uint8_t *)(&_MBAR[0x741 + ((x-1)*0x1)]))
|
||||
#define MCF_INTC_LIACK(x) (*(volatile uint8_t *)(&_MBAR[0x7E4 + ((x-1)*0x4)]))
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -24,12 +24,12 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_MMU_MMUCR (*(volatile uint32_t*)(&__MMUBAR[0]))
|
||||
#define MCF_MMU_MMUOR (*(volatile uint32_t*)(&__MMUBAR[0x4]))
|
||||
#define MCF_MMU_MMUSR (*(volatile uint32_t*)(&__MMUBAR[0x8]))
|
||||
#define MCF_MMU_MMUAR (*(volatile uint32_t*)(&__MMUBAR[0x10]))
|
||||
#define MCF_MMU_MMUTR (*(volatile uint32_t*)(&__MMUBAR[0x14]))
|
||||
#define MCF_MMU_MMUDR (*(volatile uint32_t*)(&__MMUBAR[0x18]))
|
||||
#define MCF_MMU_MMUCR (*(volatile uint32_t*)(&_MMUBAR[0]))
|
||||
#define MCF_MMU_MMUOR (*(volatile uint32_t*)(&_MMUBAR[0x4]))
|
||||
#define MCF_MMU_MMUSR (*(volatile uint32_t*)(&_MMUBAR[0x8]))
|
||||
#define MCF_MMU_MMUAR (*(volatile uint32_t*)(&_MMUBAR[0x10]))
|
||||
#define MCF_MMU_MMUTR (*(volatile uint32_t*)(&_MMUBAR[0x14]))
|
||||
#define MCF_MMU_MMUDR (*(volatile uint32_t*)(&_MMUBAR[0x18]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_MMU_MMUCR */
|
||||
|
||||
@@ -24,18 +24,18 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_PAD_PAR_FBCTL (*(volatile uint16_t*)(&__MBAR[0xA40]))
|
||||
#define MCF_PAD_PAR_FBCS (*(volatile uint8_t *)(&__MBAR[0xA42]))
|
||||
#define MCF_PAD_PAR_DMA (*(volatile uint8_t *)(&__MBAR[0xA43]))
|
||||
#define MCF_PAD_PAR_FECI2CIRQ (*(volatile uint16_t*)(&__MBAR[0xA44]))
|
||||
#define MCF_PAD_PAR_PCIBG (*(volatile uint16_t*)(&__MBAR[0xA48]))
|
||||
#define MCF_PAD_PAR_PCIBR (*(volatile uint16_t*)(&__MBAR[0xA4A]))
|
||||
#define MCF_PAD_PAR_PSC3 (*(volatile uint8_t *)(&__MBAR[0xA4C]))
|
||||
#define MCF_PAD_PAR_PSC2 (*(volatile uint8_t *)(&__MBAR[0xA4D]))
|
||||
#define MCF_PAD_PAR_PSC1 (*(volatile uint8_t *)(&__MBAR[0xA4E]))
|
||||
#define MCF_PAD_PAR_PSC0 (*(volatile uint8_t *)(&__MBAR[0xA4F]))
|
||||
#define MCF_PAD_PAR_DSPI (*(volatile uint16_t*)(&__MBAR[0xA50]))
|
||||
#define MCF_PAD_PAR_TIMER (*(volatile uint8_t *)(&__MBAR[0xA52]))
|
||||
#define MCF_PAD_PAR_FBCTL (*(volatile uint16_t*)(&_MBAR[0xA40]))
|
||||
#define MCF_PAD_PAR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA42]))
|
||||
#define MCF_PAD_PAR_DMA (*(volatile uint8_t *)(&_MBAR[0xA43]))
|
||||
#define MCF_PAD_PAR_FECI2CIRQ (*(volatile uint16_t*)(&_MBAR[0xA44]))
|
||||
#define MCF_PAD_PAR_PCIBG (*(volatile uint16_t*)(&_MBAR[0xA48]))
|
||||
#define MCF_PAD_PAR_PCIBR (*(volatile uint16_t*)(&_MBAR[0xA4A]))
|
||||
#define MCF_PAD_PAR_PSC3 (*(volatile uint8_t *)(&_MBAR[0xA4C]))
|
||||
#define MCF_PAD_PAR_PSC2 (*(volatile uint8_t *)(&_MBAR[0xA4D]))
|
||||
#define MCF_PAD_PAR_PSC1 (*(volatile uint8_t *)(&_MBAR[0xA4E]))
|
||||
#define MCF_PAD_PAR_PSC0 (*(volatile uint8_t *)(&_MBAR[0xA4F]))
|
||||
#define MCF_PAD_PAR_DSPI (*(volatile uint16_t*)(&_MBAR[0xA50]))
|
||||
#define MCF_PAD_PAR_TIMER (*(volatile uint8_t *)(&_MBAR[0xA52]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_PAD_PAR_FBCTL */
|
||||
|
||||
@@ -24,53 +24,53 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_PCI_PCIIDR (*(volatile uint32_t*)(&__MBAR[0xB00]))
|
||||
#define MCF_PCI_PCISCR (*(volatile uint32_t*)(&__MBAR[0xB04]))
|
||||
#define MCF_PCI_PCICCRIR (*(volatile uint32_t*)(&__MBAR[0xB08]))
|
||||
#define MCF_PCI_PCICR1 (*(volatile uint32_t*)(&__MBAR[0xB0C]))
|
||||
#define MCF_PCI_PCIBAR0 (*(volatile uint32_t*)(&__MBAR[0xB10]))
|
||||
#define MCF_PCI_PCIBAR1 (*(volatile uint32_t*)(&__MBAR[0xB14]))
|
||||
#define MCF_PCI_PCICCPR (*(volatile uint32_t*)(&__MBAR[0xB28]))
|
||||
#define MCF_PCI_PCISID (*(volatile uint32_t*)(&__MBAR[0xB2C]))
|
||||
#define MCF_PCI_PCICR2 (*(volatile uint32_t*)(&__MBAR[0xB3C]))
|
||||
#define MCF_PCI_PCIGSCR (*(volatile uint32_t*)(&__MBAR[0xB60]))
|
||||
#define MCF_PCI_PCITBATR0 (*(volatile uint32_t*)(&__MBAR[0xB64]))
|
||||
#define MCF_PCI_PCITBATR1 (*(volatile uint32_t*)(&__MBAR[0xB68]))
|
||||
#define MCF_PCI_PCITCR (*(volatile uint32_t*)(&__MBAR[0xB6C]))
|
||||
#define MCF_PCI_PCIIW0BTAR (*(volatile uint32_t*)(&__MBAR[0xB70]))
|
||||
#define MCF_PCI_PCIIW1BTAR (*(volatile uint32_t*)(&__MBAR[0xB74]))
|
||||
#define MCF_PCI_PCIIW2BTAR (*(volatile uint32_t*)(&__MBAR[0xB78]))
|
||||
#define MCF_PCI_PCIIWCR (*(volatile uint32_t*)(&__MBAR[0xB80]))
|
||||
#define MCF_PCI_PCIICR (*(volatile uint32_t*)(&__MBAR[0xB84]))
|
||||
#define MCF_PCI_PCIISR (*(volatile uint32_t*)(&__MBAR[0xB88]))
|
||||
#define MCF_PCI_PCICAR (*(volatile uint32_t*)(&__MBAR[0xBF8]))
|
||||
#define MCF_PCI_PCITPSR (*(volatile uint32_t*)(&__MBAR[0x8400]))
|
||||
#define MCF_PCI_PCITSAR (*(volatile uint32_t*)(&__MBAR[0x8404]))
|
||||
#define MCF_PCI_PCITTCR (*(volatile uint32_t*)(&__MBAR[0x8408]))
|
||||
#define MCF_PCI_PCITER (*(volatile uint32_t*)(&__MBAR[0x840C]))
|
||||
#define MCF_PCI_PCITNAR (*(volatile uint32_t*)(&__MBAR[0x8410]))
|
||||
#define MCF_PCI_PCITLWR (*(volatile uint32_t*)(&__MBAR[0x8414]))
|
||||
#define MCF_PCI_PCITDCR (*(volatile uint32_t*)(&__MBAR[0x8418]))
|
||||
#define MCF_PCI_PCITSR (*(volatile uint32_t*)(&__MBAR[0x841C]))
|
||||
#define MCF_PCI_PCITFDR (*(volatile uint32_t*)(&__MBAR[0x8440]))
|
||||
#define MCF_PCI_PCITFSR (*(volatile uint32_t*)(&__MBAR[0x8444]))
|
||||
#define MCF_PCI_PCITFCR (*(volatile uint32_t*)(&__MBAR[0x8448]))
|
||||
#define MCF_PCI_PCITFAR (*(volatile uint32_t*)(&__MBAR[0x844C]))
|
||||
#define MCF_PCI_PCITFRPR (*(volatile uint32_t*)(&__MBAR[0x8450]))
|
||||
#define MCF_PCI_PCITFWPR (*(volatile uint32_t*)(&__MBAR[0x8454]))
|
||||
#define MCF_PCI_PCIRPSR (*(volatile uint32_t*)(&__MBAR[0x8480]))
|
||||
#define MCF_PCI_PCIRSAR (*(volatile uint32_t*)(&__MBAR[0x8484]))
|
||||
#define MCF_PCI_PCIRTCR (*(volatile uint32_t*)(&__MBAR[0x8488]))
|
||||
#define MCF_PCI_PCIRER (*(volatile uint32_t*)(&__MBAR[0x848C]))
|
||||
#define MCF_PCI_PCIRNAR (*(volatile uint32_t*)(&__MBAR[0x8490]))
|
||||
#define MCF_PCI_PCIRDCR (*(volatile uint32_t*)(&__MBAR[0x8498]))
|
||||
#define MCF_PCI_PCIRSR (*(volatile uint32_t*)(&__MBAR[0x849C]))
|
||||
#define MCF_PCI_PCIRFDR (*(volatile uint32_t*)(&__MBAR[0x84C0]))
|
||||
#define MCF_PCI_PCIRFSR (*(volatile uint32_t*)(&__MBAR[0x84C4]))
|
||||
#define MCF_PCI_PCIRFCR (*(volatile uint32_t*)(&__MBAR[0x84C8]))
|
||||
#define MCF_PCI_PCIRFAR (*(volatile uint32_t*)(&__MBAR[0x84CC]))
|
||||
#define MCF_PCI_PCIRFRPR (*(volatile uint32_t*)(&__MBAR[0x84D0]))
|
||||
#define MCF_PCI_PCIRFWPR (*(volatile uint32_t*)(&__MBAR[0x84D4]))
|
||||
#define MCF_PCI_PCIIDR (*(volatile uint32_t*)(&_MBAR[0xB00]))
|
||||
#define MCF_PCI_PCISCR (*(volatile uint32_t*)(&_MBAR[0xB04]))
|
||||
#define MCF_PCI_PCICCRIR (*(volatile uint32_t*)(&_MBAR[0xB08]))
|
||||
#define MCF_PCI_PCICR1 (*(volatile uint32_t*)(&_MBAR[0xB0C]))
|
||||
#define MCF_PCI_PCIBAR0 (*(volatile uint32_t*)(&_MBAR[0xB10]))
|
||||
#define MCF_PCI_PCIBAR1 (*(volatile uint32_t*)(&_MBAR[0xB14]))
|
||||
#define MCF_PCI_PCICCPR (*(volatile uint32_t*)(&_MBAR[0xB28]))
|
||||
#define MCF_PCI_PCISID (*(volatile uint32_t*)(&_MBAR[0xB2C]))
|
||||
#define MCF_PCI_PCICR2 (*(volatile uint32_t*)(&_MBAR[0xB3C]))
|
||||
#define MCF_PCI_PCIGSCR (*(volatile uint32_t*)(&_MBAR[0xB60]))
|
||||
#define MCF_PCI_PCITBATR0 (*(volatile uint32_t*)(&_MBAR[0xB64]))
|
||||
#define MCF_PCI_PCITBATR1 (*(volatile uint32_t*)(&_MBAR[0xB68]))
|
||||
#define MCF_PCI_PCITCR (*(volatile uint32_t*)(&_MBAR[0xB6C]))
|
||||
#define MCF_PCI_PCIIW0BTAR (*(volatile uint32_t*)(&_MBAR[0xB70]))
|
||||
#define MCF_PCI_PCIIW1BTAR (*(volatile uint32_t*)(&_MBAR[0xB74]))
|
||||
#define MCF_PCI_PCIIW2BTAR (*(volatile uint32_t*)(&_MBAR[0xB78]))
|
||||
#define MCF_PCI_PCIIWCR (*(volatile uint32_t*)(&_MBAR[0xB80]))
|
||||
#define MCF_PCI_PCIICR (*(volatile uint32_t*)(&_MBAR[0xB84]))
|
||||
#define MCF_PCI_PCIISR (*(volatile uint32_t*)(&_MBAR[0xB88]))
|
||||
#define MCF_PCI_PCICAR (*(volatile uint32_t*)(&_MBAR[0xBF8]))
|
||||
#define MCF_PCI_PCITPSR (*(volatile uint32_t*)(&_MBAR[0x8400]))
|
||||
#define MCF_PCI_PCITSAR (*(volatile uint32_t*)(&_MBAR[0x8404]))
|
||||
#define MCF_PCI_PCITTCR (*(volatile uint32_t*)(&_MBAR[0x8408]))
|
||||
#define MCF_PCI_PCITER (*(volatile uint32_t*)(&_MBAR[0x840C]))
|
||||
#define MCF_PCI_PCITNAR (*(volatile uint32_t*)(&_MBAR[0x8410]))
|
||||
#define MCF_PCI_PCITLWR (*(volatile uint32_t*)(&_MBAR[0x8414]))
|
||||
#define MCF_PCI_PCITDCR (*(volatile uint32_t*)(&_MBAR[0x8418]))
|
||||
#define MCF_PCI_PCITSR (*(volatile uint32_t*)(&_MBAR[0x841C]))
|
||||
#define MCF_PCI_PCITFDR (*(volatile uint32_t*)(&_MBAR[0x8440]))
|
||||
#define MCF_PCI_PCITFSR (*(volatile uint32_t*)(&_MBAR[0x8444]))
|
||||
#define MCF_PCI_PCITFCR (*(volatile uint32_t*)(&_MBAR[0x8448]))
|
||||
#define MCF_PCI_PCITFAR (*(volatile uint32_t*)(&_MBAR[0x844C]))
|
||||
#define MCF_PCI_PCITFRPR (*(volatile uint32_t*)(&_MBAR[0x8450]))
|
||||
#define MCF_PCI_PCITFWPR (*(volatile uint32_t*)(&_MBAR[0x8454]))
|
||||
#define MCF_PCI_PCIRPSR (*(volatile uint32_t*)(&_MBAR[0x8480]))
|
||||
#define MCF_PCI_PCIRSAR (*(volatile uint32_t*)(&_MBAR[0x8484]))
|
||||
#define MCF_PCI_PCIRTCR (*(volatile uint32_t*)(&_MBAR[0x8488]))
|
||||
#define MCF_PCI_PCIRER (*(volatile uint32_t*)(&_MBAR[0x848C]))
|
||||
#define MCF_PCI_PCIRNAR (*(volatile uint32_t*)(&_MBAR[0x8490]))
|
||||
#define MCF_PCI_PCIRDCR (*(volatile uint32_t*)(&_MBAR[0x8498]))
|
||||
#define MCF_PCI_PCIRSR (*(volatile uint32_t*)(&_MBAR[0x849C]))
|
||||
#define MCF_PCI_PCIRFDR (*(volatile uint32_t*)(&_MBAR[0x84C0]))
|
||||
#define MCF_PCI_PCIRFSR (*(volatile uint32_t*)(&_MBAR[0x84C4]))
|
||||
#define MCF_PCI_PCIRFCR (*(volatile uint32_t*)(&_MBAR[0x84C8]))
|
||||
#define MCF_PCI_PCIRFAR (*(volatile uint32_t*)(&_MBAR[0x84CC]))
|
||||
#define MCF_PCI_PCIRFRPR (*(volatile uint32_t*)(&_MBAR[0x84D0]))
|
||||
#define MCF_PCI_PCIRFWPR (*(volatile uint32_t*)(&_MBAR[0x84D4]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_PCI_PCIIDR */
|
||||
|
||||
@@ -24,8 +24,8 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_PCIARB_PACR (*(volatile uint32_t*)(&__MBAR[0xC00]))
|
||||
#define MCF_PCIARB_PASR (*(volatile uint32_t*)(&__MBAR[0xC04]))
|
||||
#define MCF_PCIARB_PACR (*(volatile uint32_t*)(&_MBAR[0xC00]))
|
||||
#define MCF_PCIARB_PASR (*(volatile uint32_t*)(&_MBAR[0xC04]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_PCIARB_PACR */
|
||||
|
||||
@@ -24,229 +24,229 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_PSC0_PSCMR2 (*(volatile uint8_t *)(&__MBAR[0x8600]))
|
||||
#define MCF_PSC0_PSCMR1 (*(volatile uint8_t *)(&__MBAR[0x8600]))
|
||||
#define MCF_PSC0_PSCCSR (*(volatile uint8_t *)(&__MBAR[0x8604]))
|
||||
#define MCF_PSC0_PSCSR (*(volatile uint16_t*)(&__MBAR[0x8604]))
|
||||
#define MCF_PSC0_PSCCR (*(volatile uint8_t *)(&__MBAR[0x8608]))
|
||||
#define MCF_PSC0_PSCRB_8BIT (*(volatile uint32_t*)(&__MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCTB_8BIT (*(volatile uint32_t*)(&__MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCRB_16BIT (*(volatile uint32_t*)(&__MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCTB_16BIT (*(volatile uint32_t*)(&__MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCRB_AC97 (*(volatile uint32_t*)(&__MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCTB_AC97 (*(volatile uint32_t*)(&__MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCIPCR (*(volatile uint8_t *)(&__MBAR[0x8610]))
|
||||
#define MCF_PSC0_PSCACR (*(volatile uint8_t *)(&__MBAR[0x8610]))
|
||||
#define MCF_PSC0_PSCIMR (*(volatile uint16_t*)(&__MBAR[0x8614]))
|
||||
#define MCF_PSC0_PSCISR (*(volatile uint16_t*)(&__MBAR[0x8614]))
|
||||
#define MCF_PSC0_PSCCTUR (*(volatile uint8_t *)(&__MBAR[0x8618]))
|
||||
#define MCF_PSC0_PSCCTLR (*(volatile uint8_t *)(&__MBAR[0x861C]))
|
||||
#define MCF_PSC0_PSCIP (*(volatile uint8_t *)(&__MBAR[0x8634]))
|
||||
#define MCF_PSC0_PSCOPSET (*(volatile uint8_t *)(&__MBAR[0x8638]))
|
||||
#define MCF_PSC0_PSCOPRESET (*(volatile uint8_t *)(&__MBAR[0x863C]))
|
||||
#define MCF_PSC0_PSCSICR (*(volatile uint8_t *)(&__MBAR[0x8640]))
|
||||
#define MCF_PSC0_PSCIRCR1 (*(volatile uint8_t *)(&__MBAR[0x8644]))
|
||||
#define MCF_PSC0_PSCIRCR2 (*(volatile uint8_t *)(&__MBAR[0x8648]))
|
||||
#define MCF_PSC0_PSCIRSDR (*(volatile uint8_t *)(&__MBAR[0x864C]))
|
||||
#define MCF_PSC0_PSCIRMDR (*(volatile uint8_t *)(&__MBAR[0x8650]))
|
||||
#define MCF_PSC0_PSCIRFDR (*(volatile uint8_t *)(&__MBAR[0x8654]))
|
||||
#define MCF_PSC0_PSCRFCNT (*(volatile uint16_t*)(&__MBAR[0x8658]))
|
||||
#define MCF_PSC0_PSCTFCNT (*(volatile uint16_t*)(&__MBAR[0x865C]))
|
||||
#define MCF_PSC0_PSCRFDR (*(volatile uint32_t*)(&__MBAR[0x8660]))
|
||||
#define MCF_PSC0_PSCRFSR (*(volatile uint16_t*)(&__MBAR[0x8664]))
|
||||
#define MCF_PSC0_PSCRFCR (*(volatile uint32_t*)(&__MBAR[0x8668]))
|
||||
#define MCF_PSC0_PSCRFAR (*(volatile uint16_t*)(&__MBAR[0x866E]))
|
||||
#define MCF_PSC0_PSCRFRP (*(volatile uint16_t*)(&__MBAR[0x8672]))
|
||||
#define MCF_PSC0_PSCRFWP (*(volatile uint16_t*)(&__MBAR[0x8676]))
|
||||
#define MCF_PSC0_PSCRLRFP (*(volatile uint16_t*)(&__MBAR[0x867A]))
|
||||
#define MCF_PSC0_PSCRLWFP (*(volatile uint16_t*)(&__MBAR[0x867E]))
|
||||
#define MCF_PSC0_PSCTFDR (*(volatile uint32_t*)(&__MBAR[0x8680]))
|
||||
#define MCF_PSC0_PSCTFSR (*(volatile uint16_t*)(&__MBAR[0x8684]))
|
||||
#define MCF_PSC0_PSCTFCR (*(volatile uint32_t*)(&__MBAR[0x8688]))
|
||||
#define MCF_PSC0_PSCTFAR (*(volatile uint16_t*)(&__MBAR[0x868E]))
|
||||
#define MCF_PSC0_PSCTFRP (*(volatile uint16_t*)(&__MBAR[0x8692]))
|
||||
#define MCF_PSC0_PSCTFWP (*(volatile uint16_t*)(&__MBAR[0x8696]))
|
||||
#define MCF_PSC0_PSCTLRFP (*(volatile uint16_t*)(&__MBAR[0x869A]))
|
||||
#define MCF_PSC0_PSCTLWFP (*(volatile uint16_t*)(&__MBAR[0x869E]))
|
||||
#define MCF_PSC0_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8600]))
|
||||
#define MCF_PSC0_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8600]))
|
||||
#define MCF_PSC0_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8604]))
|
||||
#define MCF_PSC0_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8604]))
|
||||
#define MCF_PSC0_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8608]))
|
||||
#define MCF_PSC0_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x860C]))
|
||||
#define MCF_PSC0_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8610]))
|
||||
#define MCF_PSC0_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8610]))
|
||||
#define MCF_PSC0_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8614]))
|
||||
#define MCF_PSC0_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8614]))
|
||||
#define MCF_PSC0_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8618]))
|
||||
#define MCF_PSC0_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x861C]))
|
||||
#define MCF_PSC0_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8634]))
|
||||
#define MCF_PSC0_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8638]))
|
||||
#define MCF_PSC0_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x863C]))
|
||||
#define MCF_PSC0_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8640]))
|
||||
#define MCF_PSC0_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8644]))
|
||||
#define MCF_PSC0_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8648]))
|
||||
#define MCF_PSC0_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x864C]))
|
||||
#define MCF_PSC0_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8650]))
|
||||
#define MCF_PSC0_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8654]))
|
||||
#define MCF_PSC0_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8658]))
|
||||
#define MCF_PSC0_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x865C]))
|
||||
#define MCF_PSC0_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8660]))
|
||||
#define MCF_PSC0_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8664]))
|
||||
#define MCF_PSC0_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8668]))
|
||||
#define MCF_PSC0_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x866E]))
|
||||
#define MCF_PSC0_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8672]))
|
||||
#define MCF_PSC0_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8676]))
|
||||
#define MCF_PSC0_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x867A]))
|
||||
#define MCF_PSC0_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x867E]))
|
||||
#define MCF_PSC0_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8680]))
|
||||
#define MCF_PSC0_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8684]))
|
||||
#define MCF_PSC0_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8688]))
|
||||
#define MCF_PSC0_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x868E]))
|
||||
#define MCF_PSC0_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8692]))
|
||||
#define MCF_PSC0_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8696]))
|
||||
#define MCF_PSC0_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x869A]))
|
||||
#define MCF_PSC0_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x869E]))
|
||||
|
||||
#define MCF_PSC1_PSCMR2 (*(volatile uint8_t *)(&__MBAR[0x8700]))
|
||||
#define MCF_PSC1_PSCMR1 (*(volatile uint8_t *)(&__MBAR[0x8700]))
|
||||
#define MCF_PSC1_PSCCSR (*(volatile uint8_t *)(&__MBAR[0x8704]))
|
||||
#define MCF_PSC1_PSCSR (*(volatile uint16_t*)(&__MBAR[0x8704]))
|
||||
#define MCF_PSC1_PSCCR (*(volatile uint8_t *)(&__MBAR[0x8708]))
|
||||
#define MCF_PSC1_PSCRB_8BIT (*(volatile uint32_t*)(&__MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCTB_8BIT (*(volatile uint32_t*)(&__MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCRB_16BIT (*(volatile uint32_t*)(&__MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCTB_16BIT (*(volatile uint32_t*)(&__MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCRB_AC97 (*(volatile uint32_t*)(&__MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCTB_AC97 (*(volatile uint32_t*)(&__MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCIPCR (*(volatile uint8_t *)(&__MBAR[0x8710]))
|
||||
#define MCF_PSC1_PSCACR (*(volatile uint8_t *)(&__MBAR[0x8710]))
|
||||
#define MCF_PSC1_PSCIMR (*(volatile uint16_t*)(&__MBAR[0x8714]))
|
||||
#define MCF_PSC1_PSCISR (*(volatile uint16_t*)(&__MBAR[0x8714]))
|
||||
#define MCF_PSC1_PSCCTUR (*(volatile uint8_t *)(&__MBAR[0x8718]))
|
||||
#define MCF_PSC1_PSCCTLR (*(volatile uint8_t *)(&__MBAR[0x871C]))
|
||||
#define MCF_PSC1_PSCIP (*(volatile uint8_t *)(&__MBAR[0x8734]))
|
||||
#define MCF_PSC1_PSCOPSET (*(volatile uint8_t *)(&__MBAR[0x8738]))
|
||||
#define MCF_PSC1_PSCOPRESET (*(volatile uint8_t *)(&__MBAR[0x873C]))
|
||||
#define MCF_PSC1_PSCSICR (*(volatile uint8_t *)(&__MBAR[0x8740]))
|
||||
#define MCF_PSC1_PSCIRCR1 (*(volatile uint8_t *)(&__MBAR[0x8744]))
|
||||
#define MCF_PSC1_PSCIRCR2 (*(volatile uint8_t *)(&__MBAR[0x8748]))
|
||||
#define MCF_PSC1_PSCIRSDR (*(volatile uint8_t *)(&__MBAR[0x874C]))
|
||||
#define MCF_PSC1_PSCIRMDR (*(volatile uint8_t *)(&__MBAR[0x8750]))
|
||||
#define MCF_PSC1_PSCIRFDR (*(volatile uint8_t *)(&__MBAR[0x8754]))
|
||||
#define MCF_PSC1_PSCRFCNT (*(volatile uint16_t*)(&__MBAR[0x8758]))
|
||||
#define MCF_PSC1_PSCTFCNT (*(volatile uint16_t*)(&__MBAR[0x875C]))
|
||||
#define MCF_PSC1_PSCRFDR (*(volatile uint32_t*)(&__MBAR[0x8760]))
|
||||
#define MCF_PSC1_PSCRFSR (*(volatile uint16_t*)(&__MBAR[0x8764]))
|
||||
#define MCF_PSC1_PSCRFCR (*(volatile uint32_t*)(&__MBAR[0x8768]))
|
||||
#define MCF_PSC1_PSCRFAR (*(volatile uint16_t*)(&__MBAR[0x876E]))
|
||||
#define MCF_PSC1_PSCRFRP (*(volatile uint16_t*)(&__MBAR[0x8772]))
|
||||
#define MCF_PSC1_PSCRFWP (*(volatile uint16_t*)(&__MBAR[0x8776]))
|
||||
#define MCF_PSC1_PSCRLRFP (*(volatile uint16_t*)(&__MBAR[0x877A]))
|
||||
#define MCF_PSC1_PSCRLWFP (*(volatile uint16_t*)(&__MBAR[0x877E]))
|
||||
#define MCF_PSC1_PSCTFDR (*(volatile uint32_t*)(&__MBAR[0x8780]))
|
||||
#define MCF_PSC1_PSCTFSR (*(volatile uint16_t*)(&__MBAR[0x8784]))
|
||||
#define MCF_PSC1_PSCTFCR (*(volatile uint32_t*)(&__MBAR[0x8788]))
|
||||
#define MCF_PSC1_PSCTFAR (*(volatile uint16_t*)(&__MBAR[0x878E]))
|
||||
#define MCF_PSC1_PSCTFRP (*(volatile uint16_t*)(&__MBAR[0x8792]))
|
||||
#define MCF_PSC1_PSCTFWP (*(volatile uint16_t*)(&__MBAR[0x8796]))
|
||||
#define MCF_PSC1_PSCTLRFP (*(volatile uint16_t*)(&__MBAR[0x879A]))
|
||||
#define MCF_PSC1_PSCTLWFP (*(volatile uint16_t*)(&__MBAR[0x879E]))
|
||||
#define MCF_PSC1_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8700]))
|
||||
#define MCF_PSC1_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8700]))
|
||||
#define MCF_PSC1_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8704]))
|
||||
#define MCF_PSC1_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8704]))
|
||||
#define MCF_PSC1_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8708]))
|
||||
#define MCF_PSC1_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x870C]))
|
||||
#define MCF_PSC1_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8710]))
|
||||
#define MCF_PSC1_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8710]))
|
||||
#define MCF_PSC1_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8714]))
|
||||
#define MCF_PSC1_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8714]))
|
||||
#define MCF_PSC1_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8718]))
|
||||
#define MCF_PSC1_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x871C]))
|
||||
#define MCF_PSC1_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8734]))
|
||||
#define MCF_PSC1_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8738]))
|
||||
#define MCF_PSC1_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x873C]))
|
||||
#define MCF_PSC1_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8740]))
|
||||
#define MCF_PSC1_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8744]))
|
||||
#define MCF_PSC1_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8748]))
|
||||
#define MCF_PSC1_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x874C]))
|
||||
#define MCF_PSC1_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8750]))
|
||||
#define MCF_PSC1_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8754]))
|
||||
#define MCF_PSC1_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8758]))
|
||||
#define MCF_PSC1_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x875C]))
|
||||
#define MCF_PSC1_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8760]))
|
||||
#define MCF_PSC1_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8764]))
|
||||
#define MCF_PSC1_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8768]))
|
||||
#define MCF_PSC1_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x876E]))
|
||||
#define MCF_PSC1_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8772]))
|
||||
#define MCF_PSC1_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8776]))
|
||||
#define MCF_PSC1_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x877A]))
|
||||
#define MCF_PSC1_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x877E]))
|
||||
#define MCF_PSC1_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8780]))
|
||||
#define MCF_PSC1_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8784]))
|
||||
#define MCF_PSC1_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8788]))
|
||||
#define MCF_PSC1_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x878E]))
|
||||
#define MCF_PSC1_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8792]))
|
||||
#define MCF_PSC1_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8796]))
|
||||
#define MCF_PSC1_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x879A]))
|
||||
#define MCF_PSC1_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x879E]))
|
||||
|
||||
#define MCF_PSC2_PSCMR2 (*(volatile uint8_t *)(&__MBAR[0x8800]))
|
||||
#define MCF_PSC2_PSCMR1 (*(volatile uint8_t *)(&__MBAR[0x8800]))
|
||||
#define MCF_PSC2_PSCCSR (*(volatile uint8_t *)(&__MBAR[0x8804]))
|
||||
#define MCF_PSC2_PSCSR (*(volatile uint16_t*)(&__MBAR[0x8804]))
|
||||
#define MCF_PSC2_PSCCR (*(volatile uint8_t *)(&__MBAR[0x8808]))
|
||||
#define MCF_PSC2_PSCRB_8BIT (*(volatile uint32_t*)(&__MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCTB_8BIT (*(volatile uint32_t*)(&__MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCRB_16BIT (*(volatile uint32_t*)(&__MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCTB_16BIT (*(volatile uint32_t*)(&__MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCRB_AC97 (*(volatile uint32_t*)(&__MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCTB_AC97 (*(volatile uint32_t*)(&__MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCIPCR (*(volatile uint8_t *)(&__MBAR[0x8810]))
|
||||
#define MCF_PSC2_PSCACR (*(volatile uint8_t *)(&__MBAR[0x8810]))
|
||||
#define MCF_PSC2_PSCIMR (*(volatile uint16_t*)(&__MBAR[0x8814]))
|
||||
#define MCF_PSC2_PSCISR (*(volatile uint16_t*)(&__MBAR[0x8814]))
|
||||
#define MCF_PSC2_PSCCTUR (*(volatile uint8_t *)(&__MBAR[0x8818]))
|
||||
#define MCF_PSC2_PSCCTLR (*(volatile uint8_t *)(&__MBAR[0x881C]))
|
||||
#define MCF_PSC2_PSCIP (*(volatile uint8_t *)(&__MBAR[0x8834]))
|
||||
#define MCF_PSC2_PSCOPSET (*(volatile uint8_t *)(&__MBAR[0x8838]))
|
||||
#define MCF_PSC2_PSCOPRESET (*(volatile uint8_t *)(&__MBAR[0x883C]))
|
||||
#define MCF_PSC2_PSCSICR (*(volatile uint8_t *)(&__MBAR[0x8840]))
|
||||
#define MCF_PSC2_PSCIRCR1 (*(volatile uint8_t *)(&__MBAR[0x8844]))
|
||||
#define MCF_PSC2_PSCIRCR2 (*(volatile uint8_t *)(&__MBAR[0x8848]))
|
||||
#define MCF_PSC2_PSCIRSDR (*(volatile uint8_t *)(&__MBAR[0x884C]))
|
||||
#define MCF_PSC2_PSCIRMDR (*(volatile uint8_t *)(&__MBAR[0x8850]))
|
||||
#define MCF_PSC2_PSCIRFDR (*(volatile uint8_t *)(&__MBAR[0x8854]))
|
||||
#define MCF_PSC2_PSCRFCNT (*(volatile uint16_t*)(&__MBAR[0x8858]))
|
||||
#define MCF_PSC2_PSCTFCNT (*(volatile uint16_t*)(&__MBAR[0x885C]))
|
||||
#define MCF_PSC2_PSCRFDR (*(volatile uint32_t*)(&__MBAR[0x8860]))
|
||||
#define MCF_PSC2_PSCRFSR (*(volatile uint16_t*)(&__MBAR[0x8864]))
|
||||
#define MCF_PSC2_PSCRFCR (*(volatile uint32_t*)(&__MBAR[0x8868]))
|
||||
#define MCF_PSC2_PSCRFAR (*(volatile uint16_t*)(&__MBAR[0x886E]))
|
||||
#define MCF_PSC2_PSCRFRP (*(volatile uint16_t*)(&__MBAR[0x8872]))
|
||||
#define MCF_PSC2_PSCRFWP (*(volatile uint16_t*)(&__MBAR[0x8876]))
|
||||
#define MCF_PSC2_PSCRLRFP (*(volatile uint16_t*)(&__MBAR[0x887A]))
|
||||
#define MCF_PSC2_PSCRLWFP (*(volatile uint16_t*)(&__MBAR[0x887E]))
|
||||
#define MCF_PSC2_PSCTFDR (*(volatile uint32_t*)(&__MBAR[0x8880]))
|
||||
#define MCF_PSC2_PSCTFSR (*(volatile uint16_t*)(&__MBAR[0x8884]))
|
||||
#define MCF_PSC2_PSCTFCR (*(volatile uint32_t*)(&__MBAR[0x8888]))
|
||||
#define MCF_PSC2_PSCTFAR (*(volatile uint16_t*)(&__MBAR[0x888E]))
|
||||
#define MCF_PSC2_PSCTFRP (*(volatile uint16_t*)(&__MBAR[0x8892]))
|
||||
#define MCF_PSC2_PSCTFWP (*(volatile uint16_t*)(&__MBAR[0x8896]))
|
||||
#define MCF_PSC2_PSCTLRFP (*(volatile uint16_t*)(&__MBAR[0x889A]))
|
||||
#define MCF_PSC2_PSCTLWFP (*(volatile uint16_t*)(&__MBAR[0x889E]))
|
||||
#define MCF_PSC2_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8800]))
|
||||
#define MCF_PSC2_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8800]))
|
||||
#define MCF_PSC2_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8804]))
|
||||
#define MCF_PSC2_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8804]))
|
||||
#define MCF_PSC2_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8808]))
|
||||
#define MCF_PSC2_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x880C]))
|
||||
#define MCF_PSC2_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8810]))
|
||||
#define MCF_PSC2_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8810]))
|
||||
#define MCF_PSC2_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8814]))
|
||||
#define MCF_PSC2_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8814]))
|
||||
#define MCF_PSC2_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8818]))
|
||||
#define MCF_PSC2_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x881C]))
|
||||
#define MCF_PSC2_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8834]))
|
||||
#define MCF_PSC2_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8838]))
|
||||
#define MCF_PSC2_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x883C]))
|
||||
#define MCF_PSC2_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8840]))
|
||||
#define MCF_PSC2_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8844]))
|
||||
#define MCF_PSC2_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8848]))
|
||||
#define MCF_PSC2_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x884C]))
|
||||
#define MCF_PSC2_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8850]))
|
||||
#define MCF_PSC2_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8854]))
|
||||
#define MCF_PSC2_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8858]))
|
||||
#define MCF_PSC2_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x885C]))
|
||||
#define MCF_PSC2_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8860]))
|
||||
#define MCF_PSC2_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8864]))
|
||||
#define MCF_PSC2_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8868]))
|
||||
#define MCF_PSC2_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x886E]))
|
||||
#define MCF_PSC2_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8872]))
|
||||
#define MCF_PSC2_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8876]))
|
||||
#define MCF_PSC2_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x887A]))
|
||||
#define MCF_PSC2_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x887E]))
|
||||
#define MCF_PSC2_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8880]))
|
||||
#define MCF_PSC2_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8884]))
|
||||
#define MCF_PSC2_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8888]))
|
||||
#define MCF_PSC2_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x888E]))
|
||||
#define MCF_PSC2_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8892]))
|
||||
#define MCF_PSC2_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8896]))
|
||||
#define MCF_PSC2_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x889A]))
|
||||
#define MCF_PSC2_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x889E]))
|
||||
|
||||
#define MCF_PSC3_PSCMR2 (*(volatile uint8_t *)(&__MBAR[0x8900]))
|
||||
#define MCF_PSC3_PSCMR1 (*(volatile uint8_t *)(&__MBAR[0x8900]))
|
||||
#define MCF_PSC3_PSCCSR (*(volatile uint8_t *)(&__MBAR[0x8904]))
|
||||
#define MCF_PSC3_PSCSR (*(volatile uint16_t*)(&__MBAR[0x8904]))
|
||||
#define MCF_PSC3_PSCCR (*(volatile uint8_t *)(&__MBAR[0x8908]))
|
||||
#define MCF_PSC3_PSCRB_8BIT (*(volatile uint32_t*)(&__MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCTB_8BIT (*(volatile uint32_t*)(&__MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCRB_16BIT (*(volatile uint32_t*)(&__MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCTB_16BIT (*(volatile uint32_t*)(&__MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCRB_AC97 (*(volatile uint32_t*)(&__MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCTB_AC97 (*(volatile uint32_t*)(&__MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCIPCR (*(volatile uint8_t *)(&__MBAR[0x8910]))
|
||||
#define MCF_PSC3_PSCACR (*(volatile uint8_t *)(&__MBAR[0x8910]))
|
||||
#define MCF_PSC3_PSCIMR (*(volatile uint16_t*)(&__MBAR[0x8914]))
|
||||
#define MCF_PSC3_PSCISR (*(volatile uint16_t*)(&__MBAR[0x8914]))
|
||||
#define MCF_PSC3_PSCCTUR (*(volatile uint8_t *)(&__MBAR[0x8918]))
|
||||
#define MCF_PSC3_PSCCTLR (*(volatile uint8_t *)(&__MBAR[0x891C]))
|
||||
#define MCF_PSC3_PSCIP (*(volatile uint8_t *)(&__MBAR[0x8934]))
|
||||
#define MCF_PSC3_PSCOPSET (*(volatile uint8_t *)(&__MBAR[0x8938]))
|
||||
#define MCF_PSC3_PSCOPRESET (*(volatile uint8_t *)(&__MBAR[0x893C]))
|
||||
#define MCF_PSC3_PSCSICR (*(volatile uint8_t *)(&__MBAR[0x8940]))
|
||||
#define MCF_PSC3_PSCIRCR1 (*(volatile uint8_t *)(&__MBAR[0x8944]))
|
||||
#define MCF_PSC3_PSCIRCR2 (*(volatile uint8_t *)(&__MBAR[0x8948]))
|
||||
#define MCF_PSC3_PSCIRSDR (*(volatile uint8_t *)(&__MBAR[0x894C]))
|
||||
#define MCF_PSC3_PSCIRMDR (*(volatile uint8_t *)(&__MBAR[0x8950]))
|
||||
#define MCF_PSC3_PSCIRFDR (*(volatile uint8_t *)(&__MBAR[0x8954]))
|
||||
#define MCF_PSC3_PSCRFCNT (*(volatile uint16_t*)(&__MBAR[0x8958]))
|
||||
#define MCF_PSC3_PSCTFCNT (*(volatile uint16_t*)(&__MBAR[0x895C]))
|
||||
#define MCF_PSC3_PSCRFDR (*(volatile uint32_t*)(&__MBAR[0x8960]))
|
||||
#define MCF_PSC3_PSCRFSR (*(volatile uint16_t*)(&__MBAR[0x8964]))
|
||||
#define MCF_PSC3_PSCRFCR (*(volatile uint32_t*)(&__MBAR[0x8968]))
|
||||
#define MCF_PSC3_PSCRFAR (*(volatile uint16_t*)(&__MBAR[0x896E]))
|
||||
#define MCF_PSC3_PSCRFRP (*(volatile uint16_t*)(&__MBAR[0x8972]))
|
||||
#define MCF_PSC3_PSCRFWP (*(volatile uint16_t*)(&__MBAR[0x8976]))
|
||||
#define MCF_PSC3_PSCRLRFP (*(volatile uint16_t*)(&__MBAR[0x897A]))
|
||||
#define MCF_PSC3_PSCRLWFP (*(volatile uint16_t*)(&__MBAR[0x897E]))
|
||||
#define MCF_PSC3_PSCTFDR (*(volatile uint32_t*)(&__MBAR[0x8980]))
|
||||
#define MCF_PSC3_PSCTFSR (*(volatile uint16_t*)(&__MBAR[0x8984]))
|
||||
#define MCF_PSC3_PSCTFCR (*(volatile uint32_t*)(&__MBAR[0x8988]))
|
||||
#define MCF_PSC3_PSCTFAR (*(volatile uint16_t*)(&__MBAR[0x898E]))
|
||||
#define MCF_PSC3_PSCTFRP (*(volatile uint16_t*)(&__MBAR[0x8992]))
|
||||
#define MCF_PSC3_PSCTFWP (*(volatile uint16_t*)(&__MBAR[0x8996]))
|
||||
#define MCF_PSC3_PSCTLRFP (*(volatile uint16_t*)(&__MBAR[0x899A]))
|
||||
#define MCF_PSC3_PSCTLWFP (*(volatile uint16_t*)(&__MBAR[0x899E]))
|
||||
#define MCF_PSC3_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8900]))
|
||||
#define MCF_PSC3_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8900]))
|
||||
#define MCF_PSC3_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8904]))
|
||||
#define MCF_PSC3_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8904]))
|
||||
#define MCF_PSC3_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8908]))
|
||||
#define MCF_PSC3_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x890C]))
|
||||
#define MCF_PSC3_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8910]))
|
||||
#define MCF_PSC3_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8910]))
|
||||
#define MCF_PSC3_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8914]))
|
||||
#define MCF_PSC3_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8914]))
|
||||
#define MCF_PSC3_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8918]))
|
||||
#define MCF_PSC3_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x891C]))
|
||||
#define MCF_PSC3_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8934]))
|
||||
#define MCF_PSC3_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8938]))
|
||||
#define MCF_PSC3_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x893C]))
|
||||
#define MCF_PSC3_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8940]))
|
||||
#define MCF_PSC3_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8944]))
|
||||
#define MCF_PSC3_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8948]))
|
||||
#define MCF_PSC3_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x894C]))
|
||||
#define MCF_PSC3_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8950]))
|
||||
#define MCF_PSC3_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8954]))
|
||||
#define MCF_PSC3_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8958]))
|
||||
#define MCF_PSC3_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x895C]))
|
||||
#define MCF_PSC3_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8960]))
|
||||
#define MCF_PSC3_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8964]))
|
||||
#define MCF_PSC3_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8968]))
|
||||
#define MCF_PSC3_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x896E]))
|
||||
#define MCF_PSC3_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8972]))
|
||||
#define MCF_PSC3_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8976]))
|
||||
#define MCF_PSC3_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x897A]))
|
||||
#define MCF_PSC3_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x897E]))
|
||||
#define MCF_PSC3_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8980]))
|
||||
#define MCF_PSC3_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8984]))
|
||||
#define MCF_PSC3_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8988]))
|
||||
#define MCF_PSC3_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x898E]))
|
||||
#define MCF_PSC3_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8992]))
|
||||
#define MCF_PSC3_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8996]))
|
||||
#define MCF_PSC3_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x899A]))
|
||||
#define MCF_PSC3_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x899E]))
|
||||
|
||||
#define MCF_PSC_PSCMR(x) (*(volatile uint8_t *)(&__MBAR[0x8600 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCCSR(x) (*(volatile uint8_t *)(&__MBAR[0x8604 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCSR(x) (*(volatile uint16_t*)(&__MBAR[0x8604 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCCR(x) (*(volatile uint8_t *)(&__MBAR[0x8608 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRB_8BIT(x) (*(volatile uint32_t*)(&__MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTB_8BIT(x) (*(volatile uint32_t*)(&__MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRB_16BIT(x) (*(volatile uint32_t*)(&__MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTB_16BIT(x) (*(volatile uint32_t*)(&__MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRB_AC97(x) (*(volatile uint32_t*)(&__MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTB_AC97(x) (*(volatile uint32_t*)(&__MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIPCR(x) (*(volatile uint8_t *)(&__MBAR[0x8610 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCACR(x) (*(volatile uint8_t *)(&__MBAR[0x8610 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIMR(x) (*(volatile uint16_t*)(&__MBAR[0x8614 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCISR(x) (*(volatile uint16_t*)(&__MBAR[0x8614 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCCTUR(x) (*(volatile uint8_t *)(&__MBAR[0x8618 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCCTLR(x) (*(volatile uint8_t *)(&__MBAR[0x861C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIP(x) (*(volatile uint8_t *)(&__MBAR[0x8634 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCOPSET(x) (*(volatile uint8_t *)(&__MBAR[0x8638 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCOPRESET(x) (*(volatile uint8_t *)(&__MBAR[0x863C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCSICR(x) (*(volatile uint8_t *)(&__MBAR[0x8640 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIRCR1(x) (*(volatile uint8_t *)(&__MBAR[0x8644 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIRCR2(x) (*(volatile uint8_t *)(&__MBAR[0x8648 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIRSDR(x) (*(volatile uint8_t *)(&__MBAR[0x864C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIRMDR(x) (*(volatile uint8_t *)(&__MBAR[0x8650 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIRFDR(x) (*(volatile uint8_t *)(&__MBAR[0x8654 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFCNT(x) (*(volatile uint16_t*)(&__MBAR[0x8658 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFCNT(x) (*(volatile uint16_t*)(&__MBAR[0x865C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFDR(x) (*(volatile uint32_t*)(&__MBAR[0x8660 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFSR(x) (*(volatile uint16_t*)(&__MBAR[0x8664 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFCR(x) (*(volatile uint32_t*)(&__MBAR[0x8668 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFAR(x) (*(volatile uint16_t*)(&__MBAR[0x866E + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFRP(x) (*(volatile uint16_t*)(&__MBAR[0x8672 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFWP(x) (*(volatile uint16_t*)(&__MBAR[0x8676 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRLRFP(x) (*(volatile uint16_t*)(&__MBAR[0x867A + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRLWFP(x) (*(volatile uint16_t*)(&__MBAR[0x867E + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFDR(x) (*(volatile uint32_t*)(&__MBAR[0x8680 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFSR(x) (*(volatile uint16_t*)(&__MBAR[0x8684 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFCR(x) (*(volatile uint32_t*)(&__MBAR[0x8688 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFAR(x) (*(volatile uint16_t*)(&__MBAR[0x868E + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFRP(x) (*(volatile uint16_t*)(&__MBAR[0x8692 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFWP(x) (*(volatile uint16_t*)(&__MBAR[0x8696 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTLRFP(x) (*(volatile uint16_t*)(&__MBAR[0x869A + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTLWFP(x) (*(volatile uint16_t*)(&__MBAR[0x869E + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCMR(x) (*(volatile uint8_t *)(&_MBAR[0x8600 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCCSR(x) (*(volatile uint8_t *)(&_MBAR[0x8604 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCSR(x) (*(volatile uint16_t*)(&_MBAR[0x8604 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCCR(x) (*(volatile uint8_t *)(&_MBAR[0x8608 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRB_8BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTB_8BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRB_16BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTB_16BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRB_AC97(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTB_AC97(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIPCR(x) (*(volatile uint8_t *)(&_MBAR[0x8610 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCACR(x) (*(volatile uint8_t *)(&_MBAR[0x8610 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIMR(x) (*(volatile uint16_t*)(&_MBAR[0x8614 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCISR(x) (*(volatile uint16_t*)(&_MBAR[0x8614 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCCTUR(x) (*(volatile uint8_t *)(&_MBAR[0x8618 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCCTLR(x) (*(volatile uint8_t *)(&_MBAR[0x861C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIP(x) (*(volatile uint8_t *)(&_MBAR[0x8634 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCOPSET(x) (*(volatile uint8_t *)(&_MBAR[0x8638 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCOPRESET(x) (*(volatile uint8_t *)(&_MBAR[0x863C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCSICR(x) (*(volatile uint8_t *)(&_MBAR[0x8640 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIRCR1(x) (*(volatile uint8_t *)(&_MBAR[0x8644 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIRCR2(x) (*(volatile uint8_t *)(&_MBAR[0x8648 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIRSDR(x) (*(volatile uint8_t *)(&_MBAR[0x864C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIRMDR(x) (*(volatile uint8_t *)(&_MBAR[0x8650 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCIRFDR(x) (*(volatile uint8_t *)(&_MBAR[0x8654 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFCNT(x) (*(volatile uint16_t*)(&_MBAR[0x8658 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFCNT(x) (*(volatile uint16_t*)(&_MBAR[0x865C + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8660 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFSR(x) (*(volatile uint16_t*)(&_MBAR[0x8664 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFCR(x) (*(volatile uint32_t*)(&_MBAR[0x8668 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFAR(x) (*(volatile uint16_t*)(&_MBAR[0x866E + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFRP(x) (*(volatile uint16_t*)(&_MBAR[0x8672 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRFWP(x) (*(volatile uint16_t*)(&_MBAR[0x8676 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRLRFP(x) (*(volatile uint16_t*)(&_MBAR[0x867A + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCRLWFP(x) (*(volatile uint16_t*)(&_MBAR[0x867E + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8680 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFSR(x) (*(volatile uint16_t*)(&_MBAR[0x8684 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFCR(x) (*(volatile uint32_t*)(&_MBAR[0x8688 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFAR(x) (*(volatile uint16_t*)(&_MBAR[0x868E + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFRP(x) (*(volatile uint16_t*)(&_MBAR[0x8692 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTFWP(x) (*(volatile uint16_t*)(&_MBAR[0x8696 + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTLRFP(x) (*(volatile uint16_t*)(&_MBAR[0x869A + ((x)*0x100)]))
|
||||
#define MCF_PSC_PSCTLWFP(x) (*(volatile uint16_t*)(&_MBAR[0x869E + ((x)*0x100)]))
|
||||
|
||||
/* Bit definitions and macros for MCF_PSC_PSCMR */
|
||||
#define MCF_PSC_PSCMR_SB(x) (((x)&0xF)<<0)
|
||||
|
||||
@@ -24,16 +24,16 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_SDRAMC_SDRAMDS (*(volatile uint32_t*)(&__MBAR[0x4]))
|
||||
#define MCF_SDRAMC_CS0CFG (*(volatile uint32_t*)(&__MBAR[0x20]))
|
||||
#define MCF_SDRAMC_CS1CFG (*(volatile uint32_t*)(&__MBAR[0x24]))
|
||||
#define MCF_SDRAMC_CS2CFG (*(volatile uint32_t*)(&__MBAR[0x28]))
|
||||
#define MCF_SDRAMC_CS3CFG (*(volatile uint32_t*)(&__MBAR[0x2C]))
|
||||
#define MCF_SDRAMC_SDMR (*(volatile uint32_t*)(&__MBAR[0x100]))
|
||||
#define MCF_SDRAMC_SDCR (*(volatile uint32_t*)(&__MBAR[0x104]))
|
||||
#define MCF_SDRAMC_SDCFG1 (*(volatile uint32_t*)(&__MBAR[0x108]))
|
||||
#define MCF_SDRAMC_SDCFG2 (*(volatile uint32_t*)(&__MBAR[0x10C]))
|
||||
#define MCF_SDRAMC_CSCFG(x) (*(volatile uint32_t*)(&__MBAR[0x20 + ((x)*0x4)]))
|
||||
#define MCF_SDRAMC_SDRAMDS (*(volatile uint32_t*)(&_MBAR[0x4]))
|
||||
#define MCF_SDRAMC_CS0CFG (*(volatile uint32_t*)(&_MBAR[0x20]))
|
||||
#define MCF_SDRAMC_CS1CFG (*(volatile uint32_t*)(&_MBAR[0x24]))
|
||||
#define MCF_SDRAMC_CS2CFG (*(volatile uint32_t*)(&_MBAR[0x28]))
|
||||
#define MCF_SDRAMC_CS3CFG (*(volatile uint32_t*)(&_MBAR[0x2C]))
|
||||
#define MCF_SDRAMC_SDMR (*(volatile uint32_t*)(&_MBAR[0x100]))
|
||||
#define MCF_SDRAMC_SDCR (*(volatile uint32_t*)(&_MBAR[0x104]))
|
||||
#define MCF_SDRAMC_SDCFG1 (*(volatile uint32_t*)(&_MBAR[0x108]))
|
||||
#define MCF_SDRAMC_SDCFG2 (*(volatile uint32_t*)(&_MBAR[0x10C]))
|
||||
#define MCF_SDRAMC_CSCFG(x) (*(volatile uint32_t*)(&_MBAR[0x20 + ((x)*0x4)]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_SDRAMC_SDRAMDS */
|
||||
|
||||
@@ -24,54 +24,54 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_SEC_EUACRH (*(volatile uint32_t*)(&__MBAR[0x21000]))
|
||||
#define MCF_SEC_EUACRL (*(volatile uint32_t*)(&__MBAR[0x21004]))
|
||||
#define MCF_SEC_SIMRH (*(volatile uint32_t*)(&__MBAR[0x21008]))
|
||||
#define MCF_SEC_SIMRL (*(volatile uint32_t*)(&__MBAR[0x2100C]))
|
||||
#define MCF_SEC_SISRH (*(volatile uint32_t*)(&__MBAR[0x21010]))
|
||||
#define MCF_SEC_SISRL (*(volatile uint32_t*)(&__MBAR[0x21014]))
|
||||
#define MCF_SEC_SICRH (*(volatile uint32_t*)(&__MBAR[0x21018]))
|
||||
#define MCF_SEC_SICRL (*(volatile uint32_t*)(&__MBAR[0x2101C]))
|
||||
#define MCF_SEC_SIDR (*(volatile uint32_t*)(&__MBAR[0x21020]))
|
||||
#define MCF_SEC_EUASRH (*(volatile uint32_t*)(&__MBAR[0x21028]))
|
||||
#define MCF_SEC_EUASRL (*(volatile uint32_t*)(&__MBAR[0x2102C]))
|
||||
#define MCF_SEC_SMCR (*(volatile uint32_t*)(&__MBAR[0x21030]))
|
||||
#define MCF_SEC_MEAR (*(volatile uint32_t*)(&__MBAR[0x21038]))
|
||||
#define MCF_SEC_CCCR0 (*(volatile uint32_t*)(&__MBAR[0x2200C]))
|
||||
#define MCF_SEC_CCPSRH0 (*(volatile uint32_t*)(&__MBAR[0x22010]))
|
||||
#define MCF_SEC_CCPSRL0 (*(volatile uint32_t*)(&__MBAR[0x22014]))
|
||||
#define MCF_SEC_CDPR0 (*(volatile uint32_t*)(&__MBAR[0x22044]))
|
||||
#define MCF_SEC_FR0 (*(volatile uint32_t*)(&__MBAR[0x2204C]))
|
||||
#define MCF_SEC_CCCR1 (*(volatile uint32_t*)(&__MBAR[0x2300C]))
|
||||
#define MCF_SEC_CCPSRH1 (*(volatile uint32_t*)(&__MBAR[0x23010]))
|
||||
#define MCF_SEC_CCPSRL1 (*(volatile uint32_t*)(&__MBAR[0x23014]))
|
||||
#define MCF_SEC_CDPR1 (*(volatile uint32_t*)(&__MBAR[0x23044]))
|
||||
#define MCF_SEC_FR1 (*(volatile uint32_t*)(&__MBAR[0x2304C]))
|
||||
#define MCF_SEC_AFRCR (*(volatile uint32_t*)(&__MBAR[0x28018]))
|
||||
#define MCF_SEC_AFSR (*(volatile uint32_t*)(&__MBAR[0x28028]))
|
||||
#define MCF_SEC_AFISR (*(volatile uint32_t*)(&__MBAR[0x28030]))
|
||||
#define MCF_SEC_AFIMR (*(volatile uint32_t*)(&__MBAR[0x28038]))
|
||||
#define MCF_SEC_DRCR (*(volatile uint32_t*)(&__MBAR[0x2A018]))
|
||||
#define MCF_SEC_DSR (*(volatile uint32_t*)(&__MBAR[0x2A028]))
|
||||
#define MCF_SEC_DISR (*(volatile uint32_t*)(&__MBAR[0x2A030]))
|
||||
#define MCF_SEC_DIMR (*(volatile uint32_t*)(&__MBAR[0x2A038]))
|
||||
#define MCF_SEC_MDRCR (*(volatile uint32_t*)(&__MBAR[0x2C018]))
|
||||
#define MCF_SEC_MDSR (*(volatile uint32_t*)(&__MBAR[0x2C028]))
|
||||
#define MCF_SEC_MDISR (*(volatile uint32_t*)(&__MBAR[0x2C030]))
|
||||
#define MCF_SEC_MDIMR (*(volatile uint32_t*)(&__MBAR[0x2C038]))
|
||||
#define MCF_SEC_RNGRCR (*(volatile uint32_t*)(&__MBAR[0x2E018]))
|
||||
#define MCF_SEC_RNGSR (*(volatile uint32_t*)(&__MBAR[0x2E028]))
|
||||
#define MCF_SEC_RNGISR (*(volatile uint32_t*)(&__MBAR[0x2E030]))
|
||||
#define MCF_SEC_RNGIMR (*(volatile uint32_t*)(&__MBAR[0x2E038]))
|
||||
#define MCF_SEC_AESRCR (*(volatile uint32_t*)(&__MBAR[0x32018]))
|
||||
#define MCF_SEC_AESSR (*(volatile uint32_t*)(&__MBAR[0x32028]))
|
||||
#define MCF_SEC_AESISR (*(volatile uint32_t*)(&__MBAR[0x32030]))
|
||||
#define MCF_SEC_AESIMR (*(volatile uint32_t*)(&__MBAR[0x32038]))
|
||||
#define MCF_SEC_CCCRn(x) (*(volatile uint32_t*)(&__MBAR[0x2200C + ((x)*0x1000)]))
|
||||
#define MCF_SEC_CCPSRHn(x) (*(volatile uint32_t*)(&__MBAR[0x22010 + ((x)*0x1000)]))
|
||||
#define MCF_SEC_CCPSRLn(x) (*(volatile uint32_t*)(&__MBAR[0x22014 + ((x)*0x1000)]))
|
||||
#define MCF_SEC_CDPRn(x) (*(volatile uint32_t*)(&__MBAR[0x22044 + ((x)*0x1000)]))
|
||||
#define MCF_SEC_FRn(x) (*(volatile uint32_t*)(&__MBAR[0x2204C + ((x)*0x1000)]))
|
||||
#define MCF_SEC_EUACRH (*(volatile uint32_t*)(&_MBAR[0x21000]))
|
||||
#define MCF_SEC_EUACRL (*(volatile uint32_t*)(&_MBAR[0x21004]))
|
||||
#define MCF_SEC_SIMRH (*(volatile uint32_t*)(&_MBAR[0x21008]))
|
||||
#define MCF_SEC_SIMRL (*(volatile uint32_t*)(&_MBAR[0x2100C]))
|
||||
#define MCF_SEC_SISRH (*(volatile uint32_t*)(&_MBAR[0x21010]))
|
||||
#define MCF_SEC_SISRL (*(volatile uint32_t*)(&_MBAR[0x21014]))
|
||||
#define MCF_SEC_SICRH (*(volatile uint32_t*)(&_MBAR[0x21018]))
|
||||
#define MCF_SEC_SICRL (*(volatile uint32_t*)(&_MBAR[0x2101C]))
|
||||
#define MCF_SEC_SIDR (*(volatile uint32_t*)(&_MBAR[0x21020]))
|
||||
#define MCF_SEC_EUASRH (*(volatile uint32_t*)(&_MBAR[0x21028]))
|
||||
#define MCF_SEC_EUASRL (*(volatile uint32_t*)(&_MBAR[0x2102C]))
|
||||
#define MCF_SEC_SMCR (*(volatile uint32_t*)(&_MBAR[0x21030]))
|
||||
#define MCF_SEC_MEAR (*(volatile uint32_t*)(&_MBAR[0x21038]))
|
||||
#define MCF_SEC_CCCR0 (*(volatile uint32_t*)(&_MBAR[0x2200C]))
|
||||
#define MCF_SEC_CCPSRH0 (*(volatile uint32_t*)(&_MBAR[0x22010]))
|
||||
#define MCF_SEC_CCPSRL0 (*(volatile uint32_t*)(&_MBAR[0x22014]))
|
||||
#define MCF_SEC_CDPR0 (*(volatile uint32_t*)(&_MBAR[0x22044]))
|
||||
#define MCF_SEC_FR0 (*(volatile uint32_t*)(&_MBAR[0x2204C]))
|
||||
#define MCF_SEC_CCCR1 (*(volatile uint32_t*)(&_MBAR[0x2300C]))
|
||||
#define MCF_SEC_CCPSRH1 (*(volatile uint32_t*)(&_MBAR[0x23010]))
|
||||
#define MCF_SEC_CCPSRL1 (*(volatile uint32_t*)(&_MBAR[0x23014]))
|
||||
#define MCF_SEC_CDPR1 (*(volatile uint32_t*)(&_MBAR[0x23044]))
|
||||
#define MCF_SEC_FR1 (*(volatile uint32_t*)(&_MBAR[0x2304C]))
|
||||
#define MCF_SEC_AFRCR (*(volatile uint32_t*)(&_MBAR[0x28018]))
|
||||
#define MCF_SEC_AFSR (*(volatile uint32_t*)(&_MBAR[0x28028]))
|
||||
#define MCF_SEC_AFISR (*(volatile uint32_t*)(&_MBAR[0x28030]))
|
||||
#define MCF_SEC_AFIMR (*(volatile uint32_t*)(&_MBAR[0x28038]))
|
||||
#define MCF_SEC_DRCR (*(volatile uint32_t*)(&_MBAR[0x2A018]))
|
||||
#define MCF_SEC_DSR (*(volatile uint32_t*)(&_MBAR[0x2A028]))
|
||||
#define MCF_SEC_DISR (*(volatile uint32_t*)(&_MBAR[0x2A030]))
|
||||
#define MCF_SEC_DIMR (*(volatile uint32_t*)(&_MBAR[0x2A038]))
|
||||
#define MCF_SEC_MDRCR (*(volatile uint32_t*)(&_MBAR[0x2C018]))
|
||||
#define MCF_SEC_MDSR (*(volatile uint32_t*)(&_MBAR[0x2C028]))
|
||||
#define MCF_SEC_MDISR (*(volatile uint32_t*)(&_MBAR[0x2C030]))
|
||||
#define MCF_SEC_MDIMR (*(volatile uint32_t*)(&_MBAR[0x2C038]))
|
||||
#define MCF_SEC_RNGRCR (*(volatile uint32_t*)(&_MBAR[0x2E018]))
|
||||
#define MCF_SEC_RNGSR (*(volatile uint32_t*)(&_MBAR[0x2E028]))
|
||||
#define MCF_SEC_RNGISR (*(volatile uint32_t*)(&_MBAR[0x2E030]))
|
||||
#define MCF_SEC_RNGIMR (*(volatile uint32_t*)(&_MBAR[0x2E038]))
|
||||
#define MCF_SEC_AESRCR (*(volatile uint32_t*)(&_MBAR[0x32018]))
|
||||
#define MCF_SEC_AESSR (*(volatile uint32_t*)(&_MBAR[0x32028]))
|
||||
#define MCF_SEC_AESISR (*(volatile uint32_t*)(&_MBAR[0x32030]))
|
||||
#define MCF_SEC_AESIMR (*(volatile uint32_t*)(&_MBAR[0x32038]))
|
||||
#define MCF_SEC_CCCRn(x) (*(volatile uint32_t*)(&_MBAR[0x2200C + ((x)*0x1000)]))
|
||||
#define MCF_SEC_CCPSRHn(x) (*(volatile uint32_t*)(&_MBAR[0x22010 + ((x)*0x1000)]))
|
||||
#define MCF_SEC_CCPSRLn(x) (*(volatile uint32_t*)(&_MBAR[0x22014 + ((x)*0x1000)]))
|
||||
#define MCF_SEC_CDPRn(x) (*(volatile uint32_t*)(&_MBAR[0x22044 + ((x)*0x1000)]))
|
||||
#define MCF_SEC_FRn(x) (*(volatile uint32_t*)(&_MBAR[0x2204C + ((x)*0x1000)]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_SEC_EUACRH */
|
||||
|
||||
@@ -24,10 +24,10 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_SIU_SBCR (*(volatile uint32_t*)(&__MBAR[0x10]))
|
||||
#define MCF_SIU_SECSACR (*(volatile uint32_t*)(&__MBAR[0x38]))
|
||||
#define MCF_SIU_RSR (*(volatile uint32_t*)(&__MBAR[0x44]))
|
||||
#define MCF_SIU_JTAGID (*(volatile uint32_t*)(&__MBAR[0x50]))
|
||||
#define MCF_SIU_SBCR (*(volatile uint32_t*)(&_MBAR[0x10]))
|
||||
#define MCF_SIU_SECSACR (*(volatile uint32_t*)(&_MBAR[0x38]))
|
||||
#define MCF_SIU_RSR (*(volatile uint32_t*)(&_MBAR[0x44]))
|
||||
#define MCF_SIU_JTAGID (*(volatile uint32_t*)(&_MBAR[0x50]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_SIU_SBCR */
|
||||
|
||||
@@ -24,20 +24,20 @@
|
||||
*********************************************************************/
|
||||
|
||||
/* Register read/write macros */
|
||||
#define MCF_SLT0_STCNT (*(volatile uint32_t*)(&__MBAR[0x900]))
|
||||
#define MCF_SLT0_SCR (*(volatile uint32_t*)(&__MBAR[0x904]))
|
||||
#define MCF_SLT0_SCNT (*(volatile uint32_t*)(&__MBAR[0x908]))
|
||||
#define MCF_SLT0_SSR (*(volatile uint32_t*)(&__MBAR[0x90C]))
|
||||
#define MCF_SLT0_STCNT (*(volatile uint32_t*)(&_MBAR[0x900]))
|
||||
#define MCF_SLT0_SCR (*(volatile uint32_t*)(&_MBAR[0x904]))
|
||||
#define MCF_SLT0_SCNT (*(volatile uint32_t*)(&_MBAR[0x908]))
|
||||
#define MCF_SLT0_SSR (*(volatile uint32_t*)(&_MBAR[0x90C]))
|
||||
|
||||
#define MCF_SLT1_STCNT (*(volatile uint32_t*)(&__MBAR[0x910]))
|
||||
#define MCF_SLT1_SCR (*(volatile uint32_t*)(&__MBAR[0x914]))
|
||||
#define MCF_SLT1_SCNT (*(volatile uint32_t*)(&__MBAR[0x918]))
|
||||
#define MCF_SLT1_SSR (*(volatile uint32_t*)(&__MBAR[0x91C]))
|
||||
#define MCF_SLT1_STCNT (*(volatile uint32_t*)(&_MBAR[0x910]))
|
||||
#define MCF_SLT1_SCR (*(volatile uint32_t*)(&_MBAR[0x914]))
|
||||
#define MCF_SLT1_SCNT (*(volatile uint32_t*)(&_MBAR[0x918]))
|
||||
#define MCF_SLT1_SSR (*(volatile uint32_t*)(&_MBAR[0x91C]))
|
||||
|
||||
#define MCF_SLT_STCNT(x) (*(volatile uint32_t*)(&__MBAR[0x900 + ((x)*0x10)]))
|
||||
#define MCF_SLT_SCR(x) (*(volatile uint32_t*)(&__MBAR[0x904 + ((x)*0x10)]))
|
||||
#define MCF_SLT_SCNT(x) (*(volatile uint32_t*)(&__MBAR[0x908 + ((x)*0x10)]))
|
||||
#define MCF_SLT_SSR(x) (*(volatile uint32_t*)(&__MBAR[0x90C + ((x)*0x10)]))
|
||||
#define MCF_SLT_STCNT(x) (*(volatile uint32_t*)(&_MBAR[0x900 + ((x)*0x10)]))
|
||||
#define MCF_SLT_SCR(x) (*(volatile uint32_t*)(&_MBAR[0x904 + ((x)*0x10)]))
|
||||
#define MCF_SLT_SCNT(x) (*(volatile uint32_t*)(&_MBAR[0x908 + ((x)*0x10)]))
|
||||
#define MCF_SLT_SSR(x) (*(volatile uint32_t*)(&_MBAR[0x90C + ((x)*0x10)]))
|
||||
|
||||
|
||||
/* Bit definitions and macros for MCF_SLT_STCNT */
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
#include "MCF5475_SLT.h"
|
||||
#include "startcf.h"
|
||||
|
||||
extern unsigned long __Bas_base[];
|
||||
extern unsigned long _Bas_base[];
|
||||
|
||||
/* imported routines */
|
||||
extern int mmu_init();
|
||||
@@ -203,7 +203,7 @@ void BaS(void)
|
||||
|
||||
/* TT-RAM */
|
||||
|
||||
* (uint32_t *) 0x5a4 = (uint32_t *) __Bas_base; /* ramtop TOS system variable */
|
||||
* (uint32_t *) 0x5a4 = (uint32_t *) _Bas_base; /* ramtop TOS system variable */
|
||||
* (uint32_t *) 0x5a8 = 0x1357bd13; /* ramvalid TOS system variable */
|
||||
|
||||
/* init ACIA */
|
||||
|
||||
@@ -11,26 +11,26 @@ void _startup(void)
|
||||
"| disable interrupts\n\t"
|
||||
"move.w #0x2700,sr\n\t"
|
||||
"|// Initialize MBAR\n\t"
|
||||
"MOVE.L #___MBAR,D0\n\t"
|
||||
"MOVE.L #__MBAR,D0\n\t"
|
||||
"MOVEC D0,MBAR\n\t"
|
||||
"MOVE.L D0,_rt_mbar\n\t"
|
||||
"| mmu off\n\t"
|
||||
"move.l #___MMUBAR+1,d0\n\t"
|
||||
"move.l #__MMUBAR+1,d0\n\t"
|
||||
"movec d0,MMUBAR | mmubar setzen\n\t"
|
||||
"clr.l d0\n\t"
|
||||
"move.l d0,MCF_MMU_MMUCR\n\t | mmu off"
|
||||
"|/* Initialize RAMBARs: locate SRAM and validate it */\n\t"
|
||||
"move.l #___RAMBAR0 + 0x7,d0\n\t | supervisor only"
|
||||
"move.l #__RAMBAR0 + 0x7,d0\n\t | supervisor only"
|
||||
"movec d0,RAMBAR0\n\t"
|
||||
"move.l #___RAMBAR1 + 0x1,d0\n\t"""
|
||||
"move.l #__RAMBAR1 + 0x1,d0\n\t"""
|
||||
"movec d0,RAMBAR1\n\t"
|
||||
"| STACKPOINTER AUF ENDE SRAM1\n\t"
|
||||
"lea ___SUP_SP,a7\n\t"
|
||||
"lea __SUP_SP,a7\n\t"
|
||||
"| instruction cache on\n\t"
|
||||
"move.l #0x000C8100,d0\n\t"
|
||||
"movec d0,cacr\n\t"
|
||||
"nop\n\t"
|
||||
"| initialize any hardware specific issues\n\t"
|
||||
"bra _initialize_hardware\n\t"
|
||||
);
|
||||
);
|
||||
}
|
||||
|
||||
@@ -40,8 +40,8 @@
|
||||
#define halten_movep
|
||||
#define halten_ewf
|
||||
|
||||
#define DIP_SWITCH (*(volatile uint8_t *)(&__MBAR[0xA2C]))
|
||||
#define DIP_SWITCHa ___MBAR + 0xA2C
|
||||
#define DIP_SWITCH (*(volatile uint8_t *)(&_MBAR[0xA2C]))
|
||||
#define DIP_SWITCHa __MBAR + 0xA2C
|
||||
|
||||
#define sca_page_ID 6
|
||||
|
||||
|
||||
@@ -231,7 +231,7 @@ void init_fpga(void)
|
||||
|
||||
while (!MCF_GPIO_PPDSDR_FEC1L & (1 << 0))
|
||||
{
|
||||
warte10us();
|
||||
wait10us();
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
Reference in New Issue
Block a user