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reformatted

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This commit is contained in:
Markus Fröschle
2015-01-18 21:05:05 +00:00
parent 62d68ec12e
commit 400f28ef2f
4 changed files with 139 additions and 115 deletions
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2
if/driver_vec.c
View File

@@ -243,7 +243,7 @@ void __attribute__((interrupt)) get_bas_drivers(void)
" move.l #%[drivers],d0 \n\t" // return driver struct in d0 " move.l #%[drivers],d0 \n\t" // return driver struct in d0
" addq.l #4,sp \n\t" // adjust stack " addq.l #4,sp \n\t" // adjust stack
" move.l (sp)+,a0 \n\t" // restore register " move.l (sp)+,a0 \n\t" // restore register
: /* no output */ : /* no output */
: [drivers] "o" (bas_drivers) /* input */ : [drivers] "o" (bas_drivers) /* input */
: /* clobber */ : /* clobber */
); );

30
sys/BaS.c
View File

@@ -195,13 +195,13 @@ void acia_init()
{ {
xprintf("init ACIA: "); xprintf("init ACIA: ");
/* init ACIA */ /* init ACIA */
KBD_ACIA_CONTROL = 3; /* master reset */ KBD_ACIA_CONTROL = 3; /* master reset */
NOP(); NOP();
MIDI_ACIA_CONTROL = 3; /* master reset */ MIDI_ACIA_CONTROL = 3; /* master reset */
NOP(); NOP();
KBD_ACIA_CONTROL = 0x96; /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */ KBD_ACIA_CONTROL = 0x96; /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */
NOP(); NOP();
MFP_INTR_IN_SERVICE_A = 0xff; MFP_INTR_IN_SERVICE_A = 0xff;
@@ -217,7 +217,7 @@ void enable_coldfire_interrupts()
{ {
xprintf("enable interrupts: "); xprintf("enable interrupts: ");
#if defined(MACHINE_FIREBEE) #if defined(MACHINE_FIREBEE)
FBEE_INTR_CONTROL = 0L; /* disable all interrupts */ FBEE_INTR_CONTROL = 0L; /* disable all interrupts */
#endif /* MACHINE_FIREBEE */ #endif /* MACHINE_FIREBEE */
MCF_EPORT_EPPAR = 0xaaa8; /* all interrupts on falling edge */ MCF_EPORT_EPPAR = 0xaaa8; /* all interrupts on falling edge */
@@ -237,7 +237,7 @@ void enable_coldfire_interrupts()
MCF_EPORT_EPIER = 0xfe; /* int 1-7 on */ MCF_EPORT_EPIER = 0xfe; /* int 1-7 on */
MCF_EPORT_EPFR = 0xff; /* clear all pending interrupts */ MCF_EPORT_EPFR = 0xff; /* clear all pending interrupts */
MCF_INTC_IMRL = 0xffffff00; /* int 1-7 on */ MCF_INTC_IMRL = 0xffffff00; /* int 1-7 on */
//MCF_INTC_IMRH = 0xbffffffe; /* psc3 and timer 0 int on */ //MCF_INTC_IMRH = 0xbffffffe; /* psc3 and timer 0 int on */
MCF_INTC_IMRH = 0; MCF_INTC_IMRH = 0;
FBEE_INTR_ENABLE = FBEE_INTR_INT_IRQ7 | /* enable pseudo bus error */ FBEE_INTR_ENABLE = FBEE_INTR_INT_IRQ7 | /* enable pseudo bus error */
FBEE_INTR_INT_MFP_IRQ6 | /* enable MFP interrupts */ FBEE_INTR_INT_MFP_IRQ6 | /* enable MFP interrupts */
@@ -255,7 +255,7 @@ void enable_coldfire_interrupts()
void disable_coldfire_interrupts() void disable_coldfire_interrupts()
{ {
#if defined(MACHINE_FIREBEE) #if defined(MACHINE_FIREBEE)
FBEE_INTR_ENABLE = 0; /* disable all interrupts */ FBEE_INTR_ENABLE = 0; /* disable all interrupts */
#endif /* MACHINE_FIREBEE */ #endif /* MACHINE_FIREBEE */
MCF_EPORT_EPIER = 0x0; MCF_EPORT_EPIER = 0x0;
@@ -284,7 +284,7 @@ bool spurious_interrupt_handler(void *arg1, void *arg2)
*/ */
void init_isr(void) void init_isr(void)
{ {
isr_init(); /* need to call that explicitely, otherwise isr table might be full */ isr_init(); /* need to call that explicitely, otherwise isr table might be full */
/* /*
* register spurious interrupt handler * register spurious interrupt handler
@@ -337,13 +337,13 @@ void init_isr(void)
dbg("Error: unable to register isr for XLB PCI interrupts\r\n"); dbg("Error: unable to register isr for XLB PCI interrupts\r\n");
} }
MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */ MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */
MCF_XLB_XARB_IMR_MME | /* multiple master at prio 0 interrupt */ MCF_XLB_XARB_IMR_MME | /* multiple master at prio 0 interrupt */
MCF_XLB_XARB_IMR_TTAE | /* TT address only interrupt */ MCF_XLB_XARB_IMR_TTAE | /* TT address only interrupt */
MCF_XLB_XARB_IMR_TTRE | /* TT reserved interrupt enable */ MCF_XLB_XARB_IMR_TTRE | /* TT reserved interrupt enable */
MCF_XLB_XARB_IMR_ECWE | /* external control word interrupt */ MCF_XLB_XARB_IMR_ECWE | /* external control word interrupt */
MCF_XLB_XARB_IMR_TTME | /* TBST/TSIZ mismatch interrupt */ MCF_XLB_XARB_IMR_TTME | /* TBST/TSIZ mismatch interrupt */
MCF_XLB_XARB_IMR_BAE; /* bus activity tenure timeout interrupt */ MCF_XLB_XARB_IMR_BAE; /* bus activity tenure timeout interrupt */
if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 7, 1, pciarb_interrupt_handler, NULL, NULL)) if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 7, 1, pciarb_interrupt_handler, NULL, NULL))
{ {
@@ -390,7 +390,7 @@ void BaS(void)
NOP(); /* force pipeline sync */ NOP(); /* force pipeline sync */
xprintf("finished\r\n"); xprintf("finished\r\n");
#ifdef MACHINE_FIREBEE #ifdef MACHINE_FIREBEE
xprintf("IDE reset: "); xprintf("IDE reset: ");
/* IDE reset */ /* IDE reset */
* (volatile uint8_t *) (0xffff8802 - 2) = 14; * (volatile uint8_t *) (0xffff8802 - 2) = 14;

219
sys/fault_vectors.c
View File

@@ -52,109 +52,134 @@ void fault_handler(uint32_t pc, uint32_t format_status)
xprintf("fault_status: %x (", fault_status); xprintf("fault_status: %x (", fault_status);
switch (fault_status) switch (fault_status)
{ {
case 0: case 0:
xprintf("not an access or address error nor an interrupted debug service routine"); xprintf("not an access or address error nor an interrupted debug service routine");
break; break;
case 1:
case 3: case 1:
case 11: case 3:
xprintf("reserved"); case 11:
break; xprintf("reserved");
case 2: break;
xprintf("interrupt during a debug service routine for faults other than access errors");
break; case 2:
case 4: xprintf("interrupt during a debug service routine for faults other than access errors");
xprintf("error (for example, protection fault) on instruction fetch"); break;
break;
case 5: case 4:
xprintf("TLB miss on opword or instruction fetch"); xprintf("error (for example, protection fault) on instruction fetch");
break; break;
case 6:
xprintf("TLB miss on extension word of instruction fetch"); case 5:
break; xprintf("TLB miss on opword or instruction fetch");
case 7: break;
xprintf("IFP access error while executing in emulator mode");
break; case 6:
case 8: xprintf("TLB miss on extension word of instruction fetch");
xprintf("error on data write"); break;
break;
case 9: case 7:
xprintf("error on attempted write to write-protected space"); xprintf("IFP access error while executing in emulator mode");
break; break;
case 10:
xprintf("TLB miss on data write"); case 8:
break; xprintf("error on data write");
case 12: break;
xprintf("error on data read");
break; case 9:
case 13: xprintf("error on attempted write to write-protected space");
xprintf("attempted read, read-modify-write of protected space"); break;
break;
case 14: case 10:
xprintf("TLB miss on data read or read-modify-write"); xprintf("TLB miss on data write");
break; break;
case 15:
xprintf("OEP access error while executing in emulator mode"); case 12:
xprintf("error on data read");
break;
case 13:
xprintf("attempted read, read-modify-write of protected space");
break;
case 14:
xprintf("TLB miss on data read or read-modify-write");
break;
case 15:
xprintf("OEP access error while executing in emulator mode");
} }
xprintf(")\r\n"); xprintf(")\r\n");
xprintf("vector = %d (", vector); xprintf("vector = %d (", vector);
switch (vector) switch (vector)
{ {
case 2: case 2:
xprintf("access error"); xprintf("access error");
break; break;
case 3:
xprintf("address error"); case 3:
break; xprintf("address error");
case 4: break;
xprintf("illegal instruction");
break; case 4:
case 5: xprintf("illegal instruction");
xprintf("divide by zero"); break;
break;
case 8: case 5:
xprintf("privilege violation"); xprintf("divide by zero");
break; break;
case 9:
xprintf("trace"); case 8:
break; xprintf("privilege violation");
case 10: break;
xprintf("unimplemented line-a opcode");
break; case 9:
case 11: xprintf("trace");
xprintf("unimplemented line-f opcode"); break;
break;
case 12: case 10:
xprintf("non-PC breakpoint debug interrupt"); xprintf("unimplemented line-a opcode");
break; break;
case 13:
xprintf("PC breakpoint debug interrupt"); case 11:
break; xprintf("unimplemented line-f opcode");
case 14: break;
xprintf("format error");
break; case 12:
case 24: xprintf("non-PC breakpoint debug interrupt");
xprintf("spurious interrupt"); break;
break;
default: case 13:
if ( ((vector >= 6) && (vector <= 7)) || xprintf("PC breakpoint debug interrupt");
((vector >= 16) && (vector <= 23))) break;
{
xprintf("reserved"); case 14:
} xprintf("format error");
else if ((vector >= 25) && (vector <= 31)) break;
{
xprintf("level %d autovectored interrupt", fault_status - 24); case 24:
} xprintf("spurious interrupt");
else if ((vector >= 32) && (vector <= 47)) break;
{
xprintf("trap #%d", vector - 32); default:
} if ( ((vector >= 6) && (vector <= 7)) ||
else ((vector >= 16) && (vector <= 23)))
{ {
xprintf("unknown vector\r\n"); xprintf("reserved");
} }
else if ((vector >= 25) && (vector <= 31))
{
xprintf("level %d autovectored interrupt", fault_status - 24);
}
else if ((vector >= 32) && (vector <= 47))
{
xprintf("trap #%d", vector - 32);
}
else
{
xprintf("unknown vector\r\n");
}
} }
xprintf(")\r\n"); xprintf(")\r\n");
xprintf("sr=%4x\r\n", sr); xprintf("sr=%4x\r\n", sr);

3
sys/mmu.c
View File

@@ -763,8 +763,7 @@ void mmu_init(void)
} }
uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc, uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc, uint32_t format_status)
uint32_t format_status)
{ {
uint32_t fault = format_status & 0xc030000; uint32_t fault = format_status & 0xc030000;