diff --git a/if/driver_vec.c b/if/driver_vec.c index e036d47..2ca566d 100644 --- a/if/driver_vec.c +++ b/if/driver_vec.c @@ -243,7 +243,7 @@ void __attribute__((interrupt)) get_bas_drivers(void) " move.l #%[drivers],d0 \n\t" // return driver struct in d0 " addq.l #4,sp \n\t" // adjust stack " move.l (sp)+,a0 \n\t" // restore register - : /* no output */ + : /* no output */ : [drivers] "o" (bas_drivers) /* input */ : /* clobber */ ); diff --git a/sys/BaS.c b/sys/BaS.c index 032faa9..3a0c58d 100644 --- a/sys/BaS.c +++ b/sys/BaS.c @@ -195,13 +195,13 @@ void acia_init() { xprintf("init ACIA: "); /* init ACIA */ - KBD_ACIA_CONTROL = 3; /* master reset */ + KBD_ACIA_CONTROL = 3; /* master reset */ NOP(); - MIDI_ACIA_CONTROL = 3; /* master reset */ + MIDI_ACIA_CONTROL = 3; /* master reset */ NOP(); - KBD_ACIA_CONTROL = 0x96; /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */ + KBD_ACIA_CONTROL = 0x96; /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */ NOP(); MFP_INTR_IN_SERVICE_A = 0xff; @@ -217,7 +217,7 @@ void enable_coldfire_interrupts() { xprintf("enable interrupts: "); #if defined(MACHINE_FIREBEE) - FBEE_INTR_CONTROL = 0L; /* disable all interrupts */ + FBEE_INTR_CONTROL = 0L; /* disable all interrupts */ #endif /* MACHINE_FIREBEE */ MCF_EPORT_EPPAR = 0xaaa8; /* all interrupts on falling edge */ @@ -237,7 +237,7 @@ void enable_coldfire_interrupts() MCF_EPORT_EPIER = 0xfe; /* int 1-7 on */ MCF_EPORT_EPFR = 0xff; /* clear all pending interrupts */ MCF_INTC_IMRL = 0xffffff00; /* int 1-7 on */ - //MCF_INTC_IMRH = 0xbffffffe; /* psc3 and timer 0 int on */ + //MCF_INTC_IMRH = 0xbffffffe; /* psc3 and timer 0 int on */ MCF_INTC_IMRH = 0; FBEE_INTR_ENABLE = FBEE_INTR_INT_IRQ7 | /* enable pseudo bus error */ FBEE_INTR_INT_MFP_IRQ6 | /* enable MFP interrupts */ @@ -255,7 +255,7 @@ void enable_coldfire_interrupts() void disable_coldfire_interrupts() { #if defined(MACHINE_FIREBEE) - FBEE_INTR_ENABLE = 0; /* disable all interrupts */ + FBEE_INTR_ENABLE = 0; /* disable all interrupts */ #endif /* MACHINE_FIREBEE */ MCF_EPORT_EPIER = 0x0; @@ -284,7 +284,7 @@ bool spurious_interrupt_handler(void *arg1, void *arg2) */ void init_isr(void) { - isr_init(); /* need to call that explicitely, otherwise isr table might be full */ + isr_init(); /* need to call that explicitely, otherwise isr table might be full */ /* * register spurious interrupt handler @@ -337,13 +337,13 @@ void init_isr(void) dbg("Error: unable to register isr for XLB PCI interrupts\r\n"); } - MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */ - MCF_XLB_XARB_IMR_MME | /* multiple master at prio 0 interrupt */ - MCF_XLB_XARB_IMR_TTAE | /* TT address only interrupt */ - MCF_XLB_XARB_IMR_TTRE | /* TT reserved interrupt enable */ - MCF_XLB_XARB_IMR_ECWE | /* external control word interrupt */ - MCF_XLB_XARB_IMR_TTME | /* TBST/TSIZ mismatch interrupt */ - MCF_XLB_XARB_IMR_BAE; /* bus activity tenure timeout interrupt */ + MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */ + MCF_XLB_XARB_IMR_MME | /* multiple master at prio 0 interrupt */ + MCF_XLB_XARB_IMR_TTAE | /* TT address only interrupt */ + MCF_XLB_XARB_IMR_TTRE | /* TT reserved interrupt enable */ + MCF_XLB_XARB_IMR_ECWE | /* external control word interrupt */ + MCF_XLB_XARB_IMR_TTME | /* TBST/TSIZ mismatch interrupt */ + MCF_XLB_XARB_IMR_BAE; /* bus activity tenure timeout interrupt */ if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 7, 1, pciarb_interrupt_handler, NULL, NULL)) { @@ -390,7 +390,7 @@ void BaS(void) NOP(); /* force pipeline sync */ xprintf("finished\r\n"); - #ifdef MACHINE_FIREBEE +#ifdef MACHINE_FIREBEE xprintf("IDE reset: "); /* IDE reset */ * (volatile uint8_t *) (0xffff8802 - 2) = 14; diff --git a/sys/fault_vectors.c b/sys/fault_vectors.c index 5e65b8c..c4ad5de 100644 --- a/sys/fault_vectors.c +++ b/sys/fault_vectors.c @@ -52,109 +52,134 @@ void fault_handler(uint32_t pc, uint32_t format_status) xprintf("fault_status: %x (", fault_status); switch (fault_status) { - case 0: - xprintf("not an access or address error nor an interrupted debug service routine"); - break; - case 1: - case 3: - case 11: - xprintf("reserved"); - break; - case 2: - xprintf("interrupt during a debug service routine for faults other than access errors"); - break; - case 4: - xprintf("error (for example, protection fault) on instruction fetch"); - break; - case 5: - xprintf("TLB miss on opword or instruction fetch"); - break; - case 6: - xprintf("TLB miss on extension word of instruction fetch"); - break; - case 7: - xprintf("IFP access error while executing in emulator mode"); - break; - case 8: - xprintf("error on data write"); - break; - case 9: - xprintf("error on attempted write to write-protected space"); - break; - case 10: - xprintf("TLB miss on data write"); - break; - case 12: - xprintf("error on data read"); - break; - case 13: - xprintf("attempted read, read-modify-write of protected space"); - break; - case 14: - xprintf("TLB miss on data read or read-modify-write"); - break; - case 15: - xprintf("OEP access error while executing in emulator mode"); + case 0: + xprintf("not an access or address error nor an interrupted debug service routine"); + break; + + case 1: + case 3: + case 11: + xprintf("reserved"); + break; + + case 2: + xprintf("interrupt during a debug service routine for faults other than access errors"); + break; + + case 4: + xprintf("error (for example, protection fault) on instruction fetch"); + break; + + case 5: + xprintf("TLB miss on opword or instruction fetch"); + break; + + case 6: + xprintf("TLB miss on extension word of instruction fetch"); + break; + + case 7: + xprintf("IFP access error while executing in emulator mode"); + break; + + case 8: + xprintf("error on data write"); + break; + + case 9: + xprintf("error on attempted write to write-protected space"); + break; + + case 10: + xprintf("TLB miss on data write"); + break; + + case 12: + xprintf("error on data read"); + break; + + case 13: + xprintf("attempted read, read-modify-write of protected space"); + break; + + case 14: + xprintf("TLB miss on data read or read-modify-write"); + break; + + case 15: + xprintf("OEP access error while executing in emulator mode"); } xprintf(")\r\n"); xprintf("vector = %d (", vector); switch (vector) { - case 2: - xprintf("access error"); - break; - case 3: - xprintf("address error"); - break; - case 4: - xprintf("illegal instruction"); - break; - case 5: - xprintf("divide by zero"); - break; - case 8: - xprintf("privilege violation"); - break; - case 9: - xprintf("trace"); - break; - case 10: - xprintf("unimplemented line-a opcode"); - break; - case 11: - xprintf("unimplemented line-f opcode"); - break; - case 12: - xprintf("non-PC breakpoint debug interrupt"); - break; - case 13: - xprintf("PC breakpoint debug interrupt"); - break; - case 14: - xprintf("format error"); - break; - case 24: - xprintf("spurious interrupt"); - break; - default: - if ( ((vector >= 6) && (vector <= 7)) || - ((vector >= 16) && (vector <= 23))) - { - xprintf("reserved"); - } - else if ((vector >= 25) && (vector <= 31)) - { - xprintf("level %d autovectored interrupt", fault_status - 24); - } - else if ((vector >= 32) && (vector <= 47)) - { - xprintf("trap #%d", vector - 32); - } - else - { - xprintf("unknown vector\r\n"); - } + case 2: + xprintf("access error"); + break; + + case 3: + xprintf("address error"); + break; + + case 4: + xprintf("illegal instruction"); + break; + + case 5: + xprintf("divide by zero"); + break; + + case 8: + xprintf("privilege violation"); + break; + + case 9: + xprintf("trace"); + break; + + case 10: + xprintf("unimplemented line-a opcode"); + break; + + case 11: + xprintf("unimplemented line-f opcode"); + break; + + case 12: + xprintf("non-PC breakpoint debug interrupt"); + break; + + case 13: + xprintf("PC breakpoint debug interrupt"); + break; + + case 14: + xprintf("format error"); + break; + + case 24: + xprintf("spurious interrupt"); + break; + + default: + if ( ((vector >= 6) && (vector <= 7)) || + ((vector >= 16) && (vector <= 23))) + { + xprintf("reserved"); + } + else if ((vector >= 25) && (vector <= 31)) + { + xprintf("level %d autovectored interrupt", fault_status - 24); + } + else if ((vector >= 32) && (vector <= 47)) + { + xprintf("trap #%d", vector - 32); + } + else + { + xprintf("unknown vector\r\n"); + } } xprintf(")\r\n"); xprintf("sr=%4x\r\n", sr); diff --git a/sys/mmu.c b/sys/mmu.c index 859a15a..abe2b9a 100644 --- a/sys/mmu.c +++ b/sys/mmu.c @@ -763,8 +763,7 @@ void mmu_init(void) } -uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc, - uint32_t format_status) +uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc, uint32_t format_status) { uint32_t fault = format_status & 0xc030000;