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read result of DSPI receiver fifo only after transfer has been finished completely (check with status register)

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Markus Fröschle
2013-05-13 14:06:36 +00:00
parent d3a40de4ce
commit 2ecd8c8a2f
1 changed files with 5 additions and 1 deletions
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6
BaS_gcc/sources/mmc.c
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@@ -101,8 +101,12 @@ static uint8_t xchg_spi(uint8_t byte)
while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until DSPI transfer complete */ while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until DSPI transfer complete */
MCF_DSPI_DSR = 0xffffffff; /* clear DSPI status register */ MCF_DSPI_DSR = 0xffffffff; /* clear DSPI status register */
while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait again for transfer to complete */
fifo = MCF_DSPI_DRFR; fifo = MCF_DSPI_DRFR;
MCF_DSPI_DSR = 0xffffffff;
MCF_DSPI_DSR = 0xffffffff; /* clear status register */
res = fifo & 0xff; res = fifo & 0xff;
return res; return res;
} }