bumped version for release
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@@ -29,7 +29,7 @@
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*/
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#define MAJOR_VERSION 0
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#define MINOR_VERSION 85
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#define MINOR_VERSION 86
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#endif /* VERSION_H_ */
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@@ -1,6 +1,6 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<!DOCTYPE QtCreatorProject>
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<!-- Written by QtCreator 3.0.1, 2014-07-31T19:42:50. -->
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<!-- Written by QtCreator 3.0.1, 2014-08-04T18:51:58. -->
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<qtcreator>
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<data>
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<variable>ProjectExplorer.Project.ActiveTarget</variable>
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@@ -1,2 +1,3 @@
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include/driver_vec.h
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sources/jtagwait.c
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Makefile
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@@ -5,7 +5,7 @@
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#include "driver_vec.h"
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#define FPGA_JTAG_LOADED_FLAG ((volatile int32_t *) 0xFF101000)
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#define FPGA_JTAG_LOADED_FLAG ((volatile bool *) 0xFF101000)
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#define _MBAR ((volatile uint8_t *) 0xFF000000)
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#define MCF_GPIO_PDDR_FEC1L ((volatile uint8_t *)(&_MBAR[0xA17]))
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@@ -30,7 +30,7 @@ static inline uint32_t set_ipl(uint32_t ipl)
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" lsr.l #8,%[ret]\r\n" /* shift them to position */
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: [ret] "=&d" (ret) /* output */
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: [ipl] "d" (ipl) /* input */
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: "d0" /* clobber */
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: "d0", "cc" /* clobber */
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);
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return ret;
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@@ -53,8 +53,11 @@ void wait_for_jtag(void)
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while (!(*MCF_GPIO_PPDSDR_FEC1L & FPGA_CONFIG)); /* wait for JTAG config load starting */
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while (!(*MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)); /* wait for JTAG config load finished */
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*FPGA_JTAG_LOADED_FLAG = 1; /* indicate jtag loaded FPGA config to BaS */
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*FPGA_JTAG_LOADED_FLAG = true; /* indicate jtag loaded FPGA config to BaS */
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/*
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* reboot after configuration finished
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*/
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__asm__ __volatile__(
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"jmp 0xE0000000\n\t"
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);
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