new run of quartus
This commit is contained in:
Markus Fröschle
@@ -1,6 +1,6 @@
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Assembler report for firebee1
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Assembler report for firebee1
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Wed Dec 15 02:25:13 2010
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Sat Oct 20 18:39:48 2012
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Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
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Quartus II 32-bit Version 12.0 Build 263 08/02/2012 Service Pack 2 SJ Web Edition
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---------------------
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---------------------
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@@ -10,8 +10,8 @@ Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
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2. Assembler Summary
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2. Assembler Summary
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3. Assembler Settings
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3. Assembler Settings
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4. Assembler Generated Files
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4. Assembler Generated Files
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5. Assembler Device Options: C:/FireBee/FPGA/firebee1.sof
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5. Assembler Device Options: firebee1.sof
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6. Assembler Device Options: C:/FireBee/FPGA/firebee1.rbf
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6. Assembler Device Options: firebee1.rbf
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7. Assembler Messages
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7. Assembler Messages
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@@ -19,7 +19,7 @@ Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
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----------------
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----------------
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; Legal Notice ;
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; Legal Notice ;
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----------------
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----------------
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Copyright (C) 1991-2010 Altera Corporation
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Copyright (C) 1991-2012 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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functions, and any output files from any of the foregoing
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@@ -38,7 +38,7 @@ applicable agreement for further details.
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+---------------------------------------------------------------+
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+---------------------------------------------------------------+
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; Assembler Summary ;
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; Assembler Summary ;
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+-----------------------+---------------------------------------+
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+-----------------------+---------------------------------------+
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; Assembler Status ; Successful - Wed Dec 15 02:25:13 2010 ;
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; Assembler Status ; Successful - Sat Oct 20 18:39:48 2012 ;
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; Revision Name ; firebee1 ;
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; Revision Name ; firebee1 ;
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; Top-level Entity Name ; firebee1 ;
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; Top-level Entity Name ; firebee1 ;
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; Family ; Cyclone III ;
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; Family ; Cyclone III ;
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@@ -78,51 +78,51 @@ applicable agreement for further details.
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+-----------------------------------------------------------------------------+------------+---------------+
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+-----------------------------------------------------------------------------+------------+---------------+
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+------------------------------+
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+---------------------------+
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; Assembler Generated Files ;
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; Assembler Generated Files ;
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+------------------------------+
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+---------------------------+
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; File Name ;
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; File Name ;
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+------------------------------+
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+---------------------------+
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; C:/FireBee/FPGA/firebee1.sof ;
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; firebee1.sof ;
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; C:/FireBee/FPGA/firebee1.rbf ;
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; firebee1.rbf ;
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+------------------------------+
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+---------------------------+
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+--------------------------------------------------------+
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+----------------------------------------+
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; Assembler Device Options: C:/FireBee/FPGA/firebee1.sof ;
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; Assembler Device Options: firebee1.sof ;
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+----------------+---------------------------------------+
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+----------------+-----------------------+
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; Option ; Setting ;
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; Option ; Setting ;
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+----------------+---------------------------------------+
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+----------------+-----------------------+
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; Device ; EP3C40F484C6 ;
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; Device ; EP3C40F484C6 ;
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; JTAG usercode ; 0xFFFFFFFF ;
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; JTAG usercode ; 0xFFFFFFFF ;
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; Checksum ; 0x0085E8C6 ;
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; Checksum ; 0x008CFA9D ;
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+----------------+---------------------------------------+
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+----------------+-----------------------+
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+--------------------------------------------------------+
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+----------------------------------------+
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; Assembler Device Options: C:/FireBee/FPGA/firebee1.rbf ;
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; Assembler Device Options: firebee1.rbf ;
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+---------------------+----------------------------------+
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+---------------------+------------------+
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; Option ; Setting ;
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; Option ; Setting ;
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+---------------------+----------------------------------+
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+---------------------+------------------+
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; Raw Binary File ; ;
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; Raw Binary File ; ;
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; Compression Ratio ; 2 ;
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; Compression Ratio ; 2 ;
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+---------------------+----------------------------------+
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+---------------------+------------------+
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+--------------------+
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+--------------------+
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; Assembler Messages ;
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; Assembler Messages ;
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+--------------------+
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+--------------------+
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Info: *******************************************************************
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Info: *******************************************************************
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Info: Running Quartus II Assembler
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Info: Running Quartus II 32-bit Assembler
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Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
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Info: Version 12.0 Build 263 08/02/2012 Service Pack 2 SJ Web Edition
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Info: Processing started: Wed Dec 15 02:25:08 2010
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Info: Processing started: Sat Oct 20 18:39:42 2012
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Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
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Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
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Info: Writing out detailed assembly data for power analysis
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Info (115031): Writing out detailed assembly data for power analysis
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Info: Assembler is generating device programming files
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Info (115030): Assembler is generating device programming files
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Info: Quartus II Assembler was successful. 0 errors, 0 warnings
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Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings
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Info: Peak virtual memory: 291 megabytes
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Info: Peak virtual memory: 373 megabytes
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Info: Processing ended: Wed Dec 15 02:25:13 2010
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Info: Processing ended: Sat Oct 20 18:39:49 2012
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Info: Elapsed time: 00:00:05
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Info: Elapsed time: 00:00:07
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Info: Total CPU time (on all processors): 00:00:05
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Info: Total CPU time (on all processors): 00:00:06
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@@ -1 +1 @@
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Wed Dec 15 02:25:24 2010
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Sat Oct 20 18:40:36 2012
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File diff suppressed because it is too large
Load Diff
@@ -1,14 +1,14 @@
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Fitter Status : Successful - Wed Dec 15 02:25:02 2010
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Fitter Status : Successful - Sat Oct 20 18:39:28 2012
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Quartus II Version : 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
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Quartus II 32-bit Version : 12.0 Build 263 08/02/2012 SP 2 SJ Web Edition
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Revision Name : firebee1
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Revision Name : firebee1
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Top-level Entity Name : firebee1
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Top-level Entity Name : firebee1
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Family : Cyclone III
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Family : Cyclone III
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Device : EP3C40F484C6
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Device : EP3C40F484C6
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Timing Models : Final
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Timing Models : Final
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Total logic elements : 9,526 / 39,600 ( 24 % )
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Total logic elements : 9,435 / 39,600 ( 24 % )
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Total combinational functions : 8,061 / 39,600 ( 20 % )
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Total combinational functions : 7,967 / 39,600 ( 20 % )
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Dedicated logic registers : 4,563 / 39,600 ( 12 % )
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Dedicated logic registers : 4,622 / 39,600 ( 12 % )
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Total registers : 4749
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Total registers : 4750
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Total pins : 295 / 332 ( 89 % )
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Total pins : 295 / 332 ( 89 % )
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Total virtual pins : 0
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Total virtual pins : 0
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Total memory bits : 109,344 / 1,161,216 ( 9 % )
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Total memory bits : 109,344 / 1,161,216 ( 9 % )
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@@ -1,6 +1,6 @@
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Flow report for firebee1
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Flow report for firebee1
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Wed Dec 15 02:25:22 2010
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Sat Oct 20 18:40:30 2012
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Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
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Quartus II 32-bit Version 12.0 Build 263 08/02/2012 Service Pack 2 SJ Web Edition
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---------------------
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---------------------
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@@ -19,7 +19,7 @@ Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
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----------------
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----------------
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; Legal Notice ;
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; Legal Notice ;
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----------------
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----------------
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Copyright (C) 1991-2010 Altera Corporation
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Copyright (C) 1991-2012 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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Your use of Altera Corporation's design tools, logic functions
|
||||||
and other software and tools, and its AMPP partner logic
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and other software and tools, and its AMPP partner logic
|
||||||
functions, and any output files from any of the foregoing
|
functions, and any output files from any of the foregoing
|
||||||
@@ -35,27 +35,26 @@ applicable agreement for further details.
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+-----------------------------------------------------------------------------------+
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+------------------------------------------------------------------------------------+
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; Flow Summary ;
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; Flow Summary ;
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+------------------------------------+----------------------------------------------+
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+------------------------------------+-----------------------------------------------+
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; Flow Status ; Successful - Wed Dec 15 02:25:21 2010 ;
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; Flow Status ; Successful - Sat Oct 20 18:39:48 2012 ;
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; Quartus II Version ; 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition ;
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; Quartus II 32-bit Version ; 12.0 Build 263 08/02/2012 SP 2 SJ Web Edition ;
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; Revision Name ; firebee1 ;
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; Revision Name ; firebee1 ;
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; Top-level Entity Name ; firebee1 ;
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; Top-level Entity Name ; firebee1 ;
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; Family ; Cyclone III ;
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; Family ; Cyclone III ;
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; Device ; EP3C40F484C6 ;
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; Device ; EP3C40F484C6 ;
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; Timing Models ; Final ;
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; Timing Models ; Final ;
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; Met timing requirements ; No ;
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; Total logic elements ; 9,435 / 39,600 ( 24 % ) ;
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; Total logic elements ; 9,526 / 39,600 ( 24 % ) ;
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; Total combinational functions ; 7,967 / 39,600 ( 20 % ) ;
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; Total combinational functions ; 8,061 / 39,600 ( 20 % ) ;
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; Dedicated logic registers ; 4,622 / 39,600 ( 12 % ) ;
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; Dedicated logic registers ; 4,563 / 39,600 ( 12 % ) ;
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; Total registers ; 4750 ;
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; Total registers ; 4749 ;
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; Total pins ; 295 / 332 ( 89 % ) ;
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; Total pins ; 295 / 332 ( 89 % ) ;
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; Total virtual pins ; 0 ;
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; Total virtual pins ; 0 ;
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; Total memory bits ; 109,344 / 1,161,216 ( 9 % ) ;
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; Total memory bits ; 109,344 / 1,161,216 ( 9 % ) ;
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; Embedded Multiplier 9-bit elements ; 6 / 252 ( 2 % ) ;
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; Embedded Multiplier 9-bit elements ; 6 / 252 ( 2 % ) ;
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; Total PLLs ; 4 / 4 ( 100 % ) ;
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; Total PLLs ; 4 / 4 ( 100 % ) ;
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+------------------------------------+----------------------------------------------+
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+------------------------------------+-----------------------------------------------+
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+-----------------------------------------+
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+-----------------------------------------+
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@@ -63,7 +62,7 @@ applicable agreement for further details.
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+-------------------+---------------------+
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+-------------------+---------------------+
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; Option ; Setting ;
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; Option ; Setting ;
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+-------------------+---------------------+
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+-------------------+---------------------+
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; Start date & time ; 12/15/2010 02:20:37 ;
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; Start date & time ; 10/20/2012 18:20:26 ;
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; Main task ; Compilation ;
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; Main task ; Compilation ;
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; Revision Name ; firebee1 ;
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; Revision Name ; firebee1 ;
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+-------------------+---------------------+
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+-------------------+---------------------+
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@@ -74,7 +73,7 @@ applicable agreement for further details.
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+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
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+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
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; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
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; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
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+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
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+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
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; COMPILER_SIGNATURE_ID ; 150661768621.129237603704664 ; -- ; -- ; -- ;
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; COMPILER_SIGNATURE_ID ; 247163806132475.135075002618816 ; -- ; -- ; -- ;
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; CYCLONEII_OPTIMIZATION_TECHNIQUE ; Speed ; Balanced ; -- ; -- ;
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; CYCLONEII_OPTIMIZATION_TECHNIQUE ; Speed ; Balanced ; -- ; -- ;
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; FMAX_REQUIREMENT ; 30 ns ; -- ; -- ; -- ;
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; FMAX_REQUIREMENT ; 30 ns ; -- ; -- ; -- ;
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; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
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; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
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@@ -180,6 +179,7 @@ applicable agreement for further details.
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; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
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; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
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; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
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; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
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; MISC_FILE ; C:/firebee/FPGA/firebee1.dpf ; -- ; -- ; -- ;
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; MISC_FILE ; C:/firebee/FPGA/firebee1.dpf ; -- ; -- ; -- ;
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; MISC_FILE ; C:/FireBee/FPGA/firebee1.dpf ; -- ; -- ; -- ;
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; MISC_FILE ; altpll1.bsf ; -- ; -- ; -- ;
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; MISC_FILE ; altpll1.bsf ; -- ; -- ; -- ;
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; MISC_FILE ; altpll1.inc ; -- ; -- ; -- ;
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; MISC_FILE ; altpll1.inc ; -- ; -- ; -- ;
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; MISC_FILE ; altpll1.cmp ; -- ; -- ; -- ;
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; MISC_FILE ; altpll1.cmp ; -- ; -- ; -- ;
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@@ -316,7 +316,6 @@ applicable agreement for further details.
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; MISC_FILE ; Video/lpm_muxDZ.cmp ; -- ; -- ; -- ;
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; MISC_FILE ; Video/lpm_muxDZ.cmp ; -- ; -- ; -- ;
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; MISC_FILE ; Video/lpm_muxVDM.bsf ; -- ; -- ; -- ;
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; MISC_FILE ; Video/lpm_muxVDM.bsf ; -- ; -- ; -- ;
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; MISC_FILE ; Video/lpm_muxVDM.cmp ; -- ; -- ; -- ;
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; MISC_FILE ; Video/lpm_muxVDM.cmp ; -- ; -- ; -- ;
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; MISC_FILE ; C:/FireBee/FPGA/firebee1.dpf ; -- ; -- ; -- ;
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; MISC_FILE ; altpll_reconfig1.tdf ; -- ; -- ; -- ;
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; MISC_FILE ; altpll_reconfig1.tdf ; -- ; -- ; -- ;
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; MISC_FILE ; altpll_reconfig1.bsf ; -- ; -- ; -- ;
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; MISC_FILE ; altpll_reconfig1.bsf ; -- ; -- ; -- ;
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; MISC_FILE ; altpll_reconfig1.inc ; -- ; -- ; -- ;
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; MISC_FILE ; altpll_reconfig1.inc ; -- ; -- ; -- ;
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@@ -328,6 +327,7 @@ applicable agreement for further details.
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; MISC_FILE ; altpll4.ppf ; -- ; -- ; -- ;
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; MISC_FILE ; altpll4.ppf ; -- ; -- ; -- ;
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; NOMINAL_CORE_SUPPLY_VOLTAGE ; 1.2V ; -- ; -- ; -- ;
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; NOMINAL_CORE_SUPPLY_VOLTAGE ; 1.2V ; -- ; -- ; -- ;
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; PARTITION_COLOR ; 16764057 ; -- ; -- ; Top ;
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; PARTITION_COLOR ; 16764057 ; -- ; -- ; Top ;
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; PARTITION_FITTER_PRESERVATION_LEVEL ; PLACEMENT_AND_ROUTING ; -- ; -- ; Top ;
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; PARTITION_NETLIST_TYPE ; SOURCE ; -- ; -- ; Top ;
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; PARTITION_NETLIST_TYPE ; SOURCE ; -- ; -- ; Top ;
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; PHYSICAL_SYNTHESIS_COMBO_LOGIC ; On ; Off ; -- ; -- ;
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; PHYSICAL_SYNTHESIS_COMBO_LOGIC ; On ; Off ; -- ; -- ;
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; PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ; On ; Off ; -- ; -- ;
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; PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ; On ; Off ; -- ; -- ;
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@@ -339,33 +339,32 @@ applicable agreement for further details.
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; TPD_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
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; TPD_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
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; TSU_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
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; TSU_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
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; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off ; -- ; -- ; eda_blast_fpga ;
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; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off ; -- ; -- ; eda_blast_fpga ;
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; USE_TIMEQUEST_TIMING_ANALYZER ; Off ; On ; -- ; -- ;
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+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
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+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
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+-----------------------------------------------------------------------------------------------------------------------------+
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+-------------------------------------------------------------------------------------------------------------------------------+
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; Flow Elapsed Time ;
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; Flow Elapsed Time ;
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+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
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+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
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; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
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; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
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+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
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+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
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; Analysis & Synthesis ; 00:01:16 ; 1.0 ; 347 MB ; 00:01:17 ;
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; Analysis & Synthesis ; 00:01:48 ; 1.0 ; -- ; 00:01:46 ;
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; Fitter ; 00:03:05 ; 1.0 ; 334 MB ; 00:03:07 ;
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; Fitter ; 00:17:04 ; 1.0 ; -- ; 00:17:00 ;
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; Assembler ; 00:00:05 ; 1.0 ; 291 MB ; 00:00:04 ;
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; Assembler ; 00:00:06 ; 1.0 ; -- ; 00:00:06 ;
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; Classic Timing Analyzer ; 00:00:07 ; 1.0 ; 227 MB ; 00:00:09 ;
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; TimeQuest Timing Analyzer ; 00:00:49 ; 1.0 ; -- ; 00:00:48 ;
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||||||
; Total ; 00:04:33 ; -- ; -- ; 00:04:37 ;
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; Total ; 00:19:47 ; -- ; -- ; 00:19:40 ;
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||||||
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
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+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
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||||||
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||||||
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||||||
+------------------------------------------------------------------------------------------+
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+---------------------------------------------------------------------------------------------+
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; Flow OS Summary ;
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; Flow OS Summary ;
|
||||||
+-------------------------+------------------+---------------+------------+----------------+
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+---------------------------+------------------+----------------+------------+----------------+
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||||||
; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
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; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
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||||||
+-------------------------+------------------+---------------+------------+----------------+
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+---------------------------+------------------+----------------+------------+----------------+
|
||||||
; Analysis & Synthesis ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
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; Analysis & Synthesis ; bums ; Ubuntu 12.04.1 ; 12 ; x86_64 ;
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; Fitter ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
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; Fitter ; bums ; Ubuntu 12.04.1 ; 12 ; x86_64 ;
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; Assembler ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
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; Assembler ; bums ; Ubuntu 12.04.1 ; 12 ; x86_64 ;
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||||||
; Classic Timing Analyzer ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
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; TimeQuest Timing Analyzer ; bums ; Ubuntu 12.04.1 ; 12 ; x86_64 ;
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||||||
+-------------------------+------------------+---------------+------------+----------------+
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+---------------------------+------------------+----------------+------------+----------------+
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||||||
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|
||||||
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|
||||||
------------
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------------
|
||||||
@@ -374,7 +373,7 @@ applicable agreement for further details.
|
|||||||
quartus_map --read_settings_files=on --write_settings_files=off firebeei1 -c firebee1
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quartus_map --read_settings_files=on --write_settings_files=off firebeei1 -c firebee1
|
||||||
quartus_fit --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
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quartus_fit --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
|
||||||
quartus_asm --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
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quartus_asm --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
|
||||||
quartus_tan --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1 --timing_analysis_only
|
quartus_sta firebeei1 -c firebee1
|
||||||
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|
||||||
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|
||||||
|
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
@@ -1,12 +1,12 @@
|
|||||||
Analysis & Synthesis Status : Successful - Wed Dec 15 02:21:55 2010
|
Analysis & Synthesis Status : Successful - Sat Oct 20 18:22:17 2012
|
||||||
Quartus II Version : 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
|
Quartus II 32-bit Version : 12.0 Build 263 08/02/2012 SP 2 SJ Web Edition
|
||||||
Revision Name : firebee1
|
Revision Name : firebee1
|
||||||
Top-level Entity Name : firebee1
|
Top-level Entity Name : firebee1
|
||||||
Family : Cyclone III
|
Family : Cyclone III
|
||||||
Total logic elements : 10,706
|
Total logic elements : 10,604
|
||||||
Total combinational functions : 8,060
|
Total combinational functions : 7,954
|
||||||
Dedicated logic registers : 4,612
|
Dedicated logic registers : 4,622
|
||||||
Total registers : 4740
|
Total registers : 4750
|
||||||
Total pins : 295
|
Total pins : 295
|
||||||
Total virtual pins : 0
|
Total virtual pins : 0
|
||||||
Total memory bits : 109,344
|
Total memory bits : 109,344
|
||||||
|
|||||||
@@ -1,4 +1,4 @@
|
|||||||
-- Copyright (C) 1991-2010 Altera Corporation
|
-- Copyright (C) 1991-2012 Altera Corporation
|
||||||
-- Your use of Altera Corporation's design tools, logic functions
|
-- Your use of Altera Corporation's design tools, logic functions
|
||||||
-- and other software and tools, and its AMPP partner logic
|
-- and other software and tools, and its AMPP partner logic
|
||||||
-- functions, and any output files from any of the foregoing
|
-- functions, and any output files from any of the foregoing
|
||||||
@@ -48,10 +48,7 @@
|
|||||||
-- This pin should be connected to GND. It may also be connected to a
|
-- This pin should be connected to GND. It may also be connected to a
|
||||||
-- valid signal on the board (low, high, or toggling) if that signal
|
-- valid signal on the board (low, high, or toggling) if that signal
|
||||||
-- is required for a different revision of the design.
|
-- is required for a different revision of the design.
|
||||||
-- GND* : Unused I/O pin. For transceiver I/O banks, connect each pin marked GND*
|
-- GND* : Unused I/O pin. Connect each pin marked GND* directly to GND
|
||||||
-- either individually through a 10k Ohm resistor to GND or tie all pins
|
|
||||||
-- together and connect through a single 10k Ohm resistor to GND.
|
|
||||||
-- For non-transceiver I/O banks, connect each pin marked GND* directly to GND
|
|
||||||
-- or leave it unconnected.
|
-- or leave it unconnected.
|
||||||
-- RESERVED : Unused I/O pin, which MUST be left unconnected.
|
-- RESERVED : Unused I/O pin, which MUST be left unconnected.
|
||||||
-- RESERVED_INPUT : Pin is tri-stated and should be connected to the board.
|
-- RESERVED_INPUT : Pin is tri-stated and should be connected to the board.
|
||||||
@@ -66,7 +63,7 @@
|
|||||||
-- Pin directions (input, output or bidir) are based on device operating in user mode.
|
-- Pin directions (input, output or bidir) are based on device operating in user mode.
|
||||||
---------------------------------------------------------------------------------
|
---------------------------------------------------------------------------------
|
||||||
|
|
||||||
Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
|
Quartus II 32-bit Version 12.0 Build 263 08/02/2012 Service Pack 2 SJ Web Edition
|
||||||
CHIP "firebee1" ASSIGNED TO AN: EP3C40F484C6
|
CHIP "firebee1" ASSIGNED TO AN: EP3C40F484C6
|
||||||
|
|
||||||
Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
|
Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
|
||||||
|
|||||||
@@ -41,173 +41,8 @@
|
|||||||
# ========================
|
# ========================
|
||||||
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 8.1
|
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 8.1
|
||||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:07:29 SEPTEMBER 03, 2009"
|
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:07:29 SEPTEMBER 03, 2009"
|
||||||
set_global_assignment -name LAST_QUARTUS_VERSION "9.1 SP2"
|
set_global_assignment -name LAST_QUARTUS_VERSION "12.0 SP2"
|
||||||
set_global_assignment -name MISC_FILE "C:/firebee/FPGA/firebee1.dpf"
|
set_global_assignment -name MISC_FILE "C:/firebee/FPGA/firebee1.dpf"
|
||||||
set_global_assignment -name SOURCE_FILE Video/altddio_bidir0.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_control.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/altddio_out0.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_pkg.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/altddio_out1.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_registers.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/altddio_out2.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_soc_top.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_top.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_am_detector.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo0.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/dcfifo0.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/altdpram2.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo1.cmp
|
|
||||||
set_global_assignment -name AHDL_FILE Video/DDR_CTR.tdf
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri0.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_bustri0.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_control.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_crc_logic.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_digital_pll.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_pkg.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_registers.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top_soc.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_transceiver.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri5.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_bustri5.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri6.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri7.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_bustri7.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_compare1.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top_soc.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_gpio.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_constant2.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_constant3.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_pkg.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_constant4.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_timers.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top_soc.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_ctrl.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_rx.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_top.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_tx.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_pkg.vhd
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff4.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff5.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_wave.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff6.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE lpm_latch0.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE lpm_latch0.cmp
|
|
||||||
set_global_assignment -name QIP_FILE altpll1.qip
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_fifoDZ.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_fifoDZ.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_latch1.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux0.cmp
|
|
||||||
set_global_assignment -name QIP_FILE altpll2.qip
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux1.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux2.cmp
|
|
||||||
set_global_assignment -name QIP_FILE altpll3.qip
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux3.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux4.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/altdpram0.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux5.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/altdpram0.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_mux6.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/altdpram1.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ2.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_muxDZ2.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_muxDZ.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE altpll0.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri1.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg1.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff0.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg2.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri2.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg3.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE altpll2.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg4.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri3.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg5.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_bustri3.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg6.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_bustri4.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE altpll2.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_constant0.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE altpll3.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_constant1.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE altpll3.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE lpm_counter0.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_ff0.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff1.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg0.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_ff1.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff2.cmp
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_ff3.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_ff3.vhd
|
|
||||||
set_global_assignment -name AHDL_FILE Video/VIDEO_MOD_MUX_CLUTCTR.tdf
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_ff2.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE Video/lpm_fifo_dc0.cmp
|
|
||||||
set_global_assignment -name VHDL_FILE Video/lpm_fifo_dc0.vhd
|
|
||||||
set_global_assignment -name BDF_FILE Video/Video.bdf
|
|
||||||
set_global_assignment -name VHDL_FILE altpll1.vhd
|
|
||||||
set_global_assignment -name SOURCE_FILE altpll1.cmp
|
|
||||||
set_global_assignment -name BDF_FILE firebee1.bdf
|
|
||||||
set_global_assignment -name QIP_FILE altpll0.qip
|
|
||||||
set_global_assignment -name QIP_FILE lpm_counter0.qip
|
|
||||||
set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\FalconIO_SDCard_IDE_CF\\FalconIO_SDCard_IDE_CF.vhd"
|
|
||||||
set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\DSP\\DSP.vhd"
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg0.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/altdpram0.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_bustri1.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/altdpram1.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_bustri2.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_bustri4.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_constant0.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_constant1.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_mux0.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_mux1.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_mux2.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_constant2.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/altdpram2.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_bustri6.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_mux3.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_mux4.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_constant3.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg1.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_latch1.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_constant4.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg2.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_compare1.qip
|
|
||||||
set_global_assignment -name AHDL_FILE "C:\\firebee\\FPGA\\Interrupt_Handler\\interrupt_handler.tdf"
|
|
||||||
set_global_assignment -name QIP_FILE lpm_bustri_LONG.qip
|
|
||||||
set_global_assignment -name QIP_FILE lpm_bustri_BYT.qip
|
|
||||||
set_global_assignment -name QIP_FILE lpm_bustri_WORD.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_ff4.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_ff5.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_ff6.qip
|
|
||||||
set_global_assignment -name VECTOR_WAVEFORM_FILE firebee1.vwf
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg3.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/altddio_bidir0.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/altddio_out0.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_mux5.qip
|
|
||||||
set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\Video\\BLITTER\\BLITTER.vhd"
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg5.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg6.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_shiftreg4.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/altddio_out1.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/altddio_out2.qip
|
|
||||||
set_global_assignment -name QIP_FILE altddio_out3.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_mux6.qip
|
|
||||||
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF_pgk.vhd
|
|
||||||
set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo0.qip
|
|
||||||
set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo1.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_muxDZ.qip
|
|
||||||
set_global_assignment -name QIP_FILE Video/lpm_muxVDM.qip
|
|
||||||
set_global_assignment -name SOURCE_FILE firebee1.fit.summary_alt
|
|
||||||
|
|
||||||
# Pin & Location Assignments
|
# Pin & Location Assignments
|
||||||
# ==========================
|
# ==========================
|
||||||
@@ -515,7 +350,6 @@ set_global_assignment -name TSU_REQUIREMENT "1 ns"
|
|||||||
set_global_assignment -name TCO_REQUIREMENT "1 ns"
|
set_global_assignment -name TCO_REQUIREMENT "1 ns"
|
||||||
set_global_assignment -name TH_REQUIREMENT "1 ns"
|
set_global_assignment -name TH_REQUIREMENT "1 ns"
|
||||||
set_global_assignment -name FMAX_REQUIREMENT "30 ns"
|
set_global_assignment -name FMAX_REQUIREMENT "30 ns"
|
||||||
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER OFF
|
|
||||||
|
|
||||||
# Analysis & Synthesis Assignments
|
# Analysis & Synthesis Assignments
|
||||||
# ================================
|
# ================================
|
||||||
@@ -733,8 +567,174 @@ set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
|
|||||||
# end ENTITY(firebee1)
|
# end ENTITY(firebee1)
|
||||||
# --------------------
|
# --------------------
|
||||||
set_global_assignment -name MISC_FILE "C:/FireBee/FPGA/firebee1.dpf"
|
set_global_assignment -name MISC_FILE "C:/FireBee/FPGA/firebee1.dpf"
|
||||||
set_global_assignment -name QIP_FILE altpll_reconfig1.qip
|
|
||||||
set_global_assignment -name QIP_FILE altpll4.qip
|
|
||||||
set_location_assignment PIN_E5 -to LPDIR
|
set_location_assignment PIN_E5 -to LPDIR
|
||||||
set_location_assignment PIN_B11 -to nRSTO_MCF
|
set_location_assignment PIN_B11 -to nRSTO_MCF
|
||||||
|
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
|
||||||
|
set_global_assignment -name AHDL_FILE Interrupt_Handler/interrupt_handler.tdf
|
||||||
|
set_global_assignment -name VHDL_FILE DSP/DSP.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE Video/BLITTER/BLITTER.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/altddio_bidir0.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_control.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/altddio_out0.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_pkg.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/altddio_out1.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_registers.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/altddio_out2.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_soc_top.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_top.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_am_detector.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo0.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/dcfifo0.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/altdpram2.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo1.cmp
|
||||||
|
set_global_assignment -name AHDL_FILE Video/DDR_CTR.tdf
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_bustri0.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_bustri0.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_control.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_crc_logic.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_digital_pll.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_pkg.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_registers.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top_soc.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_transceiver.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_bustri5.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_bustri5.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_bustri6.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_bustri7.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_bustri7.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_compare1.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top_soc.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_gpio.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_constant2.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_constant3.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_pkg.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_constant4.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_timers.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top_soc.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_ctrl.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_rx.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_top.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_tx.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_pkg.vhd
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_ff4.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_ff5.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_wave.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_ff6.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE lpm_latch0.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE lpm_latch0.cmp
|
||||||
|
set_global_assignment -name QIP_FILE altpll1.qip
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_fifoDZ.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_fifoDZ.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_latch1.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_mux0.cmp
|
||||||
|
set_global_assignment -name QIP_FILE altpll2.qip
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_mux1.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_mux2.cmp
|
||||||
|
set_global_assignment -name QIP_FILE altpll3.qip
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_mux3.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_mux4.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/altdpram0.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_mux5.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/altdpram0.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_mux6.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/altdpram1.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ2.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_muxDZ2.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_muxDZ.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE altpll0.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_bustri1.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg1.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_ff0.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg2.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_bustri2.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg3.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE altpll2.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg4.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_bustri3.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg5.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_bustri3.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg6.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_bustri4.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE altpll2.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_constant0.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE altpll3.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_constant1.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE altpll3.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE lpm_counter0.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_ff0.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_ff1.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg0.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_ff1.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_ff2.cmp
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_ff3.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_ff3.vhd
|
||||||
|
set_global_assignment -name AHDL_FILE Video/VIDEO_MOD_MUX_CLUTCTR.tdf
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_ff2.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE Video/lpm_fifo_dc0.cmp
|
||||||
|
set_global_assignment -name VHDL_FILE Video/lpm_fifo_dc0.vhd
|
||||||
|
set_global_assignment -name BDF_FILE Video/Video.bdf
|
||||||
|
set_global_assignment -name VHDL_FILE altpll1.vhd
|
||||||
|
set_global_assignment -name SOURCE_FILE altpll1.cmp
|
||||||
|
set_global_assignment -name BDF_FILE firebee1.bdf
|
||||||
|
set_global_assignment -name QIP_FILE altpll0.qip
|
||||||
|
set_global_assignment -name QIP_FILE lpm_counter0.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_shiftreg0.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/altdpram0.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_bustri1.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/altdpram1.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_bustri2.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_bustri4.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_constant0.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_constant1.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_mux0.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_mux1.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_mux2.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_constant2.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/altdpram2.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_bustri6.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_mux3.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_mux4.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_constant3.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_shiftreg1.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_latch1.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_constant4.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_shiftreg2.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_compare1.qip
|
||||||
|
set_global_assignment -name QIP_FILE lpm_bustri_LONG.qip
|
||||||
|
set_global_assignment -name QIP_FILE lpm_bustri_BYT.qip
|
||||||
|
set_global_assignment -name QIP_FILE lpm_bustri_WORD.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_ff4.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_ff5.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_ff6.qip
|
||||||
|
set_global_assignment -name VECTOR_WAVEFORM_FILE firebee1.vwf
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_shiftreg3.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/altddio_bidir0.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/altddio_out0.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_mux5.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_shiftreg5.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_shiftreg6.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_shiftreg4.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/altddio_out1.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/altddio_out2.qip
|
||||||
|
set_global_assignment -name QIP_FILE altddio_out3.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_mux6.qip
|
||||||
|
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF_pgk.vhd
|
||||||
|
set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo0.qip
|
||||||
|
set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo1.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_muxDZ.qip
|
||||||
|
set_global_assignment -name QIP_FILE Video/lpm_muxVDM.qip
|
||||||
|
set_global_assignment -name SOURCE_FILE firebee1.fit.summary_alt
|
||||||
|
set_global_assignment -name QIP_FILE altpll_reconfig1.qip
|
||||||
|
set_global_assignment -name QIP_FILE altpll4.qip
|
||||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||||
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Reference in New Issue
Block a user