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new run of quartus

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This commit is contained in:
Markus Fröschle
2012-11-16 19:32:30 +00:00
parent 4b2c72a292
commit 1c8a4d0dcd
12 changed files with 17600 additions and 16733 deletions
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256
FPGA_quartus/firebee1.asm.rpt
View File

@@ -1,128 +1,128 @@
Assembler report for firebee1
Wed Dec 15 02:25:13 2010
Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Assembler Summary
3. Assembler Settings
4. Assembler Generated Files
5. Assembler Device Options: C:/FireBee/FPGA/firebee1.sof
6. Assembler Device Options: C:/FireBee/FPGA/firebee1.rbf
7. Assembler Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2010 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+---------------------------------------------------------------+
; Assembler Summary ;
+-----------------------+---------------------------------------+
; Assembler Status ; Successful - Wed Dec 15 02:25:13 2010 ;
; Revision Name ; firebee1 ;
; Top-level Entity Name ; firebee1 ;
; Family ; Cyclone III ;
; Device ; EP3C40F484C6 ;
+-----------------------+---------------------------------------+
+----------------------------------------------------------------------------------------------------------+
; Assembler Settings ;
+-----------------------------------------------------------------------------+------------+---------------+
; Option ; Setting ; Default Value ;
+-----------------------------------------------------------------------------+------------+---------------+
; Generate Raw Binary File (.rbf) For Target Device ; On ; Off ;
; Hexadecimal Output File start address ; 0XE0700000 ; 0 ;
; Use smart compilation ; Off ; Off ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
; Enable compact report table ; Off ; Off ;
; Generate compressed bitstreams ; On ; On ;
; Compression mode ; Off ; Off ;
; Clock source for configuration device ; Internal ; Internal ;
; Clock frequency of the configuration device ; 10 MHZ ; 10 MHz ;
; Divide clock frequency by ; 1 ; 1 ;
; Auto user code ; Off ; Off ;
; Use configuration device ; Off ; Off ;
; Configuration device ; Auto ; Auto ;
; Configuration device auto user code ; Off ; Off ;
; Generate Tabular Text File (.ttf) For Target Device ; Off ; Off ;
; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device ; Off ; Off ;
; Hexadecimal Output File count direction ; Up ; Up ;
; Release clears before tri-states ; Off ; Off ;
; Auto-restart configuration after error ; On ; On ;
; Enable OCT_DONE ; Off ; Off ;
; Generate Serial Vector Format File (.svf) for Target Device ; Off ; Off ;
; Generate a JEDEC STAPL Format File (.jam) for Target Device ; Off ; Off ;
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; Off ; Off ;
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On ; On ;
+-----------------------------------------------------------------------------+------------+---------------+
+------------------------------+
; Assembler Generated Files ;
+------------------------------+
; File Name ;
+------------------------------+
; C:/FireBee/FPGA/firebee1.sof ;
; C:/FireBee/FPGA/firebee1.rbf ;
+------------------------------+
+--------------------------------------------------------+
; Assembler Device Options: C:/FireBee/FPGA/firebee1.sof ;
+----------------+---------------------------------------+
; Option ; Setting ;
+----------------+---------------------------------------+
; Device ; EP3C40F484C6 ;
; JTAG usercode ; 0xFFFFFFFF ;
; Checksum ; 0x0085E8C6 ;
+----------------+---------------------------------------+
+--------------------------------------------------------+
; Assembler Device Options: C:/FireBee/FPGA/firebee1.rbf ;
+---------------------+----------------------------------+
; Option ; Setting ;
+---------------------+----------------------------------+
; Raw Binary File ; ;
; Compression Ratio ; 2 ;
+---------------------+----------------------------------+
+--------------------+
; Assembler Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Assembler
Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
Info: Processing started: Wed Dec 15 02:25:08 2010
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
Info: Writing out detailed assembly data for power analysis
Info: Assembler is generating device programming files
Info: Quartus II Assembler was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 291 megabytes
Info: Processing ended: Wed Dec 15 02:25:13 2010
Info: Elapsed time: 00:00:05
Info: Total CPU time (on all processors): 00:00:05
Assembler report for firebee1
Sat Oct 20 18:39:48 2012
Quartus II 32-bit Version 12.0 Build 263 08/02/2012 Service Pack 2 SJ Web Edition
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Assembler Summary
3. Assembler Settings
4. Assembler Generated Files
5. Assembler Device Options: firebee1.sof
6. Assembler Device Options: firebee1.rbf
7. Assembler Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2012 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+---------------------------------------------------------------+
; Assembler Summary ;
+-----------------------+---------------------------------------+
; Assembler Status ; Successful - Sat Oct 20 18:39:48 2012 ;
; Revision Name ; firebee1 ;
; Top-level Entity Name ; firebee1 ;
; Family ; Cyclone III ;
; Device ; EP3C40F484C6 ;
+-----------------------+---------------------------------------+
+----------------------------------------------------------------------------------------------------------+
; Assembler Settings ;
+-----------------------------------------------------------------------------+------------+---------------+
; Option ; Setting ; Default Value ;
+-----------------------------------------------------------------------------+------------+---------------+
; Generate Raw Binary File (.rbf) For Target Device ; On ; Off ;
; Hexadecimal Output File start address ; 0XE0700000 ; 0 ;
; Use smart compilation ; Off ; Off ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
; Enable compact report table ; Off ; Off ;
; Generate compressed bitstreams ; On ; On ;
; Compression mode ; Off ; Off ;
; Clock source for configuration device ; Internal ; Internal ;
; Clock frequency of the configuration device ; 10 MHZ ; 10 MHz ;
; Divide clock frequency by ; 1 ; 1 ;
; Auto user code ; Off ; Off ;
; Use configuration device ; Off ; Off ;
; Configuration device ; Auto ; Auto ;
; Configuration device auto user code ; Off ; Off ;
; Generate Tabular Text File (.ttf) For Target Device ; Off ; Off ;
; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device ; Off ; Off ;
; Hexadecimal Output File count direction ; Up ; Up ;
; Release clears before tri-states ; Off ; Off ;
; Auto-restart configuration after error ; On ; On ;
; Enable OCT_DONE ; Off ; Off ;
; Generate Serial Vector Format File (.svf) for Target Device ; Off ; Off ;
; Generate a JEDEC STAPL Format File (.jam) for Target Device ; Off ; Off ;
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; Off ; Off ;
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On ; On ;
+-----------------------------------------------------------------------------+------------+---------------+
+---------------------------+
; Assembler Generated Files ;
+---------------------------+
; File Name ;
+---------------------------+
; firebee1.sof ;
; firebee1.rbf ;
+---------------------------+
+----------------------------------------+
; Assembler Device Options: firebee1.sof ;
+----------------+-----------------------+
; Option ; Setting ;
+----------------+-----------------------+
; Device ; EP3C40F484C6 ;
; JTAG usercode ; 0xFFFFFFFF ;
; Checksum ; 0x008CFA9D ;
+----------------+-----------------------+
+----------------------------------------+
; Assembler Device Options: firebee1.rbf ;
+---------------------+------------------+
; Option ; Setting ;
+---------------------+------------------+
; Raw Binary File ; ;
; Compression Ratio ; 2 ;
+---------------------+------------------+
+--------------------+
; Assembler Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit Assembler
Info: Version 12.0 Build 263 08/02/2012 Service Pack 2 SJ Web Edition
Info: Processing started: Sat Oct 20 18:39:42 2012
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
Info (115031): Writing out detailed assembly data for power analysis
Info (115030): Assembler is generating device programming files
Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 373 megabytes
Info: Processing ended: Sat Oct 20 18:39:49 2012
Info: Elapsed time: 00:00:07
Info: Total CPU time (on all processors): 00:00:06

2
FPGA_quartus/firebee1.done
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@@ -1 +1 @@
Wed Dec 15 02:25:24 2010
Sat Oct 20 18:40:36 2012

14562
FPGA_quartus/firebee1.fit.rpt
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File diff suppressed because it is too large Load Diff

32
FPGA_quartus/firebee1.fit.summary
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@@ -1,16 +1,16 @@
Fitter Status : Successful - Wed Dec 15 02:25:02 2010
Quartus II Version : 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
Revision Name : firebee1
Top-level Entity Name : firebee1
Family : Cyclone III
Device : EP3C40F484C6
Timing Models : Final
Total logic elements : 9,526 / 39,600 ( 24 % )
Total combinational functions : 8,061 / 39,600 ( 20 % )
Dedicated logic registers : 4,563 / 39,600 ( 12 % )
Total registers : 4749
Total pins : 295 / 332 ( 89 % )
Total virtual pins : 0
Total memory bits : 109,344 / 1,161,216 ( 9 % )
Embedded Multiplier 9-bit elements : 6 / 252 ( 2 % )
Total PLLs : 4 / 4 ( 100 % )
Fitter Status : Successful - Sat Oct 20 18:39:28 2012
Quartus II 32-bit Version : 12.0 Build 263 08/02/2012 SP 2 SJ Web Edition
Revision Name : firebee1
Top-level Entity Name : firebee1
Family : Cyclone III
Device : EP3C40F484C6
Timing Models : Final
Total logic elements : 9,435 / 39,600 ( 24 % )
Total combinational functions : 7,967 / 39,600 ( 20 % )
Dedicated logic registers : 4,622 / 39,600 ( 12 % )
Total registers : 4750
Total pins : 295 / 332 ( 89 % )
Total virtual pins : 0
Total memory bits : 109,344 / 1,161,216 ( 9 % )
Embedded Multiplier 9-bit elements : 6 / 252 ( 2 % )
Total PLLs : 4 / 4 ( 100 % )

759
FPGA_quartus/firebee1.flow.rpt
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@@ -1,380 +1,379 @@
Flow report for firebee1
Wed Dec 15 02:25:22 2010
Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Flow Summary
3. Flow Settings
4. Flow Non-Default Global Settings
5. Flow Elapsed Time
6. Flow OS Summary
7. Flow Log
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2010 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+-----------------------------------------------------------------------------------+
; Flow Summary ;
+------------------------------------+----------------------------------------------+
; Flow Status ; Successful - Wed Dec 15 02:25:21 2010 ;
; Quartus II Version ; 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition ;
; Revision Name ; firebee1 ;
; Top-level Entity Name ; firebee1 ;
; Family ; Cyclone III ;
; Device ; EP3C40F484C6 ;
; Timing Models ; Final ;
; Met timing requirements ; No ;
; Total logic elements ; 9,526 / 39,600 ( 24 % ) ;
; Total combinational functions ; 8,061 / 39,600 ( 20 % ) ;
; Dedicated logic registers ; 4,563 / 39,600 ( 12 % ) ;
; Total registers ; 4749 ;
; Total pins ; 295 / 332 ( 89 % ) ;
; Total virtual pins ; 0 ;
; Total memory bits ; 109,344 / 1,161,216 ( 9 % ) ;
; Embedded Multiplier 9-bit elements ; 6 / 252 ( 2 % ) ;
; Total PLLs ; 4 / 4 ( 100 % ) ;
+------------------------------------+----------------------------------------------+
+-----------------------------------------+
; Flow Settings ;
+-------------------+---------------------+
; Option ; Setting ;
+-------------------+---------------------+
; Start date & time ; 12/15/2010 02:20:37 ;
; Main task ; Compilation ;
; Revision Name ; firebee1 ;
+-------------------+---------------------+
+-----------------------------------------------------------------------------------------------------------------------------+
; Flow Non-Default Global Settings ;
+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
; COMPILER_SIGNATURE_ID ; 150661768621.129237603704664 ; -- ; -- ; -- ;
; CYCLONEII_OPTIMIZATION_TECHNIQUE ; Speed ; Balanced ; -- ; -- ;
; FMAX_REQUIREMENT ; 30 ns ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_COUNTER ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_RAM_DP+ ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_RAM_DP+ ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_RAM_DP+ ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_LATCH ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_COMPARE ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_FF ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_FF ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_FF ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTDDIO_BIDIR ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_FIFO+ ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_FIFO+ ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL_RECONFIG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
; MISC_FILE ; C:/firebee/FPGA/firebee1.dpf ; -- ; -- ; -- ;
; MISC_FILE ; altpll1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll1.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll1.ppf ; -- ; -- ; -- ;
; MISC_FILE ; altpll2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll2.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll2.ppf ; -- ; -- ; -- ;
; MISC_FILE ; altpll3.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll3.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll3.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll3.ppf ; -- ; -- ; -- ;
; MISC_FILE ; altpll0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll0.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll0.ppf ; -- ; -- ; -- ;
; MISC_FILE ; lpm_counter0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; lpm_counter0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg0.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram0.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram1.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant1.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux0.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux1.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux2.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram2.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri6.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri6.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux3.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux3.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant3.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant3.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_latch1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_latch1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant4.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_compare1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_compare1.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_compare1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_LONG.bsf ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_LONG.inc ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_LONG.cmp ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_BYT.bsf ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_BYT.inc ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_BYT.cmp ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_WORD.bsf ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_WORD.inc ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_WORD.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff4.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff5.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff5.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff5.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff6.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff6.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff6.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg3.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg3.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg3.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_bidir0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_bidir0.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_bidir0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_bidir0.ppf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out0.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out0.ppf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux5.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux5.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux5.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg5.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg5.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg5.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg6.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg6.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg6.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg4.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out1.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out1.ppf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out2.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out2.ppf ; -- ; -- ; -- ;
; MISC_FILE ; altddio_out3.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altddio_out3.inc ; -- ; -- ; -- ;
; MISC_FILE ; altddio_out3.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altddio_out3.ppf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux6.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux6.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux6.cmp ; -- ; -- ; -- ;
; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_muxDZ.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_muxDZ.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_muxVDM.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_muxVDM.cmp ; -- ; -- ; -- ;
; MISC_FILE ; C:/FireBee/FPGA/firebee1.dpf ; -- ; -- ; -- ;
; MISC_FILE ; altpll_reconfig1.tdf ; -- ; -- ; -- ;
; MISC_FILE ; altpll_reconfig1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll_reconfig1.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll_reconfig1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll4.tdf ; -- ; -- ; -- ;
; MISC_FILE ; altpll4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll4.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll4.ppf ; -- ; -- ; -- ;
; NOMINAL_CORE_SUPPLY_VOLTAGE ; 1.2V ; -- ; -- ; -- ;
; PARTITION_COLOR ; 16764057 ; -- ; -- ; Top ;
; PARTITION_NETLIST_TYPE ; SOURCE ; -- ; -- ; Top ;
; PHYSICAL_SYNTHESIS_COMBO_LOGIC ; On ; Off ; -- ; -- ;
; PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ; On ; Off ; -- ; -- ;
; PHYSICAL_SYNTHESIS_EFFORT ; Fast ; Normal ; -- ; -- ;
; PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ; On ; Off ; -- ; -- ;
; STATE_MACHINE_PROCESSING ; One-Hot ; Auto ; -- ; -- ;
; TCO_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
; TH_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
; TPD_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
; TSU_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off ; -- ; -- ; eda_blast_fpga ;
; USE_TIMEQUEST_TIMING_ANALYZER ; Off ; On ; -- ; -- ;
+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
+-----------------------------------------------------------------------------------------------------------------------------+
; Flow Elapsed Time ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis ; 00:01:16 ; 1.0 ; 347 MB ; 00:01:17 ;
; Fitter ; 00:03:05 ; 1.0 ; 334 MB ; 00:03:07 ;
; Assembler ; 00:00:05 ; 1.0 ; 291 MB ; 00:00:04 ;
; Classic Timing Analyzer ; 00:00:07 ; 1.0 ; 227 MB ; 00:00:09 ;
; Total ; 00:04:33 ; -- ; -- ; 00:04:37 ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
+------------------------------------------------------------------------------------------+
; Flow OS Summary ;
+-------------------------+------------------+---------------+------------+----------------+
; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
+-------------------------+------------------+---------------+------------+----------------+
; Analysis & Synthesis ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
; Fitter ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
; Assembler ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
; Classic Timing Analyzer ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
+-------------------------+------------------+---------------+------------+----------------+
------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off firebeei1 -c firebee1
quartus_fit --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
quartus_asm --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
quartus_tan --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1 --timing_analysis_only
Flow report for firebee1
Sat Oct 20 18:40:30 2012
Quartus II 32-bit Version 12.0 Build 263 08/02/2012 Service Pack 2 SJ Web Edition
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Flow Summary
3. Flow Settings
4. Flow Non-Default Global Settings
5. Flow Elapsed Time
6. Flow OS Summary
7. Flow Log
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2012 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+------------------------------------------------------------------------------------+
; Flow Summary ;
+------------------------------------+-----------------------------------------------+
; Flow Status ; Successful - Sat Oct 20 18:39:48 2012 ;
; Quartus II 32-bit Version ; 12.0 Build 263 08/02/2012 SP 2 SJ Web Edition ;
; Revision Name ; firebee1 ;
; Top-level Entity Name ; firebee1 ;
; Family ; Cyclone III ;
; Device ; EP3C40F484C6 ;
; Timing Models ; Final ;
; Total logic elements ; 9,435 / 39,600 ( 24 % ) ;
; Total combinational functions ; 7,967 / 39,600 ( 20 % ) ;
; Dedicated logic registers ; 4,622 / 39,600 ( 12 % ) ;
; Total registers ; 4750 ;
; Total pins ; 295 / 332 ( 89 % ) ;
; Total virtual pins ; 0 ;
; Total memory bits ; 109,344 / 1,161,216 ( 9 % ) ;
; Embedded Multiplier 9-bit elements ; 6 / 252 ( 2 % ) ;
; Total PLLs ; 4 / 4 ( 100 % ) ;
+------------------------------------+-----------------------------------------------+
+-----------------------------------------+
; Flow Settings ;
+-------------------+---------------------+
; Option ; Setting ;
+-------------------+---------------------+
; Start date & time ; 10/20/2012 18:20:26 ;
; Main task ; Compilation ;
; Revision Name ; firebee1 ;
+-------------------+---------------------+
+-----------------------------------------------------------------------------------------------------------------------------+
; Flow Non-Default Global Settings ;
+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
; COMPILER_SIGNATURE_ID ; 247163806132475.135075002618816 ; -- ; -- ; -- ;
; CYCLONEII_OPTIMIZATION_TECHNIQUE ; Speed ; Balanced ; -- ; -- ;
; FMAX_REQUIREMENT ; 30 ns ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_COUNTER ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_RAM_DP+ ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_RAM_DP+ ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_RAM_DP+ ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_LATCH ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_COMPARE ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_FF ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_FF ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_FF ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTDDIO_BIDIR ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_FIFO+ ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_FIFO+ ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL_RECONFIG ; -- ; -- ; -- ;
; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
; MISC_FILE ; C:/firebee/FPGA/firebee1.dpf ; -- ; -- ; -- ;
; MISC_FILE ; C:/FireBee/FPGA/firebee1.dpf ; -- ; -- ; -- ;
; MISC_FILE ; altpll1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll1.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll1.ppf ; -- ; -- ; -- ;
; MISC_FILE ; altpll2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll2.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll2.ppf ; -- ; -- ; -- ;
; MISC_FILE ; altpll3.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll3.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll3.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll3.ppf ; -- ; -- ; -- ;
; MISC_FILE ; altpll0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll0.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll0.ppf ; -- ; -- ; -- ;
; MISC_FILE ; lpm_counter0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; lpm_counter0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg0.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram0.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram1.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant1.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux0.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux1.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux2.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram2.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altdpram2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri6.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_bustri6.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux3.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux3.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant3.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant3.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_latch1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_latch1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant4.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_constant4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_compare1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_compare1.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_compare1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_LONG.bsf ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_LONG.inc ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_LONG.cmp ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_BYT.bsf ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_BYT.inc ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_BYT.cmp ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_WORD.bsf ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_WORD.inc ; -- ; -- ; -- ;
; MISC_FILE ; lpm_bustri_WORD.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff4.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff5.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff5.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff5.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff6.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff6.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_ff6.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg3.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg3.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg3.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_bidir0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_bidir0.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_bidir0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_bidir0.ppf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out0.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out0.ppf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux5.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux5.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux5.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg5.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg5.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg5.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg6.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg6.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg6.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg4.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_shiftreg4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out1.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out1.ppf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out2.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out2.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out2.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/altddio_out2.ppf ; -- ; -- ; -- ;
; MISC_FILE ; altddio_out3.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altddio_out3.inc ; -- ; -- ; -- ;
; MISC_FILE ; altddio_out3.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altddio_out3.ppf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux6.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux6.inc ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_mux6.cmp ; -- ; -- ; -- ;
; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo0.bsf ; -- ; -- ; -- ;
; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo0.cmp ; -- ; -- ; -- ;
; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_muxDZ.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_muxDZ.cmp ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_muxVDM.bsf ; -- ; -- ; -- ;
; MISC_FILE ; Video/lpm_muxVDM.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll_reconfig1.tdf ; -- ; -- ; -- ;
; MISC_FILE ; altpll_reconfig1.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll_reconfig1.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll_reconfig1.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll4.tdf ; -- ; -- ; -- ;
; MISC_FILE ; altpll4.bsf ; -- ; -- ; -- ;
; MISC_FILE ; altpll4.inc ; -- ; -- ; -- ;
; MISC_FILE ; altpll4.cmp ; -- ; -- ; -- ;
; MISC_FILE ; altpll4.ppf ; -- ; -- ; -- ;
; NOMINAL_CORE_SUPPLY_VOLTAGE ; 1.2V ; -- ; -- ; -- ;
; PARTITION_COLOR ; 16764057 ; -- ; -- ; Top ;
; PARTITION_FITTER_PRESERVATION_LEVEL ; PLACEMENT_AND_ROUTING ; -- ; -- ; Top ;
; PARTITION_NETLIST_TYPE ; SOURCE ; -- ; -- ; Top ;
; PHYSICAL_SYNTHESIS_COMBO_LOGIC ; On ; Off ; -- ; -- ;
; PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ; On ; Off ; -- ; -- ;
; PHYSICAL_SYNTHESIS_EFFORT ; Fast ; Normal ; -- ; -- ;
; PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ; On ; Off ; -- ; -- ;
; STATE_MACHINE_PROCESSING ; One-Hot ; Auto ; -- ; -- ;
; TCO_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
; TH_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
; TPD_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
; TSU_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off ; -- ; -- ; eda_blast_fpga ;
+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
+-------------------------------------------------------------------------------------------------------------------------------+
; Flow Elapsed Time ;
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis ; 00:01:48 ; 1.0 ; -- ; 00:01:46 ;
; Fitter ; 00:17:04 ; 1.0 ; -- ; 00:17:00 ;
; Assembler ; 00:00:06 ; 1.0 ; -- ; 00:00:06 ;
; TimeQuest Timing Analyzer ; 00:00:49 ; 1.0 ; -- ; 00:00:48 ;
; Total ; 00:19:47 ; -- ; -- ; 00:19:40 ;
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
+---------------------------------------------------------------------------------------------+
; Flow OS Summary ;
+---------------------------+------------------+----------------+------------+----------------+
; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
+---------------------------+------------------+----------------+------------+----------------+
; Analysis & Synthesis ; bums ; Ubuntu 12.04.1 ; 12 ; x86_64 ;
; Fitter ; bums ; Ubuntu 12.04.1 ; 12 ; x86_64 ;
; Assembler ; bums ; Ubuntu 12.04.1 ; 12 ; x86_64 ;
; TimeQuest Timing Analyzer ; bums ; Ubuntu 12.04.1 ; 12 ; x86_64 ;
+---------------------------+------------------+----------------+------------+----------------+
------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off firebeei1 -c firebee1
quartus_fit --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
quartus_asm --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
quartus_sta firebeei1 -c firebee1

17221
FPGA_quartus/firebee1.map.rpt
View File

File diff suppressed because it is too large Load Diff

28
FPGA_quartus/firebee1.map.summary
View File

@@ -1,14 +1,14 @@
Analysis & Synthesis Status : Successful - Wed Dec 15 02:21:55 2010
Quartus II Version : 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
Revision Name : firebee1
Top-level Entity Name : firebee1
Family : Cyclone III
Total logic elements : 10,706
Total combinational functions : 8,060
Dedicated logic registers : 4,612
Total registers : 4740
Total pins : 295
Total virtual pins : 0
Total memory bits : 109,344
Embedded Multiplier 9-bit elements : 6
Total PLLs : 4
Analysis & Synthesis Status : Successful - Sat Oct 20 18:22:17 2012
Quartus II 32-bit Version : 12.0 Build 263 08/02/2012 SP 2 SJ Web Edition
Revision Name : firebee1
Top-level Entity Name : firebee1
Family : Cyclone III
Total logic elements : 10,604
Total combinational functions : 7,954
Dedicated logic registers : 4,622
Total registers : 4750
Total pins : 295
Total virtual pins : 0
Total memory bits : 109,344
Embedded Multiplier 9-bit elements : 6
Total PLLs : 4

1111
FPGA_quartus/firebee1.pin
View File

File diff suppressed because it is too large Load Diff

362
FPGA_quartus/firebee1.qsf
View File

@@ -41,173 +41,8 @@
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 8.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:07:29 SEPTEMBER 03, 2009"
set_global_assignment -name LAST_QUARTUS_VERSION "9.1 SP2"
set_global_assignment -name LAST_QUARTUS_VERSION "12.0 SP2"
set_global_assignment -name MISC_FILE "C:/firebee/FPGA/firebee1.dpf"
set_global_assignment -name SOURCE_FILE Video/altddio_bidir0.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_control.vhd
set_global_assignment -name SOURCE_FILE Video/altddio_out0.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_pkg.vhd
set_global_assignment -name SOURCE_FILE Video/altddio_out1.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_registers.vhd
set_global_assignment -name SOURCE_FILE Video/altddio_out2.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_soc_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_am_detector.vhd
set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo0.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/dcfifo0.vhd
set_global_assignment -name SOURCE_FILE Video/altdpram2.cmp
set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo1.cmp
set_global_assignment -name AHDL_FILE Video/DDR_CTR.tdf
set_global_assignment -name SOURCE_FILE Video/lpm_bustri0.cmp
set_global_assignment -name VHDL_FILE Video/lpm_bustri0.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_control.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_crc_logic.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_digital_pll.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_pkg.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_registers.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top_soc.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_transceiver.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_bustri5.cmp
set_global_assignment -name VHDL_FILE Video/lpm_bustri5.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_bustri6.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_bustri7.cmp
set_global_assignment -name VHDL_FILE Video/lpm_bustri7.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_compare1.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top_soc.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_gpio.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_constant2.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_constant3.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_pkg.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_constant4.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_timers.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top_soc.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_ctrl.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_rx.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_tx.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_pkg.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_ff4.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_ff5.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_wave.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_ff6.cmp
set_global_assignment -name VHDL_FILE lpm_latch0.vhd
set_global_assignment -name SOURCE_FILE lpm_latch0.cmp
set_global_assignment -name QIP_FILE altpll1.qip
set_global_assignment -name SOURCE_FILE Video/lpm_fifoDZ.cmp
set_global_assignment -name VHDL_FILE Video/lpm_fifoDZ.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_latch1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_mux0.cmp
set_global_assignment -name QIP_FILE altpll2.qip
set_global_assignment -name SOURCE_FILE Video/lpm_mux1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_mux2.cmp
set_global_assignment -name QIP_FILE altpll3.qip
set_global_assignment -name SOURCE_FILE Video/lpm_mux3.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_mux4.cmp
set_global_assignment -name SOURCE_FILE Video/altdpram0.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_mux5.cmp
set_global_assignment -name VHDL_FILE Video/altdpram0.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_mux6.cmp
set_global_assignment -name SOURCE_FILE Video/altdpram1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ2.cmp
set_global_assignment -name VHDL_FILE Video/lpm_muxDZ2.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ.cmp
set_global_assignment -name VHDL_FILE Video/lpm_muxDZ.vhd
set_global_assignment -name SOURCE_FILE altpll0.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_bustri1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_ff0.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg2.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_bustri2.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg3.cmp
set_global_assignment -name SOURCE_FILE altpll2.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg4.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_bustri3.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg5.cmp
set_global_assignment -name VHDL_FILE Video/lpm_bustri3.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg6.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_bustri4.cmp
set_global_assignment -name VHDL_FILE altpll2.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_constant0.cmp
set_global_assignment -name SOURCE_FILE altpll3.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_constant1.cmp
set_global_assignment -name VHDL_FILE altpll3.vhd
set_global_assignment -name SOURCE_FILE lpm_counter0.cmp
set_global_assignment -name VHDL_FILE Video/lpm_ff0.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_ff1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg0.cmp
set_global_assignment -name VHDL_FILE Video/lpm_ff1.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_ff2.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_ff3.cmp
set_global_assignment -name VHDL_FILE Video/lpm_ff3.vhd
set_global_assignment -name AHDL_FILE Video/VIDEO_MOD_MUX_CLUTCTR.tdf
set_global_assignment -name VHDL_FILE Video/lpm_ff2.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_fifo_dc0.cmp
set_global_assignment -name VHDL_FILE Video/lpm_fifo_dc0.vhd
set_global_assignment -name BDF_FILE Video/Video.bdf
set_global_assignment -name VHDL_FILE altpll1.vhd
set_global_assignment -name SOURCE_FILE altpll1.cmp
set_global_assignment -name BDF_FILE firebee1.bdf
set_global_assignment -name QIP_FILE altpll0.qip
set_global_assignment -name QIP_FILE lpm_counter0.qip
set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\FalconIO_SDCard_IDE_CF\\FalconIO_SDCard_IDE_CF.vhd"
set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\DSP\\DSP.vhd"
set_global_assignment -name QIP_FILE Video/lpm_shiftreg0.qip
set_global_assignment -name QIP_FILE Video/altdpram0.qip
set_global_assignment -name QIP_FILE Video/lpm_bustri1.qip
set_global_assignment -name QIP_FILE Video/altdpram1.qip
set_global_assignment -name QIP_FILE Video/lpm_bustri2.qip
set_global_assignment -name QIP_FILE Video/lpm_bustri4.qip
set_global_assignment -name QIP_FILE Video/lpm_constant0.qip
set_global_assignment -name QIP_FILE Video/lpm_constant1.qip
set_global_assignment -name QIP_FILE Video/lpm_mux0.qip
set_global_assignment -name QIP_FILE Video/lpm_mux1.qip
set_global_assignment -name QIP_FILE Video/lpm_mux2.qip
set_global_assignment -name QIP_FILE Video/lpm_constant2.qip
set_global_assignment -name QIP_FILE Video/altdpram2.qip
set_global_assignment -name QIP_FILE Video/lpm_bustri6.qip
set_global_assignment -name QIP_FILE Video/lpm_mux3.qip
set_global_assignment -name QIP_FILE Video/lpm_mux4.qip
set_global_assignment -name QIP_FILE Video/lpm_constant3.qip
set_global_assignment -name QIP_FILE Video/lpm_shiftreg1.qip
set_global_assignment -name QIP_FILE Video/lpm_latch1.qip
set_global_assignment -name QIP_FILE Video/lpm_constant4.qip
set_global_assignment -name QIP_FILE Video/lpm_shiftreg2.qip
set_global_assignment -name QIP_FILE Video/lpm_compare1.qip
set_global_assignment -name AHDL_FILE "C:\\firebee\\FPGA\\Interrupt_Handler\\interrupt_handler.tdf"
set_global_assignment -name QIP_FILE lpm_bustri_LONG.qip
set_global_assignment -name QIP_FILE lpm_bustri_BYT.qip
set_global_assignment -name QIP_FILE lpm_bustri_WORD.qip
set_global_assignment -name QIP_FILE Video/lpm_ff4.qip
set_global_assignment -name QIP_FILE Video/lpm_ff5.qip
set_global_assignment -name QIP_FILE Video/lpm_ff6.qip
set_global_assignment -name VECTOR_WAVEFORM_FILE firebee1.vwf
set_global_assignment -name QIP_FILE Video/lpm_shiftreg3.qip
set_global_assignment -name QIP_FILE Video/altddio_bidir0.qip
set_global_assignment -name QIP_FILE Video/altddio_out0.qip
set_global_assignment -name QIP_FILE Video/lpm_mux5.qip
set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\Video\\BLITTER\\BLITTER.vhd"
set_global_assignment -name QIP_FILE Video/lpm_shiftreg5.qip
set_global_assignment -name QIP_FILE Video/lpm_shiftreg6.qip
set_global_assignment -name QIP_FILE Video/lpm_shiftreg4.qip
set_global_assignment -name QIP_FILE Video/altddio_out1.qip
set_global_assignment -name QIP_FILE Video/altddio_out2.qip
set_global_assignment -name QIP_FILE altddio_out3.qip
set_global_assignment -name QIP_FILE Video/lpm_mux6.qip
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF_pgk.vhd
set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo0.qip
set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo1.qip
set_global_assignment -name QIP_FILE Video/lpm_muxDZ.qip
set_global_assignment -name QIP_FILE Video/lpm_muxVDM.qip
set_global_assignment -name SOURCE_FILE firebee1.fit.summary_alt
# Pin & Location Assignments
# ==========================
@@ -515,7 +350,6 @@ set_global_assignment -name TSU_REQUIREMENT "1 ns"
set_global_assignment -name TCO_REQUIREMENT "1 ns"
set_global_assignment -name TH_REQUIREMENT "1 ns"
set_global_assignment -name FMAX_REQUIREMENT "30 ns"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER OFF
# Analysis & Synthesis Assignments
# ================================
@@ -524,7 +358,7 @@ set_global_assignment -name TOP_LEVEL_ENTITY firebee1
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name SAFE_STATE_MACHINE OFF
set_global_assignment -name SAFE_STATE_MACHINE OFF
set_global_assignment -name STATE_MACHINE_PROCESSING "ONE-HOT"
# Fitter Assignments
@@ -535,14 +369,14 @@ set_global_assignment -name ENABLE_DEVICE_WIDE_OE ON
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name FITTER_EFFORT "AUTO FIT"
set_global_assignment -name FITTER_EFFORT "AUTO FIT"
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT FAST
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ON
set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA OFF
set_instance_assignment -name IO_STANDARD "2.5 V" -to DDR_CLK
set_instance_assignment -name IO_STANDARD "2.5 V" -to VA
set_instance_assignment -name IO_STANDARD "2.5 V" -to VD
@@ -555,7 +389,7 @@ set_instance_assignment -name IO_STANDARD "2.5 V" -to nVCAS
set_instance_assignment -name IO_STANDARD "2.5 V" -to nDDR_CLK
set_instance_assignment -name IO_STANDARD "2.5 V" -to VCKE
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED_FPGA_OK
set_global_assignment -name FITTER_AUTO_EFFORT_DESIRED_SLACK_MARGIN "0 ns"
set_global_assignment -name FITTER_AUTO_EFFORT_DESIRED_SLACK_MARGIN "0 ns"
set_instance_assignment -name IO_STANDARD "2.5 V" -to BA
set_instance_assignment -name IO_STANDARD "3.0-V LVTTL" -to HSYNC_PAD
set_instance_assignment -name IO_STANDARD "3.0-V LVTTL" -to PIXEL_CLK_PAD
@@ -572,19 +406,19 @@ set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to AMKB_TX
# Assembler Assignments
# =====================
set_global_assignment -name GENERATE_TTF_FILE OFF
set_global_assignment -name GENERATE_TTF_FILE OFF
set_global_assignment -name GENERATE_RBF_FILE ON
set_global_assignment -name GENERATE_HEX_FILE OFF
set_global_assignment -name GENERATE_HEX_FILE OFF
set_global_assignment -name HEXOUT_FILE_START_ADDRESS 0XE0700000
# Simulator Assignments
# =====================
set_global_assignment -name END_TIME "2 us"
set_global_assignment -name ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS OFF
set_global_assignment -name SETUP_HOLD_DETECTION OFF
set_global_assignment -name GLITCH_DETECTION OFF
set_global_assignment -name CHECK_OUTPUTS OFF
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name SETUP_HOLD_DETECTION OFF
set_global_assignment -name GLITCH_DETECTION OFF
set_global_assignment -name CHECK_OUTPUTS OFF
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE firebee1.vwf
# start EDA_TOOL_SETTINGS(eda_blast_fpga)
@@ -733,8 +567,174 @@ set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
# end ENTITY(firebee1)
# --------------------
set_global_assignment -name MISC_FILE "C:/FireBee/FPGA/firebee1.dpf"
set_global_assignment -name QIP_FILE altpll_reconfig1.qip
set_global_assignment -name QIP_FILE altpll4.qip
set_location_assignment PIN_E5 -to LPDIR
set_location_assignment PIN_B11 -to nRSTO_MCF
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name AHDL_FILE Interrupt_Handler/interrupt_handler.tdf
set_global_assignment -name VHDL_FILE DSP/DSP.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd
set_global_assignment -name VHDL_FILE Video/BLITTER/BLITTER.vhd
set_global_assignment -name SOURCE_FILE Video/altddio_bidir0.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_control.vhd
set_global_assignment -name SOURCE_FILE Video/altddio_out0.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_pkg.vhd
set_global_assignment -name SOURCE_FILE Video/altddio_out1.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_registers.vhd
set_global_assignment -name SOURCE_FILE Video/altddio_out2.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_soc_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_am_detector.vhd
set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo0.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/dcfifo0.vhd
set_global_assignment -name SOURCE_FILE Video/altdpram2.cmp
set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo1.cmp
set_global_assignment -name AHDL_FILE Video/DDR_CTR.tdf
set_global_assignment -name SOURCE_FILE Video/lpm_bustri0.cmp
set_global_assignment -name VHDL_FILE Video/lpm_bustri0.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_control.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_crc_logic.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_digital_pll.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_pkg.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_registers.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top_soc.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_transceiver.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_bustri5.cmp
set_global_assignment -name VHDL_FILE Video/lpm_bustri5.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_bustri6.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_bustri7.cmp
set_global_assignment -name VHDL_FILE Video/lpm_bustri7.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_compare1.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top_soc.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_gpio.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_constant2.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_constant3.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_pkg.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_constant4.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_timers.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top_soc.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_ctrl.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_rx.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_top.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_tx.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_pkg.vhd
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_ff4.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_ff5.cmp
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_wave.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_ff6.cmp
set_global_assignment -name VHDL_FILE lpm_latch0.vhd
set_global_assignment -name SOURCE_FILE lpm_latch0.cmp
set_global_assignment -name QIP_FILE altpll1.qip
set_global_assignment -name SOURCE_FILE Video/lpm_fifoDZ.cmp
set_global_assignment -name VHDL_FILE Video/lpm_fifoDZ.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_latch1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_mux0.cmp
set_global_assignment -name QIP_FILE altpll2.qip
set_global_assignment -name SOURCE_FILE Video/lpm_mux1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_mux2.cmp
set_global_assignment -name QIP_FILE altpll3.qip
set_global_assignment -name SOURCE_FILE Video/lpm_mux3.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_mux4.cmp
set_global_assignment -name SOURCE_FILE Video/altdpram0.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_mux5.cmp
set_global_assignment -name VHDL_FILE Video/altdpram0.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_mux6.cmp
set_global_assignment -name SOURCE_FILE Video/altdpram1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ2.cmp
set_global_assignment -name VHDL_FILE Video/lpm_muxDZ2.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ.cmp
set_global_assignment -name VHDL_FILE Video/lpm_muxDZ.vhd
set_global_assignment -name SOURCE_FILE altpll0.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_bustri1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_ff0.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg2.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_bustri2.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg3.cmp
set_global_assignment -name SOURCE_FILE altpll2.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg4.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_bustri3.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg5.cmp
set_global_assignment -name VHDL_FILE Video/lpm_bustri3.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg6.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_bustri4.cmp
set_global_assignment -name VHDL_FILE altpll2.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_constant0.cmp
set_global_assignment -name SOURCE_FILE altpll3.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_constant1.cmp
set_global_assignment -name VHDL_FILE altpll3.vhd
set_global_assignment -name SOURCE_FILE lpm_counter0.cmp
set_global_assignment -name VHDL_FILE Video/lpm_ff0.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_ff1.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg0.cmp
set_global_assignment -name VHDL_FILE Video/lpm_ff1.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_ff2.cmp
set_global_assignment -name SOURCE_FILE Video/lpm_ff3.cmp
set_global_assignment -name VHDL_FILE Video/lpm_ff3.vhd
set_global_assignment -name AHDL_FILE Video/VIDEO_MOD_MUX_CLUTCTR.tdf
set_global_assignment -name VHDL_FILE Video/lpm_ff2.vhd
set_global_assignment -name SOURCE_FILE Video/lpm_fifo_dc0.cmp
set_global_assignment -name VHDL_FILE Video/lpm_fifo_dc0.vhd
set_global_assignment -name BDF_FILE Video/Video.bdf
set_global_assignment -name VHDL_FILE altpll1.vhd
set_global_assignment -name SOURCE_FILE altpll1.cmp
set_global_assignment -name BDF_FILE firebee1.bdf
set_global_assignment -name QIP_FILE altpll0.qip
set_global_assignment -name QIP_FILE lpm_counter0.qip
set_global_assignment -name QIP_FILE Video/lpm_shiftreg0.qip
set_global_assignment -name QIP_FILE Video/altdpram0.qip
set_global_assignment -name QIP_FILE Video/lpm_bustri1.qip
set_global_assignment -name QIP_FILE Video/altdpram1.qip
set_global_assignment -name QIP_FILE Video/lpm_bustri2.qip
set_global_assignment -name QIP_FILE Video/lpm_bustri4.qip
set_global_assignment -name QIP_FILE Video/lpm_constant0.qip
set_global_assignment -name QIP_FILE Video/lpm_constant1.qip
set_global_assignment -name QIP_FILE Video/lpm_mux0.qip
set_global_assignment -name QIP_FILE Video/lpm_mux1.qip
set_global_assignment -name QIP_FILE Video/lpm_mux2.qip
set_global_assignment -name QIP_FILE Video/lpm_constant2.qip
set_global_assignment -name QIP_FILE Video/altdpram2.qip
set_global_assignment -name QIP_FILE Video/lpm_bustri6.qip
set_global_assignment -name QIP_FILE Video/lpm_mux3.qip
set_global_assignment -name QIP_FILE Video/lpm_mux4.qip
set_global_assignment -name QIP_FILE Video/lpm_constant3.qip
set_global_assignment -name QIP_FILE Video/lpm_shiftreg1.qip
set_global_assignment -name QIP_FILE Video/lpm_latch1.qip
set_global_assignment -name QIP_FILE Video/lpm_constant4.qip
set_global_assignment -name QIP_FILE Video/lpm_shiftreg2.qip
set_global_assignment -name QIP_FILE Video/lpm_compare1.qip
set_global_assignment -name QIP_FILE lpm_bustri_LONG.qip
set_global_assignment -name QIP_FILE lpm_bustri_BYT.qip
set_global_assignment -name QIP_FILE lpm_bustri_WORD.qip
set_global_assignment -name QIP_FILE Video/lpm_ff4.qip
set_global_assignment -name QIP_FILE Video/lpm_ff5.qip
set_global_assignment -name QIP_FILE Video/lpm_ff6.qip
set_global_assignment -name VECTOR_WAVEFORM_FILE firebee1.vwf
set_global_assignment -name QIP_FILE Video/lpm_shiftreg3.qip
set_global_assignment -name QIP_FILE Video/altddio_bidir0.qip
set_global_assignment -name QIP_FILE Video/altddio_out0.qip
set_global_assignment -name QIP_FILE Video/lpm_mux5.qip
set_global_assignment -name QIP_FILE Video/lpm_shiftreg5.qip
set_global_assignment -name QIP_FILE Video/lpm_shiftreg6.qip
set_global_assignment -name QIP_FILE Video/lpm_shiftreg4.qip
set_global_assignment -name QIP_FILE Video/altddio_out1.qip
set_global_assignment -name QIP_FILE Video/altddio_out2.qip
set_global_assignment -name QIP_FILE altddio_out3.qip
set_global_assignment -name QIP_FILE Video/lpm_mux6.qip
set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF_pgk.vhd
set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo0.qip
set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo1.qip
set_global_assignment -name QIP_FILE Video/lpm_muxDZ.qip
set_global_assignment -name QIP_FILE Video/lpm_muxVDM.qip
set_global_assignment -name SOURCE_FILE firebee1.fit.summary_alt
set_global_assignment -name QIP_FILE altpll_reconfig1.qip
set_global_assignment -name QIP_FILE altpll4.qip
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

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FPGA_quartus/firebee1.qws
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FPGA_quartus/firebee1.rbf
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FPGA_quartus/firebee1.sof
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