#ifdef'ed out code passages that do not fit the m5484LITE board
This commit is contained in:
@@ -21,6 +21,11 @@
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*/
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*/
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#include "startcf.h"
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#include "startcf.h"
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#if MACHINE_FIREBEE
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#include "firebee.h"
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#elif MACHINE_M5484LITE
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#include "m5484l.h"
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#endif /* MACHINE_FIREBEE */
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.extern __Bas_base
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.extern __Bas_base
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.extern __SUP_SP
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.extern __SUP_SP
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@@ -215,18 +220,24 @@
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move.w #0x2700,sr // disable interrupt
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move.w #0x2700,sr // disable interrupt
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subq.l #8,a7
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subq.l #8,a7
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movem.l d0/a5,(a7) // save registers
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movem.l d0/a5,(a7) // save registers
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lea MCF_EPORT_EPFR,a5
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lea MCF_EPORT_EPFR,a5
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move.b #\clr_int,(a5) // clear int pending
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move.b #\clr_int,(a5) // clear int pending
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// test auf protect mode ---------------------
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#if MACHINE_FIREBEE
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// test for protect mode. Only for FireBee (m5484LITE has no dip switch)
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move.b DIP_SWITCHa,d0
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move.b DIP_SWITCHa,d0
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btst #7,d0
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btst #7,d0
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bne irq_protect // ja->
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bne irq_protect // yes
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// -------------------------------------------
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#endif /* MACHINE_FIREBEE */
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movem.l (a7),d0/a5 // restore registers
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movem.l (a7),d0/a5 // restore registers
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addq.l #8,a7
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addq.l #8,a7
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move.l \vector,-(a7)
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move.l \vector,-(a7)
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move #0x2\int_mask\()00,sr
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move #0x2\int_mask\()00,sr
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rts
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rts
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#if MACHINE_FIREBEE
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irq_protect:
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irq_protect:
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move.l usp,a5 // get usp
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move.l usp,a5 // get usp
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tst.b _rt_mod // supervisor mode active?
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tst.b _rt_mod // supervisor mode active?
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@@ -253,7 +264,7 @@ sev_supint:
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move.l 12(a7),-(a5) // pc verschieben
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move.l 12(a7),-(a5) // pc verschieben
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move.w 10(a7),-(a5) // sr verschieben
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move.w 10(a7),-(a5) // sr verschieben
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bset #5,(a5) // auf super
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bset #5,(a5) // auf super
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#endif
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#endif /* cf_stack */
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irq_end:
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irq_end:
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move.l a5,usp // usp setzen
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move.l a5,usp // usp setzen
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lea \vector,a5
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lea \vector,a5
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@@ -263,6 +274,7 @@ irq_end:
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movem.l (a7),d0/a5 // register zur<EFBFBD>ck
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movem.l (a7),d0/a5 // register zur<EFBFBD>ck
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addq.l #8,a7
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addq.l #8,a7
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rte // und weg
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rte // und weg
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#endif /* MACHINE_FIREBEE */
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.endm
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.endm
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/*
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/*
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@@ -280,9 +292,9 @@ irq_end:
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* If anybody knows of any better way on how to do this - please do!
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* If anybody knows of any better way on how to do this - please do!
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*
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*
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*/
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*/
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.macro mchar st,a,b,c,d,tgt
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.macro mchar st,a,b,c,d,tgt
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\st #\a << 24|\b<<16|\c<<8|\d,\tgt
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\st #\a << 24|\b<<16|\c<<8|\d,\tgt
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.endm
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.endm
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.text
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.text
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_vec_init:
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_vec_init:
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@@ -304,16 +316,23 @@ init_vec_loop:
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subq.l #1,d0
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subq.l #1,d0
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bne init_vec_loop
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bne init_vec_loop
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move.l #__SUP_SP,(a0)
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move.l #__SUP_SP,(a0) // set initial stack pointer at start of exception vector table
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lea reset_vector(pc),a1
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lea reset_vector(pc),a1 // set reset vector
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move.l a1,0x04(a0)
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move.l a1,0x04(a0)
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lea acess(pc),a1
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lea access(pc),a1 // set illegal access exception handler
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move.l a1,0x08(a0)
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move.l a1,0x08(a0)
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#ifdef MACHINE_FIREBEE /* only the FireBee has a dip switch */
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move.b DIP_SWITCHa,d0 // ++ vr
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move.b DIP_SWITCHa,d0 // ++ vr
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btst #7,d0
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btst #7,d0
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beq no_protect_vectors
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beq no_protect_vectors
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#elif MACHINE_M5484LITE
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bra no_protect_vectors
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#endif /* MACHINE_FIREBEE */
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#ifdef MACHINE_FIREBEE /* protect mode only enabled for FireBee */
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lea _illegal_instruction(pc),a1
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lea _illegal_instruction(pc),a1
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move.l a1,0x0c(a0)
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move.l a1,0x0c(a0)
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lea _illegal_instruction(pc),a1
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lea _illegal_instruction(pc),a1
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@@ -347,15 +366,18 @@ init_vec_loop:
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lea flpoow(pc),a1
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lea flpoow(pc),a1
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move.l a1,0xdc(a0)
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move.l a1,0xdc(a0)
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#endif /* MACHINE_FIREBEE */
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no_protect_vectors:
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no_protect_vectors:
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// trap #0 (without any parameters for now) is used to provide BaS' XHDI
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// trap #0 (without any parameters for now) is used to provide BaS' XHDI
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// routine address to EmuTOS.
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// routine address to EmuTOS.
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lea _xhdi_sd_install,a1
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lea _xhdi_sd_install,a1
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move.l a1,0x80(a0) // trap #0 exception vector
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move.l a1,0x80(a0) // trap #0 exception vector
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// ACP interrupts 1-7 (user-defined, generated by FPGA)
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// ACP interrupts 1-7 (user-defined, generated by FPGA)
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// TODO: Do we need to do anything special for m5484LITE here?
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lea irq1(pc),a1
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lea irq1(pc),a1
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move.l a1,0x104(a0)
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move.l a1,0x104(a0)
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lea irq2(pc),a1
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lea irq2(pc),a1
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@@ -370,14 +392,21 @@ no_protect_vectors:
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move.l a1,0x118(a0)
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move.l a1,0x118(a0)
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lea irq7(pc),a1
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lea irq7(pc),a1
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move.l a1,0x11c(a0)
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move.l a1,0x11c(a0)
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// PSC vectors
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/*
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* m5448LITE has neither PIC nor emulated VIDEL, so we do nothing special for it here which keeps the
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* std_exc_vec in place we set earlier
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*/
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#ifdef MACHINE_FIREBEE
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// install PSC vectors (used for PIC communication on the FireBee)
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lea handler_psc3(pc),a1
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lea handler_psc3(pc),a1
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// PSC3 interrupt source = 32
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// PSC3 interrupt source = 32
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move.l a1,(INT_SOURCE_PSC3 + 64) * 4(a0)
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move.l a1,(INT_SOURCE_PSC3 + 64) * 4(a0)
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// timer vectors
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// timer vectors (used for video page copy on the FireBee)
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lea handler_gpt0(pc),a1
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lea handler_gpt0(pc),a1
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// GPT0 interrupt source = 62
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// GPT0 interrupt source = 62
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move.l a1,(INT_SOURCE_GPT0 + 64) * 4(a0)
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move.l a1,(INT_SOURCE_GPT0 + 64) * 4(a0)
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#endif /* MACHINE_FIREBEE */
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move.l (sp)+,a2 // Restore registers
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move.l (sp)+,a2 // Restore registers
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rts
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rts
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@@ -390,9 +419,11 @@ std_exc_vec:
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subq.l #8,a7
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subq.l #8,a7
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movem.l d0/a5,(sp) // save registers
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movem.l d0/a5,(sp) // save registers
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#ifdef MACHINE_FIREBEE
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move.b DIP_SWITCHa,d0 // "protect mode"?
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move.b DIP_SWITCHa,d0 // "protect mode"?
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btst #7,d0
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btst #7,d0
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bne stv_protect // yes
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bne stv_protect // yes
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#endif /* MACHINE_FIREBEE */
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move.w 8(sp),d0 // fetch vector
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move.w 8(sp),d0 // fetch vector
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and.l #0x3fc,d0 // mask out vector number
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and.l #0x3fc,d0 // mask out vector number
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@@ -409,6 +440,7 @@ std_exc_vec:
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move.l (a7)+,d0 // restore d0
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move.l (a7)+,d0 // restore d0
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rts // jump to exception routine
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rts // jump to exception routine
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#ifdef MACHINE_FIREBEE
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stv_protect:
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stv_protect:
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move.l usp,a5 // usp holen
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move.l usp,a5 // usp holen
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tst.b _rt_mod // supervisor?
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tst.b _rt_mod // supervisor?
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@@ -435,6 +467,7 @@ stv_protect:
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movem.l (a7),d0/a5 // register zur<EFBFBD>ck
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movem.l (a7),d0/a5 // register zur<EFBFBD>ck
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addq.l #8,a7
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addq.l #8,a7
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rte // und weg
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rte // und weg
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sev_sup:
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sev_sup:
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#ifdef cf_stack
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#ifdef cf_stack
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move.l 12(a7),-(a5) // pc transferieren
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move.l 12(a7),-(a5) // pc transferieren
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@@ -457,7 +490,8 @@ sev_sup:
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movem.l (a7),d0/a5 // register zurück
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movem.l (a7),d0/a5 // register zurück
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addq.l #8,a7
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addq.l #8,a7
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rte // und weg
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rte // und weg
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//*******************************************
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#endif /* MACHINE_FIREBEE */
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reset_vector:
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reset_vector:
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move.w #0x2700,sr // disable interrupt
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move.w #0x2700,sr // disable interrupt
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move.l #0x31415926,d0
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move.l #0x31415926,d0
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@@ -465,10 +499,11 @@ reset_vector:
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beq std_exc_vec // yes->
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beq std_exc_vec // yes->
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jmp _rom_entry // no, cold start machine
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jmp _rom_entry // no, cold start machine
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acess:
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access:
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move.w #0x2700,sr // disable interrupt
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move.w #0x2700,sr // disable interrupt
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move.l d0,-(sp) // ++ vr
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move.l d0,-(sp) // ++ vr
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move.w 4(sp),d0
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move.w 4(sp),d0 // get format_status word from stack
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andi.l #0x0c03,d0 // mask out fault status bits
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andi.l #0x0c03,d0 // mask out fault status bits
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cmpi.l #0x0401,d0 // TLB miss on opword of instruction fetch?
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cmpi.l #0x0401,d0 // TLB miss on opword of instruction fetch?
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beq access_mmu // yes
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beq access_mmu // yes
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@@ -484,6 +519,7 @@ access_mmu:
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move.l MCF_MMU_MMUSR,d0 // did the last fault hit in TLB?
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move.l MCF_MMU_MMUSR,d0 // did the last fault hit in TLB?
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btst #1,d0 // no
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btst #1,d0 // no
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bne bus_error // bus error handler
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bne bus_error // bus error handler
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move.l MCF_MMU_MMUAR,d0
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move.l MCF_MMU_MMUAR,d0
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cmp.l #__FASTRAM_END,d0 // above max User RAM area?
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cmp.l #__FASTRAM_END,d0 // above max User RAM area?
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bge bus_error // -> bus error
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bge bus_error // -> bus error
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