From 197928587a7008df41a1d8b9bac1198e9e97c7ab Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= Date: Tue, 5 Nov 2013 09:53:47 +0000 Subject: [PATCH] #ifdef'ed out code passages that do not fit the m5484LITE board --- BaS_gcc/sources/exceptions.S | 70 +++++++++++++++++++++++++++--------- 1 file changed, 53 insertions(+), 17 deletions(-) diff --git a/BaS_gcc/sources/exceptions.S b/BaS_gcc/sources/exceptions.S index 5785172..5b1bd93 100644 --- a/BaS_gcc/sources/exceptions.S +++ b/BaS_gcc/sources/exceptions.S @@ -21,6 +21,11 @@ */ #include "startcf.h" +#if MACHINE_FIREBEE +#include "firebee.h" +#elif MACHINE_M5484LITE +#include "m5484l.h" +#endif /* MACHINE_FIREBEE */ .extern __Bas_base .extern __SUP_SP @@ -215,18 +220,24 @@ move.w #0x2700,sr // disable interrupt subq.l #8,a7 movem.l d0/a5,(a7) // save registers + lea MCF_EPORT_EPFR,a5 move.b #\clr_int,(a5) // clear int pending -// test auf protect mode --------------------- + +#if MACHINE_FIREBEE +// test for protect mode. Only for FireBee (m5484LITE has no dip switch) move.b DIP_SWITCHa,d0 btst #7,d0 - bne irq_protect // ja-> -// ------------------------------------------- + bne irq_protect // yes +#endif /* MACHINE_FIREBEE */ + movem.l (a7),d0/a5 // restore registers addq.l #8,a7 move.l \vector,-(a7) move #0x2\int_mask\()00,sr rts + +#if MACHINE_FIREBEE irq_protect: move.l usp,a5 // get usp tst.b _rt_mod // supervisor mode active? @@ -253,7 +264,7 @@ sev_supint: move.l 12(a7),-(a5) // pc verschieben move.w 10(a7),-(a5) // sr verschieben bset #5,(a5) // auf super -#endif +#endif /* cf_stack */ irq_end: move.l a5,usp // usp setzen lea \vector,a5 @@ -263,6 +274,7 @@ irq_end: movem.l (a7),d0/a5 // register zur�ck addq.l #8,a7 rte // und weg +#endif /* MACHINE_FIREBEE */ .endm /* @@ -280,9 +292,9 @@ irq_end: * If anybody knows of any better way on how to do this - please do! * */ - .macro mchar st,a,b,c,d,tgt - \st #\a << 24|\b<<16|\c<<8|\d,\tgt - .endm + .macro mchar st,a,b,c,d,tgt + \st #\a << 24|\b<<16|\c<<8|\d,\tgt + .endm .text _vec_init: @@ -304,16 +316,23 @@ init_vec_loop: subq.l #1,d0 bne init_vec_loop - move.l #__SUP_SP,(a0) - lea reset_vector(pc),a1 + move.l #__SUP_SP,(a0) // set initial stack pointer at start of exception vector table + + lea reset_vector(pc),a1 // set reset vector move.l a1,0x04(a0) - lea acess(pc),a1 + + lea access(pc),a1 // set illegal access exception handler move.l a1,0x08(a0) +#ifdef MACHINE_FIREBEE /* only the FireBee has a dip switch */ move.b DIP_SWITCHa,d0 // ++ vr btst #7,d0 beq no_protect_vectors +#elif MACHINE_M5484LITE + bra no_protect_vectors +#endif /* MACHINE_FIREBEE */ +#ifdef MACHINE_FIREBEE /* protect mode only enabled for FireBee */ lea _illegal_instruction(pc),a1 move.l a1,0x0c(a0) lea _illegal_instruction(pc),a1 @@ -347,15 +366,18 @@ init_vec_loop: lea flpoow(pc),a1 move.l a1,0xdc(a0) +#endif /* MACHINE_FIREBEE */ + no_protect_vectors: - // trap #0 (without any parameters for now) is used to provide BaS' XHDI - // routine address to EmuTOS. +// trap #0 (without any parameters for now) is used to provide BaS' XHDI +// routine address to EmuTOS. lea _xhdi_sd_install,a1 move.l a1,0x80(a0) // trap #0 exception vector // ACP interrupts 1-7 (user-defined, generated by FPGA) +// TODO: Do we need to do anything special for m5484LITE here? lea irq1(pc),a1 move.l a1,0x104(a0) lea irq2(pc),a1 @@ -370,14 +392,21 @@ no_protect_vectors: move.l a1,0x118(a0) lea irq7(pc),a1 move.l a1,0x11c(a0) -// PSC vectors + +/* + * m5448LITE has neither PIC nor emulated VIDEL, so we do nothing special for it here which keeps the + * std_exc_vec in place we set earlier + */ +#ifdef MACHINE_FIREBEE +// install PSC vectors (used for PIC communication on the FireBee) lea handler_psc3(pc),a1 // PSC3 interrupt source = 32 move.l a1,(INT_SOURCE_PSC3 + 64) * 4(a0) -// timer vectors +// timer vectors (used for video page copy on the FireBee) lea handler_gpt0(pc),a1 // GPT0 interrupt source = 62 move.l a1,(INT_SOURCE_GPT0 + 64) * 4(a0) +#endif /* MACHINE_FIREBEE */ move.l (sp)+,a2 // Restore registers rts @@ -390,9 +419,11 @@ std_exc_vec: subq.l #8,a7 movem.l d0/a5,(sp) // save registers +#ifdef MACHINE_FIREBEE move.b DIP_SWITCHa,d0 // "protect mode"? btst #7,d0 bne stv_protect // yes +#endif /* MACHINE_FIREBEE */ move.w 8(sp),d0 // fetch vector and.l #0x3fc,d0 // mask out vector number @@ -409,6 +440,7 @@ std_exc_vec: move.l (a7)+,d0 // restore d0 rts // jump to exception routine +#ifdef MACHINE_FIREBEE stv_protect: move.l usp,a5 // usp holen tst.b _rt_mod // supervisor? @@ -435,6 +467,7 @@ stv_protect: movem.l (a7),d0/a5 // register zur�ck addq.l #8,a7 rte // und weg + sev_sup: #ifdef cf_stack move.l 12(a7),-(a5) // pc transferieren @@ -457,7 +490,8 @@ sev_sup: movem.l (a7),d0/a5 // register zurück addq.l #8,a7 rte // und weg -//******************************************* +#endif /* MACHINE_FIREBEE */ + reset_vector: move.w #0x2700,sr // disable interrupt move.l #0x31415926,d0 @@ -465,10 +499,11 @@ reset_vector: beq std_exc_vec // yes-> jmp _rom_entry // no, cold start machine -acess: +access: move.w #0x2700,sr // disable interrupt move.l d0,-(sp) // ++ vr - move.w 4(sp),d0 + + move.w 4(sp),d0 // get format_status word from stack andi.l #0x0c03,d0 // mask out fault status bits cmpi.l #0x0401,d0 // TLB miss on opword of instruction fetch? beq access_mmu // yes @@ -484,6 +519,7 @@ access_mmu: move.l MCF_MMU_MMUSR,d0 // did the last fault hit in TLB? btst #1,d0 // no bne bus_error // bus error handler + move.l MCF_MMU_MMUAR,d0 cmp.l #__FASTRAM_END,d0 // above max User RAM area? bge bus_error // -> bus error