further constrained

This commit is contained in:
Markus Fröschle
2014-12-30 14:05:49 +00:00
parent 7ef61bd397
commit 17b17a2263

View File

@@ -90,8 +90,29 @@ set_false_path -from [get_clocks {*}] -to [get_clocks {inst13|altpll_component|a
set_false_path -from [get_clocks {inst13|altpll_component|auto_generated|pll1|clk[2]}] -to [get_clocks {*}]
set_false_path -from [get_clocks {main_clk}] -to [get_clocks {inst13|altpll_component|auto_generated|pll1|clk[1]}]
set_false_path -from [get_clocks {inst13|altpll_component|auto_generated|pll1|clk[1]}] -to [get_clocks {main_clk}]
set_false_path -from [get_clocks {inst12|altpll_component|auto_generated|pll1|clk[4]}] -to [get_clocks {main_clk}]
set_false_path -from [get_clocks {main_clk}] -to [get_clocks {inst12|altpll_component|auto_generated|pll1|clk[4]}]
set_false_path -from [get_clocks {inst12|altpll_component|auto_generated|pll1|clk[4]}] -to [get_clocks {inst13|altpll_component|auto_generated|pll1|clk[1]}]
set_false_path -from [get_clocks {inst13|altpll_component|auto_generated|pll1|clk[1]}] -to [get_clocks {inst12|altpll_component|auto_generated|pll1|clk[4]}]
set_false_path -from [get_clocks {inst12|altpll_component|auto_generated|pll1|clk[4]}] -to [get_clocks {inst12|altpll_component|auto_generated|pll1|clk[0]}]
set_false_path -from [get_clocks {inst12|altpll_component|auto_generated|pll1|clk[0]}] -to [get_clocks {inst12|altpll_component|auto_generated|pll1|clk[4]}]
set_false_path -from [get_clocks {inst13|altpll_component|auto_generated|pll1|clk[0]}] -to [get_clocks {main_clk}]
set_false_path -from [get_clocks {main_clk}] -to [get_clocks {inst13|altpll_component|auto_generated|pll1|clk[0]}]
set_false_path -from [get_clocks {inst13|altpll_component|auto_generated|pll1|clk[0]}] -to [get_clocks {clk33m}]
set_false_path -from [get_clocks {clk33m}] -to [get_clocks {inst13|altpll_component|auto_generated|pll1|clk[0]}]
set_false_path -from [get_clocks {clk33m}] -to [get_clocks {inst12|altpll_component|auto_generated|pll1|clk[0]}]
set_false_path -from [get_clocks {inst|altpll_component|auto_generated|pll1|clk[1]}] -to [get_clocks {main_clk}]
set_false_path -from [get_clocks {inst|altpll_component|auto_generated|pll1|clk[0]}] -to [get_clocks {main_clk}]
#**************************************************************
# Set Multicycle Path
#**************************************************************