Firebee/FireBee_SVN
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

reverted previous changes that prevented FireTOS from booting (EmuTOS didn't have any problems)

Browse Source
This commit is contained in:
Markus Fröschle
2013-07-28 10:35:07 +00:00
parent 884f9eedd4
commit 1773c68af9
4 changed files with 10 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
run_bas.bdm
View File

@@ -8,12 +8,15 @@ sleep 10
# set VBR
write-ctrl 0x0801 0x00000000
# Turn on MBAR at 0xFF00_0000
write-ctrl 0x0C0F 0xFF000000
# Turn on RAMBAR0 at address FF10_0000
write-ctrl 0x0C04 0xFF100007
# Turn on RAMBAR1 at address FF10_1000
write-ctrl 0x0C05 0xFF101001
# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently)
#write-ctrl 0x0C05 0xFF101001
# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
write 0xFF000500 0xE0000000 4

3
sources/init_fpga.c
View File

@@ -93,7 +93,6 @@ void init_fpga(void)
}
} while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) && (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END));
#ifdef _NOT_USED_ /* doesn't seem to be needed */
if (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END)
{
while (fpga_data++ < (uint8_t *) FPGA_FLASH_DATA_END)
@@ -102,12 +101,10 @@ void init_fpga(void)
MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
}
xprintf("finished\r\n");
}
else
{
xprintf("FAILED!\r\n");
}
#endif /* _NOT_USED_ */
}

2
sources/mmu.S
View File

@@ -165,7 +165,6 @@ _mmu_init:
move.l d2,MCF_MMU_MMUOR // setzen data
move.l d3,MCF_MMU_MMUOR // setzen instr
#ifdef _NOT_USED_
// 1ff0'0000 locked (FIXME: why is this?)
move.l #0x1FF00000|std_mmutr,d0
move.l #0x1FF00000|copyback_mmudr|MCF_MMU_MMUDR_LK,d1
@@ -180,7 +179,6 @@ _mmu_init:
move.l d1,MCF_MMU_MMUDR
move.l d3,MCF_MMU_MMUOR // setzen instr
*/
#endif /* _NOT_USED_ */
move.l (sp)+,d2 // Restore registers
move.l (sp)+,d3
rts

9
sources/sysinit.c
View File

@@ -902,6 +902,10 @@ void initialize_hardware(void) {
break;
}
/* make sure MMU is disabled */
MCF_MMU_MMUCR = 0; /* MMU off */
NOP(); /* force pipeline sync */
/*
* Determine the processor revision
*/
@@ -919,10 +923,7 @@ void initialize_hardware(void) {
//video_1280_1024();
init_ac97();
xprintf("copying BaS data (%p - %p) to RAM (%p)\r\n", BAS_LMA, BAS_LMA + BAS_SIZE, BAS_IN_RAM);
/* The linker script will ensure that the Bas size
* is a multiple of the following.
*/
xprintf("copying BaS data (%p - %p) to RAM (%p - %p)\r\n", BAS_LMA, BAS_LMA + BAS_SIZE, BAS_IN_RAM, BAS_IN_RAM + BAS_SIZE);
memcpy((void *) BAS_IN_RAM, BAS_LMA, BAS_SIZE);
xprintf("finished.\r\n");