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Markus Fröschle
c6f8a7d4e8
compiles again, but needs reconnecting the split FlexBus signal at top level
2016-07-28 07:11:19 +00:00
FPGA_Quartus_13.1
compiles again, but needs reconnecting the split FlexBus signal at top level
2016-07-28 07:11:19 +00:00
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10
MiB
Languages
VHDL
83.4%
Verilog
13.1%
PHP
2.1%
Tcl
0.6%
Assembly
0.4%
Other
0.4%
