Markus Fröschle a40b7175e5 replace translator output with more clear VHDL

2016-06-02 16:28:02 +00:00

FPGA_Quartus_13.1

replace translator output with more clear VHDL

2016-06-02 16:28:02 +00:00

Description

No description provided

10 MiB

Languages

VHDL 83.4%

Verilog 13.1%

PHP 2.1%

Tcl 0.6%

Assembly 0.4%

Other 0.4%