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Sync with Fredi's source tree 13/06/2015

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Parallel port fix.
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David Gálvez
2018-04-09 17:19:13 +02:00
parent 3fb6e3bd8a
commit 68129dbe57
107 changed files with 12435 additions and 27384 deletions
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FPGA_by_Fredi/firebee1.map.summary
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@@ -1,14 +1,14 @@
Analysis & Synthesis Status : Successful - Wed Dec 15 02:21:55 2010
Analysis & Synthesis Status : Successful - Fri Aug 28 13:35:56 2015
Quartus II Version : 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
Revision Name : firebee1
Top-level Entity Name : firebee1
Family : Cyclone III
Total logic elements : 10,706
Total combinational functions : 8,060
Dedicated logic registers : 4,612
Total registers : 4740
Total logic elements : 11,642
Total combinational functions : 8,656
Dedicated logic registers : 5,028
Total registers : 5156
Total pins : 295
Total virtual pins : 0
Total memory bits : 109,344
Total memory bits : 109,600
Embedded Multiplier 9-bit elements : 6
Total PLLs : 4