diff --git a/FPGA_by_Fredi/BLITTER.tdf b/FPGA_by_Fredi/BLITTER.tdf
new file mode 100644
index 0000000..536bd9a
--- /dev/null
+++ b/FPGA_by_Fredi/BLITTER.tdf
@@ -0,0 +1,314 @@
+-- WARNING: Do NOT edit the input and output ports in this file in a text
+-- editor if you plan to continue editing the block that represents it in
+-- the Block Editor! File corruption is VERY likely to occur.
+
+-- Copyright (C) 1991-2010 Altera Corporation
+-- Your use of Altera Corporation's design tools, logic functions
+-- and other software and tools, and its AMPP partner logic
+-- functions, and any output files from any of the foregoing
+-- (including device programming or simulation files), and any
+-- associated documentation or information are expressly subject
+-- to the terms and conditions of the Altera Program License
+-- Subscription Agreement, Altera MegaCore Function License
+-- Agreement, or other applicable license agreement, including,
+-- without limitation, that your use is for the sole purpose of
+-- programming logic devices manufactured by Altera and sold by
+-- Altera or its authorized distributors. Please refer to the
+-- applicable agreement for further details.
+
+
+-- Generated by Quartus II Version 9.1 (Build Build 350 03/24/2010)
+-- Created on Sat Jan 15 11:06:17 2011
+INCLUDE "lpm_bustri_WORD.inc";
+INCLUDE "VIDEO/BLITTER/lpm_clshift0.INC";
+INCLUDE "VIDEO/BLITTER/altsyncram0.INC";
+
+CONSTANT BL_SKEW_LF = 255;
+
+-- Title Statement (optional)
+TITLE "Blitter";
+
+
+-- Parameters Statement (optional)
+
+-- {{ALTERA_PARAMETERS_BEGIN}} DO NOT REMOVE THIS LINE!
+-- {{ALTERA_PARAMETERS_END}} DO NOT REMOVE THIS LINE!
+
+
+-- Subdesign Section
+
+SUBDESIGN BLITTER
+(
+ -- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
+ nRSTO : INPUT;
+ MAIN_CLK : INPUT;
+ FB_ALE : INPUT;
+ nFB_WR : INPUT;
+ nFB_OE : INPUT;
+ FB_SIZE0 : INPUT;
+ FB_SIZE1 : INPUT;
+ VIDEO_RAM_CTR[15..0] : INPUT;
+ BLITTER_ON : INPUT;
+ FB_ADR[31..0] : INPUT;
+ nFB_CS1 : INPUT;
+ nFB_CS2 : INPUT;
+ nFB_CS3 : INPUT;
+ DDRCLK0 : INPUT;
+ BLITTER_DIN[127..0] : INPUT;
+ BLITTER_DACK[4..0] : INPUT;
+ SR_BLITTER_DACK : INPUT;
+ BLITTER_RUN : OUTPUT;
+ BLITTER_DOUT[127..0] : OUTPUT;
+ BLITTER_ADR[31..0] : OUTPUT;
+ BLITTER_SIG : OUTPUT;
+ BLITTER_WR : OUTPUT;
+ BLITTER_TA : OUTPUT;
+ FB_AD[31..0] : BIDIR;
+ -- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
+)
+
+VARIABLE
+ FB_B[3..0] :NODE;
+ FB_16B[1..0] :NODE;
+ BLITTER_CS :NODE;
+ BL_BUSY :NODE;
+ BL_HRAM_CS :NODE;
+ BL_HRAM_ADR[3..0] :NODE;
+ BL_HRAM_OUT[15..0] :NODE;
+ BL_HRAM_BE[1..0] :NODE;
+ BL_SRC_X_INC_CS :NODE;
+ BL_SRC_X_INC[15..0] :DFFE;
+ BL_SRC_Y_INC_CS :NODE;
+ BL_SRC_Y_INC[15..0] :DFFE;
+ BL_ENDMASK1_CS :NODE;
+ BL_ENDMASK1[15..0] :DFFE;
+ BL_ENDMASK2_CS :NODE;
+ BL_ENDMASK2[15..0] :DFFE;
+ BL_ENDMASK3_CS :NODE;
+ BL_ENDMASK3[15..0] :DFFE;
+ BL_SRC_ADRH_CS :NODE;
+ BL_SRC_ADRL_CS :NODE;
+ BL_SRC_ADR[31..0] :DFFE;
+ BL_DST_X_INC_CS :NODE;
+ BL_DST_X_INC[15..0] :DFFE;
+ BL_DST_Y_INC_CS :NODE;
+ BL_DST_Y_INC[15..0] :DFFE;
+ BL_DST_ADRH_CS :NODE;
+ BL_DST_ADRL_CS :NODE;
+ BL_DST_ADR[31..0] :DFFE;
+ BL_X_CNT_CS :NODE;
+ BL_X_CNT[15..0] :DFFE;
+ BL_Y_CNT_CS :NODE;
+ BL_Y_CNT[15..0] :DFFE;
+ BL_HT_OP_CS :NODE;
+ BL_HT_OP[7..0] :DFFE;
+ BL_LC_OP[7..0] :DFFE;
+ BL_LN_CS :NODE;
+ BL_LN[7..0] :DFFE;
+ BL_SKEW[7..0] :DFFE;
+
+ BL_SKEW_EXT[6..0] :NODE;
+ BL_SKEW_IN[255..0] :DFFE;
+ BL_SKEW_OUT[255..0] :NODE;
+
+ BL_DATA_DDR_READY :DFF; -- 1 WENN DATEN GESCHRIEBEN ODER LESBAR
+ BL_READ_SRC :DFFE;
+ BL_DST_BUFFER[127..0] :DFFE;
+ BL_READ_DST :DFFE;
+
+ HOP_OUT[127..0] :NODE;
+
+ COUNT[18..0] :DFF;
+
+BEGIN
+-- BYT SELECT 32 BIT
+ FB_B0 = FB_ADR[1..0]==0; -- ADR==0
+ FB_B1 = FB_ADR[1..0]==1 -- ADR==1
+ # FB_SIZE1 & !FB_SIZE0 & !FB_ADR1 -- HIGH WORD
+ # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
+ FB_B2 = FB_ADR[1..0]==2 -- ADR==2
+ # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
+ FB_B3 = FB_ADR[1..0]==3 -- ADR==3
+ # FB_SIZE1 & !FB_SIZE0 & FB_ADR1 -- LOW WORD
+ # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
+-- BYT SELECT 16 BIT
+ FB_16B0 = FB_ADR[0]==0; -- ADR==0
+ FB_16B1 = FB_ADR[0]==1 -- ADR==1
+ # !(!FB_SIZE1 & FB_SIZE0); -- NOT BYT
+-- BLITTER CS
+ BLITTER_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..6]==H"3E28"; -- FFFF8A00-3F/40
+ BLITTER_TA = BLITTER_CS;
+-- REGISTER
+ -- HALFTON RAM
+ BL_HRAM_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..5]==H"7C50"; -- $F8A00/20
+ BL_HRAM_BE1 = BL_HRAM_CS & FB_16B0 # !BL_HRAM_CS;
+ BL_HRAM_BE0 = BL_HRAM_CS & FB_16B1 # !BL_HRAM_CS;
+ BL_HRAM_ADR[] = BL_HRAM_CS & FB_ADR[4..1]
+ # !BL_HRAM_CS & BL_LN[3..0];
+ BL_HRAM_OUT[] = altsyncram0(BL_HRAM_ADR[],BL_HRAM_BE[],DDRCLK0,FB_AD[31..16],BL_HRAM_CS & !nFB_WR);
+ -- SRC X INC
+ BL_SRC_X_INC[].CLK = MAIN_CLK;
+ BL_SRC_X_INC[] = !BL_BUSY & FB_AD[31..16];
+ BL_SRC_X_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C510"; -- $F8A20/2
+ BL_SRC_X_INC[15..8].ENA = BL_SRC_X_INC_CS & !nFB_WR & FB_16B0;
+ BL_SRC_X_INC[7..0].ENA = BL_SRC_X_INC_CS & !nFB_WR & FB_16B1;
+ -- SRC Y INC
+ BL_SRC_Y_INC[].CLK = MAIN_CLK;
+ BL_SRC_Y_INC[] = !BL_BUSY & FB_AD[31..16];
+ BL_SRC_Y_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C511"; -- $F8A22/2
+ BL_SRC_Y_INC[15..8].ENA = BL_SRC_Y_INC_CS & !nFB_WR & FB_16B0;
+ BL_SRC_Y_INC[7..0].ENA = BL_SRC_Y_INC_CS & !nFB_WR & FB_16B1;
+ -- SRC ADR HIGH
+ BL_SRC_ADR[].CLK = MAIN_CLK;
+ BL_SRC_ADR[31..16] = !BL_BUSY & FB_AD[31..16];
+ BL_SRC_ADRH_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C512"; -- $F8A24/2
+ BL_SRC_ADR[31..24].ENA = BL_SRC_ADRH_CS & !nFB_WR & FB_16B0;
+ BL_SRC_ADR[23..16].ENA = BL_SRC_ADRH_CS & !nFB_WR & FB_16B1;
+ -- SRC ADR LOW
+ BL_SRC_ADR[].CLK = MAIN_CLK;
+ BL_SRC_ADR[15..0] = !BL_BUSY & FB_AD[31..16];
+ BL_SRC_ADRL_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C513"; -- $F8A26/2
+ BL_SRC_ADR[15..8].ENA = BL_SRC_ADRL_CS & !nFB_WR & FB_16B0;
+ BL_SRC_ADR[7..0].ENA = BL_SRC_ADRL_CS & !nFB_WR & FB_16B1;
+ -- ENDMASK 1
+ BL_ENDMASK1[].CLK = MAIN_CLK;
+ BL_ENDMASK1[] = FB_AD[31..16];
+ BL_ENDMASK1_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C514"; -- $F8A28/2
+ BL_ENDMASK1[15..8].ENA = BL_ENDMASK1_CS & !nFB_WR & FB_16B0;
+ BL_ENDMASK1[7..0].ENA = BL_ENDMASK1_CS & !nFB_WR & FB_16B1;
+ -- ENDMASK 2
+ BL_ENDMASK2[].CLK = MAIN_CLK;
+ BL_ENDMASK2[] = FB_AD[31..16];
+ BL_ENDMASK2_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C515"; -- $F8A2A/2
+ BL_ENDMASK2[15..8].ENA = BL_ENDMASK2_CS & !nFB_WR & FB_16B0;
+ BL_ENDMASK2[7..0].ENA = BL_ENDMASK2_CS & !nFB_WR & FB_16B1;
+ -- ENDMASK 3
+ BL_ENDMASK3[].CLK = MAIN_CLK;
+ BL_ENDMASK3[] = FB_AD[31..16];
+ BL_ENDMASK3_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C516"; -- $F8A2C/2
+ BL_ENDMASK3[15..8].ENA = BL_ENDMASK3_CS & !nFB_WR & FB_16B0;
+ BL_ENDMASK3[7..0].ENA = BL_ENDMASK3_CS & !nFB_WR & FB_16B1;
+ -- DST X INC
+ BL_DST_X_INC[].CLK = MAIN_CLK;
+ BL_DST_X_INC[] = !BL_BUSY & FB_AD[31..16];
+ BL_DST_X_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C517"; -- $F8A2E/2
+ BL_DST_X_INC[15..8].ENA = BL_DST_X_INC_CS & !nFB_WR & FB_16B0;
+ BL_DST_X_INC[7..0].ENA = BL_DST_X_INC_CS & !nFB_WR & FB_16B1;
+ -- DST Y INC
+ BL_DST_Y_INC[].CLK = MAIN_CLK;
+ BL_DST_Y_INC[] = !BL_BUSY & FB_AD[31..16];
+ BL_DST_Y_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C518"; -- $F8A30/2
+ BL_DST_Y_INC[15..8].ENA = BL_DST_Y_INC_CS & !nFB_WR & FB_16B0;
+ BL_DST_Y_INC[7..0].ENA = BL_DST_Y_INC_CS & !nFB_WR & FB_16B1;
+ -- DST ADR HIGH
+ BL_DST_ADR[].CLK = MAIN_CLK;
+ BL_DST_ADR[31..16] = !BL_BUSY & FB_AD[31..16];
+ BL_DST_ADRH_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C512"; -- $F8A24/2
+ BL_DST_ADR[31..24].ENA = BL_DST_ADRH_CS & !nFB_WR & FB_16B0;
+ BL_DST_ADR[23..16].ENA = BL_DST_ADRH_CS & !nFB_WR & FB_16B1;
+ -- DST ADR LOW
+ BL_DST_ADR[].CLK = MAIN_CLK;
+ BL_DST_ADR[15..0] = !BL_BUSY & FB_AD[31..16];
+ BL_DST_ADRL_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C513"; -- $F8A26/2
+ BL_DST_ADR[15..8].ENA = BL_DST_ADRL_CS & !nFB_WR & FB_16B0;
+ BL_DST_ADR[7..0].ENA = BL_DST_ADRL_CS & !nFB_WR & FB_16B1;
+ -- X COUNT
+ BL_X_CNT[].CLK = MAIN_CLK;
+ BL_X_CNT[] = !BL_BUSY & FB_AD[31..16];
+ BL_X_CNT_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51B"; -- $F8A36/2
+ BL_X_CNT[15..8].ENA = BL_X_CNT_CS & !nFB_WR & FB_16B0;
+ BL_X_CNT[7..0].ENA = BL_X_CNT_CS & !nFB_WR & FB_16B1;
+ -- Y COUNT
+ BL_Y_CNT[].CLK = MAIN_CLK;
+ BL_Y_CNT[] = !BL_BUSY & FB_AD[31..16];
+ BL_Y_CNT_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51C"; -- $F8A38/2
+ BL_Y_CNT[15..8].ENA = BL_Y_CNT_CS & !nFB_WR & FB_16B0;
+ BL_Y_CNT[7..0].ENA = BL_Y_CNT_CS & !nFB_WR & FB_16B1;
+ -- HALFTONE OP BYT
+ BL_HT_OP[].CLK = MAIN_CLK;
+ BL_HT_OP[] = FB_AD[31..24];
+ BL_HT_OP_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51D"; -- $F8A3A/2
+ BL_HT_OP[7..0].ENA = BL_HT_OP_CS & !nFB_WR & FB_16B0;
+ -- LOGIC OP BYT
+ BL_LC_OP[].CLK = MAIN_CLK;
+ BL_LC_OP[] = FB_AD[23..16];
+ BL_LC_OP[7..0].ENA = BL_HT_OP_CS & !nFB_WR & FB_16B1; -- $F8A3B
+ -- LINE NUMBER BYT
+ BL_LN[].CLK = MAIN_CLK;
+ BL_LN[] = !BL_BUSY & FB_AD[31..24];
+ BL_LN_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51E"; -- $F8A3C/2
+ BL_LN[7..0].ENA = BL_LN_CS & !nFB_WR & FB_16B0;
+ -- SKEW BYT
+ BL_SKEW[].CLK = MAIN_CLK;
+ BL_SKEW[] = FB_AD[31..24];
+ BL_SKEW[7..0].ENA = BL_LN_CS & !nFB_WR & FB_16B1; -- $F8A3D
+--- REGISTER OUT
+ FB_AD[31..16] = lpm_bustri_WORD(
+ BL_HRAM_CS & BL_HRAM_OUT[]
+ # BL_SRC_X_INC_CS & BL_SRC_X_INC[]
+ # BL_SRC_Y_INC_CS & BL_SRC_Y_INC[]
+ # BL_SRC_ADRH_CS & BL_SRC_ADR[31..16]
+ # BL_SRC_ADRL_CS & BL_SRC_ADR[15..0]
+ # BL_ENDMASK1_CS & BL_ENDMASK1[]
+ # BL_ENDMASK2_CS & BL_ENDMASK2[]
+ # BL_ENDMASK3_CS & BL_ENDMASK3[]
+ # BL_DST_X_INC_CS & BL_DST_X_INC[]
+ # BL_DST_Y_INC_CS & BL_DST_Y_INC[]
+ # BL_DST_ADRH_CS & BL_DST_ADR[31..16]
+ # BL_DST_ADRL_CS & BL_DST_ADR[15..0]
+ # BL_X_CNT_CS & BL_X_CNT[]
+ # BL_Y_CNT_CS & BL_Y_CNT[]
+ # BL_HT_OP_CS & (BL_HT_OP[],BL_LC_OP[])
+ # BL_LN_CS & (BL_LN[],BL_SKEW[])
+ ,BLITTER_CS & !nFB_OE); -- FFFF8A00-3F/40
+-----------------------------------------
+--
+ BL_READ_SRC.CLK = DDRCLK0;
+ BL_READ_DST.CLK = DDRCLK0;
+
+-- READY SIGNAL 1 CLOCK SPÄTER
+ BL_DATA_DDR_READY.CLK = DDRCLK0;
+ BL_DATA_DDR_READY = BL_DATA_DDR_READY & BLITTER_DACK0;
+-- SRC BUFFER LADEN
+ BL_SKEW_IN[].CLK = DDRCLK0;
+ BL_SKEW_IN[].ENA = BL_DATA_DDR_READY & BL_READ_SRC;
+ BL_SKEW_IN[255..128] = BLITTER_DIN[];
+ BL_SKEW_IN[127..0] = BL_SKEW_IN[255..128];
+-- DST BUFFER LADEN
+ BL_DST_BUFFER[].CLK = DDRCLK0;
+ BL_DST_BUFFER[].ENA = BL_DATA_DDR_READY & BL_READ_DST;
+ BL_DST_BUFFER[] = BLITTER_DIN[];
+-- SKEW EXTENDET
+ BL_SKEW_EXT[6..4] = BL_SRC_ADR[3..1];
+ BL_SKEW_EXT[3..0] = BL_SKEW[3..0];
+-- SKEW EXT MUX
+ BL_SKEW_OUT[] = lpm_clshift0(BL_SKEW_IN[],BL_SKEW_EXT[]); -- BIT 127..0 SIND RELEVANT
+-- HOP
+ IF BL_HT_OP[1..0]==B"00" THEN
+ HOP_OUT[] = H"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF";
+ ELSE
+ IF BL_HT_OP[1..0]==B"01" THEN
+ HOP_OUT[] = (BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[]);
+ ELSE
+ IF BL_HT_OP[1..0]==B"10" THEN
+ HOP_OUT[] = BL_SKEW_OUT[127..0];
+ ELSE
+ HOP_OUT[] = BL_SKEW_OUT[127..0] & (BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[]);
+ END IF;
+ END IF;
+ END IF;
+
+
+
+ BLITTER_RUN = GND; --VCC;
+ BLITTER_SIG = GND; --VCC;
+ BLITTER_WR = GND; --VCC;
+ BL_BUSY = GND;
+
+ COUNT[] = COUNT[] + 16;
+ COUNT[].CLK = BLITTER_DACK0;
+ BLITTER_DOUT[] = H"112233445566778899AABBCCDDEEFF00";
+ BLITTER_ADR[] = (0, COUNT[]) + 400000;
+
+END;
+
diff --git a/FPGA_by_Fredi/BLITTER.tdf.bak b/FPGA_by_Fredi/BLITTER.tdf.bak
new file mode 100644
index 0000000..b80e5c2
--- /dev/null
+++ b/FPGA_by_Fredi/BLITTER.tdf.bak
@@ -0,0 +1,313 @@
+-- WARNING: Do NOT edit the input and output ports in this file in a text
+-- editor if you plan to continue editing the block that represents it in
+-- the Block Editor! File corruption is VERY likely to occur.
+
+-- Copyright (C) 1991-2010 Altera Corporation
+-- Your use of Altera Corporation's design tools, logic functions
+-- and other software and tools, and its AMPP partner logic
+-- functions, and any output files from any of the foregoing
+-- (including device programming or simulation files), and any
+-- associated documentation or information are expressly subject
+-- to the terms and conditions of the Altera Program License
+-- Subscription Agreement, Altera MegaCore Function License
+-- Agreement, or other applicable license agreement, including,
+-- without limitation, that your use is for the sole purpose of
+-- programming logic devices manufactured by Altera and sold by
+-- Altera or its authorized distributors. Please refer to the
+-- applicable agreement for further details.
+
+
+-- Generated by Quartus II Version 9.1 (Build Build 350 03/24/2010)
+-- Created on Sat Jan 15 11:06:17 2011
+INCLUDE "lpm_bustri_WORD.inc";
+INCLUDE "VIDEO/BLITTER/lpm_clshift0.INC";
+INCLUDE "VIDEO/BLITTER/altsyncram0.INC";
+
+CONSTANT BL_SKEW_LF = 255;
+
+-- Title Statement (optional)
+TITLE "Blitter";
+
+
+-- Parameters Statement (optional)
+
+-- {{ALTERA_PARAMETERS_BEGIN}} DO NOT REMOVE THIS LINE!
+-- {{ALTERA_PARAMETERS_END}} DO NOT REMOVE THIS LINE!
+
+
+-- Subdesign Section
+
+SUBDESIGN BLITTER
+(
+ -- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
+ nRSTO : INPUT;
+ MAIN_CLK : INPUT;
+ FB_ALE : INPUT;
+ nFB_WR : INPUT;
+ nFB_OE : INPUT;
+ FB_SIZE0 : INPUT;
+ FB_SIZE1 : INPUT;
+ VIDEO_RAM_CTR[15..0] : INPUT;
+ BLITTER_ON : INPUT;
+ FB_ADR[31..0] : INPUT;
+ nFB_CS1 : INPUT;
+ nFB_CS2 : INPUT;
+ nFB_CS3 : INPUT;
+ DDRCLK0 : INPUT;
+ BLITTER_DIN[127..0] : INPUT;
+ BLITTER_DACK[4..0] : INPUT;
+ SR_BLITTER_DACK : INPUT;
+ BLITTER_RUN : OUTPUT;
+ BLITTER_DOUT[127..0] : OUTPUT;
+ BLITTER_ADR[31..0] : OUTPUT;
+ BLITTER_SIG : OUTPUT;
+ BLITTER_WR : OUTPUT;
+ BLITTER_TA : OUTPUT;
+ FB_AD[31..0] : BIDIR;
+ -- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
+)
+
+VARIABLE
+ FB_B[3..0] :NODE;
+ FB_16B[1..0] :NODE;
+ BLITTER_CS :NODE;
+ BL_BUSY :NODE;
+ BL_HRAM_CS :NODE;
+ BL_HRAM_ADR[3..0] :NODE;
+ BL_HRAM_OUT[15..0] :NODE;
+ BL_HRAM_BE[1..0] :NODE;
+ BL_SRC_X_INC_CS :NODE;
+ BL_SRC_X_INC[15..0] :DFFE;
+ BL_SRC_Y_INC_CS :NODE;
+ BL_SRC_Y_INC[15..0] :DFFE;
+ BL_ENDMASK1_CS :NODE;
+ BL_ENDMASK1[15..0] :DFFE;
+ BL_ENDMASK2_CS :NODE;
+ BL_ENDMASK2[15..0] :DFFE;
+ BL_ENDMASK3_CS :NODE;
+ BL_ENDMASK3[15..0] :DFFE;
+ BL_SRC_ADRH_CS :NODE;
+ BL_SRC_ADRL_CS :NODE;
+ BL_SRC_ADR[31..0] :DFFE;
+ BL_DST_X_INC_CS :NODE;
+ BL_DST_X_INC[15..0] :DFFE;
+ BL_DST_Y_INC_CS :NODE;
+ BL_DST_Y_INC[15..0] :DFFE;
+ BL_DST_ADRH_CS :NODE;
+ BL_DST_ADRL_CS :NODE;
+ BL_DST_ADR[31..0] :DFFE;
+ BL_X_CNT_CS :NODE;
+ BL_X_CNT[15..0] :DFFE;
+ BL_Y_CNT_CS :NODE;
+ BL_Y_CNT[15..0] :DFFE;
+ BL_HT_OP_CS :NODE;
+ BL_HT_OP[7..0] :DFFE;
+ BL_LC_OP[7..0] :DFFE;
+ BL_LN_CS :NODE;
+ BL_LN[7..0] :DFFE;
+ BL_SKEW[7..0] :DFFE;
+
+ BL_SKEW_EXT[6..0] :NODE;
+ BL_SKEW_IN[255..0] :DFFE;
+ BL_SKEW_OUT[255..0] :NODE;
+
+ BL_DATA_DDR_READY :DFF; -- 1 WENN DATEN GESCHRIEBEN ODER LESBAR
+ BL_READ_SRC :DFFE;
+ BL_DST_BUFFER[127..0] :DFFE;
+ BL_READ_DST :DFFE;
+
+ HOP_OUT[127..0] :NODE;
+
+ COUNT[18..0] :DFF;
+
+BEGIN
+-- BYT SELECT 32 BIT
+ FB_B0 = FB_ADR[1..0]==0; -- ADR==0
+ FB_B1 = FB_ADR[1..0]==1 -- ADR==1
+ # FB_SIZE1 & !FB_SIZE0 & !FB_ADR1 -- HIGH WORD
+ # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
+ FB_B2 = FB_ADR[1..0]==2 -- ADR==2
+ # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
+ FB_B3 = FB_ADR[1..0]==3 -- ADR==3
+ # FB_SIZE1 & !FB_SIZE0 & FB_ADR1 -- LOW WORD
+ # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
+-- BYT SELECT 16 BIT
+ FB_16B0 = FB_ADR[0]==0; -- ADR==0
+ FB_16B1 = FB_ADR[0]==1 -- ADR==1
+ # !(!FB_SIZE1 & FB_SIZE0); -- NOT BYT
+-- BLITTER CS
+ BLITTER_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..6]==H"3E28"; -- FFFF8A00-3F/40
+ BLITTER_TA = BLITTER_CS;
+-- REGISTER
+ -- HALFTON RAM
+ BL_HRAM_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..5]==H"7C50"; -- $F8A00/20
+ BL_HRAM_BE1 = BL_HRAM_CS & FB_16B0 # !BL_HRAM_CS;
+ BL_HRAM_BE0 = BL_HRAM_CS & FB_16B1 # !BL_HRAM_CS;
+ BL_HRAM_ADR[] = BL_HRAM_CS & FB_ADR[4..1]
+ # !BL_HRAM_CS & BL_LN[3..0];
+ BL_HRAM_OUT[] = altsyncram0(BL_HRAM_ADR[],BL_HRAM_BE[],DDRCLK0,FB_AD[31..16],BL_HRAM_CS & !nFB_WR);
+ -- SRC X INC
+ BL_SRC_X_INC[].CLK = MAIN_CLK;
+ BL_SRC_X_INC[] = !BL_BUSY & FB_AD[31..16];
+ BL_SRC_X_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C510"; -- $F8A20/2
+ BL_SRC_X_INC[15..8].ENA = BL_SRC_X_INC_CS & !nFB_WR & FB_16B0;
+ BL_SRC_X_INC[7..0].ENA = BL_SRC_X_INC_CS & !nFB_WR & FB_16B1;
+ -- SRC Y INC
+ BL_SRC_Y_INC[].CLK = MAIN_CLK;
+ BL_SRC_Y_INC[] = !BL_BUSY & FB_AD[31..16];
+ BL_SRC_Y_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C511"; -- $F8A22/2
+ BL_SRC_Y_INC[15..8].ENA = BL_SRC_Y_INC_CS & !nFB_WR & FB_16B0;
+ BL_SRC_Y_INC[7..0].ENA = BL_SRC_Y_INC_CS & !nFB_WR & FB_16B1;
+ -- SRC ADR HIGH
+ BL_SRC_ADR[].CLK = MAIN_CLK;
+ BL_SRC_ADR[31..16] = !BL_BUSY & FB_AD[31..16];
+ BL_SRC_ADRH_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C512"; -- $F8A24/2
+ BL_SRC_ADR[31..24].ENA = BL_SRC_ADRH_CS & !nFB_WR & FB_16B0;
+ BL_SRC_ADR[23..16].ENA = BL_SRC_ADRH_CS & !nFB_WR & FB_16B1;
+ -- SRC ADR LOW
+ BL_SRC_ADR[].CLK = MAIN_CLK;
+ BL_SRC_ADR[15..0] = !BL_BUSY & FB_AD[31..16];
+ BL_SRC_ADRL_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C513"; -- $F8A26/2
+ BL_SRC_ADR[15..8].ENA = BL_SRC_ADRL_CS & !nFB_WR & FB_16B0;
+ BL_SRC_ADR[7..0].ENA = BL_SRC_ADRL_CS & !nFB_WR & FB_16B1;
+ -- ENDMASK 1
+ BL_ENDMASK1[].CLK = MAIN_CLK;
+ BL_ENDMASK1[] = FB_AD[31..16];
+ BL_ENDMASK1_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C514"; -- $F8A28/2
+ BL_ENDMASK1[15..8].ENA = BL_ENDMASK1_CS & !nFB_WR & FB_16B0;
+ BL_ENDMASK1[7..0].ENA = BL_ENDMASK1_CS & !nFB_WR & FB_16B1;
+ -- ENDMASK 2
+ BL_ENDMASK2[].CLK = MAIN_CLK;
+ BL_ENDMASK2[] = FB_AD[31..16];
+ BL_ENDMASK2_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C515"; -- $F8A2A/2
+ BL_ENDMASK2[15..8].ENA = BL_ENDMASK2_CS & !nFB_WR & FB_16B0;
+ BL_ENDMASK2[7..0].ENA = BL_ENDMASK2_CS & !nFB_WR & FB_16B1;
+ -- ENDMASK 3
+ BL_ENDMASK3[].CLK = MAIN_CLK;
+ BL_ENDMASK3[] = FB_AD[31..16];
+ BL_ENDMASK3_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C516"; -- $F8A2C/2
+ BL_ENDMASK3[15..8].ENA = BL_ENDMASK3_CS & !nFB_WR & FB_16B0;
+ BL_ENDMASK3[7..0].ENA = BL_ENDMASK3_CS & !nFB_WR & FB_16B1;
+ -- DST X INC
+ BL_DST_X_INC[].CLK = MAIN_CLK;
+ BL_DST_X_INC[] = !BL_BUSY & FB_AD[31..16];
+ BL_DST_X_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C517"; -- $F8A2E/2
+ BL_DST_X_INC[15..8].ENA = BL_DST_X_INC_CS & !nFB_WR & FB_16B0;
+ BL_DST_X_INC[7..0].ENA = BL_DST_X_INC_CS & !nFB_WR & FB_16B1;
+ -- DST Y INC
+ BL_DST_Y_INC[].CLK = MAIN_CLK;
+ BL_DST_Y_INC[] = !BL_BUSY & FB_AD[31..16];
+ BL_DST_Y_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C518"; -- $F8A30/2
+ BL_DST_Y_INC[15..8].ENA = BL_DST_Y_INC_CS & !nFB_WR & FB_16B0;
+ BL_DST_Y_INC[7..0].ENA = BL_DST_Y_INC_CS & !nFB_WR & FB_16B1;
+ -- DST ADR HIGH
+ BL_DST_ADR[].CLK = MAIN_CLK;
+ BL_DST_ADR[31..16] = !BL_BUSY & FB_AD[31..16];
+ BL_DST_ADRH_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C512"; -- $F8A24/2
+ BL_DST_ADR[31..24].ENA = BL_DST_ADRH_CS & !nFB_WR & FB_16B0;
+ BL_DST_ADR[23..16].ENA = BL_DST_ADRH_CS & !nFB_WR & FB_16B1;
+ -- DST ADR LOW
+ BL_DST_ADR[].CLK = MAIN_CLK;
+ BL_DST_ADR[15..0] = !BL_BUSY & FB_AD[31..16];
+ BL_DST_ADRL_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C513"; -- $F8A26/2
+ BL_DST_ADR[15..8].ENA = BL_DST_ADRL_CS & !nFB_WR & FB_16B0;
+ BL_DST_ADR[7..0].ENA = BL_DST_ADRL_CS & !nFB_WR & FB_16B1;
+ -- X COUNT
+ BL_X_CNT[].CLK = MAIN_CLK;
+ BL_X_CNT[] = !BL_BUSY & FB_AD[31..16];
+ BL_X_CNT_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51B"; -- $F8A36/2
+ BL_X_CNT[15..8].ENA = BL_X_CNT_CS & !nFB_WR & FB_16B0;
+ BL_X_CNT[7..0].ENA = BL_X_CNT_CS & !nFB_WR & FB_16B1;
+ -- Y COUNT
+ BL_Y_CNT[].CLK = MAIN_CLK;
+ BL_Y_CNT[] = !BL_BUSY & FB_AD[31..16];
+ BL_Y_CNT_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51C"; -- $F8A38/2
+ BL_Y_CNT[15..8].ENA = BL_Y_CNT_CS & !nFB_WR & FB_16B0;
+ BL_Y_CNT[7..0].ENA = BL_Y_CNT_CS & !nFB_WR & FB_16B1;
+ -- HALFTONE OP BYT
+ BL_HT_OP[].CLK = MAIN_CLK;
+ BL_HT_OP[] = FB_AD[31..24];
+ BL_HT_OP_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51D"; -- $F8A3A/2
+ BL_HT_OP[7..0].ENA = BL_HT_OP_CS & !nFB_WR & FB_16B0;
+ -- LOGIC OP BYT
+ BL_LC_OP[].CLK = MAIN_CLK;
+ BL_LC_OP[] = FB_AD[23..16];
+ BL_LC_OP[7..0].ENA = BL_HT_OP_CS & !nFB_WR & FB_16B1; -- $F8A3B
+ -- LINE NUMBER BYT
+ BL_LN[].CLK = MAIN_CLK;
+ BL_LN[] = !BL_BUSY & FB_AD[31..24];
+ BL_LN_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51E"; -- $F8A3C/2
+ BL_LN[7..0].ENA = BL_LN_CS & !nFB_WR & FB_16B0;
+ -- SKEW BYT
+ BL_SKEW[].CLK = MAIN_CLK;
+ BL_SKEW[] = FB_AD[31..24];
+ BL_SKEW[7..0].ENA = BL_LN_CS & !nFB_WR & FB_16B1; -- $F8A3D
+--- REGISTER OUT
+ FB_AD[31..16] = lpm_bustri_WORD(
+ BL_HRAM_CS & BL_HRAM_OUT[]
+ # BL_SRC_X_INC_CS & BL_SRC_X_INC[]
+ # BL_SRC_Y_INC_CS & BL_SRC_Y_INC[]
+ # BL_SRC_ADRH_CS & BL_SRC_ADR[31..16]
+ # BL_SRC_ADRL_CS & BL_SRC_ADR[15..0]
+ # BL_ENDMASK1_CS & BL_ENDMASK1[]
+ # BL_ENDMASK2_CS & BL_ENDMASK2[]
+ # BL_ENDMASK3_CS & BL_ENDMASK3[]
+ # BL_DST_X_INC_CS & BL_DST_X_INC[]
+ # BL_DST_Y_INC_CS & BL_DST_Y_INC[]
+ # BL_DST_ADRH_CS & BL_DST_ADR[31..16]
+ # BL_DST_ADRL_CS & BL_DST_ADR[15..0]
+ # BL_X_CNT_CS & BL_X_CNT[]
+ # BL_Y_CNT_CS & BL_Y_CNT[]
+ # BL_HT_OP_CS & (BL_HT_OP[],BL_LC_OP[])
+ # BL_LN_CS & (BL_LN[],BL_SKEW[])
+ ,BLITTER_CS & !nFB_OE); -- FFFF8A00-3F/40
+-----------------------------------------
+--
+ BL_READ_SRC.CLK = DDRCLK0;
+ BL_READ_DST.CLK = DDRCLK0;
+
+-- READY SIGNAL 1 CLOCK SPÄTER
+ BL_DATA_DDR_READY.CLK = DDRCLK0;
+ BL_DATA_DDR_READY = BL_DATA_DDR_READY & BLITTER_DACK0;
+-- SRC BUFFER LADEN
+ BL_SKEW_IN[].CLK = DDRCLK0;
+ BL_SKEW_IN[].ENA = BL_DATA_DDR_READY & BL_READ_SRC;
+ BL_SKEW_IN[255..128] = BLITTER_DIN[];
+ BL_SKEW_IN[127..0] = BL_SKEW_IN[255..128];
+-- DST BUFFER LADEN
+ BL_DST_BUFFER[].CLK = DDRCLK0;
+ BL_DST_BUFFER[].ENA = BL_DATA_DDR_READY & BL_READ_DST;
+ BL_DST_BUFFER[] = BLITTER_DIN[];
+-- SKEW EXTENDET
+ BL_SKEW_EXT[6..4] = BL_SRC_ADR[3..1];
+ BL_SKEW_EXT[3..0] = BL_SKEW[3..0];
+-- SKEW EXT MUX
+ BL_SKEW_OUT[] = lpm_clshift0(BL_SKEW_IN[],BL_SKEW_EXT[]); -- BIT 127..0 SIND RELEVANT
+-- HOP
+ IF BL_HT_OP[1..0]==B"00" THEN
+ HOP_OUT[] = H"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF";
+ ELSE
+ IF BL_HT_OP[1..0]==B"01" THEN
+ HOP_OUT[] = (BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[]);
+ ELSE
+ IF BL_HT_OP[1..0]==B"10" THEN
+ HOP_OUT[] = BL_SKEW_OUT[127..0];
+ ELSE
+ HOP_OUT[] = BL_SKEW_OUT[127..0] & (BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[]);
+ END IF;
+ END IF;
+ END IF;
+
+
+
+ BLITTER_RUN = gnd; --VCC;
+ BLITTER_SIG = gnd; --VCC;
+ BLITTER_WR = gnd; --VCC;
+
+ COUNT[] = COUNT[] + 16;
+ COUNT[].CLK = BLITTER_DACK0;
+ BLITTER_DOUT[] = H"112233445566778899AABBCCDDEEFF00";
+ BLITTER_ADR[] = (0, COUNT[]) + 400000;
+
+END;
+
diff --git a/FPGA_by_Fredi/DSP/dsp56k.zip b/FPGA_by_Fredi/DSP/dsp56k.zip
deleted file mode 100644
index 6522299..0000000
Binary files a/FPGA_by_Fredi/DSP/dsp56k.zip and /dev/null differ
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd
index b2b8dbb..f3aeb16 100644
--- a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd
@@ -115,7 +115,7 @@ ENTITY FalconIO_SDCard_IDE_CF IS
nCF_CS0 : OUT STD_LOGIC;
nIDE_RD : INOUT STD_LOGIC;
nIDE_WR : INOUT STD_LOGIC;
- AMKB_TX : OUT STD_LOGIC;
+ AMKB_TX : buffer STD_LOGIC;
IDE_RES : OUT STD_LOGIC;
DTR : OUT STD_LOGIC;
RTS : OUT STD_LOGIC;
@@ -132,6 +132,7 @@ ENTITY FalconIO_SDCard_IDE_CF IS
DMA_DRQ : OUT STD_LOGIC;
FB_AD : INOUT STD_LOGIC_VECTOR(31 downto 0);
LP_D : INOUT STD_LOGIC_VECTOR(7 downto 0);
+ SND_A : INOUT STD_LOGIC_VECTOR(7 downto 0);
ACSI_D : INOUT STD_LOGIC_VECTOR(7 downto 0);
SCSI_D : INOUT STD_LOGIC_VECTOR(7 downto 0);
SCSI_PAR : INOUT STD_LOGIC;
@@ -156,12 +157,15 @@ signal FB_B0 : STD_LOGIC; -- UPPER BYT BEI 16BIT BUS
signal FB_B1 : STD_LOGIC; -- LOWER BYT BEI 16BIT BUS
signal BYT : STD_LOGIC; -- WENN BYT -> 1
signal LONG : STD_LOGIC; -- WENN -> 1
+signal FB_ADI : STD_LOGIC_VECTOR(15 downto 0); -- gespeicherte writedaten
+signal nResetatio : STD_LOGIC; -- reset atari bausteine
-- KEYBOARD MIDI
signal ACIA_CS_I : STD_LOGIC;
signal IRQ_KEYBDn : STD_LOGIC;
signal IRQ_MIDIn : STD_LOGIC;
signal KEYB_RxD : STD_LOGIC;
-signal AMKB_REG : STD_LOGIC_VECTOR(4 downto 0);
+signal AMKB_REG : STD_LOGIC_VECTOR(3 downto 0);
+signal AMKB_TX_sync : std_logic;
signal MIDI_OUT : STD_LOGIC;
signal DATA_OUT_ACIA_I : STD_LOGIC_VECTOR(7 downto 0);
signal DATA_OUT_ACIA_II : STD_LOGIC_VECTOR(7 downto 0);
@@ -169,8 +173,8 @@ signal DATA_OUT_ACIA_II : STD_LOGIC_VECTOR(7 downto 0);
signal MFP_CS : STD_LOGIC;
signal MFP_INTACK : STD_LOGIC;
signal LDS : STD_LOGIC;
+signal acia_irq : STD_LOGIC;
signal DTACK_OUT_MFPn : STD_LOGIC;
-signal IRQ_ACIAn : STD_LOGIC;
signal DINTn : STD_LOGIC;
signal DATA_OUT_MFP : STD_LOGIC_VECTOR(7 downto 0);
signal TDO : STD_LOGIC;
@@ -180,7 +184,22 @@ signal SNDCS_I : STD_LOGIC;
signal SNDIR_I : STD_LOGIC;
signal LP_DIR_X : STD_LOGIC;
signal DA_OUT_X : STD_LOGIC_VECTOR(7 downto 0);
+signal SND_A_X : STD_LOGIC_VECTOR(7 downto 0);
signal LP_D_X : STD_LOGIC_VECTOR(7 downto 0);
+signal nLP_STR : STD_LOGIC;
+-- DMA SOUND
+signal dma_snd_cs : STD_LOGIC;
+signal sndmactl : STD_LOGIC_VECTOR(7 downto 0);
+signal sndbashi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndbasmi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndbaslo : STD_LOGIC_VECTOR(7 downto 0);
+signal sndadrhi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndadrmi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndadrlo : STD_LOGIC_VECTOR(7 downto 0);
+signal sndendhi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndendmi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndendlo : STD_LOGIC_VECTOR(7 downto 0);
+signal sndmode : STD_LOGIC_VECTOR(7 downto 0);
-- DIV
signal SUB_BUS : STD_LOGIC; -- SUB BUS MIT ROM-PORT, CF UND IDE
signal ROM_CS : STD_LOGIC;
@@ -265,22 +284,36 @@ signal NEXT_nIDE_WR : STD_LOGIC;
type CMD_STATES is( IDLE, T1, T6, T7);
signal CMD_STATE : CMD_STATES;
signal NEXT_CMD_STATE : CMD_STATES;
+-- Paddle
+signal paddle_cs : STD_LOGIC;
-
BEGIN
LONG <= '1' when FB_SIZE1 = '0' and FB_SIZE0 = '0' else '0';
BYT <= '1' when FB_SIZE1 = '0' and FB_SIZE0 = '1' else '0';
FB_B0 <= '1' when FB_ADR(0) = '0' or BYT = '0' else '0';
FB_B1 <= '1' when FB_ADR(0) = '1' or BYT = '0' else '0';
-FALCON_IO_TA <= '1' when SNDCS = '1' or DTACK_OUT_MFPn = '0' or ACIA_CS_I = '1' or DMA_MODUS_CS ='1'
- or DMA_ADR_CS = '1' or DMA_DIRM_CS = '1' or DMA_BYT_CNT_CS = '1' or FCF_CS = '1' or IDE_CF_TA = '1' else '0';
-SUB_BUS <= '1' when nFB_WR = '1' and ROM_CS = '1' ELSE
+FALCON_IO_TA <= '1' when ACIA_CS_I = '1' or DTACK_OUT_MFPn = '0' or DMA_MODUS_CS ='1' or dma_snd_cs = '1' or paddle_cs = '1'
+ or DMA_ADR_CS = '1' or DMA_DIRM_CS = '1' or DMA_BYT_CNT_CS = '1' or FCF_CS = '1' or IDE_CF_TA = '1' else '0';--SNDCS = '1' or
+SUB_BUS <= '1' when nFB_WR = '1' and ROM_CS = '1' ELSE
'1' when nFB_WR = '1' and IDE_CF_CS = '1' ELSE
'1' when nFB_WR = '0' and nIDE_WR = '0' ELSE '0';
-nRP_UDS <= '0' when SUB_BUS = '1' and FB_B0 = '1' else '1';
-nRP_LDS <= '0' when SUB_BUS = '1' and FB_B1 = '1' else '1';
+nRP_UDS <= '0' when nFB_CS1 = '0' and SUB_BUS = '1' and FB_B0 = '1' else '1';
+nRP_LDS <= '0' when nFB_CS1 = '0' and SUB_BUS = '1' and FB_B1 = '1' else '1';
nDREQ0 <= '0';
+-- input daten halten
+process(MAIN_CLK, nFB_WR, FB_AD(31 downto 16), FB_ADI(15 downto 0))
+ begin
+ if rising_edge(MAIN_CLK) then
+ IF nFB_WR = '0' THEN
+ FB_ADI <= FB_AD(31 downto 16);
+ ELSE
+ FB_ADI <= FB_ADI;
+ end if;
+ ELSE
+ FB_ADI <= FB_ADI;
+ end if;
+ END PROCESS;
----------------------------------------------------------------------------
-- SD
----------------------------------------------------------------------------
@@ -386,7 +419,7 @@ RDF_DIN <= CD_OUT_FDC when DMA_MODUS(7) = '1' else SCSI_DOUT;
q => WRF_DOUT,
rdusedw => WRF_AZ
);
-CD_IN_FDC <= WRF_DOUT when DMA_ACTIV = '1' and DMA_MODUS(8) = '1' else FB_AD(23 downto 16); -- BEI DMA WRITE <-FIFO SONST <-FB
+CD_IN_FDC <= WRF_DOUT when DMA_ACTIV = '1' and DMA_MODUS(8) = '1' else FB_ADI(7 downto 0); -- BEI DMA WRITE <-FIFO SONST <-FB
DMA_AZ_CS <= '1' when nFB_CS2 = '0' and FB_ADR(26 downto 0) = x"002010C" else '0'; -- F002'010C LONG
FB_AD <= DMA_DRQ_Q & DMA_DRQ_REG & IDE_INT & FDINT & SCSI_INT & RDF_AZ & "0" & DMA_STATUS & "00" & WRF_AZ when DMA_AZ_CS = '1' and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZ";
DMA_DRQ_Q <= '1' when DMA_DRQ_REG = "11" and DMA_MODUS(6) = '0' else '0';
@@ -513,7 +546,7 @@ SCSI_CS <= '1' when DMA_DATEN_CS = '1' and DMA_MODUS(4 downto 3) = "01" and FB_
I_FDC: WF1772IP_TOP_SOC
port map(
CLK => FDC_CLK,
- RESETn => nRSTO,
+ RESETn => nResetatio,
CSn => FDCS_In,
RWn => nFDC_WR,
A1 => CA2,
@@ -695,13 +728,13 @@ CLR_FIFO <= DMA_MODUS(8) xor DMA_DIR_OLD;
I_SCSI: WF5380_TOP_SOC
port map(
CLK => FDC_CLK,
- RESETn => nRSTO,
+ RESETn => nResetatio,
ADR => CA2 & CA1 & CA0,
DATA_IN => CD_IN_FDC,
DATA_OUT => SCSI_DOUT,
--DATA_EN : out bit;
-- Bus and DMA controls:
- CSn => '1', --SCSI_CSn, ABGESCHALTET
+ CSn => SCSI_CSn,
RDn => (not nFDC_WR) or (not SCSI_CS),
WRn => nFDC_WR or (not SCSI_CS),
EOPn => '1',
@@ -745,18 +778,19 @@ CLR_FIFO <= DMA_MODUS(8) xor DMA_DIR_OLD;
-- MSG_EN => MSG_EN
);
-- SCSI ACSI ---------------------------------------------------------------
-SCSI_D <= DB_OUTn when DB_EN = '1' else "ZZZZZZZZ";
-SCSI_DIR <= '1'; --'0' when DB_EN = '1' else '1'; --ABGESCHALTET
+SCSI_D <= "ZZZZZZZZ";--DB_OUTn when DB_EN = '1' else "ZZZZZZZZ";
+SCSI_DIR <= '1';-- when DB_EN = '1' else '1';
SCSI_PAR <= DBP_OUTn when DBP_EN = '1' else 'Z';
-nSCSI_RST <= RST_OUTn when RST_EN = '1' else 'Z';
-nSCSI_BUSY <= BSY_OUTn when BSY_EN = '1' else 'Z';
-nSCSI_SEL <= SEL_OUTn when SEL_EN = '1' else 'Z';
+nSCSI_RST <= 'Z';--RST_OUTn when RST_EN = '1' else 'Z';
+nSCSI_BUSY <= 'Z';--BSY_OUTn when BSY_EN = '1' else 'Z';
+nSCSI_SEL <= 'Z';--SEL_OUTn when SEL_EN = '1' else 'Z';
ACSI_DIR <= '0';
ACSI_D <= "ZZZZZZZZ";
nACSI_CS <= '1';
ACSI_A1 <= CA1;
nACSI_RESET <= nRSTO;
nACSI_ACK <= '1';
+nResetatio <= '0' when nRSTO = '0' or ACP_CONF(24) = '1' else '1';
----------------------------------------------------------------------------
-- ROM-PORT TA KOMMT FROM DEFAULT TA = 16 BUSCYCLEN = 500ns
----------------------------------------------------------------------------
@@ -769,16 +803,16 @@ nROM3 <= '0' when ROM_CS = '1' and FB_ADR(16) = '1' else '1';
I_ACIA_KEYBOARD: WF6850IP_TOP_SOC
port map(
CLK => MAIN_CLK,
- RESETn => nRSTO,
+ RESETn => nResetatio,
CS2n => FB_ADR(2),
CS1 => '1',
CS0 => ACIA_CS_I,
- E => ACIA_CS_I,
+ E => ACIA_CS_I,
RWn => nFB_WR,
RS => FB_ADR(1),
- DATA_IN => FB_AD(31 downto 24),
+ DATA_IN => FB_ADI(15 downto 8),
DATA_OUT => DATA_OUT_ACIA_I,
-- DATA_EN => DATA_EN_ACIA_I,
@@ -790,40 +824,45 @@ nROM3 <= '0' when ROM_CS = '1' and FB_ADR(16) = '1' else '1';
DCDn => '0',
IRQn => IRQ_KEYBDn,
- TXDATA => AMKB_TX
+ TXDATA => AMKB_TX_sync
--RTSn => -- Not used.
);
ACIA_CS_I <= '1' when nFB_CS1 = '0'and FB_ADR(19 downto 3) = x"1FF80" else '0'; -- FFC00-FFC07 FFC00/8
-KEYB_RxD <= '1' when AMKB_REG(3) = '1' or PIC_AMKB_RX = '0' else '0'; -- TASTATUR DATEN VOM PIC(PS2) OR NORMAL
-FB_AD(31 downto 24) <= DATA_OUT_ACIA_I when ACIA_CS_I = '1' and FB_ADR(2) = '0' and nFB_OE = '0' else "ZZZZZZZZ";
--- AMKB_TX: SPIKES AUSFILTERN ------------------------------------------
+KEYB_RxD <= '0' when AMKB_REG(3) = '0' or PIC_AMKB_RX = '0' else '1'; -- TASTATUR DATEN VOM PIC(PS2) OR NORMAL //
+FB_AD(31 downto 24) <= DATA_OUT_ACIA_I when ACIA_CS_I = '1' and FB_ADR(2) = '0' and nFB_OE = '0' else
+ DATA_OUT_ACIA_II when ACIA_CS_I = '1' and FB_ADR(2) = '1' and nFB_OE = '0' else "ZZZZZZZZ";
+-- AMKB_TX: SPIKES AUSFILTERN und sychronisieren ------------------------------------------
process(CLK2M, AMKB_RX, AMKB_REG)
begin
- if rising_edge(CLK2M) then
+ if rising_edge(CLK500k) then
+ AMKB_TX <= AMKB_TX_sync;
IF AMKB_RX = '0' THEN
- IF AMKB_REG < 16 THEN
- AMKB_REG <= "00000";
+ IF AMKB_REG < 8 THEN
+ AMKB_REG <= "0000";
ELSE
AMKB_REG <= AMKB_REG - 1;
END IF;
ELSE
- IF AMKB_REG > 15 THEN
- AMKB_REG <= "11111";
+ IF AMKB_REG > 7 THEN
+ AMKB_REG <= "1111";
ELSE
AMKB_REG <= AMKB_REG + 1;
END IF;
END IF;
ELSE
+ AMKB_TX <= AMKB_TX;
AMKB_REG <= AMKB_REG;
end if;
END PROCESS;
+-- acia interrupt ------------------------------------------
+acia_irq <= '0' when IRQ_KEYBDn = '0' or IRQ_MIDIn = '0' else '1';
----------------------------------------------------------------------------
-- ACIA MIDI
----------------------------------------------------------------------------
I_ACIA_MIDI: WF6850IP_TOP_SOC
port map(
CLK => MAIN_CLK,
- RESETn => nRSTO,
+ RESETn => nResetatio,
CS2n => '0',
CS1 => FB_ADR(2),
@@ -832,7 +871,7 @@ FB_AD(31 downto 24) <= DATA_OUT_ACIA_I when ACIA_CS_I = '1' and FB_ADR(2) = '0'
RWn => nFB_WR,
RS => FB_ADR(1),
- DATA_IN => FB_AD(31 downto 24),
+ DATA_IN => FB_ADI(15 downto 8),
DATA_OUT => DATA_OUT_ACIA_II,
-- DATA_EN => DATA_EN_ACIA_II,
@@ -845,18 +884,17 @@ FB_AD(31 downto 24) <= DATA_OUT_ACIA_I when ACIA_CS_I = '1' and FB_ADR(2) = '0'
IRQn => IRQ_MIDIn,
TXDATA => MIDI_OUT
--RTSn => -- Not used.
- );
-MIDI_TLR <= MIDI_OUT;
+ );
+MIDI_TLR <= MIDI_IN;
MIDI_OLR <= MIDI_OUT;
-FB_AD(31 downto 24) <= DATA_OUT_ACIA_II when ACIA_CS_I = '1' and FB_ADR(2) = '1' and nFB_OE = '0' else "ZZZZZZZZ";
----------------------------------------------------------------------------
-- MFP
----------------------------------------------------------------------------
I_MFP: WF68901IP_TOP_SOC
port map(
-- System control:
- CLK => MAIN_CLK,
- RESETn => nRSTO,
+ CLK => not MAIN_CLK,
+ RESETn => nResetatio,
-- Asynchronous bus control:
DSn => not LDS,
CSn => not MFP_CS,
@@ -867,14 +905,14 @@ FB_AD(31 downto 24) <= DATA_OUT_ACIA_II when ACIA_CS_I = '1' and FB_ADR(2) = '1'
DATA_IN => FB_AD(23 downto 16),
DATA_OUT => DATA_OUT_MFP,
-- DATA_EN => DATA_EN_MFP,
- GPIP_IN(7) => not DMA_DRQ_Q,
- GPIP_IN(6) => not RI,
+ GPIP_IN(7) => not DMA_DRQ_Q,
+ GPIP_IN(6) => not RI,
GPIP_IN(5) => DINTn,
- GPIP_IN(4) => IRQ_ACIAn,
+ GPIP_IN(4) => acia_irq,
GPIP_IN(3) => DSP_INT,
- GPIP_IN(2) => not CTS,
- GPIP_IN(1) => not DCD,
- GPIP_IN(0) => LP_BUSY,
+ GPIP_IN(2) => not CTS,
+ GPIP_IN(1) => not DCD,
+ GPIP_IN(0) => LP_BUSY,
-- GPIP_OUT =>, -- Not used; all GPIPs are direction input.
-- GPIP_EN =>, -- Not used; all GPIPs are direction input.
-- Interrupt control:
@@ -885,7 +923,7 @@ FB_AD(31 downto 24) <= DATA_OUT_ACIA_II when ACIA_CS_I = '1' and FB_ADR(2) = '1'
-- Timers and timer control:
XTAL1 => CLK2M4576,
TAI => '0',
- TBI => nBLANK,
+ TBI => nBLANK,
-- TAO =>,
-- TBO =>,
-- TCO =>,
@@ -911,24 +949,13 @@ FB_AD(1 downto 0) <= "00" when MFP_INTACK = '1' and nFB_OE = '0' else "ZZ";
DINTn <= '0' when IDE_INT = '1' AND ACP_CONF(28) = '1' else
'0' when FDINT = '1' else
'0' when SCSI_INT = '1' AND ACP_CONF(28) = '1' else '1';
--- TASTATUR UND KEYBOARD INTERRUPT: SPIKES AUSFILTERN ------------------------------------------
- process(MAIN_CLK,nRSTO,IRQ_ACIAn,IRQ_KEYBDn,IRQ_MIDIn)
- begin
- if nRSTO = '0' THEN
- IRQ_ACIAn <= '1';
- elsif rising_edge(MAIN_CLK) then
- IRQ_ACIAn <= IRQ_KEYBDn and IRQ_MIDIn;
- else
- IRQ_ACIAn <= IRQ_ACIAn;
- end if;
- END PROCESS;
-----------------------------------------------------------------------------
+ ----------------------------------------------------------------------------
-- Sound
----------------------------------------------------------------------------
I_SOUND: WF2149IP_TOP_SOC
port map(
- SYS_CLK => MAIN_CLK,
- RESETn => nRSTO,
+ SYS_CLK => not MAIN_CLK,
+ RESETn => nResetatio,
WAV_CLK => CLK2M,
SELn => '1',
@@ -939,18 +966,11 @@ DINTn <= '0' when IDE_INT = '1' AND ACP_CONF(28) = '1' else
A9n => '0',
A8 => '1',
- DA_IN => FB_AD(31 downto 24),
+ DA_IN => FB_ADI(15 downto 8),
DA_OUT => DA_OUT_X,
- IO_A_IN => x"00", -- All port pins are dedicated outputs.
- IO_A_OUT(7) => nnIDE_RES,
- IO_A_OUT(6) => LP_DIR_X,
- IO_A_OUT(5) => LP_STR,
- IO_A_OUT(4) => DTR,
- IO_A_OUT(3) => RTS,
--- IO_A_OUT(2) => FDD_D1SEL,
- IO_A_OUT(1) => DSA_D,
- IO_A_OUT(0) => nSDSEL,
+ IO_A_IN => SND_A,
+ IO_A_OUT => SND_A_X,
-- IO_A_EN =>, -- Not required.
IO_B_IN => LP_D,
IO_B_OUT => LP_D_X,
@@ -965,7 +985,170 @@ SNDCS <= '1' when nFB_CS1 = '0' and FB_ADR(19 downto 2) = x"3E200" else '0'; --
SNDCS_I <= '1' when SNDCS = '1' and FB_ADR (1 downto 1) = "0" else '0';
SNDIR_I <= '1' when SNDCS = '1' and nFB_WR = '0' else '0';
FB_AD(31 downto 24) <= DA_OUT_X when SNDCS_I = '1' and nFB_OE = '0' else "ZZZZZZZZ";
+nnIDE_RES <= SND_A_X(7);
+LP_DIR_X <= SND_A_X(6);
+LP_STR <= SND_A_X(5);
+DTR <= SND_A_X(4);
+RTS <= SND_A_X(3);
+-- FDD_D1SEL <= SND_A_X(2)
+DSA_D <= SND_A_X(1);
+nSDSEL <= SND_A_X(0);
+SND_A <= SND_A_X;
LP_D <= LP_D_X when LP_DIR_X = '0' else "ZZZZZZZZ";
LP_DIR <= LP_DIR_X;
+
+----------------------------------------------------------------------------
+-- DMA Sound register
+----------------------------------------------------------------------------
+
+dma_snd_cs <= '1' when nFB_CS1 = '0' and FB_ADR(19 downto 6) = x"3E24" else '0'; -- F8900-F893F
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndmactl <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"0" and nFB_WR = '0' and FB_B1 ='1' then
+ sndmactl <= FB_AD(23 downto 16);
+ else
+ sndmactl <= sndmactl;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndmactl when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"0" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndbashi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"1" and nFB_WR = '0' and FB_B1 ='1' then
+ sndbashi <= FB_AD(23 downto 16);
+ else
+ sndbashi <= sndbashi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndbashi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"1" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndbasmi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"2" and nFB_WR = '0' and FB_B1 ='1' then
+ sndbasmi <= FB_AD(23downto 16);
+ else
+ sndbasmi <= sndbasmi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndbasmi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"2" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndbaslo <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"3" and nFB_WR = '0' and FB_B1 ='1' then
+ sndbaslo <= FB_AD(23 downto 16);
+ else
+ sndbaslo <= sndbaslo;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndbaslo when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"3" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndadrhi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"4" and nFB_WR = '0' and FB_B1 ='1' then
+ sndadrhi <= FB_AD(23 downto 16);
+ else
+ sndadrhi <= sndadrhi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndadrhi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"4" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndadrmi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"5" and nFB_WR = '0' and FB_B1 ='1' then
+ sndadrmi <= FB_AD(23 downto 16);
+ else
+ sndadrmi <= sndadrmi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndadrmi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"5" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndadrlo <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"6" and nFB_WR = '0' and FB_B1 ='1' then
+ sndadrlo <= FB_AD(23 downto 16);
+ else
+ sndadrlo <= sndadrlo;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndadrlo when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"6" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndendhi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"7" and nFB_WR = '0' and FB_B1 ='1' then
+ sndendhi <= FB_AD(23 downto 16);
+ else
+ sndendhi <= sndendhi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndendhi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"7" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndendmi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"8" and nFB_WR = '0' and FB_B1 ='1' then
+ sndendmi <= FB_AD(23 downto 16);
+ else
+ sndendmi <= sndendmi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndendmi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"8" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndendlo <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"9" and nFB_WR = '0' and FB_B1 ='1' then
+ sndendlo <= FB_AD(23 downto 16);
+ else
+ sndendlo <= sndendlo;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndendlo when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"9" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndmode <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"10" and nFB_WR = '0' and FB_B1 ='1' then
+ sndmode <= FB_AD(23 downto 16);
+ else
+ sndmode <= sndmode;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndmode when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"10" and nFB_OE = '0' else "ZZZZZZZZ";
+
+----------------------------------------------------------------------------
+-- Paddle
+----------------------------------------------------------------------------
+
+paddle_cs <= '1' when nFB_CS1 = '0' and FB_ADR(19 downto 6) = x"3E48" else '0'; -- F9200-F923F
+
+FB_AD(31 downto 16) <= x"bfff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"0" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"ffff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"1" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"ffff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"8" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"ffff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"9" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"ffff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"A" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"ffff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"B" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"0000" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"10" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"0000" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"11" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+
END FalconIO_SDCard_IDE_CF_architecture;
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd.bak b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd.bak
index a339eda..a789c9f 100644
--- a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd.bak
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd.bak
@@ -115,7 +115,7 @@ ENTITY FalconIO_SDCard_IDE_CF IS
nCF_CS0 : OUT STD_LOGIC;
nIDE_RD : INOUT STD_LOGIC;
nIDE_WR : INOUT STD_LOGIC;
- AMKB_TX : OUT STD_LOGIC;
+ AMKB_TX : buffer STD_LOGIC;
IDE_RES : OUT STD_LOGIC;
DTR : OUT STD_LOGIC;
RTS : OUT STD_LOGIC;
@@ -132,6 +132,7 @@ ENTITY FalconIO_SDCard_IDE_CF IS
DMA_DRQ : OUT STD_LOGIC;
FB_AD : INOUT STD_LOGIC_VECTOR(31 downto 0);
LP_D : INOUT STD_LOGIC_VECTOR(7 downto 0);
+ SND_A : INOUT STD_LOGIC_VECTOR(7 downto 0);
ACSI_D : INOUT STD_LOGIC_VECTOR(7 downto 0);
SCSI_D : INOUT STD_LOGIC_VECTOR(7 downto 0);
SCSI_PAR : INOUT STD_LOGIC;
@@ -156,12 +157,15 @@ signal FB_B0 : STD_LOGIC; -- UPPER BYT BEI 16BIT BUS
signal FB_B1 : STD_LOGIC; -- LOWER BYT BEI 16BIT BUS
signal BYT : STD_LOGIC; -- WENN BYT -> 1
signal LONG : STD_LOGIC; -- WENN -> 1
+signal FB_ADI : STD_LOGIC_VECTOR(15 downto 0); -- gespeicherte writedaten
+signal nResetatio : STD_LOGIC; -- reset atari bausteine
-- KEYBOARD MIDI
signal ACIA_CS_I : STD_LOGIC;
signal IRQ_KEYBDn : STD_LOGIC;
signal IRQ_MIDIn : STD_LOGIC;
signal KEYB_RxD : STD_LOGIC;
-signal AMKB_REG : STD_LOGIC_VECTOR(4 downto 0);
+signal AMKB_REG : STD_LOGIC_VECTOR(3 downto 0);
+signal AMKB_TX_sync : std_logic;
signal MIDI_OUT : STD_LOGIC;
signal DATA_OUT_ACIA_I : STD_LOGIC_VECTOR(7 downto 0);
signal DATA_OUT_ACIA_II : STD_LOGIC_VECTOR(7 downto 0);
@@ -169,8 +173,8 @@ signal DATA_OUT_ACIA_II : STD_LOGIC_VECTOR(7 downto 0);
signal MFP_CS : STD_LOGIC;
signal MFP_INTACK : STD_LOGIC;
signal LDS : STD_LOGIC;
+signal acia_irq : STD_LOGIC;
signal DTACK_OUT_MFPn : STD_LOGIC;
-signal IRQ_ACIAn : STD_LOGIC;
signal DINTn : STD_LOGIC;
signal DATA_OUT_MFP : STD_LOGIC_VECTOR(7 downto 0);
signal TDO : STD_LOGIC;
@@ -180,7 +184,22 @@ signal SNDCS_I : STD_LOGIC;
signal SNDIR_I : STD_LOGIC;
signal LP_DIR_X : STD_LOGIC;
signal DA_OUT_X : STD_LOGIC_VECTOR(7 downto 0);
+signal SND_A_X : STD_LOGIC_VECTOR(7 downto 0);
signal LP_D_X : STD_LOGIC_VECTOR(7 downto 0);
+signal nLP_STR : STD_LOGIC;
+-- DMA SOUND
+signal dma_snd_cs : STD_LOGIC;
+signal sndmactl : STD_LOGIC_VECTOR(7 downto 0);
+signal sndbashi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndbasmi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndbaslo : STD_LOGIC_VECTOR(7 downto 0);
+signal sndadrhi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndadrmi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndadrlo : STD_LOGIC_VECTOR(7 downto 0);
+signal sndendhi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndendmi : STD_LOGIC_VECTOR(7 downto 0);
+signal sndendlo : STD_LOGIC_VECTOR(7 downto 0);
+signal sndmode : STD_LOGIC_VECTOR(7 downto 0);
-- DIV
signal SUB_BUS : STD_LOGIC; -- SUB BUS MIT ROM-PORT, CF UND IDE
signal ROM_CS : STD_LOGIC;
@@ -265,22 +284,36 @@ signal NEXT_nIDE_WR : STD_LOGIC;
type CMD_STATES is( IDLE, T1, T6, T7);
signal CMD_STATE : CMD_STATES;
signal NEXT_CMD_STATE : CMD_STATES;
+-- Paddle
+signal paddle_cs : STD_LOGIC;
-
BEGIN
LONG <= '1' when FB_SIZE1 = '0' and FB_SIZE0 = '0' else '0';
BYT <= '1' when FB_SIZE1 = '0' and FB_SIZE0 = '1' else '0';
FB_B0 <= '1' when FB_ADR(0) = '0' or BYT = '0' else '0';
FB_B1 <= '1' when FB_ADR(0) = '1' or BYT = '0' else '0';
-FALCON_IO_TA <= '1' when SNDCS = '1' or DTACK_OUT_MFPn = '0' or ACIA_CS_I = '1' or DMA_MODUS_CS ='1'
- or DMA_ADR_CS = '1' or DMA_DIRM_CS = '1' or DMA_BYT_CNT_CS = '1' or FCF_CS = '1' or IDE_CF_TA = '1' else '0';
-SUB_BUS <= '1' when nFB_WR = '1' and ROM_CS = '1' ELSE
+FALCON_IO_TA <= '1' when ACIA_CS_I = '1' or DTACK_OUT_MFPn = '0' or DMA_MODUS_CS ='1' or dma_snd_cs = '1' or paddle_cs = '1'
+ or DMA_ADR_CS = '1' or DMA_DIRM_CS = '1' or DMA_BYT_CNT_CS = '1' or FCF_CS = '1' or IDE_CF_TA = '1' else '0';--SNDCS = '1' or
+SUB_BUS <= '1' when nFB_WR = '1' and ROM_CS = '1' ELSE
'1' when nFB_WR = '1' and IDE_CF_CS = '1' ELSE
'1' when nFB_WR = '0' and nIDE_WR = '0' ELSE '0';
-nRP_UDS <= '0' when SUB_BUS = '1' and FB_B0 = '1' else '1';
-nRP_LDS <= '0' when SUB_BUS = '1' and FB_B1 = '1' else '1';
+nRP_UDS <= '0' when nFB_CS1 = '0' and SUB_BUS = '1' and FB_B0 = '1' else '1';
+nRP_LDS <= '0' when nFB_CS1 = '0' and SUB_BUS = '1' and FB_B1 = '1' else '1';
nDREQ0 <= '0';
+-- input daten halten
+process(MAIN_CLK, nFB_WR, FB_AD(31 downto 16), FB_ADI(15 downto 0))
+ begin
+ if rising_edge(MAIN_CLK) then
+ IF nFB_WR = '0' THEN
+ FB_ADI <= FB_AD(31 downto 16);
+ ELSE
+ FB_ADI <= FB_ADI;
+ end if;
+ ELSE
+ FB_ADI <= FB_ADI;
+ end if;
+ END PROCESS;
----------------------------------------------------------------------------
-- SD
----------------------------------------------------------------------------
@@ -386,7 +419,7 @@ RDF_DIN <= CD_OUT_FDC when DMA_MODUS(7) = '1' else SCSI_DOUT;
q => WRF_DOUT,
rdusedw => WRF_AZ
);
-CD_IN_FDC <= WRF_DOUT when DMA_ACTIV = '1' and DMA_MODUS(8) = '1' else FB_AD(23 downto 16); -- BEI DMA WRITE <-FIFO SONST <-FB
+CD_IN_FDC <= WRF_DOUT when DMA_ACTIV = '1' and DMA_MODUS(8) = '1' else FB_ADI(7 downto 0); -- BEI DMA WRITE <-FIFO SONST <-FB
DMA_AZ_CS <= '1' when nFB_CS2 = '0' and FB_ADR(26 downto 0) = x"002010C" else '0'; -- F002'010C LONG
FB_AD <= DMA_DRQ_Q & DMA_DRQ_REG & IDE_INT & FDINT & SCSI_INT & RDF_AZ & "0" & DMA_STATUS & "00" & WRF_AZ when DMA_AZ_CS = '1' and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZ";
DMA_DRQ_Q <= '1' when DMA_DRQ_REG = "11" and DMA_MODUS(6) = '0' else '0';
@@ -513,7 +546,7 @@ SCSI_CS <= '1' when DMA_DATEN_CS = '1' and DMA_MODUS(4 downto 3) = "01" and FB_
I_FDC: WF1772IP_TOP_SOC
port map(
CLK => FDC_CLK,
- RESETn => nRSTO,
+ RESETn => nResetatio,
CSn => FDCS_In,
RWn => nFDC_WR,
A1 => CA2,
@@ -695,13 +728,13 @@ CLR_FIFO <= DMA_MODUS(8) xor DMA_DIR_OLD;
I_SCSI: WF5380_TOP_SOC
port map(
CLK => FDC_CLK,
- RESETn => nRSTO,
+ RESETn => nResetatio,
ADR => CA2 & CA1 & CA0,
DATA_IN => CD_IN_FDC,
DATA_OUT => SCSI_DOUT,
--DATA_EN : out bit;
-- Bus and DMA controls:
- CSn => '1', --SCSI_CSn, ABGESCHALTET
+ CSn => SCSI_CSn,
RDn => (not nFDC_WR) or (not SCSI_CS),
WRn => nFDC_WR or (not SCSI_CS),
EOPn => '1',
@@ -745,18 +778,19 @@ CLR_FIFO <= DMA_MODUS(8) xor DMA_DIR_OLD;
-- MSG_EN => MSG_EN
);
-- SCSI ACSI ---------------------------------------------------------------
-SCSI_D <= DB_OUTn when DB_EN = '1' else "ZZZZZZZZ";
-SCSI_DIR <= '1'; --'0' when DB_EN = '1' else '1'; --ABGESCHALTET
+SCSI_D <= "ZZZZZZZZ";--DB_OUTn when DB_EN = '1' else "ZZZZZZZZ";
+SCSI_DIR <= '1';-- when DB_EN = '1' else '1';
SCSI_PAR <= DBP_OUTn when DBP_EN = '1' else 'Z';
-nSCSI_RST <= RST_OUTn when RST_EN = '1' else 'Z';
-nSCSI_BUSY <= BSY_OUTn when BSY_EN = '1' else 'Z';
-nSCSI_SEL <= SEL_OUTn when SEL_EN = '1' else 'Z';
+nSCSI_RST <= 'Z';--RST_OUTn when RST_EN = '1' else 'Z';
+nSCSI_BUSY <= 'Z';--BSY_OUTn when BSY_EN = '1' else 'Z';
+nSCSI_SEL <= 'Z';--SEL_OUTn when SEL_EN = '1' else 'Z';
ACSI_DIR <= '0';
ACSI_D <= "ZZZZZZZZ";
nACSI_CS <= '1';
ACSI_A1 <= CA1;
nACSI_RESET <= nRSTO;
nACSI_ACK <= '1';
+nResetatio <= '0' when nRSTO = '0' or ACP_CONF(24) = '1' else '1';
----------------------------------------------------------------------------
-- ROM-PORT TA KOMMT FROM DEFAULT TA = 16 BUSCYCLEN = 500ns
----------------------------------------------------------------------------
@@ -769,16 +803,16 @@ nROM3 <= '0' when ROM_CS = '1' and FB_ADR(16) = '1' else '1';
I_ACIA_KEYBOARD: WF6850IP_TOP_SOC
port map(
CLK => MAIN_CLK,
- RESETn => nRSTO,
+ RESETn => nResetatio,
CS2n => FB_ADR(2),
CS1 => '1',
CS0 => ACIA_CS_I,
- E => ACIA_CS_I,
+ E => ACIA_CS_I,
RWn => nFB_WR,
RS => FB_ADR(1),
- DATA_IN => FB_AD(31 downto 24),
+ DATA_IN => FB_ADI(15 downto 8),
DATA_OUT => DATA_OUT_ACIA_I,
-- DATA_EN => DATA_EN_ACIA_I,
@@ -790,40 +824,45 @@ nROM3 <= '0' when ROM_CS = '1' and FB_ADR(16) = '1' else '1';
DCDn => '0',
IRQn => IRQ_KEYBDn,
- TXDATA => AMKB_TX
+ TXDATA => AMKB_TX_sync
--RTSn => -- Not used.
);
ACIA_CS_I <= '1' when nFB_CS1 = '0'and FB_ADR(19 downto 3) = x"1FF80" else '0'; -- FFC00-FFC07 FFC00/8
-KEYB_RxD <= '1' when AMKB_REG(3) = '1' or PIC_AMKB_RX = '0' else '0'; -- TASTATUR DATEN VOM PIC(PS2) OR NORMAL
-FB_AD(31 downto 24) <= DATA_OUT_ACIA_I when ACIA_CS_I = '1' and FB_ADR(2) = '0' and nFB_OE = '0' else "ZZZZZZZZ";
--- AMKB_TX: SPIKES AUSFILTERN ------------------------------------------
+KEYB_RxD <= '0' when AMKB_REG(3) = '0' or PIC_AMKB_RX = '0' else '1'; -- TASTATUR DATEN VOM PIC(PS2) OR NORMAL //
+FB_AD(31 downto 24) <= DATA_OUT_ACIA_I when ACIA_CS_I = '1' and FB_ADR(2) = '0' and nFB_OE = '0' else
+ DATA_OUT_ACIA_II when ACIA_CS_I = '1' and FB_ADR(2) = '1' and nFB_OE = '0' else "ZZZZZZZZ";
+-- AMKB_TX: SPIKES AUSFILTERN und sychronisieren ------------------------------------------
process(CLK2M, AMKB_RX, AMKB_REG)
begin
- if rising_edge(CLK2M) then
+ if rising_edge(CLK500k) then
+ AMKB_TX <= AMKB_TX_sync;
IF AMKB_RX = '0' THEN
- IF AMKB_REG < 16 THEN
- AMKB_REG <= "00000";
+ IF AMKB_REG < 8 THEN
+ AMKB_REG <= "0000";
ELSE
AMKB_REG <= AMKB_REG - 1;
END IF;
ELSE
- IF AMKB_REG > 15 THEN
- AMKB_REG <= "11111";
+ IF AMKB_REG > 7 THEN
+ AMKB_REG <= "1111";
ELSE
AMKB_REG <= AMKB_REG + 1;
END IF;
END IF;
ELSE
+ AMKB_TX <= AMKB_TX;
AMKB_REG <= AMKB_REG;
end if;
END PROCESS;
+-- acia interrupt ------------------------------------------
+acia_irq <= '0' when IRQ_KEYBDn = '0' or IRQ_MIDIn = '0' else '1';
----------------------------------------------------------------------------
-- ACIA MIDI
----------------------------------------------------------------------------
I_ACIA_MIDI: WF6850IP_TOP_SOC
port map(
CLK => MAIN_CLK,
- RESETn => nRSTO,
+ RESETn => nResetatio,
CS2n => '0',
CS1 => FB_ADR(2),
@@ -832,7 +871,7 @@ FB_AD(31 downto 24) <= DATA_OUT_ACIA_I when ACIA_CS_I = '1' and FB_ADR(2) = '0'
RWn => nFB_WR,
RS => FB_ADR(1),
- DATA_IN => FB_AD(31 downto 24),
+ DATA_IN => FB_ADI(15 downto 8),
DATA_OUT => DATA_OUT_ACIA_II,
-- DATA_EN => DATA_EN_ACIA_II,
@@ -845,18 +884,17 @@ FB_AD(31 downto 24) <= DATA_OUT_ACIA_I when ACIA_CS_I = '1' and FB_ADR(2) = '0'
IRQn => IRQ_MIDIn,
TXDATA => MIDI_OUT
--RTSn => -- Not used.
- );
-MIDI_TLR <= MIDI_OUT;
+ );
+MIDI_TLR <= MIDI_IN;
MIDI_OLR <= MIDI_OUT;
-FB_AD(31 downto 24) <= DATA_OUT_ACIA_II when ACIA_CS_I = '1' and FB_ADR(2) = '1' and nFB_OE = '0' else "ZZZZZZZZ";
----------------------------------------------------------------------------
-- MFP
----------------------------------------------------------------------------
I_MFP: WF68901IP_TOP_SOC
port map(
-- System control:
- CLK => MAIN_CLK,
- RESETn => nRSTO,
+ CLK => not MAIN_CLK,
+ RESETn => nResetatio,
-- Asynchronous bus control:
DSn => not LDS,
CSn => not MFP_CS,
@@ -867,14 +905,14 @@ FB_AD(31 downto 24) <= DATA_OUT_ACIA_II when ACIA_CS_I = '1' and FB_ADR(2) = '1'
DATA_IN => FB_AD(23 downto 16),
DATA_OUT => DATA_OUT_MFP,
-- DATA_EN => DATA_EN_MFP,
- GPIP_IN(7) => not DMA_DRQ_Q,
- GPIP_IN(6) => not RI,
+ GPIP_IN(7) => not DMA_DRQ_Q,
+ GPIP_IN(6) => not RI,
GPIP_IN(5) => DINTn,
- GPIP_IN(4) => IRQ_ACIAn,
+ GPIP_IN(4) => acia_irq,
GPIP_IN(3) => DSP_INT,
- GPIP_IN(2) => not CTS,
- GPIP_IN(1) => not DCD,
- GPIP_IN(0) => LP_BUSY,
+ GPIP_IN(2) => not CTS,
+ GPIP_IN(1) => not DCD,
+ GPIP_IN(0) => LP_BUSY,
-- GPIP_OUT =>, -- Not used; all GPIPs are direction input.
-- GPIP_EN =>, -- Not used; all GPIPs are direction input.
-- Interrupt control:
@@ -885,7 +923,7 @@ FB_AD(31 downto 24) <= DATA_OUT_ACIA_II when ACIA_CS_I = '1' and FB_ADR(2) = '1'
-- Timers and timer control:
XTAL1 => CLK2M4576,
TAI => '0',
- TBI => nBLANK,
+ TBI => nBLANK,
-- TAO =>,
-- TBO =>,
-- TCO =>,
@@ -908,27 +946,16 @@ FB_AD(23 downto 16) <= DATA_OUT_MFP when MFP_CS = '1' and nFB_OE = '0' else "ZZZ
FB_AD(31 downto 10) <= "0000000000000000000000" when MFP_INTACK = '1' and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZZZZZZZ";
FB_AD(9 downto 2) <= DATA_OUT_MFP when MFP_INTACK = '1' and nFB_OE = '0' else "ZZZZZZZZ";
FB_AD(1 downto 0) <= "00" when MFP_INTACK = '1' and nFB_OE = '0' else "ZZ";
-DINTn <= '0' when IDE_INT = '1' AND ACP_CONFIG[28] = '1' else
+DINTn <= '0' when IDE_INT = '1' AND ACP_CONF(28) = '1' else
'0' when FDINT = '1' else
- '0' when SCSI_INT = '1' AND ACP_CONFIG[28] = '1' else '1';
--- TASTATUR UND KEYBOARD INTERRUPT: SPIKES AUSFILTERN ------------------------------------------
- process(MAIN_CLK,nRSTO,IRQ_ACIAn,IRQ_KEYBDn,IRQ_MIDIn)
- begin
- if nRSTO = '0' THEN
- IRQ_ACIAn <= '1';
- elsif rising_edge(MAIN_CLK) then
- IRQ_ACIAn <= IRQ_KEYBDn and IRQ_MIDIn;
- else
- IRQ_ACIAn <= IRQ_ACIAn;
- end if;
- END PROCESS;
-----------------------------------------------------------------------------
+ '0' when SCSI_INT = '1' AND ACP_CONF(28) = '1' else '1';
+ ----------------------------------------------------------------------------
-- Sound
----------------------------------------------------------------------------
I_SOUND: WF2149IP_TOP_SOC
port map(
- SYS_CLK => MAIN_CLK,
- RESETn => nRSTO,
+ SYS_CLK => not MAIN_CLK,
+ RESETn => nResetatio,
WAV_CLK => CLK2M,
SELn => '1',
@@ -939,18 +966,11 @@ DINTn <= '0' when IDE_INT = '1' AND ACP_CONFIG[28] = '1' else
A9n => '0',
A8 => '1',
- DA_IN => FB_AD(31 downto 24),
+ DA_IN => FB_ADI(15 downto 8),
DA_OUT => DA_OUT_X,
- IO_A_IN => x"00", -- All port pins are dedicated outputs.
- IO_A_OUT(7) => nnIDE_RES,
- IO_A_OUT(6) => LP_DIR_X,
- IO_A_OUT(5) => LP_STR,
- IO_A_OUT(4) => DTR,
- IO_A_OUT(3) => RTS,
--- IO_A_OUT(2) => FDD_D1SEL,
- IO_A_OUT(1) => DSA_D,
- IO_A_OUT(0) => nSDSEL,
+ IO_A_IN => SND_A,
+ IO_A_OUT => SND_A_X,
-- IO_A_EN =>, -- Not required.
IO_B_IN => LP_D,
IO_B_OUT => LP_D_X,
@@ -965,7 +985,169 @@ SNDCS <= '1' when nFB_CS1 = '0' and FB_ADR(19 downto 2) = x"3E200" else '0'; --
SNDCS_I <= '1' when SNDCS = '1' and FB_ADR (1 downto 1) = "0" else '0';
SNDIR_I <= '1' when SNDCS = '1' and nFB_WR = '0' else '0';
FB_AD(31 downto 24) <= DA_OUT_X when SNDCS_I = '1' and nFB_OE = '0' else "ZZZZZZZZ";
+nnIDE_RES <= SND_A_X(7);
+LP_DIR_X <= SND_A_X(6);
+LP_STR <= SND_A_X(5);
+DTR <= SND_A_X(4);
+RTS <= SND_A_X(3);
+-- FDD_D1SEL <= SND_A_X(2)
+DSA_D <= SND_A_X(1);
+nSDSEL <= SND_A_X(0);
LP_D <= LP_D_X when LP_DIR_X = '0' else "ZZZZZZZZ";
LP_DIR <= LP_DIR_X;
+
+----------------------------------------------------------------------------
+-- DMA Sound register
+----------------------------------------------------------------------------
+
+dma_snd_cs <= '1' when nFB_CS1 = '0' and FB_ADR(19 downto 6) = x"3E24" else '0'; -- F8900-F893F
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndmactl <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"0" and nFB_WR = '0' and FB_B1 ='1' then
+ sndmactl <= FB_AD(23 downto 16);
+ else
+ sndmactl <= sndmactl;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndmactl when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"0" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndbashi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"1" and nFB_WR = '0' and FB_B1 ='1' then
+ sndbashi <= FB_AD(23 downto 16);
+ else
+ sndbashi <= sndbashi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndbashi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"1" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndbasmi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"2" and nFB_WR = '0' and FB_B1 ='1' then
+ sndbasmi <= FB_AD(23downto 16);
+ else
+ sndbasmi <= sndbasmi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndbasmi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"2" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndbaslo <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"3" and nFB_WR = '0' and FB_B1 ='1' then
+ sndbaslo <= FB_AD(23 downto 16);
+ else
+ sndbaslo <= sndbaslo;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndbaslo when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"3" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndadrhi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"4" and nFB_WR = '0' and FB_B1 ='1' then
+ sndadrhi <= FB_AD(23 downto 16);
+ else
+ sndadrhi <= sndadrhi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndadrhi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"4" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndadrmi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"5" and nFB_WR = '0' and FB_B1 ='1' then
+ sndadrmi <= FB_AD(23 downto 16);
+ else
+ sndadrmi <= sndadrmi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndadrmi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"5" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndadrlo <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"6" and nFB_WR = '0' and FB_B1 ='1' then
+ sndadrlo <= FB_AD(23 downto 16);
+ else
+ sndadrlo <= sndadrlo;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndadrlo when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"6" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndendhi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"7" and nFB_WR = '0' and FB_B1 ='1' then
+ sndendhi <= FB_AD(23 downto 16);
+ else
+ sndendhi <= sndendhi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndendhi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"7" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndendmi <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"8" and nFB_WR = '0' and FB_B1 ='1' then
+ sndendmi <= FB_AD(23 downto 16);
+ else
+ sndendmi <= sndendmi;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndendmi when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"8" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndendlo <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"9" and nFB_WR = '0' and FB_B1 ='1' then
+ sndendlo <= FB_AD(23 downto 16);
+ else
+ sndendlo <= sndendlo;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndendlo when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"9" and nFB_OE = '0' else "ZZZZZZZZ";
+
+ process(nRSTO,MAIN_CLK,FB_ADR(5 downto 1), dma_snd_cs)
+ begin
+ if nRSTO = '0' THEN
+ sndmode <= x"00";
+ elsif rising_edge(MAIN_CLK) and dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"10" and nFB_WR = '0' and FB_B1 ='1' then
+ sndmode <= FB_AD(23 downto 16);
+ else
+ sndmode <= sndmode;
+ end if;
+ END PROCESS;
+FB_AD(23 downto 16) <= sndmode when dma_snd_cs = '1' and FB_ADR(5 downto 1) = x"10" and nFB_OE = '0' else "ZZZZZZZZ";
+
+----------------------------------------------------------------------------
+-- Paddle
+----------------------------------------------------------------------------
+
+paddle_cs <= '1' when nFB_CS1 = '0' and FB_ADR(19 downto 6) = x"3E48" else '0'; -- F9200-F923F
+
+FB_AD(31 downto 16) <= x"bfff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"0" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"ffff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"1" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"ffff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"8" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"ffff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"9" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"ffff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"A" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"ffff" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"B" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"0000" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"10" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+FB_AD(31 downto 16) <= x"0000" when paddle_cs = '1' and FB_ADR(5 downto 1) = x"11" and nFB_OE = '0' else "ZZZZZZZZZZZZZZZZ";
+
END FalconIO_SDCard_IDE_CF_architecture;
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd.bak b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd.bak
new file mode 100644
index 0000000..915c271
--- /dev/null
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd.bak
@@ -0,0 +1,391 @@
+----------------------------------------------------------------------
+---- ----
+---- ATARI MFP compatible IP Core ----
+---- ----
+---- This file is part of the SUSKA ATARI clone project. ----
+---- http://www.experiment-s.de ----
+---- ----
+---- Description: ----
+---- MC68901 compatible multi function port core. ----
+---- ----
+---- This is the SUSKA MFP IP core interrupt logic file. ----
+---- ----
+---- ----
+---- To Do: ----
+---- - ----
+---- ----
+---- Author(s): ----
+---- - Wolfgang Foerster, wf@experiment-s.de; wf@inventronik.de ----
+---- ----
+----------------------------------------------------------------------
+---- ----
+---- Copyright (C) 2006 - 2008 Wolfgang Foerster ----
+---- ----
+---- This source file may be used and distributed without ----
+---- restriction provided that this copyright statement is not ----
+---- removed from the file and that any derivative work contains ----
+---- the original copyright notice and the associated disclaimer. ----
+---- ----
+---- This source file is free software; you can redistribute it ----
+---- and/or modify it under the terms of the GNU Lesser General ----
+---- Public License as published by the Free Software Foundation; ----
+---- either version 2.1 of the License, or (at your option) any ----
+---- later version. ----
+---- ----
+---- This source is distributed in the hope that it will be ----
+---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
+---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
+---- PURPOSE. See the GNU Lesser General Public License for more ----
+---- details. ----
+---- ----
+---- You should have received a copy of the GNU Lesser General ----
+---- Public License along with this source; if not, download it ----
+---- from http://www.gnu.org/licenses/lgpl.html ----
+---- ----
+----------------------------------------------------------------------
+--
+-- Revision History
+--
+-- Revision 2K6A 2006/06/03 WF
+-- Initial Release.
+-- Revision 2K6B 2006/11/07 WF
+-- Modified Source to compile with the Xilinx ISE.
+-- Revision 2K8A 2008/06/03 WF
+-- Fixed Pending register logic.
+-- Revision 2K9A 2009/06/20 WF
+-- Fixed interrupt polarity for TA_I and TB_I.
+--
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_unsigned.all;
+
+entity WF68901IP_INTERRUPTS is
+ port ( -- System control:
+ CLK : in bit;
+ RESETn : in bit;
+
+ -- Asynchronous bus control:
+ DSn : in bit;
+ CSn : in bit;
+ RWn : in bit;
+
+ -- Data and Adresses:
+ RS : in bit_vector(5 downto 1);
+ DATA_IN : in bit_vector(7 downto 0);
+ DATA_OUT : out bit_vector(7 downto 0);
+ DATA_OUT_EN : out bit;
+
+ -- Interrupt control:
+ IACKn : in bit;
+ IEIn : in bit;
+ IEOn : out bit;
+ IRQn : out bit;
+
+ -- Interrupt sources:
+ GP_INT : in bit_vector(7 downto 0);
+
+ AER_4 : in bit;
+ AER_3 : in bit;
+ TAI : in bit;
+ TBI : in bit;
+ TA_PWM : in bit;
+ TB_PWM : in bit;
+ TIMER_A_INT : in bit;
+ TIMER_B_INT : in bit;
+ TIMER_C_INT : in bit;
+ TIMER_D_INT : in bit;
+
+ RCV_ERR : in bit;
+ TRM_ERR : in bit;
+ RCV_BUF_F : in bit;
+ TRM_BUF_E : in bit
+ );
+end entity WF68901IP_INTERRUPTS;
+
+architecture BEHAVIOR of WF68901IP_INTERRUPTS is
+-- Interrupt state machine:
+type INT_STATES is (SCAN, REQUEST, VECTOR_OUT);
+signal INT_STATE : INT_STATES;
+-- The registers:
+signal IERA : bit_vector(7 downto 0);
+signal IERB : bit_vector(7 downto 0);
+signal IPRA : bit_vector(7 downto 0);
+signal IPRB : bit_vector(7 downto 0);
+signal ISRA : bit_vector(7 downto 0);
+signal ISRB : bit_vector(7 downto 0);
+signal IMRA : bit_vector(7 downto 0);
+signal IMRB : bit_vector(7 downto 0);
+signal VR : bit_vector(7 downto 3);
+-- Interconnect:
+signal VECT_NUMBER : bit_vector(7 downto 0);
+signal INT_SRC : bit_vector(15 downto 0);
+signal INT_SRC_EDGE : bit_vector(15 downto 0);
+signal INT_ENA : bit_vector(15 downto 0);
+signal INT_MASK : bit_vector(15 downto 0);
+signal INT_PENDING : bit_vector(15 downto 0);
+signal INT_SERVICE : bit_vector(15 downto 0);
+signal INT_PASS : bit_vector(15 downto 0);
+signal INT_OUT : bit_vector(15 downto 0);
+signal GP_INT_4 : bit;
+signal GP_INT_3 : bit;
+begin
+ -- Interrupt source for the GPI_4 and GPI_3 is normally the respective port pin.
+ -- But when the timers operate in their PWM modes, the GPI_4 and GPI_3 are associated
+ -- to timer A and timer B.
+ -- The xor logic provides polarity control for the interrupt transition. Be aware,
+ -- that the PWM signals cause an interrupt on the opposite transition like the
+ -- respective GPIP port pins (with the same AER settings).
+ --GP_INT_4 <= GP_INT(4) when TA_PWM = '0' else TAI xor AER_4;
+ --GP_INT_3 <= GP_INT(3) when TB_PWM = '0' else TBI xor AER_3;
+ GP_INT_4 <= GP_INT(4) when TA_PWM = '0' else TAI xnor AER_4; -- This should be correct.
+ GP_INT_3 <= GP_INT(3) when TB_PWM = '0' else TBI xnor AER_3;
+
+
+ -- Interrupt source priority sorted (15 = highest):
+ INT_SRC <= GP_INT(7 downto 6) & TIMER_A_INT & RCV_BUF_F & RCV_ERR & TRM_BUF_E & TRM_ERR & TIMER_B_INT &
+ GP_INT(5) & GP_INT_4 & TIMER_C_INT & TIMER_D_INT & GP_INT_3 & GP_INT(2 downto 0);
+
+ INT_ENA <= IERA & IERB;
+ INT_MASK <= IMRA & IMRB;
+ INT_PENDING <= IPRA & IPRB;
+ INT_SERVICE <= ISRA & ISRB;
+ INT_OUT <= INT_PENDING and INT_MASK; -- Masking:
+
+ -- Enable the daisy chain, if there is no pending interrupt and
+ -- the interrupt state machine is not in service.
+ IEOn <= '0' when INT_OUT = x"0000" and INT_STATE = SCAN else '1';
+
+ -- Interrupt request:
+ IRQn <= '0' when INT_OUT /= x"0000" and INT_STATE = REQUEST else '1';
+
+ EDGE_ENA: process(RESETn, CLK)
+ -- These are the 16 edge detectors of the 16 interrupt input sources. This
+ -- process also provides the disabling or enabling via the IERA and IERB registers.
+ variable LOCK : bit_vector(15 downto 0);
+ begin
+ if RESETn = '0' then
+ INT_SRC_EDGE <= x"0000";
+ LOCK := x"0000";
+ elsif CLK = '0' and CLK' event then
+ for i in 15 downto 0 loop
+ if INT_SRC(i) = '1' and INT_ENA(i) = '1' and LOCK(i) = '0' then
+ LOCK(i) := '1';
+ INT_SRC_EDGE(i) <= '1';
+ elsif INT_SRC(i) = '0' then
+ LOCK(i) := '0';
+ INT_SRC_EDGE(i) <= '0';
+ else
+ INT_SRC_EDGE(i) <= '0';
+ end if;
+ end loop;
+ end if;
+ end process EDGE_ENA;
+
+ INT_REGISTERS: process(RESETn, CLK)
+ begin
+ if RESETn = '0' then
+ IERA <= (others => '0');
+ IERB <= (others => '0');
+ IPRA <= (others => '0');
+ IPRB <= (others => '0');
+ ISRA <= (others => '0');
+ ISRB <= (others => '0');
+ IMRA <= (others => '0');
+ IMRB <= (others => '0');
+ elsif CLK = '1' and CLK' event then
+ if CSn = '0' and DSn = '0' and RWn = '0' then
+ case RS is
+ when "00011" => IERA <= DATA_IN; -- Enable A.
+ when "00100" => IERB <= DATA_IN; -- Enable B.
+ when "00101" =>
+ -- Only a '0' can be written to the pending register.
+ for i in 7 downto 0 loop
+ if DATA_IN(i) = '0' then
+ IPRA(i) <= '0'; -- Pending A.
+ end if;
+ end loop;
+ when "00110" =>
+ -- Only a '0' can be written to the pending register.
+ for i in 7 downto 0 loop
+ if DATA_IN(i) = '0' then
+ IPRB(i) <= '0'; -- Pending B.
+ end if;
+ end loop;
+ when "00111" =>
+ -- Only a '0' can be written to the in service register.
+ for i in 7 downto 0 loop
+ if DATA_IN(i) = '0' then
+ ISRA(i) <= '0'; -- In Service A.
+ end if;
+ end loop;
+ when "01000" =>
+ -- Only a '0' can be written to the in service register.
+ for i in 7 downto 0 loop
+ if DATA_IN(i) = '0' then
+ ISRB(i) <= '0'; -- In Service B.
+ end if;
+ end loop;
+ when "01001" => IMRA <= DATA_IN; -- Mask A.
+ when "01010" => IMRB <= DATA_IN; -- Mask B.
+ when "01011" => VR <= DATA_IN(7 downto 3); -- Vector register.
+ when others => null;
+ end case;
+ end if;
+
+ -- Pending register:
+ -- set and clear bit logic.
+ for i in 15 downto 8 loop
+ if INT_SRC_EDGE(i) = '1' then
+ IPRA(i-8) <= '1';
+ elsif INT_ENA(i) = '0' then
+ IPRA(i-8) <= '0'; -- Clear by disabling the channel.
+ elsif INT_PASS(i) = '1' then
+ IPRA(i-8) <= '0'; -- Clear by passing the interrupt.
+ end if;
+ end loop;
+ for i in 7 downto 0 loop
+ if INT_SRC_EDGE(i) = '1' then
+ IPRB(i) <= '1';
+ elsif INT_ENA(i) = '0' then
+ IPRB(i) <= '0'; -- Clear by disabling the channel.
+ elsif INT_PASS(i) = '1' then
+ IPRB(i) <= '0'; -- Clear by passing the interrupt.
+ end if;
+ end loop;
+
+ -- In-Service register:
+ -- Set bit logic, VR(3) is the service register enable.
+ for i in 15 downto 8 loop
+ if INT_OUT(i) = '1' and INT_PASS(i) = '1' and VR(3) = '1' then
+ ISRA(i-8) <= '1';
+ end if;
+ end loop;
+ for i in 7 downto 0 loop
+ if INT_OUT(i) = '1' and INT_PASS(i) = '1' and VR(3) = '1' then
+ ISRB(i) <= '1';
+ end if;
+ end loop;
+ end if;
+ end process INT_REGISTERS;
+ DATA_OUT_EN <= '1' when CSn = '0' and DSn = '0' and RWn = '1' and RS > "00010" and RS <= "01011" else '1' when INT_STATE = VECTOR_OUT else '0';
+
+ DATA_OUT <= IERA when CSn = '0' and DSn = '0' and RWn = '1' and RS = "00011" else
+ IERB when CSn = '0' and DSn = '0' and RWn = '1' and RS = "00100" else
+ IPRA when CSn = '0' and DSn = '0' and RWn = '1' and RS = "00101" else
+ IPRB when CSn = '0' and DSn = '0' and RWn = '1' and RS = "00110" else
+ ISRA when CSn = '0' and DSn = '0' and RWn = '1' and RS = "00111" else
+ ISRB when CSn = '0' and DSn = '0' and RWn = '1' and RS = "01000" else
+ IMRA when CSn = '0' and DSn = '0' and RWn = '1' and RS = "01001" else
+ IMRB when CSn = '0' and DSn = '0' and RWn = '1' and RS = "01010" else
+ VR & "000" when CSn = '0' and DSn = '0' and RWn = '1' and RS = "01011" else
+ VECT_NUMBER when INT_STATE = VECTOR_OUT else x"00";
+
+ P_INT_STATE : process(RESETn, CLK)
+ begin
+ if RESETn = '0' then
+ INT_STATE <= SCAN;
+ elsif CLK = '1' and CLK' event then
+ case INT_STATE is
+ when SCAN =>
+ INT_PASS <= x"0000";
+ -- Automatic End of Interrupt mode. Service register disabled.
+ -- The MFP does not respond for an interrupt acknowledge cycle for an uninitialized
+ -- vector number (VR(7 downto 4) = x"0").
+ if INT_OUT /= x"0000" and VR(7 downto 4) /= x"0" and VR(3) = '0' and IEIn = '0' then
+ INT_STATE <= REQUEST; -- Non masked interrupt is pending.
+ -- The following 16 are the Software end of interrupt mode. Service register enabled.
+ -- The MFP does not respond for an interrupt acknowledge cycle for an uninitialized
+ -- vector number (VR(7 downto 4) = x"0"). The interrupts are prioritized.
+ elsif INT_OUT /= x"0000" and VR(7 downto 4) /= x"0" and VR(3) = '1' and IEIn = '0' then
+ if INT_OUT (15) = '1' and INT_SERVICE(15) = '0' then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (14) = '1' and INT_SERVICE(15 downto 14) = "00" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (13) = '1' and INT_SERVICE(15 downto 13) = "000" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (12) = '1' and INT_SERVICE(15 downto 12) = x"0" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (11) = '1' and INT_SERVICE(15 downto 11) = x"0" & '0' then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (10) = '1' and INT_SERVICE(15 downto 10) = x"0" & "00" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (9) = '1' and INT_SERVICE(15 downto 9) = x"0" & "000" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (8) = '1' and INT_SERVICE(15 downto 8) = x"00" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (7) = '1' and INT_SERVICE(15 downto 7) = x"00" & '0' then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (6) = '1' and INT_SERVICE(15 downto 6) = x"00" & "00" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (5) = '1' and INT_SERVICE(15 downto 5) = x"00" & "000" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (4) = '1' and INT_SERVICE(15 downto 4) = x"000" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (3) = '1' and INT_SERVICE(15 downto 3) = x"000" & '0' then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (2) = '1' and INT_SERVICE(15 downto 2) = x"000" & "00" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (1) = '1' and INT_SERVICE(15 downto 1) = x"000" & "000" then
+ INT_STATE <= REQUEST;
+ elsif INT_OUT (0) = '1' and INT_SERVICE(15 downto 0) = x"0000" then
+ INT_STATE <= REQUEST;
+ else
+ INT_STATE <= SCAN; -- Wait for interrupt.
+ end if;
+ else
+ INT_STATE <= SCAN;
+ end if;
+ when REQUEST =>
+ if IACKn = '0' and DSn = '0' then -- Vectored interrupt mode.
+ INT_STATE <= VECTOR_OUT; -- Non masked interrupt is pending.
+ if INT_OUT(15) = '1' then
+ INT_PASS(15) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"F"; -- GPI 7.
+ elsif INT_OUT(14) = '1' then
+ INT_PASS(14) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"E"; -- GPI 6.
+ elsif INT_OUT(13) = '1' then
+ INT_PASS(13) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"D"; -- TIMER A.
+ elsif INT_OUT(12) = '1' then
+ INT_PASS(12) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"C"; -- Receive buffer full.
+ elsif INT_OUT(11) = '1' then
+ INT_PASS(11) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"B"; -- Receiver error.
+ elsif INT_OUT(10) = '1' then
+ INT_PASS(10) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"A"; -- Transmit buffer empty.
+ elsif INT_OUT(9) = '1' then
+ INT_PASS(9) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"9"; -- Transmit error.
+ elsif INT_OUT(8) = '1' then
+ INT_PASS(8) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"8"; -- Timer B.
+ elsif INT_OUT(7) = '1' then
+ INT_PASS(7) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"7"; -- GPI 5.
+ elsif INT_OUT(6) = '1' then
+ INT_PASS(6) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"6"; -- GPI 4.
+ elsif INT_OUT(5) = '1' then
+ INT_PASS(5) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"5"; -- Timer C.
+ elsif INT_OUT(4) = '1' then
+ INT_PASS(4) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"4"; -- Timer D.
+ elsif INT_OUT(3) = '1' then
+ INT_PASS(3) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"3"; -- GPI 3.
+ elsif INT_OUT(2) = '1' then
+ INT_PASS(2) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"2"; -- GPI 2.
+ elsif INT_OUT(1) = '1' then
+ INT_PASS(1) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"1"; -- GPI 1.
+ elsif INT_OUT(0) = '1' then
+ INT_PASS(0) <= '1'; VECT_NUMBER <= VR(7 downto 4) & x"0"; -- GPI 0.
+ end if;
+ -- Polled interrupt mode: End of interrupt by writing to the pending registers.
+ elsif CSn = '0' and DSn = '0' and RWn = '0' and (RS = "00101" or RS = "00110") then
+ INT_STATE <= SCAN;
+ else
+ INT_STATE <= REQUEST; -- Wait.
+ end if;
+ when VECTOR_OUT =>
+ INT_PASS <= x"0000";
+ if DSn = '1' or IACKn = '1' then
+ INT_STATE <= SCAN; -- Finished.
+ else
+ INT_STATE <= VECTOR_OUT; -- Wait for processor to read the vector.
+ end if;
+ end case;
+ end if;
+ end process P_INT_STATE;
+end architecture BEHAVIOR;
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
index 77ea5ef..dac4e9d 100644
--- a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
@@ -190,8 +190,8 @@ begin
end if;
end process DIG_PORTS;
-- Set port direction to input or to output:
- IO_A_EN <= '1' when CTRL_REG(6) = '1' else '0';
- IO_B_EN <= '1' when CTRL_REG(7) = '1' else '0';
+ IO_A_EN <= '1' when CTRL_REG(6) = '1' else '0';
+ IO_B_EN <= '1' when CTRL_REG(7) = '1' else '0';
IO_A_OUT <= PORT_A;
IO_B_OUT <= PORT_B;
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd.bak b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd.bak
new file mode 100644
index 0000000..d81f23c
--- /dev/null
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd.bak
@@ -0,0 +1,229 @@
+----------------------------------------------------------------------
+---- ----
+---- YM2149 compatible sound generator. ----
+---- ----
+---- This file is part of the SUSKA ATARI clone project. ----
+---- http://www.experiment-s.de ----
+---- ----
+---- Description: ----
+---- Model of the ST or STE's YM2149 sound generator. ----
+---- This IP core of the sound generator differs slightly from ----
+---- the original. Firstly it is a synchronous design without any ----
+---- latches (like assumed in the original chip). This required ----
+---- the introduction of a system adequate clock. In detail this ----
+---- SYS_CLK should on the one hand be fast enough to meet the ----
+---- timing requirements of the system's bus cycle and should one ----
+---- the other hand drive the PWM modules correctly. To meet both ----
+---- a SYS_CLK of 16MHz or above is recommended. ----
+---- Secondly, the original chip has an implemented DA converter. ----
+---- This feature is not possible in today's FPGAs. Therefore the ----
+---- converter is replaced by pulse width modulators. This solu- ----
+---- tion is very simple in comparison to other approaches like ----
+---- external DA converters with wave tables etc. The soltution ----
+---- with the pulse width modulators is probably not as accurate ----
+---- DAs with wavetables. For a detailed descrition of the hard- ----
+---- ware PWM filter look at the end of the wave file, where the ----
+---- pulse width modulators can be found. ----
+---- For a proper operation it is required, that the wave clock ----
+---- is lower than the system clock. A good choice is for example ----
+---- 2MHz for the wave clock and 16MHz for the system clock. ----
+---- ----
+---- Main module file. ----
+---- Top level file for use in systems on programmable chips. ----
+---- ----
+---- ----
+---- To Do: ----
+---- - ----
+---- ----
+---- Author(s): ----
+---- - Wolfgang Foerster, wf@experiment-s.de; wf@inventronik.de ----
+---- ----
+----------------------------------------------------------------------
+---- ----
+---- Copyright (C) 2006 - 2008 Wolfgang Foerster ----
+---- ----
+---- This source file may be used and distributed without ----
+---- restriction provided that this copyright statement is not ----
+---- removed from the file and that any derivative work contains ----
+---- the original copyright notice and the associated disclaimer. ----
+---- ----
+---- This source file is free software; you can redistribute it ----
+---- and/or modify it under the terms of the GNU Lesser General ----
+---- Public License as published by the Free Software Foundation; ----
+---- either version 2.1 of the License, or (at your option) any ----
+---- later version. ----
+---- ----
+---- This source is distributed in the hope that it will be ----
+---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
+---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
+---- PURPOSE. See the GNU Lesser General Public License for more ----
+---- details. ----
+---- ----
+---- You should have received a copy of the GNU Lesser General ----
+---- Public License along with this source; if not, download it ----
+---- from http://www.gnu.org/licenses/lgpl.html ----
+---- ----
+----------------------------------------------------------------------
+--
+-- Revision History
+--
+-- Revision 2K6A 2006/06/03 WF
+-- Initial Release.
+-- Revision 2K6B 2006/11/07 WF
+-- Modified Source to compile with the Xilinx ISE.
+-- Top level file provided for SOC (systems on programmable chips).
+-- Revision 2K8A 2008/07/14 WF
+-- Minor changes.
+--
+
+library ieee;
+use ieee.std_logic_1164.all;
+use work.wf2149ip_pkg.all;
+
+entity WF2149IP_TOP_SOC is
+ port(
+
+ SYS_CLK : in bit; -- Read the inforation in the header!
+ RESETn : in bit;
+
+ WAV_CLK : in bit; -- Read the inforation in the header!
+ SELn : in bit;
+
+ BDIR : in bit;
+ BC2, BC1 : in bit;
+
+ A9n, A8 : in bit;
+ DA_IN : in std_logic_vector(7 downto 0);
+ DA_OUT : out std_logic_vector(7 downto 0);
+ DA_EN : out bit;
+
+ IO_A_IN : in bit_vector(7 downto 0);
+ IO_A_OUT : out bit_vector(7 downto 0);
+ IO_A_EN : out bit;
+ IO_B_IN : in bit_vector(7 downto 0);
+ IO_B_OUT : out bit_vector(7 downto 0);
+ IO_B_EN : out bit;
+
+ OUT_A : out bit; -- Analog (PWM) outputs.
+ OUT_B : out bit;
+ OUT_C : out bit
+ );
+end WF2149IP_TOP_SOC;
+
+architecture STRUCTURE of WF2149IP_TOP_SOC is
+signal BUSCYCLE : BUSCYCLES;
+signal DATA_OUT_I : std_logic_vector(7 downto 0);
+signal DATA_EN_I : bit;
+signal WAV_STRB : bit;
+signal ADR_I : bit_vector(3 downto 0);
+signal CTRL_REG : bit_vector(7 downto 0);
+signal PORT_A : bit_vector(7 downto 0);
+signal PORT_B : bit_vector(7 downto 0);
+begin
+ P_WAVSTRB: process(RESETn, SYS_CLK)
+ variable LOCK : boolean;
+ variable TMP : bit;
+ begin
+ if RESETn = '0' then
+ LOCK := false;
+ TMP := '0';
+ elsif SYS_CLK = '1' and SYS_CLK' event then
+ if WAV_CLK = '1' and LOCK = false then
+ LOCK := true;
+ TMP := not TMP; -- Divider by 2.
+ case SELn is
+ when '1' => WAV_STRB <= '1';
+ when others => WAV_STRB <= TMP;
+ end case;
+ elsif WAV_CLK = '0' then
+ LOCK := false;
+ WAV_STRB <= '0';
+ else
+ WAV_STRB <= '0';
+ end if;
+ end if;
+ end process P_WAVSTRB;
+
+ with BDIR & BC2 & BC1 select
+ BUSCYCLE <= INACTIVE when "000" | "010" | "101",
+ ADDRESS when "001" | "100" | "111",
+ R_READ when "011",
+ R_WRITE when "110";
+
+ ADDRESSLATCH: process(RESETn, SYS_CLK)
+ -- This process is responsible to store the desired register
+ -- address. The default (after reset) is channel A fine tone
+ -- adjustment.
+ begin
+ if RESETn = '0' then
+ ADR_I <= (others => '0');
+ elsif SYS_CLK = '1' and SYS_CLK' event then
+ if BUSCYCLE = ADDRESS and A9n = '0' and A8 = '1' and DA_IN(7 downto 4) = x"0" then
+ ADR_I <= To_BitVector(DA_IN(3 downto 0));
+ end if;
+ end if;
+ end process ADDRESSLATCH;
+
+ P_CTRL_REG: process(RESETn, SYS_CLK)
+ -- THIS is the Control register for the mixer and for the I/O ports.
+ begin
+ if RESETn = '0' then
+ CTRL_REG <= x"00";
+ elsif SYS_CLK = '1' and SYS_CLK' event then
+ if BUSCYCLE = R_WRITE and ADR_I = x"7" then
+ CTRL_REG <= To_BitVector(DA_IN);
+ end if;
+ end if;
+ end process P_CTRL_REG;
+
+ DIG_PORTS: process(RESETn, SYS_CLK)
+ begin
+ if RESETn = '0' then
+ PORT_A <= x"00";
+ PORT_B <= x"00";
+ elsif SYS_CLK = '1' and SYS_CLK' event then
+ if BUSCYCLE = R_WRITE and ADR_I = x"E" then
+ PORT_A <= To_BitVector(DA_IN);
+ elsif BUSCYCLE = R_WRITE and ADR_I = x"F" then
+ PORT_B <= To_BitVector(DA_IN);
+ end if;
+ end if;
+ end process DIG_PORTS;
+ -- Set port direction to input or to output:
+ IO_A_EN <= '1' when CTRL_REG(6) = '1' else '1'; --0
+ IO_B_EN <= '1' when CTRL_REG(7) = '1' else '1'; --0
+ IO_A_OUT <= PORT_A;
+ IO_B_OUT <= PORT_B;
+
+ I_PSG_WAVE: WF2149IP_WAVE
+ port map(
+ RESETn => RESETn,
+ SYS_CLK => SYS_CLK,
+
+ WAV_STRB => WAV_STRB,
+
+ ADR => ADR_I,
+ DATA_IN => DA_IN,
+ DATA_OUT => DATA_OUT_I,
+ DATA_EN => DATA_EN_I,
+
+ BUSCYCLE => BUSCYCLE,
+ CTRL_REG => CTRL_REG(5 downto 0),
+
+ OUT_A => OUT_A,
+ OUT_B => OUT_B,
+ OUT_C => OUT_C
+ );
+
+ -- Read the ports and registers:
+ DA_EN <= '1' when DATA_EN_I = '1' else
+ '1' when BUSCYCLE = R_READ and ADR_I = x"7" else
+ '1' when BUSCYCLE = R_READ and ADR_I = x"E" else
+ '1' when BUSCYCLE = R_READ and ADR_I = x"F" else '0';
+
+ DA_OUT <= DATA_OUT_I when DATA_EN_I = '1' else -- WAV stuff.
+ To_StdLogicVector(IO_A_IN) when BUSCYCLE = R_READ and ADR_I = x"E" else
+ To_StdLogicVector(IO_B_IN) when BUSCYCLE = R_READ and ADR_I = x"F" else
+ To_StdLogicVector(CTRL_REG) when BUSCYCLE = R_READ and ADR_I = x"7" else (others => '0');
+
+end STRUCTURE;
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
index e60cc43..5ce2f2e 100644
--- a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
@@ -67,7 +67,7 @@ use ieee.std_logic_unsigned.all;
entity WF6850IP_CTRL_STATUS is
port (
- CLK : in bit;
+ CLK : in std_logic;
RESETn : in bit;
CS : in bit_vector(2 downto 0); -- Active if "011".
@@ -94,7 +94,7 @@ entity WF6850IP_CTRL_STATUS is
CDS : out bit_vector(1 downto 0); -- Clock control.
WS : out bit_vector(2 downto 0); -- Word select.
TC : out bit_vector(1 downto 0); -- Transmit control.
- IRQn : out bit -- Interrupt request.
+ IRQn : buffer bit -- Interrupt request.
);
end entity WF6850IP_CTRL_STATUS;
@@ -102,19 +102,14 @@ architecture BEHAVIOR of WF6850IP_CTRL_STATUS is
signal CTRL_REG : bit_vector(7 downto 0);
signal STATUS_REG : bit_vector(7 downto 0);
signal RIE : bit;
-signal IRQ_I : bit;
signal CTS_In : bit;
signal DCD_In : bit;
signal DCD_FLAGn : bit;
begin
- P_SAMPLE: process
- begin
- wait until CLK = '0' and CLK' event;
- CTS_In <= CTSn; -- Sample CTSn on the negative clock edge.
- DCD_In <= DCDn; -- Sample DCDn on the negative clock edge.
- end process P_SAMPLE;
+ CTS_In <= CTSn;
+ DCD_In <= DCDn; -- immer 0
- STATUS_REG(7) <= IRQ_I;
+ STATUS_REG(7) <= not IRQn;
STATUS_REG(6) <= PE;
STATUS_REG(5) <= OVR;
STATUS_REG(4) <= FE;
@@ -123,8 +118,8 @@ begin
STATUS_REG(1) <= TDRE and not CTS_In; -- No TDRE for CTSn = '1'.
STATUS_REG(0) <= RDRF and not DCD_In; -- DCDn = '1' indicates empty.
- DATA_OUT <= STATUS_REG when CS = "011" and RWn = '1' and RS = '0' and E = '1' else (others => '0');
- DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '0' and E = '1' else '0';
+ DATA_OUT <= STATUS_REG when CS = "011" and RWn = '1' and RS = '0' else (others => '0');
+ DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '0' else '0';
MCLR <= '1' when CTRL_REG(1 downto 0) = "11" else '0';
RTSn <= '0' when CTRL_REG(6 downto 5) /= "10" else '1';
@@ -134,110 +129,73 @@ begin
TC <= CTRL_REG(6 downto 5);
RIE <= CTRL_REG(7);
- P_IRQ: process
- variable DCD_OVR_LOCK : boolean;
- variable DCD_LOCK : boolean;
- variable DCD_TRANS : boolean;
- begin
- wait until CLK = '1' and CLK' event;
- if RESETn = '0' then
- DCD_OVR_LOCK := false;
- IRQn <= '1';
- IRQ_I <= '0';
- elsif CS = "011" and RWn = '1' and RS = '0' and E = '1' then
- DCD_OVR_LOCK := false; -- Enable reset by reading the status.
+ P_IRQ: process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if RESETn = '0' or MCLR = '1' then
+ IRQn <= '1';
+ else
+ -- Transmitter interrupt:
+ if TDRE = '1' and CTRL_REG(6 downto 5) = "01" then
+ IRQn <= '0';
+ end if;
+ -- Receiver interrupts:
+ if RDRF = '1' and RIE = '1' then
+ IRQn <= '0';
+ end if;
+ -- Overrun
+ if OVR = '1' and RIE = '1' then
+ IRQn <= '0';
+ end if;
+ -- The reset of the IRQ status flag:
+ -- Clear by writing to the transmit data register.
+ -- Clear by reading the receive data register.
+ if CS = "011" and RS = '1' then
+ IRQn <= '1';
+ end if;
+ end if;
end if;
-
- -- Clear interrupts when disabled.
- if CTRL_REG(7) = '0' then
- IRQn <= '1';
- IRQ_I <= '0';
- elsif CTRL_REG(6 downto 5) /= "01" then
- IRQn <= '1';
- IRQ_I <= '0';
- end if;
-
- -- Transmitter interrupt:
- if TDRE = '1' and CTRL_REG(6 downto 5) = "01" and CTS_In = '0' then
- IRQn <= '0';
- IRQ_I <= '1';
- elsif CS = "011" and RWn = '0' and RS = '1' and E = '1' then
- IRQn <= '1'; -- Clear by writing to the transmit data register.
- end if;
-
- -- Receiver interrupts:
- if RDRF = '1' and RIE = '1' and DCD_In = '0' then
- IRQn <= '0';
- IRQ_I <= '1';
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' then
- IRQn <= '1'; -- Clear by reading the receive data register.
- end if;
-
- if OVR = '1' and RIE = '1' then
- IRQn <= '0';
- IRQ_I <= '1';
- DCD_OVR_LOCK := true;
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' and DCD_OVR_LOCK = false then
- IRQn <= '1'; -- Clear by reading the receive data register after the status.
- end if;
-
- if DCD_In = '1' and RIE = '1' and DCD_TRANS = false then
- IRQn <= '0';
- IRQ_I <= '1';
- -- DCD_TRANS is used to detect a low to high transition of DCDn.
- DCD_TRANS := true;
- DCD_OVR_LOCK := true;
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' and DCD_OVR_LOCK = false then
- IRQn <= '1'; -- Clear by reading the receive data register after the status.
- elsif DCD_In = '0' then
- DCD_TRANS := false;
- end if;
-
- -- The reset of the IRQ status flag:
- -- Clear by writing to the transmit data register.
- -- Clear by reading the receive data register.
- if CS = "011" and RS = '1' and E = '1' then
- IRQ_I <= '0';
- end if;
end process P_IRQ;
- CONTROL: process
+ CONTROL: process(CLK)
begin
- wait until CLK = '1' and CLK' event;
- if RESETn = '0' then
- CTRL_REG <= "01000000";
- elsif CS = "011" and RWn = '0' and RS = '0' and E = '1' then
- CTRL_REG <= DATA_IN;
+ if rising_edge(CLK) then
+ if RESETn = '0' then
+ CTRL_REG <= "01000000";
+ elsif CS = "011" and RWn = '0' and RS = '0' then
+ CTRL_REG <= DATA_IN;
+ end if;
end if;
end process CONTROL;
- P_DCD: process
+ P_DCD: process(CLK)
-- This process is some kind of tricky. Refer to the MC6850 data
-- sheet for more information.
variable READ_LOCK : boolean;
variable DCD_RELEASE : boolean;
begin
- wait until CLK = '1' and CLK' event;
- if RESETn = '0' then
- DCD_FLAGn <= '0'; -- This interrupt source must initialise low.
- READ_LOCK := true;
- DCD_RELEASE := false;
- elsif MCLR = '1' then
- DCD_FLAGn <= DCD_In;
- READ_LOCK := true;
- elsif DCD_In = '1' then
- DCD_FLAGn <= '1';
- elsif CS = "011" and RWn = '1' and RS = '0' and E = '1' then
- READ_LOCK := false; -- Un-READ_LOCK if receiver data register is read.
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' and READ_LOCK = false then
- -- Clear if receiver status register read access.
- -- After data register has ben read and READ_LOCK again.
- DCD_RELEASE := true;
- READ_LOCK := true;
- DCD_FLAGn <= DCD_In;
- elsif DCD_In = '0' and DCD_RELEASE = true then
- DCD_FLAGn <= '0';
- DCD_RELEASE := false;
+ if rising_edge(CLK) then
+ if RESETn = '0' then
+ DCD_FLAGn <= '0'; -- This interrupt source must initialise low.
+ READ_LOCK := true;
+ DCD_RELEASE := false;
+ elsif MCLR = '1' then
+ DCD_FLAGn <= DCD_In;
+ READ_LOCK := true;
+ elsif DCD_In = '1' then
+ DCD_FLAGn <= '1';
+ elsif CS = "011" and RWn = '1' and RS = '0' then
+ READ_LOCK := false; -- Un-READ_LOCK if receiver data register is read.
+ elsif CS = "011" and RWn = '1' and RS = '1' and READ_LOCK = false then
+ -- Clear if receiver status register read access.
+ -- After data register has ben read and READ_LOCK again.
+ DCD_RELEASE := true;
+ READ_LOCK := true;
+ DCD_FLAGn <= DCD_In;
+ elsif DCD_In = '0' and DCD_RELEASE = true then
+ DCD_FLAGn <= '0';
+ DCD_RELEASE := false;
+ end if;
end if;
end process P_DCD;
end architecture BEHAVIOR;
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd.bak b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd.bak
index a0ea9e4..2e85cdd 100644
--- a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd.bak
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd.bak
@@ -67,7 +67,7 @@ use ieee.std_logic_unsigned.all;
entity WF6850IP_CTRL_STATUS is
port (
- CLK : in bit;
+ CLK : in std_logic;
RESETn : in bit;
CS : in bit_vector(2 downto 0); -- Active if "011".
@@ -94,7 +94,7 @@ entity WF6850IP_CTRL_STATUS is
CDS : out bit_vector(1 downto 0); -- Clock control.
WS : out bit_vector(2 downto 0); -- Word select.
TC : out bit_vector(1 downto 0); -- Transmit control.
- IRQn : out bit -- Interrupt request.
+ IRQn : buffer bit -- Interrupt request.
);
end entity WF6850IP_CTRL_STATUS;
@@ -102,19 +102,14 @@ architecture BEHAVIOR of WF6850IP_CTRL_STATUS is
signal CTRL_REG : bit_vector(7 downto 0);
signal STATUS_REG : bit_vector(7 downto 0);
signal RIE : bit;
-signal IRQ_I : bit;
signal CTS_In : bit;
signal DCD_In : bit;
signal DCD_FLAGn : bit;
begin
- P_SAMPLE: process
- begin
- wait until CLK = '0' and CLK' event;
- CTS_In <= CTSn; -- Sample CTSn on the negative clock edge.
- DCD_In <= DCDn; -- Sample DCDn on the negative clock edge.
- end process P_SAMPLE;
+ CTS_In <= CTSn;
+ DCD_In <= DCDn; -- immer 0
- STATUS_REG(7) <= IRQ_I;
+ STATUS_REG(7) <= not IRQn;
STATUS_REG(6) <= PE;
STATUS_REG(5) <= OVR;
STATUS_REG(4) <= FE;
@@ -123,8 +118,8 @@ begin
STATUS_REG(1) <= TDRE and not CTS_In; -- No TDRE for CTSn = '1'.
STATUS_REG(0) <= RDRF and not DCD_In; -- DCDn = '1' indicates empty.
- DATA_OUT <= STATUS_REG when CS = "011" and RWn = '1' and RS = '0' and E = '1' else (others => '0');
- DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '0' and E = '1' else '0';
+ DATA_OUT <= STATUS_REG when CS = "011" and RWn = '1' and RS = '0' else (others => '0');
+ DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '0' else '0';
MCLR <= '1' when CTRL_REG(1 downto 0) = "11" else '0';
RTSn <= '0' when CTRL_REG(6 downto 5) /= "10" else '1';
@@ -134,110 +129,85 @@ begin
TC <= CTRL_REG(6 downto 5);
RIE <= CTRL_REG(7);
- P_IRQ: process
- variable DCD_OVR_LOCK : boolean;
- variable DCD_LOCK : boolean;
- variable DCD_TRANS : boolean;
- begin
- wait until CLK = '1' and CLK' event;
- if RESETn = '0' then
- DCD_OVR_LOCK := false;
- IRQn <= '1';
- IRQ_I <= '0';
- elsif CS = "011" and RWn = '1' and RS = '0' and E = '1' then
- DCD_OVR_LOCK := false; -- Enable reset by reading the status.
+ P_IRQ: process(CLK)
+ variable irq_v : std_logic_vector(3 downto 0);
+ begin
+ if rising_edge(CLK) then
+ if RESETn = '0' or MCLR = '1' then
+ irq_v := x"0";
+ IRQn <= '1';
+ else
+ -- Transmitter interrupt:
+ if TDRE = '1' and CTRL_REG(6 downto 5) = "01" then
+ if irq_v = x"F" then
+ irq_v := irq_v + 1;
+ end if;
+ -- Receiver interrupts:
+ elsif RDRF = '1' and RIE = '1' then
+ if irq_v < 15 then
+ irq_v := irq_v + 1;
+ end if;
+ -- Overrun
+ elsif OVR = '1' and RIE = '1' then
+ if irq_v < 15 then
+ irq_v := irq_v + 1;
+ end if;
+ else
+ if irq_v > 0 then
+ irq_v := irq_v - 1;
+ end if;
+ end if;
+ if irq_v < 8 then
+ IRQn <= '1';
+ else
+ IRQn <= '0';
+ end if;
+ -- The reset of the IRQ status flag:
+ -- Clear by writing to the transmit data register.
+ -- Clear by reading the receive data register.
+ end if;
end if;
-
--- Clear interrupts when disabled.
-if CTRL_REG(7) = '0' then
- IRQn <= '1';
- IRQ_I <= '0';
-elsif CTRL_REG(6 downto 5) /= "01" then
- IRQn <= '1';
- IRQ_I <= '0';
-end if;
-
- -- Transmitter interrupt:
- if TDRE = '1' and CTRL_REG(6 downto 5) = "01" and CTS_In = '0' then
- IRQn <= '0';
- IRQ_I <= '1';
- elsif CS = "011" and RWn = '0' and RS = '1' and E = '1' then
- IRQn <= '1'; -- Clear by writing to the transmit data register.
- end if;
-
- -- Receiver interrupts:
- if RDRF = '1' and RIE = '1' and DCD_In = '0' then
- IRQn <= '0';
- IRQ_I <= '1';
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' then
- IRQn <= '1'; -- Clear by reading the receive data register.
- end if;
-
- if OVR = '1' and RIE = '1' then
- IRQn <= '0';
- IRQ_I <= '1';
- DCD_OVR_LOCK := true;
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' and DCD_OVR_LOCK = false then
- IRQn <= '1'; -- Clear by reading the receive data register after the status.
- end if;
-
- if DCD_In = '1' and RIE = '1' and DCD_TRANS = false then
- IRQn <= '0';
- IRQ_I <= '1';
- -- DCD_TRANS is used to detect a low to high transition of DCDn.
- DCD_TRANS := true;
- DCD_OVR_LOCK := true;
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' and DCD_OVR_LOCK = false then
- IRQn <= '1'; -- Clear by reading the receive data register after the status.
- elsif DCD_In = '0' then
- DCD_TRANS := false;
- end if;
-
- -- The reset of the IRQ status flag:
- -- Clear by writing to the transmit data register.
- -- Clear by reading the receive data register.
- if CS = "011" and RS = '1' and E = '1' then
- IRQ_I <= '0';
- end if;
end process P_IRQ;
- CONTROL: process
+ CONTROL: process(CLK)
begin
- wait until CLK = '1' and CLK' event;
- if RESETn = '0' then
- CTRL_REG <= "01000000";
- elsif CS = "011" and RWn = '0' and RS = '0' and E = '1' then
- CTRL_REG <= DATA_IN;
+ if rising_edge(CLK) then
+ if RESETn = '0' then
+ CTRL_REG <= "01000000";
+ elsif CS = "011" and RWn = '0' and RS = '0' then
+ CTRL_REG <= DATA_IN;
+ end if;
end if;
end process CONTROL;
- P_DCD: process
+ P_DCD: process(CLK)
-- This process is some kind of tricky. Refer to the MC6850 data
-- sheet for more information.
variable READ_LOCK : boolean;
variable DCD_RELEASE : boolean;
begin
- wait until CLK = '1' and CLK' event;
- if RESETn = '0' then
- DCD_FLAGn <= '0'; -- This interrupt source must initialise low.
- READ_LOCK := true;
- DCD_RELEASE := false;
- elsif MCLR = '1' then
- DCD_FLAGn <= DCD_In;
- READ_LOCK := true;
- elsif DCD_In = '1' then
- DCD_FLAGn <= '1';
- elsif CS = "011" and RWn = '1' and RS = '0' and E = '1' then
- READ_LOCK := false; -- Un-READ_LOCK if receiver data register is read.
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' and READ_LOCK = false then
- -- Clear if receiver status register read access.
- -- After data register has ben read and READ_LOCK again.
- DCD_RELEASE := true;
- READ_LOCK := true;
- DCD_FLAGn <= DCD_In;
- elsif DCD_In = '0' and DCD_RELEASE = true then
- DCD_FLAGn <= '0';
- DCD_RELEASE := false;
+ if rising_edge(CLK) then
+ if RESETn = '0' then
+ DCD_FLAGn <= '0'; -- This interrupt source must initialise low.
+ READ_LOCK := true;
+ DCD_RELEASE := false;
+ elsif MCLR = '1' then
+ DCD_FLAGn <= DCD_In;
+ READ_LOCK := true;
+ elsif DCD_In = '1' then
+ DCD_FLAGn <= '1';
+ elsif CS = "011" and RWn = '1' and RS = '0' then
+ READ_LOCK := false; -- Un-READ_LOCK if receiver data register is read.
+ elsif CS = "011" and RWn = '1' and RS = '1' and READ_LOCK = false then
+ -- Clear if receiver status register read access.
+ -- After data register has ben read and READ_LOCK again.
+ DCD_RELEASE := true;
+ READ_LOCK := true;
+ DCD_FLAGn <= DCD_In;
+ elsif DCD_In = '0' and DCD_RELEASE = true then
+ DCD_FLAGn <= '0';
+ DCD_RELEASE := false;
+ end if;
end if;
end process P_DCD;
end architecture BEHAVIOR;
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive - Kopie.vhd b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive - Kopie.vhd
new file mode 100644
index 0000000..c6626df
--- /dev/null
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive - Kopie.vhd
@@ -0,0 +1,419 @@
+----------------------------------------------------------------------
+---- ----
+---- 6850 compatible IP Core ----
+---- ----
+---- This file is part of the SUSKA ATARI clone project. ----
+---- http://www.experiment-s.de ----
+---- ----
+---- Description: ----
+---- UART 6850 compatible IP core ----
+---- ----
+---- 6850's receiver unit. ----
+---- ----
+---- ----
+---- To Do: ----
+---- - ----
+---- ----
+---- Author(s): ----
+---- - Wolfgang Foerster, wf@experiment-s.de; wf@inventronik.de ----
+---- ----
+----------------------------------------------------------------------
+---- ----
+---- Copyright (C) 2006 - 2008 Wolfgang Foerster ----
+---- ----
+---- This source file may be used and distributed without ----
+---- restriction provided that this copyright statement is not ----
+---- removed from the file and that any derivative work contains ----
+---- the original copyright notice and the associated disclaimer. ----
+---- ----
+---- This source file is free software; you can redistribute it ----
+---- and/or modify it under the terms of the GNU Lesser General ----
+---- Public License as published by the Free Software Foundation; ----
+---- either version 2.1 of the License, or (at your option) any ----
+---- later version. ----
+---- ----
+---- This source is distributed in the hope that it will be ----
+---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
+---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
+---- PURPOSE. See the GNU Lesser General Public License for more ----
+---- details. ----
+---- ----
+---- You should have received a copy of the GNU Lesser General ----
+---- Public License along with this source; if not, download it ----
+---- from http://www.gnu.org/licenses/lgpl.html ----
+---- ----
+----------------------------------------------------------------------
+--
+-- Revision History
+--
+-- Revision 2K6A 2006/06/03 WF
+-- Initial Release.
+-- Revision 2K6B 2006/11/07 WF
+-- Modified Source to compile with the Xilinx ISE.
+-- Revision 2K8A 2008/07/14 WF
+-- Minor changes.
+--
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_unsigned.all;
+
+entity WF6850IP_RECEIVE is
+ port (
+ CLK : in bit;
+ RESETn : in bit;
+ MCLR : in bit;
+
+ CS : in bit_vector(2 downto 0);
+ E : in bit;
+ RWn : in bit;
+ RS : in bit;
+
+ DATA_OUT : out bit_vector(7 downto 0);
+ DATA_EN : out bit;
+
+ WS : in bit_vector(2 downto 0);
+ CDS : in bit_vector(1 downto 0);
+
+ RXCLK : in bit;
+ RXDATA : in bit;
+
+ RDRF : buffer bit;
+ OVR : out bit;
+ PE : out bit;
+ FE : out bit
+ );
+end entity WF6850IP_RECEIVE;
+
+architecture BEHAVIOR of WF6850IP_RECEIVE is
+type RCV_STATES is (IDLE, WAIT_START, SAMPLE, PARITY, STOP1, STOP2, SYNC);
+signal RCV_STATE, RCV_NEXT_STATE : RCV_STATES;
+signal RXDATA_I : bit;
+signal RXDATA_S : bit;
+signal DATA_REG : bit_vector(7 downto 0);
+signal SHIFT_REG : bit_vector(7 downto 0);
+signal CLK_STRB : bit;
+signal BITCNT : std_logic_vector(2 downto 0);
+begin
+ P_SAMPLE: process
+ -- This filter provides a synchronisation to the system
+ -- clock, even for random baud rates of the received data
+ -- stream.
+ variable FLT_TMP : integer range 0 to 2;
+ begin
+ wait until CLK = '1' and CLK' event;
+ --
+ RXDATA_I <= RXDATA;
+ --
+ if RXDATA_I = '1' and FLT_TMP < 2 then
+ FLT_TMP := FLT_TMP + 1;
+ elsif RXDATA_I = '1' then
+ RXDATA_S <= '1';
+ elsif RXDATA_I = '0' and FLT_TMP > 0 then
+ FLT_TMP := FLT_TMP - 1;
+ elsif RXDATA_I = '0' then
+ RXDATA_S <= '0';
+ end if;
+ end process P_SAMPLE;
+
+ CLKDIV: process
+ variable CLK_LOCK : boolean;
+ variable STRB_LOCK : boolean;
+ variable CLK_DIVCNT : std_logic_vector(6 downto 0);
+ begin
+ wait until CLK = '1' and CLK' event;
+ if CDS = "00" then -- Divider off.
+ if RXCLK = '1' and STRB_LOCK = false then
+ CLK_STRB <= '1';
+ STRB_LOCK := true;
+ elsif RXCLK = '0' then
+ CLK_STRB <= '0';
+ STRB_LOCK := false;
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif RCV_STATE = IDLE then
+ -- Preset the CLKDIV with the start delays.
+ if CDS = "01" then
+ CLK_DIVCNT := "0001000"; -- Half of div by 16 mode.
+ elsif CDS = "10" then
+ CLK_DIVCNT := "0100000"; -- Half of div by 64 mode.
+ end if;
+ CLK_STRB <= '0';
+ else
+ if CLK_DIVCNT > "0000000" and RXCLK = '1' and CLK_LOCK = false then
+ CLK_DIVCNT := CLK_DIVCNT - '1';
+ CLK_STRB <= '0';
+ CLK_LOCK := true;
+ elsif CDS = "01" and CLK_DIVCNT = "0000000" then
+ CLK_DIVCNT := "0010000"; -- Div by 16 mode.
+ --
+ if STRB_LOCK = false then
+ STRB_LOCK := true;
+ CLK_STRB <= '1';
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif CDS = "10" and CLK_DIVCNT = "0000000" then
+ CLK_DIVCNT := "1000000"; -- Div by 64 mode.
+ if STRB_LOCK = false then
+ STRB_LOCK := true;
+ CLK_STRB <= '1';
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif RXCLK = '0' then
+ CLK_LOCK := false;
+ STRB_LOCK := false;
+ CLK_STRB <= '0';
+ else
+ CLK_STRB <= '0';
+ end if;
+ end if;
+ end process CLKDIV;
+
+ DATAREG: process(RESETn, CLK)
+ begin
+ if RESETn = '0' then
+ DATA_REG <= x"00";
+ elsif CLK = '1' and CLK' event then
+ if MCLR = '1' then
+ DATA_REG <= x"00";
+ elsif RCV_STATE = SYNC and WS(2) = '0' and RDRF = '0' then -- 7 bit data.
+ -- Transfer from shift- to data register only if
+ -- data register is empty (RDRF = '0').
+ DATA_REG <= '0' & SHIFT_REG(7 downto 1);
+ elsif RCV_STATE = SYNC and WS(2) = '1' and RDRF = '0' then -- 8 bit data.
+ -- Transfer from shift- to data register only if
+ -- data register is empty (RDRF = '0').
+ DATA_REG <= SHIFT_REG;
+ end if;
+ end if;
+ end process DATAREG;
+ DATA_OUT <= DATA_REG when CS = "011" and RWn = '1' and RS = '1' and E = '1' else (others => '0');
+ DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '1' and E = '1' else '0';
+
+ SHIFTREG: process(RESETn, CLK)
+ begin
+ if RESETn = '0' then
+ SHIFT_REG <= x"00";
+ elsif CLK = '1' and CLK' event then
+ if MCLR = '1' then
+ SHIFT_REG <= x"00";
+ elsif RCV_STATE = SAMPLE and CLK_STRB = '1' then
+ SHIFT_REG <= RXDATA_S & SHIFT_REG(7 downto 1); -- Shift right.
+ end if;
+ end if;
+ end process SHIFTREG;
+
+ P_BITCNT: process
+ begin
+ wait until CLK = '1' and CLK' event;
+ if RCV_STATE = SAMPLE and CLK_STRB = '1' then
+ BITCNT <= BITCNT + '1';
+ elsif RCV_STATE /= SAMPLE then
+ BITCNT <= (others => '0');
+ end if;
+ end process P_BITCNT;
+
+ FRAME_ERR: process(RESETn, CLK)
+ -- This module detects a framing error
+ -- during stop bit 1 and stop bit 2.
+ variable FE_I: bit;
+ begin
+ if RESETn = '0' then
+ FE_I := '0';
+ FE <= '0';
+ elsif CLK = '1' and CLK' event then
+ if MCLR = '1' then
+ FE_I := '0';
+ FE <= '0';
+ elsif CLK_STRB = '1' then
+ if RCV_STATE = STOP1 and RXDATA_S = '0' then
+ FE_I := '1';
+ elsif RCV_STATE = STOP2 and RXDATA_S = '0' then
+ FE_I := '1';
+ elsif RCV_STATE = STOP1 or RCV_STATE = STOP2 then
+ FE_I := '0'; -- Error resets when correct data appears.
+ end if;
+ end if;
+ if RCV_STATE = SYNC then
+ FE <= FE_I; -- Update the FE every SYNC time.
+ end if;
+ end if;
+ end process FRAME_ERR;
+
+ OVERRUN: process(RESETn, CLK)
+ variable OVR_I : bit;
+ variable FIRST_READ : boolean;
+ begin
+ if RESETn = '0' then
+ OVR_I := '0';
+ OVR <= '0';
+ FIRST_READ := false;
+ elsif CLK = '1' and CLK' event then
+ if MCLR = '1' then
+ OVR_I := '0';
+ OVR <= '0';
+ FIRST_READ := false;
+ elsif CLK_STRB = '1' and RCV_STATE = STOP1 then
+ -- Overrun appears if RDRF is '1' in this state.
+ OVR_I := RDRF;
+ end if;
+ if CS = "011" and RWn = '1' and RS = '1' then
+ -- If an overrun was detected, the concerning flag is
+ -- set when the valid data word in the receiver data
+ -- register is read. Thereafter the RDRF flag is reset
+ -- and the overrun disappears (OVR_I goes low) after
+ -- a second read (in time) of the receiver data register.
+ if FIRST_READ = false then
+ if OVR_I = '1' then
+ OVR <= '1';
+ OVR_I := '0';
+ FIRST_READ := true;
+ else
+ OVR <= '0';
+ end if;
+ end if;
+ else
+ FIRST_READ := false;
+ end if;
+ end if;
+ end process OVERRUN;
+
+ PARITY_TEST: process(RESETn, CLK)
+ variable PAR_TMP : bit;
+ variable PE_I : bit;
+ begin
+ if RESETn = '0' then
+ PE <= '0';
+ elsif CLK = '1' and CLK' event then
+ if MCLR = '1' then
+ PE <= '0';
+ elsif CLK_STRB = '1' then -- Sample parity on clock strobe.
+ PE_I := '0'; -- Initialise.
+ if RCV_STATE = PARITY then
+ for i in 1 to 7 loop
+ if i = 1 then
+ PAR_TMP := SHIFT_REG(i-1) xor SHIFT_REG(i);
+ else
+ PAR_TMP := PAR_TMP xor SHIFT_REG(i);
+ end if;
+ end loop;
+ if WS = "000" or WS = "010" or WS = "110" then -- Even parity.
+ PE_I := PAR_TMP xor RXDATA_S;
+ elsif WS = "001" or WS = "011" or WS = "111" then -- Odd parity.
+ PE_I := not PAR_TMP xor RXDATA_S;
+ else -- No parity for WS = "100" and WS = "101".
+ PE_I := '0';
+ end if;
+ end if;
+ end if;
+ -- Transmit the parity flag together with the data
+ -- In other words: no parity to the status register
+ -- when RDRF inhibits the data transfer to the
+ -- receiver data register.
+ if RCV_STATE = SYNC and RDRF = '0' then
+ PE <= PE_I;
+ elsif CS = "011" and RWn = '1' and RS = '1' then
+ PE <= '0'; -- Clear when reading the data register.
+ end if;
+ end if;
+ end process PARITY_TEST;
+
+ P_RDRF: process(RESETn, CLK)
+ -- Receive data register full flag.
+ begin
+ if RESETn = '0' then
+ RDRF <= '0';
+ elsif CLK = '1' and CLK' event then
+ if MCLR = '1' then
+ RDRF <= '0';
+ elsif RCV_STATE = SYNC then
+ RDRF <= '1'; -- Data register is full until now!
+ elsif CS = "011" and RWn = '1' and RS = '1' then
+ RDRF <= '0'; -- After reading the data register ...
+ end if;
+ end if;
+ end process P_RDRF;
+
+ RCV_STATEREG: process(RESETn, CLK)
+ begin
+ if RESETn = '0' then
+ RCV_STATE <= IDLE;
+ elsif CLK = '1' and CLK' event then
+ if MCLR = '1' then
+ RCV_STATE <= IDLE;
+ else
+ RCV_STATE <= RCV_NEXT_STATE;
+ end if;
+ end if;
+ end process RCV_STATEREG;
+
+ RCV_STATEDEC: process(RCV_STATE, RXDATA_S, CDS, WS, BITCNT, CLK_STRB)
+ begin
+ case RCV_STATE is
+ when IDLE =>
+ if RXDATA_S = '0' and CDS = "00" then
+ RCV_NEXT_STATE <= SAMPLE; -- Startbit detected in div by 1 mode.
+ elsif RXDATA_S = '0' and CDS = "01" then
+ RCV_NEXT_STATE <= WAIT_START; -- Startbit detected in div by 16 mode.
+ elsif RXDATA_S = '0' and CDS = "10" then
+ RCV_NEXT_STATE <= WAIT_START; -- Startbit detected in div by 64 mode.
+ else
+ RCV_NEXT_STATE <= IDLE; -- No startbit; sleep well :-)
+ end if;
+ when WAIT_START =>
+ if CLK_STRB = '1' then
+ if RXDATA_S = '0' then
+ RCV_NEXT_STATE <= SAMPLE; -- Start condition in no div by 1 modes.
+ else
+ RCV_NEXT_STATE <= IDLE; -- No valid start condition, go back.
+ end if;
+ else
+ RCV_NEXT_STATE <= WAIT_START; -- Stay.
+ end if;
+ when SAMPLE =>
+ if CLK_STRB = '1' then
+ if BITCNT < "110" and WS(2) = '0' then
+ RCV_NEXT_STATE <= SAMPLE; -- Go on sampling 7 data bits.
+ elsif BITCNT < "111" and WS(2) = '1' then
+ RCV_NEXT_STATE <= SAMPLE; -- Go on sampling 8 data bits.
+ elsif WS = "100" or WS = "101" then
+ RCV_NEXT_STATE <= STOP1; -- No parity check enabled.
+ else
+ RCV_NEXT_STATE <= PARITY; -- Parity enabled.
+ end if;
+ else
+ RCV_NEXT_STATE <= SAMPLE; -- Stay in sample mode.
+ end if;
+ when PARITY =>
+ if CLK_STRB = '1' then
+ RCV_NEXT_STATE <= STOP1;
+ else
+ RCV_NEXT_STATE <= PARITY;
+ end if;
+ when STOP1 =>
+ if CLK_STRB = '1' then
+ if RXDATA_S = '0' then
+ RCV_NEXT_STATE <= SYNC; -- Framing error detected.
+ elsif WS = "000" or WS = "001" or WS = "100" then
+ RCV_NEXT_STATE <= STOP2; -- Two stop bits selected.
+ else
+ RCV_NEXT_STATE <= SYNC; -- One stop bit selected.
+ end if;
+ else
+ RCV_NEXT_STATE <= STOP1;
+ end if;
+ when STOP2 =>
+ if CLK_STRB = '1' then
+ RCV_NEXT_STATE <= SYNC;
+ else
+ RCV_NEXT_STATE <= STOP2;
+ end if;
+ when SYNC =>
+ RCV_NEXT_STATE <= IDLE;
+ end case;
+ end process RCV_STATEDEC;
+end architecture BEHAVIOR;
+
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
index 755e018..9461136 100644
--- a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
@@ -60,7 +60,7 @@ use ieee.std_logic_unsigned.all;
entity WF6850IP_RECEIVE is
port (
- CLK : in bit;
+ CLK : in std_logic;
RESETn : in bit;
MCLR : in bit;
@@ -95,124 +95,127 @@ signal SHIFT_REG : bit_vector(7 downto 0);
signal CLK_STRB : bit;
signal BITCNT : std_logic_vector(2 downto 0);
begin
- P_SAMPLE: process
+ P_SAMPLE: process(CLK)
-- This filter provides a synchronisation to the system
-- clock, even for random baud rates of the received data
-- stream.
variable FLT_TMP : integer range 0 to 2;
begin
- wait until CLK = '1' and CLK' event;
- --
- RXDATA_I <= RXDATA;
- --
- if RXDATA_I = '1' and FLT_TMP < 2 then
- FLT_TMP := FLT_TMP + 1;
- elsif RXDATA_I = '1' then
- RXDATA_S <= '1';
- elsif RXDATA_I = '0' and FLT_TMP > 0 then
- FLT_TMP := FLT_TMP - 1;
- elsif RXDATA_I = '0' then
- RXDATA_S <= '0';
+ if rising_edge(CLK) then
+ --
+ RXDATA_I <= RXDATA;
+ --
+ if RXDATA_I = '1' and FLT_TMP < 2 then
+ FLT_TMP := FLT_TMP + 1;
+ elsif RXDATA_I = '1' then
+ RXDATA_S <= '1';
+ elsif RXDATA_I = '0' and FLT_TMP > 0 then
+ FLT_TMP := FLT_TMP - 1;
+ elsif RXDATA_I = '0' then
+ RXDATA_S <= '0';
+ end if;
end if;
end process P_SAMPLE;
- CLKDIV: process
+ CLKDIV: process(CLK)
variable CLK_LOCK : boolean;
variable STRB_LOCK : boolean;
variable CLK_DIVCNT : std_logic_vector(6 downto 0);
begin
- wait until CLK = '1' and CLK' event;
- if CDS = "00" then -- Divider off.
- if RXCLK = '1' and STRB_LOCK = false then
- CLK_STRB <= '1';
- STRB_LOCK := true;
- elsif RXCLK = '0' then
- CLK_STRB <= '0';
- STRB_LOCK := false;
- else
- CLK_STRB <= '0';
- end if;
- elsif RCV_STATE = IDLE then
- -- Preset the CLKDIV with the start delays.
- if CDS = "01" then
- CLK_DIVCNT := "0001000"; -- Half of div by 16 mode.
- elsif CDS = "10" then
- CLK_DIVCNT := "0100000"; -- Half of div by 64 mode.
- end if;
- CLK_STRB <= '0';
- else
- if CLK_DIVCNT > "0000000" and RXCLK = '1' and CLK_LOCK = false then
- CLK_DIVCNT := CLK_DIVCNT - '1';
- CLK_STRB <= '0';
- CLK_LOCK := true;
- elsif CDS = "01" and CLK_DIVCNT = "0000000" then
- CLK_DIVCNT := "0010000"; -- Div by 16 mode.
- --
- if STRB_LOCK = false then
- STRB_LOCK := true;
+ if rising_edge(CLK) then
+ if CDS = "00" then -- Divider off.
+ if RXCLK = '1' and STRB_LOCK = false then
CLK_STRB <= '1';
+ STRB_LOCK := true;
+ elsif RXCLK = '0' then
+ CLK_STRB <= '0';
+ STRB_LOCK := false;
else
CLK_STRB <= '0';
end if;
- elsif CDS = "10" and CLK_DIVCNT = "0000000" then
- CLK_DIVCNT := "1000000"; -- Div by 64 mode.
- if STRB_LOCK = false then
- STRB_LOCK := true;
- CLK_STRB <= '1';
- else
- CLK_STRB <= '0';
+ elsif RCV_STATE = IDLE then
+ -- Preset the CLKDIV with the start delays.
+ if CDS = "01" then
+ CLK_DIVCNT := "0001000"; -- Half of div by 16 mode.
+ elsif CDS = "10" then
+ CLK_DIVCNT := "0100000"; -- Half of div by 64 mode.
end if;
- elsif RXCLK = '0' then
- CLK_LOCK := false;
- STRB_LOCK := false;
CLK_STRB <= '0';
else
- CLK_STRB <= '0';
+ if CLK_DIVCNT > "0000000" and RXCLK = '1' and CLK_LOCK = false then
+ CLK_DIVCNT := CLK_DIVCNT - '1';
+ CLK_STRB <= '0';
+ CLK_LOCK := true;
+ elsif CDS = "01" and CLK_DIVCNT = "0000000" then
+ CLK_DIVCNT := "0010000"; -- Div by 16 mode.
+ --
+ if STRB_LOCK = false then
+ STRB_LOCK := true;
+ CLK_STRB <= '1';
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif CDS = "10" and CLK_DIVCNT = "0000000" then
+ CLK_DIVCNT := "1000000"; -- Div by 64 mode.
+ if STRB_LOCK = false then
+ STRB_LOCK := true;
+ CLK_STRB <= '1';
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif RXCLK = '0' then
+ CLK_LOCK := false;
+ STRB_LOCK := false;
+ CLK_STRB <= '0';
+ else
+ CLK_STRB <= '0';
+ end if;
end if;
end if;
end process CLKDIV;
DATAREG: process(RESETn, CLK)
begin
- if RESETn = '0' then
+ if RESETn = '0' or MCLR = '1' then
DATA_REG <= x"00";
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- DATA_REG <= x"00";
- elsif RCV_STATE = SYNC and WS(2) = '0' and RDRF = '0' then -- 7 bit data.
- -- Transfer from shift- to data register only if
- -- data register is empty (RDRF = '0').
- DATA_REG <= '0' & SHIFT_REG(7 downto 1);
- elsif RCV_STATE = SYNC and WS(2) = '1' and RDRF = '0' then -- 8 bit data.
- -- Transfer from shift- to data register only if
- -- data register is empty (RDRF = '0').
- DATA_REG <= SHIFT_REG;
+ else
+ if rising_edge(CLK) then
+ if RCV_STATE = SYNC and WS(2) = '0' and RDRF = '0' then -- 7 bit data.
+ -- Transfer from shift- to data register only if
+ -- data register is empty (RDRF = '0').
+ DATA_REG <= '0' & SHIFT_REG(7 downto 1);
+ elsif RCV_STATE = SYNC and WS(2) = '1' and RDRF = '0' then -- 8 bit data.
+ -- Transfer from shift- to data register only if
+ -- data register is empty (RDRF = '0').
+ DATA_REG <= SHIFT_REG;
+ end if;
end if;
end if;
end process DATAREG;
- DATA_OUT <= DATA_REG when CS = "011" and RWn = '1' and RS = '1' and E = '1' else (others => '0');
- DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '1' and E = '1' else '0';
+ DATA_OUT <= DATA_REG when CS = "011" and RWn = '1' and RS = '1' else (others => '0');
+ DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '1' else '0';
SHIFTREG: process(RESETn, CLK)
begin
- if RESETn = '0' then
- SHIFT_REG <= x"00";
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- SHIFT_REG <= x"00";
- elsif RCV_STATE = SAMPLE and CLK_STRB = '1' then
- SHIFT_REG <= RXDATA_S & SHIFT_REG(7 downto 1); -- Shift right.
+ if RESETn = '0' or MCLR = '1' then
+ SHIFT_REG <= x"00";
+ else
+ if rising_edge(CLK) then
+ if RCV_STATE = SAMPLE and CLK_STRB = '1' then
+ SHIFT_REG <= RXDATA_S & SHIFT_REG(7 downto 1); -- Shift right.
+ end if;
end if;
end if;
end process SHIFTREG;
- P_BITCNT: process
+ P_BITCNT: process(CLK)
begin
- wait until CLK = '1' and CLK' event;
- if RCV_STATE = SAMPLE and CLK_STRB = '1' then
- BITCNT <= BITCNT + '1';
- elsif RCV_STATE /= SAMPLE then
- BITCNT <= (others => '0');
+ if rising_edge(CLK) then
+ if RCV_STATE = SAMPLE and CLK_STRB = '1' then
+ BITCNT <= BITCNT + '1';
+ elsif RCV_STATE /= SAMPLE then
+ BITCNT <= (others => '0');
+ end if;
end if;
end process P_BITCNT;
@@ -224,84 +227,88 @@ begin
if RESETn = '0' then
FE_I := '0';
FE <= '0';
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- FE_I := '0';
- FE <= '0';
- elsif CLK_STRB = '1' then
- if RCV_STATE = STOP1 and RXDATA_S = '0' then
- FE_I := '1';
- elsif RCV_STATE = STOP2 and RXDATA_S = '0' then
- FE_I := '1';
- elsif RCV_STATE = STOP1 or RCV_STATE = STOP2 then
- FE_I := '0'; -- Error resets when correct data appears.
+ else
+ if rising_edge(CLK) then
+ if MCLR = '1' then
+ FE_I := '0';
+ FE <= '0';
+ elsif CLK_STRB = '1' then
+ if RCV_STATE = STOP1 and RXDATA_S = '0' then
+ FE_I := '1';
+ elsif RCV_STATE = STOP2 and RXDATA_S = '0' then
+ FE_I := '1';
+ elsif RCV_STATE = STOP1 or RCV_STATE = STOP2 then
+ FE_I := '0'; -- Error resets when correct data appears.
+ end if;
+ end if;
+ if RCV_STATE = SYNC then
+ FE <= FE_I; -- Update the FE every SYNC time.
end if;
- end if;
- if RCV_STATE = SYNC then
- FE <= FE_I; -- Update the FE every SYNC time.
end if;
end if;
end process FRAME_ERR;
OVERRUN: process(RESETn, CLK)
- variable OVR_I : bit;
+ variable OVR_I : bit;
variable FIRST_READ : boolean;
begin
- if RESETn = '0' then
- OVR_I := '0';
- OVR <= '0';
- FIRST_READ := false;
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
+ if rising_edge(CLK) then
+ if RESETn = '0' or MCLR = '1' then
OVR_I := '0';
OVR <= '0';
FIRST_READ := false;
- elsif CLK_STRB = '1' and RCV_STATE = STOP1 then
- -- Overrun appears if RDRF is '1' in this state.
- OVR_I := RDRF;
- end if;
- if CS = "011" and RWn = '1' and RS = '1' and E = '1' and OVR_I = '1' then
+ else
+ if CLK_STRB = '1' and RCV_STATE = STOP1 then
+ -- Overrun appears if RDRF is '1' in this state.
+ OVR_I := RDRF;
+ end if;
+ if CS = "011" and RWn = '1' and RS = '1' then
-- If an overrun was detected, the concerning flag is
-- set when the valid data word in the receiver data
-- register is read. Thereafter the RDRF flag is reset
-- and the overrun disappears (OVR_I goes low) after
-- a second read (in time) of the receiver data register.
- if FIRST_READ = false then
- OVR <= '1';
- FIRST_READ := true;
- else
- OVR <= '0';
- FIRST_READ := false;
- end if;
+ if FIRST_READ = false then
+ if OVR_I = '1' then
+ OVR <= '1';
+ OVR_I := '0';
+ FIRST_READ := true;
+ else
+ OVR <= '0';
+ end if;
+ end if;
+ else
+ FIRST_READ := false;
+ end if;
end if;
end if;
end process OVERRUN;
- PARITY_TEST: process(RESETn, CLK)
+ PARITY_TEST: process(RESETn,MCLR,CLK)
variable PAR_TMP : bit;
variable PE_I : bit;
begin
- if RESETn = '0' then
+ if RESETn = '0' or MCLR = '1' then
PE <= '0';
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- PE <= '0';
- elsif CLK_STRB = '1' then -- Sample parity on clock strobe.
- PE_I := '0'; -- Initialise.
- if RCV_STATE = PARITY then
- for i in 1 to 7 loop
- if i = 1 then
- PAR_TMP := SHIFT_REG(i-1) xor SHIFT_REG(i);
- else
- PAR_TMP := PAR_TMP xor SHIFT_REG(i);
- end if;
- end loop;
- if WS = "000" or WS = "010" or WS = "110" then -- Even parity.
- PE_I := PAR_TMP xor RXDATA_S;
- elsif WS = "001" or WS = "011" or WS = "111" then -- Odd parity.
- PE_I := not PAR_TMP xor RXDATA_S;
- else -- No parity for WS = "100" and WS = "101".
- PE_I := '0';
+ else
+ if rising_edge(CLK) then
+ if CLK_STRB = '1' then -- Sample parity on clock strobe.
+ PE_I := '0'; -- Initialise.
+ if RCV_STATE = PARITY then
+ for i in 1 to 7 loop
+ if i = 1 then
+ PAR_TMP := SHIFT_REG(i-1) xor SHIFT_REG(i);
+ else
+ PAR_TMP := PAR_TMP xor SHIFT_REG(i);
+ end if;
+ end loop;
+ if WS = "000" or WS = "010" or WS = "110" then -- Even parity.
+ PE_I := PAR_TMP xor RXDATA_S;
+ elsif WS = "001" or WS = "011" or WS = "111" then -- Odd parity.
+ PE_I := not PAR_TMP xor RXDATA_S;
+ else -- No parity for WS = "100" and WS = "101".
+ PE_I := '0';
+ end if;
end if;
end if;
end if;
@@ -311,7 +318,7 @@ begin
-- receiver data register.
if RCV_STATE = SYNC and RDRF = '0' then
PE <= PE_I;
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' then
+ elsif CS = "011" and RWn = '1' and RS = '1' then
PE <= '0'; -- Clear when reading the data register.
end if;
end if;
@@ -320,28 +327,31 @@ begin
P_RDRF: process(RESETn, CLK)
-- Receive data register full flag.
begin
- if RESETn = '0' then
- RDRF <= '0';
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- RDRF <= '0';
- elsif RCV_STATE = SYNC then
- RDRF <= '1'; -- Data register is full until now!
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' then
- RDRF <= '0'; -- After reading the data register ...
- end if;
- end if;
+ if rising_edge(CLK) then
+ if RESETn = '0' or MCLR = '1' then
+ RDRF <= '0';
+ else
+ if RCV_STATE = SYNC then
+ RDRF <= '1'; -- Data register is full until now!
+ end if;
+ if CS = "011" and RWn = '1' and RS = '1' then
+ RDRF <= '0'; -- when reading the data register ...
+ end if;
+ end if;
+ end if;
end process P_RDRF;
RCV_STATEREG: process(RESETn, CLK)
begin
if RESETn = '0' then
RCV_STATE <= IDLE;
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- RCV_STATE <= IDLE;
- else
- RCV_STATE <= RCV_NEXT_STATE;
+ else
+ if rising_edge(CLK) then
+ if MCLR = '1' then
+ RCV_STATE <= IDLE;
+ else
+ RCV_STATE <= RCV_NEXT_STATE;
+ end if;
end if;
end if;
end process RCV_STATEREG;
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd.bak b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd.bak
index e8c82b2..8877e05 100644
--- a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd.bak
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd.bak
@@ -19,7 +19,7 @@
---- ----
----------------------------------------------------------------------
---- ----
----- Copyright (C) 2006 Wolfgang Foerster ----
+---- Copyright (C) 2006 - 2008 Wolfgang Foerster ----
---- ----
---- This source file may be used and distributed without ----
---- restriction provided that this copyright statement is not ----
@@ -48,8 +48,10 @@
--
-- Revision 2K6A 2006/06/03 WF
-- Initial Release.
--- Revision 2K6B 2006/11/07 WF
+-- Revision 2K6B 2006/11/07 WF
-- Modified Source to compile with the Xilinx ISE.
+-- Revision 2K8A 2008/07/14 WF
+-- Minor changes.
--
library ieee;
@@ -58,7 +60,7 @@ use ieee.std_logic_unsigned.all;
entity WF6850IP_RECEIVE is
port (
- CLK : in bit;
+ CLK : in std_logic;
RESETn : in bit;
MCLR : in bit;
@@ -93,126 +95,127 @@ signal SHIFT_REG : bit_vector(7 downto 0);
signal CLK_STRB : bit;
signal BITCNT : std_logic_vector(2 downto 0);
begin
- P_SAMPLE: process
+ P_SAMPLE: process(CLK)
-- This filter provides a synchronisation to the system
-- clock, even for random baud rates of the received data
-- stream.
variable FLT_TMP : integer range 0 to 2;
begin
- wait until CLK = '1' and CLK' event;
- --
- RXDATA_I <= RXDATA;
- --
- if RXDATA_I = '1' and FLT_TMP < 2 then
- FLT_TMP := FLT_TMP + 1;
- elsif RXDATA_I = '1' then
- RXDATA_S <= '1';
- elsif RXDATA_I = '0' and FLT_TMP > 0 then
- FLT_TMP := FLT_TMP - 1;
- elsif RXDATA_I = '0' then
- RXDATA_S <= '0';
+ if rising_edge(CLK) then
+ --
+ RXDATA_I <= RXDATA;
+ --
+ if RXDATA_I = '1' and FLT_TMP < 2 then
+ FLT_TMP := FLT_TMP + 1;
+ elsif RXDATA_I = '1' then
+ RXDATA_S <= '1';
+ elsif RXDATA_I = '0' and FLT_TMP > 0 then
+ FLT_TMP := FLT_TMP - 1;
+ elsif RXDATA_I = '0' then
+ RXDATA_S <= '0';
+ end if;
end if;
end process P_SAMPLE;
- CLKDIV: process
+ CLKDIV: process(CLK)
variable CLK_LOCK : boolean;
variable STRB_LOCK : boolean;
variable CLK_DIVCNT : std_logic_vector(6 downto 0);
begin
- wait until CLK = '1' and CLK' event;
- if CDS = "00" then -- Divider off.
- if RXCLK = '1' and STRB_LOCK = false then
- CLK_STRB <= '1';
- STRB_LOCK := true;
- elsif RXCLK = '0' then
- CLK_STRB <= '0';
- STRB_LOCK := false;
- else
- CLK_STRB <= '0';
- end if;
- elsif RCV_STATE = IDLE then
- -- Preset the CLKDIV with the start delays.
- if CDS = "01" then
- CLK_DIVCNT := "0001000"; -- Half of div by 16 mode.
- elsif CDS = "10" then
- CLK_DIVCNT := "0100000"; -- Half of div by 64 mode.
- end if;
- CLK_STRB <= '0';
- else
- if CLK_DIVCNT > "0000000" and RXCLK = '1' and CLK_LOCK = false then
- CLK_DIVCNT := CLK_DIVCNT - '1';
- CLK_STRB <= '0';
- CLK_LOCK := true;
- elsif CDS = "01" and CLK_DIVCNT = "0000000" then
- CLK_DIVCNT := "0010000"; -- Div by 16 mode.
- --
- if STRB_LOCK = false then
- STRB_LOCK := true;
+ if rising_edge(CLK) then
+ if CDS = "00" then -- Divider off.
+ if RXCLK = '1' and STRB_LOCK = false then
CLK_STRB <= '1';
+ STRB_LOCK := true;
+ elsif RXCLK = '0' then
+ CLK_STRB <= '0';
+ STRB_LOCK := false;
else
CLK_STRB <= '0';
end if;
- elsif CDS = "10" and CLK_DIVCNT = "0000000" then
- CLK_DIVCNT := "1000000"; -- Div by 64 mode.
- if STRB_LOCK = false then
- STRB_LOCK := true;
- CLK_STRB <= '1';
- else
- CLK_STRB <= '0';
+ elsif RCV_STATE = IDLE then
+ -- Preset the CLKDIV with the start delays.
+ if CDS = "01" then
+ CLK_DIVCNT := "0001000"; -- Half of div by 16 mode.
+ elsif CDS = "10" then
+ CLK_DIVCNT := "0100000"; -- Half of div by 64 mode.
end if;
- elsif RXCLK = '0' then
- CLK_LOCK := false;
- STRB_LOCK := false;
CLK_STRB <= '0';
else
- CLK_STRB <= '0';
+ if CLK_DIVCNT > "0000000" and RXCLK = '1' and CLK_LOCK = false then
+ CLK_DIVCNT := CLK_DIVCNT - '1';
+ CLK_STRB <= '0';
+ CLK_LOCK := true;
+ elsif CDS = "01" and CLK_DIVCNT = "0000000" then
+ CLK_DIVCNT := "0010000"; -- Div by 16 mode.
+ --
+ if STRB_LOCK = false then
+ STRB_LOCK := true;
+ CLK_STRB <= '1';
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif CDS = "10" and CLK_DIVCNT = "0000000" then
+ CLK_DIVCNT := "1000000"; -- Div by 64 mode.
+ if STRB_LOCK = false then
+ STRB_LOCK := true;
+ CLK_STRB <= '1';
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif RXCLK = '0' then
+ CLK_LOCK := false;
+ STRB_LOCK := false;
+ CLK_STRB <= '0';
+ else
+ CLK_STRB <= '0';
+ end if;
end if;
end if;
end process CLKDIV;
DATAREG: process(RESETn, CLK)
begin
- if RESETn = '0' then
+ if RESETn = '0' or MCLR = '1' then
DATA_REG <= x"00";
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- DATA_REG <= x"00";
- elsif RCV_STATE = SYNC and WS(2) = '0' and RDRF = '0' then -- 7 bit data.
- -- Transfer from shift- to data register only if
- -- data register is empty (RDRF = '0').
- DATA_REG <= '0' & SHIFT_REG(7 downto 1);
- elsif RCV_STATE = SYNC and WS(2) = '1' and RDRF = '0' then -- 8 bit data.
- -- Transfer from shift- to data register only if
- -- data register is empty (RDRF = '0').
- DATA_REG <= SHIFT_REG;
+ else
+ if rising_edge(CLK) then
+ if RCV_STATE = SYNC and WS(2) = '0' and RDRF = '0' then -- 7 bit data.
+ -- Transfer from shift- to data register only if
+ -- data register is empty (RDRF = '0').
+ DATA_REG <= '0' & SHIFT_REG(7 downto 1);
+ elsif RCV_STATE = SYNC and WS(2) = '1' and RDRF = '0' then -- 8 bit data.
+ -- Transfer from shift- to data register only if
+ -- data register is empty (RDRF = '0').
+ DATA_REG <= SHIFT_REG;
+ end if;
end if;
end if;
end process DATAREG;
---DATA_OUT <= DATA_REG when CS = "011" and RWn = '1' and RS = '1' and E = '1' else (others => '0');
---DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '1' and E = '1' else '0';
-DATA_OUT <= DATA_REG when CS = "011" and RWn = '1' and RS = '1' else (others => '0');
-DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '1' else '0';
+ DATA_OUT <= DATA_REG when CS = "011" and RWn = '1' and RS = '1' else (others => '0');
+ DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '1' else '0';
SHIFTREG: process(RESETn, CLK)
begin
- if RESETn = '0' then
- SHIFT_REG <= x"00";
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- SHIFT_REG <= x"00";
- elsif RCV_STATE = SAMPLE and CLK_STRB = '1' then
- SHIFT_REG <= RXDATA_S & SHIFT_REG(7 downto 1); -- Shift right.
+ if RESETn = '0' or MCLR = '1' then
+ SHIFT_REG <= x"00";
+ else
+ if rising_edge(CLK) then
+ if RCV_STATE = SAMPLE and CLK_STRB = '1' then
+ SHIFT_REG <= RXDATA_S & SHIFT_REG(7 downto 1); -- Shift right.
+ end if;
end if;
end if;
end process SHIFTREG;
- P_BITCNT: process
+ P_BITCNT: process(CLK)
begin
- wait until CLK = '1' and CLK' event;
- if RCV_STATE = SAMPLE and CLK_STRB = '1' then
- BITCNT <= BITCNT + '1';
- elsif RCV_STATE /= SAMPLE then
- BITCNT <= (others => '0');
+ if rising_edge(CLK) then
+ if RCV_STATE = SAMPLE and CLK_STRB = '1' then
+ BITCNT <= BITCNT + '1';
+ elsif RCV_STATE /= SAMPLE then
+ BITCNT <= (others => '0');
+ end if;
end if;
end process P_BITCNT;
@@ -224,84 +227,88 @@ DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '1' else '0';
if RESETn = '0' then
FE_I := '0';
FE <= '0';
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- FE_I := '0';
- FE <= '0';
- elsif CLK_STRB = '1' then
- if RCV_STATE = STOP1 and RXDATA_S = '0' then
- FE_I := '1';
- elsif RCV_STATE = STOP2 and RXDATA_S = '0' then
- FE_I := '1';
- elsif RCV_STATE = STOP1 or RCV_STATE = STOP2 then
- FE_I := '0'; -- Error resets when correct data appears.
+ else
+ if rising_edge(CLK) then
+ if MCLR = '1' then
+ FE_I := '0';
+ FE <= '0';
+ elsif CLK_STRB = '1' then
+ if RCV_STATE = STOP1 and RXDATA_S = '0' then
+ FE_I := '1';
+ elsif RCV_STATE = STOP2 and RXDATA_S = '0' then
+ FE_I := '1';
+ elsif RCV_STATE = STOP1 or RCV_STATE = STOP2 then
+ FE_I := '0'; -- Error resets when correct data appears.
+ end if;
+ end if;
+ if RCV_STATE = SYNC then
+ FE <= FE_I; -- Update the FE every SYNC time.
end if;
- end if;
- if RCV_STATE = SYNC then
- FE <= FE_I; -- Update the FE every SYNC time.
end if;
end if;
end process FRAME_ERR;
OVERRUN: process(RESETn, CLK)
- variable OVR_I : bit;
+ variable OVR_I : bit;
variable FIRST_READ : boolean;
begin
- if RESETn = '0' then
- OVR_I := '0';
- OVR <= '0';
- FIRST_READ := false;
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
+ if rising_edge(CLK) then
+ if RESETn = '0' or MCLR = '1' then
OVR_I := '0';
OVR <= '0';
FIRST_READ := false;
- elsif CLK_STRB = '1' and RCV_STATE = STOP1 then
- -- Overrun appears if RDRF is '1' in this state.
- OVR_I := RDRF;
- end if;
- if CS = "011" and RWn = '1' and RS = '1' and E = '1' and OVR_I = '1' then
+ else
+ if CLK_STRB = '1' and RCV_STATE = STOP1 then
+ -- Overrun appears if RDRF is '1' in this state.
+ OVR_I := RDRF;
+ end if;
+ if CS = "011" and RWn = '1' and RS = '1' then
-- If an overrun was detected, the concerning flag is
-- set when the valid data word in the receiver data
-- register is read. Thereafter the RDRF flag is reset
-- and the overrun disappears (OVR_I goes low) after
-- a second read (in time) of the receiver data register.
- if FIRST_READ = false then
- OVR <= '1';
- FIRST_READ := true;
- else
- OVR <= '0';
- FIRST_READ := false;
- end if;
+ if FIRST_READ = false then
+ if OVR_I = '1' then
+ OVR <= '1';
+ OVR_I := '0';
+ FIRST_READ := true;
+ else
+ OVR <= '0';
+ end if;
+ end if;
+ else
+ FIRST_READ := false;
+ end if;
end if;
end if;
end process OVERRUN;
- PARITY_TEST: process(RESETn, CLK)
+ PARITY_TEST: process(RESETn,MCLR,CLK)
variable PAR_TMP : bit;
variable PE_I : bit;
begin
- if RESETn = '0' then
+ if RESETn = '0' or MCRL = '1' then
PE <= '0';
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- PE <= '0';
- elsif CLK_STRB = '1' then -- Sample parity on clock strobe.
- PE_I := '0'; -- Initialise.
- if RCV_STATE = PARITY then
- for i in 1 to 7 loop
- if i = 1 then
- PAR_TMP := SHIFT_REG(i-1) xor SHIFT_REG(i);
- else
- PAR_TMP := PAR_TMP xor SHIFT_REG(i);
- end if;
- end loop;
- if WS = "000" or WS = "010" or WS = "110" then -- Even parity.
- PE_I := PAR_TMP xor RXDATA_S;
- elsif WS = "001" or WS = "011" or WS = "111" then -- Odd parity.
- PE_I := not PAR_TMP xor RXDATA_S;
- else -- No parity for WS = "100" and WS = "101".
- PE_I := '0';
+ else
+ if rising_edge(CLK) then
+ if CLK_STRB = '1' then -- Sample parity on clock strobe.
+ PE_I := '0'; -- Initialise.
+ if RCV_STATE = PARITY then
+ for i in 1 to 7 loop
+ if i = 1 then
+ PAR_TMP := SHIFT_REG(i-1) xor SHIFT_REG(i);
+ else
+ PAR_TMP := PAR_TMP xor SHIFT_REG(i);
+ end if;
+ end loop;
+ if WS = "000" or WS = "010" or WS = "110" then -- Even parity.
+ PE_I := PAR_TMP xor RXDATA_S;
+ elsif WS = "001" or WS = "011" or WS = "111" then -- Odd parity.
+ PE_I := not PAR_TMP xor RXDATA_S;
+ else -- No parity for WS = "100" and WS = "101".
+ PE_I := '0';
+ end if;
end if;
end if;
end if;
@@ -311,7 +318,7 @@ DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '1' else '0';
-- receiver data register.
if RCV_STATE = SYNC and RDRF = '0' then
PE <= PE_I;
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' then
+ elsif CS = "011" and RWn = '1' and RS = '1' then
PE <= '0'; -- Clear when reading the data register.
end if;
end if;
@@ -320,28 +327,31 @@ DATA_EN <= '1' when CS = "011" and RWn = '1' and RS = '1' else '0';
P_RDRF: process(RESETn, CLK)
-- Receive data register full flag.
begin
- if RESETn = '0' then
- RDRF <= '0';
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- RDRF <= '0';
- elsif RCV_STATE = SYNC then
- RDRF <= '1'; -- Data register is full until now!
- elsif CS = "011" and RWn = '1' and RS = '1' and E = '1' then
- RDRF <= '0'; -- After reading the data register ...
- end if;
- end if;
+ if rising_edge(CLK) then
+ if RESETn = '0' or MCLR = '1' then
+ RDRF <= '0';
+ else
+ if RCV_STATE = SYNC then
+ RDRF <= '1'; -- Data register is full until now!
+ end if;
+ if CS = "011" and RWn = '1' and RS = '1' then
+ RDRF <= '0'; -- when reading the data register ...
+ end if;
+ end if;
+ end if;
end process P_RDRF;
RCV_STATEREG: process(RESETn, CLK)
begin
if RESETn = '0' then
RCV_STATE <= IDLE;
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- RCV_STATE <= IDLE;
- else
- RCV_STATE <= RCV_NEXT_STATE;
+ else
+ if rising_edge(CLK) then
+ if MCLR = '1' then
+ RCV_STATE <= IDLE;
+ else
+ RCV_STATE <= RCV_NEXT_STATE;
+ end if;
end if;
end if;
end process RCV_STATEREG;
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
index c8ae6fc..8a0a9fa 100644
--- a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
@@ -63,7 +63,7 @@ use ieee.std_logic_unsigned.all;
entity WF6850IP_TRANSMIT is
port (
- CLK : in bit;
+ CLK : in std_logic;
RESETn : in bit;
MCLR : in bit;
@@ -108,58 +108,59 @@ begin
'1' when TR_STATE = STOP1 else
'1' when TR_STATE = STOP2 else '1';
- CLKDIV: process
+ CLKDIV: process(CLK)
variable CLK_LOCK : boolean;
variable STRB_LOCK : boolean;
variable CLK_DIVCNT : std_logic_vector(6 downto 0);
begin
- wait until CLK = '1' and CLK' event;
- if CDS = "00" then -- divider off
- if TXCLK = '0' and STRB_LOCK = false then -- Works on negative TXCLK edge.
- CLK_STRB <= '1';
- STRB_LOCK := true;
- elsif TXCLK = '1' then
- CLK_STRB <= '0';
- STRB_LOCK := false;
- else
- CLK_STRB <= '0';
- end if;
- elsif TR_STATE = IDLE then
- -- preset the CLKDIV with the start delays
- if CDS = "01" then
- CLK_DIVCNT := "0010000"; -- div by 16 mode
- elsif CDS = "10" then
- CLK_DIVCNT := "1000000"; -- div by 64 mode
- end if;
- CLK_STRB <= '0';
- else
- -- Works on negative TXCLK edge:
- if CLK_DIVCNT > "0000000" and TXCLK = '0' and CLK_LOCK = false then
- CLK_DIVCNT := CLK_DIVCNT - '1';
- CLK_STRB <= '0';
- CLK_LOCK := true;
- elsif CDS = "01" and CLK_DIVCNT = "0000000" then
- CLK_DIVCNT := "0010000"; -- Div by 16 mode.
- if STRB_LOCK = false then
- STRB_LOCK := true;
+ if rising_edge(CLK) then
+ if CDS = "00" then -- divider off
+ if TXCLK = '0' and STRB_LOCK = false then -- Works on negative TXCLK edge.
CLK_STRB <= '1';
+ STRB_LOCK := true;
+ elsif TXCLK = '1' then
+ CLK_STRB <= '0';
+ STRB_LOCK := false;
else
CLK_STRB <= '0';
end if;
- elsif CDS = "10" and CLK_DIVCNT = "0000000" then
- CLK_DIVCNT := "1000000"; -- Div by 64 mode.
- if STRB_LOCK = false then
- STRB_LOCK := true;
- CLK_STRB <= '1';
- else
- CLK_STRB <= '0';
+ elsif TR_STATE = IDLE then
+ -- preset the CLKDIV with the start delays
+ if CDS = "01" then
+ CLK_DIVCNT := "0010000"; -- div by 16 mode
+ elsif CDS = "10" then
+ CLK_DIVCNT := "1000000"; -- div by 64 mode
end if;
- elsif TXCLK = '1' then
- CLK_LOCK := false;
- STRB_LOCK := false;
CLK_STRB <= '0';
else
- CLK_STRB <= '0';
+ -- Works on negative TXCLK edge:
+ if CLK_DIVCNT > "0000000" and TXCLK = '0' and CLK_LOCK = false then
+ CLK_DIVCNT := CLK_DIVCNT - '1';
+ CLK_STRB <= '0';
+ CLK_LOCK := true;
+ elsif CDS = "01" and CLK_DIVCNT = "0000000" then
+ CLK_DIVCNT := "0010000"; -- Div by 16 mode.
+ if STRB_LOCK = false then
+ STRB_LOCK := true;
+ CLK_STRB <= '1';
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif CDS = "10" and CLK_DIVCNT = "0000000" then
+ CLK_DIVCNT := "1000000"; -- Div by 64 mode.
+ if STRB_LOCK = false then
+ STRB_LOCK := true;
+ CLK_STRB <= '1';
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif TXCLK = '1' then
+ CLK_LOCK := false;
+ STRB_LOCK := false;
+ CLK_STRB <= '0';
+ else
+ CLK_STRB <= '0';
+ end if;
end if;
end if;
end process CLKDIV;
@@ -168,7 +169,7 @@ begin
begin
if RESETn = '0' then
DATA_REG <= x"00";
- elsif CLK = '1' and CLK' event then
+ elsif rising_edge(CLK) then
if MCLR = '1' then
DATA_REG <= x"00";
elsif WS(2) = '0' and CS = "011" and RWn = '0' and RS = '1' and E = '1' then
@@ -183,7 +184,7 @@ begin
begin
if RESETn = '0' then
SHIFT_REG <= x"00";
- elsif CLK = '1' and CLK' event then
+ elsif rising_edge(CLK) then
if MCLR = '1' then
SHIFT_REG <= x"00";
elsif TR_STATE = LOAD_SHFT and TDRE = '0' then
@@ -198,47 +199,42 @@ begin
end if;
end process SHIFTREG;
- P_BITCNT: process
+ P_BITCNT: process(CLK)
-- Counter for the data bits transmitted.
begin
- wait until CLK = '1' and CLK' event;
- if TR_STATE = SHIFTOUT and CLK_STRB = '1' then
- BITCNT <= BITCNT + '1';
- elsif TR_STATE /= SHIFTOUT then
- BITCNT <= "000";
+ if rising_edge(CLK) then
+ if TR_STATE = SHIFTOUT and CLK_STRB = '1' then
+ BITCNT <= BITCNT + '1';
+ elsif TR_STATE /= SHIFTOUT then
+ BITCNT <= "000";
+ end if;
end if;
end process P_BITCNT;
P_TDRE: process(RESETn, CLK)
-- Transmit data register empty flag.
- variable LOCK : boolean;
begin
- if RESETn = '0' then
- TDRE <= '1';
- LOCK := false;
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- TDRE <= '1';
- elsif TR_NEXT_STATE = START and TR_STATE /= START then
+ if rising_edge(CLK) then
+ if RESETn = '0' or MCLR = '1' then
+ TDRE <= '1';
+ else
+ if TR_NEXT_STATE = START and TR_STATE /= START then
-- Data has been loaded to shift register, thus data register is free again.
-- Thanks to Lyndon Amsdon for finding a bug here. The TDRE is set to one once
- -- entering the state now.
- TDRE <= '1';
- elsif CS = "011" and RWn = '0' and RS = '1' and E = '1' and LOCK = false then
- LOCK := true;
- elsif E = '0' and LOCK = true then
- -- This construction clears TDRE after the falling edge of E
- -- and after the transmit data register has been written to.
- TDRE <= '0';
- LOCK := false;
+ -- entering the state now.
+ TDRE <= '1';
+ end if;
+ if CS = "011" and RWn = '0' and RS = '1' then
+ TDRE <= '0';
+ end if;
end if;
end if;
end process P_TDRE;
- PARITY_GEN: process
+ PARITY_GEN: process(CLK)
variable PAR_TMP : bit;
begin
- wait until CLK = '1' and CLK' event;
+ if rising_edge(CLK) then
if TR_STATE = START then -- Calculate the parity during the start phase.
for i in 1 to 7 loop
if i = 1 then
@@ -254,6 +250,7 @@ begin
else -- No parity for WS = "100" and WS = "101".
PARITY_I <= '0';
end if;
+ end if;
end if;
end process PARITY_GEN;
@@ -261,11 +258,13 @@ begin
begin
if RESETn = '0' then
TR_STATE <= IDLE;
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- TR_STATE <= IDLE;
- else
- TR_STATE <= TR_NEXT_STATE;
+ else
+ if rising_edge(CLK) then
+ if MCLR = '1' then
+ TR_STATE <= IDLE;
+ else
+ TR_STATE <= TR_NEXT_STATE;
+ end if;
end if;
end if;
end process TR_STATEREG;
diff --git a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd.bak b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd.bak
index bcff094..d6953d5 100644
--- a/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd.bak
+++ b/FPGA_by_Fredi/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd.bak
@@ -63,7 +63,7 @@ use ieee.std_logic_unsigned.all;
entity WF6850IP_TRANSMIT is
port (
- CLK : in bit;
+ CLK : in std_logic;
RESETn : in bit;
MCLR : in bit;
@@ -113,53 +113,54 @@ begin
variable STRB_LOCK : boolean;
variable CLK_DIVCNT : std_logic_vector(6 downto 0);
begin
- wait until CLK = '1' and CLK' event;
- if CDS = "00" then -- divider off
- if TXCLK = '0' and STRB_LOCK = false then -- Works on negative TXCLK edge.
- CLK_STRB <= '1';
- STRB_LOCK := true;
- elsif TXCLK = '1' then
- CLK_STRB <= '0';
- STRB_LOCK := false;
- else
- CLK_STRB <= '0';
- end if;
- elsif TR_STATE = IDLE then
- -- preset the CLKDIV with the start delays
- if CDS = "01" then
- CLK_DIVCNT := "0010000"; -- div by 16 mode
- elsif CDS = "10" then
- CLK_DIVCNT := "1000000"; -- div by 64 mode
- end if;
- CLK_STRB <= '0';
- else
- -- Works on negative TXCLK edge:
- if CLK_DIVCNT > "0000000" and TXCLK = '0' and CLK_LOCK = false then
- CLK_DIVCNT := CLK_DIVCNT - '1';
- CLK_STRB <= '0';
- CLK_LOCK := true;
- elsif CDS = "01" and CLK_DIVCNT = "0000000" then
- CLK_DIVCNT := "0010000"; -- Div by 16 mode.
- if STRB_LOCK = false then
- STRB_LOCK := true;
+ if rising_edge(CLK) then
+ if CDS = "00" then -- divider off
+ if TXCLK = '0' and STRB_LOCK = false then -- Works on negative TXCLK edge.
CLK_STRB <= '1';
+ STRB_LOCK := true;
+ elsif TXCLK = '1' then
+ CLK_STRB <= '0';
+ STRB_LOCK := false;
else
CLK_STRB <= '0';
end if;
- elsif CDS = "10" and CLK_DIVCNT = "0000000" then
- CLK_DIVCNT := "1000000"; -- Div by 64 mode.
- if STRB_LOCK = false then
- STRB_LOCK := true;
- CLK_STRB <= '1';
- else
- CLK_STRB <= '0';
+ elsif TR_STATE = IDLE then
+ -- preset the CLKDIV with the start delays
+ if CDS = "01" then
+ CLK_DIVCNT := "0010000"; -- div by 16 mode
+ elsif CDS = "10" then
+ CLK_DIVCNT := "1000000"; -- div by 64 mode
end if;
- elsif TXCLK = '1' then
- CLK_LOCK := false;
- STRB_LOCK := false;
CLK_STRB <= '0';
else
- CLK_STRB <= '0';
+ -- Works on negative TXCLK edge:
+ if CLK_DIVCNT > "0000000" and TXCLK = '0' and CLK_LOCK = false then
+ CLK_DIVCNT := CLK_DIVCNT - '1';
+ CLK_STRB <= '0';
+ CLK_LOCK := true;
+ elsif CDS = "01" and CLK_DIVCNT = "0000000" then
+ CLK_DIVCNT := "0010000"; -- Div by 16 mode.
+ if STRB_LOCK = false then
+ STRB_LOCK := true;
+ CLK_STRB <= '1';
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif CDS = "10" and CLK_DIVCNT = "0000000" then
+ CLK_DIVCNT := "1000000"; -- Div by 64 mode.
+ if STRB_LOCK = false then
+ STRB_LOCK := true;
+ CLK_STRB <= '1';
+ else
+ CLK_STRB <= '0';
+ end if;
+ elsif TXCLK = '1' then
+ CLK_LOCK := false;
+ STRB_LOCK := false;
+ CLK_STRB <= '0';
+ else
+ CLK_STRB <= '0';
+ end if;
end if;
end if;
end process CLKDIV;
@@ -168,7 +169,7 @@ begin
begin
if RESETn = '0' then
DATA_REG <= x"00";
- elsif CLK = '1' and CLK' event then
+ elsif rising_edge(CLK) then
if MCLR = '1' then
DATA_REG <= x"00";
elsif WS(2) = '0' and CS = "011" and RWn = '0' and RS = '1' and E = '1' then
@@ -183,7 +184,7 @@ begin
begin
if RESETn = '0' then
SHIFT_REG <= x"00";
- elsif CLK = '1' and CLK' event then
+ elsif rising_edge(CLK) then
if MCLR = '1' then
SHIFT_REG <= x"00";
elsif TR_STATE = LOAD_SHFT and TDRE = '0' then
@@ -198,47 +199,42 @@ begin
end if;
end process SHIFTREG;
- P_BITCNT: process
+ P_BITCNT: process(CLK)
-- Counter for the data bits transmitted.
begin
- wait until CLK = '1' and CLK' event;
- if TR_STATE = SHIFTOUT and CLK_STRB = '1' then
- BITCNT <= BITCNT + '1';
- elsif TR_STATE /= SHIFTOUT then
- BITCNT <= "000";
+ if rising_edge(CLK) then
+ if TR_STATE = SHIFTOUT and CLK_STRB = '1' then
+ BITCNT <= BITCNT + '1';
+ elsif TR_STATE /= SHIFTOUT then
+ BITCNT <= "000";
+ end if;
end if;
end process P_BITCNT;
P_TDRE: process(RESETn, CLK)
-- Transmit data register empty flag.
- variable LOCK : boolean;
begin
- if RESETn = '0' then
- TDRE <= '1';
- LOCK := false;
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- TDRE <= '1';
- elsif TR_NEXT_STATE = START and TR_STATE /= START then
+ if rising_edge(CLK) then
+ if RESETn = '0' or MCLR = '1' then
+ TDRE <= '1';
+ else
+ if TR_NEXT_STATE = START and TR_STATE /= START then
-- Data has been loaded to shift register, thus data register is free again.
-- Thanks to Lyndon Amsdon for finding a bug here. The TDRE is set to one once
- -- entering the state now.
- TDRE <= '1';
- elsif CS = "011" and RWn = '0' and RS = '1' and E = '1' and LOCK = false then
- LOCK := true;
- elsif E = '0' and LOCK = true and CS /= "011" then
- -- This construction clears TDRE after the falling edge of E
- -- and after the transmit data register has been written to.
- TDRE <= '0';
- LOCK := false;
+ -- entering the state now.
+ TDRE <= '1';
+ end if;
+ if CS = "011" and RWn = '0' and RS = '1' then
+ TDRE <= '0';
+ end if;
end if;
end if;
end process P_TDRE;
- PARITY_GEN: process
+ PARITY_GEN: process(CLK)
variable PAR_TMP : bit;
begin
- wait until CLK = '1' and CLK' event;
+ if rising_edge(CLK) then
if TR_STATE = START then -- Calculate the parity during the start phase.
for i in 1 to 7 loop
if i = 1 then
@@ -254,6 +250,7 @@ begin
else -- No parity for WS = "100" and WS = "101".
PARITY_I <= '0';
end if;
+ end if;
end if;
end process PARITY_GEN;
@@ -261,11 +258,13 @@ begin
begin
if RESETn = '0' then
TR_STATE <= IDLE;
- elsif CLK = '1' and CLK' event then
- if MCLR = '1' then
- TR_STATE <= IDLE;
- else
- TR_STATE <= TR_NEXT_STATE;
+ else
+ if rising_edge(CLK) then
+ if MCLR = '1' then
+ TR_STATE <= IDLE;
+ else
+ TR_STATE <= TR_NEXT_STATE;
+ end if;
end if;
end if;
end process TR_STATEREG;
diff --git a/FPGA_by_Fredi/Interrupt_Handler/interrupt_handler.tdf b/FPGA_by_Fredi/Interrupt_Handler/interrupt_handler.tdf
index a455469..16de480 100644
--- a/FPGA_by_Fredi/Interrupt_Handler/interrupt_handler.tdf
+++ b/FPGA_by_Fredi/Interrupt_Handler/interrupt_handler.tdf
@@ -37,6 +37,7 @@ SUBDESIGN interrupt_handler
VSYNC : INPUT;
HSYNC : INPUT;
DMA_DRQ : INPUT;
+ nRSTO : INPUT;
nIRQ[7..2] : OUTPUT;
INT_HANDLER_TA : OUTPUT;
ACP_CONF[31..0] : OUTPUT;
@@ -56,6 +57,8 @@ VARIABLE
INT_IN[31..0] :NODE;
INT_ENA[31..0] :DFFE;
INT_ENA_CS :NODE;
+ INT_L[9..0] :DFF;
+ INT_LA[9..0][3..0] :DFF;
ACP_CONF[31..0] :DFFE;
ACP_CONF_CS :NODE;
PSEUDO_BUS_ERROR :NODE;
@@ -101,6 +104,7 @@ BEGIN
INT_CTR[7..0].ENA = INT_CTR_CS & FB_B3 & !nFB_WR;
-- INTERRUPT ENABLE REGISTER BIT31=INT7,30=INT6,29=INT5,28=INT4,27=INT3,26=INT2
INT_ENA[].CLK = MAIN_CLK;
+ INT_ENA[].CLRN = nRSTO;
INT_ENA_CS = !nFB_CS2 & FB_ADR[27..2]==H"4001"; -- $10004/4
INT_ENA[] = FB_AD[];
INT_ENA[31..24].ENA = INT_ENA_CS & FB_B0 & !nFB_WR;
@@ -120,15 +124,15 @@ BEGIN
!nIRQ2 = HSYNC & INT_ENA[26];
!nIRQ3 = INT_CTR0 & INT_ENA[27];
!nIRQ4 = VSYNC & INT_ENA[28];
- nIRQ5 = INT_LATCH[]==H"00000000" & INT_ENA[29];
+ !nIRQ5 = INT_LATCH[]!=H"00000000" & INT_ENA[29];
!nIRQ6 = !nMFP_INT & INT_ENA[30];
!nIRQ7 = PSEUDO_BUS_ERROR & INT_ENA[31];
PSEUDO_BUS_ERROR = !nFB_CS1 & (FB_ADR[19..4]==H"F8C8" -- SCC
# FB_ADR[19..4]==H"F8E0" -- VME
- # FB_ADR[19..4]==H"F920" -- PADDLE
- # FB_ADR[19..4]==H"F921" -- PADDLE
- # FB_ADR[19..4]==H"F922" -- PADDLE
+-- # FB_ADR[19..4]==H"F920" -- PADDLE
+-- # FB_ADR[19..4]==H"F921" -- PADDLE
+-- # FB_ADR[19..4]==H"F922" -- PADDLE
# FB_ADR[19..4]==H"FFA8" -- MFP2
# FB_ADR[19..4]==H"FFA9" -- MFP2
# FB_ADR[19..4]==H"FFAA" -- MFP2
@@ -136,27 +140,38 @@ PSEUDO_BUS_ERROR = !nFB_CS1 & (FB_ADR[19..4]==H"F8C8" -- SCC
# FB_ADR[19..8]==H"F87" -- TT SCSI
# FB_ADR[19..4]==H"FFC2" -- ST UHR
# FB_ADR[19..4]==H"FFC3" -- ST UHR
- # FB_ADR[19..4]==H"F890" -- DMA SOUND
- # FB_ADR[19..4]==H"F891" -- DMA SOUND
- # FB_ADR[19..4]==H"F892"); -- DMA SOUND
+-- # FB_ADR[19..4]==H"F890" -- DMA SOUND
+-- # FB_ADR[19..4]==H"F891" -- DMA SOUND
+-- # FB_ADR[19..4]==H"F892" -- DMA SOUND
+ );
-- IF VIDEO ADR CHANGE
TIN0 = !nFB_CS1 & FB_ADR[19..1]==H"7C100" & !nFB_WR; -- WRITE VIDEO BASE ADR HIGH 0xFFFF8201/2
-- INTERRUPT LATCH
- INT_LATCH[] = H"FFFFFFFF";
- INT_LATCH0.CLK = PIC_INT & INT_ENA[0];
- INT_LATCH1.CLK = E0_INT & INT_ENA[1];
- INT_LATCH2.CLK = DVI_INT & INT_ENA[2];
- INT_LATCH3.CLK = !nPCI_INTA & INT_ENA[3];
- INT_LATCH4.CLK = !nPCI_INTB & INT_ENA[4];
- INT_LATCH5.CLK = !nPCI_INTC & INT_ENA[5];
- INT_LATCH6.CLK = !nPCI_INTD & INT_ENA[6];
- INT_LATCH7.CLK = DSP_INT & INT_ENA[7];
- INT_LATCH8.CLK = VSYNC & INT_ENA[8];
- INT_LATCH9.CLK = HSYNC & INT_ENA[9];
+ INT_L[].CLK = MAIN_CLK;
+ INT_L[].CLRN = nRSTO;
+ INT_L0 = PIC_INT & INT_ENA[0];
+ INT_L1 = E0_INT & INT_ENA[1];
+ INT_L2 = DVI_INT & INT_ENA[2];
+ INT_L3 = !nPCI_INTA & INT_ENA[3];
+ INT_L4 = !nPCI_INTB & INT_ENA[4];
+ INT_L5 = !nPCI_INTC & INT_ENA[5];
+ INT_L6 = !nPCI_INTD & INT_ENA[6];
+ INT_L7 = DSP_INT & INT_ENA[7];
+ INT_L8 = VSYNC & INT_ENA[8];
+ INT_L9 = HSYNC & INT_ENA[9];
--- INTERRUPT CLEAR
- INT_LATCH[].CLRN = !INT_CLEAR[];
+ INT_LA[][].CLK = MAIN_CLK;
+ INT_LATCH[] = H"FFFFFFFF";
+ INT_LATCH[].CLRN = !INT_CLEAR[] & nRSTO;
+ FOR I IN 0 TO 9 GENERATE
+ INT_LA[I][].CLRN = INT_ENA[I] & nRSTO;
+ INT_LA[I][] = INT_LA[I][]+1 & INT_L[I] & INT_LA[I][]<7
+ # INT_LA[I][]-1 & !INT_L[I] & INT_LA[I][]>8
+ # 15 & INT_L[I] & INT_LA[I][]>6
+ # 0 & !INT_L[I] & INT_LA[I][]<9;
+ INT_LATCH[I].CLK = INT_LA[I][3];
+ END GENERATE;
-- INT_IN
INT_IN0 = PIC_INT;
@@ -206,125 +221,14 @@ TIN0 = !nFB_CS1 & FB_ADR[19..1]==H"7C100" & !nFB_WR; -- WRITE VIDEO BASE ADR H
WERTE[7..0][7] = FB_AD[23..16] & RTC_ADR[]==7 & UHR_DS & !nFB_WR;
WERTE[7..0][8] = FB_AD[23..16] & RTC_ADR[]==8 & UHR_DS & !nFB_WR;
WERTE[7..0][9] = FB_AD[23..16] & RTC_ADR[]==9 & UHR_DS & !nFB_WR;
- WERTE[7..0][10] = FB_AD[23..16];
- WERTE[7..0][11] = FB_AD[23..16];
- WERTE[7..0][12] = FB_AD[23..16];
- WERTE[7..0][13] = FB_AD[23..16];
- WERTE[7..0][14] = FB_AD[23..16];
- WERTE[7..0][15] = FB_AD[23..16];
- WERTE[7..0][16] = FB_AD[23..16];
- WERTE[7..0][17] = FB_AD[23..16];
- WERTE[7..0][18] = FB_AD[23..16];
- WERTE[7..0][19] = FB_AD[23..16];
- WERTE[7..0][20] = FB_AD[23..16];
- WERTE[7..0][21] = FB_AD[23..16];
- WERTE[7..0][22] = FB_AD[23..16];
- WERTE[7..0][23] = FB_AD[23..16];
- WERTE[7..0][24] = FB_AD[23..16];
- WERTE[7..0][25] = FB_AD[23..16];
- WERTE[7..0][26] = FB_AD[23..16];
- WERTE[7..0][27] = FB_AD[23..16];
- WERTE[7..0][28] = FB_AD[23..16];
- WERTE[7..0][29] = FB_AD[23..16];
- WERTE[7..0][30] = FB_AD[23..16];
- WERTE[7..0][31] = FB_AD[23..16];
- WERTE[7..0][32] = FB_AD[23..16];
- WERTE[7..0][33] = FB_AD[23..16];
- WERTE[7..0][34] = FB_AD[23..16];
- WERTE[7..0][35] = FB_AD[23..16];
- WERTE[7..0][36] = FB_AD[23..16];
- WERTE[7..0][37] = FB_AD[23..16];
- WERTE[7..0][38] = FB_AD[23..16];
- WERTE[7..0][39] = FB_AD[23..16];
- WERTE[7..0][40] = FB_AD[23..16];
- WERTE[7..0][41] = FB_AD[23..16];
- WERTE[7..0][42] = FB_AD[23..16];
- WERTE[7..0][43] = FB_AD[23..16];
- WERTE[7..0][44] = FB_AD[23..16];
- WERTE[7..0][45] = FB_AD[23..16];
- WERTE[7..0][46] = FB_AD[23..16];
- WERTE[7..0][47] = FB_AD[23..16];
- WERTE[7..0][48] = FB_AD[23..16];
- WERTE[7..0][49] = FB_AD[23..16];
- WERTE[7..0][50] = FB_AD[23..16];
- WERTE[7..0][51] = FB_AD[23..16];
- WERTE[7..0][52] = FB_AD[23..16];
- WERTE[7..0][53] = FB_AD[23..16];
- WERTE[7..0][54] = FB_AD[23..16];
- WERTE[7..0][55] = FB_AD[23..16];
- WERTE[7..0][56] = FB_AD[23..16];
- WERTE[7..0][57] = FB_AD[23..16];
- WERTE[7..0][58] = FB_AD[23..16];
- WERTE[7..0][59] = FB_AD[23..16];
- WERTE[7..0][60] = FB_AD[23..16];
- WERTE[7..0][61] = FB_AD[23..16];
- WERTE[7..0][62] = FB_AD[23..16];
- WERTE[7..0][63] = FB_AD[23..16];
- WERTE[][0].ENA = RTC_ADR[]==0 & UHR_DS & !nFB_WR;
- WERTE[][1].ENA = RTC_ADR[]==1 & UHR_DS & !nFB_WR;
- WERTE[][2].ENA = RTC_ADR[]==2 & UHR_DS & !nFB_WR;
- WERTE[][3].ENA = RTC_ADR[]==3 & UHR_DS & !nFB_WR;
- WERTE[][4].ENA = RTC_ADR[]==4 & UHR_DS & !nFB_WR;
- WERTE[][5].ENA = RTC_ADR[]==5 & UHR_DS & !nFB_WR;
- WERTE[][6].ENA = RTC_ADR[]==6 & UHR_DS & !nFB_WR;
- WERTE[][7].ENA = RTC_ADR[]==7 & UHR_DS & !nFB_WR;
- WERTE[][8].ENA = RTC_ADR[]==8 & UHR_DS & !nFB_WR;
- WERTE[][9].ENA = RTC_ADR[]==9 & UHR_DS & !nFB_WR;
- WERTE[][10].ENA = RTC_ADR[]==10 & UHR_DS & !nFB_WR;
- WERTE[][11].ENA = RTC_ADR[]==11 & UHR_DS & !nFB_WR;
- WERTE[][12].ENA = RTC_ADR[]==12 & UHR_DS & !nFB_WR;
- WERTE[][13].ENA = RTC_ADR[]==13 & UHR_DS & !nFB_WR;
- WERTE[][14].ENA = RTC_ADR[]==14 & UHR_DS & !nFB_WR;
- WERTE[][15].ENA = RTC_ADR[]==15 & UHR_DS & !nFB_WR;
- WERTE[][16].ENA = RTC_ADR[]==16 & UHR_DS & !nFB_WR;
- WERTE[][17].ENA = RTC_ADR[]==17 & UHR_DS & !nFB_WR;
- WERTE[][18].ENA = RTC_ADR[]==18 & UHR_DS & !nFB_WR;
- WERTE[][19].ENA = RTC_ADR[]==19 & UHR_DS & !nFB_WR;
- WERTE[][20].ENA = RTC_ADR[]==20 & UHR_DS & !nFB_WR;
- WERTE[][21].ENA = RTC_ADR[]==21 & UHR_DS & !nFB_WR;
- WERTE[][22].ENA = RTC_ADR[]==22 & UHR_DS & !nFB_WR;
- WERTE[][23].ENA = RTC_ADR[]==23 & UHR_DS & !nFB_WR;
- WERTE[][24].ENA = RTC_ADR[]==24 & UHR_DS & !nFB_WR;
- WERTE[][25].ENA = RTC_ADR[]==25 & UHR_DS & !nFB_WR;
- WERTE[][26].ENA = RTC_ADR[]==26 & UHR_DS & !nFB_WR;
- WERTE[][27].ENA = RTC_ADR[]==27 & UHR_DS & !nFB_WR;
- WERTE[][28].ENA = RTC_ADR[]==28 & UHR_DS & !nFB_WR;
- WERTE[][29].ENA = RTC_ADR[]==29 & UHR_DS & !nFB_WR;
- WERTE[][30].ENA = RTC_ADR[]==30 & UHR_DS & !nFB_WR;
- WERTE[][31].ENA = RTC_ADR[]==31 & UHR_DS & !nFB_WR;
- WERTE[][32].ENA = RTC_ADR[]==32 & UHR_DS & !nFB_WR;
- WERTE[][33].ENA = RTC_ADR[]==33 & UHR_DS & !nFB_WR;
- WERTE[][34].ENA = RTC_ADR[]==34 & UHR_DS & !nFB_WR;
- WERTE[][35].ENA = RTC_ADR[]==35 & UHR_DS & !nFB_WR;
- WERTE[][36].ENA = RTC_ADR[]==36 & UHR_DS & !nFB_WR;
- WERTE[][37].ENA = RTC_ADR[]==37 & UHR_DS & !nFB_WR;
- WERTE[][38].ENA = RTC_ADR[]==38 & UHR_DS & !nFB_WR;
- WERTE[][39].ENA = RTC_ADR[]==39 & UHR_DS & !nFB_WR;
- WERTE[][40].ENA = RTC_ADR[]==40 & UHR_DS & !nFB_WR;
- WERTE[][41].ENA = RTC_ADR[]==41 & UHR_DS & !nFB_WR;
- WERTE[][42].ENA = RTC_ADR[]==42 & UHR_DS & !nFB_WR;
- WERTE[][43].ENA = RTC_ADR[]==43 & UHR_DS & !nFB_WR;
- WERTE[][44].ENA = RTC_ADR[]==44 & UHR_DS & !nFB_WR;
- WERTE[][45].ENA = RTC_ADR[]==45 & UHR_DS & !nFB_WR;
- WERTE[][46].ENA = RTC_ADR[]==46 & UHR_DS & !nFB_WR;
- WERTE[][47].ENA = RTC_ADR[]==47 & UHR_DS & !nFB_WR;
- WERTE[][48].ENA = RTC_ADR[]==48 & UHR_DS & !nFB_WR;
- WERTE[][49].ENA = RTC_ADR[]==49 & UHR_DS & !nFB_WR;
- WERTE[][50].ENA = RTC_ADR[]==50 & UHR_DS & !nFB_WR;
- WERTE[][51].ENA = RTC_ADR[]==51 & UHR_DS & !nFB_WR;
- WERTE[][52].ENA = RTC_ADR[]==52 & UHR_DS & !nFB_WR;
- WERTE[][53].ENA = RTC_ADR[]==53 & UHR_DS & !nFB_WR;
- WERTE[][54].ENA = RTC_ADR[]==54 & UHR_DS & !nFB_WR;
- WERTE[][55].ENA = RTC_ADR[]==55 & UHR_DS & !nFB_WR;
- WERTE[][56].ENA = RTC_ADR[]==56 & UHR_DS & !nFB_WR;
- WERTE[][57].ENA = RTC_ADR[]==57 & UHR_DS & !nFB_WR;
- WERTE[][58].ENA = RTC_ADR[]==58 & UHR_DS & !nFB_WR;
- WERTE[][59].ENA = RTC_ADR[]==59 & UHR_DS & !nFB_WR;
- WERTE[][60].ENA = RTC_ADR[]==60 & UHR_DS & !nFB_WR;
- WERTE[][61].ENA = RTC_ADR[]==61 & UHR_DS & !nFB_WR;
- WERTE[][62].ENA = RTC_ADR[]==62 & UHR_DS & !nFB_WR;
- WERTE[][63].ENA = RTC_ADR[]==63 & UHR_DS & !nFB_WR;
- PIC_INT_SYNC[].CLK = MAIN_CLK; PIC_INT_SYNC[0] = PIC_INT;
+ FOR I IN 10 TO 63 GENERATE
+ WERTE[7..0][I] = FB_AD[23..16];
+ END GENERATE;
+ FOR I IN 0 TO 63 GENERATE
+ WERTE[][I].ENA = RTC_ADR[]==I & UHR_DS & !nFB_WR;
+ END GENERATE;
+ PIC_INT_SYNC[].CLK = MAIN_CLK;
+ PIC_INT_SYNC[0] = PIC_INT;
PIC_INT_SYNC[1] = PIC_INT_SYNC[0];
PIC_INT_SYNC[2] = !PIC_INT_SYNC[1] & PIC_INT_SYNC[0];
UPDATE_ON = !WERTE[7][11];
diff --git a/FPGA_by_Fredi/Interrupt_Handler/interrupt_handler.tdf.bak b/FPGA_by_Fredi/Interrupt_Handler/interrupt_handler.tdf.bak
index e3e49eb..459192d 100644
--- a/FPGA_by_Fredi/Interrupt_Handler/interrupt_handler.tdf.bak
+++ b/FPGA_by_Fredi/Interrupt_Handler/interrupt_handler.tdf.bak
@@ -37,6 +37,7 @@ SUBDESIGN interrupt_handler
VSYNC : INPUT;
HSYNC : INPUT;
DMA_DRQ : INPUT;
+ nRSTO : INPUT;
nIRQ[7..2] : OUTPUT;
INT_HANDLER_TA : OUTPUT;
ACP_CONF[31..0] : OUTPUT;
@@ -56,6 +57,8 @@ VARIABLE
INT_IN[31..0] :NODE;
INT_ENA[31..0] :DFFE;
INT_ENA_CS :NODE;
+ INT_L[9..0] :DFF;
+ INT_LA[9..0][3..0] :DFF;
ACP_CONF[31..0] :DFFE;
ACP_CONF_CS :NODE;
PSEUDO_BUS_ERROR :NODE;
@@ -101,6 +104,7 @@ BEGIN
INT_CTR[7..0].ENA = INT_CTR_CS & FB_B3 & !nFB_WR;
-- INTERRUPT ENABLE REGISTER BIT31=INT7,30=INT6,29=INT5,28=INT4,27=INT3,26=INT2
INT_ENA[].CLK = MAIN_CLK;
+ INT_ENA[].CLRN = nRSTO;
INT_ENA_CS = !nFB_CS2 & FB_ADR[27..2]==H"4001"; -- $10004/4
INT_ENA[] = FB_AD[];
INT_ENA[31..24].ENA = INT_ENA_CS & FB_B0 & !nFB_WR;
@@ -126,9 +130,9 @@ BEGIN
PSEUDO_BUS_ERROR = !nFB_CS1 & (FB_ADR[19..4]==H"F8C8" -- SCC
# FB_ADR[19..4]==H"F8E0" -- VME
- # FB_ADR[19..4]==H"F920" -- PADDLE
- # FB_ADR[19..4]==H"F921" -- PADDLE
- # FB_ADR[19..4]==H"F922" -- PADDLE
+-- # FB_ADR[19..4]==H"F920" -- PADDLE
+-- # FB_ADR[19..4]==H"F921" -- PADDLE
+-- # FB_ADR[19..4]==H"F922" -- PADDLE
# FB_ADR[19..4]==H"FFA8" -- MFP2
# FB_ADR[19..4]==H"FFA9" -- MFP2
# FB_ADR[19..4]==H"FFAA" -- MFP2
@@ -136,27 +140,38 @@ PSEUDO_BUS_ERROR = !nFB_CS1 & (FB_ADR[19..4]==H"F8C8" -- SCC
# FB_ADR[19..8]==H"F87" -- TT SCSI
# FB_ADR[19..4]==H"FFC2" -- ST UHR
# FB_ADR[19..4]==H"FFC3" -- ST UHR
- # FB_ADR[19..4]==H"F890" -- DMA SOUND
- # FB_ADR[19..4]==H"F891" -- DMA SOUND
- # FB_ADR[19..4]==H"F892"); -- DMA SOUND
+-- # FB_ADR[19..4]==H"F890" -- DMA SOUND
+-- # FB_ADR[19..4]==H"F891" -- DMA SOUND
+-- # FB_ADR[19..4]==H"F892" -- DMA SOUND
+ );
-- IF VIDEO ADR CHANGE
-TIN0 = !nFB_CS1 & FB_ADR[19..1]==H"7C100"; -- VIDEO BASE ADR HIGH 0xFFFF8201/2
+TIN0 = !nFB_CS1 & FB_ADR[19..1]==H"7C100" & !nFB_WR; -- WRITE VIDEO BASE ADR HIGH 0xFFFF8201/2
-- INTERRUPT LATCH
- INT_LATCH[] = H"FFFFFFFF";
- INT_LATCH0.CLK = PIC_INT & INT_ENA[0];
- INT_LATCH1.CLK = E0_INT & INT_ENA[1];
- INT_LATCH2.CLK = DVI_INT & INT_ENA[2];
- INT_LATCH3.CLK = !nPCI_INTA & INT_ENA[3];
- INT_LATCH4.CLK = !nPCI_INTB & INT_ENA[4];
- INT_LATCH5.CLK = !nPCI_INTC & INT_ENA[5];
- INT_LATCH6.CLK = !nPCI_INTD & INT_ENA[6];
- INT_LATCH7.CLK = DSP_INT & INT_ENA[7];
- INT_LATCH8.CLK = VSYNC & INT_ENA[8];
- INT_LATCH9.CLK = HSYNC & INT_ENA[9];
+ INT_L[].CLK = MAIN_CLK;
+ INT_L[].CLRN = nRSTO;
+ INT_L0 = PIC_INT & INT_ENA[0];
+ INT_L1 = E0_INT & INT_ENA[1];
+ INT_L2 = DVI_INT & INT_ENA[2];
+ INT_L3 = !nPCI_INTA & INT_ENA[3];
+ INT_L4 = !nPCI_INTB & INT_ENA[4];
+ INT_L5 = !nPCI_INTC & INT_ENA[5];
+ INT_L6 = !nPCI_INTD & INT_ENA[6];
+ INT_L7 = DSP_INT & INT_ENA[7];
+ INT_L8 = VSYNC & INT_ENA[8];
+ INT_L9 = HSYNC & INT_ENA[9];
--- INTERRUPT CLEAR
- INT_LATCH[].CLRN = !INT_CLEAR[];
+ INT_LA[][].CLK = MAIN_CLK;
+ INT_LATCH[] = H"FFFFFFFF";
+ INT_LATCH[].CLRN = !INT_CLEAR[] & nRSTO;
+ FOR I IN 0 TO 9 GENERATE
+ INT_LA[I][].CLRN = INT_ENA[I] & nRSTO;
+ INT_LA[I][] = INT_LA[I][]+1 & INT_L[I] & INT_LA[I][]<7
+ # INT_LA[I][]-1 & !INT_L[I] & INT_LA[I][]>8
+ # 15 & INT_L[I] & INT_LA[I][]>6
+ # 0 & !INT_L[I] & INT_LA[I][]<9;
+ INT_LATCH[I].CLK = INT_LA[I][3];
+ END GENERATE;
-- INT_IN
INT_IN0 = PIC_INT;
@@ -206,125 +221,14 @@ TIN0 = !nFB_CS1 & FB_ADR[19..1]==H"7C100"; -- VIDEO BASE ADR HIGH 0xFFFF8201/2
WERTE[7..0][7] = FB_AD[23..16] & RTC_ADR[]==7 & UHR_DS & !nFB_WR;
WERTE[7..0][8] = FB_AD[23..16] & RTC_ADR[]==8 & UHR_DS & !nFB_WR;
WERTE[7..0][9] = FB_AD[23..16] & RTC_ADR[]==9 & UHR_DS & !nFB_WR;
- WERTE[7..0][10] = FB_AD[23..16];
- WERTE[7..0][11] = FB_AD[23..16];
- WERTE[7..0][12] = FB_AD[23..16];
- WERTE[7..0][13] = FB_AD[23..16];
- WERTE[7..0][14] = FB_AD[23..16];
- WERTE[7..0][15] = FB_AD[23..16];
- WERTE[7..0][16] = FB_AD[23..16];
- WERTE[7..0][17] = FB_AD[23..16];
- WERTE[7..0][18] = FB_AD[23..16];
- WERTE[7..0][19] = FB_AD[23..16];
- WERTE[7..0][20] = FB_AD[23..16];
- WERTE[7..0][21] = FB_AD[23..16];
- WERTE[7..0][22] = FB_AD[23..16];
- WERTE[7..0][23] = FB_AD[23..16];
- WERTE[7..0][24] = FB_AD[23..16];
- WERTE[7..0][25] = FB_AD[23..16];
- WERTE[7..0][26] = FB_AD[23..16];
- WERTE[7..0][27] = FB_AD[23..16];
- WERTE[7..0][28] = FB_AD[23..16];
- WERTE[7..0][29] = FB_AD[23..16];
- WERTE[7..0][30] = FB_AD[23..16];
- WERTE[7..0][31] = FB_AD[23..16];
- WERTE[7..0][32] = FB_AD[23..16];
- WERTE[7..0][33] = FB_AD[23..16];
- WERTE[7..0][34] = FB_AD[23..16];
- WERTE[7..0][35] = FB_AD[23..16];
- WERTE[7..0][36] = FB_AD[23..16];
- WERTE[7..0][37] = FB_AD[23..16];
- WERTE[7..0][38] = FB_AD[23..16];
- WERTE[7..0][39] = FB_AD[23..16];
- WERTE[7..0][40] = FB_AD[23..16];
- WERTE[7..0][41] = FB_AD[23..16];
- WERTE[7..0][42] = FB_AD[23..16];
- WERTE[7..0][43] = FB_AD[23..16];
- WERTE[7..0][44] = FB_AD[23..16];
- WERTE[7..0][45] = FB_AD[23..16];
- WERTE[7..0][46] = FB_AD[23..16];
- WERTE[7..0][47] = FB_AD[23..16];
- WERTE[7..0][48] = FB_AD[23..16];
- WERTE[7..0][49] = FB_AD[23..16];
- WERTE[7..0][50] = FB_AD[23..16];
- WERTE[7..0][51] = FB_AD[23..16];
- WERTE[7..0][52] = FB_AD[23..16];
- WERTE[7..0][53] = FB_AD[23..16];
- WERTE[7..0][54] = FB_AD[23..16];
- WERTE[7..0][55] = FB_AD[23..16];
- WERTE[7..0][56] = FB_AD[23..16];
- WERTE[7..0][57] = FB_AD[23..16];
- WERTE[7..0][58] = FB_AD[23..16];
- WERTE[7..0][59] = FB_AD[23..16];
- WERTE[7..0][60] = FB_AD[23..16];
- WERTE[7..0][61] = FB_AD[23..16];
- WERTE[7..0][62] = FB_AD[23..16];
- WERTE[7..0][63] = FB_AD[23..16];
- WERTE[][0].ENA = RTC_ADR[]==0 & UHR_DS & !nFB_WR;
- WERTE[][1].ENA = RTC_ADR[]==1 & UHR_DS & !nFB_WR;
- WERTE[][2].ENA = RTC_ADR[]==2 & UHR_DS & !nFB_WR;
- WERTE[][3].ENA = RTC_ADR[]==3 & UHR_DS & !nFB_WR;
- WERTE[][4].ENA = RTC_ADR[]==4 & UHR_DS & !nFB_WR;
- WERTE[][5].ENA = RTC_ADR[]==5 & UHR_DS & !nFB_WR;
- WERTE[][6].ENA = RTC_ADR[]==6 & UHR_DS & !nFB_WR;
- WERTE[][7].ENA = RTC_ADR[]==7 & UHR_DS & !nFB_WR;
- WERTE[][8].ENA = RTC_ADR[]==8 & UHR_DS & !nFB_WR;
- WERTE[][9].ENA = RTC_ADR[]==9 & UHR_DS & !nFB_WR;
- WERTE[][10].ENA = RTC_ADR[]==10 & UHR_DS & !nFB_WR;
- WERTE[][11].ENA = RTC_ADR[]==11 & UHR_DS & !nFB_WR;
- WERTE[][12].ENA = RTC_ADR[]==12 & UHR_DS & !nFB_WR;
- WERTE[][13].ENA = RTC_ADR[]==13 & UHR_DS & !nFB_WR;
- WERTE[][14].ENA = RTC_ADR[]==14 & UHR_DS & !nFB_WR;
- WERTE[][15].ENA = RTC_ADR[]==15 & UHR_DS & !nFB_WR;
- WERTE[][16].ENA = RTC_ADR[]==16 & UHR_DS & !nFB_WR;
- WERTE[][17].ENA = RTC_ADR[]==17 & UHR_DS & !nFB_WR;
- WERTE[][18].ENA = RTC_ADR[]==18 & UHR_DS & !nFB_WR;
- WERTE[][19].ENA = RTC_ADR[]==19 & UHR_DS & !nFB_WR;
- WERTE[][20].ENA = RTC_ADR[]==20 & UHR_DS & !nFB_WR;
- WERTE[][21].ENA = RTC_ADR[]==21 & UHR_DS & !nFB_WR;
- WERTE[][22].ENA = RTC_ADR[]==22 & UHR_DS & !nFB_WR;
- WERTE[][23].ENA = RTC_ADR[]==23 & UHR_DS & !nFB_WR;
- WERTE[][24].ENA = RTC_ADR[]==24 & UHR_DS & !nFB_WR;
- WERTE[][25].ENA = RTC_ADR[]==25 & UHR_DS & !nFB_WR;
- WERTE[][26].ENA = RTC_ADR[]==26 & UHR_DS & !nFB_WR;
- WERTE[][27].ENA = RTC_ADR[]==27 & UHR_DS & !nFB_WR;
- WERTE[][28].ENA = RTC_ADR[]==28 & UHR_DS & !nFB_WR;
- WERTE[][29].ENA = RTC_ADR[]==29 & UHR_DS & !nFB_WR;
- WERTE[][30].ENA = RTC_ADR[]==30 & UHR_DS & !nFB_WR;
- WERTE[][31].ENA = RTC_ADR[]==31 & UHR_DS & !nFB_WR;
- WERTE[][32].ENA = RTC_ADR[]==32 & UHR_DS & !nFB_WR;
- WERTE[][33].ENA = RTC_ADR[]==33 & UHR_DS & !nFB_WR;
- WERTE[][34].ENA = RTC_ADR[]==34 & UHR_DS & !nFB_WR;
- WERTE[][35].ENA = RTC_ADR[]==35 & UHR_DS & !nFB_WR;
- WERTE[][36].ENA = RTC_ADR[]==36 & UHR_DS & !nFB_WR;
- WERTE[][37].ENA = RTC_ADR[]==37 & UHR_DS & !nFB_WR;
- WERTE[][38].ENA = RTC_ADR[]==38 & UHR_DS & !nFB_WR;
- WERTE[][39].ENA = RTC_ADR[]==39 & UHR_DS & !nFB_WR;
- WERTE[][40].ENA = RTC_ADR[]==40 & UHR_DS & !nFB_WR;
- WERTE[][41].ENA = RTC_ADR[]==41 & UHR_DS & !nFB_WR;
- WERTE[][42].ENA = RTC_ADR[]==42 & UHR_DS & !nFB_WR;
- WERTE[][43].ENA = RTC_ADR[]==43 & UHR_DS & !nFB_WR;
- WERTE[][44].ENA = RTC_ADR[]==44 & UHR_DS & !nFB_WR;
- WERTE[][45].ENA = RTC_ADR[]==45 & UHR_DS & !nFB_WR;
- WERTE[][46].ENA = RTC_ADR[]==46 & UHR_DS & !nFB_WR;
- WERTE[][47].ENA = RTC_ADR[]==47 & UHR_DS & !nFB_WR;
- WERTE[][48].ENA = RTC_ADR[]==48 & UHR_DS & !nFB_WR;
- WERTE[][49].ENA = RTC_ADR[]==49 & UHR_DS & !nFB_WR;
- WERTE[][50].ENA = RTC_ADR[]==50 & UHR_DS & !nFB_WR;
- WERTE[][51].ENA = RTC_ADR[]==51 & UHR_DS & !nFB_WR;
- WERTE[][52].ENA = RTC_ADR[]==52 & UHR_DS & !nFB_WR;
- WERTE[][53].ENA = RTC_ADR[]==53 & UHR_DS & !nFB_WR;
- WERTE[][54].ENA = RTC_ADR[]==54 & UHR_DS & !nFB_WR;
- WERTE[][55].ENA = RTC_ADR[]==55 & UHR_DS & !nFB_WR;
- WERTE[][56].ENA = RTC_ADR[]==56 & UHR_DS & !nFB_WR;
- WERTE[][57].ENA = RTC_ADR[]==57 & UHR_DS & !nFB_WR;
- WERTE[][58].ENA = RTC_ADR[]==58 & UHR_DS & !nFB_WR;
- WERTE[][59].ENA = RTC_ADR[]==59 & UHR_DS & !nFB_WR;
- WERTE[][60].ENA = RTC_ADR[]==60 & UHR_DS & !nFB_WR;
- WERTE[][61].ENA = RTC_ADR[]==61 & UHR_DS & !nFB_WR;
- WERTE[][62].ENA = RTC_ADR[]==62 & UHR_DS & !nFB_WR;
- WERTE[][63].ENA = RTC_ADR[]==63 & UHR_DS & !nFB_WR;
- PIC_INT_SYNC[].CLK = MAIN_CLK; PIC_INT_SYNC[0] = PIC_INT;
+ FOR I IN 10 TO 63 GENERATE
+ WERTE[7..0][I] = FB_AD[23..16];
+ END GENERATE;
+ FOR I IN 0 TO 63 GENERATE
+ WERTE[][I].ENA = RTC_ADR[]==I & UHR_DS & !nFB_WR;
+ END GENERATE;
+ PIC_INT_SYNC[].CLK = MAIN_CLK;
+ PIC_INT_SYNC[0] = PIC_INT;
PIC_INT_SYNC[1] = PIC_INT_SYNC[0];
PIC_INT_SYNC[2] = !PIC_INT_SYNC[1] & PIC_INT_SYNC[0];
UPDATE_ON = !WERTE[7][11];
diff --git a/FPGA_by_Fredi/PLLJ_PLLSPE_INFO.txt b/FPGA_by_Fredi/PLLJ_PLLSPE_INFO.txt
new file mode 100644
index 0000000..797d4f8
--- /dev/null
+++ b/FPGA_by_Fredi/PLLJ_PLLSPE_INFO.txt
@@ -0,0 +1,20 @@
+PLL_Name altpll1:inst|altpll:altpll_component|altpll_3vp2:auto_generated|pll1
+PLLJITTER 36
+PLLSPEmax 84
+PLLSPEmin -53
+
+PLL_Name altpll2:inst12|altpll:altpll_component|altpll_1r33:auto_generated|pll1
+PLLJITTER 43
+PLLSPEmax 84
+PLLSPEmin -53
+
+PLL_Name altpll3:inst13|altpll:altpll_component|altpll_aus2:auto_generated|pll1
+PLLJITTER NA
+PLLSPEmax 84
+PLLSPEmin -53
+
+PLL_Name altpll4:inst22|altpll:altpll_component|altpll_r4n2:auto_generated|pll1
+PLLJITTER 31
+PLLSPEmax 84
+PLLSPEmin -53
+
diff --git a/FPGA_by_Fredi/Video/BLITTER/BLITTER.vhd b/FPGA_by_Fredi/Video/BLITTER/BLITTER.vhd
deleted file mode 100644
index e09ed0b..0000000
--- a/FPGA_by_Fredi/Video/BLITTER/BLITTER.vhd
+++ /dev/null
@@ -1,75 +0,0 @@
--- WARNING: Do NOT edit the input and output ports in this file in a text
--- editor if you plan to continue editing the block that represents it in
--- the Block Editor! File corruption is VERY likely to occur.
-
--- Copyright (C) 1991-2008 Altera Corporation
--- Your use of Altera Corporation's design tools, logic functions
--- and other software and tools, and its AMPP partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Altera Program License
--- Subscription Agreement, Altera MegaCore Function License
--- Agreement, or other applicable license agreement, including,
--- without limitation, that your use is for the sole purpose of
--- programming logic devices manufactured by Altera and sold by
--- Altera or its authorized distributors. Please refer to the
--- applicable agreement for further details.
-
-
--- Generated by Quartus II Version 8.1 (Build Build 163 10/28/2008)
--- Created on Fri Oct 16 15:40:59 2009
-
-LIBRARY ieee;
-USE ieee.std_logic_1164.all;
-
-
--- Entity Declaration
-
-ENTITY BLITTER IS
- -- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
- PORT
- (
- nRSTO : IN STD_LOGIC;
- MAIN_CLK : IN STD_LOGIC;
- FB_ALE : IN STD_LOGIC;
- nFB_WR : IN STD_LOGIC;
- nFB_OE : IN STD_LOGIC;
- FB_SIZE0 : IN STD_LOGIC;
- FB_SIZE1 : IN STD_LOGIC;
- VIDEO_RAM_CTR : IN STD_LOGIC_VECTOR(15 downto 0);
- BLITTER_ON : IN STD_LOGIC;
- FB_ADR : IN STD_LOGIC_VECTOR(31 downto 0);
- nFB_CS1 : IN STD_LOGIC;
- nFB_CS2 : IN STD_LOGIC;
- nFB_CS3 : IN STD_LOGIC;
- DDRCLK0 : IN STD_LOGIC;
- BLITTER_DIN : IN STD_LOGIC_VECTOR(127 downto 0);
- BLITTER_DACK : IN STD_LOGIC_VECTOR(4 downto 0);
- BLITTER_RUN : OUT STD_LOGIC;
- BLITTER_DOUT : OUT STD_LOGIC_VECTOR(127 downto 0);
- BLITTER_ADR : OUT STD_LOGIC_VECTOR(31 downto 0);
- BLITTER_SIG : OUT STD_LOGIC;
- BLITTER_WR : OUT STD_LOGIC;
- BLITTER_TA : OUT STD_LOGIC;
- FB_AD : INOUT STD_LOGIC_VECTOR(31 downto 0)
- );
- -- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
-
-END BLITTER;
-
-
--- Architecture Body
-
-ARCHITECTURE BLITTER_architecture OF BLITTER IS
-
-
-BEGIN
- BLITTER_RUN <= '0';
- BLITTER_DOUT <= x"FEDCBA9876543210F0F0F0F0F0F0F0F0";
- BLITTER_ADR <= x"76543210";
- BLITTER_SIG <= '0';
- BLITTER_WR <= '0';
- BLITTER_TA <= '0';
-
-END BLITTER_architecture;
diff --git a/FPGA_by_Fredi/Video/BLITTER/BLITTER.vhd.bak b/FPGA_by_Fredi/Video/BLITTER/BLITTER.vhd.bak
deleted file mode 100644
index f674080..0000000
--- a/FPGA_by_Fredi/Video/BLITTER/BLITTER.vhd.bak
+++ /dev/null
@@ -1,75 +0,0 @@
--- WARNING: Do NOT edit the input and output ports in this file in a text
--- editor if you plan to continue editing the block that represents it in
--- the Block Editor! File corruption is VERY likely to occur.
-
--- Copyright (C) 1991-2008 Altera Corporation
--- Your use of Altera Corporation's design tools, logic functions
--- and other software and tools, and its AMPP partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Altera Program License
--- Subscription Agreement, Altera MegaCore Function License
--- Agreement, or other applicable license agreement, including,
--- without limitation, that your use is for the sole purpose of
--- programming logic devices manufactured by Altera and sold by
--- Altera or its authorized distributors. Please refer to the
--- applicable agreement for further details.
-
-
--- Generated by Quartus II Version 8.1 (Build Build 163 10/28/2008)
--- Created on Fri Oct 16 15:40:59 2009
-
-LIBRARY ieee;
-USE ieee.std_logic_1164.all;
-
-
--- Entity Declaration
-
-ENTITY BLITTER IS
- -- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
- PORT
- (
- nRSTO : IN STD_LOGIC;
- MAIN_CLK : IN STD_LOGIC;
- FB_ALE : IN STD_LOGIC;
- nFB_WR : IN STD_LOGIC;
- nFB_OE : IN STD_LOGIC;
- FB_SIZE0 : IN STD_LOGIC;
- FB_SIZE1 : IN STD_LOGIC;
- VIDEO_RAM_CTR : IN STD_LOGIC_VECTOR(15 downto 0);
- BLITTER_ON : IN STD_LOGIC;
- FB_ADR : IN STD_LOGIC_VECTOR(31 downto 0);
- nFB_CS1 : IN STD_LOGIC;
- nFB_CS2 : IN STD_LOGIC;
- nFB_CS3 : IN STD_LOGIC;
- DDRCLK0 : IN STD_LOGIC;
- BLITTER_DIN : IN STD_LOGIC_VECTOR(127 downto 0);
- BLITTER_DACK : IN STD_LOGIC_VECTOR(4 downto 0);
- BLITTER_RUN : OUT STD_LOGIC;
- BLITTER_DOUT : OUT STD_LOGIC_VECTOR(127 downto 0);
- BLITTER_ADR : OUT STD_LOGIC_VECTOR(31 downto 0);
- BLITTER_SIG : OUT STD_LOGIC;
- BLITTER_WR : OUT STD_LOGIC;
- BLITTER_TA : OUT STD_LOGIC;
- FB_AD : INOUT STD_LOGIC_VECTOR(31 downto 0)
- );
- -- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
-
-END BLITTER;
-
-
--- Architecture Body
-
-ARCHITECTURE BLITTER_architecture OF BLITTER IS
-
-
-BEGIN
- BLITTER_RUN <= '0';
- BLITTER_DOUT <= x"FEDCBA9876543210F0F0F0F0F0F0F0F0";
- BLITTER_ADR <= x"FEDCBA9876543210";
- BLITTER_SIG <= '0';
- BLITTER_WR <= '0';
- BLITTER_TA <= '0';
-
-END BLITTER_architecture;
diff --git a/FPGA_by_Fredi/Video/BLITTER/altsyncram0.bsf b/FPGA_by_Fredi/Video/BLITTER/altsyncram0.bsf
new file mode 100644
index 0000000..b0acfb7
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/altsyncram0.bsf
@@ -0,0 +1,110 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 1991-2010 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Altera Program License
+Subscription Agreement, Altera MegaCore Function License
+Agreement, or other applicable license agreement, including,
+without limitation, that your use is for the sole purpose of
+programming logic devices manufactured by Altera and sold by
+Altera or its authorized distributors. Please refer to the
+applicable agreement for further details.
+*/
+(header "symbol" (version "1.1"))
+(symbol
+ (rect 0 0 256 128)
+ (text "altsyncram0" (rect 84 2 187 21)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 109 31 124)(font "Arial" ))
+ (port
+ (pt 0 32)
+ (input)
+ (text "data[15..0]" (rect 0 0 73 16)(font "Arial" (font_size 8)))
+ (text "data[15..0]" (rect 4 16 66 32)(font "Arial" (font_size 8)))
+ (line (pt 0 32)(pt 112 32)(line_width 3))
+ )
+ (port
+ (pt 0 48)
+ (input)
+ (text "address[3..0]" (rect 0 0 89 16)(font "Arial" (font_size 8)))
+ (text "address[3..0]" (rect 4 32 80 48)(font "Arial" (font_size 8)))
+ (line (pt 0 48)(pt 112 48)(line_width 3))
+ )
+ (port
+ (pt 0 64)
+ (input)
+ (text "wren" (rect 0 0 31 16)(font "Arial" (font_size 8)))
+ (text "wren" (rect 4 48 31 64)(font "Arial" (font_size 8)))
+ (line (pt 0 64)(pt 112 64)(line_width 1))
+ )
+ (port
+ (pt 0 88)
+ (input)
+ (text "byteena_a[1..0]" (rect 0 0 106 16)(font "Arial" (font_size 8)))
+ (text "byteena_a[1..0]" (rect 4 72 94 88)(font "Arial" (font_size 8)))
+ (line (pt 0 88)(pt 112 88)(line_width 3))
+ )
+ (port
+ (pt 0 104)
+ (input)
+ (text "clock" (rect 0 0 36 16)(font "Arial" (font_size 8)))
+ (text "clock" (rect 4 88 35 104)(font "Arial" (font_size 8)))
+ (line (pt 0 104)(pt 104 104)(line_width 1))
+ )
+ (port
+ (pt 256 32)
+ (output)
+ (text "q[15..0]" (rect 0 0 51 16)(font "Arial" (font_size 8)))
+ (text "q[15..0]" (rect 209 16 253 32)(font "Arial" (font_size 8)))
+ (line (pt 256 32)(pt 168 32)(line_width 3))
+ )
+ (drawing
+ (text "16 Word(s)" (rect 133 35 147 90)(font "Arial" )(vertical))
+ (text "RAM" (rect 149 49 163 72)(font "Arial" )(vertical))
+ (text "Block Type: AUTO" (rect 41 106 129 120)(font "Arial" ))
+ (line (pt 128 24)(pt 168 24)(line_width 1))
+ (line (pt 168 24)(pt 168 96)(line_width 1))
+ (line (pt 168 96)(pt 128 96)(line_width 1))
+ (line (pt 128 96)(pt 128 24)(line_width 1))
+ (line (pt 112 27)(pt 120 27)(line_width 1))
+ (line (pt 120 27)(pt 120 39)(line_width 1))
+ (line (pt 120 39)(pt 112 39)(line_width 1))
+ (line (pt 112 39)(pt 112 27)(line_width 1))
+ (line (pt 112 34)(pt 114 36)(line_width 1))
+ (line (pt 114 36)(pt 112 38)(line_width 1))
+ (line (pt 104 36)(pt 112 36)(line_width 1))
+ (line (pt 120 32)(pt 128 32)(line_width 3))
+ (line (pt 112 43)(pt 120 43)(line_width 1))
+ (line (pt 120 43)(pt 120 55)(line_width 1))
+ (line (pt 120 55)(pt 112 55)(line_width 1))
+ (line (pt 112 55)(pt 112 43)(line_width 1))
+ (line (pt 112 50)(pt 114 52)(line_width 1))
+ (line (pt 114 52)(pt 112 54)(line_width 1))
+ (line (pt 104 52)(pt 112 52)(line_width 1))
+ (line (pt 120 48)(pt 128 48)(line_width 3))
+ (line (pt 112 59)(pt 120 59)(line_width 1))
+ (line (pt 120 59)(pt 120 71)(line_width 1))
+ (line (pt 120 71)(pt 112 71)(line_width 1))
+ (line (pt 112 71)(pt 112 59)(line_width 1))
+ (line (pt 112 66)(pt 114 68)(line_width 1))
+ (line (pt 114 68)(pt 112 70)(line_width 1))
+ (line (pt 104 68)(pt 112 68)(line_width 1))
+ (line (pt 120 64)(pt 128 64)(line_width 1))
+ (line (pt 112 83)(pt 120 83)(line_width 1))
+ (line (pt 120 83)(pt 120 95)(line_width 1))
+ (line (pt 120 95)(pt 112 95)(line_width 1))
+ (line (pt 112 95)(pt 112 83)(line_width 1))
+ (line (pt 112 90)(pt 114 92)(line_width 1))
+ (line (pt 114 92)(pt 112 94)(line_width 1))
+ (line (pt 104 92)(pt 112 92)(line_width 1))
+ (line (pt 120 88)(pt 128 88)(line_width 3))
+ (line (pt 104 36)(pt 104 105)(line_width 1))
+ )
+)
diff --git a/FPGA_by_Fredi/Video/BLITTER/altsyncram0.cmp b/FPGA_by_Fredi/Video/BLITTER/altsyncram0.cmp
new file mode 100644
index 0000000..d0a0d93
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/altsyncram0.cmp
@@ -0,0 +1,26 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+component altsyncram0
+ PORT
+ (
+ address : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
+ byteena_a : IN STD_LOGIC_VECTOR (1 DOWNTO 0) := (OTHERS => '1');
+ clock : IN STD_LOGIC := '1';
+ data : IN STD_LOGIC_VECTOR (15 DOWNTO 0);
+ wren : IN STD_LOGIC := '0';
+ q : OUT STD_LOGIC_VECTOR (15 DOWNTO 0)
+ );
+end component;
diff --git a/FPGA_by_Fredi/Video/BLITTER/altsyncram0.inc b/FPGA_by_Fredi/Video/BLITTER/altsyncram0.inc
new file mode 100644
index 0000000..f3eee7b
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/altsyncram0.inc
@@ -0,0 +1,27 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+FUNCTION altsyncram0
+(
+ address[3..0],
+ byteena_a[1..0],
+ clock,
+ data[15..0],
+ wren
+)
+
+RETURNS (
+ q[15..0]
+);
diff --git a/FPGA_by_Fredi/Video/BLITTER/altsyncram0.qip b/FPGA_by_Fredi/Video/BLITTER/altsyncram0.qip
new file mode 100644
index 0000000..c42bd21
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/altsyncram0.qip
@@ -0,0 +1,6 @@
+set_global_assignment -name IP_TOOL_NAME "ALTSYNCRAM"
+set_global_assignment -name IP_TOOL_VERSION "9.1"
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "altsyncram0.tdf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "altsyncram0.bsf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "altsyncram0.inc"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "altsyncram0.cmp"]
diff --git a/FPGA_by_Fredi/Video/BLITTER/altsyncram0.tdf b/FPGA_by_Fredi/Video/BLITTER/altsyncram0.tdf
new file mode 100644
index 0000000..f260092
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/altsyncram0.tdf
@@ -0,0 +1,181 @@
+-- megafunction wizard: %ALTSYNCRAM%
+-- GENERATION: STANDARD
+-- VERSION: WM1.0
+-- MODULE: altsyncram
+
+-- ============================================================
+-- File Name: altsyncram0.tdf
+-- Megafunction Name(s):
+-- altsyncram
+--
+-- Simulation Library Files(s):
+-- altera_mf
+-- ============================================================
+-- ************************************************************
+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+--
+-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
+-- ************************************************************
+
+
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+INCLUDE "altsyncram.inc";
+
+
+
+SUBDESIGN altsyncram0
+(
+ address[3..0] : INPUT;
+ byteena_a[1..0] : INPUT = VCC;
+ clock : INPUT = VCC;
+ data[15..0] : INPUT;
+ wren : INPUT = GND;
+ q[15..0] : OUTPUT;
+)
+
+VARIABLE
+
+ altsyncram_component : altsyncram WITH (
+ BYTE_SIZE = 8,
+ CLOCK_ENABLE_INPUT_A = "BYPASS",
+ CLOCK_ENABLE_OUTPUT_A = "BYPASS",
+ INTENDED_DEVICE_FAMILY = "Cyclone III",
+ LPM_HINT = "ENABLE_RUNTIME_MOD=NO",
+ LPM_TYPE = "altsyncram",
+ NUMWORDS_A = 16,
+ OPERATION_MODE = "SINGLE_PORT",
+ OUTDATA_ACLR_A = "NONE",
+ OUTDATA_REG_A = "UNREGISTERED",
+ POWER_UP_UNINITIALIZED = "FALSE",
+ READ_DURING_WRITE_MODE_PORT_A = "NEW_DATA_WITH_NBE_READ",
+ READ_DURING_WRITE_MODE_PORT_B = "NEW_DATA_WITH_NBE_READ",
+ WIDTHAD_A = 4,
+ WIDTH_A = 16,
+ WIDTH_BYTEENA_A = 2
+ );
+
+BEGIN
+
+ q[15..0] = altsyncram_component.q_a[15..0];
+ altsyncram_component.wren_a = wren;
+ altsyncram_component.clock0 = clock;
+ altsyncram_component.byteena_a[1..0] = byteena_a[1..0];
+ altsyncram_component.address_a[3..0] = address[3..0];
+ altsyncram_component.data_a[15..0] = data[15..0];
+END;
+
+
+
+-- ============================================================
+-- CNX file retrieval info
+-- ============================================================
+-- Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0"
+-- Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC "0"
+-- Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC "0"
+-- Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC "0"
+-- Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC "1"
+-- Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC "0"
+-- Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8"
+-- Retrieval info: PRIVATE: BlankMemory NUMERIC "1"
+-- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
+-- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC "0"
+-- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
+-- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC "0"
+-- Retrieval info: PRIVATE: CLRdata NUMERIC "0"
+-- Retrieval info: PRIVATE: CLRq NUMERIC "0"
+-- Retrieval info: PRIVATE: CLRrdaddress NUMERIC "0"
+-- Retrieval info: PRIVATE: CLRrren NUMERIC "0"
+-- Retrieval info: PRIVATE: CLRwraddress NUMERIC "0"
+-- Retrieval info: PRIVATE: CLRwren NUMERIC "0"
+-- Retrieval info: PRIVATE: Clock NUMERIC "0"
+-- Retrieval info: PRIVATE: Clock_A NUMERIC "0"
+-- Retrieval info: PRIVATE: Clock_B NUMERIC "0"
+-- Retrieval info: PRIVATE: ECC NUMERIC "0"
+-- Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0"
+-- Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC "0"
+-- Retrieval info: PRIVATE: INDATA_REG_B NUMERIC "0"
+-- Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A"
+-- Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0"
+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0"
+-- Retrieval info: PRIVATE: JTAG_ID STRING "NONE"
+-- Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
+-- Retrieval info: PRIVATE: MEMSIZE NUMERIC "256"
+-- Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC "0"
+-- Retrieval info: PRIVATE: MIFfilename STRING ""
+-- Retrieval info: PRIVATE: OPERATION_MODE NUMERIC "1"
+-- Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC "0"
+-- Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC "1"
+-- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
+-- Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC "2"
+-- Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC "4"
+-- Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC "4"
+-- Retrieval info: PRIVATE: REGdata NUMERIC "1"
+-- Retrieval info: PRIVATE: REGq NUMERIC "0"
+-- Retrieval info: PRIVATE: REGrdaddress NUMERIC "1"
+-- Retrieval info: PRIVATE: REGrren NUMERIC "1"
+-- Retrieval info: PRIVATE: REGwraddress NUMERIC "1"
+-- Retrieval info: PRIVATE: REGwren NUMERIC "1"
+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+-- Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC "0"
+-- Retrieval info: PRIVATE: UseDPRAM NUMERIC "1"
+-- Retrieval info: PRIVATE: VarWidth NUMERIC "0"
+-- Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC "16"
+-- Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC "16"
+-- Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC "16"
+-- Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC "16"
+-- Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC "0"
+-- Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC "0"
+-- Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC "0"
+-- Retrieval info: PRIVATE: enable NUMERIC "0"
+-- Retrieval info: PRIVATE: rden NUMERIC "0"
+-- Retrieval info: CONSTANT: BYTE_SIZE NUMERIC "8"
+-- Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
+-- Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS"
+-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO"
+-- Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
+-- Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "16"
+-- Retrieval info: CONSTANT: OPERATION_MODE STRING "SINGLE_PORT"
+-- Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE"
+-- Retrieval info: CONSTANT: OUTDATA_REG_A STRING "UNREGISTERED"
+-- Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING "FALSE"
+-- Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING "NEW_DATA_WITH_NBE_READ"
+-- Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_B STRING "NEW_DATA_WITH_NBE_READ"
+-- Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "4"
+-- Retrieval info: CONSTANT: WIDTH_A NUMERIC "16"
+-- Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "2"
+-- Retrieval info: USED_PORT: address 0 0 4 0 INPUT NODEFVAL address[3..0]
+-- Retrieval info: USED_PORT: byteena_a 0 0 2 0 INPUT VCC byteena_a[1..0]
+-- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC clock
+-- Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0]
+-- Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0]
+-- Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND wren
+-- Retrieval info: CONNECT: @data_a 0 0 16 0 data 0 0 16 0
+-- Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0
+-- Retrieval info: CONNECT: q 0 0 16 0 @q_a 0 0 16 0
+-- Retrieval info: CONNECT: @address_a 0 0 4 0 address 0 0 4 0
+-- Retrieval info: CONNECT: @byteena_a 0 0 2 0 byteena_a 0 0 2 0
+-- Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0
+-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0.tdf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0.inc TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0.cmp TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0.bsf TRUE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0_inst.tdf FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0_waveforms.html TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0_wave*.jpg FALSE
+-- Retrieval info: LIB_FILE: altera_mf
diff --git a/FPGA_by_Fredi/Video/BLITTER/altsyncram0_wave0.jpg b/FPGA_by_Fredi/Video/BLITTER/altsyncram0_wave0.jpg
new file mode 100644
index 0000000..84314f4
Binary files /dev/null and b/FPGA_by_Fredi/Video/BLITTER/altsyncram0_wave0.jpg differ
diff --git a/FPGA_by_Fredi/Video/BLITTER/altsyncram0_waveforms.html b/FPGA_by_Fredi/Video/BLITTER/altsyncram0_waveforms.html
new file mode 100644
index 0000000..7b89eb9
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/altsyncram0_waveforms.html
@@ -0,0 +1,13 @@
+
+
+Sample Waveforms for "altsyncram0.tdf"
+
+
+Sample behavioral waveforms for design file "altsyncram0.tdf"
+The following waveforms show the behavior of altsyncram megafunction for the chosen set of parameters in design "altsyncram0.tdf". For the purpose of this simulation, the contents of the memory at the start of the sample waveforms is assumed to be ( FFF0, FFF1, FFF2, FFF3, ...). The design "altsyncram0.tdf" has
+
+Fig. 1 : Wave showing read operation.
+The above waveform shows the behavior of the design under normal read conditions. The read happens at the rising edge of the enabled clock cycle. The output from the RAM is undefined until after the first rising edge of the read clock.
+
+
+
diff --git a/FPGA_by_Fredi/Video/BLITTER/blitter.tdf.ALT b/FPGA_by_Fredi/Video/BLITTER/blitter.tdf.ALT
new file mode 100644
index 0000000..1ad8825
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/blitter.tdf.ALT
@@ -0,0 +1,427 @@
+-- WARNING: Do NOT edit the input and output ports in this file in a text
+-- editor if you plan to continue editing the block that represents it in
+-- the Block Editor! File corruption is VERY likely to occur.
+
+-- Copyright (C) 1991-2010 Altera Corporation
+-- Your use of Altera Corporation's design tools, logic functions
+-- and other software and tools, and its AMPP partner logic
+-- functions, and any output files from any of the foregoing
+-- (including device programming or simulation files), and any
+-- associated documentation or information are expressly subject
+-- to the terms and conditions of the Altera Program License
+-- Subscription Agreement, Altera MegaCore Function License
+-- Agreement, or other applicable license agreement, including,
+-- without limitation, that your use is for the sole purpose of
+-- programming logic devices manufactured by Altera and sold by
+-- Altera or its authorized distributors. Please refer to the
+-- applicable agreement for further details.
+
+
+-- Generated by Quartus II Version 9.1 (Build Build 350 03/24/2010)
+-- Created on Sat Jan 15 11:06:17 2011
+INCLUDE "lpm_bustri_WORD.inc";
+INCLUDE "VIDEO/BLITTER/lpm_clshift0.INC";
+
+CONSTANT BL_SKEW_LF = 255;
+
+-- Title Statement (optional)
+TITLE "Blitter";
+
+
+-- Parameters Statement (optional)
+
+-- {{ALTERA_PARAMETERS_BEGIN}} DO NOT REMOVE THIS LINE!
+-- {{ALTERA_PARAMETERS_END}} DO NOT REMOVE THIS LINE!
+
+
+-- Subdesign Section
+
+SUBDESIGN BLITTER
+(
+ -- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
+ nRSTO : INPUT;
+ MAIN_CLK : INPUT;
+ FB_ALE : INPUT;
+ nFB_WR : INPUT;
+ nFB_OE : INPUT;
+ FB_SIZE0 : INPUT;
+ FB_SIZE1 : INPUT;
+ VIDEO_RAM_CTR[15..0] : INPUT;
+ BLITTER_ON : INPUT;
+ FB_ADR[31..0] : INPUT;
+ nFB_CS1 : INPUT;
+ nFB_CS2 : INPUT;
+ nFB_CS3 : INPUT;
+ DDRCLK0 : INPUT;
+ BLITTER_DIN[127..0] : INPUT;
+ BLITTER_DACK[4..0] : INPUT;
+ SR_BLITTER_DACK : INPUT;
+ BLITTER_RUN : OUTPUT;
+ BLITTER_DOUT[127..0] : OUTPUT;
+ BLITTER_ADR[31..0] : OUTPUT;
+ BLITTER_SIG : OUTPUT;
+ BLITTER_WR : OUTPUT;
+ BLITTER_TA : OUTPUT;
+ FB_AD[31..0] : BIDIR;
+ -- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
+)
+
+VARIABLE
+ FB_B[3..0] :NODE;
+ FB_16B[1..0] :NODE;
+ BLITTER_CS :NODE;
+ BL_HRAM0_CS :NODE;
+ BL_HRAM0[15..0] :DFFE;
+ BL_HRAM1_CS :NODE;
+ BL_HRAM1[15..0] :DFFE;
+ BL_HRAM2_CS :NODE;
+ BL_HRAM2[15..0] :DFFE;
+ BL_HRAM3_CS :NODE;
+ BL_HRAM3[15..0] :DFFE;
+ BL_HRAM4_CS :NODE;
+ BL_HRAM4[15..0] :DFFE;
+ BL_HRAM5_CS :NODE;
+ BL_HRAM5[15..0] :DFFE;
+ BL_HRAM6_CS :NODE;
+ BL_HRAM6[15..0] :DFFE;
+ BL_HRAM7_CS :NODE;
+ BL_HRAM7[15..0] :DFFE;
+ BL_HRAM8_CS :NODE;
+ BL_HRAM8[15..0] :DFFE;
+ BL_HRAM9_CS :NODE;
+ BL_HRAM9[15..0] :DFFE;
+ BL_HRAMA_CS :NODE;
+ BL_HRAMA[15..0] :DFFE;
+ BL_HRAMB_CS :NODE;
+ BL_HRAMB[15..0] :DFFE;
+ BL_HRAMC_CS :NODE;
+ BL_HRAMC[15..0] :DFFE;
+ BL_HRAMD_CS :NODE;
+ BL_HRAMD[15..0] :DFFE;
+ BL_HRAME_CS :NODE;
+ BL_HRAME[15..0] :DFFE;
+ BL_HRAMF_CS :NODE;
+ BL_HRAMF[15..0] :DFFE;
+ BL_SRC_X_INC_CS :NODE;
+ BL_SRC_X_INC[15..0] :DFFE;
+ BL_SRC_Y_INC_CS :NODE;
+ BL_SRC_Y_INC[15..0] :DFFE;
+ BL_ENDMASK1_CS :NODE;
+ BL_ENDMASK1[15..0] :DFFE;
+ BL_ENDMASK2_CS :NODE;
+ BL_ENDMASK2[15..0] :DFFE;
+ BL_ENDMASK3_CS :NODE;
+ BL_ENDMASK3[15..0] :DFFE;
+ BL_SRC_ADRH_CS :NODE;
+ BL_SRC_ADRL_CS :NODE;
+ BL_SRC_ADR[31..0] :DFFE;
+ BL_DST_X_INC_CS :NODE;
+ BL_DST_X_INC[15..0] :DFFE;
+ BL_DST_Y_INC_CS :NODE;
+ BL_DST_Y_INC[15..0] :DFFE;
+ BL_DST_ADRH_CS :NODE;
+ BL_DST_ADRL_CS :NODE;
+ BL_DST_ADR[31..0] :DFFE;
+ BL_X_CNT_CS :NODE;
+ BL_X_CNT[15..0] :DFFE;
+ BL_Y_CNT_CS :NODE;
+ BL_Y_CNT[15..0] :DFFE;
+ BL_HT_OP_CS :NODE;
+ BL_HT_OP[7..0] :DFFE;
+ BL_LC_OP[7..0] :DFFE;
+ BL_LN_CS :NODE;
+ BL_LN[7..0] :DFFE;
+ BL_SKEW[7..0] :DFFE;
+
+ BL_SKEW_EXT[6..0] :NODE;
+ BL_SKEW_IN[255..0] :DFFE;
+ BL_SKEW_OUT[255..0] :DFFE;
+
+ BL_DATA_DDR_READY :DFF; -- 1 WENN DATEN GESCHRIEBEN ODER LESBAR
+ BL_READ_SRC :DFFE;
+ BL_DST_BUFFER[127..0] :DFFE;
+ BL_READ_DST :DFFE;
+
+ COUNT[18..0] :DFF;
+
+BEGIN
+-- BYT SELECT 32 BIT
+ FB_B0 = FB_ADR[1..0]==0; -- ADR==0
+ FB_B1 = FB_ADR[1..0]==1 -- ADR==1
+ # FB_SIZE1 & !FB_SIZE0 & !FB_ADR1 -- HIGH WORD
+ # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
+ FB_B2 = FB_ADR[1..0]==2 -- ADR==2
+ # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
+ FB_B3 = FB_ADR[1..0]==3 -- ADR==3
+ # FB_SIZE1 & !FB_SIZE0 & FB_ADR1 -- LOW WORD
+ # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
+-- BYT SELECT 16 BIT
+ FB_16B0 = FB_ADR[0]==0; -- ADR==0
+ FB_16B1 = FB_ADR[0]==1 -- ADR==1
+ # !(!FB_SIZE1 & FB_SIZE0); -- NOT BYT
+-- BLITTER CS
+ BLITTER_CS = !nFB_CS1 & FB_ADR[19..6]==H"3E28"; -- FFFF8A00-3F/40
+ BLITTER_TA = BLITTER_CS;
+-- REGISTER
+ -- HALFTON RAM 0
+ BL_HRAM0[].CLK = MAIN_CLK;
+ BL_HRAM0[15..0] = FB_AD[31..16];
+ BL_HRAM0_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C500"; -- $F8A00/2
+ BL_HRAM0[15..8].ENA = BL_HRAM0_CS & !nFB_WR & FB_16B0;
+ BL_HRAM0[7..0].ENA = BL_HRAM0_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 1
+ BL_HRAM1[].CLK = MAIN_CLK;
+ BL_HRAM1[15..0] = FB_AD[31..16];
+ BL_HRAM1_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C501"; -- $F8A02/2
+ BL_HRAM1[15..8].ENA = BL_HRAM1_CS & !nFB_WR & FB_16B0;
+ BL_HRAM1[7..0].ENA = BL_HRAM1_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 2
+ BL_HRAM2[].CLK = MAIN_CLK;
+ BL_HRAM2[15..0] = FB_AD[31..16];
+ BL_HRAM2_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C502"; -- $F8A04/2
+ BL_HRAM2[15..8].ENA = BL_HRAM2_CS & !nFB_WR & FB_16B0;
+ BL_HRAM2[7..0].ENA = BL_HRAM2_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 3
+ BL_HRAM3[].CLK = MAIN_CLK;
+ BL_HRAM3[15..0] = FB_AD[31..16];
+ BL_HRAM3_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C503"; -- $F8A06/2
+ BL_HRAM3[15..8].ENA = BL_HRAM3_CS & !nFB_WR & FB_16B0;
+ BL_HRAM3[7..0].ENA = BL_HRAM3_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 4
+ BL_HRAM4[].CLK = MAIN_CLK;
+ BL_HRAM4[15..0] = FB_AD[31..16];
+ BL_HRAM4_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C504"; -- $F8A08/2
+ BL_HRAM4[15..8].ENA = BL_HRAM4_CS & !nFB_WR & FB_16B0;
+ BL_HRAM4[7..0].ENA = BL_HRAM4_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 5
+ BL_HRAM5[].CLK = MAIN_CLK;
+ BL_HRAM5[15..0] = FB_AD[31..16];
+ BL_HRAM5_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C505"; -- $F8A08/2
+ BL_HRAM5[15..8].ENA = BL_HRAM5_CS & !nFB_WR & FB_16B0;
+ BL_HRAM5[7..0].ENA = BL_HRAM5_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 6
+ BL_HRAM6[].CLK = MAIN_CLK;
+ BL_HRAM6[15..0] = FB_AD[31..16];
+ BL_HRAM6_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C506"; -- $F8A08/2
+ BL_HRAM6[15..8].ENA = BL_HRAM6_CS & !nFB_WR & FB_16B0;
+ BL_HRAM6[7..0].ENA = BL_HRAM6_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 7
+ BL_HRAM7[].CLK = MAIN_CLK;
+ BL_HRAM7[15..0] = FB_AD[31..16];
+ BL_HRAM7_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C507"; -- $F8A08/2
+ BL_HRAM7[15..8].ENA = BL_HRAM7_CS & !nFB_WR & FB_16B0;
+ BL_HRAM7[7..0].ENA = BL_HRAM7_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 8
+ BL_HRAM8[].CLK = MAIN_CLK;
+ BL_HRAM8[15..0] = FB_AD[31..16];
+ BL_HRAM8_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C508"; -- $F8A10/2
+ BL_HRAM8[15..8].ENA = BL_HRAM8_CS & !nFB_WR & FB_16B0;
+ BL_HRAM8[7..0].ENA = BL_HRAM8_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 9
+ BL_HRAM9[].CLK = MAIN_CLK;
+ BL_HRAM9[15..0] = FB_AD[31..16];
+ BL_HRAM9_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C509"; -- $F8A12/2
+ BL_HRAM9[15..8].ENA = BL_HRAM9_CS & !nFB_WR & FB_16B0;
+ BL_HRAM9[7..0].ENA = BL_HRAM9_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 10
+ BL_HRAMA[].CLK = MAIN_CLK;
+ BL_HRAMA[15..0] = FB_AD[31..16];
+ BL_HRAMA_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C50A"; -- $F8A4/2
+ BL_HRAMA[15..8].ENA = BL_HRAMA_CS & !nFB_WR & FB_16B0;
+ BL_HRAMA[7..0].ENA = BL_HRAMA_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 11
+ BL_HRAMB[].CLK = MAIN_CLK;
+ BL_HRAMB[15..0] = FB_AD[31..16];
+ BL_HRAMB_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C50B"; -- $F8A16/2
+ BL_HRAMB[15..8].ENA = BL_HRAMB_CS & !nFB_WR & FB_16B0;
+ BL_HRAMB[7..0].ENA = BL_HRAMB_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 12
+ BL_HRAMC[].CLK = MAIN_CLK;
+ BL_HRAMC[15..0] = FB_AD[31..16];
+ BL_HRAMC_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C50C"; -- $F8A18/2
+ BL_HRAMC[15..8].ENA = BL_HRAMC_CS & !nFB_WR & FB_16B0;
+ BL_HRAMC[7..0].ENA = BL_HRAMC_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 13
+ BL_HRAMD[].CLK = MAIN_CLK;
+ BL_HRAMD[15..0] = FB_AD[31..16];
+ BL_HRAMD_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C50D"; -- $F8A1A/2
+ BL_HRAMD[15..8].ENA = BL_HRAMD_CS & !nFB_WR & FB_16B0;
+ BL_HRAMD[7..0].ENA = BL_HRAMD_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 14
+ BL_HRAME[].CLK = MAIN_CLK;
+ BL_HRAME[15..0] = FB_AD[31..16];
+ BL_HRAME_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C50E"; -- $F8A1C/2
+ BL_HRAME[15..8].ENA = BL_HRAME_CS & !nFB_WR & FB_16B0;
+ BL_HRAME[7..0].ENA = BL_HRAME_CS & !nFB_WR & FB_16B1;
+ -- HALFTON RAM 15
+ BL_HRAMF[].CLK = MAIN_CLK;
+ BL_HRAMF[15..0] = FB_AD[31..16];
+ BL_HRAMF_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C50F"; -- $F8A1E/2
+ BL_HRAMF[15..8].ENA = BL_HRAMF_CS & !nFB_WR & FB_16B0;
+ BL_HRAMF[7..0].ENA = BL_HRAMF_CS & !nFB_WR & FB_16B1;
+ -- SRC X INC
+ BL_SRC_X_INC[].CLK = MAIN_CLK;
+ BL_SRC_X_INC[] = FB_AD[31..16];
+ BL_SRC_X_INC_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C510"; -- $F8A20/2
+ BL_SRC_X_INC[15..8].ENA = BL_SRC_X_INC_CS & !nFB_WR & FB_16B0;
+ BL_SRC_X_INC[7..0].ENA = BL_SRC_X_INC_CS & !nFB_WR & FB_16B1;
+ -- SRC Y INC
+ BL_SRC_Y_INC[].CLK = MAIN_CLK;
+ BL_SRC_Y_INC[] = FB_AD[31..16];
+ BL_SRC_Y_INC_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C511"; -- $F8A22/2
+ BL_SRC_Y_INC[15..8].ENA = BL_SRC_Y_INC_CS & !nFB_WR & FB_16B0;
+ BL_SRC_Y_INC[7..0].ENA = BL_SRC_Y_INC_CS & !nFB_WR & FB_16B1;
+ -- SRC ADR HIGH
+ BL_SRC_ADR[].CLK = MAIN_CLK;
+ BL_SRC_ADR[31..16] = FB_AD[31..16];
+ BL_SRC_ADRH_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C512"; -- $F8A24/2
+ BL_SRC_ADR[31..24].ENA = BL_SRC_ADRH_CS & !nFB_WR & FB_16B0;
+ BL_SRC_ADR[23..16].ENA = BL_SRC_ADRH_CS & !nFB_WR & FB_16B1;
+ -- SRC ADR LOW
+ BL_SRC_ADR[].CLK = MAIN_CLK;
+ BL_SRC_ADR[15..0] = FB_AD[31..16];
+ BL_SRC_ADRL_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C513"; -- $F8A26/2
+ BL_SRC_ADR[15..8].ENA = BL_SRC_ADRL_CS & !nFB_WR & FB_16B0;
+ BL_SRC_ADR[7..0].ENA = BL_SRC_ADRL_CS & !nFB_WR & FB_16B1;
+ -- ENDMASK 1
+ BL_ENDMASK1[].CLK = MAIN_CLK;
+ BL_ENDMASK1[] = FB_AD[31..16];
+ BL_ENDMASK1_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C514"; -- $F8A28/2
+ BL_ENDMASK1[15..8].ENA = BL_ENDMASK1_CS & !nFB_WR & FB_16B0;
+ BL_ENDMASK1[7..0].ENA = BL_ENDMASK1_CS & !nFB_WR & FB_16B1;
+ -- ENDMASK 2
+ BL_ENDMASK2[].CLK = MAIN_CLK;
+ BL_ENDMASK2[] = FB_AD[31..16];
+ BL_ENDMASK2_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C515"; -- $F8A2A/2
+ BL_ENDMASK2[15..8].ENA = BL_ENDMASK2_CS & !nFB_WR & FB_16B0;
+ BL_ENDMASK2[7..0].ENA = BL_ENDMASK2_CS & !nFB_WR & FB_16B1;
+ -- ENDMASK 3
+ BL_ENDMASK3[].CLK = MAIN_CLK;
+ BL_ENDMASK3[] = FB_AD[31..16];
+ BL_ENDMASK3_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C516"; -- $F8A2C/2
+ BL_ENDMASK3[15..8].ENA = BL_ENDMASK3_CS & !nFB_WR & FB_16B0;
+ BL_ENDMASK3[7..0].ENA = BL_ENDMASK3_CS & !nFB_WR & FB_16B1;
+ -- DST X INC
+ BL_DST_X_INC[].CLK = MAIN_CLK;
+ BL_DST_X_INC[] = FB_AD[31..16];
+ BL_DST_X_INC_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C517"; -- $F8A2E/2
+ BL_DST_X_INC[15..8].ENA = BL_DST_X_INC_CS & !nFB_WR & FB_16B0;
+ BL_DST_X_INC[7..0].ENA = BL_DST_X_INC_CS & !nFB_WR & FB_16B1;
+ -- DST Y INC
+ BL_DST_Y_INC[].CLK = MAIN_CLK;
+ BL_DST_Y_INC[] = FB_AD[31..16];
+ BL_DST_Y_INC_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C518"; -- $F8A30/2
+ BL_DST_Y_INC[15..8].ENA = BL_DST_Y_INC_CS & !nFB_WR & FB_16B0;
+ BL_DST_Y_INC[7..0].ENA = BL_DST_Y_INC_CS & !nFB_WR & FB_16B1;
+ -- DST ADR HIGH
+ BL_DST_ADR[].CLK = MAIN_CLK;
+ BL_DST_ADR[31..16] = FB_AD[31..16];
+ BL_DST_ADRH_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C512"; -- $F8A24/2
+ BL_DST_ADR[31..24].ENA = BL_DST_ADRH_CS & !nFB_WR & FB_16B0;
+ BL_DST_ADR[23..16].ENA = BL_DST_ADRH_CS & !nFB_WR & FB_16B1;
+ -- DST ADR LOW
+ BL_DST_ADR[].CLK = MAIN_CLK;
+ BL_DST_ADR[15..0] = FB_AD[31..16];
+ BL_DST_ADRL_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C513"; -- $F8A26/2
+ BL_DST_ADR[15..8].ENA = BL_DST_ADRL_CS & !nFB_WR & FB_16B0;
+ BL_DST_ADR[7..0].ENA = BL_DST_ADRL_CS & !nFB_WR & FB_16B1;
+ -- X COUNT
+ BL_X_CNT[].CLK = MAIN_CLK;
+ BL_X_CNT[] = FB_AD[31..16];
+ BL_X_CNT_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C51B"; -- $F8A36/2
+ BL_X_CNT[15..8].ENA = BL_X_CNT_CS & !nFB_WR & FB_16B0;
+ BL_X_CNT[7..0].ENA = BL_X_CNT_CS & !nFB_WR & FB_16B1;
+ -- Y COUNT
+ BL_Y_CNT[].CLK = MAIN_CLK;
+ BL_Y_CNT[] = FB_AD[31..16];
+ BL_Y_CNT_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C51C"; -- $F8A38/2
+ BL_Y_CNT[15..8].ENA = BL_Y_CNT_CS & !nFB_WR & FB_16B0;
+ BL_Y_CNT[7..0].ENA = BL_Y_CNT_CS & !nFB_WR & FB_16B1;
+ -- HALFTONE OP BYT
+ BL_HT_OP[].CLK = MAIN_CLK;
+ BL_HT_OP[] = FB_AD[31..24];
+ BL_HT_OP_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C51D"; -- $F8A3A/2
+ BL_HT_OP[7..0].ENA = BL_HT_OP_CS & !nFB_WR & FB_16B0;
+ -- LOGIC OP BYT
+ BL_LC_OP[].CLK = MAIN_CLK;
+ BL_LC_OP[] = FB_AD[23..16];
+ BL_LC_OP[7..0].ENA = BL_HT_OP_CS & !nFB_WR & FB_16B1; -- $F8A3B
+ -- LINE NUMBER BYT
+ BL_LN[].CLK = MAIN_CLK;
+ BL_LN[] = FB_AD[31..24];
+ BL_LN_CS = !nFB_CS1 & FB_ADR[19..1]==H"7C51E"; -- $F8A3C/2
+ BL_LN[7..0].ENA = BL_LN_CS & !nFB_WR & FB_16B0;
+ -- SKEW BYT
+ BL_SKEW[].CLK = MAIN_CLK;
+ BL_SKEW[] = FB_AD[31..24];
+ BL_SKEW[7..0].ENA = BL_LN_CS & !nFB_WR & FB_16B1; -- $F8A3D
+--- REGISTER OUT
+ FB_AD[31..16] = lpm_bustri_WORD(
+ BL_HRAM0_CS & BL_HRAM0[15..0]
+ # BL_HRAM1_CS & BL_HRAM1[15..0]
+ # BL_HRAM2_CS & BL_HRAM2[15..0]
+ # BL_HRAM3_CS & BL_HRAM3[15..0]
+ # BL_HRAM4_CS & BL_HRAM4[15..0]
+ # BL_HRAM5_CS & BL_HRAM5[15..0]
+ # BL_HRAM6_CS & BL_HRAM6[15..0]
+ # BL_HRAM7_CS & BL_HRAM7[15..0]
+ # BL_HRAM8_CS & BL_HRAM8[15..0]
+ # BL_HRAM9_CS & BL_HRAM9[15..0]
+ # BL_HRAMA_CS & BL_HRAMA[15..0]
+ # BL_HRAMB_CS & BL_HRAMB[15..0]
+ # BL_HRAMC_CS & BL_HRAMC[15..0]
+ # BL_HRAMD_CS & BL_HRAMD[15..0]
+ # BL_HRAME_CS & BL_HRAME[15..0]
+ # BL_HRAMF_CS & BL_HRAMF[15..0]
+ # BL_SRC_X_INC_CS & BL_SRC_X_INC[]
+ # BL_SRC_Y_INC_CS & BL_SRC_Y_INC[]
+ # BL_SRC_ADRH_CS & BL_SRC_ADR[31..16]
+ # BL_SRC_ADRL_CS & BL_SRC_ADR[15..0]
+ # BL_ENDMASK1_CS & BL_ENDMASK1[]
+ # BL_ENDMASK2_CS & BL_ENDMASK2[]
+ # BL_ENDMASK3_CS & BL_ENDMASK3[]
+ # BL_DST_X_INC_CS & BL_DST_X_INC[]
+ # BL_DST_Y_INC_CS & BL_DST_Y_INC[]
+ # BL_DST_ADRH_CS & BL_DST_ADR[31..16]
+ # BL_DST_ADRL_CS & BL_DST_ADR[15..0]
+ # BL_X_CNT_CS & BL_X_CNT[]
+ # BL_Y_CNT_CS & BL_Y_CNT[]
+ # BL_HT_OP_CS & (BL_HT_OP[],BL_LC_OP[])
+ # BL_LN_CS & (BL_LN[],BL_SKEW[])
+ ,!nFB_CS1 & FB_ADR[19..6]==H"3E28" & !nFB_OE); -- FFFF8A00-3F/40
+-----------------------------------------
+--
+ BL_READ_SRC.CLK = DDRCLK0;
+ BL_READ_DST.CLK = DDRCLK0;
+
+
+ BLITTER_RUN = VCC;
+ BLITTER_SIG = VCC;
+ BLITTER_WR = VCC;
+-- READY SIGNAL 1 CLOCK SPÄTER
+ BL_DATA_DDR_READY.CLK = DDRCLK0;
+ BL_DATA_DDR_READY = BL_DATA_DDR_READY & BLITTER_DACK0;
+-- SRC BUFFER LADEN
+ BL_SKEW_IN[].CLK = DDRCLK0;
+ BL_SKEW_IN[].ENA = BL_DATA_DDR_READY & BL_READ_SRC;
+ BL_SKEW_IN[255..128] = BLITTER_DIN[];
+ BL_SKEW_IN[127..0] = BL_SKEW_IN[255..128];
+-- DST BUFFER LADEN
+ BL_DST_BUFFER[].CLK = DDRCLK0;
+ BL_DST_BUFFER[].ENA = BL_DATA_DDR_READY & BL_READ_DST;
+ BL_DST_BUFFER[] = BLITTER_DIN[];
+-- SKEW EXTENDET
+ BL_SKEW_EXT[6..4] = BL_SRC_ADR[3..1];
+ BL_SKEW_EXT[3..0] = BL_SKEW[3..0];
+-- SKEW EXT MUX
+ BL_SKEW_OUT[].CLK = DDRCLK0;
+ BL_SKEW_OUT[].ENA = BL_DATA_DDR_READY & BL_READ_DST;
+ BL_SKEW_OUT[] = lpm_clshift0(BL_SKEW_IN[],BL_SKEW_EXT[]); -- BIT 127..0 SIND RELEVANT
+
+ COUNT[] = COUNT[] + 16;
+ COUNT[].CLK = BLITTER_DACK0;
+ BLITTER_DOUT[] = H"112233445566778899AABBCCDDEEFF00";
+ BLITTER_ADR[] = (0, COUNT[]) + 400000;
+
+END;
+
diff --git a/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.bsf b/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.bsf
new file mode 100644
index 0000000..9b12256
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.bsf
@@ -0,0 +1,54 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 1991-2010 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Altera Program License
+Subscription Agreement, Altera MegaCore Function License
+Agreement, or other applicable license agreement, including,
+without limitation, that your use is for the sole purpose of
+programming logic devices manufactured by Altera and sold by
+Altera or its authorized distributors. Please refer to the
+applicable agreement for further details.
+*/
+(header "symbol" (version "1.1"))
+(symbol
+ (rect 0 0 208 80)
+ (text "lpm_clshift0" (rect 62 3 162 22)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 61 31 76)(font "Arial" ))
+ (port
+ (pt 0 24)
+ (input)
+ (text "data[255..0]" (rect 0 0 81 16)(font "Arial" (font_size 8)))
+ (text "data[255..0]" (rect 20 16 89 32)(font "Arial" (font_size 8)))
+ (line (pt 0 24)(pt 16 24)(line_width 3))
+ )
+ (port
+ (pt 0 40)
+ (input)
+ (text "distance[6..0]" (rect 0 0 93 16)(font "Arial" (font_size 8)))
+ (text "distance[6..0]" (rect 20 32 99 48)(font "Arial" (font_size 8)))
+ (line (pt 0 40)(pt 16 40)(line_width 3))
+ )
+ (port
+ (pt 208 24)
+ (output)
+ (text "result[255..0]" (rect 0 0 89 16)(font "Arial" (font_size 8)))
+ (text "result[255..0]" (rect 113 16 189 32)(font "Arial" (font_size 8)))
+ (line (pt 208 24)(pt 192 24)(line_width 3))
+ )
+ (drawing
+ (text "LOGICAL right shift" (rect 21 50 114 64)(font "Arial" ))
+ (line (pt 16 16)(pt 16 64)(line_width 1))
+ (line (pt 192 16)(pt 192 64)(line_width 1))
+ (line (pt 16 16)(pt 192 16)(line_width 1))
+ (line (pt 16 64)(pt 192 64)(line_width 1))
+ )
+)
diff --git a/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.cmp b/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.cmp
new file mode 100644
index 0000000..d428d99
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.cmp
@@ -0,0 +1,23 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+component lpm_clshift0
+ PORT
+ (
+ data : IN STD_LOGIC_VECTOR (255 DOWNTO 0);
+ distance : IN STD_LOGIC_VECTOR (6 DOWNTO 0);
+ result : OUT STD_LOGIC_VECTOR (255 DOWNTO 0)
+ );
+end component;
diff --git a/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.inc b/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.inc
new file mode 100644
index 0000000..ccf215e
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.inc
@@ -0,0 +1,24 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+FUNCTION lpm_clshift0
+(
+ data[255..0],
+ distance[6..0]
+)
+
+RETURNS (
+ result[255..0]
+);
diff --git a/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.qip b/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.qip
new file mode 100644
index 0000000..737f0c0
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.qip
@@ -0,0 +1,6 @@
+set_global_assignment -name IP_TOOL_NAME "LPM_CLSHIFT"
+set_global_assignment -name IP_TOOL_VERSION "9.1"
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_clshift0.tdf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_clshift0.bsf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_clshift0.inc"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_clshift0.cmp"]
diff --git a/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.tdf b/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.tdf
new file mode 100644
index 0000000..d7d910f
--- /dev/null
+++ b/FPGA_by_Fredi/Video/BLITTER/lpm_clshift0.tdf
@@ -0,0 +1,92 @@
+-- megafunction wizard: %LPM_CLSHIFT%
+-- GENERATION: STANDARD
+-- VERSION: WM1.0
+-- MODULE: lpm_clshift
+
+-- ============================================================
+-- File Name: lpm_clshift0.tdf
+-- Megafunction Name(s):
+-- lpm_clshift
+--
+-- Simulation Library Files(s):
+--
+-- ============================================================
+-- ************************************************************
+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+--
+-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
+-- ************************************************************
+
+
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+INCLUDE "lpm_clshift.inc";
+
+
+
+SUBDESIGN lpm_clshift0
+(
+ data[255..0] : INPUT;
+ distance[6..0] : INPUT;
+ result[255..0] : OUTPUT;
+)
+
+VARIABLE
+
+ lpm_clshift_component : lpm_clshift WITH (
+ LPM_SHIFTTYPE = "LOGICAL",
+ LPM_TYPE = "LPM_CLSHIFT",
+ LPM_WIDTH = 256,
+ LPM_WIDTHDIST = 7
+ );
+
+BEGIN
+
+ result[255..0] = lpm_clshift_component.result[255..0];
+ lpm_clshift_component.distance[6..0] = distance[6..0];
+ lpm_clshift_component.direction = VCC;
+ lpm_clshift_component.data[255..0] = data[255..0];
+END;
+
+
+
+-- ============================================================
+-- CNX file retrieval info
+-- ============================================================
+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: PRIVATE: LPM_SHIFTTYPE NUMERIC "0"
+-- Retrieval info: PRIVATE: LPM_WIDTH NUMERIC "256"
+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+-- Retrieval info: PRIVATE: lpm_width_varies NUMERIC "0"
+-- Retrieval info: PRIVATE: lpm_widthdist NUMERIC "7"
+-- Retrieval info: PRIVATE: lpm_widthdist_style NUMERIC "1"
+-- Retrieval info: PRIVATE: port_direction NUMERIC "1"
+-- Retrieval info: CONSTANT: LPM_SHIFTTYPE STRING "LOGICAL"
+-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_CLSHIFT"
+-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "256"
+-- Retrieval info: CONSTANT: LPM_WIDTHDIST NUMERIC "7"
+-- Retrieval info: USED_PORT: data 0 0 256 0 INPUT NODEFVAL data[255..0]
+-- Retrieval info: USED_PORT: distance 0 0 7 0 INPUT NODEFVAL distance[6..0]
+-- Retrieval info: USED_PORT: result 0 0 256 0 OUTPUT NODEFVAL result[255..0]
+-- Retrieval info: CONNECT: @distance 0 0 7 0 distance 0 0 7 0
+-- Retrieval info: CONNECT: @data 0 0 256 0 data 0 0 256 0
+-- Retrieval info: CONNECT: result 0 0 256 0 @result 0 0 256 0
+-- Retrieval info: CONNECT: @direction 0 0 0 0 VCC 0 0 0 0
+-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift0.tdf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift0.inc TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift0.cmp TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift0.bsf TRUE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift0_inst.tdf FALSE
diff --git a/FPGA_by_Fredi/Video/DDR_CTR.tdf b/FPGA_by_Fredi/Video/DDR_CTR.tdf
index d5b5ec2..6c74c7a 100644
--- a/FPGA_by_Fredi/Video/DDR_CTR.tdf
+++ b/FPGA_by_Fredi/Video/DDR_CTR.tdf
@@ -373,8 +373,8 @@ BEGIN
VA_S[10] = VA_S[10]; -- AUTO PRECHARGE WENN NICHT FIFO PAGE
BA_S[] = CPU_AC & CPU_BA[]
# BLITTER_AC & BLITTER_BA[];
- SR_VDMP[7..4] = FB_B[]; -- BYTE ENABLE WRITE
- SR_VDMP[3..0] = LINE & B"1111"; -- LINE ENABLE WRITE
+ SR_VDMP[7..4] = FB_B[] # BLITTER_AC & B"1111"; -- BYTE ENABLE WRITE, BEI BLITTER IMMER LINE
+ SR_VDMP[3..0] = (LINE # BLITTER_AC) & B"1111"; -- LINE ENABLE WRITE, BEI BLITTER IMMER LINE
DDR_SM = DS_T6W;
WHEN DS_T6W =>
@@ -384,7 +384,7 @@ BEGIN
VWE = VCC;
SR_DDR_WR = VCC; -- WRITE COMMAND CPU UND BLITTER IF WRITER
SR_DDRWR_D_SEL = VCC; -- 2. HÄLFTE WRITE DATEN SELEKTIEREN
- SR_VDMP[] = LINE & B"11111111"; -- WENN LINE DANN ACTIV
+ SR_VDMP[] = (LINE # BLITTER_AC) & B"11111111"; -- WENN LINE DANN ACTIV
DDR_SM = DS_T7W;
WHEN DS_T7W =>
diff --git a/FPGA_by_Fredi/Video/DDR_CTR.tdf.bak b/FPGA_by_Fredi/Video/DDR_CTR.tdf.bak
index ead66e8..d5b5ec2 100644
--- a/FPGA_by_Fredi/Video/DDR_CTR.tdf.bak
+++ b/FPGA_by_Fredi/Video/DDR_CTR.tdf.bak
@@ -43,7 +43,6 @@ SUBDESIGN DDR_CTR
nVCAS : OUTPUT;
FB_LE[3..0] : OUTPUT;
FB_VDOE[3..0] : OUTPUT;
- CLEAR_FIFO_CNT : OUTPUT;
SR_FIFO_WRE : OUTPUT;
SR_DDR_FB : OUTPUT;
SR_DDR_WR : OUTPUT;
diff --git a/FPGA_by_Fredi/Video/VIDEO_MOD_MUX_CLUTCTR.tdf b/FPGA_by_Fredi/Video/VIDEO_MOD_MUX_CLUTCTR.tdf
index 2c9adcc..6a77969 100644
--- a/FPGA_by_Fredi/Video/VIDEO_MOD_MUX_CLUTCTR.tdf
+++ b/FPGA_by_Fredi/Video/VIDEO_MOD_MUX_CLUTCTR.tdf
@@ -620,7 +620,7 @@ BEGIN
VERZ[][8] = VERZ[][7];
VERZ[][9] = VERZ[][8];
VERZ[0][0] = DISP_ON;
- VERZ[1][0] = HSYNC_I[]!=0;
+-- VERZ[1][0] = HSYNC_I[]!=0;
VERZ[1][0] = (!ACP_VCTR15 # !VDL_VCT6) & HSYNC_I[]!=0
# ACP_VCTR15 & VDL_VCT6 & HSYNC_I[]==0; -- NUR MÖGLICH WENN BEIDE
VERZ[2][0] = (!ACP_VCTR15 # !VDL_VCT5) & VSYNC_I[]!=0
diff --git a/FPGA_by_Fredi/Video/VIDEO_MOD_MUX_CLUTCTR.tdf.bak b/FPGA_by_Fredi/Video/VIDEO_MOD_MUX_CLUTCTR.tdf.bak
index fda03c9..2c9adcc 100644
--- a/FPGA_by_Fredi/Video/VIDEO_MOD_MUX_CLUTCTR.tdf.bak
+++ b/FPGA_by_Fredi/Video/VIDEO_MOD_MUX_CLUTCTR.tdf.bak
@@ -650,11 +650,11 @@ BEGIN
START_ZEILE.ENA = LAST;
START_ZEILE = VVCNT[]==0; -- ZEILE 1
SYNC_PIX.CLK = PIXEL_CLK;
- SYNC_PIX = VHCNT[]==1 & START_ZEILE; -- SUB PIXEL ZÄHLER SYNCHRONISIEREN
+ SYNC_PIX = VHCNT[]==3 & START_ZEILE; -- SUB PIXEL ZÄHLER SYNCHRONISIEREN
SYNC_PIX1.CLK = PIXEL_CLK;
- SYNC_PIX1 = VHCNT[]==3 & START_ZEILE; -- SUB PIXEL ZÄHLER SYNCHRONISIEREN
+ SYNC_PIX1 = VHCNT[]==5 & START_ZEILE; -- SUB PIXEL ZÄHLER SYNCHRONISIEREN
SYNC_PIX2.CLK = PIXEL_CLK;
- SYNC_PIX2 = VHCNT[]==5 & START_ZEILE; -- SUB PIXEL ZÄHLER SYNCHRONISIEREN
+ SYNC_PIX2 = VHCNT[]==7 & START_ZEILE; -- SUB PIXEL ZÄHLER SYNCHRONISIEREN
SUB_PIXEL_CNT[].CLK = PIXEL_CLK;
SUB_PIXEL_CNT[].ENA = VDTRON # SYNC_PIX;
SUB_PIXEL_CNT[] = (SUB_PIXEL_CNT[] + 1) & !SYNC_PIX; --count up if display on sonst clear bei sync pix
diff --git a/FPGA_by_Fredi/Video/Video.bdf b/FPGA_by_Fredi/Video/Video.bdf
index 6210cb7..669eb72 100644
--- a/FPGA_by_Fredi/Video/Video.bdf
+++ b/FPGA_by_Fredi/Video/Video.bdf
@@ -6758,124 +6758,6 @@ applicable agreement for further details.
(line (pt 22 96)(pt 16 102)(line_width 1))
)
)
-(block
- (rect 296 2552 568 3000)
- (text "BLITTER" (rect 5 5 65 21)(font "Arial" (font_size 8))) (text "BLITTER" (rect 5 434 62 449)(font "Arial" )) (block_io "nRSTO" (input))
- (block_io "MAIN_CLK" (input))
- (block_io "FB_ALE" (input))
- (block_io "nFB_WR" (input))
- (block_io "nFB_OE" (input))
- (block_io "FB_SIZE0" (input))
- (block_io "FB_SIZE1" (input))
- (block_io "VIDEO_RAM_CTR[15..0]" (input))
- (block_io "BLITTER_ON" (input))
- (block_io "FB_ADR[31..0]" (input))
- (block_io "nFB_CS1" (input))
- (block_io "nFB_CS2" (input))
- (block_io "nFB_CS3" (input))
- (block_io "DDRCLK0" (input))
- (block_io "BLITTER_DIN[127..0]" (input))
- (block_io "BLITTER_DACK[4..0]" (input))
- (block_io "BLITTER_RUN" (output))
- (block_io "BLITTER_DOUT[127..0]" (output))
- (block_io "BLITTER_ADR[31..0]" (output))
- (block_io "BLITTER_SIG" (output))
- (block_io "BLITTER_WR" (output))
- (block_io "BLITTER_TA" (output))
- (block_io "FB_AD[31..0]" (bidir))
- (mapper
- (pt 272 176)
- (bidir)
- )
- (mapper
- (pt 272 208)
- (bidir)
- )
- (mapper
- (pt 272 240)
- (bidir)
- )
- (mapper
- (pt 272 264)
- (bidir)
- )
- (mapper
- (pt 272 288)
- (bidir)
- )
- (mapper
- (pt 0 384)
- (bidir)
- )
- (mapper
- (pt 272 72)
- (bidir)
- )
- (mapper
- (pt 0 56)
- (bidir)
- )
- (mapper
- (pt 0 32)
- (bidir)
- )
- (mapper
- (pt 0 296)
- (bidir)
- )
- (mapper
- (pt 0 272)
- (bidir)
- )
- (mapper
- (pt 0 104)
- (bidir)
- )
- (mapper
- (pt 0 128)
- (bidir)
- )
- (mapper
- (pt 0 80)
- (bidir)
- )
- (mapper
- (pt 0 248)
- (bidir)
- )
- (mapper
- (pt 0 224)
- (bidir)
- )
- (mapper
- (pt 0 200)
- (bidir)
- )
- (mapper
- (pt 0 176)
- (bidir)
- )
- (mapper
- (pt 0 152)
- (bidir)
- )
- (mapper
- (pt 0 360)
- (bidir)
- )
- (mapper
- (pt 0 328)
- (bidir)
- )
- (mapper
- (pt 272 424)
- (bidir)
- )
- (mapper
- (pt 0 408)
- (bidir)
- )
-)
(block
(rect 1664 1664 2016 2600)
(text "VIDEO_MOD_MUX_CLUTCTR" (rect 5 5 211 21)(font "Arial" (font_size 8))) (text "VIDEO_MOD_MUX_CLUTCTR" (rect 5 922 200 937)(font "Arial" )) (block_io "nRSTO" (input))
@@ -7322,6 +7204,129 @@ applicable agreement for further details.
(bidir)
)
)
+(block
+ (rect 296 2552 568 3040)
+ (text "BLITTER" (rect 5 5 65 21)(font "Arial" (font_size 8))) (text "BLITTER" (rect 5 474 62 489)(font "Arial" )) (block_io "nRSTO" (input))
+ (block_io "MAIN_CLK" (input))
+ (block_io "FB_ALE" (input))
+ (block_io "nFB_WR" (input))
+ (block_io "nFB_OE" (input))
+ (block_io "FB_SIZE0" (input))
+ (block_io "FB_SIZE1" (input))
+ (block_io "VIDEO_RAM_CTR[15..0]" (input))
+ (block_io "BLITTER_ON" (input))
+ (block_io "FB_ADR[31..0]" (input))
+ (block_io "nFB_CS1" (input))
+ (block_io "nFB_CS2" (input))
+ (block_io "nFB_CS3" (input))
+ (block_io "DDRCLK0" (input))
+ (block_io "BLITTER_DIN[127..0]" (input))
+ (block_io "BLITTER_DACK[4..0]" (input))
+ (block_io "SR_BLITTER_DACK" (input))
+ (block_io "BLITTER_RUN" (output))
+ (block_io "BLITTER_DOUT[127..0]" (output))
+ (block_io "BLITTER_ADR[31..0]" (output))
+ (block_io "BLITTER_SIG" (output))
+ (block_io "BLITTER_WR" (output))
+ (block_io "BLITTER_TA" (output))
+ (block_io "FB_AD[31..0]" (bidir))
+ (mapper
+ (pt 272 176)
+ (bidir)
+ )
+ (mapper
+ (pt 272 208)
+ (bidir)
+ )
+ (mapper
+ (pt 272 240)
+ (bidir)
+ )
+ (mapper
+ (pt 272 264)
+ (bidir)
+ )
+ (mapper
+ (pt 272 288)
+ (bidir)
+ )
+ (mapper
+ (pt 0 384)
+ (bidir)
+ )
+ (mapper
+ (pt 272 72)
+ (bidir)
+ )
+ (mapper
+ (pt 0 56)
+ (bidir)
+ )
+ (mapper
+ (pt 0 32)
+ (bidir)
+ )
+ (mapper
+ (pt 0 296)
+ (bidir)
+ )
+ (mapper
+ (pt 0 272)
+ (bidir)
+ )
+ (mapper
+ (pt 0 104)
+ (bidir)
+ )
+ (mapper
+ (pt 0 128)
+ (bidir)
+ )
+ (mapper
+ (pt 0 80)
+ (bidir)
+ )
+ (mapper
+ (pt 0 248)
+ (bidir)
+ )
+ (mapper
+ (pt 0 224)
+ (bidir)
+ )
+ (mapper
+ (pt 0 200)
+ (bidir)
+ )
+ (mapper
+ (pt 0 176)
+ (bidir)
+ )
+ (mapper
+ (pt 0 152)
+ (bidir)
+ )
+ (mapper
+ (pt 0 360)
+ (bidir)
+ )
+ (mapper
+ (pt 0 328)
+ (bidir)
+ )
+ (mapper
+ (pt 272 424)
+ (bidir)
+ )
+ (mapper
+ (pt 0 408)
+ (bidir)
+ )
+ (mapper
+ (pt 0 440)
+ (bidir)
+ )
+)
(connector
(text "CLUT_ADR0" (rect 2786 1272 2869 1287)(font "Arial" ))
(pt 2776 1288)
@@ -8363,34 +8368,12 @@ applicable agreement for further details.
(pt 560 2376)
(pt 664 2376)
)
-(connector
- (text "BLITTER_ON" (rect 226 2920 313 2935)(font "Arial" ))
- (pt 296 2936)
- (pt 216 2936)
-)
-(connector
- (text "BLITTER_RUN" (rect 578 2712 675 2727)(font "Arial" ))
- (pt 568 2728)
- (pt 648 2728)
-)
(connector
(text "VDVZ[127..0]" (rect 810 2920 892 2935)(font "Arial" ))
(pt 800 2936)
(pt 888 2936)
(bus)
)
-(connector
- (text "BLITTER_DOUT[127..0]" (rect 578 2744 731 2759)(font "Arial" ))
- (pt 680 2760)
- (pt 568 2760)
- (bus)
-)
-(connector
- (text "BLITTER_ADR[31..0]" (rect 578 2776 712 2791)(font "Arial" ))
- (pt 568 2792)
- (pt 680 2792)
- (bus)
-)
(connector
(text "BLITTER_SIG" (rect 578 2800 667 2815)(font "Arial" ))
(pt 568 2816)
@@ -8457,12 +8440,6 @@ applicable agreement for further details.
(pt 192 2584)
(pt 296 2584)
)
-(connector
- (text "VIDEO_RAM_CTR[15..0]" (rect 178 2896 334 2911)(font "Arial" ))
- (pt 296 2912)
- (pt 168 2912)
- (bus)
-)
(connector
(text "FB_AD[31..0]" (rect 578 2608 661 2623)(font "Arial" ))
(pt 688 2624)
@@ -8613,23 +8590,6 @@ applicable agreement for further details.
(pt 1192 1288)
(bus)
)
-(connector
- (text "BLITTER_DACK[0]" (rect 802 2952 922 2967)(font "Arial" ))
- (pt 888 2968)
- (pt 808 2968)
-)
-(connector
- (text "BLITTER_DIN[127..0]" (rect 1042 2944 1180 2959)(font "Arial" ))
- (pt 1144 2960)
- (pt 1032 2960)
- (bus)
-)
-(connector
- (text "BLITTER_DIN[127..0]" (rect 194 2944 332 2959)(font "Arial" ))
- (pt 296 2960)
- (pt 184 2960)
- (bus)
-)
(connector
(text "SR_BLITTER_DACK" (rect 570 2464 703 2479)(font "Arial" ))
(pt 664 2480)
@@ -8671,12 +8631,6 @@ applicable agreement for further details.
(pt 1168 2192)
(bus)
)
-(connector
- (text "BLITTER_DACK[4..0]" (rect 202 2864 337 2879)(font "Arial" ))
- (pt 192 2880)
- (pt 296 2880)
- (bus)
-)
(connector
(text "CLK33M" (rect 218 2432 273 2447)(font "Arial" ))
(pt 208 2448)
@@ -8971,22 +8925,6 @@ applicable agreement for further details.
(pt 1032 2400)
(pt 1096 2400)
)
-(connector
- (text "SR_BLITTER_DACK" (rect 810 2560 943 2575)(font "Arial" ))
- (pt 904 2576)
- (pt 800 2576)
-)
-(connector
- (text "DDRCLK0" (rect 826 2544 894 2559)(font "Arial" ))
- (pt 816 2560)
- (pt 904 2560)
-)
-(connector
- (text "BLITTER_DACK[4..0]" (rect 1058 2560 1193 2575)(font "Arial" ))
- (pt 1048 2576)
- (pt 1152 2576)
- (bus)
-)
(connector
(text "DDRCLK2" (rect 1018 2672 1086 2687)(font "Arial" ))
(pt 1008 2688)
@@ -10625,6 +10563,78 @@ applicable agreement for further details.
(pt 1712 1472)
(pt 1632 1472)
)
+(connector
+ (text "BLITTER_DACK[4..0]" (rect 178 2864 313 2879)(font "Arial" ))
+ (pt 296 2880)
+ (pt 184 2880)
+ (bus)
+)
+(connector
+ (text "VIDEO_RAM_CTR[15..0]" (rect 154 2896 310 2911)(font "Arial" ))
+ (pt 296 2912)
+ (pt 144 2912)
+ (bus)
+)
+(connector
+ (text "BLITTER_ON" (rect 202 2920 289 2935)(font "Arial" ))
+ (pt 296 2936)
+ (pt 192 2936)
+)
+(connector
+ (text "BLITTER_DIN[127..0]" (rect 162 2944 300 2959)(font "Arial" ))
+ (pt 296 2960)
+ (pt 152 2960)
+ (bus)
+)
+(connector
+ (text "SR_BLITTER_DACK" (rect 778 2560 911 2575)(font "Arial" ))
+ (pt 904 2576)
+ (pt 768 2576)
+)
+(connector
+ (text "DDRCLK0" (rect 794 2544 862 2559)(font "Arial" ))
+ (pt 904 2560)
+ (pt 784 2560)
+)
+(connector
+ (text "BLITTER_DACK[4..0]" (rect 1058 2560 1193 2575)(font "Arial" ))
+ (pt 1176 2576)
+ (pt 1048 2576)
+ (bus)
+)
+(connector
+ (text "BLITTER_DOUT[127..0]" (rect 578 2744 731 2759)(font "Arial" ))
+ (pt 712 2760)
+ (pt 568 2760)
+ (bus)
+)
+(connector
+ (text "BLITTER_ADR[31..0]" (rect 578 2776 712 2791)(font "Arial" ))
+ (pt 704 2792)
+ (pt 568 2792)
+ (bus)
+)
+(connector
+ (text "BLITTER_RUN" (rect 578 2712 675 2727)(font "Arial" ))
+ (pt 672 2728)
+ (pt 568 2728)
+)
+(connector
+ (text "BLITTER_DACK[0]" (rect 778 2952 898 2967)(font "Arial" ))
+ (pt 776 2968)
+ (pt 888 2968)
+)
+(connector
+ (text "SR_BLITTER_DACK" (rect 170 2976 303 2991)(font "Arial" ))
+ (pt 296 2992)
+ (pt 160 2992)
+)
+(connector
+ (text "BLITTER_DIN[127..0]" (rect 1042 2944 1180 2959)(font "Arial" ))
+ (pt 1160 2960)
+ (pt 1032 2960)
+ (bus)
+)
(junction (pt 2984 1688))
(junction (pt 792 1192))
(junction (pt 792 1312))
diff --git a/FPGA_by_Fredi/Video/altdpram0_wave0.jpg b/FPGA_by_Fredi/Video/altdpram0_wave0.jpg
deleted file mode 100644
index cccdde7..0000000
Binary files a/FPGA_by_Fredi/Video/altdpram0_wave0.jpg and /dev/null differ
diff --git a/FPGA_by_Fredi/Video/altdpram0_wave1.jpg b/FPGA_by_Fredi/Video/altdpram0_wave1.jpg
deleted file mode 100644
index c738145..0000000
Binary files a/FPGA_by_Fredi/Video/altdpram0_wave1.jpg and /dev/null differ
diff --git a/FPGA_by_Fredi/Video/altdpram1_wave0.jpg b/FPGA_by_Fredi/Video/altdpram1_wave0.jpg
deleted file mode 100644
index 3ab5c5f..0000000
Binary files a/FPGA_by_Fredi/Video/altdpram1_wave0.jpg and /dev/null differ
diff --git a/FPGA_by_Fredi/Video/altdpram1_wave1.jpg b/FPGA_by_Fredi/Video/altdpram1_wave1.jpg
deleted file mode 100644
index f2f606b..0000000
Binary files a/FPGA_by_Fredi/Video/altdpram1_wave1.jpg and /dev/null differ
diff --git a/FPGA_by_Fredi/Video/altdpram2_wave0.jpg b/FPGA_by_Fredi/Video/altdpram2_wave0.jpg
deleted file mode 100644
index 2da3c66..0000000
Binary files a/FPGA_by_Fredi/Video/altdpram2_wave0.jpg and /dev/null differ
diff --git a/FPGA_by_Fredi/Video/altdpram2_wave1.jpg b/FPGA_by_Fredi/Video/altdpram2_wave1.jpg
deleted file mode 100644
index 829d237..0000000
Binary files a/FPGA_by_Fredi/Video/altdpram2_wave1.jpg and /dev/null differ
diff --git a/FPGA_by_Fredi/Video/lpm_compare1_wave0.jpg b/FPGA_by_Fredi/Video/lpm_compare1_wave0.jpg
deleted file mode 100644
index 0fbc252..0000000
Binary files a/FPGA_by_Fredi/Video/lpm_compare1_wave0.jpg and /dev/null differ
diff --git a/FPGA_by_Fredi/Video/lpm_fifoDZ_wave0.jpg b/FPGA_by_Fredi/Video/lpm_fifoDZ_wave0.jpg
deleted file mode 100644
index 63d8667..0000000
Binary files a/FPGA_by_Fredi/Video/lpm_fifoDZ_wave0.jpg and /dev/null differ
diff --git a/FPGA_by_Fredi/Video/lpm_fifo_dc0_wave0.jpg b/FPGA_by_Fredi/Video/lpm_fifo_dc0_wave0.jpg
deleted file mode 100644
index e5d0f4b..0000000
Binary files a/FPGA_by_Fredi/Video/lpm_fifo_dc0_wave0.jpg and /dev/null differ
diff --git a/FPGA_by_Fredi/altiobuf_bidir0.bsf b/FPGA_by_Fredi/altiobuf_bidir0.bsf
new file mode 100644
index 0000000..c91097e
--- /dev/null
+++ b/FPGA_by_Fredi/altiobuf_bidir0.bsf
@@ -0,0 +1,71 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 1991-2010 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Altera Program License
+Subscription Agreement, Altera MegaCore Function License
+Agreement, or other applicable license agreement, including,
+without limitation, that your use is for the sole purpose of
+programming logic devices manufactured by Altera and sold by
+Altera or its authorized distributors. Please refer to the
+applicable agreement for further details.
+*/
+(header "symbol" (version "1.1"))
+(symbol
+ (rect 0 0 232 216)
+ (text "altiobuf_bidir0" (rect 65 1 185 20)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 197 31 212)(font "Arial" ))
+ (port
+ (pt 0 176)
+ (input)
+ (text "datain[0]" (rect 0 0 59 16)(font "Arial" (font_size 8)))
+ (text "datain[0]" (rect 4 160 54 176)(font "Arial" (font_size 8)))
+ (line (pt 0 176)(pt 100 176)(line_width 3))
+ )
+ (port
+ (pt 0 144)
+ (input)
+ (text "oe[0]" (rect 0 0 34 16)(font "Arial" (font_size 8)))
+ (text "oe[0]" (rect 4 128 33 144)(font "Arial" (font_size 8)))
+ (line (pt 0 144)(pt 105 144)(line_width 3))
+ )
+ (port
+ (pt 232 56)
+ (output)
+ (text "dataout[0]" (rect 0 0 68 16)(font "Arial" (font_size 8)))
+ (text "dataout[0]" (rect 171 40 229 56)(font "Arial" (font_size 8)))
+ (line (pt 232 56)(pt 80 56)(line_width 3))
+ )
+ (port
+ (pt 232 176)
+ (bidir)
+ (text "dataio[0]" (rect 0 0 59 16)(font "Arial" (font_size 8)))
+ (text "dataio[0]" (rect 179 160 229 176)(font "Arial" (font_size 8)))
+ (line (pt 232 176)(pt 131 176)(line_width 3))
+ )
+ (drawing
+ (line (pt 100 160)(pt 100 192)(line_width 1))
+ (line (pt 100 160)(pt 132 176)(line_width 1))
+ (line (pt 100 192)(pt 132 176)(line_width 1))
+ (line (pt 156 176)(pt 156 80)(line_width 3))
+ (line (pt 132 80)(pt 156 80)(line_width 3))
+ (line (pt 105 144)(pt 105 161)(line_width 3))
+ (line (pt 132 64)(pt 132 96)(line_width 1))
+ (line (pt 132 64)(pt 100 80)(line_width 1))
+ (line (pt 132 96)(pt 100 80)(line_width 1))
+ (line (pt 80 56)(pt 80 80)(line_width 3))
+ (line (pt 80 80)(pt 100 80)(line_width 3))
+ (line (pt 0 0)(pt 233 0)(line_width 1))
+ (line (pt 233 0)(pt 233 217)(line_width 1))
+ (line (pt 0 217)(pt 233 217)(line_width 1))
+ (line (pt 0 0)(pt 0 217)(line_width 1))
+ )
+)
diff --git a/FPGA_by_Fredi/altiobuf_bidir0.cmp b/FPGA_by_Fredi/altiobuf_bidir0.cmp
new file mode 100644
index 0000000..3731ce8
--- /dev/null
+++ b/FPGA_by_Fredi/altiobuf_bidir0.cmp
@@ -0,0 +1,24 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+component altiobuf_bidir0
+ PORT
+ (
+ datain : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+ oe : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+ dataio : INOUT STD_LOGIC_VECTOR (0 DOWNTO 0);
+ dataout : OUT STD_LOGIC_VECTOR (0 DOWNTO 0)
+ );
+end component;
diff --git a/FPGA_by_Fredi/altiobuf_bidir0.inc b/FPGA_by_Fredi/altiobuf_bidir0.inc
new file mode 100644
index 0000000..1e7e42f
--- /dev/null
+++ b/FPGA_by_Fredi/altiobuf_bidir0.inc
@@ -0,0 +1,25 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+FUNCTION altiobuf_bidir0
+(
+ datain[0..0],
+ oe[0..0]
+)
+
+RETURNS (
+ dataio[0..0],
+ dataout[0..0]
+);
diff --git a/FPGA_by_Fredi/altiobuf_bidir0.qip b/FPGA_by_Fredi/altiobuf_bidir0.qip
new file mode 100644
index 0000000..bfb5ab7
--- /dev/null
+++ b/FPGA_by_Fredi/altiobuf_bidir0.qip
@@ -0,0 +1,6 @@
+set_global_assignment -name IP_TOOL_NAME "ALTIOBUF"
+set_global_assignment -name IP_TOOL_VERSION "9.1"
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "altiobuf_bidir0.tdf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "altiobuf_bidir0.bsf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "altiobuf_bidir0.inc"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "altiobuf_bidir0.cmp"]
diff --git a/FPGA_by_Fredi/altiobuf_bidir0.tdf b/FPGA_by_Fredi/altiobuf_bidir0.tdf
new file mode 100644
index 0000000..f8c0c70
--- /dev/null
+++ b/FPGA_by_Fredi/altiobuf_bidir0.tdf
@@ -0,0 +1,90 @@
+-- megafunction wizard: %ALTIOBUF%
+-- GENERATION: STANDARD
+-- VERSION: WM1.0
+-- MODULE: altiobuf_bidir
+
+-- ============================================================
+-- File Name: altiobuf_bidir0.tdf
+-- Megafunction Name(s):
+-- altiobuf_bidir
+--
+-- Simulation Library Files(s):
+-- cycloneiii
+-- ============================================================
+-- ************************************************************
+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+--
+-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
+-- ************************************************************
+
+
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+-- Clearbox generated function header
+FUNCTION altiobuf_bidir0_iobuf_bidir_quo (datain[0..0], oe[0..0])
+RETURNS ( dataio[0..0], dataout[0..0]);
+
+
+
+
+SUBDESIGN altiobuf_bidir0
+(
+ datain[0..0] : INPUT;
+ oe[0..0] : INPUT;
+ dataio[0..0] : BIDIR;
+ dataout[0..0] : OUTPUT;
+)
+
+VARIABLE
+
+ altiobuf_bidir0_iobuf_bidir_quo_component : altiobuf_bidir0_iobuf_bidir_quo;
+
+BEGIN
+
+ dataout[0..0] = altiobuf_bidir0_iobuf_bidir_quo_component.dataout[0..0];
+ dataio[0..0] = altiobuf_bidir0_iobuf_bidir_quo_component.dataio[0..0];
+ altiobuf_bidir0_iobuf_bidir_quo_component.datain[0..0] = datain[0..0];
+ altiobuf_bidir0_iobuf_bidir_quo_component.oe[0..0] = oe[0..0];
+END;
+
+
+
+-- ============================================================
+-- CNX file retrieval info
+-- ============================================================
+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: CONSTANT: enable_bus_hold STRING "FALSE"
+-- Retrieval info: CONSTANT: number_of_channels NUMERIC "1"
+-- Retrieval info: CONSTANT: open_drain_output STRING "FALSE"
+-- Retrieval info: CONSTANT: use_differential_mode STRING "FALSE"
+-- Retrieval info: CONSTANT: use_dynamic_termination_control STRING "FALSE"
+-- Retrieval info: CONSTANT: use_termination_control STRING "FALSE"
+-- Retrieval info: USED_PORT: datain 0 0 1 0 INPUT NODEFVAL "datain[0..0]"
+-- Retrieval info: USED_PORT: dataio 0 0 1 0 BIDIR NODEFVAL "dataio[0..0]"
+-- Retrieval info: USED_PORT: dataout 0 0 1 0 OUTPUT NODEFVAL "dataout[0..0]"
+-- Retrieval info: USED_PORT: oe 0 0 1 0 INPUT NODEFVAL "oe[0..0]"
+-- Retrieval info: CONNECT: @datain 0 0 1 0 datain 0 0 1 0
+-- Retrieval info: CONNECT: @oe 0 0 1 0 oe 0 0 1 0
+-- Retrieval info: CONNECT: dataout 0 0 1 0 @dataout 0 0 1 0
+-- Retrieval info: CONNECT: dataio 0 0 1 0 @dataio 0 0 1 0
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altiobuf_bidir0.tdf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altiobuf_bidir0.inc TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altiobuf_bidir0.cmp TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altiobuf_bidir0.bsf TRUE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL altiobuf_bidir0_inst.tdf FALSE
+-- Retrieval info: LIB_FILE: cycloneiii
diff --git a/FPGA_by_Fredi/altiobuf_bidir0_iobuf_bidir_quo.tdf b/FPGA_by_Fredi/altiobuf_bidir0_iobuf_bidir_quo.tdf
new file mode 100644
index 0000000..92886d3
--- /dev/null
+++ b/FPGA_by_Fredi/altiobuf_bidir0_iobuf_bidir_quo.tdf
@@ -0,0 +1,53 @@
+--altiobuf_bidir CBX_AUTO_BLACKBOX="ALL" DEVICE_FAMILY="Cyclone III" ENABLE_BUS_HOLD="FALSE" NUMBER_OF_CHANNELS=1 OPEN_DRAIN_OUTPUT="FALSE" USE_DIFFERENTIAL_MODE="FALSE" USE_DYNAMIC_TERMINATION_CONTROL="FALSE" USE_TERMINATION_CONTROL="FALSE" datain dataio dataout oe
+--VERSION_BEGIN 9.1SP2 cbx_altiobuf_bidir 2010:03:24:20:43:42:SJ cbx_mgl 2010:03:24:21:01:05:SJ cbx_stratixiii 2010:03:24:20:43:43:SJ VERSION_END
+
+
+-- Copyright (C) 1991-2010 Altera Corporation
+-- Your use of Altera Corporation's design tools, logic functions
+-- and other software and tools, and its AMPP partner logic
+-- functions, and any output files from any of the foregoing
+-- (including device programming or simulation files), and any
+-- associated documentation or information are expressly subject
+-- to the terms and conditions of the Altera Program License
+-- Subscription Agreement, Altera MegaCore Function License
+-- Agreement, or other applicable license agreement, including,
+-- without limitation, that your use is for the sole purpose of
+-- programming logic devices manufactured by Altera and sold by
+-- Altera or its authorized distributors. Please refer to the
+-- applicable agreement for further details.
+
+
+FUNCTION cycloneiii_io_ibuf (i, ibar)
+WITH ( bus_hold, differential_mode, simulate_z_as)
+RETURNS ( o);
+FUNCTION cycloneiii_io_obuf (i, oe, seriesterminationcontrol[TERM_CTRL_WIDTH-1..0])
+WITH ( bus_hold, open_drain_output, TERM_CTRL_WIDTH = 16)
+RETURNS ( o, obar);
+
+--synthesis_resources = cycloneiii_io_ibuf 1 cycloneiii_io_obuf 1
+SUBDESIGN altiobuf_bidir0_iobuf_bidir_quo
+(
+ datain[0..0] : input;
+ dataio[0..0] : bidir;
+ dataout[0..0] : output;
+ oe[0..0] : input;
+)
+VARIABLE
+ ibufa[0..0] : cycloneiii_io_ibuf
+ WITH (
+ bus_hold = "false"
+ );
+ obufa[0..0] : cycloneiii_io_obuf
+ WITH (
+ bus_hold = "false",
+ open_drain_output = "false"
+ );
+
+BEGIN
+ ibufa[].i = dataio[];
+ obufa[].i = datain[];
+ obufa[].oe = oe[];
+ dataio[] = obufa[].o;
+ dataout[] = ibufa[].o;
+END;
+--VALID FILE
diff --git a/FPGA_by_Fredi/altpll1.bsf b/FPGA_by_Fredi/altpll1.bsf
index d1e4a9e..c0cf5ba 100644
--- a/FPGA_by_Fredi/altpll1.bsf
+++ b/FPGA_by_Fredi/altpll1.bsf
@@ -20,81 +20,81 @@ applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
- (rect 0 0 328 216)
- (text "altpll1" (rect 144 1 191 20)(font "Arial" (font_size 10)))
- (text "inst" (rect 8 197 31 212)(font "Arial" ))
+ (rect 0 0 272 184)
+ (text "altpll1" (rect 119 0 159 16)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 168 25 180)(font "Arial" ))
(port
- (pt 0 72)
+ (pt 0 64)
(input)
- (text "inclk0" (rect 0 0 40 16)(font "Arial" (font_size 8)))
- (text "inclk0" (rect 4 56 38 72)(font "Arial" (font_size 8)))
- (line (pt 0 72)(pt 48 72)(line_width 1))
+ (text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
+ (text "inclk0" (rect 4 51 31 64)(font "Arial" (font_size 8)))
+ (line (pt 0 64)(pt 40 64)(line_width 1))
)
(port
- (pt 328 72)
+ (pt 272 64)
(output)
- (text "c0" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c0" (rect 311 56 325 72)(font "Arial" (font_size 8)))
- (line (pt 328 72)(pt 272 72)(line_width 1))
+ (text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c0" (rect 257 51 268 64)(font "Arial" (font_size 8)))
+ (line (pt 272 64)(pt 224 64)(line_width 1))
)
(port
- (pt 328 96)
+ (pt 272 80)
(output)
- (text "c1" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c1" (rect 311 80 325 96)(font "Arial" (font_size 8)))
- (line (pt 328 96)(pt 272 96)(line_width 1))
+ (text "c1" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c1" (rect 257 67 268 80)(font "Arial" (font_size 8)))
+ (line (pt 272 80)(pt 224 80)(line_width 1))
)
(port
- (pt 328 120)
+ (pt 272 96)
(output)
- (text "c2" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c2" (rect 311 104 325 120)(font "Arial" (font_size 8)))
- (line (pt 328 120)(pt 272 120)(line_width 1))
+ (text "c2" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c2" (rect 257 83 268 96)(font "Arial" (font_size 8)))
+ (line (pt 272 96)(pt 224 96)(line_width 1))
)
(port
- (pt 328 144)
+ (pt 272 112)
(output)
- (text "locked" (rect 0 0 44 16)(font "Arial" (font_size 8)))
- (text "locked" (rect 287 128 325 144)(font "Arial" (font_size 8)))
- (line (pt 328 144)(pt 272 144)(line_width 1))
+ (text "locked" (rect 0 0 36 14)(font "Arial" (font_size 8)))
+ (text "locked" (rect 238 99 268 112)(font "Arial" (font_size 8)))
+ (line (pt 272 112)(pt 224 112)(line_width 1))
)
(drawing
- (text "Cyclone III" (rect 253 198 301 212)(font "Arial" ))
- (text "inclk0 frequency: 33.000 MHz" (rect 58 67 201 81)(font "Arial" ))
- (text "Operation Mode: Src Sync Comp" (rect 58 84 215 98)(font "Arial" ))
- (text "Clk " (rect 59 111 76 125)(font "Arial" ))
- (text "Ratio" (rect 90 111 114 125)(font "Arial" ))
- (text "Ph (dg)" (rect 128 111 163 125)(font "Arial" ))
- (text "DC (%)" (rect 173 111 208 125)(font "Arial" ))
- (text "c0" (rect 63 129 75 143)(font "Arial" ))
- (text "1/66" (rect 92 129 113 143)(font "Arial" ))
- (text "0.00" (rect 136 129 157 143)(font "Arial" ))
- (text "50.00" (rect 178 129 205 143)(font "Arial" ))
- (text "c1" (rect 63 147 75 161)(font "Arial" ))
- (text "67/900" (rect 85 147 118 161)(font "Arial" ))
- (text "0.00" (rect 136 147 157 161)(font "Arial" ))
- (text "50.00" (rect 178 147 205 161)(font "Arial" ))
- (text "c2" (rect 63 165 75 179)(font "Arial" ))
- (text "67/90" (rect 89 165 116 179)(font "Arial" ))
- (text "0.00" (rect 136 165 157 179)(font "Arial" ))
- (text "50.00" (rect 178 165 205 179)(font "Arial" ))
- (line (pt 0 0)(pt 329 0)(line_width 1))
- (line (pt 329 0)(pt 329 217)(line_width 1))
- (line (pt 0 217)(pt 329 217)(line_width 1))
- (line (pt 0 0)(pt 0 217)(line_width 1))
- (line (pt 56 108)(pt 215 108)(line_width 1))
- (line (pt 56 125)(pt 215 125)(line_width 1))
- (line (pt 56 143)(pt 215 143)(line_width 1))
- (line (pt 56 161)(pt 215 161)(line_width 1))
- (line (pt 56 179)(pt 215 179)(line_width 1))
- (line (pt 56 108)(pt 56 179)(line_width 1))
- (line (pt 82 108)(pt 82 179)(line_width 3))
- (line (pt 125 108)(pt 125 179)(line_width 3))
- (line (pt 170 108)(pt 170 179)(line_width 3))
- (line (pt 214 108)(pt 214 179)(line_width 1))
- (line (pt 48 56)(pt 272 56)(line_width 1))
- (line (pt 272 56)(pt 272 200)(line_width 1))
- (line (pt 48 200)(pt 272 200)(line_width 1))
- (line (pt 48 56)(pt 48 200)(line_width 1))
+ (text "Cyclone III" (rect 211 169 258 181)(font "Arial" ))
+ (text "inclk0 frequency: 33.000 MHz" (rect 50 59 175 71)(font "Arial" ))
+ (text "Operation Mode: Src Sync Comp" (rect 50 73 188 85)(font "Arial" ))
+ (text "Clk " (rect 51 96 68 108)(font "Arial" ))
+ (text "Ratio" (rect 83 96 105 108)(font "Arial" ))
+ (text "Ph (dg)" (rect 121 96 151 108)(font "Arial" ))
+ (text "DC (%)" (rect 156 96 187 108)(font "Arial" ))
+ (text "c0" (rect 54 111 64 123)(font "Arial" ))
+ (text "16/11" (rect 83 111 106 123)(font "Arial" ))
+ (text "0.00" (rect 127 111 145 123)(font "Arial" ))
+ (text "50.00" (rect 160 111 183 123)(font "Arial" ))
+ (text "c1" (rect 54 126 64 138)(font "Arial" ))
+ (text "16/33" (rect 83 126 106 138)(font "Arial" ))
+ (text "0.00" (rect 127 126 145 138)(font "Arial" ))
+ (text "50.00" (rect 160 126 183 138)(font "Arial" ))
+ (text "c2" (rect 54 141 64 153)(font "Arial" ))
+ (text "1024/1375" (rect 73 141 116 153)(font "Arial" ))
+ (text "0.00" (rect 127 141 145 153)(font "Arial" ))
+ (text "50.00" (rect 160 141 183 153)(font "Arial" ))
+ (line (pt 0 0)(pt 273 0)(line_width 1))
+ (line (pt 273 0)(pt 273 185)(line_width 1))
+ (line (pt 0 185)(pt 273 185)(line_width 1))
+ (line (pt 0 0)(pt 0 185)(line_width 1))
+ (line (pt 48 94)(pt 189 94)(line_width 1))
+ (line (pt 48 108)(pt 189 108)(line_width 1))
+ (line (pt 48 123)(pt 189 123)(line_width 1))
+ (line (pt 48 138)(pt 189 138)(line_width 1))
+ (line (pt 48 153)(pt 189 153)(line_width 1))
+ (line (pt 48 94)(pt 48 153)(line_width 1))
+ (line (pt 70 94)(pt 70 153)(line_width 3))
+ (line (pt 118 94)(pt 118 153)(line_width 3))
+ (line (pt 153 94)(pt 153 153)(line_width 3))
+ (line (pt 188 94)(pt 188 153)(line_width 1))
+ (line (pt 40 48)(pt 224 48)(line_width 1))
+ (line (pt 224 48)(pt 224 168)(line_width 1))
+ (line (pt 40 168)(pt 224 168)(line_width 1))
+ (line (pt 40 48)(pt 40 168)(line_width 1))
)
)
diff --git a/FPGA_by_Fredi/altpll1.vhd b/FPGA_by_Fredi/altpll1.vhd
index ab9bfaf..001d73b 100644
--- a/FPGA_by_Fredi/altpll1.vhd
+++ b/FPGA_by_Fredi/altpll1.vhd
@@ -153,17 +153,17 @@ BEGIN
altpll_component : altpll
GENERIC MAP (
bandwidth_type => "AUTO",
- clk0_divide_by => 66,
+ clk0_divide_by => 11,
clk0_duty_cycle => 50,
- clk0_multiply_by => 1,
+ clk0_multiply_by => 16,
clk0_phase_shift => "0",
- clk1_divide_by => 900,
+ clk1_divide_by => 33,
clk1_duty_cycle => 50,
- clk1_multiply_by => 67,
+ clk1_multiply_by => 16,
clk1_phase_shift => "0",
- clk2_divide_by => 90,
+ clk2_divide_by => 1375,
clk2_duty_cycle => 50,
- clk2_multiply_by => 67,
+ clk2_multiply_by => 1024,
clk2_phase_shift => "0",
compensate_clock => "CLK0",
inclk0_input_frequency => 30303,
@@ -244,15 +244,15 @@ END SYN;
-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0"
-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
--- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "90"
+-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
-- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "900"
-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "90"
-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
-- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
-- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
--- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "0.500000"
--- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "2.456667"
--- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "24.566668"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "48.000000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "16.000000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "24.576000"
-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
@@ -272,23 +272,23 @@ END SYN;
-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "330.000"
-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
--- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "ps"
-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "deg"
-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
-- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
-- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
--- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "67"
+-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
-- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "67"
-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "67"
-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "0"
--- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "0.50000000"
--- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "2.45760000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "48.00000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "16.00000000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "24.57600000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
--- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
--- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "1"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
@@ -298,7 +298,7 @@ END SYN;
-- Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
-- Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000"
-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
--- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "ps"
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg"
-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
@@ -338,17 +338,17 @@ END SYN;
-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
-- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
--- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "66"
+-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "11"
-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
--- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"
+-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "16"
-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
--- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "900"
+-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "33"
-- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
--- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "67"
+-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "16"
-- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
--- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "90"
+-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "1375"
-- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
--- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "67"
+-- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "1024"
-- Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "30303"
diff --git a/FPGA_by_Fredi/altpll3.bsf b/FPGA_by_Fredi/altpll3.bsf
index da30b0c..1a61457 100644
--- a/FPGA_by_Fredi/altpll3.bsf
+++ b/FPGA_by_Fredi/altpll3.bsf
@@ -20,86 +20,93 @@ applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
- (rect 0 0 304 232)
- (text "altpll3" (rect 132 1 179 20)(font "Arial" (font_size 10)))
- (text "inst" (rect 8 213 31 228)(font "Arial" ))
+ (rect 0 0 272 200)
+ (text "altpll3" (rect 119 0 159 16)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 184 25 196)(font "Arial" ))
(port
- (pt 0 72)
+ (pt 0 64)
(input)
- (text "inclk0" (rect 0 0 40 16)(font "Arial" (font_size 8)))
- (text "inclk0" (rect 4 56 38 72)(font "Arial" (font_size 8)))
- (line (pt 0 72)(pt 48 72)(line_width 1))
+ (text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
+ (text "inclk0" (rect 4 51 31 64)(font "Arial" (font_size 8)))
+ (line (pt 0 64)(pt 40 64)(line_width 1))
)
(port
- (pt 304 72)
+ (pt 272 64)
(output)
- (text "c0" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c0" (rect 287 56 301 72)(font "Arial" (font_size 8)))
- (line (pt 304 72)(pt 272 72)(line_width 1))
+ (text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c0" (rect 257 51 268 64)(font "Arial" (font_size 8)))
+ (line (pt 272 64)(pt 224 64)(line_width 1))
)
(port
- (pt 304 96)
+ (pt 272 80)
(output)
- (text "c1" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c1" (rect 287 80 301 96)(font "Arial" (font_size 8)))
- (line (pt 304 96)(pt 272 96)(line_width 1))
+ (text "c1" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c1" (rect 257 67 268 80)(font "Arial" (font_size 8)))
+ (line (pt 272 80)(pt 224 80)(line_width 1))
)
(port
- (pt 304 120)
+ (pt 272 96)
(output)
- (text "c2" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c2" (rect 287 104 301 120)(font "Arial" (font_size 8)))
- (line (pt 304 120)(pt 272 120)(line_width 1))
+ (text "c2" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c2" (rect 257 83 268 96)(font "Arial" (font_size 8)))
+ (line (pt 272 96)(pt 224 96)(line_width 1))
)
(port
- (pt 304 144)
+ (pt 272 112)
(output)
- (text "c3" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c3" (rect 287 128 301 144)(font "Arial" (font_size 8)))
- (line (pt 304 144)(pt 272 144)(line_width 1))
+ (text "c3" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c3" (rect 257 99 268 112)(font "Arial" (font_size 8)))
+ (line (pt 272 112)(pt 224 112)(line_width 1))
+ )
+ (port
+ (pt 272 128)
+ (output)
+ (text "locked" (rect 0 0 36 14)(font "Arial" (font_size 8)))
+ (text "locked" (rect 238 115 268 128)(font "Arial" (font_size 8)))
+ (line (pt 272 128)(pt 224 128)(line_width 1))
)
(drawing
- (text "Cyclone III" (rect 229 214 277 228)(font "Arial" ))
- (text "inclk0 frequency: 33.000 MHz" (rect 58 67 201 81)(font "Arial" ))
- (text "Operation Mode: Src Sync Comp" (rect 58 84 215 98)(font "Arial" ))
- (text "Clk " (rect 59 111 76 125)(font "Arial" ))
- (text "Ratio" (rect 86 111 110 125)(font "Arial" ))
- (text "Ph (dg)" (rect 121 111 156 125)(font "Arial" ))
- (text "DC (%)" (rect 166 111 201 125)(font "Arial" ))
- (text "c0" (rect 63 129 75 143)(font "Arial" ))
- (text "2/33" (rect 88 129 109 143)(font "Arial" ))
- (text "0.00" (rect 129 129 150 143)(font "Arial" ))
- (text "50.00" (rect 171 129 198 143)(font "Arial" ))
- (text "c1" (rect 63 147 75 161)(font "Arial" ))
- (text "16/33" (rect 85 147 112 161)(font "Arial" ))
- (text "0.00" (rect 129 147 150 161)(font "Arial" ))
- (text "50.00" (rect 171 147 198 161)(font "Arial" ))
- (text "c2" (rect 63 165 75 179)(font "Arial" ))
- (text "25/33" (rect 85 165 112 179)(font "Arial" ))
- (text "0.00" (rect 129 165 150 179)(font "Arial" ))
- (text "50.00" (rect 171 165 198 179)(font "Arial" ))
- (text "c3" (rect 63 183 75 197)(font "Arial" ))
- (text "16/11" (rect 85 183 112 197)(font "Arial" ))
- (text "0.00" (rect 129 183 150 197)(font "Arial" ))
- (text "50.00" (rect 171 183 198 197)(font "Arial" ))
- (line (pt 0 0)(pt 305 0)(line_width 1))
- (line (pt 305 0)(pt 305 233)(line_width 1))
- (line (pt 0 233)(pt 305 233)(line_width 1))
- (line (pt 0 0)(pt 0 233)(line_width 1))
- (line (pt 56 108)(pt 208 108)(line_width 1))
- (line (pt 56 125)(pt 208 125)(line_width 1))
- (line (pt 56 143)(pt 208 143)(line_width 1))
- (line (pt 56 161)(pt 208 161)(line_width 1))
- (line (pt 56 179)(pt 208 179)(line_width 1))
- (line (pt 56 197)(pt 208 197)(line_width 1))
- (line (pt 56 108)(pt 56 197)(line_width 1))
- (line (pt 82 108)(pt 82 197)(line_width 3))
- (line (pt 118 108)(pt 118 197)(line_width 3))
- (line (pt 163 108)(pt 163 197)(line_width 3))
- (line (pt 207 108)(pt 207 197)(line_width 1))
- (line (pt 48 56)(pt 272 56)(line_width 1))
- (line (pt 272 56)(pt 272 216)(line_width 1))
- (line (pt 48 216)(pt 272 216)(line_width 1))
- (line (pt 48 56)(pt 48 216)(line_width 1))
+ (text "Cyclone III" (rect 211 185 258 197)(font "Arial" ))
+ (text "inclk0 frequency: 33.000 MHz" (rect 50 59 175 71)(font "Arial" ))
+ (text "Operation Mode: Src Sync Comp" (rect 50 73 188 85)(font "Arial" ))
+ (text "Clk " (rect 51 96 68 108)(font "Arial" ))
+ (text "Ratio" (rect 81 96 103 108)(font "Arial" ))
+ (text "Ph (dg)" (rect 116 96 146 108)(font "Arial" ))
+ (text "DC (%)" (rect 151 96 182 108)(font "Arial" ))
+ (text "c0" (rect 54 111 64 123)(font "Arial" ))
+ (text "25/33" (rect 81 111 104 123)(font "Arial" ))
+ (text "0.00" (rect 122 111 140 123)(font "Arial" ))
+ (text "50.00" (rect 155 111 178 123)(font "Arial" ))
+ (text "c1" (rect 54 126 64 138)(font "Arial" ))
+ (text "2/33" (rect 83 126 101 138)(font "Arial" ))
+ (text "0.00" (rect 122 126 140 138)(font "Arial" ))
+ (text "50.00" (rect 155 126 178 138)(font "Arial" ))
+ (text "c2" (rect 54 141 64 153)(font "Arial" ))
+ (text "1/66" (rect 83 141 101 153)(font "Arial" ))
+ (text "0.00" (rect 122 141 140 153)(font "Arial" ))
+ (text "50.00" (rect 155 141 178 153)(font "Arial" ))
+ (text "c3" (rect 54 156 64 168)(font "Arial" ))
+ (text "512/6875" (rect 73 156 111 168)(font "Arial" ))
+ (text "0.00" (rect 122 156 140 168)(font "Arial" ))
+ (text "50.00" (rect 155 156 178 168)(font "Arial" ))
+ (line (pt 0 0)(pt 273 0)(line_width 1))
+ (line (pt 273 0)(pt 273 201)(line_width 1))
+ (line (pt 0 201)(pt 273 201)(line_width 1))
+ (line (pt 0 0)(pt 0 201)(line_width 1))
+ (line (pt 48 94)(pt 184 94)(line_width 1))
+ (line (pt 48 108)(pt 184 108)(line_width 1))
+ (line (pt 48 123)(pt 184 123)(line_width 1))
+ (line (pt 48 138)(pt 184 138)(line_width 1))
+ (line (pt 48 153)(pt 184 153)(line_width 1))
+ (line (pt 48 168)(pt 184 168)(line_width 1))
+ (line (pt 48 94)(pt 48 168)(line_width 1))
+ (line (pt 70 94)(pt 70 168)(line_width 3))
+ (line (pt 113 94)(pt 113 168)(line_width 3))
+ (line (pt 148 94)(pt 148 168)(line_width 3))
+ (line (pt 183 94)(pt 183 168)(line_width 1))
+ (line (pt 40 48)(pt 224 48)(line_width 1))
+ (line (pt 224 48)(pt 224 184)(line_width 1))
+ (line (pt 40 184)(pt 224 184)(line_width 1))
+ (line (pt 40 48)(pt 40 184)(line_width 1))
)
)
diff --git a/FPGA_by_Fredi/altpll3.cmp b/FPGA_by_Fredi/altpll3.cmp
index 44b3f2e..5d2ea75 100644
--- a/FPGA_by_Fredi/altpll3.cmp
+++ b/FPGA_by_Fredi/altpll3.cmp
@@ -20,6 +20,7 @@ component altpll3
c0 : OUT STD_LOGIC ;
c1 : OUT STD_LOGIC ;
c2 : OUT STD_LOGIC ;
- c3 : OUT STD_LOGIC
+ c3 : OUT STD_LOGIC ;
+ locked : OUT STD_LOGIC
);
end component;
diff --git a/FPGA_by_Fredi/altpll3.inc b/FPGA_by_Fredi/altpll3.inc
index 160ecad..dd262c4 100644
--- a/FPGA_by_Fredi/altpll3.inc
+++ b/FPGA_by_Fredi/altpll3.inc
@@ -22,5 +22,6 @@ RETURNS (
c0,
c1,
c2,
- c3
+ c3,
+ locked
);
diff --git a/FPGA_by_Fredi/altpll3.ppf b/FPGA_by_Fredi/altpll3.ppf
index 2a7b695..1928434 100644
--- a/FPGA_by_Fredi/altpll3.ppf
+++ b/FPGA_by_Fredi/altpll3.ppf
@@ -7,6 +7,7 @@
+
diff --git a/FPGA_by_Fredi/altpll3.vhd b/FPGA_by_Fredi/altpll3.vhd
index 6ead1f5..48ecaf5 100644
--- a/FPGA_by_Fredi/altpll3.vhd
+++ b/FPGA_by_Fredi/altpll3.vhd
@@ -46,7 +46,8 @@ ENTITY altpll3 IS
c0 : OUT STD_LOGIC ;
c1 : OUT STD_LOGIC ;
c2 : OUT STD_LOGIC ;
- c3 : OUT STD_LOGIC
+ c3 : OUT STD_LOGIC ;
+ locked : OUT STD_LOGIC
);
END altpll3;
@@ -59,9 +60,10 @@ ARCHITECTURE SYN OF altpll3 IS
SIGNAL sub_wire3 : STD_LOGIC ;
SIGNAL sub_wire4 : STD_LOGIC ;
SIGNAL sub_wire5 : STD_LOGIC ;
- SIGNAL sub_wire6 : STD_LOGIC_VECTOR (1 DOWNTO 0);
- SIGNAL sub_wire7_bv : BIT_VECTOR (0 DOWNTO 0);
- SIGNAL sub_wire7 : STD_LOGIC_VECTOR (0 DOWNTO 0);
+ SIGNAL sub_wire6 : STD_LOGIC ;
+ SIGNAL sub_wire7 : STD_LOGIC_VECTOR (1 DOWNTO 0);
+ SIGNAL sub_wire8_bv : BIT_VECTOR (0 DOWNTO 0);
+ SIGNAL sub_wire8 : STD_LOGIC_VECTOR (0 DOWNTO 0);
@@ -131,17 +133,19 @@ ARCHITECTURE SYN OF altpll3 IS
port_extclk1 : STRING;
port_extclk2 : STRING;
port_extclk3 : STRING;
+ self_reset_on_loss_lock : STRING;
width_clock : NATURAL
);
PORT (
inclk : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
+ locked : OUT STD_LOGIC ;
clk : OUT STD_LOGIC_VECTOR (4 DOWNTO 0)
);
END COMPONENT;
BEGIN
- sub_wire7_bv(0 DOWNTO 0) <= "0";
- sub_wire7 <= To_stdlogicvector(sub_wire7_bv);
+ sub_wire8_bv(0 DOWNTO 0) <= "0";
+ sub_wire8 <= To_stdlogicvector(sub_wire8_bv);
sub_wire4 <= sub_wire0(3);
sub_wire3 <= sub_wire0(2);
sub_wire2 <= sub_wire0(1);
@@ -150,29 +154,30 @@ BEGIN
c1 <= sub_wire2;
c2 <= sub_wire3;
c3 <= sub_wire4;
- sub_wire5 <= inclk0;
- sub_wire6 <= sub_wire7(0 DOWNTO 0) & sub_wire5;
+ locked <= sub_wire5;
+ sub_wire6 <= inclk0;
+ sub_wire7 <= sub_wire8(0 DOWNTO 0) & sub_wire6;
altpll_component : altpll
GENERIC MAP (
bandwidth_type => "AUTO",
clk0_divide_by => 33,
clk0_duty_cycle => 50,
- clk0_multiply_by => 2,
+ clk0_multiply_by => 25,
clk0_phase_shift => "0",
clk1_divide_by => 33,
clk1_duty_cycle => 50,
- clk1_multiply_by => 16,
+ clk1_multiply_by => 2,
clk1_phase_shift => "0",
- clk2_divide_by => 33,
+ clk2_divide_by => 66,
clk2_duty_cycle => 50,
- clk2_multiply_by => 25,
+ clk2_multiply_by => 1,
clk2_phase_shift => "0",
- clk3_divide_by => 11,
+ clk3_divide_by => 6875,
clk3_duty_cycle => 50,
- clk3_multiply_by => 16,
+ clk3_multiply_by => 512,
clk3_phase_shift => "0",
- compensate_clock => "CLK1",
+ compensate_clock => "CLK0",
inclk0_input_frequency => 30303,
intended_device_family => "Cyclone III",
lpm_type => "altpll",
@@ -188,7 +193,7 @@ BEGIN
port_fbin => "PORT_UNUSED",
port_inclk0 => "PORT_USED",
port_inclk1 => "PORT_UNUSED",
- port_locked => "PORT_UNUSED",
+ port_locked => "PORT_USED",
port_pfdena => "PORT_UNUSED",
port_phasecounterselect => "PORT_UNUSED",
port_phasedone => "PORT_UNUSED",
@@ -219,11 +224,13 @@ BEGIN
port_extclk1 => "PORT_UNUSED",
port_extclk2 => "PORT_UNUSED",
port_extclk3 => "PORT_UNUSED",
+ self_reset_on_loss_lock => "OFF",
width_clock => 5
)
PORT MAP (
- inclk => sub_wire6,
- clk => sub_wire0
+ inclk => sub_wire7,
+ clk => sub_wire0,
+ locked => sub_wire5
);
@@ -246,21 +253,21 @@ END SYN;
-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
--- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c1"
+-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0"
-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
--- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "33"
--- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "33"
--- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "33"
--- Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC "33"
+-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "72"
+-- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "906"
+-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "3072"
+-- Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC "738"
-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
-- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
-- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
-- Retrieval info: PRIVATE: DUTY_CYCLE3 STRING "50.00000000"
--- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "2.000000"
--- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "16.000000"
--- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "25.000000"
--- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING "48.000000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "25.000000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "2.000000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "0.500000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING "2.457600"
-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
@@ -276,7 +283,7 @@ END SYN;
-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
--- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
+-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1"
-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "330.000"
-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
@@ -289,19 +296,19 @@ END SYN;
-- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
-- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
-- Retrieval info: PRIVATE: MIRROR_CLK3 STRING "0"
--- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "2"
--- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "16"
--- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "25"
--- Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC "48"
+-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "55"
+-- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "55"
+-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "55"
+-- Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC "55"
-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "0"
--- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "2.00000000"
--- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "16.00000000"
--- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "25.00000000"
--- Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING "160.00000000"
--- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
--- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
--- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
--- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE3 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "25.00000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "2.00000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "0.50000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING "2.45760000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "1"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE3 STRING "1"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
@@ -316,7 +323,7 @@ END SYN;
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg"
--- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT3 STRING "ps"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT3 STRING "ns"
-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
@@ -359,21 +366,21 @@ END SYN;
-- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "33"
-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
--- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "2"
+-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "25"
-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "33"
-- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
--- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "16"
+-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "2"
-- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
--- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "33"
+-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "66"
-- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
--- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "25"
+-- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "1"
-- Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
--- Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC "11"
+-- Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC "6875"
-- Retrieval info: CONSTANT: CLK3_DUTY_CYCLE NUMERIC "50"
--- Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC "16"
+-- Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC "512"
-- Retrieval info: CONSTANT: CLK3_PHASE_SHIFT STRING "0"
--- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK1"
+-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "30303"
-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
@@ -389,7 +396,7 @@ END SYN;
-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
--- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED"
-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
@@ -420,6 +427,7 @@ END SYN;
-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING "OFF"
-- Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
-- Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"
@@ -428,6 +436,8 @@ END SYN;
-- Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
-- Retrieval info: USED_PORT: c3 0 0 0 0 OUTPUT_CLK_EXT VCC "c3"
-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+-- Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
+-- Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
-- Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
diff --git a/FPGA_by_Fredi/firebee1.asm.rpt b/FPGA_by_Fredi/firebee1.asm.rpt
deleted file mode 100644
index 7ffb13e..0000000
--- a/FPGA_by_Fredi/firebee1.asm.rpt
+++ /dev/null
@@ -1,128 +0,0 @@
-Assembler report for firebee1
-Wed Dec 15 02:25:13 2010
-Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
-
-
----------------------
-; Table of Contents ;
----------------------
- 1. Legal Notice
- 2. Assembler Summary
- 3. Assembler Settings
- 4. Assembler Generated Files
- 5. Assembler Device Options: C:/FireBee/FPGA/firebee1.sof
- 6. Assembler Device Options: C:/FireBee/FPGA/firebee1.rbf
- 7. Assembler Messages
-
-
-
-----------------
-; Legal Notice ;
-----------------
-Copyright (C) 1991-2010 Altera Corporation
-Your use of Altera Corporation's design tools, logic functions
-and other software and tools, and its AMPP partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Altera Program License
-Subscription Agreement, Altera MegaCore Function License
-Agreement, or other applicable license agreement, including,
-without limitation, that your use is for the sole purpose of
-programming logic devices manufactured by Altera and sold by
-Altera or its authorized distributors. Please refer to the
-applicable agreement for further details.
-
-
-
-+---------------------------------------------------------------+
-; Assembler Summary ;
-+-----------------------+---------------------------------------+
-; Assembler Status ; Successful - Wed Dec 15 02:25:13 2010 ;
-; Revision Name ; firebee1 ;
-; Top-level Entity Name ; firebee1 ;
-; Family ; Cyclone III ;
-; Device ; EP3C40F484C6 ;
-+-----------------------+---------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------+
-; Assembler Settings ;
-+-----------------------------------------------------------------------------+------------+---------------+
-; Option ; Setting ; Default Value ;
-+-----------------------------------------------------------------------------+------------+---------------+
-; Generate Raw Binary File (.rbf) For Target Device ; On ; Off ;
-; Hexadecimal Output File start address ; 0XE0700000 ; 0 ;
-; Use smart compilation ; Off ; Off ;
-; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
-; Enable compact report table ; Off ; Off ;
-; Generate compressed bitstreams ; On ; On ;
-; Compression mode ; Off ; Off ;
-; Clock source for configuration device ; Internal ; Internal ;
-; Clock frequency of the configuration device ; 10 MHZ ; 10 MHz ;
-; Divide clock frequency by ; 1 ; 1 ;
-; Auto user code ; Off ; Off ;
-; Use configuration device ; Off ; Off ;
-; Configuration device ; Auto ; Auto ;
-; Configuration device auto user code ; Off ; Off ;
-; Generate Tabular Text File (.ttf) For Target Device ; Off ; Off ;
-; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device ; Off ; Off ;
-; Hexadecimal Output File count direction ; Up ; Up ;
-; Release clears before tri-states ; Off ; Off ;
-; Auto-restart configuration after error ; On ; On ;
-; Enable OCT_DONE ; Off ; Off ;
-; Generate Serial Vector Format File (.svf) for Target Device ; Off ; Off ;
-; Generate a JEDEC STAPL Format File (.jam) for Target Device ; Off ; Off ;
-; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; Off ; Off ;
-; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On ; On ;
-+-----------------------------------------------------------------------------+------------+---------------+
-
-
-+------------------------------+
-; Assembler Generated Files ;
-+------------------------------+
-; File Name ;
-+------------------------------+
-; C:/FireBee/FPGA/firebee1.sof ;
-; C:/FireBee/FPGA/firebee1.rbf ;
-+------------------------------+
-
-
-+--------------------------------------------------------+
-; Assembler Device Options: C:/FireBee/FPGA/firebee1.sof ;
-+----------------+---------------------------------------+
-; Option ; Setting ;
-+----------------+---------------------------------------+
-; Device ; EP3C40F484C6 ;
-; JTAG usercode ; 0xFFFFFFFF ;
-; Checksum ; 0x0085E8C6 ;
-+----------------+---------------------------------------+
-
-
-+--------------------------------------------------------+
-; Assembler Device Options: C:/FireBee/FPGA/firebee1.rbf ;
-+---------------------+----------------------------------+
-; Option ; Setting ;
-+---------------------+----------------------------------+
-; Raw Binary File ; ;
-; Compression Ratio ; 2 ;
-+---------------------+----------------------------------+
-
-
-+--------------------+
-; Assembler Messages ;
-+--------------------+
-Info: *******************************************************************
-Info: Running Quartus II Assembler
- Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
- Info: Processing started: Wed Dec 15 02:25:08 2010
-Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
-Info: Writing out detailed assembly data for power analysis
-Info: Assembler is generating device programming files
-Info: Quartus II Assembler was successful. 0 errors, 0 warnings
- Info: Peak virtual memory: 291 megabytes
- Info: Processing ended: Wed Dec 15 02:25:13 2010
- Info: Elapsed time: 00:00:05
- Info: Total CPU time (on all processors): 00:00:05
-
-
diff --git a/FPGA_by_Fredi/firebee1.bdf b/FPGA_by_Fredi/firebee1.bdf
index 46507a2..8d4f188 100644
--- a/FPGA_by_Fredi/firebee1.bdf
+++ b/FPGA_by_Fredi/firebee1.bdf
@@ -26,8 +26,8 @@ applicable agreement for further details.
(pin
(input)
(rect 208 1392 376 1408)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "FB_ALE" (rect 9 0 60 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "FB_ALE" (rect 9 0 49 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -37,14 +37,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 136 1408 192 1424))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 160 1408 208 1424))
)
(pin
(input)
(rect 992 936 1160 952)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nFB_WR" (rect 9 0 66 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nFB_WR" (rect 9 0 53 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -54,31 +54,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 944 952 1000 968))
-)
-(pin
- (input)
- (rect 168 296 336 312)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "CLK33M" (rect 9 0 64 15)(font "Arial" ))
- (pt 168 8)
- (drawing
- (line (pt 92 12)(pt 117 12)(line_width 1))
- (line (pt 92 4)(pt 117 4)(line_width 1))
- (line (pt 121 8)(pt 168 8)(line_width 1))
- (line (pt 92 12)(pt 92 4)(line_width 1))
- (line (pt 117 4)(pt 121 8)(line_width 1))
- (line (pt 117 12)(pt 121 8)(line_width 1))
- )
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 104 312 176 328))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 944 952 992 968))
)
(pin
(input)
(rect 992 960 1160 976)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nFB_CS1" (rect 5 0 67 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nFB_CS1" (rect 9 0 56 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -88,14 +71,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 944 976 1000 992))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 944 976 992 992))
)
(pin
(input)
(rect 992 984 1160 1000)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nFB_CS2" (rect 5 0 67 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nFB_CS2" (rect 9 0 56 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -105,14 +88,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 944 1000 1000 1016))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 944 1000 992 1016))
)
(pin
(input)
(rect 1008 360 1176 376)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nFB_CS3" (rect 5 0 67 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nFB_CS3" (rect 9 0 56 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -122,14 +105,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 952 376 1008 392))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 960 376 1008 392))
)
(pin
(input)
(rect 992 1008 1160 1024)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "FB_SIZE0" (rect 5 0 69 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "FB_SIZE0" (rect 9 0 59 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -139,14 +122,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 944 1024 1000 1040))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 944 1024 992 1040))
)
(pin
(input)
(rect 992 1032 1160 1048)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "FB_SIZE1" (rect 5 0 69 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "FB_SIZE1" (rect 9 0 59 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -156,14 +139,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 944 1048 1000 1064))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 944 1048 992 1064))
)
(pin
(input)
(rect 992 1056 1160 1072)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nFB_BURST" (rect 5 0 87 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nFB_BURST" (rect 9 0 71 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -173,14 +156,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 944 1072 1000 1088))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 944 1072 992 1088))
)
(pin
(input)
(rect 936 1168 1104 1184)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "LP_BUSY" (rect 5 0 68 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "LP_BUSY" (rect 9 0 58 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -190,14 +173,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 888 1184 952 1200))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 888 1184 936 1200))
)
(pin
(input)
(rect 856 1200 1024 1216)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nACSI_DRQ" (rect 5 0 85 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nACSI_DRQ" (rect 9 0 71 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -207,14 +190,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 808 1216 864 1232))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 808 1216 856 1232))
)
(pin
(input)
(rect 856 1224 1024 1240)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nACSI_INT" (rect 5 0 75 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nACSI_INT" (rect 9 0 64 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -224,14 +207,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 808 1240 864 1256))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 808 1240 856 1256))
)
(pin
(input)
(rect 936 1392 1104 1408)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "RxD" (rect 5 0 32 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "RxD" (rect 9 0 31 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -241,14 +224,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 880 1408 944 1424))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 880 1408 936 1424))
)
(pin
(input)
(rect 936 1416 1104 1432)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "CTS" (rect 5 0 33 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "CTS" (rect 9 0 30 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -258,14 +241,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 880 1432 944 1448))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 880 1432 936 1448))
)
(pin
(input)
(rect 936 1440 1104 1456)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "RI" (rect 5 0 19 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "RI" (rect 9 0 20 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -275,14 +258,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 880 1456 944 1472))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 880 1456 936 1472))
)
(pin
(input)
(rect 936 1464 1104 1480)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "DCD" (rect 5 0 36 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "DCD" (rect 9 0 33 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -292,14 +275,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 880 1480 944 1496))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 880 1480 936 1496))
)
(pin
(input)
(rect 608 1488 776 1504)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "AMKB_RX" (rect 5 0 69 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "AMKB_RX" (rect 9 0 58 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -309,14 +292,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 560 1504 616 1520))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 560 1504 648 1536))
)
(pin
(input)
(rect 608 1512 776 1528)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "PIC_AMKB_RX" (rect 5 0 101 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "PIC_AMKB_RX" (rect 9 0 83 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -326,14 +309,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 560 1528 616 1544))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 560 1528 608 1544))
)
(pin
(input)
(rect 936 1544 1104 1560)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "IDE_RDY" (rect 5 0 66 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "IDE_RDY" (rect 9 0 58 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -343,14 +326,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 888 1560 944 1576))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 888 1560 936 1576))
)
(pin
(input)
(rect 936 1568 1104 1584)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "IDE_INT" (rect 5 0 59 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "IDE_INT" (rect 9 0 51 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -360,14 +343,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 880 1584 944 1600))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 880 1584 936 1600))
)
(pin
(input)
(rect 936 1592 1104 1608)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "WP_CF_CARD" (rect 5 0 102 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "WP_CF_CARD" (rect 9 0 85 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -377,14 +360,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 888 1608 944 1624))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 888 1608 936 1624))
)
(pin
(input)
(rect 872 1672 1040 1688)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "TRACK00" (rect 5 0 68 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "TRACK00" (rect 9 0 57 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -394,14 +377,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 816 1688 880 1704))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 816 1688 872 1704))
)
(pin
(input)
(rect 872 1696 1040 1712)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nWP" (rect 5 0 35 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nWP" (rect 9 0 32 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -411,14 +394,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 816 1712 880 1728))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 816 1712 872 1728))
)
(pin
(input)
(rect 872 1744 1040 1760)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nDCHG" (rect 5 0 55 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nDCHG" (rect 9 0 47 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -428,14 +411,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 816 1760 880 1776))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 816 1760 872 1776))
)
(pin
(input)
(rect 936 1776 1104 1792)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "SD_DATA0" (rect 5 0 76 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "SD_DATA0" (rect 9 0 64 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -445,14 +428,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 880 1792 944 1808))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 880 1792 936 1808))
)
(pin
(input)
(rect 936 1800 1104 1816)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "SD_DATA1" (rect 5 0 76 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "SD_DATA1" (rect 9 0 64 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -462,14 +445,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 880 1816 944 1832))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 880 1816 936 1832))
)
(pin
(input)
(rect 936 1824 1104 1840)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "SD_DATA2" (rect 5 0 76 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "SD_DATA2" (rect 9 0 64 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -479,31 +462,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 880 1840 944 1856))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 880 1840 936 1856))
)
(pin
(input)
- (rect 936 1848 1128 1864)
- (text "INPUT" (rect 157 0 193 13)(font "Arial" (font_size 6)))
- (text "SD_CARD_DEDECT" (rect 5 0 140 15)(font "Arial" ))
- (pt 192 8)
- (drawing
- (line (pt 116 12)(pt 141 12)(line_width 1))
- (line (pt 116 4)(pt 141 4)(line_width 1))
- (line (pt 145 8)(pt 192 8)(line_width 1))
- (line (pt 116 12)(pt 116 4)(line_width 1))
- (line (pt 141 4)(pt 145 8)(line_width 1))
- (line (pt 141 12)(pt 145 8)(line_width 1))
- )
- (text "VCC" (rect 160 7 184 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 880 1864 952 1880))
-)
-(pin
- (input)
- (rect 872 1360 1040 1376)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "MIDI_IN" (rect 5 0 55 15)(font "Arial" ))
+ (rect 936 1848 1104 1864)
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "SD_CARD_DEDECT" (rect 9 0 112 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -513,14 +479,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 816 1376 880 1392))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 880 1864 936 1880))
)
(pin
(input)
(rect 936 1256 1104 1272)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nSCSI_DRQ" (rect 5 0 86 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nSCSI_DRQ" (rect 9 0 71 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -530,14 +496,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 888 1272 944 1288))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 888 1272 936 1288))
)
(pin
(input)
(rect 936 1872 1104 1888)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "SD_WP" (rect 5 0 55 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "SD_WP" (rect 9 0 47 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -547,14 +513,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 880 1888 952 1904))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 880 1888 936 1904))
)
(pin
(input)
(rect 872 1720 1040 1736)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nRD_DATA" (rect 5 0 78 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nRD_DATA" (rect 9 0 65 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -564,14 +530,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 816 1736 880 1752))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 816 1736 872 1752))
)
(pin
(input)
(rect 936 1280 1104 1296)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nSCSI_C_D" (rect 5 0 84 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nSCSI_C_D" (rect 9 0 69 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -581,14 +547,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 888 1296 944 1312))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 888 1296 936 1312))
)
(pin
(input)
(rect 936 1304 1104 1320)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nSCSI_I_O" (rect 5 0 76 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nSCSI_I_O" (rect 9 0 64 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -598,14 +564,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 888 1320 944 1336))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 888 1320 936 1336))
)
(pin
(input)
(rect 936 1328 1104 1344)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nSCSI_MSG" (rect 5 0 85 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nSCSI_MSG" (rect 9 0 70 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -615,14 +581,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 888 1344 944 1360))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 888 1344 936 1360))
)
(pin
(input)
(rect 992 1104 1160 1120)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nDACK0" (rect 5 0 60 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nDACK0" (rect 9 0 51 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -632,14 +598,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 936 1120 1000 1136))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 936 1120 992 1136))
)
(pin
(input)
(rect 984 2592 1152 2608)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "PIC_INT" (rect 5 0 59 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "PIC_INT" (rect 9 0 51 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -649,14 +615,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 928 2608 1000 2624))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 928 2608 984 2624))
)
(pin
(input)
(rect 992 912 1160 928)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nFB_OE" (rect 5 0 59 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nFB_OE" (rect 9 0 50 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -666,14 +632,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 944 928 1000 944))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 944 928 992 944))
)
(pin
(input)
(rect 360 2616 528 2632)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "TOUT0" (rect 5 0 51 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "TOUT0" (rect 9 0 43 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -683,14 +649,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 304 2632 368 2648))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 304 2632 360 2648))
)
(pin
(input)
(rect 360 2504 528 2520)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nMASTER" (rect 5 0 69 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nMASTER" (rect 9 0 58 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -700,14 +666,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 304 2520 368 2536))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 304 2520 360 2536))
)
(pin
(input)
- (rect 984 2640 1152 2656)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "DVI_INT" (rect 5 0 58 15)(font "Arial" ))
+ (rect 680 2640 848 2656)
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "DVI_INT" (rect 9 0 51 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -717,14 +683,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 928 2656 992 2672))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 624 2656 680 2672))
)
(pin
(input)
(rect 360 2408 528 2424)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nDACK1" (rect 5 0 60 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nDACK1" (rect 9 0 51 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -734,14 +700,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 304 2424 368 2440))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 304 2424 360 2440))
)
(pin
(input)
(rect 984 2664 1152 2680)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nPCI_INTD" (rect 5 0 78 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nPCI_INTD" (rect 9 0 65 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -751,14 +717,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 936 2680 992 2696))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 936 2680 984 2696))
)
(pin
(input)
(rect 984 2688 1152 2704)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nPCI_INTC" (rect 5 0 78 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nPCI_INTC" (rect 9 0 65 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -768,14 +734,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 936 2704 992 2720))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 936 2704 984 2720))
)
(pin
(input)
(rect 984 2712 1152 2728)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nPCI_INTB" (rect 5 0 76 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nPCI_INTB" (rect 9 0 64 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -785,14 +751,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 936 2728 992 2744))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 936 2728 984 2744))
)
(pin
(input)
(rect 984 2736 1152 2752)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nPCI_INTA" (rect 5 0 75 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nPCI_INTA" (rect 9 0 64 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -802,14 +768,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 928 2752 1000 2768))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 928 2752 984 2768))
)
(pin
(input)
(rect 984 2616 1152 2632)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "E0_INT" (rect 5 0 53 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "E0_INT" (rect 9 0 45 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -819,14 +785,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 928 2632 992 2648))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 928 2632 984 2648))
)
(pin
(input)
(rect 872 1648 1040 1664)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "nINDEX" (rect 5 0 55 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nINDEX" (rect 9 0 47 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -836,14 +802,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 816 1664 880 1680))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 816 1664 872 1680))
)
(pin
(input)
(rect 872 1624 1040 1640)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "HD_DD" (rect 5 0 55 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "HD_DD" (rect 9 0 47 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -853,14 +819,14 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 808 1632 872 1648))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 816 1640 872 1656))
)
(pin
(input)
(rect 96 -288 264 -272)
- (text "INPUT" (rect 133 0 169 13)(font "Arial" (font_size 6)))
- (text "MAIN_CLK" (rect 9 0 78 15)(font "Arial" ))
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "MAIN_CLK" (rect 9 0 63 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@@ -870,48 +836,48 @@ applicable agreement for further details.
(line (pt 117 4)(pt 121 8)(line_width 1))
(line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 136 7 160 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 56 -304 120 -288))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 48 -272 96 -256))
)
(pin
(input)
- (rect 664 440 840 456)
- (text "INPUT" (rect 141 0 177 13)(font "Arial" (font_size 6)))
- (text "nRSTO_MCF" (rect 5 0 89 15)(font "Arial" ))
- (pt 176 8)
+ (rect 592 440 760 456)
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "nRSTO_MCF" (rect 9 0 73 12)(font "Arial" ))
+ (pt 168 8)
(drawing
- (line (pt 100 12)(pt 125 12)(line_width 1))
- (line (pt 100 4)(pt 125 4)(line_width 1))
- (line (pt 129 8)(pt 176 8)(line_width 1))
- (line (pt 100 12)(pt 100 4)(line_width 1))
- (line (pt 125 4)(pt 129 8)(line_width 1))
- (line (pt 125 12)(pt 129 8)(line_width 1))
+ (line (pt 92 12)(pt 117 12)(line_width 1))
+ (line (pt 92 4)(pt 117 4)(line_width 1))
+ (line (pt 121 8)(pt 168 8)(line_width 1))
+ (line (pt 92 12)(pt 92 4)(line_width 1))
+ (line (pt 117 4)(pt 121 8)(line_width 1))
+ (line (pt 117 12)(pt 121 8)(line_width 1))
)
- (text "VCC" (rect 144 7 168 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 600 448 664 464))
+ (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 536 456 592 472))
)
(pin
- (output)
- (rect 864 288 1040 304)
- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "CLK24M576" (rect 90 0 170 15)(font "Arial" ))
- (pt 0 8)
+ (input)
+ (rect 56 304 224 320)
+ (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
+ (text "CLK33MDIR" (rect 9 0 70 12)(font "Arial" ))
+ (pt 168 8)
(drawing
- (line (pt 0 8)(pt 52 8)(line_width 1))
- (line (pt 52 4)(pt 78 4)(line_width 1))
- (line (pt 52 12)(pt 78 12)(line_width 1))
- (line (pt 52 12)(pt 52 4)(line_width 1))
- (line (pt 78 4)(pt 82 8)(line_width 1))
- (line (pt 82 8)(pt 78 12)(line_width 1))
- (line (pt 78 12)(pt 82 8)(line_width 1))
+ (line (pt 92 12)(pt 117 12)(line_width 1))
+ (line (pt 92 4)(pt 117 4)(line_width 1))
+ (line (pt 121 8)(pt 168 8)(line_width 1))
+ (line (pt 92 12)(pt 92 4)(line_width 1))
+ (line (pt 117 4)(pt 121 8)(line_width 1))
+ (line (pt 117 12)(pt 121 8)(line_width 1))
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+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "SD_CLK" (rect 90 0 132 12)(font "Arial" ))
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@@ -1466,13 +1415,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "DSA_D" (rect 90 0 137 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "DSA_D" (rect 90 0 126 12)(font "Arial" ))
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@@ -1483,13 +1432,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "VR[7..0]" (rect 90 0 139 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "VR[7..0]" (rect 90 0 131 12)(font "Arial" ))
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@@ -1500,13 +1449,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "VG[7..0]" (rect 90 0 139 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "VG[7..0]" (rect 90 0 131 12)(font "Arial" ))
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@@ -1517,13 +1466,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "VB[7..0]" (rect 90 0 138 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "VB[7..0]" (rect 90 0 130 12)(font "Arial" ))
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@@ -1534,13 +1483,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "VA[12..0]" (rect 90 0 145 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "VA[12..0]" (rect 90 0 136 12)(font "Arial" ))
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@@ -1551,13 +1500,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (text "nVWE" (rect 90 0 128 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nVWE" (rect 90 0 120 12)(font "Arial" ))
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@@ -1568,13 +1517,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (annotation_block (location)(rect 2576 360 2640 392))
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nVCAS" (rect 90 0 134 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nVCAS" (rect 90 0 125 12)(font "Arial" ))
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@@ -1585,13 +1534,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nVRAS" (rect 90 0 134 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nVRAS" (rect 90 0 125 12)(font "Arial" ))
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@@ -1602,13 +1551,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nVCS" (rect 90 0 126 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nVCS" (rect 90 0 118 12)(font "Arial" ))
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@@ -1619,13 +1568,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "VDM[3..0]" (rect 90 0 150 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "VDM[3..0]" (rect 90 0 139 12)(font "Arial" ))
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@@ -1636,13 +1585,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (text "nPD_VGA" (rect 90 0 153 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nPD_VGA" (rect 90 0 139 12)(font "Arial" ))
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@@ -1653,13 +1602,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nIRQ[7..2]" (rect 90 0 153 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nIRQ[7..2]" (rect 90 0 141 12)(font "Arial" ))
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@@ -1670,30 +1619,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
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- (annotation_block (location)(rect 1040 40 1096 56))
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "TIN0" (rect 90 0 120 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "TIN0" (rect 90 0 113 12)(font "Arial" ))
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@@ -1704,13 +1636,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nSRCS" (rect 90 0 138 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nSRCS" (rect 90 0 126 12)(font "Arial" ))
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@@ -1721,13 +1653,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nSRBLE" (rect 90 0 145 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nSRBLE" (rect 90 0 131 12)(font "Arial" ))
(pt 0 8)
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@@ -1738,13 +1670,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
- (annotation_block (location)(rect 2000 3320 2056 3336))
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nSRBHE" (rect 90 0 147 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nSRBHE" (rect 90 0 133 12)(font "Arial" ))
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@@ -1755,13 +1687,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nSRWE" (rect 90 0 140 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nSRWE" (rect 90 0 128 12)(font "Arial" ))
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@@ -1772,13 +1704,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nDREQ1" (rect 90 0 147 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nDREQ1" (rect 90 0 133 12)(font "Arial" ))
(pt 0 8)
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@@ -1789,13 +1721,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "LED_FPGA_OK" (rect 90 0 191 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "LED_FPGA_OK" (rect 90 0 167 12)(font "Arial" ))
(pt 0 8)
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@@ -1806,13 +1738,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nSROE" (rect 90 0 138 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nSROE" (rect 90 0 126 12)(font "Arial" ))
(pt 0 8)
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@@ -1823,13 +1755,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
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(pin
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- (text "VCKE" (rect 90 0 127 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "VCKE" (rect 90 0 119 12)(font "Arial" ))
(pt 0 8)
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@@ -1840,13 +1772,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (annotation_block (location)(rect 2120 456 2184 488))
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nFB_TA" (rect 90 0 140 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nFB_TA" (rect 90 0 128 12)(font "Arial" ))
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@@ -1857,13 +1789,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nDDR_CLK" (rect 90 0 166 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nDDR_CLK" (rect 90 0 147 12)(font "Arial" ))
(pt 0 8)
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@@ -1874,13 +1806,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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(pin
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "DDR_CLK" (rect 90 0 158 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "DDR_CLK" (rect 90 0 141 12)(font "Arial" ))
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@@ -1891,13 +1823,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "BA[1..0]" (rect 90 0 138 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "BA[1..0]" (rect 90 0 130 12)(font "Arial" ))
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@@ -1908,13 +1840,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
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- (text "VSYNC_PAD" (rect 90 0 173 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "VSYNC_PAD" (rect 90 0 157 12)(font "Arial" ))
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@@ -1925,13 +1857,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
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+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "HSYNC_PAD" (rect 90 0 158 12)(font "Arial" ))
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(line (pt 82 8)(pt 78 12)(line_width 1))
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+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
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(line (pt 82 8)(pt 78 12)(line_width 1))
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(pin
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+ (rect 2712 160 2888 176)
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "PIXEL_CLK_PAD" (rect 90 0 174 12)(font "Arial" ))
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(line (pt 82 8)(pt 78 12)(line_width 1))
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(line (pt 82 8)(pt 78 12)(line_width 1))
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@@ -2010,13 +1942,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
- (annotation_block (location)(rect 2312 1752 2376 1768))
+ (annotation_block (location)(rect 2312 1752 2368 1768))
)
(pin
(output)
(rect 2136 1760 2312 1776)
- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nSTEP_DIR" (rect 90 0 167 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nSTEP_DIR" (rect 90 0 149 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8)(line_width 1))
@@ -2027,13 +1959,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
- (annotation_block (location)(rect 2312 1776 2376 1792))
+ (annotation_block (location)(rect 2312 1776 2368 1792))
)
(pin
(output)
(rect 2136 1784 2312 1800)
- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "nSTEP" (rect 90 0 134 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "nSTEP" (rect 90 0 123 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8)(line_width 1))
@@ -2044,30 +1976,13 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
- (annotation_block (location)(rect 2312 1800 2376 1816))
-)
-(pin
- (output)
- (rect 840 48 1016 64)
- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "CLKUSB" (rect 90 0 147 15)(font "Arial" ))
- (pt 0 8)
- (drawing
- (line (pt 0 8)(pt 52 8)(line_width 1))
- (line (pt 52 4)(pt 78 4)(line_width 1))
- (line (pt 52 12)(pt 78 12)(line_width 1))
- (line (pt 52 12)(pt 52 4)(line_width 1))
- (line (pt 78 4)(pt 82 8)(line_width 1))
- (line (pt 82 8)(pt 78 12)(line_width 1))
- (line (pt 78 12)(pt 82 8)(line_width 1))
- )
- (annotation_block (location)(rect 1000 64 1056 80))
+ (annotation_block (location)(rect 2312 1800 2368 1816))
)
(pin
(output)
(rect 1832 856 2008 872)
- (text "OUTPUT" (rect 1 0 51 13)(font "Arial" (font_size 6)))
- (text "LPDIR" (rect 90 0 132 15)(font "Arial" ))
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "LPDIR" (rect 90 0 123 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8)(line_width 1))
@@ -2078,13 +1993,81 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
- (annotation_block (location)(rect 2008 864 2064 880))
+ (annotation_block (location)(rect 2008 872 2096 904))
+)
+(pin
+ (output)
+ (rect 1920 2280 2096 2296)
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "MIDI_OLR" (rect 90 0 141 12)(font "Arial" ))
+ (pt 0 8)
+ (drawing
+ (line (pt 0 8)(pt 52 8)(line_width 1))
+ (line (pt 52 4)(pt 78 4)(line_width 1))
+ (line (pt 52 12)(pt 78 12)(line_width 1))
+ (line (pt 52 12)(pt 52 4)(line_width 1))
+ (line (pt 78 4)(pt 82 8)(line_width 1))
+ (line (pt 82 8)(pt 78 12)(line_width 1))
+ (line (pt 78 12)(pt 82 8)(line_width 1))
+ )
+ (annotation_block (location)(rect 2096 2296 2144 2312))
+)
+(pin
+ (output)
+ (rect 920 -24 1096 -8)
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "CLK25M" (rect 90 0 131 12)(font "Arial" ))
+ (pt 0 8)
+ (drawing
+ (line (pt 0 8)(pt 52 8)(line_width 1))
+ (line (pt 52 4)(pt 78 4)(line_width 1))
+ (line (pt 52 12)(pt 78 12)(line_width 1))
+ (line (pt 52 12)(pt 52 4)(line_width 1))
+ (line (pt 78 4)(pt 82 8)(line_width 1))
+ (line (pt 82 8)(pt 78 12)(line_width 1))
+ (line (pt 78 12)(pt 82 8)(line_width 1))
+ )
+ (annotation_block (location)(rect 1096 -24 1144 -8))
+)
+(pin
+ (output)
+ (rect 808 240 984 256)
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "CLKUSB" (rect 90 0 133 12)(font "Arial" ))
+ (pt 0 8)
+ (drawing
+ (line (pt 0 8)(pt 52 8)(line_width 1))
+ (line (pt 52 4)(pt 78 4)(line_width 1))
+ (line (pt 52 12)(pt 78 12)(line_width 1))
+ (line (pt 52 12)(pt 52 4)(line_width 1))
+ (line (pt 78 4)(pt 82 8)(line_width 1))
+ (line (pt 82 8)(pt 78 12)(line_width 1))
+ (line (pt 78 12)(pt 82 8)(line_width 1))
+ )
+ (annotation_block (location)(rect 984 240 1032 256))
+)
+(pin
+ (output)
+ (rect 816 272 992 288)
+ (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
+ (text "CLK24M576" (rect 90 0 149 12)(font "Arial" ))
+ (pt 0 8)
+ (drawing
+ (line (pt 0 8)(pt 52 8)(line_width 1))
+ (line (pt 52 4)(pt 78 4)(line_width 1))
+ (line (pt 52 12)(pt 78 12)(line_width 1))
+ (line (pt 52 12)(pt 52 4)(line_width 1))
+ (line (pt 78 4)(pt 82 8)(line_width 1))
+ (line (pt 82 8)(pt 78 12)(line_width 1))
+ (line (pt 78 12)(pt 82 8)(line_width 1))
+ )
+ (annotation_block (location)(rect 992 272 1056 288))
)
(pin
(bidir)
(rect 1840 1088 2016 1104)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "SCSI_PAR" (rect 90 0 159 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "SCSI_PAR" (rect 90 0 144 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2095,14 +2078,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2016 1104 2080 1120))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2016 1104 2064 1120))
)
(pin
(bidir)
(rect 1840 1184 2016 1200)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "nSCSI_RST" (rect 90 0 167 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "nSCSI_RST" (rect 90 0 149 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2113,14 +2096,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2016 1200 2072 1216))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2016 1200 2064 1216))
)
(pin
(bidir)
(rect 1840 1208 2016 1224)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "nSCSI_SEL" (rect 90 0 166 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "nSCSI_SEL" (rect 90 0 147 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2131,14 +2114,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2016 1224 2080 1240))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2016 1224 2064 1240))
)
(pin
(bidir)
(rect 1840 1232 2016 1248)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "nSCSI_BUSY" (rect 90 0 177 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "nSCSI_BUSY" (rect 90 0 158 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2149,14 +2132,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2016 1248 2072 1264))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2016 1248 2064 1264))
)
(pin
(bidir)
(rect 1856 1992 2032 2008)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "SD_CD_DATA3" (rect 90 0 191 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "SD_CD_DATA3" (rect 90 0 167 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2167,14 +2150,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2032 2008 2096 2024))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2032 2008 2088 2024))
)
(pin
(bidir)
(rect 1856 2016 2032 2032)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "SD_CMD_D1" (rect 90 0 177 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "SD_CMD_D1" (rect 90 0 156 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2185,14 +2168,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2032 2032 2096 2048))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2032 2032 2088 2048))
)
(pin
(bidir)
(rect 1936 1064 2112 1080)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "SCSI_D[7..0]" (rect 90 0 172 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "SCSI_D[7..0]" (rect 90 0 156 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2203,14 +2186,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2112 1080 2176 1208))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2112 1080 2160 1192))
)
(pin
(bidir)
(rect 1904 888 2080 904)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "ACSI_D[7..0]" (rect 90 0 171 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "ACSI_D[7..0]" (rect 90 0 156 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2221,14 +2204,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2080 904 2144 1032))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2080 904 2128 1016))
)
(pin
(bidir)
(rect 1960 808 2136 824)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "LP_D[7..0]" (rect 90 0 157 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "LP_D[7..0]" (rect 90 0 143 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2239,14 +2222,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2136 824 2200 952))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2136 824 2224 952))
)
(pin
(bidir)
(rect 176 1360 352 1376)
- (text "BIDIR" (rect 151 0 182 13)(font "Arial" (font_size 6)))
- (text "FB_AD[31..0]" (rect 5 0 88 15)(font "Arial" ))
+ (text "BIDIR" (rect 151 0 175 10)(font "Arial" (font_size 6)))
+ (text "FB_AD[31..0]" (rect 19 0 86 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 120 4)(pt 98 4)(line_width 1))
@@ -2258,14 +2241,14 @@ applicable agreement for further details.
(line (pt 124 8)(pt 120 12)(line_width 1))
)
(flipy)
- (text "VCC" (rect 152 7 176 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 96 840 168 1352))
+ (text "VCC" (rect 152 7 172 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 352 1376 416 1824))
)
(pin
(bidir)
(rect 2104 3232 2280 3248)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "IO[17..0]" (rect 90 0 143 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "IO[17..0]" (rect 90 0 133 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2276,14 +2259,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2280 3248 2344 3536))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2280 3248 2368 3632))
)
(pin
(bidir)
(rect 1944 3256 2120 3272)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "SRD[15..0]" (rect 90 0 159 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "SRD[15..0]" (rect 90 0 145 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2294,14 +2277,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2120 3272 2184 3528))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2120 3272 2208 3512))
)
(pin
(bidir)
(rect 2040 536 2216 552)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "VDQS[3..0]" (rect 90 0 159 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "VDQS[3..0]" (rect 90 0 146 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2312,14 +2295,14 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2216 552 2288 632))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2216 552 2280 624))
)
(pin
(bidir)
(rect 2648 296 2824 312)
- (text "BIDIR" (rect 1 0 32 13)(font "Arial" (font_size 6)))
- (text "VD[31..0]" (rect 90 0 147 15)(font "Arial" ))
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "VD[31..0]" (rect 90 0 137 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4)(line_width 1))
@@ -2330,29 +2313,89 @@ applicable agreement for further details.
(line (pt 56 4)(pt 52 8)(line_width 1))
(line (pt 52 8)(pt 56 12)(line_width 1))
)
- (text "VCC" (rect 4 7 28 20)(font "Arial" (font_size 6)))
- (annotation_block (location)(rect 2824 312 2896 840))
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2824 312 2888 776))
+)
+(pin
+ (bidir)
+ (rect 1960 2200 2136 2216)
+ (text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
+ (text "MIDI_IN_PIN" (rect 90 0 156 12)(font "Arial" ))
+ (pt 0 8)
+ (drawing
+ (line (pt 56 4)(pt 78 4)(line_width 1))
+ (line (pt 0 8)(pt 52 8)(line_width 1))
+ (line (pt 56 12)(pt 78 12)(line_width 1))
+ (line (pt 78 4)(pt 82 8)(line_width 1))
+ (line (pt 78 12)(pt 82 8)(line_width 1))
+ (line (pt 56 4)(pt 52 8)(line_width 1))
+ (line (pt 52 8)(pt 56 12)(line_width 1))
+ )
+ (text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 2136 2216 2192 2232))
)
(symbol
- (rect 544 2024 688 2088)
- (text "lpm_counter0" (rect 33 1 148 20)(font "Arial" (font_size 10)))
- (text "inst18" (rect 8 48 48 63)(font "Arial" ))
+ (rect 464 1336 608 1432)
+ (text "lpm_ff0" (rect 52 1 100 17)(font "Arial" (font_size 10)))
+ (text "inst1" (rect 8 80 31 92)(font "Arial" ))
(port
(pt 0 32)
(input)
- (text "clock" (rect 0 0 36 16)(font "Arial" (font_size 8)))
- (text "clock" (rect 26 26 62 42)(font "Arial" (font_size 8)))
+ (text "data[31..0]" (rect 0 0 60 14)(font "Arial" (font_size 8)))
+ (text "data[31..0]" (rect 20 26 80 40)(font "Arial" (font_size 8)))
+ (line (pt 0 32)(pt 16 32)(line_width 3))
+ )
+ (port
+ (pt 0 48)
+ (input)
+ (text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))
+ (text "clock" (rect 26 42 55 56)(font "Arial" (font_size 8)))
+ (line (pt 0 48)(pt 16 48)(line_width 1))
+ )
+ (port
+ (pt 0 64)
+ (input)
+ (text "enable" (rect 0 0 37 14)(font "Arial" (font_size 8)))
+ (text "enable" (rect 20 58 57 72)(font "Arial" (font_size 8)))
+ (line (pt 0 64)(pt 16 64)(line_width 1))
+ )
+ (port
+ (pt 144 56)
+ (output)
+ (text "q[31..0]" (rect 0 0 42 14)(font "Arial" (font_size 8)))
+ (text "q[31..0]" (rect 89 50 131 64)(font "Arial" (font_size 8)))
+ (line (pt 144 56)(pt 128 56)(line_width 3))
+ )
+ (drawing
+ (text "DFF" (rect 109 17 131 29)(font "Arial" ))
+ (line (pt 16 16)(pt 128 16)(line_width 1))
+ (line (pt 128 16)(pt 128 80)(line_width 1))
+ (line (pt 128 80)(pt 16 80)(line_width 1))
+ (line (pt 16 80)(pt 16 16)(line_width 1))
+ (line (pt 16 42)(pt 22 48)(line_width 1))
+ (line (pt 22 48)(pt 16 54)(line_width 1))
+ )
+)
+(symbol
+ (rect 544 2024 688 2088)
+ (text "lpm_counter0" (rect 33 1 125 17)(font "Arial" (font_size 10)))
+ (text "inst18" (rect 8 48 37 60)(font "Arial" ))
+ (port
+ (pt 0 32)
+ (input)
+ (text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))
+ (text "clock" (rect 26 26 55 40)(font "Arial" (font_size 8)))
(line (pt 0 32)(pt 16 32)(line_width 1))
)
(port
(pt 144 40)
(output)
- (text "q[17..0]" (rect 0 0 51 16)(font "Arial" (font_size 8)))
- (text "q[17..0]" (rect 89 34 140 50)(font "Arial" (font_size 8)))
+ (text "q[17..0]" (rect 0 0 42 14)(font "Arial" (font_size 8)))
+ (text "q[17..0]" (rect 89 34 131 48)(font "Arial" (font_size 8)))
(line (pt 144 40)(pt 128 40)(line_width 3))
)
(drawing
- (text "up counter" (rect 84 17 152 32)(font "Arial" ))
+ (text "up counter" (rect 84 17 135 29)(font "Arial" ))
(line (pt 16 16)(pt 128 16)(line_width 1))
(line (pt 128 16)(pt 128 48)(line_width 1))
(line (pt 128 48)(pt 16 48)(line_width 1))
@@ -2363,20 +2406,20 @@ applicable agreement for further details.
)
(symbol
(rect 440 2120 488 2152)
- (text "WIRE" (rect 1 0 31 13)(font "Arial" (font_size 6)))
- (text "inst3" (rect 3 21 34 36)(font "Arial" ))
+ (text "WIRE" (rect 1 0 24 10)(font "Arial" (font_size 6)))
+ (text "inst3" (rect 3 21 26 33)(font "Arial" ))
(port
(pt 0 16)
(input)
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 14 16)(line_width 1))
)
(port
(pt 48 16)
(output)
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 32 16)(pt 48 16)(line_width 1))
)
(drawing
@@ -2385,85 +2428,43 @@ applicable agreement for further details.
(line (pt 14 25)(pt 32 16)(line_width 1))
)
)
-(symbol
- (rect 464 1336 608 1432)
- (text "lpm_ff0" (rect 52 1 114 20)(font "Arial" (font_size 10)))
- (text "inst1" (rect 8 80 39 95)(font "Arial" ))
- (port
- (pt 0 32)
- (input)
- (text "data[31..0]" (rect 0 0 73 16)(font "Arial" (font_size 8)))
- (text "data[31..0]" (rect 20 26 93 42)(font "Arial" (font_size 8)))
- (line (pt 0 32)(pt 16 32)(line_width 3))
- )
- (port
- (pt 0 48)
- (input)
- (text "clock" (rect 0 0 36 16)(font "Arial" (font_size 8)))
- (text "clock" (rect 26 42 62 58)(font "Arial" (font_size 8)))
- (line (pt 0 48)(pt 16 48)(line_width 1))
- )
- (port
- (pt 0 64)
- (input)
- (text "enable" (rect 0 0 44 16)(font "Arial" (font_size 8)))
- (text "enable" (rect 20 58 64 74)(font "Arial" (font_size 8)))
- (line (pt 0 64)(pt 16 64)(line_width 1))
- )
- (port
- (pt 144 56)
- (output)
- (text "q[31..0]" (rect 0 0 51 16)(font "Arial" (font_size 8)))
- (text "q[31..0]" (rect 89 50 140 66)(font "Arial" (font_size 8)))
- (line (pt 144 56)(pt 128 56)(line_width 3))
- )
- (drawing
- (text "DFF" (rect 109 17 136 32)(font "Arial" ))
- (line (pt 16 16)(pt 128 16)(line_width 1))
- (line (pt 128 16)(pt 128 80)(line_width 1))
- (line (pt 128 80)(pt 16 80)(line_width 1))
- (line (pt 16 80)(pt 16 16)(line_width 1))
- (line (pt 16 42)(pt 22 48)(line_width 1))
- (line (pt 22 48)(pt 16 54)(line_width 1))
- )
-)
(symbol
(rect 1880 696 1944 776)
- (text "NOR4" (rect 1 0 34 13)(font "Arial" (font_size 6)))
- (text "inst2" (rect 3 69 34 84)(font "Arial" ))
+ (text "NOR4" (rect 1 0 26 10)(font "Arial" (font_size 6)))
+ (text "inst2" (rect 3 69 26 81)(font "Arial" ))
(port
(pt 0 16)
(input)
- (text "IN1" (rect 2 7 26 23)(font "Courier New" (bold))(invisible))
- (text "IN1" (rect 2 7 26 23)(font "Courier New" (bold))(invisible))
+ (text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
+ (text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 14 16)(line_width 1))
)
(port
(pt 0 48)
(input)
- (text "IN3" (rect 2 39 26 55)(font "Courier New" (bold))(invisible))
- (text "IN3" (rect 2 39 26 55)(font "Courier New" (bold))(invisible))
+ (text "IN3" (rect 2 39 19 51)(font "Courier New" (bold))(invisible))
+ (text "IN3" (rect 2 39 19 51)(font "Courier New" (bold))(invisible))
(line (pt 0 48)(pt 16 48)(line_width 1))
)
(port
(pt 0 32)
(input)
- (text "IN2" (rect 2 23 26 39)(font "Courier New" (bold))(invisible))
- (text "IN2" (rect 2 23 26 39)(font "Courier New" (bold))(invisible))
+ (text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
+ (text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
(line (pt 0 32)(pt 16 32)(line_width 1))
)
(port
(pt 0 64)
(input)
- (text "IN4" (rect 2 55 26 71)(font "Courier New" (bold))(invisible))
- (text "IN4" (rect 2 55 26 71)(font "Courier New" (bold))(invisible))
+ (text "IN4" (rect 2 55 19 67)(font "Courier New" (bold))(invisible))
+ (text "IN4" (rect 2 55 19 67)(font "Courier New" (bold))(invisible))
(line (pt 0 64)(pt 14 64)(line_width 1))
)
(port
(pt 64 40)
(output)
- (text "OUT" (rect 48 31 72 47)(font "Courier New" (bold))(invisible))
- (text "OUT" (rect 48 31 72 47)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 48 31 65 43)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 48 31 65 43)(font "Courier New" (bold))(invisible))
(line (pt 56 40)(pt 64 40)(line_width 1))
)
(drawing
@@ -2479,20 +2480,20 @@ applicable agreement for further details.
)
(symbol
(rect 2632 872 2680 904)
- (text "NOT" (rect 1 0 26 13)(font "Arial" (font_size 6)))
- (text "inst4" (rect 3 21 34 36)(font "Arial" ))
+ (text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
+ (text "inst4" (rect 3 21 26 33)(font "Arial" ))
(port
(pt 0 16)
(input)
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16)(line_width 1))
)
(port
(pt 48 16)
(output)
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16)(line_width 1))
)
(drawing
@@ -2504,41 +2505,41 @@ applicable agreement for further details.
)
(symbol
(rect 1896 -88 2128 32)
- (text "altddio_out3" (rect 81 1 183 20)(font "Arial" (font_size 10)))
- (text "inst5" (rect 8 104 39 119)(font "Arial" ))
+ (text "altddio_out3" (rect 81 1 163 17)(font "Arial" (font_size 10)))
+ (text "inst5" (rect 8 104 31 116)(font "Arial" ))
(port
(pt 0 24)
(input)
- (text "datain_h" (rect 0 0 57 16)(font "Arial" (font_size 8)))
- (text "datain_h" (rect 4 11 61 27)(font "Arial" (font_size 8)))
+ (text "datain_h" (rect 0 0 48 14)(font "Arial" (font_size 8)))
+ (text "datain_h" (rect 4 11 52 25)(font "Arial" (font_size 8)))
(line (pt 0 24)(pt 88 24)(line_width 1))
)
(port
(pt 0 40)
(input)
- (text "datain_l" (rect 0 0 53 16)(font "Arial" (font_size 8)))
- (text "datain_l" (rect 4 27 57 43)(font "Arial" (font_size 8)))
+ (text "datain_l" (rect 0 0 43 14)(font "Arial" (font_size 8)))
+ (text "datain_l" (rect 4 27 47 41)(font "Arial" (font_size 8)))
(line (pt 0 40)(pt 88 40)(line_width 1))
)
(port
(pt 0 56)
(input)
- (text "outclock" (rect 0 0 57 16)(font "Arial" (font_size 8)))
- (text "outclock" (rect 4 43 61 59)(font "Arial" (font_size 8)))
+ (text "outclock" (rect 0 0 47 14)(font "Arial" (font_size 8)))
+ (text "outclock" (rect 4 43 51 57)(font "Arial" (font_size 8)))
(line (pt 0 56)(pt 88 56)(line_width 1))
)
(port
(pt 232 24)
(output)
- (text "dataout" (rect 0 0 50 16)(font "Arial" (font_size 8)))
- (text "dataout" (rect 193 11 243 27)(font "Arial" (font_size 8)))
+ (text "dataout" (rect 0 0 42 14)(font "Arial" (font_size 8)))
+ (text "dataout" (rect 193 11 235 25)(font "Arial" (font_size 8)))
(line (pt 232 24)(pt 152 24)(line_width 1))
)
(drawing
- (text "ddio" (rect 110 27 138 43)(font "Arial" (font_size 8)))
- (text "output" (rect 105 42 147 58)(font "Arial" (font_size 8)))
- (text "power up" (rect 92 74 152 89)(font "Arial" ))
- (text "low" (rect 92 84 114 99)(font "Arial" ))
+ (text "ddio" (rect 110 27 133 41)(font "Arial" (font_size 8)))
+ (text "output" (rect 105 42 140 56)(font "Arial" (font_size 8)))
+ (text "power up" (rect 92 74 135 86)(font "Arial" ))
+ (text "low" (rect 92 84 107 96)(font "Arial" ))
(line (pt 88 16)(pt 152 16)(line_width 1))
(line (pt 152 16)(pt 152 96)(line_width 1))
(line (pt 152 96)(pt 88 96)(line_width 1))
@@ -2547,41 +2548,41 @@ applicable agreement for further details.
)
(symbol
(rect 2464 -104 2696 16)
- (text "altddio_out3" (rect 81 1 183 20)(font "Arial" (font_size 10)))
- (text "inst6" (rect 8 104 39 119)(font "Arial" ))
+ (text "altddio_out3" (rect 81 1 163 17)(font "Arial" (font_size 10)))
+ (text "inst6" (rect 8 104 31 116)(font "Arial" ))
(port
(pt 0 24)
(input)
- (text "datain_h" (rect 0 0 57 16)(font "Arial" (font_size 8)))
- (text "datain_h" (rect 4 11 61 27)(font "Arial" (font_size 8)))
+ (text "datain_h" (rect 0 0 48 14)(font "Arial" (font_size 8)))
+ (text "datain_h" (rect 4 11 52 25)(font "Arial" (font_size 8)))
(line (pt 0 24)(pt 88 24)(line_width 1))
)
(port
(pt 0 40)
(input)
- (text "datain_l" (rect 0 0 53 16)(font "Arial" (font_size 8)))
- (text "datain_l" (rect 4 27 57 43)(font "Arial" (font_size 8)))
+ (text "datain_l" (rect 0 0 43 14)(font "Arial" (font_size 8)))
+ (text "datain_l" (rect 4 27 47 41)(font "Arial" (font_size 8)))
(line (pt 0 40)(pt 88 40)(line_width 1))
)
(port
(pt 0 56)
(input)
- (text "outclock" (rect 0 0 57 16)(font "Arial" (font_size 8)))
- (text "outclock" (rect 4 43 61 59)(font "Arial" (font_size 8)))
+ (text "outclock" (rect 0 0 47 14)(font "Arial" (font_size 8)))
+ (text "outclock" (rect 4 43 51 57)(font "Arial" (font_size 8)))
(line (pt 0 56)(pt 88 56)(line_width 1))
)
(port
(pt 232 24)
(output)
- (text "dataout" (rect 0 0 50 16)(font "Arial" (font_size 8)))
- (text "dataout" (rect 193 11 243 27)(font "Arial" (font_size 8)))
+ (text "dataout" (rect 0 0 42 14)(font "Arial" (font_size 8)))
+ (text "dataout" (rect 193 11 235 25)(font "Arial" (font_size 8)))
(line (pt 232 24)(pt 152 24)(line_width 1))
)
(drawing
- (text "ddio" (rect 110 27 138 43)(font "Arial" (font_size 8)))
- (text "output" (rect 105 42 147 58)(font "Arial" (font_size 8)))
- (text "power up" (rect 92 74 152 89)(font "Arial" ))
- (text "low" (rect 92 84 114 99)(font "Arial" ))
+ (text "ddio" (rect 110 27 133 41)(font "Arial" (font_size 8)))
+ (text "output" (rect 105 42 140 56)(font "Arial" (font_size 8)))
+ (text "power up" (rect 92 74 135 86)(font "Arial" ))
+ (text "low" (rect 92 84 107 96)(font "Arial" ))
(line (pt 88 16)(pt 152 16)(line_width 1))
(line (pt 152 16)(pt 152 96)(line_width 1))
(line (pt 152 96)(pt 88 96)(line_width 1))
@@ -2590,41 +2591,41 @@ applicable agreement for further details.
)
(symbol
(rect 2464 16 2696 136)
- (text "altddio_out3" (rect 81 1 183 20)(font "Arial" (font_size 10)))
- (text "inst8" (rect 8 104 39 119)(font "Arial" ))
+ (text "altddio_out3" (rect 81 1 163 17)(font "Arial" (font_size 10)))
+ (text "inst8" (rect 8 104 31 116)(font "Arial" ))
(port
(pt 0 24)
(input)
- (text "datain_h" (rect 0 0 57 16)(font "Arial" (font_size 8)))
- (text "datain_h" (rect 4 11 61 27)(font "Arial" (font_size 8)))
+ (text "datain_h" (rect 0 0 48 14)(font "Arial" (font_size 8)))
+ (text "datain_h" (rect 4 11 52 25)(font "Arial" (font_size 8)))
(line (pt 0 24)(pt 88 24)(line_width 1))
)
(port
(pt 0 40)
(input)
- (text "datain_l" (rect 0 0 53 16)(font "Arial" (font_size 8)))
- (text "datain_l" (rect 4 27 57 43)(font "Arial" (font_size 8)))
+ (text "datain_l" (rect 0 0 43 14)(font "Arial" (font_size 8)))
+ (text "datain_l" (rect 4 27 47 41)(font "Arial" (font_size 8)))
(line (pt 0 40)(pt 88 40)(line_width 1))
)
(port
(pt 0 56)
(input)
- (text "outclock" (rect 0 0 57 16)(font "Arial" (font_size 8)))
- (text "outclock" (rect 4 43 61 59)(font "Arial" (font_size 8)))
+ (text "outclock" (rect 0 0 47 14)(font "Arial" (font_size 8)))
+ (text "outclock" (rect 4 43 51 57)(font "Arial" (font_size 8)))
(line (pt 0 56)(pt 88 56)(line_width 1))
)
(port
(pt 232 24)
(output)
- (text "dataout" (rect 0 0 50 16)(font "Arial" (font_size 8)))
- (text "dataout" (rect 193 11 243 27)(font "Arial" (font_size 8)))
+ (text "dataout" (rect 0 0 42 14)(font "Arial" (font_size 8)))
+ (text "dataout" (rect 193 11 235 25)(font "Arial" (font_size 8)))
(line (pt 232 24)(pt 152 24)(line_width 1))
)
(drawing
- (text "ddio" (rect 110 27 138 43)(font "Arial" (font_size 8)))
- (text "output" (rect 105 42 147 58)(font "Arial" (font_size 8)))
- (text "power up" (rect 92 74 152 89)(font "Arial" ))
- (text "low" (rect 92 84 114 99)(font "Arial" ))
+ (text "ddio" (rect 110 27 133 41)(font "Arial" (font_size 8)))
+ (text "output" (rect 105 42 140 56)(font "Arial" (font_size 8)))
+ (text "power up" (rect 92 74 135 86)(font "Arial" ))
+ (text "low" (rect 92 84 107 96)(font "Arial" ))
(line (pt 88 16)(pt 152 16)(line_width 1))
(line (pt 152 16)(pt 152 96)(line_width 1))
(line (pt 152 96)(pt 88 96)(line_width 1))
@@ -2633,41 +2634,41 @@ applicable agreement for further details.
)
(symbol
(rect 2464 144 2696 264)
- (text "altddio_out3" (rect 81 1 183 20)(font "Arial" (font_size 10)))
- (text "inst9" (rect 8 104 39 119)(font "Arial" ))
+ (text "altddio_out3" (rect 81 1 163 17)(font "Arial" (font_size 10)))
+ (text "inst9" (rect 8 104 31 116)(font "Arial" ))
(port
(pt 0 24)
(input)
- (text "datain_h" (rect 0 0 57 16)(font "Arial" (font_size 8)))
- (text "datain_h" (rect 4 11 61 27)(font "Arial" (font_size 8)))
+ (text "datain_h" (rect 0 0 48 14)(font "Arial" (font_size 8)))
+ (text "datain_h" (rect 4 11 52 25)(font "Arial" (font_size 8)))
(line (pt 0 24)(pt 88 24)(line_width 1))
)
(port
(pt 0 40)
(input)
- (text "datain_l" (rect 0 0 53 16)(font "Arial" (font_size 8)))
- (text "datain_l" (rect 4 27 57 43)(font "Arial" (font_size 8)))
+ (text "datain_l" (rect 0 0 43 14)(font "Arial" (font_size 8)))
+ (text "datain_l" (rect 4 27 47 41)(font "Arial" (font_size 8)))
(line (pt 0 40)(pt 88 40)(line_width 1))
)
(port
(pt 0 56)
(input)
- (text "outclock" (rect 0 0 57 16)(font "Arial" (font_size 8)))
- (text "outclock" (rect 4 43 61 59)(font "Arial" (font_size 8)))
+ (text "outclock" (rect 0 0 47 14)(font "Arial" (font_size 8)))
+ (text "outclock" (rect 4 43 51 57)(font "Arial" (font_size 8)))
(line (pt 0 56)(pt 88 56)(line_width 1))
)
(port
(pt 232 24)
(output)
- (text "dataout" (rect 0 0 50 16)(font "Arial" (font_size 8)))
- (text "dataout" (rect 193 11 243 27)(font "Arial" (font_size 8)))
+ (text "dataout" (rect 0 0 42 14)(font "Arial" (font_size 8)))
+ (text "dataout" (rect 193 11 235 25)(font "Arial" (font_size 8)))
(line (pt 232 24)(pt 152 24)(line_width 1))
)
(drawing
- (text "ddio" (rect 110 27 138 43)(font "Arial" (font_size 8)))
- (text "output" (rect 105 42 147 58)(font "Arial" (font_size 8)))
- (text "power up" (rect 92 74 152 89)(font "Arial" ))
- (text "low" (rect 92 84 114 99)(font "Arial" ))
+ (text "ddio" (rect 110 27 133 41)(font "Arial" (font_size 8)))
+ (text "output" (rect 105 42 140 56)(font "Arial" (font_size 8)))
+ (text "power up" (rect 92 74 135 86)(font "Arial" ))
+ (text "low" (rect 92 84 107 96)(font "Arial" ))
(line (pt 88 16)(pt 152 16)(line_width 1))
(line (pt 152 16)(pt 152 96)(line_width 1))
(line (pt 152 96)(pt 88 96)(line_width 1))
@@ -2676,13 +2677,13 @@ applicable agreement for further details.
)
(symbol
(rect 2368 120 2400 152)
- (text "GND" (rect 6 8 19 33)(font "Arial" (font_size 6))(vertical))
- (text "inst10" (rect -1 3 14 43)(font "Arial" )(vertical)(invisible))
+ (text "GND" (rect 6 8 16 29)(font "Arial" (font_size 6))(vertical))
+ (text "inst10" (rect -1 3 11 32)(font "Arial" )(vertical)(invisible))
(port
(pt 32 16)
(output)
- (text "1" (rect 18 0 26 16)(font "Courier New" (bold))(invisible))
- (text "1" (rect 20 18 36 26)(font "Courier New" (bold))(vertical)(invisible))
+ (text "1" (rect 18 0 23 12)(font "Courier New" (bold))(invisible))
+ (text "1" (rect 20 18 32 23)(font "Courier New" (bold))(vertical)(invisible))
(line (pt 24 16)(pt 32 16)(line_width 1))
)
(drawing
@@ -2694,13 +2695,13 @@ applicable agreement for further details.
)
(symbol
(rect 2408 144 2424 176)
- (text "VCC" (rect 0 7 13 31)(font "Arial" (font_size 6))(vertical))
- (text "inst11" (rect 5 3 20 43)(font "Arial" )(vertical)(invisible))
+ (text "VCC" (rect 0 7 10 27)(font "Arial" (font_size 6))(vertical))
+ (text "inst11" (rect 5 3 17 32)(font "Arial" )(vertical)(invisible))
(port
(pt 16 16)
(output)
- (text "1" (rect 19 7 27 23)(font "Courier New" (bold))(invisible))
- (text "1" (rect 7 19 23 27)(font "Courier New" (bold))(vertical)(invisible))
+ (text "1" (rect 19 7 24 19)(font "Courier New" (bold))(invisible))
+ (text "1" (rect 7 19 19 24)(font "Courier New" (bold))(vertical)(invisible))
(line (pt 16 16)(pt 8 16)(line_width 1))
)
(drawing
@@ -2710,20 +2711,20 @@ applicable agreement for further details.
)
(symbol
(rect 1800 1728 1848 1760)
- (text "NOT" (rect 1 0 26 13)(font "Arial" (font_size 6)))
- (text "inst14" (rect 3 21 43 36)(font "Arial" ))
+ (text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
+ (text "inst14" (rect 3 21 32 33)(font "Arial" ))
(port
(pt 0 16)
(input)
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16)(line_width 1))
)
(port
(pt 48 16)
(output)
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16)(line_width 1))
)
(drawing
@@ -2735,20 +2736,20 @@ applicable agreement for further details.
)
(symbol
(rect 1856 1752 1904 1784)
- (text "NOT" (rect 1 0 26 13)(font "Arial" (font_size 6)))
- (text "inst15" (rect 3 21 43 36)(font "Arial" ))
+ (text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
+ (text "inst15" (rect 3 21 32 33)(font "Arial" ))
(port
(pt 0 16)
(input)
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16)(line_width 1))
)
(port
(pt 48 16)
(output)
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16)(line_width 1))
)
(drawing
@@ -2760,20 +2761,20 @@ applicable agreement for further details.
)
(symbol
(rect 1800 1776 1848 1808)
- (text "NOT" (rect 1 0 26 13)(font "Arial" (font_size 6)))
- (text "inst16" (rect 3 21 43 36)(font "Arial" ))
+ (text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
+ (text "inst16" (rect 3 21 32 33)(font "Arial" ))
(port
(pt 0 16)
(input)
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16)(line_width 1))
)
(port
(pt 48 16)
(output)
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16)(line_width 1))
)
(drawing
@@ -2785,20 +2786,20 @@ applicable agreement for further details.
)
(symbol
(rect 1856 1800 1904 1832)
- (text "NOT" (rect 1 0 26 13)(font "Arial" (font_size 6)))
- (text "inst17" (rect 3 21 43 36)(font "Arial" ))
+ (text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
+ (text "inst17" (rect 3 21 32 33)(font "Arial" ))
(port
(pt 0 16)
(input)
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16)(line_width 1))
)
(port
(pt 48 16)
(output)
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16)(line_width 1))
)
(drawing
@@ -2810,20 +2811,20 @@ applicable agreement for further details.
)
(symbol
(rect 1800 1824 1848 1856)
- (text "NOT" (rect 1 0 26 13)(font "Arial" (font_size 6)))
- (text "inst19" (rect 3 21 43 36)(font "Arial" ))
+ (text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
+ (text "inst19" (rect 3 21 32 33)(font "Arial" ))
(port
(pt 0 16)
(input)
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16)(line_width 1))
)
(port
(pt 48 16)
(output)
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16)(line_width 1))
)
(drawing
@@ -2835,78 +2836,78 @@ applicable agreement for further details.
)
(symbol
(rect 448 -352 752 -104)
- (text "altpll2" (rect 132 1 179 20)(font "Arial" (font_size 10)))
- (text "inst12" (rect 8 229 48 244)(font "Arial" ))
+ (text "altpll2" (rect 132 1 172 17)(font "Arial" (font_size 10)))
+ (text "inst12" (rect 8 229 37 241)(font "Arial" ))
(port
(pt 0 72)
(input)
- (text "inclk0" (rect 0 0 40 16)(font "Arial" (font_size 8)))
- (text "inclk0" (rect 4 56 44 72)(font "Arial" (font_size 8)))
+ (text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
+ (text "inclk0" (rect 4 56 35 70)(font "Arial" (font_size 8)))
(line (pt 0 72)(pt 48 72)(line_width 1))
)
(port
(pt 304 72)
(output)
- (text "c0" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c0" (rect 287 56 303 72)(font "Arial" (font_size 8)))
+ (text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c0" (rect 287 56 301 70)(font "Arial" (font_size 8)))
(line (pt 304 72)(pt 272 72)(line_width 1))
)
(port
(pt 304 96)
(output)
- (text "c1" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c1" (rect 287 80 303 96)(font "Arial" (font_size 8)))
+ (text "c1" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c1" (rect 287 80 301 94)(font "Arial" (font_size 8)))
(line (pt 304 96)(pt 272 96)(line_width 1))
)
(port
(pt 304 120)
(output)
- (text "c2" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c2" (rect 287 104 303 120)(font "Arial" (font_size 8)))
+ (text "c2" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c2" (rect 287 104 301 118)(font "Arial" (font_size 8)))
(line (pt 304 120)(pt 272 120)(line_width 1))
)
(port
(pt 304 144)
(output)
- (text "c3" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c3" (rect 287 128 303 144)(font "Arial" (font_size 8)))
+ (text "c3" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c3" (rect 287 128 301 142)(font "Arial" (font_size 8)))
(line (pt 304 144)(pt 272 144)(line_width 1))
)
(port
(pt 304 168)
(output)
- (text "c4" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c4" (rect 287 152 303 168)(font "Arial" (font_size 8)))
+ (text "c4" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c4" (rect 287 152 301 166)(font "Arial" (font_size 8)))
(line (pt 304 168)(pt 272 168)(line_width 1))
)
(drawing
- (text "Cyclone III" (rect 229 230 295 245)(font "Arial" ))
- (text "inclk0 frequency: 33.000 MHz" (rect 58 67 244 82)(font "Arial" ))
- (text "Operation Mode: Src Sync Comp" (rect 58 84 266 99)(font "Arial" ))
- (text "Clk " (rect 59 111 83 126)(font "Arial" ))
- (text "Ratio" (rect 85 111 119 126)(font "Arial" ))
- (text "Ph (dg)" (rect 119 111 166 126)(font "Arial" ))
- (text "DC (%)" (rect 164 111 211 126)(font "Arial" ))
- (text "c0" (rect 63 129 78 144)(font "Arial" ))
- (text "4/1" (rect 91 129 111 144)(font "Arial" ))
- (text "240.00" (rect 120 129 164 144)(font "Arial" ))
- (text "50.00" (rect 169 129 205 144)(font "Arial" ))
- (text "c1" (rect 63 147 78 162)(font "Arial" ))
- (text "4/1" (rect 91 147 111 162)(font "Arial" ))
- (text "0.00" (rect 127 147 155 162)(font "Arial" ))
- (text "50.00" (rect 169 147 205 162)(font "Arial" ))
- (text "c2" (rect 63 165 78 180)(font "Arial" ))
- (text "4/1" (rect 91 165 111 180)(font "Arial" ))
- (text "180.00" (rect 120 165 164 180)(font "Arial" ))
- (text "50.00" (rect 169 165 205 180)(font "Arial" ))
- (text "c3" (rect 63 183 78 198)(font "Arial" ))
- (text "4/1" (rect 91 183 111 198)(font "Arial" ))
- (text "105.00" (rect 120 183 164 198)(font "Arial" ))
- (text "50.00" (rect 169 183 205 198)(font "Arial" ))
- (text "c4" (rect 63 201 78 216)(font "Arial" ))
- (text "2/1" (rect 91 201 111 216)(font "Arial" ))
- (text "270.00" (rect 120 201 164 216)(font "Arial" ))
- (text "50.00" (rect 169 201 205 216)(font "Arial" ))
+ (text "Cyclone III" (rect 229 230 284 242)(font "Arial" ))
+ (text "inclk0 frequency: 33.000 MHz" (rect 58 67 205 79)(font "Arial" ))
+ (text "Operation Mode: Src Sync Comp" (rect 58 84 220 96)(font "Arial" ))
+ (text "Clk " (rect 59 111 79 123)(font "Arial" ))
+ (text "Ratio" (rect 85 111 110 123)(font "Arial" ))
+ (text "Ph (dg)" (rect 119 111 154 123)(font "Arial" ))
+ (text "DC (%)" (rect 164 111 200 123)(font "Arial" ))
+ (text "c0" (rect 63 129 74 141)(font "Arial" ))
+ (text "4/1" (rect 91 129 106 141)(font "Arial" ))
+ (text "240.00" (rect 120 129 153 141)(font "Arial" ))
+ (text "50.00" (rect 169 129 196 141)(font "Arial" ))
+ (text "c1" (rect 63 147 74 159)(font "Arial" ))
+ (text "4/1" (rect 91 147 106 159)(font "Arial" ))
+ (text "0.00" (rect 127 147 148 159)(font "Arial" ))
+ (text "50.00" (rect 169 147 196 159)(font "Arial" ))
+ (text "c2" (rect 63 165 74 177)(font "Arial" ))
+ (text "4/1" (rect 91 165 106 177)(font "Arial" ))
+ (text "180.00" (rect 120 165 153 177)(font "Arial" ))
+ (text "50.00" (rect 169 165 196 177)(font "Arial" ))
+ (text "c3" (rect 63 183 74 195)(font "Arial" ))
+ (text "4/1" (rect 91 183 106 195)(font "Arial" ))
+ (text "105.00" (rect 120 183 153 195)(font "Arial" ))
+ (text "50.00" (rect 169 183 196 195)(font "Arial" ))
+ (text "c4" (rect 63 201 74 213)(font "Arial" ))
+ (text "2/1" (rect 91 201 106 213)(font "Arial" ))
+ (text "270.00" (rect 120 201 153 213)(font "Arial" ))
+ (text "50.00" (rect 169 201 196 213)(font "Arial" ))
(line (pt 0 0)(pt 305 0)(line_width 1))
(line (pt 305 0)(pt 305 249)(line_width 1))
(line (pt 0 249)(pt 305 249)(line_width 1))
@@ -2931,20 +2932,20 @@ applicable agreement for further details.
)
(symbol
(rect -16 680 32 712)
- (text "NOT" (rect 1 0 26 13)(font "Arial" (font_size 6)))
- (text "inst23" (rect 3 21 43 36)(font "Arial" ))
+ (text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
+ (text "inst23" (rect 3 21 32 33)(font "Arial" ))
(port
(pt 0 16)
(input)
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
- (text "IN" (rect 2 7 18 23)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
+ (text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16)(line_width 1))
)
(port
(pt 48 16)
(output)
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
- (text "OUT" (rect 32 7 56 23)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
+ (text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16)(line_width 1))
)
(drawing
@@ -2956,132 +2957,132 @@ applicable agreement for further details.
)
(symbol
(rect 192 472 408 768)
- (text "altpll_reconfig1" (rect 54 1 182 20)(font "Arial" (font_size 10)))
- (text "inst7" (rect 8 277 39 292)(font "Arial" ))
+ (text "altpll_reconfig1" (rect 54 1 155 17)(font "Arial" (font_size 10)))
+ (text "inst7" (rect 8 277 31 289)(font "Arial" ))
(port
(pt 0 40)
(input)
- (text "reconfig" (rect 0 0 53 16)(font "Arial" (font_size 8)))
- (text "reconfig" (rect 20 32 73 48)(font "Arial" (font_size 8)))
+ (text "reconfig" (rect 0 0 47 14)(font "Arial" (font_size 8)))
+ (text "reconfig" (rect 20 32 67 46)(font "Arial" (font_size 8)))
(line (pt 0 40)(pt 16 40)(line_width 1))
)
(port
(pt 0 56)
(input)
- (text "read_param" (rect 0 0 80 16)(font "Arial" (font_size 8)))
- (text "read_param" (rect 20 48 100 64)(font "Arial" (font_size 8)))
+ (text "read_param" (rect 0 0 68 14)(font "Arial" (font_size 8)))
+ (text "read_param" (rect 20 48 88 62)(font "Arial" (font_size 8)))
(line (pt 0 56)(pt 16 56)(line_width 1))
)
(port
(pt 0 72)
(input)
- (text "write_param" (rect 0 0 82 16)(font "Arial" (font_size 8)))
- (text "write_param" (rect 20 64 102 80)(font "Arial" (font_size 8)))
+ (text "write_param" (rect 0 0 71 14)(font "Arial" (font_size 8)))
+ (text "write_param" (rect 20 64 91 78)(font "Arial" (font_size 8)))
(line (pt 0 72)(pt 16 72)(line_width 1))
)
(port
(pt 0 96)
(input)
- (text "data_in[8..0]" (rect 0 0 84 16)(font "Arial" (font_size 8)))
- (text "data_in[8..0]" (rect 20 88 104 104)(font "Arial" (font_size 8)))
+ (text "data_in[8..0]" (rect 0 0 69 14)(font "Arial" (font_size 8)))
+ (text "data_in[8..0]" (rect 20 88 89 102)(font "Arial" (font_size 8)))
(line (pt 0 96)(pt 16 96)(line_width 3))
)
(port
(pt 0 112)
(input)
- (text "counter_type[3..0]" (rect 0 0 123 16)(font "Arial" (font_size 8)))
- (text "counter_type[3..0]" (rect 20 104 143 120)(font "Arial" (font_size 8)))
+ (text "counter_type[3..0]" (rect 0 0 103 14)(font "Arial" (font_size 8)))
+ (text "counter_type[3..0]" (rect 20 104 123 118)(font "Arial" (font_size 8)))
(line (pt 0 112)(pt 16 112)(line_width 3))
)
(port
(pt 0 128)
(input)
- (text "counter_param[2..0]" (rect 0 0 136 16)(font "Arial" (font_size 8)))
- (text "counter_param[2..0]" (rect 20 120 156 136)(font "Arial" (font_size 8)))
+ (text "counter_param[2..0]" (rect 0 0 114 14)(font "Arial" (font_size 8)))
+ (text "counter_param[2..0]" (rect 20 120 134 134)(font "Arial" (font_size 8)))
(line (pt 0 128)(pt 16 128)(line_width 3))
)
(port
(pt 0 168)
(input)
- (text "pll_scandataout" (rect 0 0 107 16)(font "Arial" (font_size 8)))
- (text "pll_scandataout" (rect 20 160 127 176)(font "Arial" (font_size 8)))
+ (text "pll_scandataout" (rect 0 0 89 14)(font "Arial" (font_size 8)))
+ (text "pll_scandataout" (rect 20 160 109 174)(font "Arial" (font_size 8)))
(line (pt 0 168)(pt 16 168)(line_width 1))
)
(port
(pt 0 184)
(input)
- (text "pll_scandone" (rect 0 0 89 16)(font "Arial" (font_size 8)))
- (text "pll_scandone" (rect 20 176 109 192)(font "Arial" (font_size 8)))
+ (text "pll_scandone" (rect 0 0 75 14)(font "Arial" (font_size 8)))
+ (text "pll_scandone" (rect 20 176 95 190)(font "Arial" (font_size 8)))
(line (pt 0 184)(pt 16 184)(line_width 1))
)
(port
(pt 0 208)
(input)
- (text "clock" (rect 0 0 36 16)(font "Arial" (font_size 8)))
- (text "clock" (rect 20 200 56 216)(font "Arial" (font_size 8)))
+ (text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))
+ (text "clock" (rect 20 200 49 214)(font "Arial" (font_size 8)))
(line (pt 0 208)(pt 16 208)(line_width 1))
)
(port
(pt 0 224)
(input)
- (text "reset" (rect 0 0 34 16)(font "Arial" (font_size 8)))
- (text "reset" (rect 20 216 54 232)(font "Arial" (font_size 8)))
+ (text "reset" (rect 0 0 29 14)(font "Arial" (font_size 8)))
+ (text "reset" (rect 20 216 49 230)(font "Arial" (font_size 8)))
(line (pt 0 224)(pt 16 224)(line_width 1))
)
(port
(pt 0 248)
(input)
- (text "pll_areset_in" (rect 0 0 86 16)(font "Arial" (font_size 8)))
- (text "pll_areset_in" (rect 20 240 106 256)(font "Arial" (font_size 8)))
+ (text "pll_areset_in" (rect 0 0 71 14)(font "Arial" (font_size 8)))
+ (text "pll_areset_in" (rect 20 240 91 254)(font "Arial" (font_size 8)))
(line (pt 0 248)(pt 16 248)(line_width 1))
)
(port
(pt 216 40)
(output)
- (text "busy" (rect 0 0 33 16)(font "Arial" (font_size 8)))
- (text "busy" (rect 169 32 202 48)(font "Arial" (font_size 8)))
+ (text "busy" (rect 0 0 28 14)(font "Arial" (font_size 8)))
+ (text "busy" (rect 169 32 197 46)(font "Arial" (font_size 8)))
(line (pt 216 40)(pt 200 40)(line_width 1))
)
(port
(pt 216 96)
(output)
- (text "data_out[8..0]" (rect 0 0 94 16)(font "Arial" (font_size 8)))
- (text "data_out[8..0]" (rect 117 88 211 104)(font "Arial" (font_size 8)))
+ (text "data_out[8..0]" (rect 0 0 77 14)(font "Arial" (font_size 8)))
+ (text "data_out[8..0]" (rect 117 88 194 102)(font "Arial" (font_size 8)))
(line (pt 216 96)(pt 200 96)(line_width 3))
)
(port
(pt 216 152)
(output)
- (text "pll_scandata" (rect 0 0 86 16)(font "Arial" (font_size 8)))
- (text "pll_scandata" (rect 124 144 210 160)(font "Arial" (font_size 8)))
+ (text "pll_scandata" (rect 0 0 71 14)(font "Arial" (font_size 8)))
+ (text "pll_scandata" (rect 124 144 195 158)(font "Arial" (font_size 8)))
(line (pt 216 152)(pt 200 152)(line_width 1))
)
(port
(pt 216 168)
(output)
- (text "pll_scanclk" (rect 0 0 76 16)(font "Arial" (font_size 8)))
- (text "pll_scanclk" (rect 132 160 208 176)(font "Arial" (font_size 8)))
+ (text "pll_scanclk" (rect 0 0 62 14)(font "Arial" (font_size 8)))
+ (text "pll_scanclk" (rect 132 160 194 174)(font "Arial" (font_size 8)))
(line (pt 216 168)(pt 200 168)(line_width 1))
)
(port
(pt 216 200)
(output)
- (text "pll_scanclkena" (rect 0 0 101 16)(font "Arial" (font_size 8)))
- (text "pll_scanclkena" (rect 111 192 212 208)(font "Arial" (font_size 8)))
+ (text "pll_scanclkena" (rect 0 0 83 14)(font "Arial" (font_size 8)))
+ (text "pll_scanclkena" (rect 111 192 194 206)(font "Arial" (font_size 8)))
(line (pt 216 200)(pt 200 200)(line_width 1))
)
(port
(pt 216 216)
(output)
- (text "pll_configupdate" (rect 0 0 109 16)(font "Arial" (font_size 8)))
- (text "pll_configupdate" (rect 104 208 213 224)(font "Arial" (font_size 8)))
+ (text "pll_configupdate" (rect 0 0 93 14)(font "Arial" (font_size 8)))
+ (text "pll_configupdate" (rect 104 208 197 222)(font "Arial" (font_size 8)))
(line (pt 216 216)(pt 200 216)(line_width 1))
)
(port
(pt 216 248)
(output)
- (text "pll_areset" (rect 0 0 66 16)(font "Arial" (font_size 8)))
- (text "pll_areset" (rect 141 240 207 256)(font "Arial" (font_size 8)))
+ (text "pll_areset" (rect 0 0 55 14)(font "Arial" (font_size 8)))
+ (text "pll_areset" (rect 141 240 196 254)(font "Arial" (font_size 8)))
(line (pt 216 248)(pt 200 248)(line_width 1))
)
(drawing
@@ -3097,90 +3098,90 @@ applicable agreement for further details.
)
(symbol
(rect 608 496 984 728)
- (text "altpll4" (rect 168 1 215 20)(font "Arial" (font_size 10)))
- (text "inst22" (rect 8 213 48 228)(font "Arial" ))
+ (text "altpll4" (rect 168 1 208 17)(font "Arial" (font_size 10)))
+ (text "inst22" (rect 8 213 37 225)(font "Arial" ))
(port
(pt 0 72)
(input)
- (text "inclk0" (rect 0 0 40 16)(font "Arial" (font_size 8)))
- (text "inclk0" (rect 4 56 44 72)(font "Arial" (font_size 8)))
+ (text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
+ (text "inclk0" (rect 4 56 35 70)(font "Arial" (font_size 8)))
(line (pt 0 72)(pt 88 72)(line_width 1))
)
(port
(pt 0 96)
(input)
- (text "areset" (rect 0 0 42 16)(font "Arial" (font_size 8)))
- (text "areset" (rect 4 80 46 96)(font "Arial" (font_size 8)))
+ (text "areset" (rect 0 0 36 14)(font "Arial" (font_size 8)))
+ (text "areset" (rect 4 80 40 94)(font "Arial" (font_size 8)))
(line (pt 0 96)(pt 88 96)(line_width 1))
)
(port
(pt 0 120)
(input)
- (text "scanclk" (rect 0 0 53 16)(font "Arial" (font_size 8)))
- (text "scanclk" (rect 4 104 57 120)(font "Arial" (font_size 8)))
+ (text "scanclk" (rect 0 0 43 14)(font "Arial" (font_size 8)))
+ (text "scanclk" (rect 4 104 47 118)(font "Arial" (font_size 8)))
(line (pt 0 120)(pt 88 120)(line_width 1))
)
(port
(pt 0 144)
(input)
- (text "scandata" (rect 0 0 62 16)(font "Arial" (font_size 8)))
- (text "scandata" (rect 4 128 66 144)(font "Arial" (font_size 8)))
+ (text "scandata" (rect 0 0 53 14)(font "Arial" (font_size 8)))
+ (text "scandata" (rect 4 128 57 142)(font "Arial" (font_size 8)))
(line (pt 0 144)(pt 88 144)(line_width 1))
)
(port
(pt 0 168)
(input)
- (text "scanclkena" (rect 0 0 77 16)(font "Arial" (font_size 8)))
- (text "scanclkena" (rect 4 152 81 168)(font "Arial" (font_size 8)))
+ (text "scanclkena" (rect 0 0 64 14)(font "Arial" (font_size 8)))
+ (text "scanclkena" (rect 4 152 68 166)(font "Arial" (font_size 8)))
(line (pt 0 168)(pt 88 168)(line_width 1))
)
(port
(pt 0 192)
(input)
- (text "configupdate" (rect 0 0 86 16)(font "Arial" (font_size 8)))
- (text "configupdate" (rect 4 176 90 192)(font "Arial" (font_size 8)))
+ (text "configupdate" (rect 0 0 74 14)(font "Arial" (font_size 8)))
+ (text "configupdate" (rect 4 176 78 190)(font "Arial" (font_size 8)))
(line (pt 0 192)(pt 88 192)(line_width 1))
)
(port
(pt 376 72)
(output)
- (text "c0" (rect 0 0 16 16)(font "Arial" (font_size 8)))
- (text "c0" (rect 359 56 375 72)(font "Arial" (font_size 8)))
+ (text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c0" (rect 359 56 373 70)(font "Arial" (font_size 8)))
(line (pt 376 72)(pt 288 72)(line_width 1))
)
(port
(pt 376 96)
(output)
- (text "scandataout" (rect 0 0 83 16)(font "Arial" (font_size 8)))
- (text "scandataout" (rect 302 80 385 96)(font "Arial" (font_size 8)))
+ (text "scandataout" (rect 0 0 70 14)(font "Arial" (font_size 8)))
+ (text "scandataout" (rect 302 80 372 94)(font "Arial" (font_size 8)))
(line (pt 376 96)(pt 288 96)(line_width 1))
)
(port
(pt 376 120)
(output)
- (text "scandone" (rect 0 0 66 16)(font "Arial" (font_size 8)))
- (text "scandone" (rect 317 104 383 120)(font "Arial" (font_size 8)))
+ (text "scandone" (rect 0 0 56 14)(font "Arial" (font_size 8)))
+ (text "scandone" (rect 317 104 373 118)(font "Arial" (font_size 8)))
(line (pt 376 120)(pt 288 120)(line_width 1))
)
(port
(pt 376 144)
(output)
- (text "locked" (rect 0 0 44 16)(font "Arial" (font_size 8)))
- (text "locked" (rect 335 128 379 144)(font "Arial" (font_size 8)))
+ (text "locked" (rect 0 0 36 14)(font "Arial" (font_size 8)))
+ (text "locked" (rect 335 128 371 142)(font "Arial" (font_size 8)))
(line (pt 376 144)(pt 288 144)(line_width 1))
)
(drawing
- (text "Cyclone III" (rect 301 214 367 229)(font "Arial" ))
- (text "inclk0 frequency: 48.000 MHz" (rect 98 123 284 138)(font "Arial" ))
- (text "Operation Mode: Normal" (rect 98 140 256 155)(font "Arial" ))
- (text "Clk " (rect 99 167 123 182)(font "Arial" ))
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+ (text "DSP" (rect 5 5 28 19)(font "Arial" (font_size 8))) (text "Mathias_Alles" (rect 5 602 72 614)(font "Arial" )) (block_io "CLK33M" (input))
(block_io "MAIN_CLK" (input))
(block_io "nFB_OE" (input))
(block_io "nFB_WR" (input))
@@ -3507,651 +3590,9 @@ applicable agreement for further details.
(bidir)
)
)
-(block
- (rect 1264 2344 1672 2904)
- (text "interrupt_handler" (rect 5 5 118 21)(font "Arial" (font_size 8))) (text "nobody" (rect 5 546 52 561)(font "Arial" )) (block_io "MAIN_CLK" (input))
- (block_io "nFB_WR" (input))
- (block_io "nFB_CS1" (input))
- (block_io "nFB_CS2" (input))
- (block_io "FB_SIZE0" (input))
- (block_io "FB_SIZE1" (input))
- (block_io "FB_ADR[31..0]" (input))
- (block_io "PIC_INT" (input))
- (block_io "E0_INT" (input))
- (block_io "DVI_INT" (input))
- (block_io "nPCI_INTA" (input))
- (block_io "nPCI_INTB" (input))
- (block_io "nPCI_INTC" (input))
- (block_io "nPCI_INTD" (input))
- (block_io "nMFP_INT" (input))
- (block_io "nFB_OE" (input))
- (block_io "DSP_INT" (input))
- (block_io "VSYNC" (input))
- (block_io "HSYNC" (input))
- (block_io "DMA_DRQ" (input))
- (block_io "nIRQ[7..2]" (output))
- (block_io "INT_HANDLER_TA" (output))
- (block_io "ACP_CONF[31..0]" (output))
- (block_io "TIN0" (output))
- (block_io "FB_AD[31..0]" (bidir))
- (mapper
- (pt 0 136)
- (bidir)
- )
- (mapper
- (pt 0 160)
- (bidir)
- )
- (mapper
- (pt 0 184)
- (bidir)
- )
- (mapper
- (pt 0 88)
- (bidir)
- )
- (mapper
- (pt 0 112)
- (bidir)
- )
- (mapper
- (pt 0 40)
- (bidir)
- )
- (mapper
- (pt 408 56)
- (bidir)
- )
- (mapper
- (pt 408 80)
- (bidir)
- )
- (mapper
- (pt 0 256)
- (bidir)
- )
- (mapper
- (pt 0 280)
- (bidir)
- )
- (mapper
- (pt 0 304)
- (bidir)
- )
- (mapper
- (pt 0 208)
- (bidir)
- )
- (mapper
- (pt 0 64)
- (bidir)
- )
- (mapper
- (pt 0 376)
- (bidir)
- )
- (mapper
- (pt 0 400)
- (bidir)
- )
- (mapper
- (pt 0 328)
- (bidir)
- )
- (mapper
- (pt 0 352)
- (bidir)
- )
- (mapper
- (pt 0 432)
- (bidir)
- )
- (mapper
- (pt 0 456)
- (bidir)
- )
- (mapper
- (pt 0 480)
- (bidir)
- )
- (mapper
- (pt 0 504)
- (bidir)
- )
- (mapper
- (pt 408 504)
- (bidir)
- )
- (mapper
- (pt 0 528)
- (bidir)
- )
- (mapper
- (pt 408 240)
- (bidir)
- )
- (mapper
- (pt 408 296)
- (bidir)
- )
-)
-(block
- (rect 1264 744 1672 2264)
- (text "FalconIO_SDCard_IDE_CF" (rect 5 5 189 21)(font "Arial" (font_size 8))) (text "Wolfgang_Foerster_and_Fredi_Aschwanden" (rect 5 1506 295 1521)(font "Arial" )) (block_io "CLK33M" (input))
- (block_io "MAIN_CLK" (input))
- (block_io "CLK2M" (input))
- (block_io "CLK500k" (input))
- (block_io "nFB_CS1" (input))
- (block_io "FB_SIZE0" (input))
- (block_io "FB_SIZE1" (input))
- (block_io "nFB_BURST" (input))
- (block_io "FB_ADR[31..0]" (input))
- (block_io "LP_BUSY" (input))
- (block_io "nACSI_DRQ" (input))
- (block_io "nACSI_INT" (input))
- (block_io "nSCSI_DRQ" (input))
- (block_io "nSCSI_MSG" (input))
- (block_io "MIDI_IN" (input))
- (block_io "RxD" (input))
- (block_io "CTS" (input))
- (block_io "RI" (input))
- (block_io "DCD" (input))
- (block_io "AMKB_RX" (input))
- (block_io "PIC_AMKB_RX" (input))
- (block_io "IDE_RDY" (input))
- (block_io "IDE_INT" (input))
- (block_io "WP_CS_CARD" (input))
- (block_io "nINDEX" (input))
- (block_io "TRACK00" (input))
- (block_io "nRD_DATA" (input))
- (block_io "nDCHG" (input))
- (block_io "SD_DATA0" (input))
- (block_io "SD_DATA1" (input))
- (block_io "SD_DATA2" (input))
- (block_io "SD_CARD_DEDECT" (input))
- (block_io "SD_WP" (input))
- (block_io "nDACK0" (input))
- (block_io "nFB_WR" (input))
- (block_io "WP_CF_CARD" (input))
- (block_io "nWP" (input))
- (block_io "nFB_CS2" (input))
- (block_io "nRSTO" (input))
- (block_io "nSCSI_C_D" (input))
- (block_io "nSCSI_I_O" (input))
- (block_io "CLK2M4576" (input))
- (block_io "nFB_OE" (input))
- (block_io "VSYNC" (input))
- (block_io "HSYNC" (input))
- (block_io "DSP_INT" (input))
- (block_io "nBLANK" (input))
- (block_io "FDC_CLK" (input))
- (block_io "FB_ALE" (input))
- (block_io "ACP_CONF[31..24]" (input))
- (block_io "HD_DD" (input))
- (block_io "nIDE_CS1" (output))
- (block_io "nIDE_CS0" (output))
- (block_io "LP_STR" (output))
- (block_io "LP_DIR" (output))
- (block_io "nACSI_ACK" (output))
- (block_io "nACSI_RESET" (output))
- (block_io "nACSI_CS" (output))
- (block_io "ACSI_DIR" (output))
- (block_io "ACSI_A1" (output))
- (block_io "nSCSI_ACK" (output))
- (block_io "nSCSI_ATN" (output))
- (block_io "SCSI_DIR" (output))
- (block_io "SD_CLK" (output))
- (block_io "YM_QA" (output))
- (block_io "YM_QC" (output))
- (block_io "YM_QB" (output))
- (block_io "nSDSEL" (output))
- (block_io "STEP" (output))
- (block_io "MOT_ON" (output))
- (block_io "nRP_LDS" (output))
- (block_io "nRP_UDS" (output))
- (block_io "nROM4" (output))
- (block_io "nROM3" (output))
- (block_io "nCF_CS1" (output))
- (block_io "nCF_CS0" (output))
- (block_io "nIDE_RD" (output))
- (block_io "nIDE_WR" (output))
- (block_io "AMKB_TX" (output))
- (block_io "IDE_RES" (output))
- (block_io "DTR" (output))
- (block_io "RTS" (output))
- (block_io "TxD" (output))
- (block_io "MIDI_OLR" (output))
- (block_io "MIDI_TLR" (output))
- (block_io "nDREQ0" (output))
- (block_io "DSA_D" (output))
- (block_io "nMFP_INT" (output))
- (block_io "FALCON_IO_TA" (output))
- (block_io "STEP_DIR" (output))
- (block_io "WR_DATA" (output))
- (block_io "WR_GATE" (output))
- (block_io "DMA_DRQ" (output))
- (block_io "FB_AD[31..0]" (bidir))
- (block_io "LP_D[7..0]" (bidir))
- (block_io "ACSI_D[7..0]" (bidir))
- (block_io "SCSI_D[7..0]" (bidir))
- (block_io "SCSI_PAR" (bidir))
- (block_io "nSCSI_SEL" (bidir))
- (block_io "nSCSI_BUSY" (bidir))
- (block_io "nSCSI_RST" (bidir))
- (block_io "SD_CD_DATA3" (bidir))
- (block_io "SD_CDM_D1" (bidir))
- (mapper
- (pt 0 128)
- (bidir)
- )
- (mapper
- (pt 0 104)
- (bidir)
- )
- (mapper
- (pt 0 56)
- (bidir)
- )
- (mapper
- (pt 0 80)
- (bidir)
- )
- (mapper
- (pt 0 224)
- (bidir)
- )
- (mapper
- (pt 0 248)
- (bidir)
- )
- (mapper
- (pt 0 272)
- (bidir)
- )
- (mapper
- (pt 408 96)
- (bidir)
- )
- (mapper
- (pt 408 120)
- (bidir)
- )
- (mapper
- (pt 408 72)
- (bidir)
- )
- (mapper
- (pt 408 152)
- (bidir)
- )
- (mapper
- (pt 408 200)
- (bidir)
- )
- (mapper
- (pt 408 224)
- (bidir)
- )
- (mapper
- (pt 408 248)
- (bidir)
- )
- (mapper
- (pt 408 272)
- (bidir)
- )
- (mapper
- (pt 408 296)
- (bidir)
- )
- (mapper
- (pt 408 424)
- (bidir)
- )
- (mapper
- (pt 408 352)
- (bidir)
- )
- (mapper
- (pt 408 328)
- (bidir)
- )
- (mapper
- (pt 408 448)
- (bidir)
- )
- (mapper
- (pt 408 400)
- (bidir)
- )
- (mapper
- (pt 408 376)
- (bidir)
- )
- (mapper
- (pt 408 472)
- (bidir)
- )
- (mapper
- (pt 408 496)
- (bidir)
- )
- (mapper
- (pt 408 608)
- (bidir)
- )
- (mapper
- (pt 408 632)
- (bidir)
- )
- (mapper
- (pt 408 528)
- (bidir)
- )
- (mapper
- (pt 408 552)
- (bidir)
- )
- (mapper
- (pt 408 584)
- (bidir)
- )
- (mapper
- (pt 0 624)
- (bidir)
- )
- (mapper
- (pt 0 656)
- (bidir)
- )
- (mapper
- (pt 0 680)
- (bidir)
- )
- (mapper
- (pt 0 704)
- (bidir)
- )
- (mapper
- (pt 0 728)
- (bidir)
- )
- (mapper
- (pt 0 752)
- (bidir)
- )
- (mapper
- (pt 0 776)
- (bidir)
- )
- (mapper
- (pt 408 664)
- (bidir)
- )
- (mapper
- (pt 0 808)
- (bidir)
- )
- (mapper
- (pt 0 832)
- (bidir)
- )
- (mapper
- (pt 408 696)
- (bidir)
- )
- (mapper
- (pt 408 720)
- (bidir)
- )
- (mapper
- (pt 408 744)
- (bidir)
- )
- (mapper
- (pt 408 768)
- (bidir)
- )
- (mapper
- (pt 408 792)
- (bidir)
- )
- (mapper
- (pt 408 816)
- (bidir)
- )
- (mapper
- (pt 408 840)
- (bidir)
- )
- (mapper
- (pt 0 856)
- (bidir)
- )
- (mapper
- (pt 408 872)
- (bidir)
- )
- (mapper
- (pt 408 896)
- (bidir)
- )
- (mapper
- (pt 408 920)
- (bidir)
- )
- (mapper
- (pt 408 944)
- (bidir)
- )
- (mapper
- (pt 0 912)
- (bidir)
- )
- (mapper
- (pt 0 936)
- (bidir)
- )
- (mapper
- (pt 0 960)
- (bidir)
- )
- (mapper
- (pt 0 984)
- (bidir)
- )
- (mapper
- (pt 0 1008)
- (bidir)
- )
- (mapper
- (pt 408 976)
- (bidir)
- )
- (mapper
- (pt 408 1000)
- (bidir)
- )
- (mapper
- (pt 408 1072)
- (bidir)
- )
- (mapper
- (pt 408 1096)
- (bidir)
- )
- (mapper
- (pt 408 1176)
- (bidir)
- )
- (mapper
- (pt 0 296)
- (bidir)
- )
- (mapper
- (pt 408 1256)
- (bidir)
- )
- (mapper
- (pt 0 1040)
- (bidir)
- )
- (mapper
- (pt 0 1064)
- (bidir)
- )
- (mapper
- (pt 0 1088)
- (bidir)
- )
- (mapper
- (pt 0 1112)
- (bidir)
- )
- (mapper
- (pt 0 1136)
- (bidir)
- )
- (mapper
- (pt 0 432)
- (bidir)
- )
- (mapper
- (pt 0 464)
- (bidir)
- )
- (mapper
- (pt 0 488)
- (bidir)
- )
- (mapper
- (pt 0 520)
- (bidir)
- )
- (mapper
- (pt 0 544)
- (bidir)
- )
- (mapper
- (pt 0 568)
- (bidir)
- )
- (mapper
- (pt 0 592)
- (bidir)
- )
- (mapper
- (pt 408 1424)
- (bidir)
- )
- (mapper
- (pt 0 320)
- (bidir)
- )
- (mapper
- (pt 0 200)
- (bidir)
- )
- (mapper
- (pt 0 344)
- (bidir)
- )
- (mapper
- (pt 0 1168)
- (bidir)
- )
- (mapper
- (pt 0 1192)
- (bidir)
- )
- (mapper
- (pt 0 368)
- (bidir)
- )
- (mapper
- (pt 0 392)
- (bidir)
- )
- (mapper
- (pt 0 176)
- (bidir)
- )
- (mapper
- (pt 0 1216)
- (bidir)
- )
- (mapper
- (pt 408 48)
- (bidir)
- )
- (mapper
- (pt 408 16)
- (bidir)
- )
- (mapper
- (pt 0 1240)
- (bidir)
- )
- (mapper
- (pt 408 1304)
- (bidir)
- )
- (mapper
- (pt 408 1200)
- (bidir)
- )
- (mapper
- (pt 408 1344)
- (bidir)
- )
- (mapper
- (pt 408 1280)
- (bidir)
- )
- (mapper
- (pt 408 1224)
- (bidir)
- )
- (mapper
- (pt 408 1120)
- (bidir)
- )
- (mapper
- (pt 408 1048)
- (bidir)
- )
- (mapper
- (pt 408 1024)
- (bidir)
- )
- (mapper
- (pt 0 32)
- (bidir)
- )
- (mapper
- (pt 0 152)
- (bidir)
- )
- (mapper
- (pt 408 1368)
- (bidir)
- )
- (mapper
- (pt 0 1264)
- (bidir)
- )
- (mapper
- (pt 0 1336)
- (bidir)
- )
- (mapper
- (pt 0 888)
- (bidir)
- )
-)
(block
(rect 1264 -48 1672 728)
- (text "Video" (rect 5 5 43 21)(font "Arial" (font_size 8))) (text "Fredi_Aschwanden" (rect 5 762 130 777)(font "Arial" )) (block_io "FB_ADR[31..0]" (input))
+ (text "Video" (rect 5 5 38 19)(font "Arial" (font_size 8))) (text "Fredi_Aschwanden" (rect 5 762 97 774)(font "Arial" )) (block_io "FB_ADR[31..0]" (input))
(block_io "MAIN_CLK" (input))
(block_io "nFB_CS1" (input))
(block_io "nFB_CS2" (input))
@@ -4362,667 +3803,861 @@ applicable agreement for further details.
(bidir)
)
)
-(connector
- (text "FB_AD[31..0]" (rect 1682 776 1765 791)(font "Arial" ))
- (pt 1832 792)
- (pt 1672 792)
- (bus)
+(block
+ (rect 1264 2344 1672 2904)
+ (text "interrupt_handler" (rect 5 5 101 19)(font "Arial" (font_size 8))) (text "nobody" (rect 5 546 41 558)(font "Arial" )) (block_io "MAIN_CLK" (input))
+ (block_io "nFB_WR" (input))
+ (block_io "nFB_CS1" (input))
+ (block_io "nFB_CS2" (input))
+ (block_io "FB_SIZE0" (input))
+ (block_io "FB_SIZE1" (input))
+ (block_io "FB_ADR[31..0]" (input))
+ (block_io "PIC_INT" (input))
+ (block_io "E0_INT" (input))
+ (block_io "DVI_INT" (input))
+ (block_io "nPCI_INTA" (input))
+ (block_io "nPCI_INTB" (input))
+ (block_io "nPCI_INTC" (input))
+ (block_io "nPCI_INTD" (input))
+ (block_io "nMFP_INT" (input))
+ (block_io "nFB_OE" (input))
+ (block_io "DSP_INT" (input))
+ (block_io "VSYNC" (input))
+ (block_io "HSYNC" (input))
+ (block_io "DMA_DRQ" (input))
+ (block_io "nRSTO" (input))
+ (block_io "nIRQ[7..2]" (output))
+ (block_io "INT_HANDLER_TA" (output))
+ (block_io "ACP_CONF[31..0]" (output))
+ (block_io "TIN0" (output))
+ (block_io "FB_AD[31..0]" (bidir))
+ (mapper
+ (pt 408 56)
+ (bidir)
+ )
+ (mapper
+ (pt 408 80)
+ (bidir)
+ )
+ (mapper
+ (pt 0 256)
+ (bidir)
+ )
+ (mapper
+ (pt 0 280)
+ (bidir)
+ )
+ (mapper
+ (pt 0 304)
+ (bidir)
+ )
+ (mapper
+ (pt 0 376)
+ (bidir)
+ )
+ (mapper
+ (pt 0 400)
+ (bidir)
+ )
+ (mapper
+ (pt 0 328)
+ (bidir)
+ )
+ (mapper
+ (pt 0 352)
+ (bidir)
+ )
+ (mapper
+ (pt 0 432)
+ (bidir)
+ )
+ (mapper
+ (pt 0 456)
+ (bidir)
+ )
+ (mapper
+ (pt 0 480)
+ (bidir)
+ )
+ (mapper
+ (pt 0 504)
+ (bidir)
+ )
+ (mapper
+ (pt 408 504)
+ (bidir)
+ )
+ (mapper
+ (pt 0 528)
+ (bidir)
+ )
+ (mapper
+ (pt 408 240)
+ (bidir)
+ )
+ (mapper
+ (pt 408 296)
+ (bidir)
+ )
+ (mapper
+ (pt 0 224)
+ (bidir)
+ )
+ (mapper
+ (pt 0 104)
+ (bidir)
+ )
+ (mapper
+ (pt 0 128)
+ (bidir)
+ )
+ (mapper
+ (pt 0 176)
+ (bidir)
+ )
+ (mapper
+ (pt 0 200)
+ (bidir)
+ )
+ (mapper
+ (pt 0 56)
+ (bidir)
+ )
+ (mapper
+ (pt 0 152)
+ (bidir)
+ )
+ (mapper
+ (pt 0 80)
+ (bidir)
+ )
+ (mapper
+ (pt 0 32)
+ (bidir)
+ )
+)
+(block
+ (rect 1264 744 1672 2312)
+ (text "FalconIO_SDCard_IDE_CF" (rect 5 5 152 19)(font "Arial" (font_size 8))) (text "Wolfgang_Foerster_and_Fredi_Aschwanden" (rect 5 1554 220 1566)(font "Arial" )) (block_io "CLK33M" (input))
+ (block_io "MAIN_CLK" (input))
+ (block_io "CLK2M" (input))
+ (block_io "CLK500k" (input))
+ (block_io "nFB_CS1" (input))
+ (block_io "FB_SIZE0" (input))
+ (block_io "FB_SIZE1" (input))
+ (block_io "nFB_BURST" (input))
+ (block_io "FB_ADR[31..0]" (input))
+ (block_io "LP_BUSY" (input))
+ (block_io "nACSI_DRQ" (input))
+ (block_io "nACSI_INT" (input))
+ (block_io "nSCSI_DRQ" (input))
+ (block_io "nSCSI_MSG" (input))
+ (block_io "MIDI_IN" (input))
+ (block_io "RxD" (input))
+ (block_io "CTS" (input))
+ (block_io "RI" (input))
+ (block_io "DCD" (input))
+ (block_io "AMKB_RX" (input))
+ (block_io "PIC_AMKB_RX" (input))
+ (block_io "IDE_RDY" (input))
+ (block_io "IDE_INT" (input))
+ (block_io "WP_CS_CARD" (input))
+ (block_io "nINDEX" (input))
+ (block_io "TRACK00" (input))
+ (block_io "nRD_DATA" (input))
+ (block_io "nDCHG" (input))
+ (block_io "SD_DATA0" (input))
+ (block_io "SD_DATA1" (input))
+ (block_io "SD_DATA2" (input))
+ (block_io "SD_CARD_DEDECT" (input))
+ (block_io "SD_WP" (input))
+ (block_io "nDACK0" (input))
+ (block_io "nFB_WR" (input))
+ (block_io "WP_CF_CARD" (input))
+ (block_io "nWP" (input))
+ (block_io "nFB_CS2" (input))
+ (block_io "nRSTO" (input))
+ (block_io "nSCSI_C_D" (input))
+ (block_io "nSCSI_I_O" (input))
+ (block_io "CLK2M4576" (input))
+ (block_io "nFB_OE" (input))
+ (block_io "VSYNC" (input))
+ (block_io "HSYNC" (input))
+ (block_io "DSP_INT" (input))
+ (block_io "nBLANK" (input))
+ (block_io "FDC_CLK" (input))
+ (block_io "FB_ALE" (input))
+ (block_io "ACP_CONF[31..24]" (input))
+ (block_io "HD_DD" (input))
+ (block_io "nIDE_CS1" (output))
+ (block_io "nIDE_CS0" (output))
+ (block_io "LP_STR" (output))
+ (block_io "LP_DIR" (output))
+ (block_io "nACSI_ACK" (output))
+ (block_io "nACSI_RESET" (output))
+ (block_io "nACSI_CS" (output))
+ (block_io "ACSI_DIR" (output))
+ (block_io "ACSI_A1" (output))
+ (block_io "nSCSI_ACK" (output))
+ (block_io "nSCSI_ATN" (output))
+ (block_io "SCSI_DIR" (output))
+ (block_io "SD_CLK" (output))
+ (block_io "YM_QA" (output))
+ (block_io "YM_QC" (output))
+ (block_io "YM_QB" (output))
+ (block_io "nSDSEL" (output))
+ (block_io "STEP" (output))
+ (block_io "MOT_ON" (output))
+ (block_io "nRP_LDS" (output))
+ (block_io "nRP_UDS" (output))
+ (block_io "nROM4" (output))
+ (block_io "nROM3" (output))
+ (block_io "nCF_CS1" (output))
+ (block_io "nCF_CS0" (output))
+ (block_io "nIDE_RD" (output))
+ (block_io "nIDE_WR" (output))
+ (block_io "AMKB_TX" (output))
+ (block_io "IDE_RES" (output))
+ (block_io "DTR" (output))
+ (block_io "RTS" (output))
+ (block_io "TxD" (output))
+ (block_io "MIDI_OLR" (output))
+ (block_io "nDREQ0" (output))
+ (block_io "DSA_D" (output))
+ (block_io "nMFP_INT" (output))
+ (block_io "FALCON_IO_TA" (output))
+ (block_io "STEP_DIR" (output))
+ (block_io "WR_DATA" (output))
+ (block_io "WR_GATE" (output))
+ (block_io "DMA_DRQ" (output))
+ (block_io "MIDI_TLR" (output))
+ (block_io "FB_AD[31..0]" (bidir))
+ (block_io "LP_D[7..0]" (bidir))
+ (block_io "ACSI_D[7..0]" (bidir))
+ (block_io "SCSI_D[7..0]" (bidir))
+ (block_io "SCSI_PAR" (bidir))
+ (block_io "nSCSI_SEL" (bidir))
+ (block_io "nSCSI_BUSY" (bidir))
+ (block_io "nSCSI_RST" (bidir))
+ (block_io "SD_CD_DATA3" (bidir))
+ (block_io "SD_CDM_D1" (bidir))
+ (mapper
+ (pt 0 128)
+ (bidir)
+ )
+ (mapper
+ (pt 0 104)
+ (bidir)
+ )
+ (mapper
+ (pt 0 56)
+ (bidir)
+ )
+ (mapper
+ (pt 0 80)
+ (bidir)
+ )
+ (mapper
+ (pt 0 224)
+ (bidir)
+ )
+ (mapper
+ (pt 0 248)
+ (bidir)
+ )
+ (mapper
+ (pt 0 272)
+ (bidir)
+ )
+ (mapper
+ (pt 408 96)
+ (bidir)
+ )
+ (mapper
+ (pt 408 120)
+ (bidir)
+ )
+ (mapper
+ (pt 408 72)
+ (bidir)
+ )
+ (mapper
+ (pt 408 152)
+ (bidir)
+ )
+ (mapper
+ (pt 408 200)
+ (bidir)
+ )
+ (mapper
+ (pt 408 224)
+ (bidir)
+ )
+ (mapper
+ (pt 408 248)
+ (bidir)
+ )
+ (mapper
+ (pt 408 272)
+ (bidir)
+ )
+ (mapper
+ (pt 408 296)
+ (bidir)
+ )
+ (mapper
+ (pt 408 424)
+ (bidir)
+ )
+ (mapper
+ (pt 408 352)
+ (bidir)
+ )
+ (mapper
+ (pt 408 328)
+ (bidir)
+ )
+ (mapper
+ (pt 408 448)
+ (bidir)
+ )
+ (mapper
+ (pt 408 400)
+ (bidir)
+ )
+ (mapper
+ (pt 408 376)
+ (bidir)
+ )
+ (mapper
+ (pt 408 472)
+ (bidir)
+ )
+ (mapper
+ (pt 408 496)
+ (bidir)
+ )
+ (mapper
+ (pt 408 608)
+ (bidir)
+ )
+ (mapper
+ (pt 408 632)
+ (bidir)
+ )
+ (mapper
+ (pt 408 584)
+ (bidir)
+ )
+ (mapper
+ (pt 0 656)
+ (bidir)
+ )
+ (mapper
+ (pt 0 680)
+ (bidir)
+ )
+ (mapper
+ (pt 0 704)
+ (bidir)
+ )
+ (mapper
+ (pt 0 728)
+ (bidir)
+ )
+ (mapper
+ (pt 0 752)
+ (bidir)
+ )
+ (mapper
+ (pt 0 776)
+ (bidir)
+ )
+ (mapper
+ (pt 408 664)
+ (bidir)
+ )
+ (mapper
+ (pt 0 808)
+ (bidir)
+ )
+ (mapper
+ (pt 0 832)
+ (bidir)
+ )
+ (mapper
+ (pt 408 696)
+ (bidir)
+ )
+ (mapper
+ (pt 408 720)
+ (bidir)
+ )
+ (mapper
+ (pt 408 744)
+ (bidir)
+ )
+ (mapper
+ (pt 408 768)
+ (bidir)
+ )
+ (mapper
+ (pt 408 792)
+ (bidir)
+ )
+ (mapper
+ (pt 408 816)
+ (bidir)
+ )
+ (mapper
+ (pt 408 840)
+ (bidir)
+ )
+ (mapper
+ (pt 0 856)
+ (bidir)
+ )
+ (mapper
+ (pt 408 872)
+ (bidir)
+ )
+ (mapper
+ (pt 408 896)
+ (bidir)
+ )
+ (mapper
+ (pt 408 920)
+ (bidir)
+ )
+ (mapper
+ (pt 408 944)
+ (bidir)
+ )
+ (mapper
+ (pt 0 912)
+ (bidir)
+ )
+ (mapper
+ (pt 0 936)
+ (bidir)
+ )
+ (mapper
+ (pt 0 960)
+ (bidir)
+ )
+ (mapper
+ (pt 0 984)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1008)
+ (bidir)
+ )
+ (mapper
+ (pt 408 976)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1000)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1072)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1096)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1176)
+ (bidir)
+ )
+ (mapper
+ (pt 0 296)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1256)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1040)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1064)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1088)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1112)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1136)
+ (bidir)
+ )
+ (mapper
+ (pt 0 432)
+ (bidir)
+ )
+ (mapper
+ (pt 0 464)
+ (bidir)
+ )
+ (mapper
+ (pt 0 488)
+ (bidir)
+ )
+ (mapper
+ (pt 0 520)
+ (bidir)
+ )
+ (mapper
+ (pt 0 544)
+ (bidir)
+ )
+ (mapper
+ (pt 0 568)
+ (bidir)
+ )
+ (mapper
+ (pt 0 592)
+ (bidir)
+ )
+ (mapper
+ (pt 0 320)
+ (bidir)
+ )
+ (mapper
+ (pt 0 200)
+ (bidir)
+ )
+ (mapper
+ (pt 0 344)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1168)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1192)
+ (bidir)
+ )
+ (mapper
+ (pt 0 368)
+ (bidir)
+ )
+ (mapper
+ (pt 0 392)
+ (bidir)
+ )
+ (mapper
+ (pt 0 176)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1216)
+ (bidir)
+ )
+ (mapper
+ (pt 408 48)
+ (bidir)
+ )
+ (mapper
+ (pt 408 16)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1240)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1304)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1200)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1344)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1280)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1224)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1120)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1048)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1024)
+ (bidir)
+ )
+ (mapper
+ (pt 0 32)
+ (bidir)
+ )
+ (mapper
+ (pt 0 152)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1368)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1264)
+ (bidir)
+ )
+ (mapper
+ (pt 0 1336)
+ (bidir)
+ )
+ (mapper
+ (pt 0 888)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1480)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1504)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1392)
+ (bidir)
+ )
+ (mapper
+ (pt 408 1544)
+ (bidir)
+ )
)
(connector
- (text "FB_ADR[31..0]" (rect 1146 1072 1240 1087)(font "Arial" ))
- (pt 1112 1088)
- (pt 1264 1088)
- (bus)
-)
-(connector
- (text "MAIN_CLK" (rect 1162 784 1231 799)(font "Arial" ))
- (pt 1152 800)
- (pt 1264 800)
-)
-(connector
- (text "CLK33M" (rect 1210 760 1265 775)(font "Arial" ))
- (pt 1200 776)
- (pt 1264 776)
-)
-(connector
- (text "CLK2M" (rect 1202 808 1249 823)(font "Arial" ))
- (pt 1192 824)
- (pt 1264 824)
-)
-(connector
- (text "CLK500k" (rect 1202 832 1262 847)(font "Arial" ))
- (pt 1192 848)
- (pt 1264 848)
-)
-(connector
- (text "LP_DIR" (rect 1682 848 1732 863)(font "Arial" ))
- (pt 1672 864)
- (pt 1832 864)
-)
-(connector
- (text "LP_STR" (rect 1682 824 1736 839)(font "Arial" ))
- (pt 1672 840)
- (pt 1832 840)
-)
-(connector
- (text "nACSI_ACK" (rect 1682 928 1758 943)(font "Arial" ))
- (pt 1672 944)
- (pt 1832 944)
-)
-(connector
- (text "nACSI_RESET" (rect 1682 952 1777 967)(font "Arial" ))
- (pt 1672 968)
- (pt 1832 968)
-)
-(connector
- (text "nACSI_CS" (rect 1682 976 1750 991)(font "Arial" ))
- (pt 1672 992)
- (pt 1832 992)
-)
-(connector
- (text "ACSI_DIR" (rect 1682 1000 1746 1015)(font "Arial" ))
- (pt 1672 1016)
- (pt 1832 1016)
-)
-(connector
- (text "ACSI_A1" (rect 1682 1024 1738 1039)(font "Arial" ))
- (pt 1672 1040)
- (pt 1832 1040)
-)
-(connector
- (text "nSCSI_ATN" (rect 1682 1128 1758 1143)(font "Arial" ))
- (pt 1672 1144)
- (pt 1840 1144)
-)
-(connector
- (text "SCSI_DIR" (rect 1682 1152 1748 1167)(font "Arial" ))
- (pt 1672 1168)
- (pt 1840 1168)
-)
-(connector
- (text "nSCSI_DRQ" (rect 1114 1248 1195 1263)(font "Arial" ))
- (pt 1264 1264)
- (pt 1104 1264)
-)
-(connector
- (text "nSCSI_MSG" (rect 1114 1320 1194 1335)(font "Arial" ))
- (pt 1104 1336)
- (pt 1264 1336)
-)
-(connector
- (text "nSCSI_RST" (rect 1682 1176 1759 1191)(font "Arial" ))
- (pt 1672 1192)
- (pt 1840 1192)
-)
-(connector
- (text "nSCSI_SEL" (rect 1680 1200 1756 1215)(font "Arial" ))
- (pt 1672 1216)
- (pt 1840 1216)
-)
-(connector
- (text "nSCSI_BUSY" (rect 1682 1224 1769 1239)(font "Arial" ))
- (pt 1672 1240)
- (pt 1840 1240)
-)
-(connector
- (text "TxD" (rect 1682 1312 1706 1327)(font "Arial" ))
- (pt 1672 1328)
- (pt 1840 1328)
-)
-(connector
- (text "RTS" (rect 1682 1336 1710 1351)(font "Arial" ))
- (pt 1672 1352)
- (pt 1840 1352)
-)
-(connector
- (text "DTR" (rect 1680 1360 1709 1375)(font "Arial" ))
- (pt 1672 1376)
- (pt 1848 1376)
-)
-(connector
- (text "CTS" (rect 1114 1408 1142 1423)(font "Arial" ))
- (pt 1104 1424)
- (pt 1264 1424)
-)
-(connector
- (text "RI" (rect 1114 1432 1128 1447)(font "Arial" ))
- (pt 1104 1448)
- (pt 1264 1448)
-)
-(connector
- (text "DCD" (rect 1114 1456 1145 1471)(font "Arial" ))
- (pt 1104 1472)
- (pt 1264 1472)
-)
-(connector
- (text "IDE_RDY" (rect 1114 1536 1175 1551)(font "Arial" ))
- (pt 1264 1552)
- (pt 1104 1552)
-)
-(connector
- (text "IDE_INT" (rect 1114 1560 1168 1575)(font "Arial" ))
- (pt 1104 1576)
- (pt 1264 1576)
-)
-(connector
- (text "IDE_RES" (rect 1682 1424 1743 1439)(font "Arial" ))
- (pt 1672 1440)
- (pt 1848 1440)
-)
-(connector
- (text "nIDE_CS0" (rect 1682 1448 1750 1463)(font "Arial" ))
- (pt 1672 1464)
- (pt 1848 1464)
-)
-(connector
- (text "nIDE_CS1" (rect 1682 1472 1750 1487)(font "Arial" ))
- (pt 1672 1488)
- (pt 1856 1488)
-)
-(connector
- (text "nIDE_WR" (rect 1682 1496 1745 1511)(font "Arial" ))
- (pt 1672 1512)
- (pt 1848 1512)
-)
-(connector
- (text "nIDE_RD" (rect 1682 1520 1743 1535)(font "Arial" ))
- (pt 1672 1536)
- (pt 1848 1536)
-)
-(connector
- (text "nCF_CS0" (rect 1682 1544 1745 1559)(font "Arial" ))
- (pt 1672 1560)
- (pt 1848 1560)
-)
-(connector
- (text "nCF_CS1" (rect 1682 1568 1745 1583)(font "Arial" ))
- (pt 1672 1584)
- (pt 1848 1584)
-)
-(connector
- (text "WP_CF_CARD" (rect 1112 1584 1209 1599)(font "Arial" ))
- (pt 1104 1600)
- (pt 1264 1600)
-)
-(connector
- (text "nSDSEL" (rect 1682 1848 1737 1863)(font "Arial" ))
- (pt 1672 1864)
- (pt 1856 1864)
-)
-(connector
- (text "nDREQ0" (rect 1682 2152 1739 2167)(font "Arial" ))
- (pt 1672 2168)
- (pt 1856 2168)
-)
-(connector
- (text "SD_CLK" (rect 1682 2032 1738 2047)(font "Arial" ))
- (pt 1856 2048)
- (pt 1672 2048)
-)
-(connector
- (text "SD_DATA0" (rect 1114 1768 1185 1783)(font "Arial" ))
- (pt 1104 1784)
- (pt 1264 1784)
-)
-(connector
- (text "SD_DATA1" (rect 1114 1792 1185 1807)(font "Arial" ))
- (pt 1104 1808)
- (pt 1264 1808)
-)
-(connector
- (text "SD_DATA2" (rect 1114 1816 1185 1831)(font "Arial" ))
- (pt 1104 1832)
- (pt 1264 1832)
-)
-(connector
- (text "SD_WP" (rect 1114 1864 1164 1879)(font "Arial" ))
- (pt 1104 1880)
- (pt 1264 1880)
-)
-(connector
- (text "FB_ADR[31..0]" (rect 1146 2536 1240 2551)(font "Arial" ))
- (pt 1112 2552)
- (pt 1264 2552)
- (bus)
-)
-(connector
- (text "nFB_WR" (rect 1162 2416 1219 2431)(font "Arial" ))
- (pt 1152 2432)
- (pt 1264 2432)
-)
-(connector
- (text "nFB_CS1" (rect 1154 2440 1216 2455)(font "Arial" ))
- (pt 1152 2456)
- (pt 1264 2456)
-)
-(connector
- (text "FB_SIZE0" (rect 1154 2488 1218 2503)(font "Arial" ))
- (pt 1152 2504)
- (pt 1264 2504)
-)
-(connector
- (text "FB_SIZE1" (rect 1154 2512 1218 2527)(font "Arial" ))
- (pt 1152 2528)
- (pt 1264 2528)
-)
-(connector
- (text "MAIN_CLK" (rect 1162 2368 1231 2383)(font "Arial" ))
- (pt 1152 2384)
- (pt 1264 2384)
-)
-(connector
- (text "nFB_CS2" (rect 1162 2464 1224 2479)(font "Arial" ))
- (pt 1152 2480)
- (pt 1264 2480)
-)
-(connector
- (text "FB_AD[31..0]" (rect 1682 2384 1765 2399)(font "Arial" ))
+ (text "FB_AD[31..0]" (rect 1682 2384 1749 2396)(font "Arial" ))
(pt 1832 2400)
(pt 1672 2400)
(bus)
)
(connector
- (text "nSCSI_ACK" (rect 1682 1104 1759 1119)(font "Arial" ))
- (pt 1672 1120)
- (pt 1840 1120)
-)
-(connector
- (text "SCSI_PAR" (rect 1682 1080 1751 1095)(font "Arial" ))
- (pt 1672 1096)
- (pt 1840 1096)
-)
-(connector
- (text "MIDI_OLR" (rect 1762 1256 1828 1271)(font "Arial" ))
- (pt 1672 1272)
- (pt 1920 1272)
-)
-(connector
- (text "MIDI_TLR" (rect 1770 1280 1833 1295)(font "Arial" ))
- (pt 1672 1296)
- (pt 1920 1296)
-)
-(connector
- (text "nROM3" (rect 1754 1600 1802 1615)(font "Arial" ))
- (pt 1672 1616)
- (pt 1920 1616)
-)
-(connector
- (text "nROM4" (rect 1754 1624 1802 1639)(font "Arial" ))
- (pt 1672 1640)
- (pt 1920 1640)
-)
-(connector
- (text "nRP_UDS" (rect 1744 1648 1811 1663)(font "Arial" ))
- (pt 1672 1664)
- (pt 1920 1664)
-)
-(connector
- (text "nRP_LDS" (rect 1746 1672 1810 1687)(font "Arial" ))
- (pt 1672 1688)
- (pt 1920 1688)
-)
-(connector
- (text "YM_QA" (rect 1762 1904 1808 1919)(font "Arial" ))
- (pt 1672 1920)
- (pt 1928 1920)
-)
-(connector
- (text "YM_QB" (rect 1762 1928 1809 1943)(font "Arial" ))
- (pt 1672 1944)
- (pt 1928 1944)
-)
-(connector
- (text "YM_QC" (rect 1762 1952 1810 1967)(font "Arial" ))
- (pt 1672 1968)
- (pt 1928 1968)
-)
-(connector
- (text "LP_BUSY" (rect 1114 1160 1177 1175)(font "Arial" ))
- (pt 1264 1176)
- (pt 1104 1176)
-)
-(connector
- (text "nACSI_DRQ" (rect 1034 1192 1114 1207)(font "Arial" ))
- (pt 1024 1208)
- (pt 1264 1208)
-)
-(connector
- (text "nACSI_INT" (rect 1034 1216 1104 1231)(font "Arial" ))
- (pt 1024 1232)
- (pt 1264 1232)
-)
-(connector
- (text "MIDI_IN" (rect 1050 1352 1100 1367)(font "Arial" ))
- (pt 1040 1368)
- (pt 1264 1368)
-)
-(connector
- (text "RxD" (rect 1114 1384 1141 1399)(font "Arial" ))
- (pt 1264 1400)
- (pt 1104 1400)
-)
-(connector
- (text "nINDEX" (rect 1050 1640 1100 1655)(font "Arial" ))
- (pt 1040 1656)
- (pt 1264 1656)
-)
-(connector
- (text "TRACK00" (rect 1050 1664 1113 1679)(font "Arial" ))
- (pt 1040 1680)
- (pt 1264 1680)
-)
-(connector
- (text "nWP" (rect 1050 1688 1080 1703)(font "Arial" ))
- (pt 1040 1704)
- (pt 1264 1704)
-)
-(connector
- (text "nRD_DATA" (rect 1050 1712 1123 1727)(font "Arial" ))
- (pt 1040 1728)
- (pt 1264 1728)
-)
-(connector
- (text "nDCHG" (rect 1050 1736 1100 1751)(font "Arial" ))
- (pt 1040 1752)
- (pt 1264 1752)
-)
-(connector
- (text "SD_CARD_DEDECT" (rect 1138 1840 1273 1855)(font "Arial" ))
- (pt 1264 1856)
- (pt 1128 1856)
-)
-(connector
- (text "SD_CD_DATA3" (rect 1682 1984 1783 1999)(font "Arial" ))
- (pt 1672 2000)
- (pt 1856 2000)
-)
-(connector
- (text "SD_CDM_D1" (rect 1682 2008 1769 2023)(font "Arial" ))
- (pt 1672 2024)
- (pt 1856 2024)
-)
-(connector
- (text "nSCSI_C_D" (rect 1114 1272 1193 1287)(font "Arial" ))
- (pt 1104 1288)
- (pt 1264 1288)
-)
-(connector
- (text "nSCSI_I_O" (rect 1114 1296 1185 1311)(font "Arial" ))
- (pt 1104 1312)
- (pt 1264 1312)
-)
-(connector
- (text "DSA_D" (rect 1682 1704 1729 1719)(font "Arial" ))
- (pt 1672 1720)
- (pt 1856 1720)
-)
-(connector
- (text "FB_AD[31..0]" (rect 1682 8 1765 23)(font "Arial" ))
+ (text "FB_AD[31..0]" (rect 1682 8 1749 20)(font "Arial" ))
(pt 1832 24)
(pt 1672 24)
(bus)
)
(connector
- (text "FB_ADR[31..0]" (rect 1146 328 1240 343)(font "Arial" ))
+ (text "FB_ADR[31..0]" (rect 1146 328 1221 340)(font "Arial" ))
(pt 1112 344)
(pt 1264 344)
(bus)
)
(connector
- (text "nFB_WR" (rect 1162 184 1219 199)(font "Arial" ))
+ (text "nFB_WR" (rect 1162 184 1206 196)(font "Arial" ))
(pt 1152 200)
(pt 1264 200)
)
(connector
- (text "nFB_CS1" (rect 1154 208 1216 223)(font "Arial" ))
+ (text "nFB_CS1" (rect 1154 208 1201 220)(font "Arial" ))
(pt 1152 224)
(pt 1264 224)
)
(connector
- (text "FB_SIZE0" (rect 1154 256 1218 271)(font "Arial" ))
+ (text "FB_SIZE0" (rect 1154 256 1204 268)(font "Arial" ))
(pt 1152 272)
(pt 1264 272)
)
(connector
- (text "FB_SIZE1" (rect 1154 280 1218 295)(font "Arial" ))
+ (text "FB_SIZE1" (rect 1154 280 1204 292)(font "Arial" ))
(pt 1152 296)
(pt 1264 296)
)
(connector
- (text "nFB_CS2" (rect 1162 232 1224 247)(font "Arial" ))
+ (text "nFB_CS2" (rect 1162 232 1209 244)(font "Arial" ))
(pt 1152 248)
(pt 1264 248)
)
(connector
- (text "nBLANK" (rect 1682 184 1736 199)(font "Arial" ))
+ (text "nBLANK" (rect 1682 184 1723 196)(font "Arial" ))
(pt 1672 200)
(pt 1832 200)
)
(connector
- (text "nSYNC" (rect 1682 208 1729 223)(font "Arial" ))
+ (text "nSYNC" (rect 1682 208 1719 220)(font "Arial" ))
(pt 1672 224)
(pt 1832 224)
)
(connector
- (text "nFB_CS3" (rect 1186 352 1248 367)(font "Arial" ))
+ (text "nFB_CS3" (rect 1186 352 1233 364)(font "Arial" ))
(pt 1264 368)
(pt 1176 368)
)
(connector
- (text "nFB_WR" (rect 1170 928 1227 943)(font "Arial" ))
- (pt 1264 944)
- (pt 1160 944)
-)
-(connector
- (text "nFB_CS1" (rect 1162 952 1224 967)(font "Arial" ))
- (pt 1264 968)
- (pt 1160 968)
-)
-(connector
- (text "nFB_CS2" (rect 1170 976 1232 991)(font "Arial" ))
- (pt 1264 992)
- (pt 1160 992)
-)
-(connector
- (text "FB_SIZE0" (rect 1162 1000 1226 1015)(font "Arial" ))
- (pt 1264 1016)
- (pt 1160 1016)
-)
-(connector
- (text "FB_SIZE1" (rect 1162 1024 1226 1039)(font "Arial" ))
- (pt 1264 1040)
- (pt 1160 1040)
-)
-(connector
- (text "nFB_BURST" (rect 1162 1048 1244 1063)(font "Arial" ))
- (pt 1264 1064)
- (pt 1160 1064)
-)
-(connector
- (text "nDACK0" (rect 1250 1096 1305 1111)(font "Arial" ))
- (pt 1264 1112)
- (pt 1160 1112)
-)
-(connector
- (text "nRSTO" (rect 1170 1120 1217 1135)(font "Arial" ))
- (pt 1264 1136)
- (pt 1160 1136)
-)
-(connector
- (text "nPD_VGA" (rect 1682 256 1745 271)(font "Arial" ))
+ (text "nPD_VGA" (rect 1682 256 1731 268)(font "Arial" ))
(pt 1672 272)
(pt 1832 272)
)
(connector
- (text "PIC_INT" (rect 1162 2584 1216 2599)(font "Arial" ))
+ (text "PIC_INT" (rect 1162 2584 1204 2596)(font "Arial" ))
(pt 1152 2600)
(pt 1264 2600)
)
(connector
- (text "nIRQ[7..2]" (rect 1682 2408 1745 2423)(font "Arial" ))
+ (text "nIRQ[7..2]" (rect 1682 2408 1733 2420)(font "Arial" ))
(pt 1672 2424)
(pt 1832 2424)
(bus)
)
(connector
- (text "CLK2M4576" (rect 1202 856 1282 871)(font "Arial" ))
- (pt 1192 872)
- (pt 1264 872)
-)
-(connector
- (text "nFB_OE" (rect 1170 904 1224 919)(font "Arial" ))
- (pt 1264 920)
- (pt 1160 920)
-)
-(connector
- (text "nFB_OE" (rect 1170 160 1224 175)(font "Arial" ))
+ (text "nFB_OE" (rect 1170 160 1211 172)(font "Arial" ))
(pt 1264 176)
(pt 1160 176)
)
(connector
- (text "nFB_OE" (rect 1170 2392 1224 2407)(font "Arial" ))
- (pt 1264 2408)
- (pt 1160 2408)
-)
-(connector
- (text "DVI_INT" (rect 1162 2632 1215 2647)(font "Arial" ))
- (pt 1152 2648)
- (pt 1264 2648)
-)
-(connector
- (text "nPCI_INTA" (rect 1162 2728 1232 2743)(font "Arial" ))
+ (text "nPCI_INTA" (rect 1162 2728 1217 2740)(font "Arial" ))
(pt 1152 2744)
(pt 1264 2744)
)
(connector
- (text "nPCI_INTB" (rect 1162 2704 1233 2719)(font "Arial" ))
+ (text "nPCI_INTB" (rect 1162 2704 1217 2716)(font "Arial" ))
(pt 1152 2720)
(pt 1264 2720)
)
(connector
- (text "nPCI_INTC" (rect 1162 2680 1235 2695)(font "Arial" ))
+ (text "nPCI_INTC" (rect 1162 2680 1218 2692)(font "Arial" ))
(pt 1152 2696)
(pt 1264 2696)
)
(connector
- (text "nPCI_INTD" (rect 1162 2656 1235 2671)(font "Arial" ))
+ (text "nPCI_INTD" (rect 1162 2656 1218 2668)(font "Arial" ))
(pt 1152 2672)
(pt 1264 2672)
)
(connector
- (text "nMFP_INT" (rect 1162 2760 1229 2775)(font "Arial" ))
+ (text "nMFP_INT" (rect 1162 2760 1213 2772)(font "Arial" ))
(pt 1152 2776)
(pt 1264 2776)
)
(connector
- (text "nMFP_INT" (rect 1682 2072 1749 2087)(font "Arial" ))
- (pt 1672 2088)
- (pt 1784 2088)
-)
-(connector
- (text "E0_INT" (rect 1162 2608 1210 2623)(font "Arial" ))
+ (text "E0_INT" (rect 1162 2608 1198 2620)(font "Arial" ))
(pt 1152 2624)
(pt 1264 2624)
)
(connector
- (text "FB_AD[31..0]" (rect 1682 2968 1765 2983)(font "Arial" ))
+ (text "FB_AD[31..0]" (rect 1682 2968 1749 2980)(font "Arial" ))
(pt 1832 2984)
(pt 1672 2984)
(bus)
)
(connector
- (text "FB_ADR[31..0]" (rect 1146 3224 1240 3239)(font "Arial" ))
+ (text "FB_ADR[31..0]" (rect 1146 3224 1221 3236)(font "Arial" ))
(pt 1112 3240)
(pt 1264 3240)
(bus)
)
(connector
- (text "MAIN_CLK" (rect 1162 3008 1231 3023)(font "Arial" ))
+ (text "MAIN_CLK" (rect 1162 3008 1216 3020)(font "Arial" ))
(pt 1152 3024)
(pt 1264 3024)
)
(connector
- (text "CLK33M" (rect 1210 2984 1265 2999)(font "Arial" ))
+ (text "CLK33M" (rect 1210 2984 1251 2996)(font "Arial" ))
(pt 1200 3000)
(pt 1264 3000)
)
(connector
- (text "nFB_WR" (rect 1170 3056 1227 3071)(font "Arial" ))
+ (text "nFB_WR" (rect 1170 3056 1214 3068)(font "Arial" ))
(pt 1264 3072)
(pt 1160 3072)
)
(connector
- (text "nFB_CS1" (rect 1162 3080 1224 3095)(font "Arial" ))
+ (text "nFB_CS1" (rect 1162 3080 1209 3092)(font "Arial" ))
(pt 1264 3096)
(pt 1160 3096)
)
(connector
- (text "nFB_CS2" (rect 1170 3104 1232 3119)(font "Arial" ))
+ (text "nFB_CS2" (rect 1170 3104 1217 3116)(font "Arial" ))
(pt 1264 3120)
(pt 1160 3120)
)
(connector
- (text "FB_SIZE0" (rect 1162 3152 1226 3167)(font "Arial" ))
+ (text "FB_SIZE0" (rect 1162 3152 1212 3164)(font "Arial" ))
(pt 1264 3168)
(pt 1160 3168)
)
(connector
- (text "FB_SIZE1" (rect 1162 3176 1226 3191)(font "Arial" ))
+ (text "FB_SIZE1" (rect 1162 3176 1212 3188)(font "Arial" ))
(pt 1264 3192)
(pt 1160 3192)
)
(connector
- (text "nFB_BURST" (rect 1162 3200 1244 3215)(font "Arial" ))
+ (text "nFB_BURST" (rect 1162 3200 1224 3212)(font "Arial" ))
(pt 1264 3216)
(pt 1160 3216)
)
(connector
- (text "nRSTO" (rect 1170 3248 1217 3263)(font "Arial" ))
+ (text "nRSTO" (rect 1170 3248 1205 3260)(font "Arial" ))
(pt 1264 3264)
(pt 1160 3264)
)
(connector
- (text "nFB_OE" (rect 1170 3032 1224 3047)(font "Arial" ))
+ (text "nFB_OE" (rect 1170 3032 1211 3044)(font "Arial" ))
(pt 1264 3048)
(pt 1160 3048)
)
(connector
- (text "nSRCS" (rect 1682 3272 1730 3287)(font "Arial" ))
+ (text "nSRCS" (rect 1682 3272 1718 3284)(font "Arial" ))
(pt 1824 3288)
(pt 1672 3288)
)
(connector
- (text "nSRBLE" (rect 1682 3296 1737 3311)(font "Arial" ))
+ (text "nSRBLE" (rect 1682 3296 1723 3308)(font "Arial" ))
(pt 1824 3312)
(pt 1672 3312)
)
(connector
- (text "nSRBHE" (rect 1682 3320 1739 3335)(font "Arial" ))
+ (text "nSRBHE" (rect 1682 3320 1725 3332)(font "Arial" ))
(pt 1824 3336)
(pt 1672 3336)
)
(connector
- (text "nSRWE" (rect 1682 3344 1732 3359)(font "Arial" ))
+ (text "nSRWE" (rect 1682 3344 1720 3356)(font "Arial" ))
(pt 1824 3360)
(pt 1672 3360)
)
(connector
- (text "nSROE" (rect 1682 3368 1730 3383)(font "Arial" ))
+ (text "nSROE" (rect 1682 3368 1718 3380)(font "Arial" ))
(pt 1824 3384)
(pt 1672 3384)
)
(connector
- (text "DSP_INT" (rect 1130 2832 1190 2847)(font "Arial" ))
+ (text "DSP_INT" (rect 1130 2832 1176 2844)(font "Arial" ))
(pt 1264 2848)
(pt 1120 2848)
)
(connector
- (text "DSP_INT" (rect 1682 3000 1742 3015)(font "Arial" ))
+ (text "DSP_INT" (rect 1682 3000 1728 3012)(font "Arial" ))
(pt 1816 3016)
(pt 1672 3016)
)
(connector
- (text "CLK500k" (rect 482 2040 542 2055)(font "Arial" ))
+ (text "CLK500k" (rect 482 2040 526 2052)(font "Arial" ))
(pt 472 2056)
(pt 544 2056)
)
@@ -5031,198 +4666,155 @@ applicable agreement for further details.
(pt 616 2416)
)
(connector
- (text "FB_ALE" (rect 1194 304 1245 319)(font "Arial" ))
+ (text "FB_ALE" (rect 1194 304 1234 316)(font "Arial" ))
(pt 1264 320)
(pt 1184 320)
)
(connector
- (text "DDRCLK[3..0]" (rect 1162 136 1252 151)(font "Arial" ))
+ (text "DDRCLK[3..0]" (rect 1162 136 1233 148)(font "Arial" ))
(pt 1152 152)
(pt 1264 152)
(bus)
)
(connector
- (text "DDR_SYNC_66M" (rect 1178 112 1292 127)(font "Arial" ))
+ (text "DDR_SYNC_66M" (rect 1178 112 1266 124)(font "Arial" ))
(pt 1168 128)
(pt 1264 128)
)
(connector
- (text "VD[31..0]" (rect 1682 288 1739 303)(font "Arial" ))
+ (text "VD[31..0]" (rect 1682 288 1729 300)(font "Arial" ))
(pt 1672 304)
(pt 2648 304)
(bus)
)
(connector
- (text "VA[12..0]" (rect 1682 312 1737 327)(font "Arial" ))
+ (text "VA[12..0]" (rect 1682 312 1728 324)(font "Arial" ))
(pt 1672 328)
(pt 2528 328)
(bus)
)
(connector
- (text "nVWE" (rect 1682 336 1720 351)(font "Arial" ))
+ (text "nVWE" (rect 1682 336 1712 348)(font "Arial" ))
(pt 1672 352)
(pt 2400 352)
)
(connector
- (text "nVCAS" (rect 1690 360 1734 375)(font "Arial" ))
+ (text "nVCAS" (rect 1690 360 1725 372)(font "Arial" ))
(pt 1672 376)
(pt 2304 376)
)
(connector
- (text "nVRAS" (rect 1690 384 1734 399)(font "Arial" ))
+ (text "nVRAS" (rect 1690 384 1725 396)(font "Arial" ))
(pt 1672 400)
(pt 2208 400)
)
(connector
- (text "nVCS" (rect 1690 408 1726 423)(font "Arial" ))
+ (text "nVCS" (rect 1690 408 1718 420)(font "Arial" ))
(pt 1672 424)
(pt 2040 424)
)
(connector
- (text "VCKE" (rect 1690 432 1727 447)(font "Arial" ))
+ (text "VCKE" (rect 1690 432 1719 444)(font "Arial" ))
(pt 1672 448)
(pt 1944 448)
)
(connector
- (text "VSYNC" (rect 1682 136 1729 151)(font "Arial" ))
+ (text "VSYNC" (rect 1682 136 1720 148)(font "Arial" ))
(pt 1672 152)
(pt 1832 152)
)
(connector
- (text "HSYNC" (rect 1682 160 1731 175)(font "Arial" ))
+ (text "HSYNC" (rect 1682 160 1722 172)(font "Arial" ))
(pt 1672 176)
(pt 1832 176)
)
(connector
- (text "VB[7..0]" (rect 1754 112 1802 127)(font "Arial" ))
+ (text "VB[7..0]" (rect 1754 112 1794 124)(font "Arial" ))
(pt 1672 128)
(pt 1912 128)
(bus)
)
(connector
- (text "VG[7..0]" (rect 1842 88 1891 103)(font "Arial" ))
+ (text "VG[7..0]" (rect 1842 88 1883 100)(font "Arial" ))
(pt 1672 104)
(pt 2000 104)
(bus)
)
(connector
- (text "VR[7..0]" (rect 1922 64 1971 79)(font "Arial" ))
+ (text "VR[7..0]" (rect 1922 64 1963 76)(font "Arial" ))
(pt 1672 80)
(pt 2080 80)
(bus)
)
(connector
- (text "IO[17..0]" (rect 1962 3224 2015 3239)(font "Arial" ))
+ (text "IO[17..0]" (rect 1962 3224 2005 3236)(font "Arial" ))
(pt 1672 3240)
(pt 2104 3240)
(bus)
)
(connector
- (text "SRD[15..0]" (rect 1802 3248 1871 3263)(font "Arial" ))
+ (text "SRD[15..0]" (rect 1802 3248 1857 3260)(font "Arial" ))
(pt 1672 3264)
(pt 1944 3264)
(bus)
)
(connector
- (text "SCSI_D[7..0]" (rect 1786 1056 1868 1071)(font "Arial" ))
- (pt 1672 1072)
- (pt 1936 1072)
- (bus)
-)
-(connector
- (text "ACSI_D[7..0]" (rect 1754 880 1835 895)(font "Arial" ))
- (pt 1672 896)
- (pt 1904 896)
- (bus)
-)
-(connector
- (text "LP_D[7..0]" (rect 1810 800 1877 815)(font "Arial" ))
- (pt 1672 816)
- (pt 1960 816)
- (bus)
-)
-(connector
- (text "AMKB_RX" (rect 786 1480 850 1495)(font "Arial" ))
- (pt 776 1496)
- (pt 1264 1496)
-)
-(connector
- (text "CLK33M" (rect 346 288 401 303)(font "Arial" ))
- (pt 336 304)
- (pt 400 304)
-)
-(connector
- (text "CLK25M" (rect 1202 608 1257 623)(font "Arial" ))
+ (text "CLK25M" (rect 1202 608 1243 620)(font "Arial" ))
(pt 1192 624)
(pt 1264 624)
)
(connector
- (text "TIMEBASE[17]" (rect 354 2120 446 2135)(font "Arial" ))
+ (text "TIMEBASE[17]" (rect 354 2120 425 2132)(font "Arial" ))
(pt 440 2136)
(pt 344 2136)
)
(connector
- (text "TIMEBASE[17..0]" (rect 706 2048 813 2063)(font "Arial" ))
+ (text "TIMEBASE[17..0]" (rect 706 2048 790 2060)(font "Arial" ))
(pt 688 2064)
(pt 808 2064)
(bus)
)
(connector
- (text "HSYNC" (rect 1130 2784 1179 2799)(font "Arial" ))
+ (text "HSYNC" (rect 1130 2784 1170 2796)(font "Arial" ))
(pt 1264 2800)
(pt 1120 2800)
)
(connector
- (text "VSYNC" (rect 1130 2808 1177 2823)(font "Arial" ))
+ (text "VSYNC" (rect 1130 2808 1168 2820)(font "Arial" ))
(pt 1264 2824)
(pt 1120 2824)
)
-(connector
- (text "VSYNC" (rect 1130 1920 1177 1935)(font "Arial" ))
- (pt 1264 1936)
- (pt 1120 1936)
-)
-(connector
- (text "HSYNC" (rect 1130 1896 1179 1911)(font "Arial" ))
- (pt 1264 1912)
- (pt 1120 1912)
-)
(connector
(pt 488 2136)
(pt 608 2136)
)
(connector
- (text "nFB_TA" (rect 1946 720 1996 735)(font "Arial" ))
+ (text "nFB_TA" (rect 1946 720 1984 732)(font "Arial" ))
(pt 1944 736)
(pt 2056 736)
)
(connector
- (text "INT_HANDLER_TA" (rect 1682 2832 1805 2847)(font "Arial" ))
+ (text "INT_HANDLER_TA" (rect 1682 2832 1777 2844)(font "Arial" ))
(pt 1672 2848)
(pt 1808 2848)
)
(connector
- (text "DSP_TA" (rect 1682 3504 1736 3519)(font "Arial" ))
+ (text "DSP_TA" (rect 1682 3504 1723 3516)(font "Arial" ))
(pt 1672 3520)
(pt 1792 3520)
)
(connector
- (text "Video_TA" (rect 1682 696 1743 711)(font "Arial" ))
+ (text "Video_TA" (rect 1682 696 1728 708)(font "Arial" ))
(pt 1672 712)
(pt 1880 712)
)
(connector
- (text "FALCON_IO_TA" (rect 1682 744 1785 759)(font "Arial" ))
- (pt 1672 760)
- (pt 1880 760)
-)
-(connector
- (text "INT_HANDLER_TA" (rect 1810 728 1933 743)(font "Arial" ))
+ (text "INT_HANDLER_TA" (rect 1810 728 1905 740)(font "Arial" ))
(pt 1880 744)
(pt 1800 744)
)
(connector
- (text "DSP_TA" (rect 1810 712 1864 727)(font "Arial" ))
+ (text "DSP_TA" (rect 1810 712 1851 724)(font "Arial" ))
(pt 1880 728)
(pt 1800 728)
)
@@ -5239,7 +4831,7 @@ applicable agreement for further details.
(pt 2504 760)
)
(connector
- (text "DDRCLK[0]" (rect 2450 744 2525 759)(font "Arial" ))
+ (text "DDRCLK[0]" (rect 2450 744 2509 756)(font "Arial" ))
(pt 2440 760)
(pt 2504 760)
)
@@ -5248,38 +4840,38 @@ applicable agreement for further details.
(pt 2536 760)
)
(connector
- (text "MAIN_CLK" (rect 1186 88 1255 103)(font "Arial" ))
+ (text "MAIN_CLK" (rect 1186 88 1240 100)(font "Arial" ))
(pt 1184 104)
(pt 1264 104)
)
(connector
- (text "nRSTO" (rect 1194 40 1241 55)(font "Arial" ))
+ (text "nRSTO" (rect 1194 40 1229 52)(font "Arial" ))
(pt 1184 56)
(pt 1264 56)
)
(connector
- (text "BA[1..0]" (rect 1682 456 1730 471)(font "Arial" ))
+ (text "BA[1..0]" (rect 1682 456 1722 468)(font "Arial" ))
(pt 1672 472)
(pt 1832 472)
(bus)
)
(connector
- (text "PIXEL_CLK" (rect 2394 -64 2469 -49)(font "Arial" ))
+ (text "PIXEL_CLK" (rect 2394 -64 2450 -52)(font "Arial" ))
(pt 2384 -48)
(pt 2464 -48)
)
(connector
- (text "PIXEL_CLK" (rect 2394 56 2469 71)(font "Arial" ))
+ (text "PIXEL_CLK" (rect 2394 56 2450 68)(font "Arial" ))
(pt 2384 72)
(pt 2464 72)
)
(connector
- (text "nBLANK" (rect 2394 24 2448 39)(font "Arial" ))
+ (text "nBLANK" (rect 2394 24 2435 36)(font "Arial" ))
(pt 2464 40)
(pt 2384 40)
)
(connector
- (text "nBLANK" (rect 2394 40 2448 55)(font "Arial" ))
+ (text "nBLANK" (rect 2394 40 2435 52)(font "Arial" ))
(pt 2464 56)
(pt 2384 56)
)
@@ -5292,7 +4884,7 @@ applicable agreement for further details.
(pt 2712 40)
)
(connector
- (text "PIXEL_CLK" (rect 1826 -48 1901 -33)(font "Arial" ))
+ (text "PIXEL_CLK" (rect 1826 -48 1882 -36)(font "Arial" ))
(pt 1816 -32)
(pt 1896 -32)
)
@@ -5301,12 +4893,12 @@ applicable agreement for further details.
(pt 2136 -64)
)
(connector
- (text "PIXEL_CLK" (rect 1682 232 1757 247)(font "Arial" ))
+ (text "PIXEL_CLK" (rect 1682 232 1738 244)(font "Arial" ))
(pt 1744 248)
(pt 1672 248)
)
(connector
- (text "PIXEL_CLK" (rect 2394 184 2469 199)(font "Arial" ))
+ (text "PIXEL_CLK" (rect 2394 184 2450 196)(font "Arial" ))
(pt 2384 200)
(pt 2464 200)
)
@@ -5339,25 +4931,10 @@ applicable agreement for further details.
(pt 2440 160)
)
(connector
- (text "nFB_CS3" (rect 1170 3128 1232 3143)(font "Arial" ))
+ (text "nFB_CS3" (rect 1170 3128 1217 3140)(font "Arial" ))
(pt 1264 3144)
(pt 1160 3144)
)
-(connector
- (text "nBLANK" (rect 1154 1968 1208 1983)(font "Arial" ))
- (pt 1264 1984)
- (pt 1144 1984)
-)
-(connector
- (text "DSP_INT" (rect 1154 1944 1214 1959)(font "Arial" ))
- (pt 1264 1960)
- (pt 1144 1960)
-)
-(connector
- (text "STEP_DIR" (rect 1682 1752 1751 1767)(font "Arial" ))
- (pt 1672 1768)
- (pt 1856 1768)
-)
(connector
(pt 1904 1768)
(pt 2136 1768)
@@ -5367,129 +4944,52 @@ applicable agreement for further details.
(pt 2136 1816)
)
(connector
- (text "WR_DATA" (rect 1682 1800 1749 1815)(font "Arial" ))
- (pt 1672 1816)
- (pt 1856 1816)
-)
-(connector
- (text "DMA_DRQ" (rect 1130 2856 1199 2871)(font "Arial" ))
+ (text "DMA_DRQ" (rect 1130 2856 1184 2868)(font "Arial" ))
(pt 1264 2872)
(pt 1120 2872)
)
-(connector
- (text "DMA_DRQ" (rect 1682 2096 1751 2111)(font "Arial" ))
- (pt 1784 2112)
- (pt 1672 2112)
-)
-(connector
- (text "FDC_CLK" (rect 1202 880 1268 895)(font "Arial" ))
- (pt 1192 896)
- (pt 1264 896)
-)
-(connector
- (text "MOT_ON" (rect 1626 1728 1685 1743)(font "Arial" ))
- (pt 1672 1744)
- (pt 1800 1744)
-)
(connector
(pt 1848 1744)
(pt 2136 1744)
)
-(connector
- (text "STEP" (rect 1626 1776 1662 1791)(font "Arial" ))
- (pt 1672 1792)
- (pt 1800 1792)
-)
(connector
(pt 1848 1792)
(pt 2136 1792)
)
-(connector
- (text "WR_GATE" (rect 1690 1824 1758 1839)(font "Arial" ))
- (pt 1672 1840)
- (pt 1800 1840)
-)
(connector
(pt 1848 1840)
(pt 2136 1840)
)
(connector
- (text "FB_ALE" (rect 1186 1992 1237 2007)(font "Arial" ))
- (pt 1144 2008)
- (pt 1264 2008)
-)
-(connector
- (text "AMKB_TX" (rect 1946 1392 2008 1407)(font "Arial" ))
- (pt 1672 1408)
- (pt 2112 1408)
-)
-(connector
- (text "PIC_AMKB_RX" (rect 786 1504 882 1519)(font "Arial" ))
- (pt 776 1520)
- (pt 1264 1520)
-)
-(connector
- (pt 400 -16)
- (pt 440 -16)
-)
-(connector
- (pt 440 248)
- (pt 400 248)
-)
-(connector
- (pt 400 -16)
- (pt 400 248)
-)
-(connector
- (pt 400 248)
- (pt 400 304)
-)
-(connector
- (text "CLK2M" (rect 754 -32 801 -17)(font "Arial" ))
- (pt 744 -16)
- (pt 816 -16)
-)
-(connector
- (text "FDC_CLK" (rect 754 -8 820 7)(font "Arial" ))
- (pt 744 8)
- (pt 816 8)
-)
-(connector
- (text "FB_AD[31..0]" (rect 370 1352 453 1367)(font "Arial" ))
+ (text "FB_AD[31..0]" (rect 370 1352 437 1364)(font "Arial" ))
(pt 352 1368)
(pt 464 1368)
(bus)
)
(connector
- (text "FB_ADR[31..0]" (rect 642 1376 736 1391)(font "Arial" ))
+ (text "FB_ADR[31..0]" (rect 642 1376 717 1388)(font "Arial" ))
(pt 608 1392)
(pt 760 1392)
(bus)
)
(connector
- (text "DDR_SYNC_66M" (rect 378 1368 492 1383)(font "Arial" ))
+ (text "DDR_SYNC_66M" (rect 378 1368 466 1380)(font "Arial" ))
(pt 368 1384)
(pt 464 1384)
)
(connector
- (text "FB_ALE" (rect 386 1384 437 1399)(font "Arial" ))
+ (text "FB_ALE" (rect 386 1384 426 1396)(font "Arial" ))
(pt 376 1400)
(pt 464 1400)
)
(connector
- (text "ACP_CONF[31..0]" (rect 1682 2568 1797 2583)(font "Arial" ))
+ (text "ACP_CONF[31..0]" (rect 1682 2568 1774 2580)(font "Arial" ))
(pt 1672 2584)
(pt 1832 2584)
(bus)
)
(connector
- (text "ACP_CONF[31..24]" (rect 1146 2064 1269 2079)(font "Arial" ))
- (pt 1136 2080)
- (pt 1264 2080)
- (bus)
-)
-(connector
- (text "TIN0" (rect 1682 2624 1712 2639)(font "Arial" ))
+ (text "TIN0" (rect 1682 2624 1705 2636)(font "Arial" ))
(pt 1832 2640)
(pt 1672 2640)
)
@@ -5514,42 +5014,27 @@ applicable agreement for further details.
(pt 2424 -64)
)
(connector
- (text "HD_DD" (rect 1050 1616 1100 1631)(font "Arial" ))
- (pt 1040 1632)
- (pt 1264 1632)
-)
-(connector
- (text "CLK48M" (rect 754 40 809 55)(font "Arial" ))
- (pt 744 56)
- (pt 840 56)
-)
-(connector
- (text "CLK25M" (rect 754 16 809 31)(font "Arial" ))
- (pt 744 32)
- (pt 864 32)
-)
-(connector
- (text "DDRCLK[0]" (rect 762 -296 837 -281)(font "Arial" ))
+ (text "DDRCLK[0]" (rect 762 -296 821 -284)(font "Arial" ))
(pt 752 -280)
(pt 848 -280)
)
(connector
- (text "DDRCLK[1]" (rect 762 -272 837 -257)(font "Arial" ))
+ (text "DDRCLK[1]" (rect 762 -272 821 -260)(font "Arial" ))
(pt 752 -256)
(pt 848 -256)
)
(connector
- (text "DDRCLK[2]" (rect 762 -248 837 -233)(font "Arial" ))
+ (text "DDRCLK[2]" (rect 762 -248 821 -236)(font "Arial" ))
(pt 752 -232)
(pt 848 -232)
)
(connector
- (text "DDRCLK[3]" (rect 762 -224 837 -209)(font "Arial" ))
+ (text "DDRCLK[3]" (rect 762 -224 821 -212)(font "Arial" ))
(pt 752 -208)
(pt 848 -208)
)
(connector
- (text "DDR_SYNC_66M" (rect 762 -200 876 -185)(font "Arial" ))
+ (text "DDR_SYNC_66M" (rect 762 -200 850 -188)(font "Arial" ))
(pt 752 -184)
(pt 848 -184)
)
@@ -5558,15 +5043,10 @@ applicable agreement for further details.
(pt 472 672)
)
(connector
- (text "VIDEO_RECONFIG" (rect 74 496 199 511)(font "Arial" ))
+ (text "VIDEO_RECONFIG" (rect 74 496 173 508)(font "Arial" ))
(pt 192 512)
(pt 64 512)
)
-(connector
- (text "MAIN_CLK" (rect 330 -296 399 -281)(font "Arial" ))
- (pt 264 -280)
- (pt 448 -280)
-)
(connector
(pt 408 640)
(pt 472 640)
@@ -5576,13 +5056,13 @@ applicable agreement for further details.
(pt 512 624)
)
(connector
- (text "VR_D[8..0]" (rect 418 552 486 567)(font "Arial" ))
+ (text "VR_D[8..0]" (rect 418 552 473 564)(font "Arial" ))
(pt 496 568)
(pt 408 568)
(bus)
)
(connector
- (text "MAIN_CLK" (rect 122 664 191 679)(font "Arial" ))
+ (text "MAIN_CLK" (rect 122 664 176 676)(font "Arial" ))
(pt 112 680)
(pt 192 680)
)
@@ -5643,7 +5123,7 @@ applicable agreement for further details.
(pt 1064 616)
)
(connector
- (text "FB_ADR[5..2]" (rect 82 568 168 583)(font "Arial" ))
+ (text "FB_ADR[5..2]" (rect 82 568 151 580)(font "Arial" ))
(pt 192 584)
(pt 72 584)
(bus)
@@ -5673,29 +5153,29 @@ applicable agreement for further details.
(pt 72 816)
)
(connector
- (text "FB_ADR[8..6]" (rect 82 584 168 599)(font "Arial" ))
+ (text "FB_ADR[8..6]" (rect 82 584 151 596)(font "Arial" ))
(pt 192 600)
(pt 72 600)
(bus)
)
(connector
- (text "VR_RD" (rect 98 512 146 527)(font "Arial" ))
+ (text "VR_RD" (rect 98 512 135 524)(font "Arial" ))
(pt 64 528)
(pt 192 528)
)
(connector
- (text "VR_WR" (rect 98 528 148 543)(font "Arial" ))
+ (text "VR_WR" (rect 98 528 138 540)(font "Arial" ))
(pt 64 544)
(pt 192 544)
)
(connector
- (text "VR_D[8..0]" (rect 1170 464 1238 479)(font "Arial" ))
+ (text "VR_D[8..0]" (rect 1170 464 1225 476)(font "Arial" ))
(pt 1144 480)
(pt 1264 480)
(bus)
)
(connector
- (text "VDQS[3..0]" (rect 1674 504 1743 519)(font "Arial" ))
+ (text "VDQS[3..0]" (rect 1674 504 1730 516)(font "Arial" ))
(pt 2040 544)
(pt 1960 544)
(bus)
@@ -5711,7 +5191,7 @@ applicable agreement for further details.
(bus)
)
(connector
- (text "VDM[3..0]" (rect 1682 528 1742 543)(font "Arial" ))
+ (text "VDM[3..0]" (rect 1682 528 1731 540)(font "Arial" ))
(pt 1944 568)
(pt 1888 568)
(bus)
@@ -5727,32 +5207,32 @@ applicable agreement for further details.
(bus)
)
(connector
- (text "VIDEO_RECONFIG" (rect 1674 560 1799 575)(font "Arial" ))
+ (text "VIDEO_RECONFIG" (rect 1674 560 1773 572)(font "Arial" ))
(pt 1672 576)
(pt 1792 576)
)
(connector
- (text "VR_WR" (rect 1698 592 1748 607)(font "Arial" ))
+ (text "VR_WR" (rect 1698 592 1738 604)(font "Arial" ))
(pt 1672 608)
(pt 1792 608)
)
(connector
- (text "VR_BUSY" (rect 418 496 482 511)(font "Arial" ))
+ (text "VR_BUSY" (rect 418 496 469 508)(font "Arial" ))
(pt 408 512)
(pt 480 512)
)
(connector
- (text "VR_BUSY" (rect 1170 448 1234 463)(font "Arial" ))
+ (text "VR_BUSY" (rect 1170 448 1221 460)(font "Arial" ))
(pt 1144 464)
(pt 1264 464)
)
(connector
- (text "VR_RD" (rect 1698 576 1746 591)(font "Arial" ))
+ (text "VR_RD" (rect 1698 576 1735 588)(font "Arial" ))
(pt 1792 592)
(pt 1672 592)
)
(connector
- (text "nRSTO" (rect -86 680 -39 695)(font "Arial" ))
+ (text "nRSTO" (rect -86 680 -51 692)(font "Arial" ))
(pt -96 696)
(pt -16 696)
)
@@ -5761,64 +5241,28 @@ applicable agreement for further details.
(pt 192 696)
)
(connector
- (text "FB_AD[24..16]" (rect 82 552 174 567)(font "Arial" ))
+ (text "FB_AD[24..16]" (rect 82 552 155 564)(font "Arial" ))
(pt 72 568)
(pt 192 568)
(bus)
)
(connector
- (text "CLK48M" (rect 538 552 593 567)(font "Arial" ))
+ (text "CLK48M" (rect 538 552 579 564)(font "Arial" ))
(pt 528 568)
(pt 608 568)
)
(connector
- (text "CLK_VIDEO" (rect 1162 552 1241 567)(font "Arial" ))
+ (text "CLK_VIDEO" (rect 1162 552 1223 564)(font "Arial" ))
(pt 984 568)
(pt 1264 568)
)
(connector
- (text "CLK33M" (rect 1202 584 1257 599)(font "Arial" ))
+ (text "CLK33M" (rect 1202 584 1243 596)(font "Arial" ))
(pt 1264 600)
(pt 1192 600)
)
(connector
- (text "CLK500k" (rect 802 232 862 247)(font "Arial" ))
- (pt 768 248)
- (pt 864 248)
-)
-(connector
- (text "CLK2M4576" (rect 802 256 882 271)(font "Arial" ))
- (pt 768 272)
- (pt 864 272)
-)
-(connector
- (text "CLK24M576" (rect 802 280 882 295)(font "Arial" ))
- (pt 768 296)
- (pt 864 296)
-)
-(connector
- (text "nRSTO" (rect 1018 424 1065 439)(font "Arial" ))
- (pt 1008 440)
- (pt 1096 440)
-)
-(connector
- (pt 768 320)
- (pt 872 320)
-)
-(connector
- (pt 872 432)
- (pt 944 432)
-)
-(connector
- (pt 840 448)
- (pt 944 448)
-)
-(connector
- (pt 872 320)
- (pt 872 432)
-)
-(connector
- (text "HSYNC" (rect 2314 -96 2363 -81)(font "Arial" ))
+ (text "HSYNC" (rect 2314 -96 2354 -84)(font "Arial" ))
(pt 2304 -80)
(pt 2424 -80)
)
@@ -5827,11 +5271,729 @@ applicable agreement for further details.
(pt 2464 -80)
)
(connector
- (text "VSYNC" (rect 1746 -80 1793 -65)(font "Arial" ))
+ (text "VSYNC" (rect 1746 -80 1784 -68)(font "Arial" ))
(pt 1736 -64)
(pt 1856 -64)
)
+(connector
+ (text "DVI_INT" (rect 858 2632 900 2644)(font "Arial" ))
+ (pt 848 2648)
+ (pt 1264 2648)
+)
+(connector
+ (text "MAIN_CLK" (rect 330 -296 384 -284)(font "Arial" ))
+ (pt 264 -280)
+ (pt 400 -280)
+)
+(connector
+ (pt 400 -280)
+ (pt 448 -280)
+)
+(connector
+ (text "CLK33MDIR" (rect 234 296 295 308)(font "Arial" ))
+ (pt 224 312)
+ (pt 288 312)
+)
+(connector
+ (pt 800 160)
+ (pt 400 160)
+)
+(connector
+ (text "CLK33M" (rect 858 144 899 156)(font "Arial" ))
+ (pt 848 160)
+ (pt 952 160)
+)
+(connector
+ (text "FB_AD[31..0]" (rect 1682 776 1749 788)(font "Arial" ))
+ (pt 1832 792)
+ (pt 1672 792)
+ (bus)
+)
+(connector
+ (text "FB_ADR[31..0]" (rect 1146 1072 1221 1084)(font "Arial" ))
+ (pt 1112 1088)
+ (pt 1264 1088)
+ (bus)
+)
+(connector
+ (text "MAIN_CLK" (rect 1162 784 1216 796)(font "Arial" ))
+ (pt 1152 800)
+ (pt 1264 800)
+)
+(connector
+ (text "CLK33M" (rect 1210 760 1251 772)(font "Arial" ))
+ (pt 1200 776)
+ (pt 1264 776)
+)
+(connector
+ (text "CLK2M" (rect 1202 808 1237 820)(font "Arial" ))
+ (pt 1192 824)
+ (pt 1264 824)
+)
+(connector
+ (text "CLK500k" (rect 1202 832 1246 844)(font "Arial" ))
+ (pt 1192 848)
+ (pt 1264 848)
+)
+(connector
+ (text "nRSTO" (rect 1170 1120 1205 1132)(font "Arial" ))
+ (pt 1264 1136)
+ (pt 1160 1136)
+)
+(connector
+ (text "CLK2M4576" (rect 1202 856 1261 868)(font "Arial" ))
+ (pt 1192 872)
+ (pt 1264 872)
+)
+(connector
+ (text "nMFP_INT" (rect 1682 2072 1733 2084)(font "Arial" ))
+ (pt 1672 2088)
+ (pt 1784 2088)
+)
+(connector
+ (text "VSYNC" (rect 1130 1920 1168 1932)(font "Arial" ))
+ (pt 1264 1936)
+ (pt 1120 1936)
+)
+(connector
+ (text "HSYNC" (rect 1130 1896 1170 1908)(font "Arial" ))
+ (pt 1264 1912)
+ (pt 1120 1912)
+)
+(connector
+ (text "nBLANK" (rect 1154 1968 1195 1980)(font "Arial" ))
+ (pt 1264 1984)
+ (pt 1144 1984)
+)
+(connector
+ (text "DSP_INT" (rect 1154 1944 1200 1956)(font "Arial" ))
+ (pt 1264 1960)
+ (pt 1144 1960)
+)
+(connector
+ (text "DMA_DRQ" (rect 1682 2096 1736 2108)(font "Arial" ))
+ (pt 1784 2112)
+ (pt 1672 2112)
+)
+(connector
+ (text "FDC_CLK" (rect 1202 880 1252 892)(font "Arial" ))
+ (pt 1192 896)
+ (pt 1264 896)
+)
+(connector
+ (text "FB_ALE" (rect 1186 1992 1226 2004)(font "Arial" ))
+ (pt 1144 2008)
+ (pt 1264 2008)
+)
+(connector
+ (text "ACP_CONF[31..24]" (rect 1146 2064 1243 2076)(font "Arial" ))
+ (pt 1136 2080)
+ (pt 1264 2080)
+ (bus)
+)
+(connector
+ (text "LP_STR" (rect 1682 824 1722 836)(font "Arial" ))
+ (pt 1672 840)
+ (pt 1832 840)
+)
+(connector
+ (text "LP_DIR" (rect 1682 848 1720 860)(font "Arial" ))
+ (pt 1672 864)
+ (pt 1832 864)
+)
+(connector
+ (text "nACSI_ACK" (rect 1682 928 1742 940)(font "Arial" ))
+ (pt 1672 944)
+ (pt 1832 944)
+)
+(connector
+ (text "nFB_WR" (rect 1170 928 1214 940)(font "Arial" ))
+ (pt 1160 944)
+ (pt 1264 944)
+)
+(connector
+ (text "nACSI_RESET" (rect 1682 952 1755 964)(font "Arial" ))
+ (pt 1672 968)
+ (pt 1832 968)
+)
+(connector
+ (text "nFB_CS1" (rect 1162 952 1209 964)(font "Arial" ))
+ (pt 1160 968)
+ (pt 1264 968)
+)
+(connector
+ (text "nACSI_CS" (rect 1682 976 1735 988)(font "Arial" ))
+ (pt 1672 992)
+ (pt 1832 992)
+)
+(connector
+ (text "nFB_CS2" (rect 1170 976 1217 988)(font "Arial" ))
+ (pt 1160 992)
+ (pt 1264 992)
+)
+(connector
+ (text "ACSI_DIR" (rect 1682 1000 1733 1012)(font "Arial" ))
+ (pt 1672 1016)
+ (pt 1832 1016)
+)
+(connector
+ (text "FB_SIZE0" (rect 1162 1000 1212 1012)(font "Arial" ))
+ (pt 1160 1016)
+ (pt 1264 1016)
+)
+(connector
+ (text "ACSI_A1" (rect 1682 1024 1726 1036)(font "Arial" ))
+ (pt 1672 1040)
+ (pt 1832 1040)
+)
+(connector
+ (text "FB_SIZE1" (rect 1162 1024 1212 1036)(font "Arial" ))
+ (pt 1160 1040)
+ (pt 1264 1040)
+)
+(connector
+ (text "nFB_BURST" (rect 1162 1048 1224 1060)(font "Arial" ))
+ (pt 1160 1064)
+ (pt 1264 1064)
+)
+(connector
+ (text "SCSI_PAR" (rect 1682 1080 1736 1092)(font "Arial" ))
+ (pt 1672 1096)
+ (pt 1840 1096)
+)
+(connector
+ (text "nDACK0" (rect 1202 1096 1244 1108)(font "Arial" ))
+ (pt 1160 1112)
+ (pt 1264 1112)
+)
+(connector
+ (text "nSCSI_ACK" (rect 1682 1104 1742 1116)(font "Arial" ))
+ (pt 1672 1120)
+ (pt 1840 1120)
+)
+(connector
+ (text "nSCSI_ATN" (rect 1682 1128 1741 1140)(font "Arial" ))
+ (pt 1672 1144)
+ (pt 1840 1144)
+)
+(connector
+ (text "SCSI_DIR" (rect 1682 1152 1733 1164)(font "Arial" ))
+ (pt 1672 1168)
+ (pt 1840 1168)
+)
+(connector
+ (text "LP_BUSY" (rect 1114 1160 1163 1172)(font "Arial" ))
+ (pt 1104 1176)
+ (pt 1264 1176)
+)
+(connector
+ (text "nSCSI_RST" (rect 1682 1176 1741 1188)(font "Arial" ))
+ (pt 1672 1192)
+ (pt 1840 1192)
+)
+(connector
+ (text "nACSI_DRQ" (rect 1034 1192 1096 1204)(font "Arial" ))
+ (pt 1024 1208)
+ (pt 1264 1208)
+)
+(connector
+ (text "nSCSI_SEL" (rect 1680 1200 1737 1212)(font "Arial" ))
+ (pt 1672 1216)
+ (pt 1840 1216)
+)
+(connector
+ (text "nACSI_INT" (rect 1034 1216 1089 1228)(font "Arial" ))
+ (pt 1024 1232)
+ (pt 1264 1232)
+)
+(connector
+ (text "nSCSI_BUSY" (rect 1682 1224 1750 1236)(font "Arial" ))
+ (pt 1672 1240)
+ (pt 1840 1240)
+)
+(connector
+ (text "nSCSI_DRQ" (rect 1114 1248 1176 1260)(font "Arial" ))
+ (pt 1104 1264)
+ (pt 1264 1264)
+)
+(connector
+ (text "nSCSI_C_D" (rect 1114 1272 1174 1284)(font "Arial" ))
+ (pt 1104 1288)
+ (pt 1264 1288)
+)
+(connector
+ (text "nSCSI_I_O" (rect 1114 1296 1169 1308)(font "Arial" ))
+ (pt 1104 1312)
+ (pt 1264 1312)
+)
+(connector
+ (text "TxD" (rect 1682 1312 1702 1324)(font "Arial" ))
+ (pt 1672 1328)
+ (pt 1840 1328)
+)
+(connector
+ (text "nSCSI_MSG" (rect 1114 1320 1175 1332)(font "Arial" ))
+ (pt 1104 1336)
+ (pt 1264 1336)
+)
+(connector
+ (text "RTS" (rect 1682 1336 1703 1348)(font "Arial" ))
+ (pt 1672 1352)
+ (pt 1840 1352)
+)
+(connector
+ (text "DTR" (rect 1680 1360 1702 1372)(font "Arial" ))
+ (pt 1672 1376)
+ (pt 1848 1376)
+)
+(connector
+ (text "RxD" (rect 1114 1384 1136 1396)(font "Arial" ))
+ (pt 1104 1400)
+ (pt 1264 1400)
+)
+(connector
+ (text "AMKB_TX" (rect 1946 1392 1993 1404)(font "Arial" ))
+ (pt 1672 1408)
+ (pt 2112 1408)
+)
+(connector
+ (text "CTS" (rect 1114 1408 1135 1420)(font "Arial" ))
+ (pt 1104 1424)
+ (pt 1264 1424)
+)
+(connector
+ (text "IDE_RES" (rect 1682 1424 1729 1436)(font "Arial" ))
+ (pt 1672 1440)
+ (pt 1848 1440)
+)
+(connector
+ (text "RI" (rect 1114 1432 1125 1444)(font "Arial" ))
+ (pt 1104 1448)
+ (pt 1264 1448)
+)
+(connector
+ (text "nIDE_CS0" (rect 1682 1448 1733 1460)(font "Arial" ))
+ (pt 1672 1464)
+ (pt 1848 1464)
+)
+(connector
+ (text "DCD" (rect 1114 1456 1138 1468)(font "Arial" ))
+ (pt 1104 1472)
+ (pt 1264 1472)
+)
+(connector
+ (text "nIDE_CS1" (rect 1682 1472 1733 1484)(font "Arial" ))
+ (pt 1672 1488)
+ (pt 1856 1488)
+)
+(connector
+ (text "nIDE_WR" (rect 1682 1496 1731 1508)(font "Arial" ))
+ (pt 1672 1512)
+ (pt 1848 1512)
+)
+(connector
+ (text "PIC_AMKB_RX" (rect 786 1504 860 1516)(font "Arial" ))
+ (pt 776 1520)
+ (pt 1264 1520)
+)
+(connector
+ (text "nIDE_RD" (rect 1682 1520 1729 1532)(font "Arial" ))
+ (pt 1672 1536)
+ (pt 1848 1536)
+)
+(connector
+ (text "IDE_RDY" (rect 1114 1536 1163 1548)(font "Arial" ))
+ (pt 1104 1552)
+ (pt 1264 1552)
+)
+(connector
+ (text "nCF_CS0" (rect 1682 1544 1730 1556)(font "Arial" ))
+ (pt 1672 1560)
+ (pt 1848 1560)
+)
+(connector
+ (text "IDE_INT" (rect 1114 1560 1156 1572)(font "Arial" ))
+ (pt 1104 1576)
+ (pt 1264 1576)
+)
+(connector
+ (text "nCF_CS1" (rect 1682 1568 1730 1580)(font "Arial" ))
+ (pt 1672 1584)
+ (pt 1848 1584)
+)
+(connector
+ (text "WP_CF_CARD" (rect 1112 1584 1188 1596)(font "Arial" ))
+ (pt 1104 1600)
+ (pt 1264 1600)
+)
+(connector
+ (text "nROM3" (rect 1754 1600 1790 1612)(font "Arial" ))
+ (pt 1672 1616)
+ (pt 1920 1616)
+)
+(connector
+ (text "nROM4" (rect 1754 1624 1790 1636)(font "Arial" ))
+ (pt 1672 1640)
+ (pt 1920 1640)
+)
+(connector
+ (text "nINDEX" (rect 1050 1640 1088 1652)(font "Arial" ))
+ (pt 1040 1656)
+ (pt 1264 1656)
+)
+(connector
+ (text "nRP_UDS" (rect 1744 1648 1794 1660)(font "Arial" ))
+ (pt 1672 1664)
+ (pt 1920 1664)
+)
+(connector
+ (text "TRACK00" (rect 1050 1664 1098 1676)(font "Arial" ))
+ (pt 1040 1680)
+ (pt 1264 1680)
+)
+(connector
+ (text "nRP_LDS" (rect 1746 1672 1794 1684)(font "Arial" ))
+ (pt 1672 1688)
+ (pt 1920 1688)
+)
+(connector
+ (text "nWP" (rect 1050 1688 1073 1700)(font "Arial" ))
+ (pt 1040 1704)
+ (pt 1264 1704)
+)
+(connector
+ (text "DSA_D" (rect 1682 1704 1718 1716)(font "Arial" ))
+ (pt 1672 1720)
+ (pt 1856 1720)
+)
+(connector
+ (text "nRD_DATA" (rect 1050 1712 1106 1724)(font "Arial" ))
+ (pt 1040 1728)
+ (pt 1264 1728)
+)
+(connector
+ (text "nDCHG" (rect 1050 1736 1088 1748)(font "Arial" ))
+ (pt 1040 1752)
+ (pt 1264 1752)
+)
+(connector
+ (text "SD_DATA0" (rect 1114 1768 1169 1780)(font "Arial" ))
+ (pt 1104 1784)
+ (pt 1264 1784)
+)
+(connector
+ (text "SD_DATA1" (rect 1114 1792 1169 1804)(font "Arial" ))
+ (pt 1104 1808)
+ (pt 1264 1808)
+)
+(connector
+ (text "SD_DATA2" (rect 1114 1816 1169 1828)(font "Arial" ))
+ (pt 1104 1832)
+ (pt 1264 1832)
+)
+(connector
+ (text "WR_GATE" (rect 1690 1824 1743 1836)(font "Arial" ))
+ (pt 1672 1840)
+ (pt 1800 1840)
+)
+(connector
+ (text "SD_CARD_DEDECT" (rect 1138 1840 1241 1852)(font "Arial" ))
+ (pt 1128 1856)
+ (pt 1264 1856)
+)
+(connector
+ (text "nSDSEL" (rect 1682 1848 1723 1860)(font "Arial" ))
+ (pt 1672 1864)
+ (pt 1856 1864)
+)
+(connector
+ (text "SD_WP" (rect 1114 1864 1152 1876)(font "Arial" ))
+ (pt 1104 1880)
+ (pt 1264 1880)
+)
+(connector
+ (text "YM_QA" (rect 1762 1904 1799 1916)(font "Arial" ))
+ (pt 1672 1920)
+ (pt 1928 1920)
+)
+(connector
+ (text "YM_QB" (rect 1762 1928 1799 1940)(font "Arial" ))
+ (pt 1672 1944)
+ (pt 1928 1944)
+)
+(connector
+ (text "YM_QC" (rect 1762 1952 1800 1964)(font "Arial" ))
+ (pt 1672 1968)
+ (pt 1928 1968)
+)
+(connector
+ (text "SD_CD_DATA3" (rect 1682 1984 1759 1996)(font "Arial" ))
+ (pt 1672 2000)
+ (pt 1856 2000)
+)
+(connector
+ (text "SD_CDM_D1" (rect 1682 2008 1748 2020)(font "Arial" ))
+ (pt 1672 2024)
+ (pt 1856 2024)
+)
+(connector
+ (text "SD_CLK" (rect 1682 2032 1724 2044)(font "Arial" ))
+ (pt 1672 2048)
+ (pt 1856 2048)
+)
+(connector
+ (text "nFB_OE" (rect 1170 904 1211 916)(font "Arial" ))
+ (pt 1160 920)
+ (pt 1264 920)
+)
+(connector
+ (text "LP_D[7..0]" (rect 1810 800 1863 812)(font "Arial" ))
+ (pt 1672 816)
+ (pt 1960 816)
+ (bus)
+)
+(connector
+ (text "ACSI_D[7..0]" (rect 1754 880 1820 892)(font "Arial" ))
+ (pt 1672 896)
+ (pt 1904 896)
+ (bus)
+)
+(connector
+ (text "SCSI_D[7..0]" (rect 1786 1056 1852 1068)(font "Arial" ))
+ (pt 1672 1072)
+ (pt 1936 1072)
+ (bus)
+)
+(connector
+ (text "AMKB_RX" (rect 786 1480 835 1492)(font "Arial" ))
+ (pt 776 1496)
+ (pt 1264 1496)
+)
+(connector
+ (text "FALCON_IO_TA" (rect 1682 744 1763 756)(font "Arial" ))
+ (pt 1672 760)
+ (pt 1880 760)
+)
+(connector
+ (text "STEP_DIR" (rect 1682 1752 1735 1764)(font "Arial" ))
+ (pt 1672 1768)
+ (pt 1856 1768)
+)
+(connector
+ (text "WR_DATA" (rect 1682 1800 1735 1812)(font "Arial" ))
+ (pt 1672 1816)
+ (pt 1856 1816)
+)
+(connector
+ (text "MOT_ON" (rect 1626 1728 1670 1740)(font "Arial" ))
+ (pt 1672 1744)
+ (pt 1800 1744)
+)
+(connector
+ (text "STEP" (rect 1626 1776 1653 1788)(font "Arial" ))
+ (pt 1672 1792)
+ (pt 1800 1792)
+)
+(connector
+ (text "HD_DD" (rect 1050 1616 1088 1628)(font "Arial" ))
+ (pt 1040 1632)
+ (pt 1264 1632)
+)
+(connector
+ (pt 400 248)
+ (pt 440 248)
+)
+(connector
+ (pt 400 160)
+ (pt 400 248)
+)
+(connector
+ (text "nRSTO" (rect 1026 424 1061 436)(font "Arial" ))
+ (pt 1016 440)
+ (pt 1104 440)
+)
+(connector
+ (pt 920 432)
+ (pt 952 432)
+)
+(connector
+ (pt 760 448)
+ (pt 952 448)
+)
+(connector
+ (pt 824 440)
+ (pt 952 440)
+)
+(connector
+ (pt 1120 328)
+ (pt 920 328)
+)
+(connector
+ (pt 920 328)
+ (pt 920 432)
+)
+(connector
+ (pt 1888 2192)
+ (pt 1888 2176)
+)
+(connector
+ (pt 1848 2176)
+ (pt 1888 2176)
+)
+(connector
+ (pt 1848 2176)
+ (pt 1848 2208)
+)
+(connector
+ (pt 1848 2208)
+ (pt 1864 2208)
+)
+(connector
+ (text "CLK2M" (rect 1778 2192 1813 2204)(font "Arial" ))
+ (pt 1768 2208)
+ (pt 1848 2208)
+)
+(connector
+ (text "FB_ADR[31..0]" (rect 1146 2552 1221 2564)(font "Arial" ))
+ (pt 1112 2568)
+ (pt 1264 2568)
+ (bus)
+)
+(connector
+ (text "nFB_WR" (rect 1162 2432 1206 2444)(font "Arial" ))
+ (pt 1152 2448)
+ (pt 1264 2448)
+)
+(connector
+ (text "nFB_CS1" (rect 1154 2456 1201 2468)(font "Arial" ))
+ (pt 1152 2472)
+ (pt 1264 2472)
+)
+(connector
+ (text "FB_SIZE0" (rect 1154 2504 1204 2516)(font "Arial" ))
+ (pt 1152 2520)
+ (pt 1264 2520)
+)
+(connector
+ (text "FB_SIZE1" (rect 1154 2528 1204 2540)(font "Arial" ))
+ (pt 1152 2544)
+ (pt 1264 2544)
+)
+(connector
+ (text "MAIN_CLK" (rect 1162 2384 1216 2396)(font "Arial" ))
+ (pt 1152 2400)
+ (pt 1264 2400)
+)
+(connector
+ (text "nFB_CS2" (rect 1162 2480 1209 2492)(font "Arial" ))
+ (pt 1152 2496)
+ (pt 1264 2496)
+)
+(connector
+ (text "nFB_OE" (rect 1170 2408 1211 2420)(font "Arial" ))
+ (pt 1264 2424)
+ (pt 1160 2424)
+)
+(connector
+ (text "nRSTO" (rect 1170 2360 1205 2372)(font "Arial" ))
+ (pt 1264 2376)
+ (pt 1160 2376)
+)
+(connector
+ (pt 1912 2208)
+ (pt 1960 2208)
+)
+(connector
+ (text "MIDI_IN" (rect 1682 2208 1723 2220)(font "Arial" ))
+ (pt 1672 2224)
+ (pt 1864 2224)
+)
+(connector
+ (text "nDREQ0" (rect 1674 2120 1717 2132)(font "Arial" ))
+ (pt 1672 2136)
+ (pt 1800 2136)
+)
+(connector
+ (text "MIDI_OLR" (rect 1682 2272 1733 2284)(font "Arial" ))
+ (pt 1672 2288)
+ (pt 1920 2288)
+)
+(connector
+ (text "MIDI_TLR" (rect 1682 2232 1731 2244)(font "Arial" ))
+ (pt 1672 2248)
+ (pt 1832 2248)
+)
+(connector
+ (pt 824 440)
+ (pt 824 296)
+)
+(connector
+ (pt 824 296)
+ (pt 712 296)
+)
+(connector
+ (pt 376 -16)
+ (pt 368 -16)
+)
+(connector
+ (pt 1120 328)
+ (pt 1120 48)
+)
+(connector
+ (pt 400 -16)
+ (pt 464 -16)
+)
+(connector
+ (pt 400 -280)
+ (pt 400 -16)
+)
+(connector
+ (pt 400 -16)
+ (pt 400 160)
+)
+(connector
+ (pt 736 48)
+ (pt 1120 48)
+)
+(connector
+ (text "CLK25M" (rect 802 -32 843 -20)(font "Arial" ))
+ (pt 736 -16)
+ (pt 920 -16)
+)
+(connector
+ (text "CLK2M" (rect 810 -8 845 4)(font "Arial" ))
+ (pt 736 0)
+ (pt 808 0)
+)
+(connector
+ (text "CLK500k" (rect 834 8 878 20)(font "Arial" ))
+ (pt 736 16)
+ (pt 832 16)
+)
+(connector
+ (text "CLK2M4576" (rect 810 24 869 36)(font "Arial" ))
+ (pt 736 32)
+ (pt 808 32)
+)
+(connector
+ (text "CLK48M" (rect 722 232 763 244)(font "Arial" ))
+ (pt 712 248)
+ (pt 808 248)
+)
+(connector
+ (text "FDC_CLK" (rect 786 256 836 268)(font "Arial" ))
+ (pt 712 264)
+ (pt 784 264)
+)
+(connector
+ (text "CLK24M576" (rect 722 272 781 284)(font "Arial" ))
+ (pt 816 280)
+ (pt 712 280)
+)
(junction (pt 2504 760))
-(junction (pt 400 248))
(junction (pt 1856 -64))
(junction (pt 2424 -80))
+(junction (pt 400 -280))
+(junction (pt 400 160))
+(junction (pt 1848 2208))
+(junction (pt 400 -16))
diff --git a/FPGA_by_Fredi/firebee1.done b/FPGA_by_Fredi/firebee1.done
index 1674c93..edfa2a3 100644
--- a/FPGA_by_Fredi/firebee1.done
+++ b/FPGA_by_Fredi/firebee1.done
@@ -1 +1 @@
-Wed Dec 15 02:25:24 2010
+Fri Aug 28 13:39:52 2015
diff --git a/FPGA_by_Fredi/firebee1.fit.rpt b/FPGA_by_Fredi/firebee1.fit.rpt
deleted file mode 100644
index e3df129..0000000
--- a/FPGA_by_Fredi/firebee1.fit.rpt
+++ /dev/null
@@ -1,6866 +0,0 @@
-Fitter report for firebee1
-Wed Dec 15 02:25:03 2010
-Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
-
-
----------------------
-; Table of Contents ;
----------------------
- 1. Legal Notice
- 2. Fitter Summary
- 3. Fitter Settings
- 4. Parallel Compilation
- 5. I/O Assignment Warnings
- 6. Fitter Netlist Optimizations
- 7. Ignored Assignments
- 8. Incremental Compilation Preservation Summary
- 9. Incremental Compilation Partition Settings
- 10. Incremental Compilation Placement Preservation
- 11. Pin-Out File
- 12. Fitter Resource Usage Summary
- 13. Input Pins
- 14. Output Pins
- 15. Bidir Pins
- 16. Dual Purpose and Dedicated Pins
- 17. I/O Bank Usage
- 18. All Package Pins
- 19. PLL Summary
- 20. PLL Usage
- 21. Output Pin Default Load For Reported TCO
- 22. Fitter Resource Utilization by Entity
- 23. Delay Chain Summary
- 24. Pad To Core Delay Chain Fanout
- 25. Control Signals
- 26. Global & Other Fast Signals
- 27. Non-Global High Fan-Out Signals
- 28. Fitter RAM Summary
- 29. Fitter DSP Block Usage Summary
- 30. DSP Block Details
- 31. Interconnect Usage Summary
- 32. LAB Logic Elements
- 33. LAB-wide Signals
- 34. LAB Signals Sourced
- 35. LAB Signals Sourced Out
- 36. LAB Distinct Inputs
- 37. I/O Rules Summary
- 38. I/O Rules Details
- 39. I/O Rules Matrix
- 40. Fitter Device Options
- 41. Operating Settings and Conditions
- 42. Estimated Delay Added for Hold Timing
- 43. Fitter Messages
-
-
-
-----------------
-; Legal Notice ;
-----------------
-Copyright (C) 1991-2010 Altera Corporation
-Your use of Altera Corporation's design tools, logic functions
-and other software and tools, and its AMPP partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Altera Program License
-Subscription Agreement, Altera MegaCore Function License
-Agreement, or other applicable license agreement, including,
-without limitation, that your use is for the sole purpose of
-programming logic devices manufactured by Altera and sold by
-Altera or its authorized distributors. Please refer to the
-applicable agreement for further details.
-
-
-
-+-----------------------------------------------------------------------------------+
-; Fitter Summary ;
-+------------------------------------+----------------------------------------------+
-; Fitter Status ; Successful - Wed Dec 15 02:25:02 2010 ;
-; Quartus II Version ; 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition ;
-; Revision Name ; firebee1 ;
-; Top-level Entity Name ; firebee1 ;
-; Family ; Cyclone III ;
-; Device ; EP3C40F484C6 ;
-; Timing Models ; Final ;
-; Total logic elements ; 9,526 / 39,600 ( 24 % ) ;
-; Total combinational functions ; 8,061 / 39,600 ( 20 % ) ;
-; Dedicated logic registers ; 4,563 / 39,600 ( 12 % ) ;
-; Total registers ; 4749 ;
-; Total pins ; 295 / 332 ( 89 % ) ;
-; Total virtual pins ; 0 ;
-; Total memory bits ; 109,344 / 1,161,216 ( 9 % ) ;
-; Embedded Multiplier 9-bit elements ; 6 / 252 ( 2 % ) ;
-; Total PLLs ; 4 / 4 ( 100 % ) ;
-+------------------------------------+----------------------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter Settings ;
-+----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
-; Option ; Setting ; Default Value ;
-+----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
-; Device ; EP3C40F484C6 ; ;
-; Use TimeQuest Timing Analyzer ; Off ; On ;
-; Nominal Core Supply Voltage ; 1.2V ; ;
-; Minimum Core Junction Temperature ; 0 ; ;
-; Maximum Core Junction Temperature ; 85 ; ;
-; Fit Attempts to Skip ; 0 ; 0.0 ;
-; Device I/O Standard ; 3.3-V LVTTL ; ;
-; Perform Physical Synthesis for Combinational Logic for Fitting ; On ; Off ;
-; Perform Physical Synthesis for Combinational Logic for Performance ; On ; Off ;
-; Perform Register Duplication for Performance ; On ; Off ;
-; Physical Synthesis Effort Level ; Fast ; Normal ;
-; Use smart compilation ; Off ; Off ;
-; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
-; Enable compact report table ; Off ; Off ;
-; Router Timing Optimization Level ; Normal ; Normal ;
-; Placement Effort Multiplier ; 1.0 ; 1.0 ;
-; Router Effort Multiplier ; 1.0 ; 1.0 ;
-; Optimize Hold Timing ; All Paths ; All Paths ;
-; Optimize Multi-Corner Timing ; Off ; Off ;
-; PowerPlay Power Optimization ; Normal compilation ; Normal compilation ;
-; SSN Optimization ; Off ; Off ;
-; Optimize Timing ; Normal compilation ; Normal compilation ;
-; Optimize Timing for ECOs ; Off ; Off ;
-; Regenerate full fit report during ECO compiles ; Off ; Off ;
-; Optimize IOC Register Placement for Timing ; On ; On ;
-; Limit to One Fitting Attempt ; Off ; Off ;
-; Final Placement Optimizations ; Automatically ; Automatically ;
-; Fitter Aggressive Routability Optimizations ; Automatically ; Automatically ;
-; Fitter Initial Placement Seed ; 1 ; 1 ;
-; PCI I/O ; Off ; Off ;
-; Weak Pull-Up Resistor ; Off ; Off ;
-; Enable Bus-Hold Circuitry ; Off ; Off ;
-; Auto Packed Registers ; Auto ; Auto ;
-; Auto Delay Chains ; On ; On ;
-; Allow Single-ended Buffer for Differential-XSTL Input ; Off ; Off ;
-; Treat Bidirectional Pin as Output Pin ; Off ; Off ;
-; Auto Merge PLLs ; On ; On ;
-; Perform Logic to Memory Mapping for Fitting ; Off ; Off ;
-; Perform Register Retiming for Performance ; Off ; Off ;
-; Perform Asynchronous Signal Pipelining ; Off ; Off ;
-; Fitter Effort ; Auto Fit ; Auto Fit ;
-; Logic Cell Insertion - Logic Duplication ; Auto ; Auto ;
-; Auto Register Duplication ; Auto ; Auto ;
-; Auto Global Clock ; On ; On ;
-; Auto Global Register Control Signals ; On ; On ;
-; Reserve all unused pins ; As input tri-stated with weak pull-up ; As input tri-stated with weak pull-up ;
-; Stop After Congestion Map Generation ; Off ; Off ;
-; Save Intermediate Fitting Results ; Off ; Off ;
-; Synchronizer Identification ; Off ; Off ;
-; Enable Beneficial Skew Optimization ; On ; On ;
-; Optimize Design for Metastability ; On ; On ;
-; Force Fitter to Avoid Periphery Placement Warnings ; Off ; Off ;
-; Use Best Effort Settings for Compilation ; Off ; Off ;
-+----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
-
-
-Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
-+-------------------------------------+
-; Parallel Compilation ;
-+----------------------------+--------+
-; Processors ; Number ;
-+----------------------------+--------+
-; Number detected on machine ; 4 ;
-; Maximum allowed ; 1 ;
-+----------------------------+--------+
-
-
-+------------------------------------------------------+
-; I/O Assignment Warnings ;
-+---------------+--------------------------------------+
-; Pin Name ; Reason ;
-+---------------+--------------------------------------+
-; LP_STR ; Missing drive strength ;
-; nACSI_ACK ; Missing drive strength ;
-; nACSI_RESET ; Missing drive strength ;
-; nACSI_CS ; Missing drive strength ;
-; ACSI_DIR ; Missing drive strength ;
-; ACSI_A1 ; Missing drive strength ;
-; nSCSI_ACK ; Missing drive strength ;
-; nSCSI_ATN ; Missing drive strength ;
-; SCSI_DIR ; Missing drive strength ;
-; MIDI_OLR ; Missing drive strength ;
-; MIDI_TLR ; Missing drive strength ;
-; TxD ; Missing drive strength ;
-; RTS ; Missing drive strength ;
-; DTR ; Missing drive strength ;
-; IDE_RES ; Missing drive strength ;
-; nIDE_CS0 ; Missing drive strength ;
-; nIDE_CS1 ; Missing drive strength ;
-; nIDE_WR ; Missing drive strength ;
-; nIDE_RD ; Missing drive strength ;
-; nCF_CS0 ; Missing drive strength ;
-; nCF_CS1 ; Missing drive strength ;
-; nROM3 ; Missing drive strength ;
-; nROM4 ; Missing drive strength ;
-; nRP_UDS ; Missing drive strength ;
-; nRP_LDS ; Missing drive strength ;
-; nSDSEL ; Missing drive strength ;
-; nWR_GATE ; Missing drive strength ;
-; nWR ; Missing drive strength ;
-; YM_QA ; Missing drive strength ;
-; YM_QB ; Missing drive strength ;
-; YM_QC ; Missing drive strength ;
-; SD_CLK ; Missing drive strength ;
-; DSA_D ; Missing drive strength ;
-; nVWE ; Missing slew rate ;
-; nVCAS ; Missing slew rate ;
-; nVRAS ; Missing slew rate ;
-; nVCS ; Missing slew rate ;
-; TIN0 ; Missing drive strength ;
-; nDREQ1 ; Missing drive strength ;
-; LED_FPGA_OK ; Missing slew rate ;
-; VCKE ; Missing slew rate ;
-; nFB_TA ; Missing drive strength ;
-; nDDR_CLK ; Missing slew rate ;
-; DDR_CLK ; Missing slew rate ;
-; VSYNC_PAD ; Missing slew rate ;
-; HSYNC_PAD ; Missing slew rate ;
-; nBLANK_PAD ; Missing slew rate ;
-; PIXEL_CLK_PAD ; Missing slew rate ;
-; nSYNC ; Missing slew rate ;
-; nMOT_ON ; Missing drive strength ;
-; nSTEP_DIR ; Missing drive strength ;
-; nSTEP ; Missing drive strength ;
-; LPDIR ; Missing drive strength ;
-; BA[1] ; Missing slew rate ;
-; BA[0] ; Missing slew rate ;
-; nIRQ[7] ; Missing drive strength ;
-; nIRQ[6] ; Missing drive strength ;
-; nIRQ[5] ; Missing drive strength ;
-; nIRQ[4] ; Missing drive strength and slew rate ;
-; nIRQ[3] ; Missing drive strength and slew rate ;
-; nIRQ[2] ; Missing drive strength and slew rate ;
-; VA[12] ; Missing slew rate ;
-; VA[11] ; Missing slew rate ;
-; VA[10] ; Missing slew rate ;
-; VA[9] ; Missing slew rate ;
-; VA[8] ; Missing slew rate ;
-; VA[7] ; Missing slew rate ;
-; VA[6] ; Missing slew rate ;
-; VA[5] ; Missing slew rate ;
-; VA[4] ; Missing slew rate ;
-; VA[3] ; Missing slew rate ;
-; VA[2] ; Missing slew rate ;
-; VA[1] ; Missing slew rate ;
-; VA[0] ; Missing slew rate ;
-; VB[7] ; Missing slew rate ;
-; VB[6] ; Missing slew rate ;
-; VB[5] ; Missing slew rate ;
-; VB[4] ; Missing slew rate ;
-; VB[3] ; Missing slew rate ;
-; VB[2] ; Missing slew rate ;
-; VB[1] ; Missing slew rate ;
-; VB[0] ; Missing slew rate ;
-; VDM[3] ; Missing slew rate ;
-; VDM[2] ; Missing slew rate ;
-; VDM[1] ; Missing slew rate ;
-; VDM[0] ; Missing slew rate ;
-; VG[7] ; Missing slew rate ;
-; VG[6] ; Missing slew rate ;
-; VG[5] ; Missing slew rate ;
-; VG[4] ; Missing slew rate ;
-; VG[3] ; Missing slew rate ;
-; VG[2] ; Missing slew rate ;
-; VG[1] ; Missing slew rate ;
-; VG[0] ; Missing slew rate ;
-; VR[7] ; Missing slew rate ;
-; VR[6] ; Missing slew rate ;
-; VR[5] ; Missing slew rate ;
-; VR[4] ; Missing slew rate ;
-; VR[3] ; Missing slew rate ;
-; VR[2] ; Missing slew rate ;
-; VR[1] ; Missing slew rate ;
-; VR[0] ; Missing slew rate ;
-; VD[31] ; Missing slew rate ;
-; VD[30] ; Missing slew rate ;
-; VD[29] ; Missing slew rate ;
-; VD[28] ; Missing slew rate ;
-; VD[27] ; Missing slew rate ;
-; VD[26] ; Missing slew rate ;
-; VD[25] ; Missing slew rate ;
-; VD[24] ; Missing slew rate ;
-; VD[23] ; Missing slew rate ;
-; VD[22] ; Missing slew rate ;
-; VD[21] ; Missing slew rate ;
-; VD[20] ; Missing slew rate ;
-; VD[19] ; Missing slew rate ;
-; VD[18] ; Missing slew rate ;
-; VD[17] ; Missing slew rate ;
-; VD[16] ; Missing slew rate ;
-; VD[15] ; Missing slew rate ;
-; VD[14] ; Missing slew rate ;
-; VD[13] ; Missing slew rate ;
-; VD[12] ; Missing slew rate ;
-; VD[11] ; Missing slew rate ;
-; VD[10] ; Missing slew rate ;
-; VD[9] ; Missing slew rate ;
-; VD[8] ; Missing slew rate ;
-; VD[7] ; Missing slew rate ;
-; VD[6] ; Missing slew rate ;
-; VD[5] ; Missing slew rate ;
-; VD[4] ; Missing slew rate ;
-; VD[3] ; Missing slew rate ;
-; VD[2] ; Missing slew rate ;
-; VD[1] ; Missing slew rate ;
-; VD[0] ; Missing slew rate ;
-; VDQS[3] ; Missing slew rate ;
-; VDQS[2] ; Missing slew rate ;
-; VDQS[1] ; Missing slew rate ;
-; VDQS[0] ; Missing slew rate ;
-; SCSI_PAR ; Missing drive strength ;
-; nSCSI_SEL ; Missing drive strength ;
-; nSCSI_BUSY ; Missing drive strength ;
-; nSCSI_RST ; Missing drive strength ;
-; SD_CD_DATA3 ; Missing drive strength ;
-; SD_CMD_D1 ; Missing drive strength ;
-; ACSI_D[7] ; Missing drive strength ;
-; ACSI_D[6] ; Missing drive strength ;
-; ACSI_D[5] ; Missing drive strength ;
-; ACSI_D[4] ; Missing drive strength ;
-; ACSI_D[3] ; Missing drive strength ;
-; ACSI_D[2] ; Missing drive strength ;
-; ACSI_D[1] ; Missing drive strength ;
-; ACSI_D[0] ; Missing drive strength ;
-; LP_D[7] ; Missing drive strength ;
-; LP_D[6] ; Missing drive strength ;
-; LP_D[5] ; Missing drive strength ;
-; LP_D[4] ; Missing drive strength ;
-; LP_D[3] ; Missing drive strength ;
-; LP_D[2] ; Missing drive strength ;
-; LP_D[1] ; Missing drive strength ;
-; LP_D[0] ; Missing drive strength ;
-; SCSI_D[7] ; Missing drive strength ;
-; SCSI_D[6] ; Missing drive strength ;
-; SCSI_D[5] ; Missing drive strength ;
-; SCSI_D[4] ; Missing drive strength ;
-; SCSI_D[3] ; Missing drive strength ;
-; SCSI_D[2] ; Missing drive strength ;
-; SCSI_D[1] ; Missing drive strength ;
-; SCSI_D[0] ; Missing drive strength ;
-+---------------+--------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter Netlist Optimizations ;
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+--------------------+-----------------------------------+-----------+----------------+----------------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
-; Node ; Action ; Operation ; Reason ; Node Port ; Node Port Name ; Destination Node ; Destination Port ; Destination Port Name ;
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+--------------------+-----------------------------------+-----------+----------------+----------------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|DIR ; Duplicated ; Register Packing ; Timing optimization ; Q ; ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|DIR~_Duplicate_1 ; Q ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|DIR ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; nSTEP_DIR~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|DIR ; Inverted ; Register Packing ; Timing optimization ; Q ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|MO ; Duplicated ; Register Packing ; Timing optimization ; Q ; ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|MO~_Duplicate_1 ; Q ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|MO ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; nMOT_ON~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|MO ; Inverted ; Register Packing ; Timing optimization ; Q ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|STEP ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; nSTEP~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|STEP ; Inverted ; Register Packing ; Timing optimization ; Q ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG ; Duplicated ; Register Packing ; Timing optimization ; Q ; ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1 ; Q ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; nWR_GATE~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG ; Inverted ; Register Packing ; Timing optimization ; Q ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|RD_In ; Packed Register ; Register Packing ; PLL Source Synchronous assignment ; Q ; ; nRD_DATA~input ; O ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_In ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; nWR~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[0] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; nSDSEL~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[1] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; DSA_D~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[3] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; RTS~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[4] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; DTR~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[5] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; LP_STR~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6] ; Duplicated ; Register Packing ; Timing optimization ; Q ; ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1 ; Q ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; LPDIR~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[0] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; LP_D[0]~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[1] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; LP_D[1]~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[2] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; LP_D[2]~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[3] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; LP_D[3]~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[4] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; LP_D[4]~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[5] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; LP_D[5]~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[6] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; LP_D[6]~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[7] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; LP_D[7]~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|BSY_OUTn ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; nSCSI_BUSY~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nIDE_RD~reg0 ; Duplicated ; Register Packing ; Timing optimization ; Q ; ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nIDE_RD~reg0_Duplicate_1 ; Q ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nIDE_RD~reg0 ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; nIDE_RD~output ; I ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nIDE_RD~reg0SLOAD_MUX ; Created ; Register Packing ; Timing optimization ; COMBOUT ; ; ; ; ;
-; Video:Fredi_Aschwanden|inst90 ; Duplicated ; Register Packing ; Timing optimization ; Q ; ; Video:Fredi_Aschwanden|inst90~_Duplicate_1 ; Q ; ;
-; Video:Fredi_Aschwanden|inst90 ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; VDQS[3]~output ; OE ; ;
-; Video:Fredi_Aschwanden|inst90 ; Inverted ; Register Packing ; Timing optimization ; Q ; ; ; ; ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_1 ; Duplicated ; Register Packing ; Timing optimization ; Q ; ; Video:Fredi_Aschwanden|inst90~_Duplicate_2 ; Q ; ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_1 ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; VDQS[2]~output ; OE ; ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_1 ; Inverted ; Register Packing ; Timing optimization ; Q ; ; ; ; ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_2 ; Duplicated ; Register Packing ; Timing optimization ; Q ; ; Video:Fredi_Aschwanden|inst90~_Duplicate_3 ; Q ; ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_2 ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; VDQS[1]~output ; OE ; ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_2 ; Inverted ; Register Packing ; Timing optimization ; Q ; ; ; ; ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_3 ; Duplicated ; Register Packing ; Timing optimization ; Q ; ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Q ; ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_3 ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; VDQS[0]~output ; OE ; ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_3 ; Inverted ; Register Packing ; Timing optimization ; Q ; ; ; ; ;
-; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[28] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[28]~input ; O ; ;
-; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[29] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[29]~input ; O ; ;
-; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[30] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[30]~input ; O ; ;
-; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[31] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[31]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[0]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[1]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[2]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[3] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[3]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[4] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[4]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[5] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[5]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[6] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[6]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[7]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[8]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[9] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[9]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[10] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[10]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[11] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[11]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[12]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[13] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[13]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[14] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[14]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[15] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[15]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[16] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[16]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[17]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[18]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[19]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[20] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[20]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[21] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[21]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[22] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[22]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[23] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[23]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[24] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[24]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[25] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[25]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[26] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[26]~input ; O ; ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[27] ; Packed Register ; Register Packing ; Timing optimization ; Q ; ; FB_AD[27]~input ; O ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_DATEN_CS~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_DATEN_CS~0_RESYN24_BDD25 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~53 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~54 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~54_RESYN0_BDD1 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~168 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~177 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~178 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~180 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~180_RESYN2_BDD3 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~180_RESYN4_BDD5 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~180_RESYN6_BDD7 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[28]~368 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[28]~369 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[28]~369_RESYN18_BDD19 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~358 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~359 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~359_RESYN10_BDD11 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~359_RESYN12_BDD13 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~359_RESYN14_BDD15 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~359_RESYN14_RESYN50_BDD51 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~359_RESYN16_BDD17 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~0 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~1 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2_RESYN20_BDD21 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2_RESYN22_BDD23 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SNDCS ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SNDCS_RESYN56_BDD57 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|Add0~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|Add0~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|Add7~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|Add8~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CNT~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|DELCNT~54 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|DELCNT~55 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|Selector96~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|Add2~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|Add3~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|Add3~30 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|Add3~31 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Add0~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Add1~2 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Add1~30 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SECTOR_REG[0]~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|Add1~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|Add1~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|Add1~16 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_01_STRB~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_10_STRB~2 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Add1~12 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Add3~12 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Add5~12 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Add8~3 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Add8~4 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Add8~17 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Add8~18 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Add10~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Add11~3 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_CLK~16 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LessThan6~14 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LessThan7~14 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LessThan8~14 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Mux84~1 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Mux92~1 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Mux100~1 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|VOL_ENV[0]~3 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\MUSICGENERATOR:CNT_CH_A[11]~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\MUSICGENERATOR:CNT_CH_B[11]~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\MUSICGENERATOR:CNT_CH_C[11]~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|Add2~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|Add2~16 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|Add0~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|Add0~15 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|Add2~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|Add2~12 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|Add0~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|Add0~15 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|DATA_OUT[3]~162 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|DATA_OUT[3]~163 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|DATA_OUT[3]~163_RESYN8_BDD9 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add0~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add0~2 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add1~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add1~2 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add2~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add2~3 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add3~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add3~3 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add4~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add4~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add5~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add5~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add6~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add6~2 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add7~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Add7~2 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Mux88~0 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Mux88~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Mux88~3 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Mux98~0 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Mux98~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|Mux98~3 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|PRESCALE~0 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|PRESCALE~1 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|PRESCALE~2 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|PRESCALE~3 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~1 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~3 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~4 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~1 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~3 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~4 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_C[0]~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_D[0]~2 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_A:PRESCALE[3]~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_B:PRESCALE[3]~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_C:PRESCALE[3]~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_D:PRESCALE[3]~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|STRB_LOCK~0 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|\CLKDIV:STRB_LOCK~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|SHIFT_REG[6]~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|SHIFT_REG~13 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|STRB_LOCK~0 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|\CLKDIV:STRB_LOCK~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ~0 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ~0_RESYN30_BDD31 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10]~5 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10]~5_RESYN26_BDD27 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10]~5_RESYN28_BDD29 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VCAS~2 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VCAS~2_RESYN52_BDD53 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VCAS~2_RESYN54_BDD55 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_START~5 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDIS_END[10] ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDIS_START[1]~19 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDIS_START[10]~1 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~28 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~28_RESYN32_BDD33 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_7~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_7~29 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_7~32 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_8~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_8~17 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_9~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_9~29 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_9~32 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_15~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_17~15 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_17~43 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_26~22 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_27~22 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_28~20 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_30~20 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_31~1 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|_~472 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|_~478 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|_~479 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|_~481 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|_~482 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00000|lpm_bustri:lpm_bustri_component|dout[5]~10 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00000|lpm_bustri:lpm_bustri_component|dout[5]~11 ; Deleted ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[0]~15 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[0]~15_RESYN42_BDD43 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[0]~15_RESYN44_BDD45 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[0]~15_RESYN46_BDD47 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[0]~15_RESYN48_BDD49 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[1]~13 ; Modified ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[1]~13_RESYN34_BDD35 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[1]~13_RESYN36_BDD37 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[1]~13_RESYN38_BDD39 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-; interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[1]~13_RESYN40_BDD41 ; Created ; Physical Synthesis ; Timing optimization ; ; ; ; ; ;
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+--------------------+-----------------------------------+-----------+----------------+----------------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------+
-; Ignored Assignments ;
-+-----------------------------+----------------+--------------+----------------------------+------------------------+----------------------------+
-; Name ; Ignored Entity ; Ignored From ; Ignored To ; Ignored Value ; Ignored Source ;
-+-----------------------------+----------------+--------------+----------------------------+------------------------+----------------------------+
-; DDIO_INPUT_REGISTER ; altddio_bidir ; ; input_cell_H ; HIGH ; Compiler or HDL Assignment ;
-; DDIO_INPUT_REGISTER ; altddio_bidir ; ; input_cell_L ; LOW ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_0hh1 ; ; rdemp_eq_comp_lsb_aeb ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_0hh1 ; ; rdemp_eq_comp_msb_aeb ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_0hh1 ; ; rs_dgwp_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_0hh1 ; ; wrfull_eq_comp_lsb_mux_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_0hh1 ; ; wrfull_eq_comp_msb_mux_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_0hh1 ; ; ws_dgrp_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_3fh1 ; ; rdemp_eq_comp_lsb_aeb ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_3fh1 ; ; rdemp_eq_comp_msb_aeb ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_3fh1 ; ; rs_dgwp_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_3fh1 ; ; wrfull_eq_comp_lsb_mux_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_3fh1 ; ; wrfull_eq_comp_msb_mux_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_3fh1 ; ; ws_dgrp_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_8fi1 ; ; rdemp_eq_comp_lsb_aeb ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_8fi1 ; ; rdemp_eq_comp_msb_aeb ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_8fi1 ; ; rs_dgwp_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_8fi1 ; ; wrfull_eq_comp_lsb_mux_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_8fi1 ; ; wrfull_eq_comp_msb_mux_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-; Synchronizer Identification ; dcfifo_8fi1 ; ; ws_dgrp_reg ; FORCED_IF_ASYNCHRONOUS ; Compiler or HDL Assignment ;
-+-----------------------------+----------------+--------------+----------------------------+------------------------+----------------------------+
-
-
-+------------------------------------------------+
-; Incremental Compilation Preservation Summary ;
-+-------------------------+----------------------+
-; Type ; Value ;
-+-------------------------+----------------------+
-; Netlist ; ;
-; -- Requested ; 0 / 0 ( 0.00 % ) ;
-; -- Achieved ; 0 / 0 ( 0.00 % ) ;
-; ; ;
-; Placement ; ;
-; -- Requested ; 0 / 13829 ( 0.00 % ) ;
-; -- Achieved ; 0 / 13829 ( 0.00 % ) ;
-; ; ;
-; Routing (by Connection) ; ;
-; -- Requested ; 0 / 0 ( 0.00 % ) ;
-; -- Achieved ; 0 / 0 ( 0.00 % ) ;
-+-------------------------+----------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------+
-; Incremental Compilation Partition Settings ;
-+----------------+----------------+-------------------+-------------------------+------------------------+------------------------------+----------+
-; Partition Name ; Partition Type ; Netlist Type Used ; Preservation Level Used ; Netlist Type Requested ; Preservation Level Requested ; Contents ;
-+----------------+----------------+-------------------+-------------------------+------------------------+------------------------------+----------+
-; Top ; User-created ; Source File ; N/A ; Source File ; N/A ; ;
-+----------------+----------------+-------------------+-------------------------+------------------------+------------------------------+----------+
-
-
-+--------------------------------------------------------------------------------------------+
-; Incremental Compilation Placement Preservation ;
-+----------------+---------+-------------------+-------------------------+-------------------+
-; Partition Name ; # Nodes ; # Preserved Nodes ; Preservation Level Used ; Netlist Type Used ;
-+----------------+---------+-------------------+-------------------------+-------------------+
-; Top ; 13829 ; 0 ; N/A ; Source File ;
-+----------------+---------+-------------------+-------------------------+-------------------+
-
-
-+--------------+
-; Pin-Out File ;
-+--------------+
-The pin-out file can be found in C:/FireBee/FPGA/firebee1.pin.
-
-
-+----------------------------------------------------------------------------+
-; Fitter Resource Usage Summary ;
-+---------------------------------------------+------------------------------+
-; Resource ; Usage ;
-+---------------------------------------------+------------------------------+
-; Total logic elements ; 9,526 / 39,600 ( 24 % ) ;
-; -- Combinational with no register ; 4963 ;
-; -- Register only ; 1465 ;
-; -- Combinational with a register ; 3098 ;
-; ; ;
-; Logic element usage by number of LUT inputs ; ;
-; -- 4 input functions ; 4959 ;
-; -- 3 input functions ; 1861 ;
-; -- <=2 input functions ; 1241 ;
-; -- Register only ; 1465 ;
-; ; ;
-; Logic elements by mode ; ;
-; -- normal mode ; 7262 ;
-; -- arithmetic mode ; 799 ;
-; ; ;
-; Total registers* ; 4,749 / 41,185 ( 12 % ) ;
-; -- Dedicated logic registers ; 4,563 / 39,600 ( 12 % ) ;
-; -- I/O registers ; 186 / 1,585 ( 12 % ) ;
-; ; ;
-; Total LABs: partially or completely used ; 756 / 2,475 ( 31 % ) ;
-; User inserted logic elements ; 0 ;
-; Virtual pins ; 0 ;
-; I/O pins ; 295 / 332 ( 89 % ) ;
-; -- Clock pins ; 7 / 8 ( 88 % ) ;
-; -- Dedicated input pins ; 0 / 9 ( 0 % ) ;
-; Global signals ; 20 ;
-; M9Ks ; 23 / 126 ( 18 % ) ;
-; Total block memory bits ; 109,344 / 1,161,216 ( 9 % ) ;
-; Total block memory implementation bits ; 211,968 / 1,161,216 ( 18 % ) ;
-; Embedded Multiplier 9-bit elements ; 6 / 252 ( 2 % ) ;
-; PLLs ; 4 / 4 ( 100 % ) ;
-; Global clocks ; 20 / 20 ( 100 % ) ;
-; JTAGs ; 0 / 1 ( 0 % ) ;
-; CRC blocks ; 0 / 1 ( 0 % ) ;
-; ASMI blocks ; 0 / 1 ( 0 % ) ;
-; Impedance control blocks ; 0 / 4 ( 0 % ) ;
-; Average interconnect usage (total/H/V) ; 15% / 14% / 16% ;
-; Peak interconnect usage (total/H/V) ; 59% / 54% / 65% ;
-; Maximum fan-out node ; MAIN_CLK~input ;
-; Maximum fan-out ; 2272 ;
-; Highest non-global fan-out signal ; MAIN_CLK~input ;
-; Highest non-global fan-out ; 2272 ;
-; Total fan-out ; 44654 ;
-; Average fan-out ; 3.02 ;
-+---------------------------------------------+------------------------------+
-* Register count does not include registers inside RAM blocks or DSP blocks.
-
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Input Pins ;
-+----------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+---------------------------+----------------------+
-; Name ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; Power Up High ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination Control Block ; Location assigned by ;
-+----------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+---------------------------+----------------------+
-; AMKB_RX ; Y2 ; 2 ; 0 ; 10 ; 21 ; 10 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; CLK33M ; AB12 ; 4 ; 36 ; 0 ; 0 ; 16 ; 0 ; yes ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; CTS ; H14 ; 7 ; 61 ; 43 ; 7 ; 3 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; DCD ; A19 ; 7 ; 56 ; 43 ; 21 ; 3 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; DVI_INT ; A11 ; 8 ; 34 ; 43 ; 14 ; 2 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; E0_INT ; G21 ; 6 ; 67 ; 22 ; 0 ; 2 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; FB_ALE ; R7 ; 2 ; 0 ; 2 ; 0 ; 33 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; FB_SIZE0 ; U8 ; 3 ; 3 ; 0 ; 21 ; 24 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; FB_SIZE1 ; Y4 ; 3 ; 3 ; 0 ; 14 ; 24 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; HD_DD ; F16 ; 7 ; 65 ; 43 ; 21 ; 3 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; IDE_INT ; G22 ; 6 ; 67 ; 22 ; 7 ; 3 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; IDE_RDY ; Y1 ; 2 ; 0 ; 9 ; 0 ; 3 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; LP_BUSY ; G7 ; 8 ; 3 ; 43 ; 28 ; 3 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; MAIN_CLK ; G2 ; 1 ; 0 ; 21 ; 0 ; 2272 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; MIDI_IN ; E12 ; 7 ; 36 ; 43 ; 7 ; 1 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; PIC_AMKB_RX ; L7 ; 2 ; 0 ; 18 ; 7 ; 1 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; PIC_INT ; AA2 ; 2 ; 0 ; 7 ; 21 ; 3 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; RI ; B19 ; 7 ; 56 ; 43 ; 14 ; 3 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; RxD ; H15 ; 7 ; 61 ; 43 ; 0 ; 4 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; SD_CARD_DEDECT ; M20 ; 5 ; 67 ; 19 ; 21 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; SD_DATA0 ; B16 ; 7 ; 50 ; 43 ; 14 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; SD_DATA1 ; A16 ; 7 ; 50 ; 43 ; 7 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; SD_DATA2 ; B17 ; 7 ; 50 ; 43 ; 0 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; SD_WP ; M19 ; 5 ; 67 ; 19 ; 14 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; TOUT0 ; T22 ; 5 ; 67 ; 22 ; 21 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; TRACK00 ; C19 ; 7 ; 61 ; 43 ; 28 ; 11 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; WP_CF_CARD ; T1 ; 2 ; 0 ; 21 ; 21 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nACSI_DRQ ; K7 ; 1 ; 0 ; 30 ; 14 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nACSI_INT ; J4 ; 1 ; 0 ; 29 ; 14 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nDACK0 ; B12 ; 7 ; 34 ; 43 ; 7 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nDACK1 ; A12 ; 7 ; 34 ; 43 ; 0 ; 1 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nDCHG ; C17 ; 7 ; 56 ; 43 ; 7 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nFB_BURST ; T3 ; 2 ; 0 ; 7 ; 0 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nFB_CS1 ; T8 ; 3 ; 14 ; 0 ; 28 ; 59 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nFB_CS2 ; T9 ; 3 ; 14 ; 0 ; 21 ; 95 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nFB_CS3 ; V6 ; 3 ; 1 ; 0 ; 28 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nFB_OE ; R6 ; 2 ; 0 ; 3 ; 0 ; 101 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nFB_WR ; T5 ; 2 ; 0 ; 4 ; 0 ; 235 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nINDEX ; E16 ; 7 ; 65 ; 43 ; 28 ; 14 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nMASTER ; T21 ; 5 ; 67 ; 22 ; 14 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nPCI_INTA ; AA1 ; 2 ; 0 ; 6 ; 0 ; 2 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nPCI_INTB ; V4 ; 2 ; 0 ; 5 ; 0 ; 2 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nPCI_INTC ; V3 ; 2 ; 0 ; 5 ; 7 ; 2 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nPCI_INTD ; P6 ; 2 ; 0 ; 5 ; 14 ; 2 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nRD_DATA ; A20 ; 7 ; 59 ; 43 ; 7 ; 0 ; 2 ; no ; yes ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nRSTO_MCF ; B11 ; 8 ; 34 ; 43 ; 21 ; 27 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nSCSI_C_D ; H1 ; 1 ; 0 ; 28 ; 0 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nSCSI_DRQ ; U1 ; 2 ; 0 ; 15 ; 21 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nSCSI_I_O ; J3 ; 1 ; 0 ; 28 ; 7 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nSCSI_MSG ; H2 ; 1 ; 0 ; 29 ; 21 ; 0 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-; nWP ; D19 ; 7 ; 59 ; 43 ; 0 ; 4 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVTTL ; -- ; User ;
-+----------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+---------------------------+----------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Output Pins ;
-+---------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+---------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+----------------------+------+----------------------+---------------------+
-; Name ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Output Register ; Output Enable Register ; Power Up High ; Slew Rate ; PCI I/O Enabled ; Open Drain ; TRI Primitive ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Termination ; Termination Control Block ; Output Buffer Pre-emphasis ; Voltage Output Differential ; Location assigned by ; Load ; Output Enable Source ; Output Enable Group ;
-+---------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+---------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+----------------------+------+----------------------+---------------------+
-; ACSI_A1 ; M6 ; 2 ; 0 ; 20 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; ACSI_DIR ; L6 ; 2 ; 0 ; 20 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; AMKB_TX ; N1 ; 2 ; 0 ; 19 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVCMOS ; 2mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; BA[0] ; W19 ; 5 ; 67 ; 5 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; BA[1] ; AA19 ; 4 ; 56 ; 0 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; CLK24M576 ; AB10 ; 3 ; 34 ; 0 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; CLK25M ; T4 ; 2 ; 0 ; 4 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; CLKUSB ; J1 ; 1 ; 0 ; 28 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; DDR_CLK ; AB17 ; 4 ; 54 ; 0 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; DSA_D ; F15 ; 7 ; 63 ; 43 ; 0 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; DTR ; D15 ; 7 ; 54 ; 43 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; HSYNC_PAD ; K21 ; 6 ; 67 ; 27 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; IDE_RES ; M5 ; 2 ; 0 ; 18 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; LED_FPGA_OK ; N19 ; 5 ; 67 ; 15 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 4mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; LPDIR ; E5 ; 8 ; 1 ; 43 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; LP_STR ; E6 ; 8 ; 1 ; 43 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; MIDI_OLR ; H5 ; 1 ; 0 ; 31 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; MIDI_TLR ; B2 ; 1 ; 0 ; 41 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; PIXEL_CLK_PAD ; F19 ; 6 ; 67 ; 37 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; RTS ; B18 ; 7 ; 54 ; 43 ; 7 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; SCSI_DIR ; J7 ; 1 ; 0 ; 30 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; SD_CLK ; C15 ; 7 ; 50 ; 43 ; 21 ; no ; no ; no ; 2 ; no ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; TIN0 ; R5 ; 2 ; 0 ; 4 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; TxD ; A18 ; 7 ; 54 ; 43 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[0] ; W20 ; 5 ; 67 ; 3 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[10] ; V21 ; 5 ; 67 ; 10 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[11] ; U19 ; 5 ; 67 ; 7 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[12] ; AA18 ; 4 ; 54 ; 0 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[1] ; W22 ; 5 ; 67 ; 7 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[2] ; W21 ; 5 ; 67 ; 8 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[3] ; Y22 ; 5 ; 67 ; 6 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[4] ; AA22 ; 5 ; 67 ; 2 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[5] ; Y21 ; 5 ; 67 ; 7 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[6] ; AA21 ; 5 ; 67 ; 2 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[7] ; AA20 ; 4 ; 61 ; 0 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[8] ; AB20 ; 4 ; 61 ; 0 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VA[9] ; AB19 ; 4 ; 59 ; 0 ; 28 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VB[0] ; G18 ; 6 ; 67 ; 37 ; 0 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VB[1] ; H17 ; 6 ; 67 ; 38 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VB[2] ; C22 ; 6 ; 67 ; 38 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VB[3] ; C21 ; 6 ; 67 ; 38 ; 7 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VB[4] ; B22 ; 6 ; 67 ; 39 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VB[5] ; B21 ; 6 ; 67 ; 39 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VB[6] ; C20 ; 6 ; 67 ; 39 ; 7 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VB[7] ; D20 ; 6 ; 67 ; 40 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VCKE ; U15 ; 4 ; 50 ; 0 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VDM[0] ; AA16 ; 4 ; 45 ; 0 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VDM[1] ; V16 ; 4 ; 61 ; 0 ; 7 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VDM[2] ; U20 ; 5 ; 67 ; 7 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VDM[3] ; T17 ; 5 ; 67 ; 3 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VG[0] ; H19 ; 6 ; 67 ; 34 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VG[1] ; E22 ; 6 ; 67 ; 34 ; 7 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VG[2] ; E21 ; 6 ; 67 ; 34 ; 0 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VG[3] ; H18 ; 6 ; 67 ; 35 ; 0 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VG[4] ; J17 ; 6 ; 67 ; 36 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VG[5] ; H16 ; 6 ; 67 ; 36 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VG[6] ; D22 ; 6 ; 67 ; 36 ; 7 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VG[7] ; D21 ; 6 ; 67 ; 36 ; 0 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VR[0] ; J22 ; 6 ; 67 ; 28 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VR[1] ; J21 ; 6 ; 67 ; 28 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VR[2] ; H22 ; 6 ; 67 ; 28 ; 7 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VR[3] ; H21 ; 6 ; 67 ; 28 ; 0 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VR[4] ; K17 ; 6 ; 67 ; 29 ; 0 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VR[5] ; K18 ; 6 ; 67 ; 30 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VR[6] ; J18 ; 6 ; 67 ; 31 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VR[7] ; F22 ; 6 ; 67 ; 31 ; 7 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; VSYNC_PAD ; K19 ; 6 ; 67 ; 26 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; YM_QA ; A17 ; 7 ; 52 ; 43 ; 28 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; YM_QB ; G13 ; 7 ; 52 ; 43 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; YM_QC ; E15 ; 7 ; 54 ; 43 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nACSI_ACK ; M4 ; 2 ; 0 ; 19 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nACSI_CS ; M2 ; 2 ; 0 ; 20 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nACSI_RESET ; M1 ; 2 ; 0 ; 20 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nBLANK_PAD ; G17 ; 6 ; 67 ; 41 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVTTL ; 16mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nCF_CS0 ; W2 ; 2 ; 0 ; 10 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nCF_CS1 ; W1 ; 2 ; 0 ; 10 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nDDR_CLK ; AA17 ; 4 ; 54 ; 0 ; 28 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nDREQ1 ; E11 ; 7 ; 36 ; 43 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nFB_TA ; T7 ; 2 ; 0 ; 2 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nIDE_CS0 ; R2 ; 2 ; 0 ; 16 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nIDE_CS1 ; R1 ; 2 ; 0 ; 16 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nIDE_RD ; P1 ; 2 ; 0 ; 17 ; 21 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nIDE_WR ; P2 ; 2 ; 0 ; 17 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nIRQ[2] ; F21 ; 6 ; 67 ; 31 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVCMOS ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nIRQ[3] ; H20 ; 6 ; 67 ; 34 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVCMOS ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nIRQ[4] ; F20 ; 6 ; 67 ; 37 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVCMOS ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nIRQ[5] ; P5 ; 2 ; 0 ; 12 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nIRQ[6] ; P7 ; 2 ; 0 ; 7 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nIRQ[7] ; N7 ; 2 ; 0 ; 7 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nMOT_ON ; G16 ; 7 ; 63 ; 43 ; 7 ; yes ; no ; yes ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nPD_VGA ; V1 ; 2 ; 0 ; 13 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nROM3 ; P3 ; 2 ; 0 ; 15 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nROM4 ; U2 ; 2 ; 0 ; 15 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nRP_LDS ; N5 ; 2 ; 0 ; 16 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nRP_UDS ; P4 ; 2 ; 0 ; 16 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSCSI_ACK ; N2 ; 2 ; 0 ; 19 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSCSI_ATN ; M3 ; 2 ; 0 ; 19 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSDSEL ; B20 ; 7 ; 59 ; 43 ; 14 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSRBHE ; B4 ; 8 ; 7 ; 43 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSRBLE ; A4 ; 8 ; 9 ; 43 ; 28 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSRCS ; B8 ; 8 ; 25 ; 43 ; 7 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSROE ; F11 ; 7 ; 36 ; 43 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSRWE ; F8 ; 8 ; 7 ; 43 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSTEP ; F14 ; 7 ; 63 ; 43 ; 28 ; yes ; no ; yes ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSTEP_DIR ; G15 ; 7 ; 63 ; 43 ; 21 ; yes ; no ; yes ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nSYNC ; F17 ; 6 ; 67 ; 41 ; 21 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.0-V LVCMOS ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nVCAS ; AB18 ; 4 ; 52 ; 0 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nVCS ; T18 ; 5 ; 67 ; 3 ; 14 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nVRAS ; W17 ; 4 ; 59 ; 0 ; 0 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nVWE ; Y17 ; 4 ; 61 ; 0 ; 28 ; no ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nWR ; G14 ; 7 ; 54 ; 43 ; 28 ; yes ; no ; no ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-; nWR_GATE ; D17 ; 7 ; 61 ; 43 ; 14 ; yes ; no ; yes ; 2 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; no ; no ; User ; 0 pF ; - ; - ;
-+---------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+---------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+----------------------+------+----------------------+---------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Bidir Pins ;
-+-------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+-----------+-----------------+------------+----------+--------------+--------------+------------------+--------------------+---------------------------+----------------------+------+---------------------------------------------------------------------------------------------------------------+---------------------+
-; Name ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; Output Register ; Output Enable Register ; Power Up High ; Slew Rate ; PCI I/O Enabled ; Open Drain ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Output Termination ; Termination Control Block ; Location assigned by ; Load ; Output Enable Source ; Output Enable Group ;
-+-------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+-----------+-----------------+------------+----------+--------------+--------------+------------------+--------------------+---------------------------+----------------------+------+---------------------------------------------------------------------------------------------------------------+---------------------+
-; ACSI_D[0] ; B1 ; 1 ; 0 ; 40 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; yes ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; ACSI_D[1] ; G5 ; 1 ; 0 ; 40 ; 7 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; yes ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; ACSI_D[2] ; E3 ; 1 ; 0 ; 39 ; 7 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; yes ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; ACSI_D[3] ; C2 ; 1 ; 0 ; 38 ; 14 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; yes ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; ACSI_D[4] ; C1 ; 1 ; 0 ; 38 ; 21 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; yes ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; ACSI_D[5] ; D2 ; 1 ; 0 ; 37 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; yes ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; ACSI_D[6] ; H7 ; 1 ; 0 ; 37 ; 14 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; yes ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; ACSI_D[7] ; H6 ; 1 ; 0 ; 37 ; 21 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; yes ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; FB_AD[0] ; Y3 ; 3 ; 3 ; 0 ; 7 ; 21 ; 25 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[10] ; W7 ; 3 ; 14 ; 0 ; 14 ; 19 ; 27 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[11] ; Y7 ; 3 ; 14 ; 0 ; 7 ; 19 ; 14 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[12] ; U9 ; 3 ; 16 ; 0 ; 21 ; 21 ; 8 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[13] ; V8 ; 3 ; 16 ; 0 ; 14 ; 21 ; 13 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[14] ; W8 ; 3 ; 16 ; 0 ; 7 ; 20 ; 13 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[15] ; AA7 ; 3 ; 16 ; 0 ; 0 ; 19 ; 11 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[16] ; AB7 ; 3 ; 18 ; 0 ; 21 ; 142 ; 10 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~78 (inverted) ; - ;
-; FB_AD[17] ; Y8 ; 3 ; 18 ; 0 ; 14 ; 144 ; 9 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~78 (inverted) ; - ;
-; FB_AD[18] ; V9 ; 3 ; 20 ; 0 ; 21 ; 144 ; 9 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~183 (inverted) ; - ;
-; FB_AD[19] ; V10 ; 3 ; 20 ; 0 ; 14 ; 142 ; 5 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~259 (inverted) ; - ;
-; FB_AD[1] ; Y6 ; 3 ; 5 ; 0 ; 14 ; 20 ; 158 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[20] ; T10 ; 3 ; 18 ; 0 ; 7 ; 143 ; 3 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~183 (inverted) ; - ;
-; FB_AD[21] ; U10 ; 3 ; 22 ; 0 ; 14 ; 142 ; 3 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~183 (inverted) ; - ;
-; FB_AD[22] ; AA8 ; 3 ; 22 ; 0 ; 7 ; 139 ; 3 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~183 (inverted) ; - ;
-; FB_AD[23] ; AB8 ; 3 ; 22 ; 0 ; 0 ; 136 ; 2 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~259 (inverted) ; - ;
-; FB_AD[24] ; T11 ; 3 ; 18 ; 0 ; 0 ; 62 ; 3 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[26]~224 (inverted) ; - ;
-; FB_AD[25] ; AA9 ; 3 ; 27 ; 0 ; 7 ; 58 ; 3 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[26]~224 (inverted) ; - ;
-; FB_AD[26] ; AB9 ; 3 ; 27 ; 0 ; 0 ; 56 ; 11 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[26]~203 (inverted) ; - ;
-; FB_AD[27] ; U11 ; 3 ; 29 ; 0 ; 28 ; 47 ; 5 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~141 (inverted) ; - ;
-; FB_AD[28] ; V11 ; 3 ; 34 ; 0 ; 28 ; 36 ; 1 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~141 (inverted) ; - ;
-; FB_AD[29] ; W10 ; 3 ; 34 ; 0 ; 21 ; 32 ; 1 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~141 (inverted) ; - ;
-; FB_AD[2] ; AA3 ; 3 ; 7 ; 0 ; 28 ; 20 ; 120 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[30] ; Y10 ; 3 ; 34 ; 0 ; 14 ; 36 ; 1 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~141 (inverted) ; - ;
-; FB_AD[31] ; AA10 ; 3 ; 34 ; 0 ; 7 ; 35 ; 1 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~141 (inverted) ; - ;
-; FB_AD[3] ; AB3 ; 3 ; 7 ; 0 ; 21 ; 20 ; 97 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[4] ; W6 ; 3 ; 7 ; 0 ; 14 ; 20 ; 83 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[5] ; V7 ; 3 ; 7 ; 0 ; 7 ; 20 ; 161 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[6] ; AA4 ; 3 ; 9 ; 0 ; 28 ; 19 ; 27 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[7] ; AB4 ; 3 ; 9 ; 0 ; 21 ; 18 ; 26 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[8] ; AA5 ; 3 ; 9 ; 0 ; 14 ; 20 ; 34 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; FB_AD[9] ; AB5 ; 3 ; 9 ; 0 ; 7 ; 20 ; 22 ; no ; yes ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 (inverted) ; - ;
-; IO[0] ; A8 ; 8 ; 25 ; 43 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[10] ; B15 ; 7 ; 45 ; 43 ; 14 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[11] ; C13 ; 7 ; 45 ; 43 ; 21 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[12] ; D13 ; 7 ; 45 ; 43 ; 28 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[13] ; E13 ; 7 ; 41 ; 43 ; 7 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[14] ; A14 ; 7 ; 41 ; 43 ; 14 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[15] ; B14 ; 7 ; 38 ; 43 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[16] ; A13 ; 7 ; 38 ; 43 ; 21 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[17] ; B13 ; 7 ; 38 ; 43 ; 28 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[1] ; A7 ; 8 ; 25 ; 43 ; 14 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[2] ; B7 ; 8 ; 25 ; 43 ; 21 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[3] ; A6 ; 8 ; 25 ; 43 ; 28 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[4] ; B6 ; 8 ; 22 ; 43 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[5] ; E9 ; 8 ; 22 ; 43 ; 28 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[6] ; C8 ; 8 ; 20 ; 43 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[7] ; C7 ; 8 ; 20 ; 43 ; 7 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[8] ; G10 ; 8 ; 11 ; 43 ; 28 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; IO[9] ; A15 ; 7 ; 45 ; 43 ; 7 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; LP_D[0] ; F7 ; 8 ; 3 ; 43 ; 21 ; 1 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1 ; - ;
-; LP_D[1] ; C4 ; 8 ; 3 ; 43 ; 0 ; 1 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1 ; - ;
-; LP_D[2] ; C3 ; 8 ; 5 ; 43 ; 28 ; 1 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1 ; - ;
-; LP_D[3] ; E7 ; 8 ; 5 ; 43 ; 21 ; 1 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1 ; - ;
-; LP_D[4] ; D6 ; 8 ; 5 ; 43 ; 14 ; 1 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1 ; - ;
-; LP_D[5] ; B3 ; 8 ; 5 ; 43 ; 7 ; 1 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1 ; - ;
-; LP_D[6] ; A3 ; 8 ; 5 ; 43 ; 0 ; 1 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1 ; - ;
-; LP_D[7] ; G8 ; 8 ; 7 ; 43 ; 21 ; 1 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1 ; - ;
-; SCSI_D[0] ; J6 ; 1 ; 0 ; 36 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SCSI_D[1] ; E1 ; 1 ; 0 ; 36 ; 14 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SCSI_D[2] ; F2 ; 1 ; 0 ; 35 ; 7 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SCSI_D[3] ; F1 ; 1 ; 0 ; 35 ; 14 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SCSI_D[4] ; G4 ; 1 ; 0 ; 41 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SCSI_D[5] ; G3 ; 1 ; 0 ; 41 ; 7 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SCSI_D[6] ; L8 ; 1 ; 0 ; 31 ; 21 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SCSI_D[7] ; K8 ; 1 ; 0 ; 30 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SCSI_PAR ; M7 ; 2 ; 0 ; 11 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SD_CD_DATA3 ; F13 ; 7 ; 45 ; 43 ; 0 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; yes ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SD_CMD_D1 ; E14 ; 7 ; 48 ; 43 ; 7 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; yes ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; SRD[0] ; B5 ; 8 ; 11 ; 43 ; 14 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[10] ; A9 ; 8 ; 32 ; 43 ; 28 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[11] ; B10 ; 8 ; 32 ; 43 ; 21 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[12] ; D10 ; 8 ; 32 ; 43 ; 0 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[13] ; F10 ; 8 ; 9 ; 43 ; 0 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[14] ; G9 ; 8 ; 1 ; 43 ; 28 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[15] ; H10 ; 8 ; 18 ; 43 ; 0 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[1] ; A5 ; 8 ; 14 ; 43 ; 14 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[2] ; C6 ; 8 ; 9 ; 43 ; 7 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[3] ; G11 ; 8 ; 27 ; 43 ; 0 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[4] ; C10 ; 8 ; 29 ; 43 ; 21 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[5] ; F9 ; 8 ; 1 ; 43 ; 7 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[6] ; E10 ; 8 ; 32 ; 43 ; 7 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[7] ; H11 ; 8 ; 20 ; 43 ; 28 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[8] ; B9 ; 8 ; 29 ; 43 ; 0 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; SRD[9] ; A10 ; 8 ; 32 ; 43 ; 14 ; 1 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; DSP:Mathias_Alles|nSRWE~1 (inverted) ; - ;
-; VDQS[0] ; AA15 ; 4 ; 43 ; 0 ; 14 ; 0 ; 0 ; no ; no ; no ; yes ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst90~_Duplicate_3 ; - ;
-; VDQS[1] ; W15 ; 4 ; 52 ; 0 ; 21 ; 0 ; 0 ; no ; no ; no ; yes ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst90~_Duplicate_2 ; - ;
-; VDQS[2] ; U22 ; 5 ; 67 ; 11 ; 7 ; 0 ; 0 ; no ; no ; no ; yes ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst90~_Duplicate_1 ; - ;
-; VDQS[3] ; T16 ; 4 ; 63 ; 0 ; 7 ; 0 ; 0 ; no ; no ; no ; yes ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst90 ; - ;
-; VD[0] ; M22 ; 5 ; 67 ; 18 ; 7 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[10] ; P17 ; 5 ; 67 ; 10 ; 14 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[11] ; R21 ; 5 ; 67 ; 13 ; 0 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[12] ; N17 ; 5 ; 67 ; 17 ; 21 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[13] ; P20 ; 5 ; 67 ; 14 ; 21 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[14] ; R22 ; 5 ; 67 ; 13 ; 7 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[15] ; N20 ; 5 ; 67 ; 15 ; 7 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[16] ; T12 ; 4 ; 45 ; 0 ; 7 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[17] ; Y13 ; 4 ; 43 ; 0 ; 21 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[18] ; AA13 ; 4 ; 38 ; 0 ; 28 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[19] ; V14 ; 4 ; 50 ; 0 ; 21 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[1] ; M21 ; 5 ; 67 ; 18 ; 0 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[20] ; U13 ; 4 ; 50 ; 0 ; 28 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[21] ; V15 ; 4 ; 50 ; 0 ; 0 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[22] ; W14 ; 4 ; 48 ; 0 ; 21 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[23] ; AB16 ; 4 ; 45 ; 0 ; 14 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[24] ; AB15 ; 4 ; 43 ; 0 ; 7 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[25] ; AA14 ; 4 ; 38 ; 0 ; 14 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[26] ; AB14 ; 4 ; 38 ; 0 ; 7 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[27] ; V13 ; 4 ; 48 ; 0 ; 28 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[28] ; W13 ; 4 ; 43 ; 0 ; 28 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[29] ; AB13 ; 4 ; 38 ; 0 ; 21 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[2] ; P22 ; 5 ; 67 ; 14 ; 7 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[30] ; V12 ; 4 ; 41 ; 0 ; 28 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[31] ; U12 ; 4 ; 43 ; 0 ; 0 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[3] ; R20 ; 5 ; 67 ; 11 ; 21 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[4] ; P21 ; 5 ; 67 ; 14 ; 0 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[5] ; R17 ; 5 ; 67 ; 10 ; 21 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[6] ; R19 ; 5 ; 67 ; 12 ; 14 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[7] ; U21 ; 5 ; 67 ; 11 ; 0 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[8] ; V22 ; 5 ; 67 ; 10 ; 7 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; VD[9] ; R18 ; 5 ; 67 ; 12 ; 21 ; 3 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 2.5 V ; 12mA ; Off ; -- ; User ; 0 pF ; Video:Fredi_Aschwanden|inst37 (inverted) ; - ;
-; nSCSI_BUSY ; N8 ; 2 ; 0 ; 11 ; 14 ; 0 ; 0 ; no ; no ; yes ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; nSCSI_RST ; N6 ; 2 ; 0 ; 12 ; 21 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-; nSCSI_SEL ; M8 ; 2 ; 0 ; 11 ; 7 ; 0 ; 0 ; no ; no ; no ; no ; no ; 2 ; yes ; no ; no ; Off ; 3.3-V LVTTL ; 8mA ; Off ; -- ; User ; 0 pF ; - ; - ;
-+-------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+-----------+-----------------+------------+----------+--------------+--------------+------------------+--------------------+---------------------------+----------------------+------+---------------------------------------------------------------------------------------------------------------+---------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------+
-; Dual Purpose and Dedicated Pins ;
-+----------+------------------------------------------+--------------------------------+-------------------------+---------------------------+
-; Location ; Pin Name ; Reserved As ; User Signal Name ; Pin Type ;
-+----------+------------------------------------------+--------------------------------+-------------------------+---------------------------+
-; D1 ; DIFFIO_L8n, DATA1, ASDO ; As input tri-stated ; ~ALTERA_ASDO_DATA1~ ; Dual Purpose Pin ;
-; E2 ; DIFFIO_L10p, FLASH_nCE, nCSO ; As input tri-stated ; ~ALTERA_FLASH_nCE_nCSO~ ; Dual Purpose Pin ;
-; K6 ; nSTATUS ; - ; - ; Dedicated Programming Pin ;
-; K2 ; DCLK ; As input tri-stated ; ~ALTERA_DCLK~ ; Dual Purpose Pin ;
-; K1 ; DATA0 ; As input tri-stated ; ~ALTERA_DATA0~ ; Dual Purpose Pin ;
-; K5 ; nCONFIG ; - ; - ; Dedicated Programming Pin ;
-; L3 ; nCE ; - ; - ; Dedicated Programming Pin ;
-; N22 ; DIFFIO_R32n, DEV_OE ; Reserved as secondary function ; ~ALTERA_DEV_OE~ ; Dual Purpose Pin ;
-; N21 ; DIFFIO_R32p, DEV_CLRn ; Reserved as secondary function ; ~ALTERA_DEV_CLRn~ ; Dual Purpose Pin ;
-; M18 ; CONF_DONE ; - ; - ; Dedicated Programming Pin ;
-; M17 ; MSEL0 ; - ; - ; Dedicated Programming Pin ;
-; L18 ; MSEL1 ; - ; - ; Dedicated Programming Pin ;
-; L17 ; MSEL2 ; - ; - ; Dedicated Programming Pin ;
-; K20 ; MSEL3 ; - ; - ; Dedicated Programming Pin ;
-; K22 ; DIFFIO_R24n, nCEO ; Use as programming pin ; ~ALTERA_nCEO~ ; Dual Purpose Pin ;
-; K21 ; DIFFIO_R24p, CLKUSR ; Use as general purpose IO ; HSYNC_PAD ; Dual Purpose Pin ;
-; E22 ; DIFFIO_R12n, nWE ; Use as regular IO ; VG[1] ; Dual Purpose Pin ;
-; E21 ; DIFFIO_R12p, nOE ; Use as regular IO ; VG[2] ; Dual Purpose Pin ;
-; F20 ; DIFFIO_R8n, nAVD ; Use as regular IO ; nIRQ[4] ; Dual Purpose Pin ;
-; F19 ; DIFFIO_R8n, nAVD ; - ; PIXEL_CLK_PAD ; Dual Purpose Pin ;
-; G18 ; DIFFIO_R7n, PADD23 ; Use as regular IO ; VB[0] ; Dual Purpose Pin ;
-; B22 ; DIFFIO_R5n, PADD22 ; Use as regular IO ; VB[4] ; Dual Purpose Pin ;
-; B21 ; DIFFIO_R5p, PADD21 ; Use as regular IO ; VB[5] ; Dual Purpose Pin ;
-; C20 ; DIFFIO_R4n, PADD20, DQS2R/CQ3R,CDPCLK5 ; Use as regular IO ; VB[6] ; Dual Purpose Pin ;
-; B18 ; DIFFIO_T45p, PADD0 ; Use as regular IO ; RTS ; Dual Purpose Pin ;
-; A17 ; DIFFIO_T41n, PADD1 ; Use as regular IO ; YM_QA ; Dual Purpose Pin ;
-; B17 ; DIFFIO_T41p, PADD2 ; Use as regular IO ; SD_DATA2 ; Dual Purpose Pin ;
-; E14 ; DIFFIO_T38n, PADD3 ; Use as regular IO ; SD_CMD_D1 ; Dual Purpose Pin ;
-; F13 ; DIFFIO_T37p, PADD4, DQS2T/CQ3T,DPCLK8 ; Use as regular IO ; SD_CD_DATA3 ; Dual Purpose Pin ;
-; A15 ; DIFFIO_T36n, PADD5 ; Use as regular IO ; IO[9] ; Dual Purpose Pin ;
-; B15 ; DIFFIO_T36p, PADD6 ; Use as regular IO ; IO[10] ; Dual Purpose Pin ;
-; C13 ; DIFFIO_T35n, PADD7 ; Use as regular IO ; IO[11] ; Dual Purpose Pin ;
-; D13 ; DIFFIO_T35p, PADD8 ; Use as regular IO ; IO[12] ; Dual Purpose Pin ;
-; A14 ; DIFFIO_T31n, PADD9 ; Use as regular IO ; IO[14] ; Dual Purpose Pin ;
-; B14 ; DIFFIO_T31p, PADD10 ; Use as regular IO ; IO[15] ; Dual Purpose Pin ;
-; A13 ; DIFFIO_T29n, PADD11 ; Use as regular IO ; IO[16] ; Dual Purpose Pin ;
-; B13 ; DIFFIO_T29p, PADD12, DQS4T/CQ5T,DPCLK9 ; Use as regular IO ; IO[17] ; Dual Purpose Pin ;
-; E11 ; DIFFIO_T27n, PADD13 ; Use as regular IO ; nDREQ1 ; Dual Purpose Pin ;
-; F11 ; DIFFIO_T27p, PADD14 ; Use as regular IO ; nSROE ; Dual Purpose Pin ;
-; B10 ; DIFFIO_T25p, PADD15 ; Use as regular IO ; SRD[11] ; Dual Purpose Pin ;
-; A9 ; DIFFIO_T24n, PADD16 ; Use as regular IO ; SRD[10] ; Dual Purpose Pin ;
-; B9 ; DIFFIO_T24p, PADD17, DQS5T/CQ5T#,DPCLK10 ; Use as regular IO ; SRD[8] ; Dual Purpose Pin ;
-; A8 ; DIFFIO_T20n, DATA2 ; Use as regular IO ; IO[0] ; Dual Purpose Pin ;
-; B8 ; DIFFIO_T20p, DATA3 ; Use as regular IO ; nSRCS ; Dual Purpose Pin ;
-; A7 ; DIFFIO_T19n, PADD18 ; Use as regular IO ; IO[1] ; Dual Purpose Pin ;
-; B7 ; DIFFIO_T19p, DATA4 ; Use as regular IO ; IO[2] ; Dual Purpose Pin ;
-; A6 ; DIFFIO_T18n, PADD19 ; Use as regular IO ; IO[3] ; Dual Purpose Pin ;
-; B6 ; DIFFIO_T18p, DATA15 ; Use as regular IO ; IO[4] ; Dual Purpose Pin ;
-; C8 ; DIFFIO_T16n, DATA14, DQS3T/CQ3T#,DPCLK11 ; Use as regular IO ; IO[6] ; Dual Purpose Pin ;
-; C7 ; DIFFIO_T16p, DATA13 ; Use as regular IO ; IO[7] ; Dual Purpose Pin ;
-; A5 ; DIFFIO_T11p, DATA5 ; Use as regular IO ; SRD[1] ; Dual Purpose Pin ;
-; F10 ; DIFFIO_T8p, DATA6 ; Use as regular IO ; SRD[13] ; Dual Purpose Pin ;
-; C6 ; DIFFIO_T7n, DATA7 ; Use as regular IO ; SRD[2] ; Dual Purpose Pin ;
-; B4 ; DIFFIO_T6p, DATA8 ; Use as regular IO ; nSRBHE ; Dual Purpose Pin ;
-; F8 ; DIFFIO_T5n, DATA9 ; Use as regular IO ; nSRWE ; Dual Purpose Pin ;
-; A3 ; DIFFIO_T4n, DATA10 ; Use as regular IO ; LP_D[6] ; Dual Purpose Pin ;
-; B3 ; DIFFIO_T4p, DATA11 ; Use as regular IO ; LP_D[5] ; Dual Purpose Pin ;
-; C4 ; DIFFIO_T3p, DATA12, DQS1T/CQ1T#,CDPCLK7 ; Use as regular IO ; LP_D[1] ; Dual Purpose Pin ;
-+----------+------------------------------------------+--------------------------------+-------------------------+---------------------------+
-
-
-+-------------------------------------------------------------+
-; I/O Bank Usage ;
-+----------+-------------------+---------------+--------------+
-; I/O Bank ; Usage ; VCCIO Voltage ; VREF Voltage ;
-+----------+-------------------+---------------+--------------+
-; 1 ; 30 / 36 ( 83 % ) ; 3.3V ; -- ;
-; 2 ; 44 / 46 ( 96 % ) ; 3.3V ; -- ;
-; 3 ; 38 / 42 ( 90 % ) ; 3.3V ; -- ;
-; 4 ; 33 / 43 ( 77 % ) ; 2.5V ; -- ;
-; 5 ; 37 / 42 ( 88 % ) ; 2.5V ; -- ;
-; 6 ; 35 / 37 ( 95 % ) ; 3.0V ; -- ;
-; 7 ; 43 / 43 ( 100 % ) ; 3.3V ; -- ;
-; 8 ; 42 / 43 ( 98 % ) ; 3.3V ; -- ;
-+----------+-------------------+---------------+--------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; All Package Pins ;
-+----------+------------+----------+--------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
-; Location ; Pad Number ; I/O Bank ; Pin Name/Usage ; Dir. ; I/O Standard ; Voltage ; I/O Type ; User Assignment ; Bus Hold ; Weak Pull Up ;
-+----------+------------+----------+--------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
-; A1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; A2 ; ; 8 ; VCCIO8 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; A3 ; 534 ; 8 ; LP_D[6] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A4 ; 529 ; 8 ; nSRBLE ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A5 ; 518 ; 8 ; SRD[1] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A6 ; 501 ; 8 ; IO[3] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A7 ; 499 ; 8 ; IO[1] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A8 ; 497 ; 8 ; IO[0] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A9 ; 487 ; 8 ; SRD[10] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A10 ; 485 ; 8 ; SRD[9] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A11 ; 481 ; 8 ; DVI_INT ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A12 ; 479 ; 7 ; nDACK1 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A13 ; 473 ; 7 ; IO[16] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A14 ; 469 ; 7 ; IO[14] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A15 ; 458 ; 7 ; IO[9] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A16 ; 448 ; 7 ; SD_DATA1 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A17 ; 446 ; 7 ; YM_QA ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A18 ; 437 ; 7 ; TxD ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A19 ; 435 ; 7 ; DCD ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A20 ; 430 ; 7 ; nRD_DATA ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; A21 ; ; 7 ; VCCIO7 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; A22 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AA1 ; 125 ; 2 ; nPCI_INTA ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; AA2 ; 124 ; 2 ; PIC_INT ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; AA3 ; 154 ; 3 ; FB_AD[2] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AA4 ; 158 ; 3 ; FB_AD[6] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AA5 ; 160 ; 3 ; FB_AD[8] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AA6 ; ; 3 ; VCCIO3 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AA7 ; 173 ; 3 ; FB_AD[15] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AA8 ; 183 ; 3 ; FB_AD[22] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AA9 ; 189 ; 3 ; FB_AD[25] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AA10 ; 202 ; 3 ; FB_AD[31] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AA11 ; 204 ; 3 ; GND+ ; ; ; ; Column I/O ; ; -- ; -- ;
-; AA12 ; 206 ; 4 ; GND+ ; ; ; ; Column I/O ; ; -- ; -- ;
-; AA13 ; 208 ; 4 ; VD[18] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AA14 ; 210 ; 4 ; VD[25] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AA15 ; 220 ; 4 ; VDQS[0] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AA16 ; 224 ; 4 ; VDM[0] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AA17 ; 243 ; 4 ; nDDR_CLK ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AA18 ; 245 ; 4 ; VA[12] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AA19 ; 252 ; 4 ; BA[1] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AA20 ; 259 ; 4 ; VA[7] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AA21 ; 274 ; 5 ; VA[6] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; AA22 ; 273 ; 5 ; VA[4] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; AB1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AB2 ; ; 3 ; VCCIO3 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AB3 ; 155 ; 3 ; FB_AD[3] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AB4 ; 159 ; 3 ; FB_AD[7] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AB5 ; 161 ; 3 ; FB_AD[9] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AB6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AB7 ; 174 ; 3 ; FB_AD[16] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AB8 ; 184 ; 3 ; FB_AD[23] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AB9 ; 190 ; 3 ; FB_AD[26] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AB10 ; 203 ; 3 ; CLK24M576 ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AB11 ; 205 ; 3 ; GND+ ; ; ; ; Column I/O ; ; -- ; -- ;
-; AB12 ; 207 ; 4 ; CLK33M ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; AB13 ; 209 ; 4 ; VD[29] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AB14 ; 211 ; 4 ; VD[26] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AB15 ; 221 ; 4 ; VD[24] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AB16 ; 225 ; 4 ; VD[23] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AB17 ; 244 ; 4 ; DDR_CLK ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AB18 ; 242 ; 4 ; nVCAS ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AB19 ; 253 ; 4 ; VA[9] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AB20 ; 260 ; 4 ; VA[8] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; AB21 ; ; 4 ; VCCIO4 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; AB22 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; B1 ; 4 ; 1 ; ACSI_D[0] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; B2 ; 3 ; 1 ; MIDI_TLR ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; B3 ; 535 ; 8 ; LP_D[5] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B4 ; 530 ; 8 ; nSRBHE ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B5 ; 523 ; 8 ; SRD[0] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B6 ; 502 ; 8 ; IO[4] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B7 ; 500 ; 8 ; IO[2] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B8 ; 498 ; 8 ; nSRCS ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B9 ; 488 ; 8 ; SRD[8] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B10 ; 486 ; 8 ; SRD[11] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B11 ; 482 ; 8 ; nRSTO_MCF ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B12 ; 480 ; 7 ; nDACK0 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B13 ; 474 ; 7 ; IO[17] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B14 ; 470 ; 7 ; IO[15] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B15 ; 459 ; 7 ; IO[10] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B16 ; 449 ; 7 ; SD_DATA0 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B17 ; 447 ; 7 ; SD_DATA2 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B18 ; 438 ; 7 ; RTS ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B19 ; 434 ; 7 ; RI ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B20 ; 431 ; 7 ; nSDSEL ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; B21 ; 404 ; 6 ; VB[5] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; B22 ; 403 ; 6 ; VB[4] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; C1 ; 15 ; 1 ; ACSI_D[4] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; C2 ; 14 ; 1 ; ACSI_D[3] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; C3 ; 538 ; 8 ; LP_D[2] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; C4 ; 539 ; 8 ; LP_D[1] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; C5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C6 ; 526 ; 8 ; SRD[2] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; C7 ; 508 ; 8 ; IO[7] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; C8 ; 507 ; 8 ; IO[6] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; C9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C10 ; 491 ; 8 ; SRD[4] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; C11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C13 ; 460 ; 7 ; IO[11] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; C14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C15 ; 450 ; 7 ; SD_CLK ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; C16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C17 ; 433 ; 7 ; nDCHG ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; C18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C19 ; 428 ; 7 ; TRACK00 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; C20 ; 405 ; 6 ; VB[6] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; C21 ; 401 ; 6 ; VB[3] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; C22 ; 400 ; 6 ; VB[2] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; D1 ; 17 ; 1 ; ~ALTERA_ASDO_DATA1~ / RESERVED_INPUT ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
-; D2 ; 16 ; 1 ; ACSI_D[5] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; D3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; D4 ; ; 1 ; VCCIO1 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; D5 ; ; 8 ; VCCIO8 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; D6 ; 536 ; 8 ; LP_D[4] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; D7 ; 527 ; 8 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; D8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; D9 ; ; 8 ; VCCIO8 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; D10 ; 483 ; 8 ; SRD[12] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; D11 ; ; 8 ; VCCIO8 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; D12 ; ; 7 ; VCCIO7 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; D13 ; 461 ; 7 ; IO[12] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; D14 ; ; 7 ; VCCIO7 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; D15 ; 439 ; 7 ; DTR ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; D16 ; ; 7 ; VCCIO7 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; D17 ; 426 ; 7 ; nWR_GATE ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; D18 ; ; 7 ; VCCIO7 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; D19 ; 429 ; 7 ; nWP ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; D20 ; 407 ; 6 ; VB[7] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; D21 ; 395 ; 6 ; VG[7] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; D22 ; 394 ; 6 ; VG[6] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; E1 ; 22 ; 1 ; SCSI_D[1] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; E2 ; 21 ; 1 ; ~ALTERA_FLASH_nCE_nCSO~ / RESERVED_INPUT ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
-; E3 ; 9 ; 1 ; ACSI_D[2] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; E4 ; 8 ; 1 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; E5 ; 546 ; 8 ; LPDIR ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E6 ; 545 ; 8 ; LP_STR ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E7 ; 537 ; 8 ; LP_D[3] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E8 ; ; 8 ; VCCIO8 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; E9 ; 506 ; 8 ; IO[5] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E10 ; 484 ; 8 ; SRD[6] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E11 ; 477 ; 7 ; nDREQ1 ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E12 ; 476 ; 7 ; MIDI_IN ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E13 ; 468 ; 7 ; IO[13] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E14 ; 453 ; 7 ; SD_CMD_D1 ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E15 ; 440 ; 7 ; YM_QC ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E16 ; 418 ; 7 ; nINDEX ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; E17 ; ; ; VCCD_PLL2 ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; E18 ; ; ; GNDA2 ; gnd ; ; ; -- ; ; -- ; -- ;
-; E19 ; ; 6 ; VCCIO6 ; power ; ; 3.0V ; -- ; ; -- ; -- ;
-; E20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; E21 ; 388 ; 6 ; VG[2] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; E22 ; 387 ; 6 ; VG[1] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; F1 ; 26 ; 1 ; SCSI_D[3] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; F2 ; 25 ; 1 ; SCSI_D[2] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; F3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; F4 ; ; 1 ; VCCIO1 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; F5 ; ; ; GNDA3 ; gnd ; ; ; -- ; ; -- ; -- ;
-; F6 ; ; ; VCCD_PLL3 ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; F7 ; 542 ; 8 ; LP_D[0] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; F8 ; 531 ; 8 ; nSRWE ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; F9 ; 544 ; 8 ; SRD[5] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; F10 ; 525 ; 8 ; SRD[13] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; F11 ; 478 ; 7 ; nSROE ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; F12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; F13 ; 457 ; 7 ; SD_CD_DATA3 ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; F14 ; 423 ; 7 ; nSTEP ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; F15 ; 419 ; 7 ; DSA_D ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; F16 ; 417 ; 7 ; HD_DD ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; F17 ; 410 ; 6 ; nSYNC ; output ; 3.0-V LVCMOS ; ; Row I/O ; Y ; no ; Off ;
-; F18 ; ; -- ; VCCA2 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; F19 ; 397 ; 6 ; PIXEL_CLK_PAD ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; F20 ; 396 ; 6 ; nIRQ[4] ; output ; 3.0-V LVCMOS ; ; Row I/O ; Y ; no ; Off ;
-; F21 ; 376 ; 6 ; nIRQ[2] ; output ; 3.0-V LVCMOS ; ; Row I/O ; Y ; no ; Off ;
-; F22 ; 375 ; 6 ; VR[7] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; G1 ; 67 ; 1 ; GND+ ; ; ; ; Row I/O ; ; -- ; -- ;
-; G2 ; 66 ; 1 ; MAIN_CLK ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; G3 ; 1 ; 1 ; SCSI_D[5] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; G4 ; 0 ; 1 ; SCSI_D[4] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; G5 ; 5 ; 1 ; ACSI_D[1] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; G6 ; ; -- ; VCCA3 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; G7 ; 543 ; 8 ; LP_BUSY ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; G8 ; 532 ; 8 ; LP_D[7] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; G9 ; 547 ; 8 ; SRD[14] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; G10 ; 524 ; 8 ; IO[8] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; G11 ; 492 ; 8 ; SRD[3] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; G12 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; G13 ; 444 ; 7 ; YM_QB ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; G14 ; 441 ; 7 ; nWR ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; G15 ; 422 ; 7 ; nSTEP_DIR ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; G16 ; 420 ; 7 ; nMOT_ON ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; G17 ; 411 ; 6 ; nBLANK_PAD ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; G18 ; 398 ; 6 ; VB[0] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; G19 ; ; 6 ; VCCIO6 ; power ; ; 3.0V ; -- ; ; -- ; -- ;
-; G20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; G21 ; 345 ; 6 ; E0_INT ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; G22 ; 344 ; 6 ; IDE_INT ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H1 ; 52 ; 1 ; nSCSI_C_D ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H2 ; 51 ; 1 ; nSCSI_MSG ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H4 ; ; 1 ; VCCIO1 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; H5 ; 42 ; 1 ; MIDI_OLR ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H6 ; 19 ; 1 ; ACSI_D[7] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H7 ; 18 ; 1 ; ACSI_D[6] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H8 ; 29 ; 1 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; H9 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; H10 ; 512 ; 8 ; SRD[15] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; H11 ; 511 ; 8 ; SRD[7] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; H12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H14 ; 425 ; 7 ; CTS ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; H15 ; 424 ; 7 ; RxD ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; H16 ; 393 ; 6 ; VG[5] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H17 ; 399 ; 6 ; VB[1] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H18 ; 391 ; 6 ; VG[3] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H19 ; 386 ; 6 ; VG[0] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H20 ; 385 ; 6 ; nIRQ[3] ; output ; 3.0-V LVCMOS ; ; Row I/O ; Y ; no ; Off ;
-; H21 ; 365 ; 6 ; VR[3] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; H22 ; 364 ; 6 ; VR[2] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; J1 ; 55 ; 1 ; CLKUSB ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; J2 ; 54 ; 1 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; J3 ; 53 ; 1 ; nSCSI_I_O ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; J4 ; 50 ; 1 ; nACSI_INT ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; J5 ; 38 ; 1 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; J6 ; 20 ; 1 ; SCSI_D[0] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; J7 ; 45 ; 1 ; SCSI_DIR ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; J8 ; 30 ; 1 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; J9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; J10 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; J11 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; J12 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; J13 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; J14 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; J15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; J16 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; J17 ; 392 ; 6 ; VG[4] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; J18 ; 374 ; 6 ; VR[6] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; J19 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; J20 ; ; 6 ; VCCIO6 ; power ; ; 3.0V ; -- ; ; -- ; -- ;
-; J21 ; 363 ; 6 ; VR[1] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; J22 ; 362 ; 6 ; VR[0] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; K1 ; 59 ; 1 ; ~ALTERA_DATA0~ / RESERVED_INPUT ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
-; K2 ; 58 ; 1 ; ~ALTERA_DCLK~ / RESERVED_INPUT ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
-; K3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K4 ; ; 1 ; VCCIO1 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; K5 ; 60 ; 1 ; ^nCONFIG ; ; ; ; -- ; ; -- ; -- ;
-; K6 ; 41 ; 1 ; ^nSTATUS ; ; ; ; -- ; ; -- ; -- ;
-; K7 ; 46 ; 1 ; nACSI_DRQ ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; K8 ; 44 ; 1 ; SCSI_D[7] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; K9 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; K10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K14 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; K15 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; K16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K17 ; 369 ; 6 ; VR[4] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; K18 ; 370 ; 6 ; VR[5] ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; K19 ; 357 ; 6 ; VSYNC_PAD ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; K20 ; 350 ; 6 ; ^MSEL3 ; ; ; ; -- ; ; -- ; -- ;
-; K21 ; 361 ; 6 ; HSYNC_PAD ; output ; 3.0-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; K22 ; 360 ; 6 ; ~ALTERA_nCEO~ / RESERVED_OUTPUT_OPEN_DRAIN ; output ; 3.0-V LVTTL ; ; Row I/O ; N ; no ; Off ;
-; L1 ; 63 ; 1 ; #TMS ; input ; ; ; -- ; ; -- ; -- ;
-; L2 ; 62 ; 1 ; #TCK ; input ; ; ; -- ; ; -- ; -- ;
-; L3 ; 65 ; 1 ; ^nCE ; ; ; ; -- ; ; -- ; -- ;
-; L4 ; 64 ; 1 ; #TDO ; output ; ; ; -- ; ; -- ; -- ;
-; L5 ; 61 ; 1 ; #TDI ; input ; ; ; -- ; ; -- ; -- ;
-; L6 ; 70 ; 2 ; ACSI_DIR ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; L7 ; 79 ; 2 ; PIC_AMKB_RX ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; L8 ; 43 ; 1 ; SCSI_D[6] ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; L9 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; L10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L14 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; L15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L16 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; L17 ; 349 ; 6 ; ^MSEL2 ; ; ; ; -- ; ; -- ; -- ;
-; L18 ; 348 ; 6 ; ^MSEL1 ; ; ; ; -- ; ; -- ; -- ;
-; L19 ; ; 6 ; VCCIO6 ; power ; ; 3.0V ; -- ; ; -- ; -- ;
-; L20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L21 ; 354 ; 6 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; L22 ; 353 ; 6 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; M1 ; 73 ; 2 ; nACSI_RESET ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; M2 ; 72 ; 2 ; nACSI_CS ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; M3 ; 75 ; 2 ; nSCSI_ATN ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; M4 ; 74 ; 2 ; nACSI_ACK ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; M5 ; 80 ; 2 ; IDE_RES ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; M6 ; 71 ; 2 ; ACSI_A1 ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; M7 ; 105 ; 2 ; SCSI_PAR ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; M8 ; 106 ; 2 ; nSCSI_SEL ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; M9 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; M10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M14 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; M15 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; M16 ; 337 ; 5 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; M17 ; 347 ; 6 ; ^MSEL0 ; ; ; ; -- ; ; -- ; -- ;
-; M18 ; 346 ; 6 ; ^CONF_DONE ; ; ; ; -- ; ; -- ; -- ;
-; M19 ; 336 ; 5 ; SD_WP ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; M20 ; 335 ; 5 ; SD_CARD_DEDECT ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; M21 ; 334 ; 5 ; VD[1] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; M22 ; 333 ; 5 ; VD[0] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; N1 ; 77 ; 2 ; AMKB_TX ; output ; 3.3-V LVCMOS ; ; Row I/O ; Y ; no ; Off ;
-; N2 ; 76 ; 2 ; nSCSI_ACK ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; N3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N4 ; ; 2 ; VCCIO2 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; N5 ; 87 ; 2 ; nRP_LDS ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; N6 ; 104 ; 2 ; nSCSI_RST ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; N7 ; 122 ; 2 ; nIRQ[7] ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; N8 ; 107 ; 2 ; nSCSI_BUSY ; bidir ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; N9 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; N10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N14 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; N15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N16 ; 314 ; 5 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; N17 ; 329 ; 5 ; VD[12] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; N18 ; 330 ; 5 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; N19 ; 324 ; 5 ; LED_FPGA_OK ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; N20 ; 323 ; 5 ; VD[15] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; N21 ; 332 ; 5 ; ~ALTERA_DEV_CLRn~ / RESERVED_INPUT ; input ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
-; N22 ; 331 ; 5 ; ~ALTERA_DEV_OE~ / RESERVED_INPUT ; input ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
-; P1 ; 84 ; 2 ; nIDE_RD ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; P2 ; 83 ; 2 ; nIDE_WR ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; P3 ; 89 ; 2 ; nROM3 ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; P4 ; 88 ; 2 ; nRP_UDS ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; P5 ; 103 ; 2 ; nIRQ[5] ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; P6 ; 131 ; 2 ; nPCI_INTD ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; P7 ; 123 ; 2 ; nIRQ[6] ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; P8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P9 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; P10 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; P11 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; P12 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; P13 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; P14 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; P15 ; 298 ; 5 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; P16 ; 299 ; 5 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; P17 ; 302 ; 5 ; VD[10] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; P18 ; ; 5 ; VCCIO5 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; P19 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P20 ; 317 ; 5 ; VD[13] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; P21 ; 320 ; 5 ; VD[4] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; P22 ; 319 ; 5 ; VD[2] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; R1 ; 86 ; 2 ; nIDE_CS1 ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; R2 ; 85 ; 2 ; nIDE_CS0 ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; R3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R4 ; ; 2 ; VCCIO2 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; R5 ; 135 ; 2 ; TIN0 ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; R6 ; 136 ; 2 ; nFB_OE ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; R7 ; 137 ; 2 ; FB_ALE ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; R8 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; R9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R10 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; R11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R12 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; R13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R14 ; 268 ; 4 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; R15 ; 269 ; 4 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; R16 ; 267 ; 4 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; R17 ; 301 ; 5 ; VD[5] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; R18 ; 309 ; 5 ; VD[9] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; R19 ; 310 ; 5 ; VD[6] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; R20 ; 305 ; 5 ; VD[3] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; R21 ; 316 ; 5 ; VD[11] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; R22 ; 315 ; 5 ; VD[14] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; T1 ; 69 ; 2 ; WP_CF_CARD ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; T2 ; 68 ; 2 ; GND+ ; ; ; ; Row I/O ; ; -- ; -- ;
-; T3 ; 121 ; 2 ; nFB_BURST ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; T4 ; 134 ; 2 ; CLK25M ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; T5 ; 133 ; 2 ; nFB_WR ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; T6 ; ; -- ; VCCA1 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; T7 ; 138 ; 2 ; nFB_TA ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; T8 ; 166 ; 3 ; nFB_CS1 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; T9 ; 167 ; 3 ; nFB_CS2 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; T10 ; 176 ; 3 ; FB_AD[20] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; T11 ; 177 ; 3 ; FB_AD[24] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; T12 ; 226 ; 4 ; VD[16] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; T13 ; 227 ; 4 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; T14 ; 240 ; 4 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; T15 ; 241 ; 4 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; T16 ; 266 ; 4 ; VDQS[3] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; T17 ; 277 ; 5 ; VDM[3] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; T18 ; 278 ; 5 ; nVCS ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; T19 ; ; 5 ; VCCIO5 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; T20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; T21 ; 343 ; 5 ; nMASTER ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; T22 ; 342 ; 5 ; TOUT0 ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; U1 ; 92 ; 2 ; nSCSI_DRQ ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; U2 ; 91 ; 2 ; nROM4 ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; U3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; U4 ; ; 2 ; VCCIO2 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; U5 ; ; ; GNDA1 ; gnd ; ; ; -- ; ; -- ; -- ;
-; U6 ; ; ; VCCD_PLL1 ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; U7 ; 145 ; 3 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; U8 ; 146 ; 3 ; FB_SIZE0 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; U9 ; 170 ; 3 ; FB_AD[12] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; U10 ; 182 ; 3 ; FB_AD[21] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; U11 ; 191 ; 3 ; FB_AD[27] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; U12 ; 222 ; 4 ; VD[31] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; U13 ; 233 ; 4 ; VD[20] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; U14 ; 235 ; 4 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; U15 ; 236 ; 4 ; VCKE ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; U16 ; 262 ; 4 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; U17 ; 263 ; 4 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; U18 ; ; -- ; VCCA4 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; U19 ; 291 ; 5 ; VA[11] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; U20 ; 290 ; 5 ; VDM[2] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; U21 ; 308 ; 5 ; VD[7] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; U22 ; 307 ; 5 ; VDQS[2] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; V1 ; 98 ; 2 ; nPD_VGA ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; V2 ; 97 ; 2 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; V3 ; 130 ; 2 ; nPCI_INTC ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; V4 ; 129 ; 2 ; nPCI_INTB ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; V5 ; 142 ; 3 ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; V6 ; 141 ; 3 ; nFB_CS3 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; V7 ; 157 ; 3 ; FB_AD[5] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; V8 ; 171 ; 3 ; FB_AD[13] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; V9 ; 178 ; 3 ; FB_AD[18] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; V10 ; 179 ; 3 ; FB_AD[19] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; V11 ; 199 ; 3 ; FB_AD[28] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; V12 ; 213 ; 4 ; VD[30] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; V13 ; 228 ; 4 ; VD[27] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; V14 ; 234 ; 4 ; VD[19] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; V15 ; 237 ; 4 ; VD[21] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; V16 ; 261 ; 4 ; VDM[1] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; V17 ; ; ; VCCD_PLL4 ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; V18 ; ; ; GNDA4 ; gnd ; ; ; -- ; ; -- ; -- ;
-; V19 ; ; 5 ; VCCIO5 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; V20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V21 ; 304 ; 5 ; VA[10] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; V22 ; 303 ; 5 ; VD[8] ; bidir ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; W1 ; 111 ; 2 ; nCF_CS1 ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; W2 ; 110 ; 2 ; nCF_CS0 ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; W3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; W4 ; ; 2 ; VCCIO2 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; W5 ; ; 3 ; VCCIO3 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; W6 ; 156 ; 3 ; FB_AD[4] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; W7 ; 168 ; 3 ; FB_AD[10] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; W8 ; 172 ; 3 ; FB_AD[14] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; W9 ; ; 3 ; VCCIO3 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; W10 ; 200 ; 3 ; FB_AD[29] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; W11 ; ; 3 ; VCCIO3 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; W12 ; ; 4 ; VCCIO4 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; W13 ; 218 ; 4 ; VD[28] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; W14 ; 229 ; 4 ; VD[22] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; W15 ; 239 ; 4 ; VDQS[1] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; W16 ; ; 4 ; VCCIO4 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; W17 ; 257 ; 4 ; nVRAS ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; W18 ; ; 4 ; VCCIO4 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; W19 ; 285 ; 5 ; BA[0] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; W20 ; 280 ; 5 ; VA[0] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; W21 ; 293 ; 5 ; VA[2] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; W22 ; 292 ; 5 ; VA[1] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; Y1 ; 113 ; 2 ; IDE_RDY ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; Y2 ; 112 ; 2 ; AMKB_RX ; input ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; Y3 ; 148 ; 3 ; FB_AD[0] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; Y4 ; 147 ; 3 ; FB_SIZE1 ; input ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; Y5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y6 ; 152 ; 3 ; FB_AD[1] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; Y7 ; 169 ; 3 ; FB_AD[11] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; Y8 ; 175 ; 3 ; FB_AD[17] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; Y9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y10 ; 201 ; 3 ; FB_AD[30] ; bidir ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; Y11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y13 ; 219 ; 4 ; VD[17] ; bidir ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; Y14 ; ; 4 ; VCCIO4 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; Y15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y17 ; 258 ; 4 ; nVWE ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; Y18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y19 ; ; 5 ; VCCIO5 ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; Y20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y21 ; 289 ; 5 ; VA[5] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; Y22 ; 288 ; 5 ; VA[3] ; output ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-+----------+------------+----------+--------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
-Note: Pin directions (input, output or bidir) are based on device operating in user mode.
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; PLL Summary ;
-+-------------------------------+----------------------------------------------------------------------+------------------------------------------------------------------------+------------------------------------------------------------------------+--------------------------------------------------------------------------+
-; Name ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|pll1 ;
-+-------------------------------+----------------------------------------------------------------------+------------------------------------------------------------------------+------------------------------------------------------------------------+--------------------------------------------------------------------------+
-; SDC pin name ; inst|altpll_component|auto_generated|pll1 ; inst13|altpll_component|auto_generated|pll1 ; inst12|altpll_component|auto_generated|pll1 ; inst22|altpll_component|auto_generated|pll1 ;
-; PLL mode ; Source Synchronous ; Source Synchronous ; Source Synchronous ; Normal ;
-; Compensate clock ; clock0 ; clock1 ; clock0 ; clock0 ;
-; Compensated input/output pins ; -- ; nRD_DATA ; MAIN_CLK ; -- ;
-; Switchover type ; -- ; -- ; -- ; -- ;
-; Input frequency 0 ; 33.0 MHz ; 33.0 MHz ; 33.0 MHz ; 48.0 MHz ;
-; Input frequency 1 ; -- ; -- ; -- ; -- ;
-; Nominal PFD frequency ; 5.5 MHz ; 11.0 MHz ; 33.0 MHz ; 48.0 MHz ;
-; Nominal VCO frequency ; 368.5 MHz ; 1199.0 MHz ; 396.0 MHz ; 576.0 MHz ;
-; VCO post scale ; 2 ; -- ; 2 ; 2 ;
-; VCO frequency control ; Auto ; Auto ; Auto ; Auto ;
-; VCO phase shift step ; 339 ps ; 104 ps ; 315 ps ; 217 ps ;
-; VCO multiply ; -- ; -- ; -- ; -- ;
-; VCO divide ; -- ; -- ; -- ; -- ;
-; Freq min lock ; 32.4 MHz ; 16.8 MHz ; 25.0 MHz ; 25.0 MHz ;
-; Freq max lock ; 58.23 MHz ; 35.79 MHz ; 54.18 MHz ; 54.18 MHz ;
-; M VCO Tap ; 0 ; 0 ; 0 ; 0 ;
-; M Initial ; 1 ; 1 ; 1 ; 1 ;
-; M value ; 67 ; 109 ; 12 ; 12 ;
-; N value ; 6 ; 3 ; 1 ; 1 ;
-; Charge pump current ; setting 1 ; setting 1 ; setting 1 ; setting 1 ;
-; Loop filter resistance ; setting 16 ; setting 19 ; setting 27 ; setting 27 ;
-; Loop filter capacitance ; setting 0 ; setting 0 ; setting 0 ; setting 0 ;
-; Bandwidth ; 340 kHz to 540 kHz ; 450 kHz to 560 kHz ; 680 kHz to 980 kHz ; 680 kHz to 980 kHz ;
-; Real time reconfigurable ; Off ; Off ; Off ; On ;
-; Scan chain MIF file ; -- ; -- ; -- ; altpll4.mif ;
-; Preserve PLL counter order ; Off ; Off ; Off ; Off ;
-; PLL location ; PLL_3 ; PLL_4 ; PLL_1 ; PLL_2 ;
-; Inclk0 signal ; CLK33M ; CLK33M ; MAIN_CLK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] ;
-; Inclk1 signal ; -- ; -- ; -- ; -- ;
-; Inclk0 signal type ; Global Clock ; Dedicated Pin ; Dedicated Pin ; Global Clock ;
-; Inclk1 signal type ; -- ; -- ; -- ; -- ;
-+-------------------------------+----------------------------------------------------------------------+------------------------------------------------------------------------+------------------------------------------------------------------------+--------------------------------------------------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; PLL Usage ;
-+-------------------------------------------------------------------------------------+--------------+------+------+------------------+----------------+------------------+------------+---------+---------------+--------------+---------------+---------+---------+----------------------------------------------------+
-; Name ; Output Clock ; Mult ; Div ; Output Frequency ; Phase Shift ; Phase Shift Step ; Duty Cycle ; Counter ; Counter Value ; High / Low ; Cascade Input ; Initial ; VCO Tap ; SDC Pin Name ;
-+-------------------------------------------------------------------------------------+--------------+------+------+------------------+----------------+------------------+------------+---------+---------------+--------------+---------------+---------+---------+----------------------------------------------------+
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; clock0 ; 1 ; 66 ; 0.5 MHz ; 0 (0 ps) ; 0.67 (339 ps) ; 50/50 ; C1 ; 67 ; 34/33 Odd ; C0 ; 1 ; 0 ; inst|altpll_component|auto_generated|pll1|clk[0] ;
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[1] ; clock1 ; 67 ; 900 ; 2.46 MHz ; 0 (0 ps) ; 0.30 (339 ps) ; 50/50 ; C2 ; 150 ; 75/75 Even ; -- ; 1 ; 0 ; inst|altpll_component|auto_generated|pll1|clk[1] ;
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[2] ; clock2 ; 67 ; 90 ; 24.57 MHz ; 0 (0 ps) ; 3.00 (339 ps) ; 50/50 ; C3 ; 15 ; 8/7 Odd ; -- ; 1 ; 0 ; inst|altpll_component|auto_generated|pll1|clk[2] ;
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]~cascade_in ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; C0 ; 11 ; 5/6 Odd ; -- ; 1 ; 0 ; ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; clock0 ; 109 ; 1800 ; 2.0 MHz ; 0 (0 ps) ; 0.15 (104 ps) ; 50/50 ; C1 ; 300 ; 150/150 Even ; C0 ; 1 ; 0 ; inst13|altpll_component|auto_generated|pll1|clk[0] ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; clock1 ; 109 ; 225 ; 15.99 MHz ; 0 (0 ps) ; 0.60 (104 ps) ; 50/50 ; C2 ; 75 ; 38/37 Odd ; -- ; 1 ; 0 ; inst13|altpll_component|auto_generated|pll1|clk[1] ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; clock2 ; 109 ; 144 ; 24.98 MHz ; 0 (0 ps) ; 0.94 (104 ps) ; 50/50 ; C3 ; 48 ; 24/24 Even ; -- ; 1 ; 0 ; inst13|altpll_component|auto_generated|pll1|clk[2] ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] ; clock3 ; 109 ; 75 ; 47.96 MHz ; 0 (0 ps) ; 1.80 (104 ps) ; 50/50 ; C4 ; 25 ; 13/12 Odd ; -- ; 1 ; 0 ; inst13|altpll_component|auto_generated|pll1|clk[3] ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]~cascade_in ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; C0 ; 2 ; 1/1 Even ; -- ; 1 ; 0 ; ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; clock0 ; 4 ; 1 ; 132.0 MHz ; 240 (5051 ps) ; 15.00 (315 ps) ; 50/50 ; C0 ; 3 ; 2/1 Odd ; -- ; 3 ; 0 ; inst12|altpll_component|auto_generated|pll1|clk[0] ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; clock1 ; 4 ; 1 ; 132.0 MHz ; 0 (0 ps) ; 15.00 (315 ps) ; 50/50 ; C3 ; 3 ; 2/1 Odd ; -- ; 1 ; 0 ; inst12|altpll_component|auto_generated|pll1|clk[1] ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; clock2 ; 4 ; 1 ; 132.0 MHz ; 180 (3788 ps) ; 15.00 (315 ps) ; 50/50 ; C2 ; 3 ; 2/1 Odd ; -- ; 2 ; 4 ; inst12|altpll_component|auto_generated|pll1|clk[2] ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; clock3 ; 4 ; 1 ; 132.0 MHz ; 105 (2210 ps) ; 15.00 (315 ps) ; 50/50 ; C4 ; 3 ; 2/1 Odd ; -- ; 1 ; 7 ; inst12|altpll_component|auto_generated|pll1|clk[3] ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; clock4 ; 2 ; 1 ; 66.0 MHz ; 270 (11364 ps) ; 7.50 (315 ps) ; 50/50 ; C1 ; 6 ; 3/3 Even ; -- ; 5 ; 4 ; inst12|altpll_component|auto_generated|pll1|clk[4] ;
-; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; clock0 ; 2 ; 1 ; 96.0 MHz ; 0 (0 ps) ; 7.50 (217 ps) ; 50/50 ; C0 ; 6 ; 3/3 Even ; -- ; 1 ; 0 ; inst22|altpll_component|auto_generated|pll1|clk[0] ;
-+-------------------------------------------------------------------------------------+--------------+------+------+------------------+----------------+------------------+------------+---------+---------------+--------------+---------------+---------+---------+----------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------+
-; Output Pin Default Load For Reported TCO ;
-+----------------------------------+-------+------------------------------------+
-; I/O Standard ; Load ; Termination Resistance ;
-+----------------------------------+-------+------------------------------------+
-; 3.0-V LVTTL ; 0 pF ; Not Available ;
-; 3.3-V LVTTL ; 0 pF ; Not Available ;
-; 3.0-V LVCMOS ; 0 pF ; Not Available ;
-; 3.3-V LVCMOS ; 0 pF ; Not Available ;
-; 3.0-V PCI ; 10 pF ; Not Available ;
-; 3.0-V PCI-X ; 10 pF ; Not Available ;
-; 2.5 V ; 0 pF ; Not Available ;
-; 1.8 V ; 0 pF ; Not Available ;
-; 1.5 V ; 0 pF ; Not Available ;
-; 1.2 V ; 0 pF ; Not Available ;
-; SSTL-2 Class I ; 0 pF ; 50 Ohm (Parallel), 25 Ohm (Serial) ;
-; Differential 2.5-V SSTL Class I ; 0 pF ; (See SSTL-2) ;
-; SSTL-2 Class II ; 0 pF ; 25 Ohm (Parallel), 25 Ohm (Serial) ;
-; Differential 2.5-V SSTL Class II ; 0 pF ; (See SSTL-2 Class II) ;
-; SSTL-18 Class I ; 0 pF ; 50 Ohm (Parallel), 25 Ohm (Serial) ;
-; Differential 1.8-V SSTL Class I ; 0 pF ; (See 1.8-V SSTL Class I) ;
-; SSTL-18 Class II ; 0 pF ; 25 Ohm (Parallel), 25 Ohm (Serial) ;
-; Differential 1.8-V SSTL Class II ; 0 pF ; (See 1.8-V SSTL Class II) ;
-; 1.8-V HSTL Class I ; 0 pF ; 50 Ohm (Parallel) ;
-; Differential 1.8-V HSTL Class I ; 0 pF ; (See 1.8-V HSTL Class I) ;
-; 1.8-V HSTL Class II ; 0 pF ; 25 Ohm (Parallel) ;
-; Differential 1.8-V HSTL Class II ; 0 pF ; (See 1.8-V HSTL Class II) ;
-; 1.5-V HSTL Class I ; 0 pF ; 50 Ohm (Parallel) ;
-; Differential 1.5-V HSTL Class I ; 0 pF ; (See 1.5-V HSTL Class I) ;
-; 1.5-V HSTL Class II ; 0 pF ; 25 Ohm (Parallel) ;
-; Differential 1.5-V HSTL Class II ; 0 pF ; (See 1.5-V HSTL Class II) ;
-; 1.2-V HSTL Class I ; 0 pF ; Not Available ;
-; Differential 1.2-V HSTL Class I ; 0 pF ; Not Available ;
-; 1.2-V HSTL Class II ; 0 pF ; Not Available ;
-; Differential 1.2-V HSTL Class II ; 0 pF ; Not Available ;
-; Differential LVPECL ; 0 pF ; 100 Ohm (Differential) ;
-; LVDS ; 0 pF ; 100 Ohm (Differential) ;
-; LVDS_E_3R ; 0 pF ; Not Available ;
-; RSDS ; 0 pF ; 100 Ohm (Differential) ;
-; RSDS_E_1R ; 0 pF ; Not Available ;
-; RSDS_E_3R ; 0 pF ; Not Available ;
-; mini-LVDS ; 0 pF ; 100 Ohm (Differential) ;
-; mini-LVDS_E_3R ; 0 pF ; Not Available ;
-; PPDS ; 0 pF ; Not Available ;
-; PPDS_E_3R ; 0 pF ; Not Available ;
-; Bus LVDS ; 0 pF ; Not Available ;
-+----------------------------------+-------+------------------------------------+
-Note: User assignments will override these defaults. The user specified values are listed in the Output Pins and Bidir Pins tables.
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter Resource Utilization by Entity ;
-+-----------------------------------------------------------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
-; Compilation Hierarchy Node ; Logic Cells ; Dedicated Logic Registers ; I/O Registers ; Memory Bits ; M9Ks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Full Hierarchy Name ; Library Name ;
-+-----------------------------------------------------------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
-; |firebee1 ; 9526 (10) ; 4563 (0) ; 186 (186) ; 109344 ; 23 ; 6 ; 0 ; 3 ; 295 ; 0 ; 4963 (10) ; 1465 (0) ; 3098 (0) ; |firebee1 ; work ;
-; |DSP:Mathias_Alles| ; 10 (10) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 10 (10) ; 0 (0) ; 0 (0) ; |firebee1|DSP:Mathias_Alles ; ;
-; |FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden| ; 4093 (640) ; 1616 (114) ; 0 (0) ; 16384 ; 2 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2414 (465) ; 291 (10) ; 1388 (177) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden ; ;
-; |WF1772IP_TOP_SOC:I_FDC| ; 976 (17) ; 403 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 565 (9) ; 33 (0) ; 378 (15) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC ; ;
-; |WF1772IP_AM_DETECTOR:I_AM_DETECTOR| ; 40 (40) ; 27 (27) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 13 (13) ; 1 (1) ; 26 (26) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR ; ;
-; |WF1772IP_CONTROL:I_CONTROL| ; 545 (545) ; 196 (196) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 344 (344) ; 12 (12) ; 189 (189) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL ; ;
-; |WF1772IP_CRC_LOGIC:I_CRC_LOGIC| ; 51 (51) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 35 (35) ; 11 (11) ; 5 (5) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC ; ;
-; |WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL| ; 103 (103) ; 37 (37) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 66 (66) ; 0 (0) ; 37 (37) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL ; ;
-; |WF1772IP_REGISTERS:I_REGISTERS| ; 105 (105) ; 48 (48) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 57 (57) ; 7 (7) ; 41 (41) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS ; ;
-; |WF1772IP_TRANSCEIVER:I_TRANSCEIVER| ; 120 (120) ; 79 (79) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 41 (41) ; 2 (2) ; 77 (77) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER ; ;
-; |WF2149IP_TOP_SOC:I_SOUND| ; 490 (36) ; 197 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 293 (20) ; 37 (2) ; 160 (18) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND ; ;
-; |WF2149IP_WAVE:I_PSG_WAVE| ; 461 (461) ; 181 (181) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 273 (273) ; 35 (35) ; 153 (153) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE ; ;
-; |WF5380_TOP_SOC:I_SCSI| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI ; ;
-; |WF5380_CONTROL:I_CONTROL| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL ; ;
-; |WF6850IP_TOP_SOC:I_ACIA_KEYBOARD| ; 208 (1) ; 97 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 106 (1) ; 1 (0) ; 101 (1) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD ; ;
-; |WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS| ; 21 (21) ; 11 (11) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 10 (10) ; 1 (1) ; 10 (10) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS ; ;
-; |WF6850IP_RECEIVE:I_UART_RECEIVE| ; 101 (101) ; 47 (47) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 54 (54) ; 0 (0) ; 47 (47) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE ; ;
-; |WF6850IP_TRANSMIT:I_UART_TRANSMIT| ; 87 (87) ; 39 (39) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 41 (41) ; 0 (0) ; 46 (46) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT ; ;
-; |WF6850IP_TOP_SOC:I_ACIA_MIDI| ; 218 (2) ; 97 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 116 (2) ; 10 (0) ; 92 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI ; ;
-; |WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS| ; 27 (27) ; 11 (11) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 12 (12) ; 6 (6) ; 9 (9) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS ; ;
-; |WF6850IP_RECEIVE:I_UART_RECEIVE| ; 101 (101) ; 47 (47) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 53 (53) ; 3 (3) ; 45 (45) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE ; ;
-; |WF6850IP_TRANSMIT:I_UART_TRANSMIT| ; 88 (88) ; 39 (39) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 49 (49) ; 1 (1) ; 38 (38) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT ; ;
-; |WF68901IP_TOP_SOC:I_MFP| ; 1261 (110) ; 460 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 797 (107) ; 70 (0) ; 394 (71) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP ; ;
-; |WF68901IP_GPIO:I_GPIO| ; 49 (49) ; 24 (24) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 23 (23) ; 9 (9) ; 17 (17) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO ; ;
-; |WF68901IP_INTERRUPTS:I_INTERRUPTS| ; 290 (290) ; 128 (128) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 159 (159) ; 5 (5) ; 126 (126) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS ; ;
-; |WF68901IP_TIMERS:I_TIMERS| ; 501 (501) ; 166 (166) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 332 (332) ; 44 (44) ; 125 (125) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS ; ;
-; |WF68901IP_USART_TOP:I_USART| ; 316 (3) ; 140 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 176 (3) ; 12 (0) ; 128 (1) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART ; ;
-; |WF68901IP_USART_CTRL:I_USART_CTRL| ; 77 (77) ; 49 (49) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 28 (28) ; 9 (9) ; 40 (40) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL ; ;
-; |WF68901IP_USART_RX:I_USART_RECEIVE| ; 160 (160) ; 56 (56) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 100 (100) ; 2 (2) ; 58 (58) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE ; ;
-; |WF68901IP_USART_TX:I_USART_TRANSMIT| ; 87 (87) ; 35 (35) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 45 (45) ; 1 (1) ; 41 (41) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT ; ;
-; |dcfifo0:RDF| ; 156 (0) ; 124 (0) ; 0 (0) ; 8192 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 30 (0) ; 60 (0) ; 66 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF ; ;
-; |dcfifo_mixed_widths:dcfifo_mixed_widths_component| ; 156 (0) ; 124 (0) ; 0 (0) ; 8192 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 30 (0) ; 60 (0) ; 66 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component ; ;
-; |dcfifo_0hh1:auto_generated| ; 156 (55) ; 124 (42) ; 0 (0) ; 8192 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 30 (4) ; 60 (27) ; 66 (13) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated ; ;
-; |a_gray2bin_lfb:wrptr_g_gray2bin| ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 7 (7) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_gray2bin_lfb:wrptr_g_gray2bin ; ;
-; |a_gray2bin_lfb:ws_dgrp_gray2bin| ; 8 (8) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 3 (3) ; 0 (0) ; 5 (5) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_gray2bin_lfb:ws_dgrp_gray2bin ; ;
-; |a_graycounter_fic:wrptr_g1p| ; 17 (17) ; 13 (13) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 3 (3) ; 1 (1) ; 13 (13) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p ; ;
-; |a_graycounter_k47:rdptr_g1p| ; 18 (18) ; 13 (13) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 1 (1) ; 12 (12) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p ; ;
-; |alt_synch_pipe_ikd:rs_dgwp| ; 18 (0) ; 18 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 14 (0) ; 4 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_ikd:rs_dgwp ; ;
-; |dffpipe_hd9:dffpipe12| ; 18 (18) ; 18 (18) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 14 (14) ; 4 (4) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_ikd:rs_dgwp|dffpipe_hd9:dffpipe12 ; ;
-; |alt_synch_pipe_jkd:ws_dgrp| ; 18 (0) ; 18 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 17 (0) ; 1 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp ; ;
-; |dffpipe_id9:dffpipe17| ; 18 (18) ; 18 (18) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 17 (17) ; 1 (1) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17 ; ;
-; |altsyncram_bi31:fifo_ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 8192 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram ; ;
-; |cmpr_156:rdempty_eq_comp1_msb| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 1 (1) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cmpr_156:rdempty_eq_comp1_msb ; ;
-; |cmpr_156:wrfull_eq_comp1_msb| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cmpr_156:wrfull_eq_comp1_msb ; ;
-; |cntr_t2e:cntr_b| ; 3 (3) ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 2 (2) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cntr_t2e:cntr_b ; ;
-; |dffpipe_gd9:ws_brp| ; 8 (8) ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 8 (8) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_gd9:ws_brp ; ;
-; |dffpipe_pe9:ws_bwp| ; 10 (10) ; 10 (10) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 10 (10) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_pe9:ws_bwp ; ;
-; |mux_a18:rdemp_eq_comp_lsb_mux| ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 3 (3) ; 0 (0) ; 4 (4) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|mux_a18:rdemp_eq_comp_lsb_mux ; ;
-; |mux_a18:rdemp_eq_comp_msb_mux| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 5 (5) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|mux_a18:rdemp_eq_comp_msb_mux ; ;
-; |mux_a18:wrfull_eq_comp_lsb_mux| ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 0 (0) ; 1 (1) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|mux_a18:wrfull_eq_comp_lsb_mux ; ;
-; |mux_a18:wrfull_eq_comp_msb_mux| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 1 (1) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|mux_a18:wrfull_eq_comp_msb_mux ; ;
-; |dcfifo1:WRF| ; 166 (0) ; 124 (0) ; 0 (0) ; 8192 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 42 (0) ; 70 (0) ; 54 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF ; ;
-; |dcfifo_mixed_widths:dcfifo_mixed_widths_component| ; 166 (0) ; 124 (0) ; 0 (0) ; 8192 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 42 (0) ; 70 (0) ; 54 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component ; ;
-; |dcfifo_3fh1:auto_generated| ; 166 (58) ; 124 (42) ; 0 (0) ; 8192 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 42 (6) ; 70 (34) ; 54 (12) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated ; ;
-; |a_gray2bin_lfb:rdptr_g_gray2bin| ; 8 (8) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 3 (3) ; 0 (0) ; 5 (5) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_gray2bin_lfb:rdptr_g_gray2bin ; ;
-; |a_gray2bin_lfb:rs_dgwp_gray2bin| ; 8 (8) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 4 (4) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_gray2bin_lfb:rs_dgwp_gray2bin ; ;
-; |a_graycounter_gic:wrptr_g1p| ; 17 (17) ; 13 (13) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 1 (1) ; 12 (12) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_gic:wrptr_g1p ; ;
-; |a_graycounter_j47:rdptr_g1p| ; 17 (17) ; 13 (13) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 1 (1) ; 12 (12) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p ; ;
-; |alt_synch_pipe_kkd:rs_dgwp| ; 18 (0) ; 18 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 15 (0) ; 3 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp ; ;
-; |dffpipe_jd9:dffpipe12| ; 18 (18) ; 18 (18) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 15 (15) ; 3 (3) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12 ; ;
-; |alt_synch_pipe_lkd:ws_dgrp| ; 18 (0) ; 18 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 16 (0) ; 2 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_lkd:ws_dgrp ; ;
-; |dffpipe_kd9:dffpipe15| ; 18 (18) ; 18 (18) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 16 (16) ; 2 (2) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_lkd:ws_dgrp|dffpipe_kd9:dffpipe15 ; ;
-; |altsyncram_ci31:fifo_ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 8192 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram ; ;
-; |cmpr_156:rdempty_eq_comp1_msb| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 1 (1) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|cmpr_156:rdempty_eq_comp1_msb ; ;
-; |cntr_t2e:cntr_b| ; 4 (4) ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 2 (2) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|cntr_t2e:cntr_b ; ;
-; |dffpipe_gd9:rs_bwp| ; 8 (8) ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 2 (2) ; 6 (6) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_gd9:rs_bwp ; ;
-; |dffpipe_pe9:rs_brp| ; 10 (10) ; 10 (10) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 9 (9) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_pe9:rs_brp ; ;
-; |mux_a18:rdemp_eq_comp_lsb_mux| ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 0 (0) ; 1 (1) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|mux_a18:rdemp_eq_comp_lsb_mux ; ;
-; |mux_a18:rdemp_eq_comp_msb_mux| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 3 (3) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|mux_a18:rdemp_eq_comp_msb_mux ; ;
-; |mux_a18:wrfull_eq_comp_lsb_mux| ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 2 (2) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|mux_a18:wrfull_eq_comp_lsb_mux ; ;
-; |mux_a18:wrfull_eq_comp_msb_mux| ; 6 (6) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 0 (0) ; 0 (0) ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|mux_a18:wrfull_eq_comp_msb_mux ; ;
-; |Video:Fredi_Aschwanden| ; 4088 (14) ; 2168 (4) ; 0 (0) ; 92816 ; 20 ; 6 ; 0 ; 3 ; 0 ; 0 ; 1920 (10) ; 916 (4) ; 1252 (0) ; |firebee1|Video:Fredi_Aschwanden ; ;
-; |DDR_CTR:DDR_CTR| ; 374 (342) ; 158 (158) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 211 (180) ; 20 (20) ; 143 (140) ; |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR ; ;
-; |lpm_bustri_BYT:$00002| ; 3 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 3 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00002 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 3 (3) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 3 (3) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_bustri_BYT:$00004| ; 31 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 28 (0) ; 0 (0) ; 3 (0) ; |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00004 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 31 (31) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 28 (28) ; 0 (0) ; 3 (3) ; |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component ; ;
-; |VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR| ; 1420 (1292) ; 529 (529) ; 0 (0) ; 0 ; 0 ; 6 ; 0 ; 3 ; 0 ; 0 ; 891 (763) ; 158 (158) ; 371 (252) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR ; ;
-; |lpm_bustri_WORD:$00000| ; 187 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 112 (0) ; 0 (0) ; 75 (0) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 187 (187) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 112 (112) ; 0 (0) ; 75 (75) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_bustri_WORD:$00002| ; 60 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 16 (0) ; 0 (0) ; 44 (0) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00002 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 60 (60) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 16 (16) ; 0 (0) ; 44 (44) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00002|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_mult:op_12| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_12 ; ;
-; |mult_aat:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_12|mult_aat:auto_generated ; ;
-; |lpm_mult:op_14| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14 ; ;
-; |mult_cat:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14|mult_cat:auto_generated ; ;
-; |lpm_mult:op_6| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6 ; ;
-; |mult_aat:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6|mult_aat:auto_generated ; ;
-; |altddio_bidir0:inst1| ; 96 (0) ; 96 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 96 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altddio_bidir0:inst1 ; ;
-; |altddio_bidir:altddio_bidir_component| ; 96 (0) ; 96 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 96 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component ; ;
-; |ddio_bidir_3jl:auto_generated| ; 96 (96) ; 96 (96) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 96 (96) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated ; ;
-; |altddio_out0:inst2| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altddio_out0:inst2 ; ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component ; ;
-; |ddio_out_are:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated ; ;
-; |altddio_out2:inst5| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altddio_out2:inst5 ; ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component ; ;
-; |ddio_out_o2f:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component|ddio_out_o2f:auto_generated ; ;
-; |altdpram0:ST_CLUT_BLUE| ; 0 (0) ; 0 (0) ; 0 (0) ; 48 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 48 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component ; ;
-; |altsyncram_rb92:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 48 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated ; ;
-; |altdpram0:ST_CLUT_GREEN| ; 0 (0) ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component ; ;
-; |altsyncram_rb92:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated ; ;
-; |altdpram0:ST_CLUT_RED| ; 0 (0) ; 0 (0) ; 0 (0) ; 48 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 48 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component ; ;
-; |altsyncram_rb92:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 48 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated ; ;
-; |altdpram1:FALCON_CLUT_BLUE| ; 0 (0) ; 0 (0) ; 0 (0) ; 1536 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 1536 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component ; ;
-; |altsyncram_lf92:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 1536 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated ; ;
-; |altdpram1:FALCON_CLUT_GREEN| ; 0 (0) ; 0 (0) ; 0 (0) ; 1536 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 1536 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component ; ;
-; |altsyncram_lf92:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 1536 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated ; ;
-; |altdpram1:FALCON_CLUT_RED| ; 0 (0) ; 0 (0) ; 0 (0) ; 1536 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 1536 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component ; ;
-; |altsyncram_lf92:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 1536 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated ; ;
-; |altdpram2:ACP_CLUT_RAM54| ; 0 (0) ; 0 (0) ; 0 (0) ; 2048 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54 ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 2048 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component ; ;
-; |altsyncram_pf92:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 2048 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated ; ;
-; |altdpram2:ACP_CLUT_RAM55| ; 0 (0) ; 0 (0) ; 0 (0) ; 2048 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55 ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 2048 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component ; ;
-; |altsyncram_pf92:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 2048 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated ; ;
-; |altdpram2:ACP_CLUT_RAM| ; 0 (0) ; 0 (0) ; 0 (0) ; 2048 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 2048 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component ; ;
-; |altsyncram_pf92:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 2048 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated ; ;
-; |lpm_bustri_LONG:inst119| ; 5 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 5 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_bustri_LONG:inst119 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 5 (5) ; |firebee1|Video:Fredi_Aschwanden|lpm_bustri_LONG:inst119|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_ff0:inst13| ; 32 (0) ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 9 (0) ; 23 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst13 ; ;
-; |lpm_ff:lpm_ff_component| ; 32 (32) ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 9 (9) ; 23 (23) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst14| ; 32 (0) ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (0) ; 31 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst14 ; ;
-; |lpm_ff:lpm_ff_component| ; 32 (32) ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 31 (31) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst15| ; 32 (0) ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 25 (0) ; 7 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst15 ; ;
-; |lpm_ff:lpm_ff_component| ; 32 (32) ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 25 (25) ; 7 (7) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst16| ; 28 (0) ; 28 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 26 (0) ; 2 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst16 ; ;
-; |lpm_ff:lpm_ff_component| ; 28 (28) ; 28 (28) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 26 (26) ; 2 (2) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst17| ; 32 (0) ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 31 (0) ; 1 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst17 ; ;
-; |lpm_ff:lpm_ff_component| ; 32 (32) ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 31 (31) ; 1 (1) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst18| ; 32 (0) ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 2 (0) ; 30 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst18 ; ;
-; |lpm_ff:lpm_ff_component| ; 32 (32) ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 2 (2) ; 30 (30) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst18|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst19| ; 32 (0) ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 32 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst19 ; ;
-; |lpm_ff:lpm_ff_component| ; 32 (32) ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 32 (32) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst19|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff1:inst12| ; 32 (0) ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 30 (0) ; 2 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst12 ; ;
-; |lpm_ff:lpm_ff_component| ; 32 (32) ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 30 (30) ; 2 (2) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff1:inst20| ; 32 (0) ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 28 (0) ; 4 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst20 ; ;
-; |lpm_ff:lpm_ff_component| ; 32 (32) ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 28 (28) ; 4 (4) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff1:inst3| ; 32 (0) ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 32 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst3 ; ;
-; |lpm_ff:lpm_ff_component| ; 32 (32) ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 32 (32) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff1:inst4| ; 32 (0) ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 26 (0) ; 6 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst4 ; ;
-; |lpm_ff:lpm_ff_component| ; 32 (32) ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 26 (26) ; 6 (6) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff1:inst9| ; 24 (0) ; 24 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 12 (0) ; 12 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst9 ; ;
-; |lpm_ff:lpm_ff_component| ; 24 (24) ; 24 (24) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 12 (12) ; 12 (12) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff3:inst46| ; 18 (0) ; 18 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 18 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst46 ; ;
-; |lpm_ff:lpm_ff_component| ; 18 (18) ; 18 (18) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 18 (18) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff3:inst47| ; 18 (0) ; 18 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 18 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst47 ; ;
-; |lpm_ff:lpm_ff_component| ; 18 (18) ; 18 (18) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 18 (18) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff3:inst49| ; 9 (0) ; 9 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 9 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst49 ; ;
-; |lpm_ff:lpm_ff_component| ; 9 (9) ; 9 (9) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 9 (9) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff3:inst52| ; 9 (0) ; 9 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 9 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst52 ; ;
-; |lpm_ff:lpm_ff_component| ; 9 (9) ; 9 (9) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 9 (9) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff4:inst10| ; 16 (0) ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 12 (0) ; 4 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff4:inst10 ; ;
-; |lpm_ff:lpm_ff_component| ; 16 (16) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 12 (12) ; 4 (4) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff5:inst11| ; 8 (0) ; 8 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 8 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff5:inst11 ; ;
-; |lpm_ff:lpm_ff_component| ; 8 (8) ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 8 (8) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff5:inst11|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff5:inst97| ; 5 (0) ; 5 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 5 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff5:inst97 ; ;
-; |lpm_ff:lpm_ff_component| ; 5 (5) ; 5 (5) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 5 (5) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff6:inst71| ; 128 (0) ; 128 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 87 (0) ; 41 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff6:inst71 ; ;
-; |lpm_ff:lpm_ff_component| ; 128 (128) ; 128 (128) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 87 (87) ; 41 (41) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff6:inst94| ; 128 (0) ; 128 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 85 (0) ; 43 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff6:inst94 ; ;
-; |lpm_ff:lpm_ff_component| ; 128 (128) ; 128 (128) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 85 (85) ; 43 (43) ; |firebee1|Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component ; ;
-; |lpm_fifoDZ:inst63| ; 22 (0) ; 21 (0) ; 0 (0) ; 16384 ; 4 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (0) ; 0 (0) ; 21 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63 ; ;
-; |scfifo:scfifo_component| ; 22 (0) ; 21 (0) ; 0 (0) ; 16384 ; 4 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (0) ; 0 (0) ; 21 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component ; ;
-; |scfifo_lk21:auto_generated| ; 22 (0) ; 21 (0) ; 0 (0) ; 16384 ; 4 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (0) ; 0 (0) ; 21 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated ; ;
-; |a_dpfifo_oq21:dpfifo| ; 22 (9) ; 21 (8) ; 0 (0) ; 16384 ; 4 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 21 (8) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo ; ;
-; |altsyncram_gj81:FIFOram| ; 0 (0) ; 0 (0) ; 0 (0) ; 16384 ; 4 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram ; ;
-; |cntr_omb:rd_ptr_msb| ; 6 (6) ; 6 (6) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 6 (6) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb ; ;
-; |cntr_pmb:wr_ptr| ; 7 (7) ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 7 (7) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr ; ;
-; |lpm_fifo_dc0:inst| ; 118 (0) ; 98 (0) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 20 (0) ; 51 (0) ; 47 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst ; ;
-; |dcfifo:dcfifo_component| ; 118 (0) ; 98 (0) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 20 (0) ; 51 (0) ; 47 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component ; ;
-; |dcfifo_8fi1:auto_generated| ; 118 (31) ; 98 (20) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 20 (2) ; 51 (16) ; 47 (10) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated ; ;
-; |a_gray2bin_tgb:wrptr_g_gray2bin| ; 9 (9) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 0 (0) ; 3 (3) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_gray2bin_tgb:wrptr_g_gray2bin ; ;
-; |a_gray2bin_tgb:ws_dgrp_gray2bin| ; 9 (9) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 3 (3) ; 0 (0) ; 6 (6) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_gray2bin_tgb:ws_dgrp_gray2bin ; ;
-; |a_graycounter_njc:wrptr_gp| ; 18 (18) ; 14 (14) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 1 (1) ; 13 (13) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp ; ;
-; |a_graycounter_s57:rdptr_g1p| ; 20 (20) ; 14 (14) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 1 (1) ; 14 (14) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p ; ;
-; |alt_synch_pipe_sld:ws_dgrp| ; 30 (0) ; 30 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 30 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp ; ;
-; |dffpipe_re9:dffpipe22| ; 30 (30) ; 30 (30) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 30 (30) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22 ; ;
-; |altsyncram_tl31:fifo_ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram ; ;
-; |dffpipe_9d9:wraclr| ; 2 (2) ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 1 (1) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_9d9:wraclr ; ;
-; |dffpipe_oe9:ws_brp| ; 9 (9) ; 9 (9) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 9 (9) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp ; ;
-; |dffpipe_oe9:ws_bwp| ; 9 (9) ; 9 (9) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 2 (2) ; 7 (7) ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp ; ;
-; |lpm_latch0:inst27| ; 32 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 31 (0) ; 0 (0) ; 1 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_latch0:inst27 ; ;
-; |lpm_latch:lpm_latch_component| ; 32 (32) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 31 (31) ; 0 (0) ; 1 (1) ; |firebee1|Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component ; ;
-; |lpm_mux0:inst21| ; 120 (0) ; 96 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 22 (0) ; 71 (0) ; 27 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux0:inst21 ; ;
-; |lpm_mux:lpm_mux_component| ; 120 (0) ; 96 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 22 (0) ; 71 (0) ; 27 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component ; ;
-; |mux_gpe:auto_generated| ; 120 (120) ; 96 (96) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 22 (22) ; 71 (71) ; 27 (27) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated ; ;
-; |lpm_mux1:inst24| ; 113 (0) ; 81 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 32 (0) ; 33 (0) ; 48 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux1:inst24 ; ;
-; |lpm_mux:lpm_mux_component| ; 113 (0) ; 81 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 32 (0) ; 33 (0) ; 48 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component ; ;
-; |mux_npe:auto_generated| ; 113 (113) ; 81 (81) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 32 (32) ; 33 (33) ; 48 (48) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated ; ;
-; |lpm_mux2:inst25| ; 81 (0) ; 41 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 40 (0) ; 1 (0) ; 40 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux2:inst25 ; ;
-; |lpm_mux:lpm_mux_component| ; 81 (0) ; 41 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 40 (0) ; 1 (0) ; 40 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component ; ;
-; |mux_mpe:auto_generated| ; 81 (81) ; 41 (41) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 40 (40) ; 1 (1) ; 40 (40) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated ; ;
-; |lpm_mux3:inst102| ; 1 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 1 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux3:inst102 ; ;
-; |lpm_mux:lpm_mux_component| ; 1 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 1 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux3:inst102|lpm_mux:lpm_mux_component ; ;
-; |mux_96e:auto_generated| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 1 (1) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux3:inst102|lpm_mux:lpm_mux_component|mux_96e:auto_generated ; ;
-; |lpm_mux4:inst81| ; 7 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 7 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux4:inst81 ; ;
-; |lpm_mux:lpm_mux_component| ; 7 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 7 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux4:inst81|lpm_mux:lpm_mux_component ; ;
-; |mux_f6e:auto_generated| ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 7 (7) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux4:inst81|lpm_mux:lpm_mux_component|mux_f6e:auto_generated ; ;
-; |lpm_mux5:inst22| ; 64 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (0) ; 0 (0) ; 60 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux5:inst22 ; ;
-; |lpm_mux:lpm_mux_component| ; 64 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (0) ; 0 (0) ; 60 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux5:inst22|lpm_mux:lpm_mux_component ; ;
-; |mux_58e:auto_generated| ; 64 (64) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 60 (60) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux5:inst22|lpm_mux:lpm_mux_component|mux_58e:auto_generated ; ;
-; |lpm_mux6:inst7| ; 91 (0) ; 67 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 8 (0) ; 1 (0) ; 82 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux6:inst7 ; ;
-; |lpm_mux:lpm_mux_component| ; 91 (0) ; 67 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 8 (0) ; 1 (0) ; 82 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component ; ;
-; |mux_kpe:auto_generated| ; 91 (91) ; 67 (67) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 8 (8) ; 1 (1) ; 82 (82) ; |firebee1|Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated ; ;
-; |lpm_muxDZ:inst62| ; 128 (0) ; 128 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 128 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_muxDZ:inst62 ; ;
-; |lpm_mux:lpm_mux_component| ; 128 (0) ; 128 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 128 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component ; ;
-; |mux_dcf:auto_generated| ; 128 (128) ; 128 (128) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 128 (128) ; |firebee1|Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated ; ;
-; |lpm_muxVDM:inst100| ; 736 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 640 (0) ; 0 (0) ; 96 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_muxVDM:inst100 ; ;
-; |lpm_mux:lpm_mux_component| ; 736 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 640 (0) ; 0 (0) ; 96 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_muxVDM:inst100|lpm_mux:lpm_mux_component ; ;
-; |mux_bbe:auto_generated| ; 736 (736) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 640 (640) ; 0 (0) ; 96 (96) ; |firebee1|Video:Fredi_Aschwanden|lpm_muxVDM:inst100|lpm_mux:lpm_mux_component|mux_bbe:auto_generated ; ;
-; |lpm_shiftreg0:sr0| ; 16 (0) ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (0) ; 15 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr0 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 16 (16) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 15 (15) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr1| ; 16 (0) ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (0) ; 15 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr1 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 16 (16) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 15 (15) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr2| ; 16 (0) ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (0) ; 15 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr2 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 16 (16) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 15 (15) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr3| ; 17 (0) ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 2 (0) ; 15 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr3 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 17 (17) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 2 (2) ; 15 (15) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr4| ; 16 (0) ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (0) ; 15 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr4 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 16 (16) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 15 (15) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr5| ; 16 (0) ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (0) ; 15 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr5 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 16 (16) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 15 (15) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr6| ; 16 (0) ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 16 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr6 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 16 (16) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 16 (16) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr7| ; 16 (0) ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 16 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr7 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 16 (16) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 16 (16) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg4:inst26| ; 5 (0) ; 5 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 5 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg4:inst26 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 5 (5) ; 5 (5) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 5 (5) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg6:inst92| ; 5 (0) ; 5 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 4 (0) ; 1 (0) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg6:inst92 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 5 (5) ; 5 (5) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 4 (4) ; 1 (1) ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |mux41:inst40| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|mux41:inst40 ; ;
-; |mux41:inst41| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|mux41:inst41 ; ;
-; |mux41:inst42| ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|mux41:inst42 ; ;
-; |mux41:inst43| ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|mux41:inst43 ; ;
-; |mux41:inst44| ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|mux41:inst44 ; ;
-; |mux41:inst45| ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 0 (0) ; |firebee1|Video:Fredi_Aschwanden|mux41:inst45 ; ;
-; |altddio_out3:inst5| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst5 ; ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst5|altddio_out:altddio_out_component ; ;
-; |ddio_out_31f:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ; ;
-; |altddio_out3:inst6| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst6 ; ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst6|altddio_out:altddio_out_component ; ;
-; |ddio_out_31f:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst6|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ; ;
-; |altddio_out3:inst8| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst8 ; ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst8|altddio_out:altddio_out_component ; ;
-; |ddio_out_31f:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst8|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ; ;
-; |altddio_out3:inst9| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst9 ; work ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst9|altddio_out:altddio_out_component ; work ;
-; |ddio_out_31f:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altddio_out3:inst9|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ; work ;
-; |altpll1:inst| ; 1 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll1:inst ; ;
-; |altpll:altpll_component| ; 1 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll1:inst|altpll:altpll_component ; ;
-; |altpll_pul2:auto_generated| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |firebee1|altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated ; ;
-; |altpll2:inst12| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll2:inst12 ; ;
-; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll2:inst12|altpll:altpll_component ; ;
-; |altpll_isv2:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated ; ;
-; |altpll3:inst13| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll3:inst13 ; ;
-; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll3:inst13|altpll:altpll_component ; ;
-; |altpll_41p2:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated ; ;
-; |altpll4:inst22| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll4:inst22 ; ;
-; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll4:inst22|altpll:altpll_component ; ;
-; |altpll_c6j2:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated ; ;
-; |altpll_reconfig1:inst7| ; 334 (0) ; 128 (0) ; 0 (0) ; 144 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 206 (0) ; 22 (0) ; 106 (0) ; |firebee1|altpll_reconfig1:inst7 ; ;
-; |altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component| ; 334 (237) ; 128 (80) ; 0 (0) ; 144 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 206 (157) ; 22 (22) ; 106 (57) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component ; ;
-; |altsyncram:altsyncram4| ; 0 (0) ; 0 (0) ; 0 (0) ; 144 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4 ; ;
-; |altsyncram_46r:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 144 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4|altsyncram_46r:auto_generated ; ;
-; |lpm_compare:cmpr7| ; 3 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (0) ; 0 (0) ; 1 (0) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7 ; ;
-; |cmpr_tnd:auto_generated| ; 3 (3) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 1 (1) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated ; ;
-; |lpm_counter:cntr12| ; 10 (0) ; 8 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (0) ; 0 (0) ; 8 (0) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12 ; ;
-; |cntr_30l:auto_generated| ; 10 (10) ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 8 (8) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated ; ;
-; |lpm_counter:cntr13| ; 7 (0) ; 6 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (0) ; 0 (0) ; 6 (0) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13 ; ;
-; |cntr_qij:auto_generated| ; 7 (7) ; 6 (6) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 6 (6) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13|cntr_qij:auto_generated ; ;
-; |lpm_counter:cntr14| ; 5 (0) ; 5 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 5 (0) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14 ; ;
-; |cntr_pij:auto_generated| ; 5 (5) ; 5 (5) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 5 (5) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14|cntr_pij:auto_generated ; ;
-; |lpm_counter:cntr15| ; 18 (0) ; 8 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 10 (0) ; 0 (0) ; 8 (0) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15 ; ;
-; |cntr_30l:auto_generated| ; 18 (18) ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 10 (10) ; 0 (0) ; 8 (8) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated ; ;
-; |lpm_counter:cntr1| ; 41 (0) ; 8 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 33 (0) ; 0 (0) ; 8 (0) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1 ; ;
-; |cntr_30l:auto_generated| ; 41 (41) ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 33 (33) ; 0 (0) ; 8 (8) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated ; ;
-; |lpm_counter:cntr2| ; 9 (0) ; 8 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (0) ; 0 (0) ; 8 (0) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2 ; ;
-; |cntr_9cj:auto_generated| ; 9 (9) ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 8 (8) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated ; ;
-; |lpm_counter:cntr3| ; 5 (0) ; 5 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 5 (0) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3 ; ;
-; |cntr_pij:auto_generated| ; 5 (5) ; 5 (5) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 5 (5) ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3|cntr_pij:auto_generated ; ;
-; |interrupt_handler:nobody| ; 1037 (999) ; 633 (633) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 401 (363) ; 235 (235) ; 401 (355) ; |firebee1|interrupt_handler:nobody ; ;
-; |lpm_bustri_BYT:$00000| ; 14 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (0) ; 0 (0) ; 9 (0) ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00000 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 14 (14) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 9 (9) ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00000|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_bustri_BYT:$00002| ; 24 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 16 (0) ; 0 (0) ; 8 (0) ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00002 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 24 (24) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 16 (16) ; 0 (0) ; 8 (8) ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_bustri_BYT:$00004| ; 24 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 10 (0) ; 0 (0) ; 14 (0) ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00004 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 24 (24) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 10 (10) ; 0 (0) ; 14 (14) ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_bustri_BYT:$00006| ; 22 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (0) ; 0 (0) ; 15 (0) ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00006 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 22 (22) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 0 (0) ; 15 (15) ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00006|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_counter0:inst18| ; 19 (0) ; 18 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (0) ; 1 (0) ; 17 (0) ; |firebee1|lpm_counter0:inst18 ; ;
-; |lpm_counter:lpm_counter_component| ; 19 (0) ; 18 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (0) ; 1 (0) ; 17 (0) ; |firebee1|lpm_counter0:inst18|lpm_counter:lpm_counter_component ; ;
-; |cntr_mph:auto_generated| ; 19 (19) ; 18 (18) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 1 (1) ; 17 (17) ; |firebee1|lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated ; ;
-; |lpm_ff0:inst1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|lpm_ff0:inst1 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |firebee1|lpm_ff0:inst1|lpm_ff:lpm_ff_component ; ;
-+-----------------------------------------------------------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
-Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
-
-
-+---------------------------------------------------------------------------------------------------------+
-; Delay Chain Summary ;
-+----------------+----------+---------------+---------------+-----------------------+----------+----------+
-; Name ; Pin Type ; Pad to Core 0 ; Pad to Core 1 ; Pad to Input Register ; TCO ; TCOE ;
-+----------------+----------+---------------+---------------+-----------------------+----------+----------+
-; CLK24M576 ; Output ; -- ; -- ; -- ; -- ; -- ;
-; LP_STR ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; nFB_BURST ; Input ; -- ; -- ; -- ; -- ; -- ;
-; nACSI_DRQ ; Input ; -- ; -- ; -- ; -- ; -- ;
-; nACSI_INT ; Input ; -- ; -- ; -- ; -- ; -- ;
-; nSCSI_DRQ ; Input ; -- ; -- ; -- ; -- ; -- ;
-; nSCSI_MSG ; Input ; -- ; -- ; -- ; -- ; -- ;
-; nDCHG ; Input ; -- ; -- ; -- ; -- ; -- ;
-; SD_DATA0 ; Input ; -- ; -- ; -- ; -- ; -- ;
-; SD_DATA1 ; Input ; -- ; -- ; -- ; -- ; -- ;
-; SD_DATA2 ; Input ; -- ; -- ; -- ; -- ; -- ;
-; SD_CARD_DEDECT ; Input ; -- ; -- ; -- ; -- ; -- ;
-; SD_WP ; Input ; -- ; -- ; -- ; -- ; -- ;
-; nDACK0 ; Input ; -- ; -- ; -- ; -- ; -- ;
-; WP_CF_CARD ; Input ; -- ; -- ; -- ; -- ; -- ;
-; nSCSI_C_D ; Input ; -- ; -- ; -- ; -- ; -- ;
-; nSCSI_I_O ; Input ; -- ; -- ; -- ; -- ; -- ;
-; nFB_CS3 ; Input ; -- ; -- ; -- ; -- ; -- ;
-; CLK25M ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nACSI_ACK ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nACSI_RESET ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nACSI_CS ; Output ; -- ; -- ; -- ; -- ; -- ;
-; ACSI_DIR ; Output ; -- ; -- ; -- ; -- ; -- ;
-; ACSI_A1 ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nSCSI_ACK ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nSCSI_ATN ; Output ; -- ; -- ; -- ; -- ; -- ;
-; SCSI_DIR ; Output ; -- ; -- ; -- ; -- ; -- ;
-; MIDI_OLR ; Output ; -- ; -- ; -- ; -- ; -- ;
-; MIDI_TLR ; Output ; -- ; -- ; -- ; -- ; -- ;
-; TxD ; Output ; -- ; -- ; -- ; -- ; -- ;
-; RTS ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; DTR ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; AMKB_TX ; Output ; -- ; -- ; -- ; -- ; -- ;
-; IDE_RES ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nIDE_CS0 ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nIDE_CS1 ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nIDE_WR ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nIDE_RD ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; nCF_CS0 ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nCF_CS1 ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nROM3 ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nROM4 ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nRP_UDS ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nRP_LDS ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nSDSEL ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; nWR_GATE ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; nWR ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; YM_QA ; Output ; -- ; -- ; -- ; -- ; -- ;
-; YM_QB ; Output ; -- ; -- ; -- ; -- ; -- ;
-; YM_QC ; Output ; -- ; -- ; -- ; -- ; -- ;
-; SD_CLK ; Output ; -- ; -- ; -- ; -- ; -- ;
-; DSA_D ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; nVWE ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nVCAS ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nVRAS ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nVCS ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nPD_VGA ; Output ; -- ; -- ; -- ; -- ; -- ;
-; TIN0 ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nSRCS ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nSRBLE ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nSRBHE ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nSRWE ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nDREQ1 ; Output ; -- ; -- ; -- ; -- ; -- ;
-; LED_FPGA_OK ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nSROE ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VCKE ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nFB_TA ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nDDR_CLK ; Output ; -- ; -- ; -- ; -- ; -- ;
-; DDR_CLK ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VSYNC_PAD ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; HSYNC_PAD ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; nBLANK_PAD ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; PIXEL_CLK_PAD ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; nSYNC ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nMOT_ON ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; nSTEP_DIR ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; nSTEP ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; CLKUSB ; Output ; -- ; -- ; -- ; -- ; -- ;
-; LPDIR ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; BA[1] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; BA[0] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nIRQ[7] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nIRQ[6] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nIRQ[5] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nIRQ[4] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nIRQ[3] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; nIRQ[2] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[12] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[11] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[10] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[9] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[8] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[7] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[6] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[5] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[4] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[3] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[2] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[1] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VA[0] ; Output ; -- ; -- ; -- ; -- ; -- ;
-; VB[7] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VB[6] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VB[5] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VB[4] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VB[3] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VB[2] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VB[1] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VB[0] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VDM[3] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VDM[2] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VDM[1] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VDM[0] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VG[7] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VG[6] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VG[5] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VG[4] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VG[3] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VG[2] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VG[1] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VG[0] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VR[7] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VR[6] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VR[5] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VR[4] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VR[3] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VR[2] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VR[1] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; VR[0] ; Output ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; TOUT0 ; Input ; -- ; -- ; -- ; -- ; -- ;
-; nMASTER ; Input ; -- ; -- ; -- ; -- ; -- ;
-; FB_AD[31] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[30] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[29] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[28] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[27] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[26] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[25] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[24] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[23] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[22] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[21] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[20] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[19] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[18] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[17] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[16] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[15] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[14] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[13] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[12] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[11] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[10] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[9] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[8] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[7] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[6] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[5] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[4] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[3] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[2] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[1] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; FB_AD[0] ; Bidir ; -- ; (0) 0 ps ; (0) 0 ps ; -- ; -- ;
-; VD[31] ; Bidir ; (1) 634 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[30] ; Bidir ; (0) 0 ps ; (1) 634 ps ; -- ; (0) 0 ps ; -- ;
-; VD[29] ; Bidir ; (0) 0 ps ; (1) 634 ps ; -- ; (0) 0 ps ; -- ;
-; VD[28] ; Bidir ; (0) 0 ps ; (1) 634 ps ; -- ; (0) 0 ps ; -- ;
-; VD[27] ; Bidir ; (0) 0 ps ; (1) 634 ps ; -- ; (0) 0 ps ; -- ;
-; VD[26] ; Bidir ; -- ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[25] ; Bidir ; (1) 634 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[24] ; Bidir ; (0) 0 ps ; (1) 634 ps ; -- ; (0) 0 ps ; -- ;
-; VD[23] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; VD[22] ; Bidir ; (0) 0 ps ; (1) 634 ps ; -- ; (0) 0 ps ; -- ;
-; VD[21] ; Bidir ; (0) 0 ps ; (1) 634 ps ; -- ; (0) 0 ps ; -- ;
-; VD[20] ; Bidir ; (0) 0 ps ; (1) 634 ps ; -- ; (0) 0 ps ; -- ;
-; VD[19] ; Bidir ; (1) 634 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[18] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; VD[17] ; Bidir ; (0) 0 ps ; (1) 634 ps ; -- ; (0) 0 ps ; -- ;
-; VD[16] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; VD[15] ; Bidir ; (2) 952 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[14] ; Bidir ; -- ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[13] ; Bidir ; (2) 952 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[12] ; Bidir ; (2) 952 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[11] ; Bidir ; (0) 0 ps ; (2) 952 ps ; -- ; (0) 0 ps ; -- ;
-; VD[10] ; Bidir ; (2) 952 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[9] ; Bidir ; (2) 952 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[8] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; VD[7] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; VD[6] ; Bidir ; (2) 952 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[5] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; VD[4] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; VD[3] ; Bidir ; (0) 0 ps ; (2) 952 ps ; -- ; (0) 0 ps ; -- ;
-; VD[2] ; Bidir ; (0) 0 ps ; (2) 952 ps ; -- ; (0) 0 ps ; -- ;
-; VD[1] ; Bidir ; (2) 952 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VD[0] ; Bidir ; (2) 952 ps ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; VDQS[3] ; Bidir ; -- ; -- ; -- ; -- ; (0) 0 ps ;
-; VDQS[2] ; Bidir ; -- ; -- ; -- ; -- ; (0) 0 ps ;
-; VDQS[1] ; Bidir ; -- ; -- ; -- ; -- ; (0) 0 ps ;
-; VDQS[0] ; Bidir ; -- ; -- ; -- ; -- ; (0) 0 ps ;
-; IO[17] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[16] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[15] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[14] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[13] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[12] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[11] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[10] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[9] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[8] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[7] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[6] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[5] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[4] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[3] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[2] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[1] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; IO[0] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; SRD[15] ; Bidir ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; SRD[14] ; Bidir ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; SRD[13] ; Bidir ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; SRD[12] ; Bidir ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; SRD[11] ; Bidir ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; SRD[10] ; Bidir ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; SRD[9] ; Bidir ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; SRD[8] ; Bidir ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; SRD[7] ; Bidir ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; SRD[6] ; Bidir ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; SRD[5] ; Bidir ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; SRD[4] ; Bidir ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; SRD[3] ; Bidir ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; SRD[2] ; Bidir ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; SRD[1] ; Bidir ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; SRD[0] ; Bidir ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; SCSI_PAR ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; nSCSI_SEL ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; nSCSI_BUSY ; Bidir ; -- ; -- ; -- ; (0) 0 ps ; -- ;
-; nSCSI_RST ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; SD_CD_DATA3 ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; SD_CMD_D1 ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; ACSI_D[7] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; ACSI_D[6] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; ACSI_D[5] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; ACSI_D[4] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; ACSI_D[3] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; ACSI_D[2] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; ACSI_D[1] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; ACSI_D[0] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; LP_D[7] ; Bidir ; -- ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; LP_D[6] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; LP_D[5] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; LP_D[4] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; LP_D[3] ; Bidir ; -- ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; LP_D[2] ; Bidir ; -- ; (0) 0 ps ; -- ; (0) 0 ps ; -- ;
-; LP_D[1] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; LP_D[0] ; Bidir ; (0) 0 ps ; -- ; -- ; (0) 0 ps ; -- ;
-; SCSI_D[7] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; SCSI_D[6] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; SCSI_D[5] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; SCSI_D[4] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; SCSI_D[3] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; SCSI_D[2] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; SCSI_D[1] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; SCSI_D[0] ; Bidir ; -- ; -- ; -- ; -- ; -- ;
-; nRSTO_MCF ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; nFB_WR ; Input ; (0) 0 ps ; (0) 0 ps ; -- ; -- ; -- ;
-; nFB_CS1 ; Input ; (0) 0 ps ; (0) 0 ps ; -- ; -- ; -- ;
-; FB_SIZE1 ; Input ; (0) 0 ps ; (0) 0 ps ; -- ; -- ; -- ;
-; FB_SIZE0 ; Input ; (0) 0 ps ; (0) 0 ps ; -- ; -- ; -- ;
-; FB_ALE ; Input ; (0) 0 ps ; (0) 0 ps ; -- ; -- ; -- ;
-; nFB_CS2 ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; MAIN_CLK ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; nDACK1 ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; nFB_OE ; Input ; (0) 0 ps ; (0) 0 ps ; -- ; -- ; -- ;
-; IDE_RDY ; Input ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; CLK33M ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; HD_DD ; Input ; (0) 0 ps ; (0) 0 ps ; -- ; -- ; -- ;
-; nINDEX ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; RxD ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; nWP ; Input ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; LP_BUSY ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; DCD ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; CTS ; Input ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; TRACK00 ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; IDE_INT ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; RI ; Input ; -- ; (0) 0 ps ; -- ; -- ; -- ;
-; nPCI_INTD ; Input ; (6) 2223 ps ; (0) 0 ps ; -- ; -- ; -- ;
-; nPCI_INTC ; Input ; (0) 0 ps ; (6) 2223 ps ; -- ; -- ; -- ;
-; nPCI_INTB ; Input ; (6) 2223 ps ; (0) 0 ps ; -- ; -- ; -- ;
-; nPCI_INTA ; Input ; (0) 0 ps ; (6) 2223 ps ; -- ; -- ; -- ;
-; DVI_INT ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; E0_INT ; Input ; (0) 0 ps ; -- ; -- ; -- ; -- ;
-; PIC_INT ; Input ; (0) 0 ps ; (6) 2223 ps ; -- ; -- ; -- ;
-; PIC_AMKB_RX ; Input ; (1) 663 ps ; -- ; -- ; -- ; -- ;
-; MIDI_IN ; Input ; -- ; (1) 634 ps ; -- ; -- ; -- ;
-; nRD_DATA ; Input ; -- ; -- ; (0) 0 ps ; -- ; -- ;
-; AMKB_RX ; Input ; (0) 0 ps ; (0) 0 ps ; -- ; -- ; -- ;
-+----------------+----------+---------------+---------------+-----------------------+----------+----------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Pad To Core Delay Chain Fanout ;
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+---------+
-; Source Pin / Fanout ; Pad To Core Index ; Setting ;
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+---------+
-; nFB_BURST ; ; ;
-; nACSI_DRQ ; ; ;
-; nACSI_INT ; ; ;
-; nSCSI_DRQ ; ; ;
-; nSCSI_MSG ; ; ;
-; nDCHG ; ; ;
-; SD_DATA0 ; ; ;
-; SD_DATA1 ; ; ;
-; SD_DATA2 ; ; ;
-; SD_CARD_DEDECT ; ; ;
-; SD_WP ; ; ;
-; nDACK0 ; ; ;
-; WP_CF_CARD ; ; ;
-; nSCSI_C_D ; ; ;
-; nSCSI_I_O ; ; ;
-; nFB_CS3 ; ; ;
-; TOUT0 ; ; ;
-; nMASTER ; ; ;
-; FB_AD[31] ; ; ;
-; - SRD[15]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[7] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[31] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_SEL ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADDRESSLATCH~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[31]~32 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[15] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[31] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[31] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[15] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[31] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[31] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[15] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~3 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~3 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[31] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2_RESYN20 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10]~5_RESYN28 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[31]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[15]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[31]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[31]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[31]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[30] ; ; ;
-; - SRD[14]~output ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[30] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_SEL ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~5 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[30] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADDRESSLATCH~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[30]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[14] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[14] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[30] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[30] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[14] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[30] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[30] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG~7 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~5 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[30] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[30] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2_RESYN22 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10]~5_RESYN28 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[30]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[14]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[30]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[6]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[6]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[29] ; ; ;
-; - SRD[13]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[5] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[29] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[29] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADDRESSLATCH~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[29]~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[13] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[13] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[29] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[29] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[13] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[29] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[29] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~9 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~8 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2_RESYN20 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[5]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[29]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[13]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[29]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[5]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[29]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[29]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[28] ; ; ;
-; - SRD[12]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_A[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_B[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_C[4] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[28] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|NOISE_FREQ[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADDRESSLATCH~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[28]~3 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[12] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[12] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[28] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[28] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[28] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[28] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[12] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~6 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[28] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[28] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2_RESYN20 ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[28]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[4]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[4]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[12]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[28]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[28]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[28]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[27] ; ; ;
-; - SRD[11]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_A[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_B[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_C[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADR_I[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[11] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|NOISE_FREQ[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_SHAPE[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[11] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[27]~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[27] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[27] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[27] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[27] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[27] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[27] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~9 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[27] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[27] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[27] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2_RESYN20 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[11]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[3]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[3]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[11]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[27]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[11]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[11]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[27]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[27]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[26] ; ; ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - SRD[10]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_A[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_B[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[2] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[26] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[12]~53 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADR_I[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|NOISE_FREQ[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_SHAPE[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[10] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[10] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[26]~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG~3 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[2] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[26] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[26] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[26] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[26] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[10] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~7 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~7 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~3 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[26] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[26] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[26] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_X_D[2]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[10]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[26]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[26]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[26]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[10]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[10]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[10]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_C[2]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[10]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[10]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[26]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; FB_AD[25] ; ; ;
-; - SRD[9]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_A[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_B[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_C[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[11]~55 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADR_I[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|NOISE_FREQ[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_SHAPE[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[9] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[9] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[25]~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WDC_BSL[1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[25] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[25] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[25] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[25] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ST_SHIFT_MODE[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~3 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[25] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[25] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[25]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[25]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[9]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[9]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_X_D[1]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[9]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[25]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[9]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[25]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[9]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[25]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[9]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[25]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; FB_AD[24] ; ; ;
-; - Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[7]~22 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - SRD[8]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_A[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_B[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_C[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[10]~58 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADR_I[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[8] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|NOISE_FREQ[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_SHAPE[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[8] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[24]~7 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[0] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[24] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[24] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[24] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ST_SHIFT_MODE[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~3 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[24] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[24] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[9]~29 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[8]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[8]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[8]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[24]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[24]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[24]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_X_D[0]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WDC_BSL[0]~feeder ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[16]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[24]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[8]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[8]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[8]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[24]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[24]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[24]~feeder ; 1 ; 0 ;
-; FB_AD[23] ; ; ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[6]~20 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_D[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_C[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|TRACK_REG[7]~0 ; 1 ; 0 ;
-; - SRD[7]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRA[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[9]~60 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|SCR[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VR[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERB[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRB~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERA[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRA~10 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[23]~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[16]~15 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRA~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRB~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|AER[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[23] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[23] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[23] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[23] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[7] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[23] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[23] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][5] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][6] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][9] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][10] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][14] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][16] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][18] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][20] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][21] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][23] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][26] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][28] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][29] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][30] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][32] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][31] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][34] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][36] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][35] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][37] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][39] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][42] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][44] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][46] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][45] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][48] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][50] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][52] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][54] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][56] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][58] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][57] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][59] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][61] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][63] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_HIGH[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPDR[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|DDR[7] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated|aneb_result_wire[0]~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][0]~73 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][2]~74 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][4]~75 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[7]~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[7]~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR[7]~10 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[23] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[23] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TDDR[7] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[10]~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDR[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBDR[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~24 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~24 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_H_D[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[23]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[23]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[23]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[7]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][60]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][43]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][53]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][62]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][38]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][25]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][11]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][22]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][41]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][27]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][33]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][40]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][24]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][17]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][7]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][55]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][51]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][19]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][12]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][47]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][15]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[23]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][49]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][8]~feeder ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[15]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TADR[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[23]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[22] ; ; ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[5]~18 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_D[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_C[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|DATA_REG[6]~0 ; 1 ; 0 ;
-; - SRD[6]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRA[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[8]~62 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|SCR[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VR[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERB[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRB~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERA[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRA~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[22]~9 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[15]~16 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRA~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRB~2 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_H_D[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[22] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYS_CTR[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[22] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[22] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[22] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[6] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[22] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[22] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][5] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][7] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][6] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][9] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][11] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][13] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][16] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][17] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][19] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][21] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][23] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][25] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][28] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][29] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][31] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][33] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][36] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][38] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][39] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][41] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][44] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][46] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][48] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][47] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][50] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][52] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][53] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][55] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][58] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][57] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][59] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][61] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][62] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_HIGH[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPDR[6] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated|aneb_result_wire[0]~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][0]~78 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][2]~79 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][4]~80 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[6]~7 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[6]~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR[6]~12 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[22] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[22] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TDDR[6] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[11]~9 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDR[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~30 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~30 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[6]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][51]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][14]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][43]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][60]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][63]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][42]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][40]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][8]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][24]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][32]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][35]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][30]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][15]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][27]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][26]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][37]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][34]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][49]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][45]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][20]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][54]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][56]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][12]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][22]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[6][18]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[22]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[6]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[6]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|DDR[6]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|AER[6]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TADR[6]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[22]~feeder ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[14]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBDR[6]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDCR[5]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[6]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[22]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[6]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[6]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[22]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[22]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[21] ; ; ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[4]~16 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_D[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_C[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|DATA_REG[5]~1 ; 1 ; 0 ;
-; - SRD[5]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRA[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[7]~64 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|SCR[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VR[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERB[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRB~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRA~14 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[21]~10 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[14]~17 ; 1 ; 0 ;
-; - interrupt_handler:nobody|RTC_ADR[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRA~3 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRB~3 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|AER[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[21] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[21] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYS_CTR[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[21] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[21] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[5] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[21] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[21] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[21] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][18] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][30] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][17] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][29] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][16] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][28] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][19] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][31] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][36] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][39] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][40] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][43] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][32] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][35] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][44] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][47] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][13] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][6] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][14] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][12] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][7] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][15] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][58] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][56] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][59] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][52] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][55] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][48] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][51] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][60] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][63] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_HIGH[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPDR[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|DDR[5] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated|aneb_result_wire[0]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[5]~3 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][2]~82 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][4]~83 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][0]~85 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[5]~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR[5]~15 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[21] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[21] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TDDR[5] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[12]~12 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDR[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~36 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~36 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[5]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[21]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_H_D[5]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[5]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[5]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[5]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][41]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][8]~feeder ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[13]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][9]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][20]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBDR[5]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][42]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][45]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERA[5]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|TSR[5]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][57]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][62]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][37]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][46]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][53]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][38]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][5]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[5]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][33]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][34]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][49]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][10]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][50]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][27]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][54]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][24]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][11]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][26]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][25]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][21]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][22]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][23]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[21]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDCR[4]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TADR[5]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[5][61]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[21]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[21]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[20] ; ; ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[3]~14 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_D[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_C[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|DATA_REG[4]~2 ; 1 ; 0 ;
-; - SRD[4]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRA[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[6]~66 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VR[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERB[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRB~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRA~12 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[20]~11 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[13]~18 ; 1 ; 0 ;
-; - interrupt_handler:nobody|RTC_ADR[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRA~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRB~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|AER[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[20] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYS_CTR[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[20] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[4] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[20] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[20] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[20] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][36] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][39] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][40] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][43] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][32] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][35] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][44] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][47] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][18] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][30] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][17] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][29] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][16] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][28] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][19] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][31] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][9] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][13] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][6] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][14] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][12] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][7] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][15] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][56] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][59] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][52] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][55] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][48] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][51] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][60] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][63] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_HIGH[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TACR[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBCR[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPDR[4] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated|aneb_result_wire[0]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[4]~4 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][2]~86 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][4]~87 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][0]~89 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[4]~7 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR[4]~18 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[20] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[20] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TDDR[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDR[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~42 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TADR[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~42 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[12] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[13]~27 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[4] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][62]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][58]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|DDR[4]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[4]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|SCR[4]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[4]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][11]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][5]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][20]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][41]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][22]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBDR[4]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][50]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDCR[3]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[20]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[4]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[20]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[4]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[20]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_H_D[4]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[20]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][27]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][61]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][38]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][42]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][54]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][57]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][34]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][49]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][53]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][45]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][46]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][10]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][23]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][24]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][37]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][33]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][26]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERA[4]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][8]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][25]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[4][21]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[20]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[4]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[20]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[19] ; ; ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[2]~12 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_D[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_C[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|DATA_REG[3]~3 ; 1 ; 0 ;
-; - SRD[3]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[5]~68 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|TSR[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|SCR[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VR[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRB~10 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERA[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRA~16 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[19]~12 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[12]~19 ; 1 ; 0 ;
-; - interrupt_handler:nobody|RTC_ADR[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRA~7 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRB~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TACR[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|AER[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_H_D[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[19] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[19] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPDR[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[19] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[19] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[19] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][18] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][30] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][17] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][29] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][16] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][28] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][19] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][31] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][36] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][39] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][40] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][43] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][32] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][35] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][44] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][47] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][13] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][10] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][6] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][14] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][8] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][12] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][7] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][15] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][56] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][59] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][52] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][55] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][48] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][51] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][60] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][63] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_HIGH[3] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated|aneb_result_wire[0]~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR[3]~21 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][2]~90 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][4]~91 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][0]~93 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[3]~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[3]~8 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[19] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[19] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TDDR[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDR[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~47 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TADR[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~47 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[14]~24 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[19]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[19]~feeder ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[11]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[3]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[3]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[19]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[19]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|DDR[3]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[19]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[3]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][38]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][45]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][61]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][53]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][62]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][58]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][27]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][54]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][42]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][57]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][34]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][49]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][26]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][25]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][21]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][37]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][33]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][46]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][23]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][24]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][11]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][22]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][41]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][20]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][5]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][9]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[3][50]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBCR[3]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBDR[3]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERB[3]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRA[3]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[18] ; ; ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[1]~10 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_D[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_C[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|DATA_REG[2]~4 ; 1 ; 0 ;
-; - SRD[2]~output ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VRAS~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRA[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[4]~70 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|TSR[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|SCR[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[18] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRA~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERB[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRB~12 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[18]~13 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[11]~20 ; 1 ; 0 ;
-; - interrupt_handler:nobody|RTC_ADR[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_H_D[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[2] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[18] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[18] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[18] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][5] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][9] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][12] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][13] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][16] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][18] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][19] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][21] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][24] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][26] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][27] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][28] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][29] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][32] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][31] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][33] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][35] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][37] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][39] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][41] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][44] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][46] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][48] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][50] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][49] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][51] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][54] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][56] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][57] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][59] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][61] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][63] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_HIGH[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TACR[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBCR[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPDR[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|AER[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[18] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[18] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[18] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[18] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYS_CTR[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRA~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRB~6 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated|aneb_result_wire[0]~1 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][0]~69 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][2]~70 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][4]~71 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[2]~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[2]~3 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR[2]~9 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[18] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[18] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TDDR[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBDR[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~18 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDR[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~18 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[15]~21 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[18]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[2]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][60]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][45]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][47]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][17]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][30]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][62]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][15]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][40]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][43]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|DDR[2]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][53]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][55]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][58]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][38]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][10]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][14]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][34]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][25]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][6]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][7]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][23]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][8]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][36]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][42]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][52]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][20]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[2][22]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[2]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[2]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[2]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[2]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[2]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[18]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERA[2]~feeder ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[10]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[2]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDCR[2]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TADR[2]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[18]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[17] ; ; ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[0]~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|DATA_REG[1]~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_D[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_C[1] ; 1 ; 0 ;
-; - SRD[1]~output ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VCAS~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRA[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[3]~72 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|SCR[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|RSR[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERA[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRA~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERB[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRB~14 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[17]~14 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[10]~21 ; 1 ; 0 ;
-; - interrupt_handler:nobody|RTC_ADR[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[17] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYS_CTR[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[17] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[17] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_H_D[1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[17] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[17] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[17] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][5] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][6] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][9] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][12] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][13] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][16] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][15] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][18] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][19] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][21] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][23] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][26] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][27] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][28] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][29] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][31] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][34] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][36] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][37] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][40] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][42] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][43] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][46] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][47] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][49] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][51] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][53] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][55] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][58] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][60] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][61] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][62] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_HIGH[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TACR[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPDR[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRA~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRB~7 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~3 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][0]~65 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][2]~66 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][4]~67 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[1]~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[1]~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR[1]~6 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[17] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[17] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TDDR[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~12 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDR[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~12 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[16]~18 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated|aneb_result_wire[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[17]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TADR[1]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|TSR[1]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][59]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][50]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][48]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][25]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][8]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][30]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|DDR[1]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][20]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][22]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|AER[1]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBCR[1]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDCR[1]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBDR[1]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][56]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][45]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][63]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][44]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][54]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][7]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][17]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][52]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][38]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][10]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][14]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][41]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][57]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][32]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][35]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][24]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][39]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[1][33]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[1]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[17]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[17]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[1]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[17]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[1]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[1]~feeder ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[9]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[17]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[1]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[16] ; ; ;
-; - Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[0]~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_D[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_C[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|DATA_REG[0]~6 ; 1 ; 0 ;
-; - SRD[0]~output ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|TSR[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VWE ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[16] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRA[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[2]~74 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|SCR[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERA[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRA~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERB[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRB~16 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[16]~15 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[9]~22 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|RSR[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_H_D[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[0] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[16] ; 1 ; 0 ;
-; - interrupt_handler:nobody|RTC_ADR[0] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[16] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][5] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][6] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][9] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][10] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][14] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][16] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][18] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][20] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][22] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][24] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][26] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][27] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][28] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][30] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][32] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][34] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][36] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][38] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][40] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][42] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][44] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][46] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][48] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][50] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][52] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][54] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][56] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][58] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][60] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][61] ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][63] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_HIGH[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPDR[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[16] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[16] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYS_CTR[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRA~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRB~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR[0]~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~4 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][0]~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][2]~3 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][4]~6 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][13]~12 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[0]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[0]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[16] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[16] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A~6 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[17]~15 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[8] ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated|aneb_result_wire[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[16]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[16]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[0]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][59]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][12]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][51]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][17]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][7]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][37]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][25]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][29]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][41]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][35]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][15]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[16]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][31]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][57]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][43]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][47]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][23]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][39]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][49]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][33]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][45]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][62]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][53]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][55]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|AER[0]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[0]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[16]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[16]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[0]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[0]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[16]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBDR[0]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TDDR[0]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][21]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][8]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][19]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDR[0]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TACR[0]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDCR[0]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBCR[0]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|DDR[0]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TADR[0]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[0]~feeder ; 1 ; 0 ;
-; FB_AD[15] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[1]~76 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[15]~16 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[15] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[15] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[15] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[15] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[15] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[15] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[7]~6 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[15] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[15] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[15]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[15]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[15]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[15]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[15]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[14] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA[0]~78 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_S[1]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[14]~17 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[14] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[14] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[14] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[14] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[14] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[14] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[6]~7 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[14] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[14] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[14]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[14]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[14]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[14]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[14]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[13] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~4 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA[1]~9 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_S[0]~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[13]~18 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[13] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[13] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[13] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[13] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[13] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[13] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[13] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[5]~3 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[13] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[13] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[13]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[13]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[13]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[13]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[12] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~4 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA[0]~11 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[12]~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[12]~19 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[12] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[12] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[12] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[12] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[12] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[12] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[12] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[4]~4 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[12] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[12] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[12]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[12]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[12]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[12]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[11] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[11]~2 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[11]~20 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[11] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[11] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[11] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[11] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[3]~8 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[11] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[11]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[11]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[11]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[11]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[10] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10]~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[10]~21 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[10] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[10] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[10] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[2]~5 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[10]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[10]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[10]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[10]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[9] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9]~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[9]~22 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[9]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[9] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[9] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[9] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[1]~2 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[9]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[9]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[9]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[9]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[9]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; FB_AD[8] ; ; ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8]~13 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[8]~23 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[8] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[8]~1 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[8] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[8] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[8] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[0]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[8] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[8]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[8]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[8]~feeder ; 1 ; 0 ;
-; FB_AD[7] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[7]~16 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[7]~24 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[7] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[7] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[7] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[7]~4 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[7] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[7] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[7]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[7]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; FB_AD[6] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[6]~23 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[6]~25 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[6]~2 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[6] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[6] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[6] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[6]~5 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[6]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[6]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[6]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[6]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; FB_AD[5] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[5]~26 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[5]~26 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[5] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[5]~3 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[5] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[5] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[5] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~6 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[5]~6 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[5] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[5]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[5]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[5]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[5]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; FB_AD[4] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[4]~29 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[4]~27 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[4]~4 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[4] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[4] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[4] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[4]~7 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[4] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[4] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[4]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[4]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[4]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; FB_AD[3] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[3]~32 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[3]~28 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[3]~5 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[3] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[3] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~8 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[3]~8 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[3] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[3]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[3]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[3]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; FB_AD[2] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[2]~35 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[2]~29 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[2] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[2]~6 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[2] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[2] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[2] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~9 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[2]~3 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[2]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[2]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; FB_AD[1] ; ; ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[1]~41 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[1]~30 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[1]~7 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[1] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[1] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~9 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[1]~2 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[1]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[1]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[1]~feeder ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; FB_AD[0] ; ; ;
-; - Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ram_block11a0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[0]~43 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[0]~31 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[0]~8 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[0] ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[0] ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~9 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[0]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7]~5 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[0] ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[0]~feeder ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[0]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[0]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[0]~feeder ; 1 ; 0 ;
-; VD[31] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[31] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[31]~feeder ; 0 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[31]~feeder ; 0 ; 1 ;
-; VD[30] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[30] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[30]~feeder ; 1 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[30]~feeder ; 1 ; 1 ;
-; VD[29] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[29] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[29]~feeder ; 1 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[29]~feeder ; 1 ; 1 ;
-; VD[28] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[28] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[28]~feeder ; 1 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[28]~feeder ; 1 ; 1 ;
-; VD[27] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[27] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[27]~feeder ; 1 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[27]~feeder ; 1 ; 1 ;
-; VD[26] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[26] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[26]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[26]~feeder ; 1 ; 0 ;
-; VD[25] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[25] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[25]~feeder ; 0 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[25]~feeder ; 0 ; 1 ;
-; VD[24] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[24] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[24]~feeder ; 1 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[24]~feeder ; 1 ; 1 ;
-; VD[23] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[23] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[23]~feeder ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[23]~feeder ; 0 ; 0 ;
-; VD[22] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[22] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[22]~feeder ; 1 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[22]~feeder ; 1 ; 1 ;
-; VD[21] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[21] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[21]~feeder ; 1 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[21]~feeder ; 1 ; 1 ;
-; VD[20] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[20] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[20]~feeder ; 1 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[20]~feeder ; 1 ; 1 ;
-; VD[19] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[19] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[19]~feeder ; 0 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[19]~feeder ; 0 ; 1 ;
-; VD[18] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[18] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[18]~feeder ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[18]~feeder ; 0 ; 0 ;
-; VD[17] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[17] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[17]~feeder ; 1 ; 1 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[17]~feeder ; 1 ; 1 ;
-; VD[16] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[16] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[16]~feeder ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[16]~feeder ; 0 ; 0 ;
-; VD[15] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[15] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[15]~feeder ; 0 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[15]~feeder ; 0 ; 2 ;
-; VD[14] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[14] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[14]~feeder ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[14]~feeder ; 1 ; 0 ;
-; VD[13] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[13] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[13]~feeder ; 0 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[13]~feeder ; 0 ; 2 ;
-; VD[12] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[12] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[12]~feeder ; 0 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[12]~feeder ; 0 ; 2 ;
-; VD[11] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[11] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[11]~feeder ; 1 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[11]~feeder ; 1 ; 2 ;
-; VD[10] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[10] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[10]~feeder ; 0 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[10]~feeder ; 0 ; 2 ;
-; VD[9] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[9] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[9]~feeder ; 0 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[9]~feeder ; 0 ; 2 ;
-; VD[8] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[8] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[8]~feeder ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[8]~feeder ; 0 ; 0 ;
-; VD[7] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[7] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[7]~feeder ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[7]~feeder ; 0 ; 0 ;
-; VD[6] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[6] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[6]~feeder ; 0 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[6]~feeder ; 0 ; 2 ;
-; VD[5] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[5] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[5]~feeder ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[5]~feeder ; 0 ; 0 ;
-; VD[4] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[4] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[4]~feeder ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[4]~feeder ; 0 ; 0 ;
-; VD[3] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[3] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[3]~feeder ; 1 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[3]~feeder ; 1 ; 2 ;
-; VD[2] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[2] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[2]~feeder ; 1 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[2]~feeder ; 1 ; 2 ;
-; VD[1] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[1] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[1]~feeder ; 0 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[1]~feeder ; 0 ; 2 ;
-; VD[0] ; ; ;
-; - Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[0]~feeder ; 0 ; 2 ;
-; - Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[0]~feeder ; 0 ; 2 ;
-; VDQS[3] ; ; ;
-; VDQS[2] ; ; ;
-; VDQS[1] ; ; ;
-; VDQS[0] ; ; ;
-; IO[17] ; ; ;
-; IO[16] ; ; ;
-; IO[15] ; ; ;
-; IO[14] ; ; ;
-; IO[13] ; ; ;
-; IO[12] ; ; ;
-; IO[11] ; ; ;
-; IO[10] ; ; ;
-; IO[9] ; ; ;
-; IO[8] ; ; ;
-; IO[7] ; ; ;
-; IO[6] ; ; ;
-; IO[5] ; ; ;
-; IO[4] ; ; ;
-; IO[3] ; ; ;
-; IO[2] ; ; ;
-; IO[1] ; ; ;
-; IO[0] ; ; ;
-; SRD[15] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~156 ; 1 ; 0 ;
-; SRD[14] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[30]~131 ; 1 ; 0 ;
-; SRD[13] ; ; ;
-; - DSP:Mathias_Alles|FB_AD[29]~3 ; 0 ; 0 ;
-; SRD[12] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[28]~369 ; 0 ; 0 ;
-; SRD[11] ; ; ;
-; - DSP:Mathias_Alles|FB_AD[27]~4 ; 0 ; 0 ;
-; SRD[10] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[26]~197 ; 1 ; 0 ;
-; SRD[9] ; ; ;
-; - DSP:Mathias_Alles|FB_AD[25]~0 ; 1 ; 0 ;
-; SRD[8] ; ; ;
-; - DSP:Mathias_Alles|FB_AD[24]~1 ; 1 ; 0 ;
-; SRD[7] ; ; ;
-; - DSP:Mathias_Alles|FB_AD[23]~2 ; 0 ; 0 ;
-; SRD[6] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[22]~269 ; 1 ; 0 ;
-; SRD[5] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[21]~285 ; 0 ; 0 ;
-; SRD[4] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[20]~301 ; 1 ; 0 ;
-; SRD[3] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[19]~319 ; 1 ; 0 ;
-; SRD[2] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~172 ; 0 ; 0 ;
-; SRD[1] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[17]~86 ; 1 ; 0 ;
-; SRD[0] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~54 ; 0 ; 0 ;
-; SCSI_PAR ; ; ;
-; nSCSI_SEL ; ; ;
-; nSCSI_BUSY ; ; ;
-; nSCSI_RST ; ; ;
-; SD_CD_DATA3 ; ; ;
-; SD_CMD_D1 ; ; ;
-; ACSI_D[7] ; ; ;
-; ACSI_D[6] ; ; ;
-; ACSI_D[5] ; ; ;
-; ACSI_D[4] ; ; ;
-; ACSI_D[3] ; ; ;
-; ACSI_D[2] ; ; ;
-; ACSI_D[1] ; ; ;
-; ACSI_D[0] ; ; ;
-; LP_D[7] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~142 ; 1 ; 0 ;
-; LP_D[6] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[30]~112 ; 0 ; 0 ;
-; LP_D[5] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~339 ; 0 ; 0 ;
-; LP_D[4] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[28]~378 ; 0 ; 0 ;
-; LP_D[3] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[27]~383 ; 1 ; 0 ;
-; LP_D[2] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[26]~186 ; 1 ; 0 ;
-; LP_D[1] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[25]~206 ; 0 ; 0 ;
-; LP_D[0] ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[24]~227 ; 0 ; 0 ;
-; SCSI_D[7] ; ; ;
-; SCSI_D[6] ; ; ;
-; SCSI_D[5] ; ; ;
-; SCSI_D[4] ; ; ;
-; SCSI_D[3] ; ; ;
-; SCSI_D[2] ; ; ;
-; SCSI_D[1] ; ; ;
-; SCSI_D[0] ; ; ;
-; nRSTO_MCF ; ; ;
-; nFB_WR ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|ROM_CS ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SUB_BUS~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VRAS~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~3 ; 1 ; 0 ;
-; - interrupt_handler:nobody|TIN0~0 ; 1 ; 0 ;
-; - DSP:Mathias_Alles|nSRWE~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|DIG_PORTS~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_8~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPIO_REGISTERS~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[31]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|Selector1~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|Selector0~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|P_CTRL_REG~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_A[4]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_B[4]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_C[4]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~11 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[7]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[7]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SECTORREG~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_S[0]~1 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[31]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|Selector1~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRA~1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRA[0]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRB~1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[0]~0 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[7]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[7]~19 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADDRESSLATCH~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_8~1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[31]~1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WDC_BSL[0]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATAREG~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CONTROL~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|TDRE~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATAREG~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[11]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[7]~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|NOISE_FREQ[4]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_SHAPE[2]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_RESET~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[11]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[7]~1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[11]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[7]~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|DATA_OUT~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|TSR_READ~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|DATA_OUT~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|DATA_OUT~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|DATA_OUT~11 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|DATA_OUT~15 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|DATA_OUT_EN~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|DATA_OUT~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR_READ~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|TSR_READ~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|RSR_READ~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ~1 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[7]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_EN~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|Mux1~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~2 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~3 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|DATA_EN~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|DATA_EN~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|DATA_EN~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[15]~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|TRACKREG~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRA~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|ISRB~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERA[0]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERB[0]~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[9]~0 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[8]~1 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[6]~2 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[5]~3 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[4]~4 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[3]~5 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[2]~6 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[1]~7 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR[0]~8 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~4 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~6 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|DA_OUT~5 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~9 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~10 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~14 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~15 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|DATA_OUT~17 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[25]~218 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~42 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[24]~238 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|DATA_OUT~1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|DATA_OUT~35 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|DATA_OUT~37 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|DATA_OUT~40 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~350 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|DATA_OUT[3]~1 ; 0 ; 0 ;
-; - DSP:Mathias_Alles|nSRWE~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[2]~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[7]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|valid_rdreq~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nFDC_WR~0 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[23]~1 ; 1 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[23]~1 ; 1 ; 0 ;
-; - interrupt_handler:nobody|RTC_ADR[5]~0 ; 0 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[23]~1 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~491 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[0][0]~1 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][1]~2 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~492 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][3]~5 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~496 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][5]~9 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~503 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~504 ; 1 ; 0 ;
-; - interrupt_handler:nobody|_~505 ; 1 ; 0 ;
-; - interrupt_handler:nobody|_~506 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][10]~10 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][12]~11 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][13]~13 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][14]~15 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][15]~16 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][16]~17 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][17]~18 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][18]~19 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][19]~20 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][20]~21 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][21]~22 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][22]~23 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][23]~24 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][24]~25 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][25]~26 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][26]~27 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][27]~28 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][28]~29 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][29]~30 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][30]~31 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][31]~32 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][32]~33 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][33]~34 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][34]~35 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][35]~36 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][36]~37 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][37]~38 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][38]~39 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][39]~40 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][40]~41 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][41]~42 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][42]~43 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][43]~44 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][44]~45 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][45]~46 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][46]~47 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][47]~48 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][48]~49 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][49]~50 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][50]~51 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][51]~52 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][52]~53 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][53]~54 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][54]~55 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][55]~56 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][56]~57 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][57]~58 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][58]~59 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][59]~60 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][60]~61 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][61]~62 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][62]~63 ; 0 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][63]~64 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_11~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[0]~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[0]~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TACR[0]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDCR[0]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBCR[0]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|DDR[0]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPDR[0]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|AER[0]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[23]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[23]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[23]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[23]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[3]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[7]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[7]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[7]~2 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[7]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYS_CTR[6]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[15]~1 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[15]~1 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[15]~1 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[15]~1 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[10]~2 ; 0 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[15]~2 ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[15]~3 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_10~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_CLUT_WR[0] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[31]~2 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31]~2 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[31]~2 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[31]~2 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[15]~3 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[15]~1 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[31]~3 ; 0 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|_~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7]~4 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7]~6 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[6]~7 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[7]~3 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_X_D[2]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ST_CLUT_WR[0]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[10]~1 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_WR~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ST_SHIFT_MODE[1]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[8]~1 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VIDEO_RECONFIG~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|WERTE[7][11]~77 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[7]~3 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[7]~3 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[7]~3 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[7]~3 ; 1 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[7]~4 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[7]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_2~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_LE[3] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_LE[1]~2 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_LE[2]~3 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_LE[0]~4 ; 0 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|read_init_nominal_state~2 ; 1 ; 0 ;
-; - altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|read_init_state~0 ; 1 ; 0 ;
-; nFB_CS1 ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|ROM_CS ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|IDE_CF_CS ; 0 ; 0 ;
-; - interrupt_handler:nobody|TIN0~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE_CS ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VIDEO_MOD_TA~2 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE_CS~1 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT_CS~2 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF_CS ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW_CS~0 ; 0 ; 0 ;
-; - interrupt_handler:nobody|UHR_DS~3 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|MFP_CS~1 ; 1 ; 0 ;
-; - interrupt_handler:nobody|_~3 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|NEXT_CMD_STATE.T1~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|Selector2~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~28 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~31 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~32 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[0]~7 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_CNT_M ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_CNT_H ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~6 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~8 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~36 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~37 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[7]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~38 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~39 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~27 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~40 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~41 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component|dout[9]~81 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~43 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~38 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~44 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~45 ; 1 ; 0 ;
-; - interrupt_handler:nobody|TIN0~1 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_CNT_L ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~46 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~47 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~48 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~49 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~50 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~51 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~52 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~53 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~54 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~55 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_H_D[7]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[7]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[7]~1 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[6]~7 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[10]~3 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ST_SHIFT_MODE[1]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[0]~34 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[1]~35 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~59 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[2]~36 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_DATEN_CS~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SNDCS ; 1 ; 0 ;
-; FB_SIZE1 ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nRP_UDS~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nRP_LDS~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VRAS~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~3 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_B1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_CS~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_8~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|FB_B[0]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FB_B[1]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FB_B[3]~1 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|_~22 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~20 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WDC_BSL[0]~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|UHR_AS~0 ; 0 ; 0 ;
-; - interrupt_handler:nobody|UHR_DS~6 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~194 ; 1 ; 0 ;
-; - interrupt_handler:nobody|FB_B[2]~1 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FB_B[2] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_B[0] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[3]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~491 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2_RESYN22 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ~0 ; 1 ; 0 ;
-; FB_SIZE0 ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nRP_UDS~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nRP_LDS~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VRAS~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~3 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_B1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_CS~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_8~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|FB_B[0]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FB_B[1]~0 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FB_B[3]~1 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2~0 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~22 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~20 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WDC_BSL[0]~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|UHR_AS~0 ; 1 ; 0 ;
-; - interrupt_handler:nobody|UHR_DS~6 ; 1 ; 0 ;
-; - interrupt_handler:nobody|_~194 ; 1 ; 0 ;
-; - interrupt_handler:nobody|FB_B[2]~1 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FB_B[2] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_B[0] ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[3]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~491 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2_RESYN22 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ~0 ; 0 ; 0 ;
-; FB_ALE ; ; ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[16] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[15] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[14] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[13] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[11] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[10] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[9] ; 1 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; 1 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; 1 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[6] ; 1 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[5] ; 1 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_SEL ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~5 ; 1 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[3] ; 1 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2] ; 1 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[4] ; 1 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; 1 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[26] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[25] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[24] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[27] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[23] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[22] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[21] ; 0 ; 0 ;
-; - lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[20] ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10]~5 ; 1 ; 0 ;
-; nFB_CS2 ; ; ;
-; - DSP:Mathias_Alles|nSRCS~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VIDEO_MOD_TA~4 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VIDEO_PLL_RECONFIG_CS~0 ; 0 ; 0 ;
-; - inst2~3 ; 0 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[31]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[23]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[5]~1 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VIDEO_PLL_CONFIG_CS~0 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA_CS ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR_CS ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~23 ; 0 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF_CS ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~25 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH_CS ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH_CS ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL_CS ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL_CS ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~2 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~3 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR_CS ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~13 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~14 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~147 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~148 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR_CS ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~19 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~20 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CLEAR_CS ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~195 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~196 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~198 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~199 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[31]~2 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~200 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~201 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~24 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~25 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~246 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~247 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~35 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~41 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~42 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~248 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~46 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~47 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~295 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~53 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~54 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~338 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~339 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~60 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~61 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~382 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~383 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~67 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~68 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~426 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~427 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~470 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~471 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~473 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~474 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~71 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~475 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~476 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~73 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~74 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~477 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~75 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~76 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~480 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~77 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~78 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~79 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~80 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~483 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~484 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~485 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~486 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~487 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~488 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~489 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~490 ; 0 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[23]~1 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[23]~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[15]~1 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[15]~3 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_CTR[15]~2 ; 0 ; 0 ;
-; - interrupt_handler:nobody|INT_ENA[15]~2 ; 0 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[15]~3 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[7]~2 ; 0 ; 0 ;
-; - interrupt_handler:nobody|ACP_CONF[7]~4 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~508 ; 0 ; 0 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[1]~13_RESYN34 ; 0 ; 0 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component|dout[0]~15_RESYN42 ; 0 ; 0 ;
-; MAIN_CLK ; ; ;
-; nDACK1 ; ; ;
-; nFB_OE ; ; ;
-; - DSP:Mathias_Alles|nSROE~0 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~31 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~39 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~40 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~43 ; 0 ; 0 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component|dout[0]~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~45 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~47 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~48 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ST_CLUT_RD ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_CLUT_RD ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~51 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_VDOE[3]~2 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_VDOE[0]~3 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~55 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~56 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_VDOE[1]~4 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_VDOE[2]~5 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~59 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~60 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~61 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~65 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~10 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~67 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~70 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~72 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~77 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component|dout[3]~28 ; 1 ; 0 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component|dout[1]~3 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[17]~85 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[17]~89 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~94 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~19 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~20 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~111 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~124 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD~127 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[30]~129 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_CLUT_RDH ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component|dout[14]~34 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component|dout[15]~40 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~154 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~160 ; 1 ; 0 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component|dout[2]~6 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_CLUT_RDL~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~170 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~175 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~176 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~179 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~181 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~182 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[26]~193 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[26]~195 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~211 ; 0 ; 0 ;
-; - DSP:Mathias_Alles|FB_AD[25]~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[25]~215 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[25]~220 ; 0 ; 0 ;
-; - DSP:Mathias_Alles|FB_AD[24]~1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[24]~235 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[24]~240 ; 0 ; 0 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component|dout[7]~9 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[23]~250 ; 0 ; 0 ;
-; - DSP:Mathias_Alles|FB_AD[23]~2 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[23]~255 ; 0 ; 0 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component|dout[6]~12 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[22]~267 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[22]~272 ; 0 ; 0 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component|dout[5]~15 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[21]~283 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[21]~288 ; 0 ; 0 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component|dout[4]~18 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[20]~299 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[20]~304 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[19]~308 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[19]~312 ; 0 ; 0 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component|dout[3]~21 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[19]~317 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[15]~327 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~352 ; 0 ; 0 ;
-; - DSP:Mathias_Alles|FB_AD[29]~3 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~356 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component|dout[13]~173 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[28]~366 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[28]~375 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[27]~388 ; 1 ; 0 ;
-; - DSP:Mathias_Alles|FB_AD[27]~4 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[27]~392 ; 1 ; 0 ;
-; - Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component|dout[11]~186 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[9]~411 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[9]~415 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[8]~420 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[8]~424 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[7]~432 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[6]~437 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[5]~445 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[4]~453 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[3]~461 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[2]~469 ; 0 ; 0 ;
-; - interrupt_handler:nobody|_~508 ; 0 ; 0 ;
-; - Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~59 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~490 ; 1 ; 0 ;
-; IDE_RDY ; ; ;
-; - inst2~1 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|Selector1~0 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|IDE_CF_TA~0 ; 1 ; 0 ;
-; CLK33M ; ; ;
-; HD_DD ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|HD_DD_OUT~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~62 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|PHASE_DECODER~0 ; 1 ; 0 ;
-; nINDEX ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|MOTORSWITCH~1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|MOTORSWITCH~2 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE~78 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|LOCK~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INDEX_MARK~1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE~113 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE~173 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INDEX_COUNTER~2 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ~4 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE~205 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\INDEX_COUNTER:LOCK~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|DRQ_IPn~0 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_INDEX_MARK:LOCK~0 ; 0 ; 0 ;
-; - nINDEX~_wirecell ; 0 ; 0 ;
-; RxD ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|SDATA_IN_I~1 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|SDATA_IN_I~2 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|P_SAMPLE~6 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|P_START_BIT~0 ; 0 ; 0 ;
-; nWP ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE~85 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE~168 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE~176 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WR_PR~0 ; 1 ; 0 ;
-; LP_BUSY ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|DATA_OUT[0]~20 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|EDGE_ENA~15 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|LOCK~15 ; 0 ; 0 ;
-; DCD ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|DATA_OUT[1]~43 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|EDGE_ENA~10 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|LOCK~10 ; 0 ; 0 ;
-; CTS ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|DATA_OUT[2]~63 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|EDGE_ENA~9 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|LOCK~9 ; 1 ; 0 ;
-; TRACK00 ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|TR_CLR ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Add1~18 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Add1~20 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Add1~22 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Add1~24 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Add1~26 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Add1~28 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE~103 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|LOST_DATA_TR00~2 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|LOST_DATA_TR00~3 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Add1~30 ; 0 ; 0 ;
-; IDE_INT ; ; ;
-; RI ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|EDGE_ENA~11 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|DATA_OUT~104 ; 1 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|LOCK~11 ; 1 ; 0 ;
-; nPCI_INTD ; ; ;
-; - interrupt_handler:nobody|INT_LATCH[6]~11 ; 0 ; 6 ;
-; - interrupt_handler:nobody|_~484 ; 1 ; 0 ;
-; nPCI_INTC ; ; ;
-; - interrupt_handler:nobody|INT_LATCH[5]~12 ; 1 ; 6 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00006|lpm_bustri:lpm_bustri_component|dout[5]~5 ; 0 ; 0 ;
-; nPCI_INTB ; ; ;
-; - interrupt_handler:nobody|INT_LATCH[4]~13 ; 0 ; 6 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00006|lpm_bustri:lpm_bustri_component|dout[4]~8 ; 1 ; 0 ;
-; nPCI_INTA ; ; ;
-; - interrupt_handler:nobody|INT_LATCH[3]~14 ; 1 ; 6 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00006|lpm_bustri:lpm_bustri_component|dout[3]~11 ; 0 ; 0 ;
-; DVI_INT ; ; ;
-; E0_INT ; ; ;
-; PIC_INT ; ; ;
-; - interrupt_handler:nobody|INT_LATCH[0]~17 ; 1 ; 6 ;
-; - interrupt_handler:nobody|lpm_bustri_BYT:$00006|lpm_bustri:lpm_bustri_component|dout[0]~20 ; 0 ; 0 ;
-; - interrupt_handler:nobody|PIC_INT_SYNC[0] ; 0 ; 0 ;
-; PIC_AMKB_RX ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|KEYB_RxD ; 0 ; 1 ;
-; MIDI_IN ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|RXDATA_I~feeder ; 1 ; 1 ;
-; nRD_DATA ; ; ;
-; AMKB_RX ; ; ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3]~11 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]~14 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2]~9 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1]~7 ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; 0 ; 0 ;
-; - FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3]~13 ; 1 ; 0 ;
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+---------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Control Signals ;
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------+---------+---------------------------------------+--------+----------------------+------------------+---------------------------+
-; Name ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------+---------+---------------------------------------+--------+----------------------+------------------+---------------------------+
-; CLK33M ; PIN_AB12 ; 12 ; Clock ; yes ; Global Clock ; GCLK15 ; -- ;
-; CLK33M ; PIN_AB12 ; 5 ; Clock ; no ; -- ; -- ; -- ;
-; DSP:Mathias_Alles|nSRWE~1 ; LCCOMB_X23_Y8_N20 ; 16 ; Output enable ; no ; -- ; -- ; -- ;
-; FB_ALE ; PIN_R7 ; 33 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3]~13 ; LCCOMB_X1_Y10_N14 ; 5 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|CLR_FIFO ; LCCOMB_X26_Y22_N16 ; 250 ; Async. clear ; yes ; Global Clock ; GCLK7 ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[31]~1 ; LCCOMB_X18_Y17_N18 ; 32 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[0]~1 ; LCCOMB_X22_Y14_N2 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[0]~1 ; LCCOMB_X22_Y14_N20 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[1]~0 ; LCCOMB_X16_Y14_N24 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[8]~1 ; LCCOMB_X16_Y14_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[13]~104 ; LCCOMB_X21_Y12_N8 ; 16 ; Output enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[16]~78 ; LCCOMB_X22_Y13_N12 ; 2 ; Output enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~183 ; LCCOMB_X22_Y13_N30 ; 4 ; Output enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~259 ; LCCOMB_X22_Y13_N4 ; 2 ; Output enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[26]~203 ; LCCOMB_X22_Y13_N16 ; 1 ; Output enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[26]~224 ; LCCOMB_X22_Y13_N10 ; 2 ; Output enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[31]~141 ; LCCOMB_X33_Y1_N4 ; 5 ; Output enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|Selector4~1 ; LCCOMB_X23_Y18_N0 ; 20 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WDC_BSL[0]~1 ; LCCOMB_X22_Y13_N2 ; 2 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|Equal0~4 ; LCCOMB_X22_Y28_N30 ; 7 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[4]~1 ; LCCOMB_X21_Y28_N6 ; 16 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|\MFM_SYNCLOCK:TMP[4]~3 ; LCCOMB_X21_Y28_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_LOAD_SHFT ; FF_X34_Y29_N7 ; 26 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SHFT_LOAD_ND~0 ; LCCOMB_X28_Y27_N8 ; 4 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|Selector68~47 ; LCCOMB_X35_Y25_N2 ; 88 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|Selector78~0 ; LCCOMB_X32_Y25_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WideNor2~5 ; LCCOMB_X36_Y28_N0 ; 33 ; Sync. clear ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WideNor8 ; LCCOMB_X28_Y27_N6 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\RESTORE_TRAP:STEP_CNT[2]~1 ; LCCOMB_X32_Y27_N4 ; 8 ; Sync. clear ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[5]~37 ; LCCOMB_X27_Y26_N22 ; 2 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|PER_CNT~27 ; LCCOMB_X30_Y30_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|RD_PULSE ; FF_X30_Y32_N13 ; 18 ; Clock enable, Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\PHASE_DECODER:PHASE_AMOUNT[1]~1 ; LCCOMB_X27_Y32_N24 ; 2 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|COMMAND_REG[7] ; FF_X32_Y25_N31 ; 20 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|COMMAND_REG[7]~1 ; LCCOMB_X32_Y25_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|Equal3~2 ; LCCOMB_X27_Y25_N14 ; 7 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SECTORREG~1 ; LCCOMB_X29_Y25_N2 ; 8 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[6]~9 ; LCCOMB_X28_Y27_N26 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG~8 ; LCCOMB_X30_Y28_N22 ; 4 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|TRACKREG~1 ; LCCOMB_X30_Y26_N20 ; 9 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|TRACK_REG[6]~3 ; LCCOMB_X30_Y26_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT~1 ; LCCOMB_X28_Y30_N28 ; 31 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|WR_CNT~12 ; LCCOMB_X36_Y29_N10 ; 4 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:LOCK~0 ; LCCOMB_X25_Y29_N26 ; 1 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[0]~0 ; LCCOMB_X25_Y27_N6 ; 23 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADDRESSLATCH~1 ; LCCOMB_X18_Y19_N22 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|DIG_PORTS~0 ; LCCOMB_X15_Y14_N18 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_A[6]~_Duplicate_1 ; FF_X4_Y41_N5 ; 8 ; Output enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|PORT_B[7]~0 ; LCCOMB_X7_Y39_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|P_CTRL_REG~0 ; LCCOMB_X19_Y23_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WAV_STRB ; FF_X9_Y21_N23 ; 10 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_FREQ[7]~0 ; LCCOMB_X17_Y22_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_RESET ; FF_X18_Y22_N21 ; 8 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_RESET~0 ; LCCOMB_X18_Y22_N20 ; 9 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_SHAPE[2]~0 ; LCCOMB_X18_Y24_N0 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|ENV_STRB~1 ; LCCOMB_X18_Y23_N8 ; 19 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Equal14~3 ; LCCOMB_X20_Y21_N28 ; 13 ; Sync. clear ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Equal16~3 ; LCCOMB_X19_Y24_N20 ; 13 ; Sync. clear ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|Equal18~3 ; LCCOMB_X18_Y20_N28 ; 13 ; Sync. clear ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[11]~0 ; LCCOMB_X15_Y14_N28 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_A[7]~1 ; LCCOMB_X20_Y23_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[11]~0 ; LCCOMB_X19_Y24_N30 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[7]~1 ; LCCOMB_X20_Y20_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[11]~0 ; LCCOMB_X18_Y20_N2 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_C[7]~1 ; LCCOMB_X17_Y18_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_A[4]~0 ; LCCOMB_X17_Y25_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_B[4]~0 ; LCCOMB_X20_Y22_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_C[4]~0 ; LCCOMB_X21_Y27_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|NOISE_FREQ[4]~0 ; LCCOMB_X17_Y19_N26 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|OSC_A_OUT~1 ; LCCOMB_X17_Y25_N24 ; 39 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|VOL_ENV[3]~12 ; LCCOMB_X18_Y25_N10 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\NOISEGENERATOR:CLK_DIV[0]~0 ; LCCOMB_X16_Y24_N28 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\NOISEGENERATOR:CNT_NOISE[0]~0 ; LCCOMB_X16_Y24_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\NOISEGENERATOR:N_SHFT[16]~2 ; LCCOMB_X16_Y24_N24 ; 17 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG[7]~0 ; LCCOMB_X6_Y18_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|BITCNT~1 ; LCCOMB_X4_Y19_N12 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|DATA_REG[0]~1 ; LCCOMB_X5_Y18_N16 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|RCV_NEXT_STATE~0 ; LCCOMB_X2_Y21_N28 ; 7 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|SHIFT_REG[4]~1 ; LCCOMB_X5_Y17_N20 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|\CLKDIV:CLK_DIVCNT[5]~1 ; LCCOMB_X1_Y18_N16 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|BITCNT~1 ; LCCOMB_X1_Y19_N30 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG[2]~1 ; LCCOMB_X3_Y19_N4 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|SHIFT_REG[6]~1 ; LCCOMB_X2_Y19_N2 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|TR_STATE.IDLE ; FF_X1_Y20_N15 ; 13 ; Sync. clear ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|\CLKDIV:CLK_DIVCNT[4]~3 ; LCCOMB_X1_Y20_N26 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG[2]~1 ; LCCOMB_X7_Y18_N2 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|BITCNT~1 ; LCCOMB_X4_Y19_N18 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|DATA_REG[2]~1 ; LCCOMB_X5_Y16_N14 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|RCV_NEXT_STATE~0 ; LCCOMB_X3_Y17_N26 ; 6 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|SHIFT_REG[0]~1 ; LCCOMB_X4_Y17_N20 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|\CLKDIV:CLK_DIVCNT[4]~1 ; LCCOMB_X3_Y17_N22 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|BITCNT~1 ; LCCOMB_X5_Y20_N0 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG[0]~1 ; LCCOMB_X4_Y21_N6 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|SHIFT_REG[4]~1 ; LCCOMB_X5_Y21_N16 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|TR_STATE.IDLE ; FF_X6_Y19_N27 ; 12 ; Sync. clear ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|\CLKDIV:CLK_DIVCNT[2]~1 ; LCCOMB_X6_Y19_N28 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|AER[0]~0 ; LCCOMB_X14_Y18_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|DDR[0]~0 ; LCCOMB_X14_Y14_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO|GPDR[0]~0 ; LCCOMB_X14_Y15_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERA[0]~0 ; LCCOMB_X14_Y16_N4 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IERB[0]~0 ; LCCOMB_X14_Y16_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRA[0]~0 ; LCCOMB_X16_Y19_N0 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[0]~0 ; LCCOMB_X16_Y19_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_PASS[9]~5 ; LCCOMB_X17_Y21_N4 ; 10 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_STATE.REQUEST ; FF_X16_Y17_N3 ; 23 ; Sync. clear ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VECT_NUMBER[0]~7 ; LCCOMB_X17_Y17_N28 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VR[7]~0 ; LCCOMB_X16_Y16_N4 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|PRESCALE_A~0 ; LCCOMB_X6_Y20_N18 ; 8 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|PRESCALE_B~0 ; LCCOMB_X6_Y20_N8 ; 8 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|PRESCALE_C~0 ; LCCOMB_X3_Y20_N0 ; 8 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|PRESCALE_D~0 ; LCCOMB_X9_Y17_N6 ; 8 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TACR[0]~0 ; LCCOMB_X12_Y16_N22 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TADR[0]~0 ; LCCOMB_X8_Y20_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBCR[0]~0 ; LCCOMB_X10_Y18_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBDR[0]~0 ; LCCOMB_X7_Y17_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDCR[0]~0 ; LCCOMB_X12_Y18_N10 ; 6 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDR[0]~0 ; LCCOMB_X10_Y15_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TDDR[3]~0 ; LCCOMB_X4_Y15_N2 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMERC~1 ; LCCOMB_X10_Y15_N2 ; 8 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMERD~1 ; LCCOMB_X3_Y15_N4 ; 9 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_A[0]~0 ; LCCOMB_X10_Y18_N16 ; 10 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_B[0]~3 ; LCCOMB_X12_Y17_N4 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_C[0]~1 ; LCCOMB_X11_Y18_N18 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_D[0]~1 ; LCCOMB_X11_Y18_N16 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|XTAL_STRB ; FF_X3_Y20_N7 ; 44 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|RSR[1]~0 ; LCCOMB_X14_Y19_N26 ; 2 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|SCR[0]~0 ; LCCOMB_X14_Y22_N20 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|TSR[0]~1 ; LCCOMB_X14_Y19_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[3]~0 ; LCCOMB_X12_Y16_N8 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[7] ; FF_X14_Y20_N1 ; 19 ; Sync. clear, Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR[7]~3 ; LCCOMB_X11_Y19_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|BITCNT[0]~2 ; LCCOMB_X10_Y24_N14 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|SHIFT_REG[6]~1 ; LCCOMB_X10_Y22_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|\CLKDIV:CLK_DIVCNT[0]~0 ; LCCOMB_X3_Y27_N20 ; 5 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|BITCNT~1 ; LCCOMB_X14_Y23_N6 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|CLK_STRB ; FF_X2_Y27_N7 ; 15 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|SHIFTREG~0 ; LCCOMB_X12_Y21_N12 ; 7 ; Sync. load ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|SHIFT_REG[1]~8 ; LCCOMB_X12_Y23_N4 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|TX_END ; FF_X12_Y23_N17 ; 17 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|_~0 ; LCCOMB_X21_Y9_N28 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|valid_rdreq~1 ; LCCOMB_X23_Y7_N18 ; 20 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|valid_wrreq~1 ; LCCOMB_X18_Y18_N20 ; 18 ; Clock enable, Write enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|_~0 ; LCCOMB_X22_Y22_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|valid_rdreq~1 ; LCCOMB_X22_Y22_N4 ; 15 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|valid_wrreq~0 ; LCCOMB_X26_Y24_N4 ; 22 ; Clock enable, Write enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_10~0 ; LCCOMB_X20_Y16_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_11~0 ; LCCOMB_X20_Y16_N28 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_8~2 ; LCCOMB_X26_Y22_N14 ; 32 ; Async. clear ; yes ; Global Clock ; GCLK5 ; -- ;
-; MAIN_CLK ; PIN_G2 ; 2272 ; Clock ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CLEAR_FIFO_CNT ; FF_X23_Y12_N17 ; 26 ; Sync. load ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_REFRESH_SIG[3]~1 ; LCCOMB_X27_Y6_N0 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_LE[0]~4 ; LCCOMB_X22_Y2_N22 ; 32 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_LE[1]~2 ; LCCOMB_X34_Y2_N8 ; 32 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_LE[2]~3 ; LCCOMB_X21_Y4_N10 ; 32 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_LE[3] ; LCCOMB_X34_Y2_N24 ; 32 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_ADR_CNT[22]~40 ; LCCOMB_X26_Y8_N24 ; 23 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_H_D[7]~0 ; LCCOMB_X26_Y11_N20 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[7]~0 ; LCCOMB_X26_Y11_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[7]~0 ; LCCOMB_X25_Y11_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_X_D[2]~0 ; LCCOMB_X23_Y11_N24 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_CLUT_WR[1] ; LCCOMB_X25_Y16_N22 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_CLUT_WR[2] ; LCCOMB_X25_Y14_N26 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_CLUT_WR[3] ; LCCOMB_X25_Y16_N0 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[15]~3 ; LCCOMB_X22_Y19_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[23]~0 ; LCCOMB_X23_Y12_N4 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[31]~2 ; LCCOMB_X27_Y17_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[5]~1 ; LCCOMB_X23_Y18_N22 ; 6 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7]~6 ; LCCOMB_X28_Y18_N22 ; 2 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[15]~1 ; LCCOMB_X21_Y19_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[23]~0 ; LCCOMB_X29_Y14_N0 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[31]~2 ; LCCOMB_X23_Y14_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[7]~3 ; LCCOMB_X23_Y14_N0 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[15]~1 ; LCCOMB_X23_Y19_N24 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[23]~0 ; LCCOMB_X28_Y15_N4 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[31]~2 ; LCCOMB_X25_Y17_N16 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[7]~3 ; LCCOMB_X22_Y17_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[15]~1 ; LCCOMB_X21_Y19_N28 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[23]~0 ; LCCOMB_X28_Y15_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31]~2 ; LCCOMB_X28_Y17_N0 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[7]~3 ; LCCOMB_X28_Y17_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[15]~1 ; LCCOMB_X23_Y19_N0 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[23]~0 ; LCCOMB_X29_Y12_N18 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[31]~2 ; LCCOMB_X25_Y17_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[7]~3 ; LCCOMB_X25_Y17_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[15]~1 ; LCCOMB_X22_Y18_N16 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[23]~0 ; LCCOMB_X29_Y18_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[7]~2 ; LCCOMB_X23_Y18_N2 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; FF_X33_Y18_N13 ; 54 ; Sync. load ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; FF_X33_Y18_N15 ; 54 ; Sync. clear ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLR_FIFO ; FF_X29_Y21_N3 ; 34 ; Async. clear ; yes ; Global Clock ; GCLK11 ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DOP_FIFO_CLR ; FF_X36_Y17_N25 ; 21 ; Async. clear ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_CLUT_WR[0] ; LCCOMB_X23_Y16_N24 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_CLUT_WR[1] ; LCCOMB_X23_Y16_N8 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_CLUT_WR[3] ; LCCOMB_X23_Y16_N18 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[10]~3 ; LCCOMB_X28_Y16_N22 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[7]~1 ; LCCOMB_X28_Y16_N16 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; FF_X37_Y20_N27 ; 141 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; FF_X33_Y12_N25 ; 30 ; Clock enable, Sync. clear ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK ; LCCOMB_X26_Y18_N4 ; 3 ; Clock ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK ; LCCOMB_X26_Y18_N4 ; 850 ; Clock ; yes ; Global Clock ; GCLK6 ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ST_CLUT_WR[0] ; LCCOMB_X26_Y13_N18 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ST_CLUT_WR[1] ; LCCOMB_X21_Y13_N14 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ST_SHIFT_MODE[1]~0 ; LCCOMB_X29_Y17_N18 ; 2 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SUB_PIXEL_CNT[6]~7 ; LCCOMB_X35_Y17_N16 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYNC_PIX ; FF_X34_Y14_N13 ; 10 ; Sync. clear ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYS_CTR[6]~0 ; LCCOMB_X26_Y16_N6 ; 6 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[11]~1 ; LCCOMB_X30_Y13_N14 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[7]~0 ; LCCOMB_X30_Y13_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[11]~1 ; LCCOMB_X30_Y10_N2 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[7]~0 ; LCCOMB_X29_Y10_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[11]~1 ; LCCOMB_X30_Y10_N12 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[7]~0 ; LCCOMB_X29_Y10_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[11]~1 ; LCCOMB_X33_Y13_N12 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[7]~0 ; LCCOMB_X33_Y13_N2 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[11]~1 ; LCCOMB_X30_Y12_N28 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[7]~0 ; LCCOMB_X30_Y12_N0 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[11]~1 ; LCCOMB_X29_Y14_N22 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[7]~0 ; LCCOMB_X26_Y12_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[15]~1 ; LCCOMB_X26_Y17_N2 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LOF[7]~0 ; LCCOMB_X27_Y15_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[15]~3 ; LCCOMB_X26_Y17_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_LWD[7]~2 ; LCCOMB_X26_Y15_N16 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[10]~1 ; LCCOMB_X30_Y15_N4 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[7]~0 ; LCCOMB_X29_Y15_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[10]~1 ; LCCOMB_X25_Y13_N18 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[7]~0 ; LCCOMB_X30_Y13_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[7]~0 ; LCCOMB_X26_Y18_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[8]~1 ; LCCOMB_X26_Y13_N20 ; 1 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[10]~1 ; LCCOMB_X29_Y14_N20 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[7]~0 ; LCCOMB_X29_Y13_N4 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[10]~1 ; LCCOMB_X30_Y15_N30 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[7]~0 ; LCCOMB_X29_Y16_N18 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[10]~1 ; LCCOMB_X26_Y14_N6 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[7]~0 ; LCCOMB_X27_Y16_N2 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[3]~0 ; LCCOMB_X25_Y18_N26 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[10]~1 ; LCCOMB_X27_Y18_N20 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[7]~0 ; LCCOMB_X26_Y16_N0 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[7]~3 ; LCCOMB_X27_Y18_N6 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~92 ; LCCOMB_X28_Y20_N4 ; 10 ; Sync. clear ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|inst37 ; LCCOMB_X66_Y4_N2 ; 32 ; Output enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|inst65~0 ; LCCOMB_X37_Y20_N28 ; 34 ; Clock enable, Write enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|inst67 ; LCCOMB_X37_Y17_N12 ; 1 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|inst90 ; DDIOOECELL_X63_Y0_N12 ; 1 ; Output enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_1 ; DDIOOECELL_X67_Y11_N12 ; 1 ; Output enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_2 ; DDIOOECELL_X52_Y0_N26 ; 1 ; Output enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_3 ; DDIOOECELL_X43_Y0_N19 ; 1 ; Output enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|inst95 ; FF_X39_Y18_N21 ; 128 ; Sync. load ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|_~0 ; LCCOMB_X36_Y20_N2 ; 6 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_9d9:wraclr|dffe20a[0] ; FF_X57_Y17_N21 ; 72 ; Async. clear ; yes ; Global Clock ; GCLK9 ; -- ;
-; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|valid_wrreq~0 ; LCCOMB_X57_Y17_N14 ; 14 ; Clock enable, Write enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; FF_X45_Y15_N1 ; 258 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; FF_X18_Y13_N29 ; 64 ; Clock enable ; no ; -- ; -- ; -- ;
-; Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; FF_X18_Y13_N3 ; 33 ; Clock enable ; no ; -- ; -- ; -- ;
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; PLL_3 ; 52 ; Clock ; yes ; Global Clock ; GCLK14 ; -- ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; PLL_1 ; 691 ; Clock ; yes ; Global Clock ; GCLK3 ; -- ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; PLL_1 ; 96 ; Clock ; yes ; Global Clock ; GCLK1 ; -- ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; PLL_1 ; 5 ; Clock ; yes ; Global Clock ; GCLK0 ; -- ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; PLL_1 ; 41 ; Clock ; yes ; Global Clock ; GCLK2 ; -- ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; PLL_1 ; 189 ; Clock, Latch enable ; yes ; Global Clock ; GCLK4 ; -- ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; PLL_4 ; 7 ; Clock ; yes ; Global Clock ; GCLK16 ; -- ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; PLL_4 ; 585 ; Clock ; yes ; Global Clock ; GCLK17 ; -- ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; PLL_4 ; 4 ; Clock ; yes ; Global Clock ; GCLK18 ; -- ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] ; PLL_4 ; 2 ; Clock ; yes ; Global Clock ; GCLK19 ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|_~1 ; LCCOMB_X23_Y26_N8 ; 1 ; Async. clear ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|busy ; LCCOMB_X22_Y25_N2 ; 15 ; Clock enable ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|input_latch_enable~0 ; LCCOMB_X22_Y26_N10 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated|counter_reg_bit[7]~0 ; LCCOMB_X14_Y25_N0 ; 8 ; Sync. load ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13|cntr_qij:auto_generated|_~0 ; LCCOMB_X19_Y28_N4 ; 14 ; Clock enable ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated|counter_reg_bit[7]~0 ; LCCOMB_X21_Y29_N18 ; 8 ; Sync. load ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated|_~9 ; LCCOMB_X21_Y27_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated|counter_reg_bit[7]~0 ; LCCOMB_X18_Y29_N18 ; 8 ; Sync. load ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated|_~0 ; LCCOMB_X21_Y26_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|power_up~4 ; LCCOMB_X21_Y26_N10 ; 6 ; Clock enable ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|power_up~5 ; LCCOMB_X21_Y27_N12 ; 5 ; Sync. load ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_counter_state~0 ; LCCOMB_X21_Y29_N6 ; 16 ; Sync. load ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_counter_state~1 ; LCCOMB_X18_Y29_N24 ; 13 ; Clock enable ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_seq_ena_state ; FF_X22_Y29_N31 ; 13 ; Sync. load ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|scan_cache_write_enable~0 ; LCCOMB_X20_Y26_N4 ; 3 ; Write enable ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[17]~3 ; LCCOMB_X22_Y23_N2 ; 18 ; Clock enable ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg_clear~0 ; LCCOMB_X22_Y27_N28 ; 35 ; Sync. clear, Sync. load ; no ; -- ; -- ; -- ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|tmp_nominal_data_out_state ; FF_X21_Y25_N29 ; 10 ; Sync. load ; no ; -- ; -- ; -- ;
-; inst25 ; LCCOMB_X15_Y23_N20 ; 1027 ; Async. clear, Async. load ; yes ; Global Clock ; GCLK10 ; -- ;
-; inst25 ; LCCOMB_X15_Y23_N20 ; 119 ; Clock enable, Sync. clear, Sync. load ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|ACHTELSEKUNDEN[2]~0 ; LCCOMB_X1_Y13_N6 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|ACP_CONF[15]~3 ; LCCOMB_X16_Y11_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|ACP_CONF[23]~1 ; LCCOMB_X11_Y13_N28 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|ACP_CONF[31]~0 ; LCCOMB_X16_Y11_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|ACP_CONF[7]~4 ; LCCOMB_X15_Y11_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CLEAR[0] ; FF_X17_Y10_N9 ; 1 ; Async. clear ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CLEAR[1] ; FF_X17_Y10_N31 ; 1 ; Async. clear ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CLEAR[2] ; FF_X17_Y10_N1 ; 1 ; Async. clear ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CLEAR[3] ; FF_X17_Y10_N23 ; 1 ; Async. clear ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CLEAR[4] ; FF_X17_Y10_N21 ; 1 ; Async. clear ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CLEAR[5] ; FF_X17_Y10_N11 ; 1 ; Async. clear ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CLEAR[6] ; FF_X17_Y10_N25 ; 1 ; Async. clear ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CLEAR[8] ; FF_X17_Y10_N15 ; 1 ; Async. clear ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CLEAR[9] ; FF_X17_Y10_N29 ; 1 ; Async. clear ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CTR[15]~2 ; LCCOMB_X15_Y15_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CTR[23]~1 ; LCCOMB_X12_Y11_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CTR[31]~3 ; LCCOMB_X18_Y12_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_CTR[7]~0 ; LCCOMB_X15_Y13_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_ENA[15]~2 ; LCCOMB_X15_Y15_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_ENA[23]~1 ; LCCOMB_X12_Y13_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_ENA[31]~0 ; LCCOMB_X16_Y13_N24 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_ENA[7]~3 ; LCCOMB_X15_Y13_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_LATCH[0]~26 ; LCCOMB_X14_Y13_N30 ; 1 ; Clock ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_LATCH[1]~25 ; LCCOMB_X15_Y11_N22 ; 1 ; Clock ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_LATCH[2]~24 ; LCCOMB_X15_Y11_N6 ; 1 ; Clock ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_LATCH[3]~23 ; LCCOMB_X15_Y10_N6 ; 1 ; Clock ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_LATCH[4]~22 ; LCCOMB_X14_Y13_N20 ; 1 ; Clock ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_LATCH[5]~21 ; LCCOMB_X15_Y11_N0 ; 1 ; Clock ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_LATCH[6]~20 ; LCCOMB_X15_Y12_N26 ; 1 ; Clock ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_LATCH[8]~19 ; LCCOMB_X15_Y15_N6 ; 1 ; Clock ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|INT_LATCH[9]~18 ; LCCOMB_X15_Y15_N16 ; 1 ; Clock ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|RTC_ADR[5]~0 ; LCCOMB_X8_Y12_N24 ; 6 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[0][0]~1 ; LCCOMB_X6_Y15_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[0][13]~14 ; LCCOMB_X4_Y14_N22 ; 1 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[0][2]~4 ; LCCOMB_X7_Y15_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][10]~10 ; LCCOMB_X7_Y14_N4 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][11]~77 ; LCCOMB_X1_Y13_N26 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][12]~11 ; LCCOMB_X8_Y13_N18 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][13]~13 ; LCCOMB_X6_Y14_N18 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][14]~15 ; LCCOMB_X7_Y14_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][15]~16 ; LCCOMB_X11_Y13_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][16]~17 ; LCCOMB_X4_Y13_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][17]~18 ; LCCOMB_X3_Y11_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][18]~19 ; LCCOMB_X2_Y14_N18 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][19]~20 ; LCCOMB_X2_Y13_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][1]~2 ; LCCOMB_X7_Y13_N28 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][20]~21 ; LCCOMB_X2_Y13_N16 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][21]~22 ; LCCOMB_X3_Y14_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][22]~23 ; LCCOMB_X2_Y14_N20 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][23]~24 ; LCCOMB_X3_Y10_N20 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][24]~25 ; LCCOMB_X3_Y10_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][25]~26 ; LCCOMB_X2_Y12_N18 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][26]~27 ; LCCOMB_X2_Y12_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][27]~28 ; LCCOMB_X4_Y9_N24 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][28]~29 ; LCCOMB_X4_Y13_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][29]~30 ; LCCOMB_X3_Y11_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][30]~31 ; LCCOMB_X3_Y12_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][31]~32 ; LCCOMB_X5_Y12_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][32]~33 ; LCCOMB_X4_Y10_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][33]~34 ; LCCOMB_X8_Y10_N20 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][34]~35 ; LCCOMB_X8_Y10_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][35]~36 ; LCCOMB_X4_Y10_N0 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][36]~37 ; LCCOMB_X2_Y10_N18 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][37]~38 ; LCCOMB_X2_Y10_N24 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][38]~39 ; LCCOMB_X7_Y10_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][39]~40 ; LCCOMB_X4_Y10_N2 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][3]~5 ; LCCOMB_X6_Y13_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][40]~41 ; LCCOMB_X6_Y9_N24 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][41]~42 ; LCCOMB_X5_Y13_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][42]~43 ; LCCOMB_X6_Y9_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][43]~44 ; LCCOMB_X9_Y11_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][44]~45 ; LCCOMB_X10_Y11_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][45]~46 ; LCCOMB_X10_Y10_N28 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][46]~47 ; LCCOMB_X10_Y10_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][47]~48 ; LCCOMB_X9_Y13_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][48]~49 ; LCCOMB_X9_Y13_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][49]~50 ; LCCOMB_X9_Y10_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][50]~51 ; LCCOMB_X9_Y10_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][51]~52 ; LCCOMB_X8_Y9_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][52]~53 ; LCCOMB_X7_Y9_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][53]~54 ; LCCOMB_X11_Y9_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][54]~55 ; LCCOMB_X10_Y9_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][55]~56 ; LCCOMB_X10_Y11_N20 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][56]~57 ; LCCOMB_X10_Y9_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][57]~58 ; LCCOMB_X8_Y12_N8 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][58]~59 ; LCCOMB_X8_Y12_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][59]~60 ; LCCOMB_X9_Y12_N24 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][5]~9 ; LCCOMB_X6_Y14_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][60]~61 ; LCCOMB_X5_Y12_N26 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][61]~62 ; LCCOMB_X5_Y12_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][62]~63 ; LCCOMB_X12_Y12_N16 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|WERTE[7][63]~64 ; LCCOMB_X11_Y12_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|_~503 ; LCCOMB_X6_Y11_N18 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|_~504 ; LCCOMB_X5_Y11_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|_~505 ; LCCOMB_X4_Y14_N28 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; interrupt_handler:nobody|_~506 ; LCCOMB_X7_Y13_N22 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------+---------+---------------------------------------+--------+----------------------+------------------+---------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Global & Other Fast Signals ;
-+---------------------------------------------------------------------------------------------------------------------------+--------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+
-; Name ; Location ; Fan-Out ; Fan-Out Using Intentional Clock Skew ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
-+---------------------------------------------------------------------------------------------------------------------------+--------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+
-; CLK33M ; PIN_AB12 ; 12 ; 0 ; Global Clock ; GCLK15 ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|CLR_FIFO ; LCCOMB_X26_Y22_N16 ; 250 ; 0 ; Global Clock ; GCLK7 ; -- ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_8~2 ; LCCOMB_X26_Y22_N14 ; 32 ; 0 ; Global Clock ; GCLK5 ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLR_FIFO ; FF_X29_Y21_N3 ; 34 ; 0 ; Global Clock ; GCLK11 ; -- ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK ; LCCOMB_X26_Y18_N4 ; 850 ; 0 ; Global Clock ; GCLK6 ; -- ;
-; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_9d9:wraclr|dffe20a[0] ; FF_X57_Y17_N21 ; 72 ; 0 ; Global Clock ; GCLK9 ; -- ;
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; PLL_3 ; 52 ; 0 ; Global Clock ; GCLK14 ; -- ;
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[1] ; PLL_3 ; 1 ; 0 ; Global Clock ; GCLK12 ; -- ;
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[2] ; PLL_3 ; 1 ; 0 ; Global Clock ; GCLK13 ; -- ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; PLL_1 ; 691 ; 0 ; Global Clock ; GCLK3 ; -- ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; PLL_1 ; 96 ; 0 ; Global Clock ; GCLK1 ; -- ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; PLL_1 ; 5 ; 0 ; Global Clock ; GCLK0 ; -- ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; PLL_1 ; 41 ; 0 ; Global Clock ; GCLK2 ; -- ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; PLL_1 ; 189 ; 0 ; Global Clock ; GCLK4 ; -- ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; PLL_4 ; 7 ; 0 ; Global Clock ; GCLK16 ; -- ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; PLL_4 ; 585 ; 0 ; Global Clock ; GCLK17 ; -- ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; PLL_4 ; 4 ; 0 ; Global Clock ; GCLK18 ; -- ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] ; PLL_4 ; 2 ; 0 ; Global Clock ; GCLK19 ; -- ;
-; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; PLL_2 ; 1 ; 0 ; Global Clock ; GCLK8 ; -- ;
-; inst25 ; LCCOMB_X15_Y23_N20 ; 1027 ; 0 ; Global Clock ; GCLK10 ; -- ;
-+---------------------------------------------------------------------------------------------------------------------------+--------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------+
-; Non-Global High Fan-Out Signals ;
-+-----------------------------------------------------------------------------------------------------------------------------------+---------+
-; Name ; Fan-Out ;
-+-----------------------------------------------------------------------------------------------------------------------------------+---------+
-; MAIN_CLK~input ; 2272 ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[0] ; 385 ;
-; Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; 258 ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[2] ; 257 ;
-; nFB_WR~input ; 235 ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[1] ; 225 ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; 208 ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[5] ; 161 ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; 158 ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[26] ; 156 ;
-; FB_AD[17]~input ; 145 ;
-; FB_AD[18]~input ; 145 ;
-; FB_AD[20]~input ; 144 ;
-; FB_AD[16]~input ; 143 ;
-; FB_AD[19]~input ; 143 ;
-; FB_AD[21]~input ; 143 ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; 141 ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; 141 ;
-; FB_AD[22]~input ; 140 ;
-; FB_AD[23]~input ; 137 ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[0] ; 132 ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[1] ; 132 ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[3] ; 129 ;
-; Video:Fredi_Aschwanden|inst95 ; 128 ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2] ; 120 ;
-; inst25 ; 118 ;
-; nFB_OE~input ; 101 ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[3] ; 97 ;
-; nFB_CS2~input ; 95 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|Selector68~47 ; 88 ;
-; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[4] ; 83 ;
-; interrupt_handler:nobody|RTC_ADR[4] ; 80 ;
-; interrupt_handler:nobody|RTC_ADR[5] ; 79 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|ROLL_OVER ; 78 ;
-; interrupt_handler:nobody|UHR_DS~5 ; 71 ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE_CS~1 ; 68 ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[2] ; 66 ;
-; interrupt_handler:nobody|UHR_DS~6 ; 66 ;
-; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; 65 ;
-; Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; 64 ;
-; FB_AD[24]~input ; 63 ;
-; interrupt_handler:nobody|RTC_ADR[3] ; 62 ;
-; interrupt_handler:nobody|RTC_ADR[2] ; 62 ;
-; interrupt_handler:nobody|RTC_ADR[1] ; 62 ;
-; interrupt_handler:nobody|RTC_ADR[0] ; 62 ;
-; ~GND ; 61 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|DEC_STATE ; 60 ;
-; nFB_CS1~input ; 59 ;
-; FB_AD[25]~input ; 59 ;
-; FB_AD[26]~input ; 57 ;
-+-----------------------------------------------------------------------------------------------------------------------------------+---------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter RAM Summary ;
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+------+--------------------------------------------------------------------------------------------------------------------------------+
-; Name ; Type ; Mode ; Clock Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size ; Implementation Port A Depth ; Implementation Port A Width ; Implementation Port B Depth ; Implementation Port B Width ; Implementation Bits ; M9Ks ; MIF ; Location ;
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+------+--------------------------------------------------------------------------------------------------------------------------------+
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 1024 ; 8 ; 256 ; 32 ; yes ; no ; yes ; yes ; 8192 ; 1024 ; 8 ; 256 ; 32 ; 8192 ; 1 ; None ; M9K_X24_Y11_N0 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 256 ; 32 ; 1024 ; 8 ; yes ; no ; yes ; yes ; 8192 ; 256 ; 32 ; 1024 ; 8 ; 8192 ; 1 ; None ; M9K_X24_Y21_N0 ;
-; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; Dual Clocks ; 16 ; 3 ; 16 ; 3 ; yes ; yes ; yes ; yes ; 48 ; 16 ; 3 ; 16 ; 3 ; 48 ; 1 ; None ; M9K_X24_Y15_N0 ;
-; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; Dual Clocks ; 16 ; 3 ; 16 ; 3 ; yes ; yes ; yes ; yes ; 48 ; 16 ; 3 ; 16 ; 3 ; 48 ; 1 ; None ; M9K_X24_Y15_N0 ;
-; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; Dual Clocks ; 16 ; 3 ; 16 ; 3 ; yes ; yes ; yes ; yes ; 48 ; 16 ; 3 ; 16 ; 3 ; 48 ; 1 ; None ; M9K_X24_Y13_N0 ;
-; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; Dual Clocks ; 256 ; 6 ; 256 ; 6 ; yes ; yes ; yes ; yes ; 1536 ; 256 ; 6 ; 256 ; 6 ; 1536 ; 1 ; None ; M9K_X24_Y20_N0 ;
-; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; Dual Clocks ; 256 ; 6 ; 256 ; 6 ; yes ; yes ; yes ; yes ; 1536 ; 256 ; 6 ; 256 ; 6 ; 1536 ; 1 ; None ; M9K_X24_Y19_N0 ;
-; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; Dual Clocks ; 256 ; 6 ; 256 ; 6 ; yes ; yes ; yes ; yes ; 1536 ; 256 ; 6 ; 256 ; 6 ; 1536 ; 1 ; None ; M9K_X24_Y17_N0 ;
-; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; Dual Clocks ; 256 ; 8 ; 256 ; 8 ; yes ; yes ; yes ; yes ; 2048 ; 256 ; 8 ; 256 ; 8 ; 2048 ; 1 ; None ; M9K_X24_Y14_N0 ;
-; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; Dual Clocks ; 256 ; 8 ; 256 ; 8 ; yes ; yes ; yes ; yes ; 2048 ; 256 ; 8 ; 256 ; 8 ; 2048 ; 1 ; None ; M9K_X24_Y16_N0 ;
-; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; Dual Clocks ; 256 ; 8 ; 256 ; 8 ; yes ; yes ; yes ; yes ; 2048 ; 256 ; 8 ; 256 ; 8 ; 2048 ; 1 ; None ; M9K_X24_Y18_N0 ;
-; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 128 ; 128 ; 128 ; 128 ; yes ; no ; yes ; no ; 16384 ; 128 ; 128 ; 128 ; 128 ; 16384 ; 4 ; None ; M9K_X40_Y19_N0, M9K_X40_Y20_N0, M9K_X40_Y21_N0, M9K_X40_Y22_N0 ;
-; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 512 ; 128 ; 512 ; 128 ; yes ; no ; yes ; yes ; 65536 ; 512 ; 128 ; 512 ; 128 ; 65536 ; 8 ; None ; M9K_X40_Y16_N0, M9K_X40_Y15_N0, M9K_X58_Y16_N0, M9K_X58_Y17_N0, M9K_X40_Y17_N0, M9K_X40_Y14_N0, M9K_X40_Y13_N0, M9K_X40_Y18_N0 ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4|altsyncram_46r:auto_generated|ALTSYNCRAM ; AUTO ; Single Port ; Single Clock ; 144 ; 1 ; -- ; -- ; yes ; no ; -- ; -- ; 144 ; 144 ; 1 ; -- ; -- ; 144 ; 1 ; None ; M9K_X24_Y25_N0 ;
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+------+--------------------------------------------------------------------------------------------------------------------------------+
-Note: Fitter may spread logical memories into multiple blocks to improve timing. The actual required RAM blocks can be found in the Fitter Resource Usage section.
-
-
-+-----------------------------------------------------------------------------------------------+
-; Fitter DSP Block Usage Summary ;
-+---------------------------------------+-------------+---------------------+-------------------+
-; Statistic ; Number Used ; Available per Block ; Maximum Available ;
-+---------------------------------------+-------------+---------------------+-------------------+
-; Simple Multipliers (9-bit) ; 0 ; 2 ; 252 ;
-; Simple Multipliers (18-bit) ; 3 ; 1 ; 126 ;
-; Embedded Multiplier Blocks ; 3 ; -- ; 126 ;
-; Embedded Multiplier 9-bit elements ; 6 ; 2 ; 252 ;
-; Signed Embedded Multipliers ; 0 ; -- ; -- ;
-; Unsigned Embedded Multipliers ; 3 ; -- ; -- ;
-; Mixed Sign Embedded Multipliers ; 0 ; -- ; -- ;
-; Variable Sign Embedded Multipliers ; 0 ; -- ; -- ;
-; Dedicated Input Shift Register Chains ; 0 ; -- ; -- ;
-+---------------------------------------+-------------+---------------------+-------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; DSP Block Details ;
-+------------------------------------------------------------------------------------------------------------------------+----------------------------+--------------------+---------------------+--------------------------------+-----------------------+-----------------------+-------------------+-----------------+
-; Name ; Mode ; Location ; Sign Representation ; Has Input Shift Register Chain ; Data A Input Register ; Data B Input Register ; Pipeline Register ; Output Register ;
-+------------------------------------------------------------------------------------------------------------------------+----------------------------+--------------------+---------------------+--------------------------------+-----------------------+-----------------------+-------------------+-----------------+
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14|mult_cat:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X31_Y14_N2 ; ; No ; ; ; ; no ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14|mult_cat:auto_generated|mac_mult1 ; ; DSPMULT_X31_Y14_N0 ; Unsigned ; ; no ; no ; no ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6|mult_aat:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X31_Y10_N2 ; ; No ; ; ; ; no ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6|mult_aat:auto_generated|mac_mult1 ; ; DSPMULT_X31_Y10_N0 ; Unsigned ; ; no ; no ; no ; ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_12|mult_aat:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X31_Y12_N2 ; ; No ; ; ; ; no ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_12|mult_aat:auto_generated|mac_mult1 ; ; DSPMULT_X31_Y12_N0 ; Unsigned ; ; no ; no ; no ; ;
-+------------------------------------------------------------------------------------------------------------------------+----------------------------+--------------------+---------------------+--------------------------------+-----------------------+-----------------------+-------------------+-----------------+
-
-
-+--------------------------------------------------------+
-; Interconnect Usage Summary ;
-+----------------------------+---------------------------+
-; Interconnect Resource Type ; Usage ;
-+----------------------------+---------------------------+
-; Block interconnects ; 16,358 / 116,715 ( 14 % ) ;
-; C16 interconnects ; 749 / 3,886 ( 19 % ) ;
-; C4 interconnects ; 10,626 / 73,752 ( 14 % ) ;
-; Direct links ; 2,046 / 116,715 ( 2 % ) ;
-; Global clocks ; 20 / 20 ( 100 % ) ;
-; Local interconnects ; 4,734 / 39,600 ( 12 % ) ;
-; R24 interconnects ; 882 / 3,777 ( 23 % ) ;
-; R4 interconnects ; 11,442 / 99,858 ( 11 % ) ;
-+----------------------------+---------------------------+
-
-
-+-----------------------------------------------------------------------------+
-; LAB Logic Elements ;
-+---------------------------------------------+-------------------------------+
-; Number of Logic Elements (Average = 12.60) ; Number of LABs (Total = 756) ;
-+---------------------------------------------+-------------------------------+
-; 1 ; 41 ;
-; 2 ; 20 ;
-; 3 ; 22 ;
-; 4 ; 11 ;
-; 5 ; 13 ;
-; 6 ; 12 ;
-; 7 ; 15 ;
-; 8 ; 13 ;
-; 9 ; 13 ;
-; 10 ; 30 ;
-; 11 ; 23 ;
-; 12 ; 32 ;
-; 13 ; 29 ;
-; 14 ; 47 ;
-; 15 ; 59 ;
-; 16 ; 376 ;
-+---------------------------------------------+-------------------------------+
-
-
-+--------------------------------------------------------------------+
-; LAB-wide Signals ;
-+------------------------------------+-------------------------------+
-; LAB-wide Signals (Average = 1.78) ; Number of LABs (Total = 756) ;
-+------------------------------------+-------------------------------+
-; 1 Async. clear ; 239 ;
-; 1 Clock ; 631 ;
-; 1 Clock enable ; 289 ;
-; 1 Sync. clear ; 20 ;
-; 1 Sync. load ; 26 ;
-; 2 Async. clears ; 12 ;
-; 2 Clock enables ; 84 ;
-; 2 Clocks ; 41 ;
-+------------------------------------+-------------------------------+
-
-
-+------------------------------------------------------------------------------+
-; LAB Signals Sourced ;
-+----------------------------------------------+-------------------------------+
-; Number of Signals Sourced (Average = 18.19) ; Number of LABs (Total = 756) ;
-+----------------------------------------------+-------------------------------+
-; 0 ; 0 ;
-; 1 ; 19 ;
-; 2 ; 26 ;
-; 3 ; 12 ;
-; 4 ; 16 ;
-; 5 ; 8 ;
-; 6 ; 14 ;
-; 7 ; 5 ;
-; 8 ; 11 ;
-; 9 ; 8 ;
-; 10 ; 14 ;
-; 11 ; 9 ;
-; 12 ; 20 ;
-; 13 ; 17 ;
-; 14 ; 15 ;
-; 15 ; 30 ;
-; 16 ; 49 ;
-; 17 ; 41 ;
-; 18 ; 43 ;
-; 19 ; 30 ;
-; 20 ; 42 ;
-; 21 ; 35 ;
-; 22 ; 49 ;
-; 23 ; 45 ;
-; 24 ; 31 ;
-; 25 ; 31 ;
-; 26 ; 27 ;
-; 27 ; 28 ;
-; 28 ; 20 ;
-; 29 ; 17 ;
-; 30 ; 18 ;
-; 31 ; 10 ;
-; 32 ; 16 ;
-+----------------------------------------------+-------------------------------+
-
-
-+---------------------------------------------------------------------------------+
-; LAB Signals Sourced Out ;
-+-------------------------------------------------+-------------------------------+
-; Number of Signals Sourced Out (Average = 8.27) ; Number of LABs (Total = 756) ;
-+-------------------------------------------------+-------------------------------+
-; 0 ; 1 ;
-; 1 ; 61 ;
-; 2 ; 48 ;
-; 3 ; 47 ;
-; 4 ; 43 ;
-; 5 ; 40 ;
-; 6 ; 51 ;
-; 7 ; 50 ;
-; 8 ; 53 ;
-; 9 ; 71 ;
-; 10 ; 46 ;
-; 11 ; 45 ;
-; 12 ; 51 ;
-; 13 ; 46 ;
-; 14 ; 26 ;
-; 15 ; 25 ;
-; 16 ; 19 ;
-; 17 ; 5 ;
-; 18 ; 9 ;
-; 19 ; 6 ;
-; 20 ; 4 ;
-; 21 ; 1 ;
-; 22 ; 2 ;
-; 23 ; 0 ;
-; 24 ; 3 ;
-; 25 ; 2 ;
-; 26 ; 0 ;
-; 27 ; 1 ;
-+-------------------------------------------------+-------------------------------+
-
-
-+------------------------------------------------------------------------------+
-; LAB Distinct Inputs ;
-+----------------------------------------------+-------------------------------+
-; Number of Distinct Inputs (Average = 18.51) ; Number of LABs (Total = 756) ;
-+----------------------------------------------+-------------------------------+
-; 0 ; 0 ;
-; 1 ; 1 ;
-; 2 ; 22 ;
-; 3 ; 24 ;
-; 4 ; 30 ;
-; 5 ; 15 ;
-; 6 ; 15 ;
-; 7 ; 23 ;
-; 8 ; 16 ;
-; 9 ; 20 ;
-; 10 ; 17 ;
-; 11 ; 19 ;
-; 12 ; 16 ;
-; 13 ; 20 ;
-; 14 ; 18 ;
-; 15 ; 17 ;
-; 16 ; 19 ;
-; 17 ; 34 ;
-; 18 ; 26 ;
-; 19 ; 19 ;
-; 20 ; 27 ;
-; 21 ; 33 ;
-; 22 ; 35 ;
-; 23 ; 33 ;
-; 24 ; 33 ;
-; 25 ; 30 ;
-; 26 ; 30 ;
-; 27 ; 21 ;
-; 28 ; 15 ;
-; 29 ; 16 ;
-; 30 ; 26 ;
-; 31 ; 28 ;
-; 32 ; 29 ;
-; 33 ; 25 ;
-; 34 ; 4 ;
-+----------------------------------------------+-------------------------------+
-
-
-+------------------------------------------+
-; I/O Rules Summary ;
-+----------------------------------+-------+
-; I/O Rules Statistic ; Total ;
-+----------------------------------+-------+
-; Total I/O Rules ; 30 ;
-; Number of I/O Rules Passed ; 17 ;
-; Number of I/O Rules Failed ; 0 ;
-; Number of I/O Rules Unchecked ; 0 ;
-; Number of I/O Rules Inapplicable ; 13 ;
-+----------------------------------+-------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; I/O Rules Details ;
-+--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
-; Status ; ID ; Category ; Rule Description ; Severity ; Information ; Area ; Extra Information ;
-+--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
-; Pass ; IO_000001 ; Capacity Checks ; Number of pins in an I/O bank should not exceed the number of locations available. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000002 ; Capacity Checks ; Number of clocks in an I/O bank should not exceed the number of clocks available. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000003 ; Capacity Checks ; Number of pins in a Vrefgroup should not exceed the number of locations available. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000004 ; Voltage Compatibility Checks ; The I/O bank should support the requested VCCIO. ; Critical ; No IOBANK_VCCIO assignments found. ; I/O ; ;
-; Inapplicable ; IO_000005 ; Voltage Compatibility Checks ; The I/O bank should not have competing VREF values. ; Critical ; No VREF I/O Standard assignments found. ; I/O ; ;
-; Pass ; IO_000006 ; Voltage Compatibility Checks ; The I/O bank should not have competing VCCIO values. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000007 ; Valid Location Checks ; Checks for unavailable locations. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000008 ; Valid Location Checks ; Checks for reserved locations. ; Critical ; No reserved LogicLock region found. ; I/O ; ;
-; Pass ; IO_000009 ; I/O Properties Checks for One I/O ; The location should support the requested I/O standard. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000010 ; I/O Properties Checks for One I/O ; The location should support the requested I/O direction. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000011 ; I/O Properties Checks for One I/O ; The location should support the requested Current Strength. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000012 ; I/O Properties Checks for One I/O ; The location should support the requested On Chip Termination value. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000013 ; I/O Properties Checks for One I/O ; The location should support the requested Bus Hold value. ; Critical ; No Enable Bus-Hold Circuitry assignments found. ; I/O ; ;
-; Inapplicable ; IO_000014 ; I/O Properties Checks for One I/O ; The location should support the requested Weak Pull Up value. ; Critical ; No Weak Pull-Up Resistor assignments found. ; I/O ; ;
-; Pass ; IO_000015 ; I/O Properties Checks for One I/O ; The location should support the requested PCI Clamp Diode. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000018 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Current Strength. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000019 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested On Chip Termination value. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000020 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested PCI Clamp Diode. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000021 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Weak Pull Up value. ; Critical ; No Weak Pull-Up Resistor assignments found. ; I/O ; ;
-; Inapplicable ; IO_000022 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Bus Hold value. ; Critical ; No Enable Bus-Hold Circuitry assignments found. ; I/O ; ;
-; Pass ; IO_000023 ; I/O Properties Checks for One I/O ; The I/O standard should support the Open Drain value. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000024 ; I/O Properties Checks for One I/O ; The I/O direction should support the On Chip Termination value. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000026 ; I/O Properties Checks for One I/O ; On Chip Termination and Current Strength should not be used at the same time. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000027 ; I/O Properties Checks for One I/O ; Weak Pull Up and Bus Hold should not be used at the same time. ; Critical ; No Enable Bus-Hold Circuitry or Weak Pull-Up Resistor assignments found. ; I/O ; ;
-; Inapplicable ; IO_000045 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Slew Rate value. ; Critical ; No Slew Rate assignments found. ; I/O ; ;
-; Inapplicable ; IO_000046 ; I/O Properties Checks for One I/O ; The location should support the requested Slew Rate value. ; Critical ; No Slew Rate assignments found. ; I/O ; ;
-; Inapplicable ; IO_000047 ; I/O Properties Checks for One I/O ; On Chip Termination and Slew Rate should not be used at the same time. ; Critical ; No Slew Rate assignments found. ; I/O ; ;
-; Pass ; IO_000033 ; Electromigration Checks ; Current density for consecutive I/Os should not exceed 240mA for row I/Os and 240mA for column I/Os. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000034 ; SI Related Distance Checks ; Single-ended outputs should be 5 LAB row(s) away from a differential I/O. ; High ; No Differential I/O Standard assignments found. ; I/O ; ;
-; Inapplicable ; IO_000042 ; SI Related SSO Limit Checks ; No more than 20 outputs are allowed in a VREF group when VREF is being read from. ; High ; No VREF I/O Standard assignments found. ; I/O ; ;
-; ---- ; ---- ; Disclaimer ; OCT rules are checked but not reported. ; None ; ---- ; On Chip Termination ; ;
-+--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; I/O Rules Matrix ;
-+--------------------+-----------+--------------+-----------+--------------+--------------+-----------+-----------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+
-; Pin/Rules ; IO_000001 ; IO_000002 ; IO_000003 ; IO_000004 ; IO_000005 ; IO_000006 ; IO_000007 ; IO_000008 ; IO_000009 ; IO_000010 ; IO_000011 ; IO_000012 ; IO_000013 ; IO_000014 ; IO_000015 ; IO_000018 ; IO_000019 ; IO_000020 ; IO_000021 ; IO_000022 ; IO_000023 ; IO_000024 ; IO_000026 ; IO_000027 ; IO_000045 ; IO_000046 ; IO_000047 ; IO_000033 ; IO_000034 ; IO_000042 ;
-+--------------------+-----------+--------------+-----------+--------------+--------------+-----------+-----------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+
-; Total Pass ; 295 ; 121 ; 295 ; 0 ; 0 ; 295 ; 295 ; 0 ; 295 ; 295 ; 168 ; 3 ; 0 ; 0 ; 183 ; 168 ; 3 ; 183 ; 0 ; 0 ; 11 ; 3 ; 171 ; 0 ; 0 ; 0 ; 0 ; 295 ; 0 ; 0 ;
-; Total Unchecked ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; Total Inapplicable ; 0 ; 174 ; 0 ; 295 ; 295 ; 0 ; 0 ; 295 ; 0 ; 0 ; 127 ; 292 ; 295 ; 295 ; 112 ; 127 ; 292 ; 112 ; 295 ; 295 ; 284 ; 292 ; 124 ; 295 ; 295 ; 295 ; 295 ; 0 ; 295 ; 295 ;
-; Total Fail ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; CLK24M576 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LP_STR ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nFB_BURST ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nACSI_DRQ ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nACSI_INT ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSCSI_DRQ ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSCSI_MSG ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nDCHG ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SD_DATA0 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SD_DATA1 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SD_DATA2 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SD_CARD_DEDECT ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SD_WP ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nDACK0 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; WP_CF_CARD ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSCSI_C_D ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSCSI_I_O ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nFB_CS3 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; CLK25M ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nACSI_ACK ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nACSI_RESET ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nACSI_CS ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; ACSI_DIR ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; ACSI_A1 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSCSI_ACK ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSCSI_ATN ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SCSI_DIR ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; MIDI_OLR ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; MIDI_TLR ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; TxD ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; RTS ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; DTR ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; AMKB_TX ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IDE_RES ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nIDE_CS0 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nIDE_CS1 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nIDE_WR ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nIDE_RD ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nCF_CS0 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nCF_CS1 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nROM3 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nROM4 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nRP_UDS ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nRP_LDS ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSDSEL ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nWR_GATE ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nWR ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; YM_QA ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; YM_QB ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; YM_QC ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SD_CLK ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; DSA_D ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nVWE ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nVCAS ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nVRAS ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nVCS ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nPD_VGA ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; TIN0 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSRCS ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSRBLE ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSRBHE ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSRWE ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nDREQ1 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LED_FPGA_OK ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSROE ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VCKE ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nFB_TA ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nDDR_CLK ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; DDR_CLK ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VSYNC_PAD ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; HSYNC_PAD ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nBLANK_PAD ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; PIXEL_CLK_PAD ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSYNC ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nMOT_ON ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSTEP_DIR ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSTEP ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; CLKUSB ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LPDIR ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; BA[1] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; BA[0] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nIRQ[7] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nIRQ[6] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nIRQ[5] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nIRQ[4] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nIRQ[3] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nIRQ[2] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[12] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[11] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[10] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[9] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[8] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[7] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[6] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[5] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[4] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[3] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[2] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[1] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VA[0] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VB[7] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VB[6] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VB[5] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VB[4] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VB[3] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VB[2] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VB[1] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VB[0] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VDM[3] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VDM[2] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VDM[1] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VDM[0] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VG[7] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VG[6] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VG[5] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VG[4] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VG[3] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VG[2] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VG[1] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VG[0] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VR[7] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VR[6] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VR[5] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VR[4] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VR[3] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VR[2] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VR[1] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VR[0] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; TOUT0 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nMASTER ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[31] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[30] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[29] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[28] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[27] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[26] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[25] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[24] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[23] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[22] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[21] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[20] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[19] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[18] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[17] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[16] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[15] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[14] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[13] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[12] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[11] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[10] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[9] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[8] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[7] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[6] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[5] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[4] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[3] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[2] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[1] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_AD[0] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[31] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[30] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[29] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[28] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[27] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[26] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[25] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[24] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[23] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[22] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[21] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[20] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[19] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[18] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[17] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[16] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[15] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[14] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[13] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[12] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[11] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[10] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[9] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[8] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[7] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[6] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[5] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[4] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[3] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[2] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[1] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VD[0] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VDQS[3] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VDQS[2] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VDQS[1] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; VDQS[0] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[17] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[16] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[15] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[14] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[13] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[12] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[11] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[10] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[9] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[8] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[7] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[6] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[5] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[4] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[3] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[2] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[1] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IO[0] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[15] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[14] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[13] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[12] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[11] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[10] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[9] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[8] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[7] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[6] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[5] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[4] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[3] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[2] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[1] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SRD[0] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SCSI_PAR ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSCSI_SEL ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSCSI_BUSY ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nSCSI_RST ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SD_CD_DATA3 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SD_CMD_D1 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; ACSI_D[7] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; ACSI_D[6] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; ACSI_D[5] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; ACSI_D[4] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; ACSI_D[3] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; ACSI_D[2] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; ACSI_D[1] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; ACSI_D[0] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LP_D[7] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LP_D[6] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LP_D[5] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LP_D[4] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LP_D[3] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LP_D[2] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LP_D[1] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LP_D[0] ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SCSI_D[7] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SCSI_D[6] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SCSI_D[5] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SCSI_D[4] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SCSI_D[3] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SCSI_D[2] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SCSI_D[1] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; SCSI_D[0] ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nRSTO_MCF ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nFB_WR ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nFB_CS1 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_SIZE1 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_SIZE0 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; FB_ALE ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nFB_CS2 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; MAIN_CLK ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nDACK1 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nFB_OE ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IDE_RDY ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; CLK33M ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; HD_DD ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nINDEX ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; RxD ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nWP ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; LP_BUSY ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; DCD ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; CTS ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; TRACK00 ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; IDE_INT ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; RI ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nPCI_INTD ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nPCI_INTC ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nPCI_INTB ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nPCI_INTA ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; DVI_INT ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; E0_INT ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; PIC_INT ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; PIC_AMKB_RX ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; MIDI_IN ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; nRD_DATA ; Pass ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-; AMKB_RX ; Pass ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ;
-+--------------------+-----------+--------------+-----------+--------------+--------------+-----------+-----------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+
-
-
-+-------------------------------------------------------------------------+
-; Fitter Device Options ;
-+----------------------------------------------+--------------------------+
-; Option ; Setting ;
-+----------------------------------------------+--------------------------+
-; Enable user-supplied start-up clock (CLKUSR) ; Off ;
-; Enable device-wide reset (DEV_CLRn) ; On ;
-; Enable device-wide output enable (DEV_OE) ; On ;
-; Enable INIT_DONE output ; Off ;
-; Configuration scheme ; Passive Serial ;
-; Error detection CRC ; Off ;
-; Enable Open Drain on CRC Error pin ; Off ;
-; Configuration Voltage Level ; Auto ;
-; Force Configuration Voltage Level ; On ;
-; nCEO ; As output driving ground ;
-; Data[0] ; As input tri-stated ;
-; Data[1]/ASDO ; As input tri-stated ;
-; Data[7..2] ; Unreserved ;
-; FLASH_nCE/nCSO ; As input tri-stated ;
-; Other Active Parallel pins ; Unreserved ;
-; DCLK ; As input tri-stated ;
-; Base pin-out file on sameframe device ; Off ;
-+----------------------------------------------+--------------------------+
-
-
-+------------------------------------+
-; Operating Settings and Conditions ;
-+---------------------------+--------+
-; Setting ; Value ;
-+---------------------------+--------+
-; Nominal Core Voltage ; 1.20 V ;
-; Low Junction Temperature ; 0 °C ;
-; High Junction Temperature ; 85 °C ;
-+---------------------------+--------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Estimated Delay Added for Hold Timing ;
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+
-; Source Clock(s) ; Destination Clock(s) ; Delay Added in ns ;
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+
-; I/O ; MAIN_CLK ; 245.886 ;
-; MAIN_CLK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2],altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0],CLK33M,MAIN_CLK ; 444.109 ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2],altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0],CLK33M,MAIN_CLK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2],altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0],CLK33M,MAIN_CLK ; 1092.93 ;
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+
-Note: For more information on problematic transfers, consider running the Fitter again with the Optimize hold timing option (Settings Menu) turned off.
-This will disable optimization of problematic paths and expose them for further analysis using either the TimeQuest Timing Analyzer or the Classic Timing Analyzer.
-
-
-+-----------------+
-; Fitter Messages ;
-+-----------------+
-Info: *******************************************************************
-Info: Running Quartus II Fitter
- Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
- Info: Processing started: Wed Dec 15 02:21:57 2010
-Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
-Info: Selected device EP3C40F484C6 for design "firebee1"
-Info: Core supply voltage is 1.2V
-Info: Low junction temperature is 0 degrees C
-Info: High junction temperature is 85 degrees C
-Info: Implemented PLL "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1" as Cyclone III PLL type
- Info: Implementing clock multiplication of 1, clock division of 66, and phase shift of 0 degrees (0 ps) for altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] port
- Info: Implementing clock multiplication of 67, clock division of 900, and phase shift of 0 degrees (0 ps) for altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[1] port
- Info: Implementing clock multiplication of 67, clock division of 90, and phase shift of 0 degrees (0 ps) for altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[2] port
-Info: None of the inputs fed by the compensated output clock of PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1" in Source Synchronous mode are set as the compensated input
- Info: Input "nRD_DATA" that is fed by the compensated output clock of PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1" in Source Synchronous mode has been set as a compensated input
-Warning: Implemented PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1" as Cyclone III PLL type, but with warnings
- Warning: Can't achieve requested value multiplication of 16 for clock output altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] of parameter multiplication factor -- achieved value of multiplication of 109
- Warning: Can't achieve requested value division of 11 for clock output altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] of parameter division factor -- achieved value of division of 75
- Info: Implementing clock multiplication of 109, clock division of 1800, and phase shift of 0 degrees (0 ps) for altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] port
- Info: Implementing clock multiplication of 109, clock division of 225, and phase shift of 0 degrees (0 ps) for altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] port
- Info: Implementing clock multiplication of 109, clock division of 144, and phase shift of 0 degrees (0 ps) for altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] port
- Info: Implementing clock multiplication of 109, clock division of 75, and phase shift of 0 degrees (0 ps) for altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] port
-Info: None of the inputs fed by the compensated output clock of PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1" in Source Synchronous mode are set as the compensated input
- Info: Input "MAIN_CLK" that is fed by the compensated output clock of PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1" in Source Synchronous mode has been set as a compensated input
-Info: Implemented PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1" as Cyclone III PLL type
- Info: Implementing clock multiplication of 4, clock division of 1, and phase shift of 240 degrees (5051 ps) for altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] port
- Info: Implementing clock multiplication of 4, clock division of 1, and phase shift of 0 degrees (0 ps) for altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] port
- Info: Implementing clock multiplication of 4, clock division of 1, and phase shift of 180 degrees (3788 ps) for altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] port
- Info: Implementing clock multiplication of 4, clock division of 1, and phase shift of 105 degrees (2210 ps) for altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] port
- Info: Implementing clock multiplication of 2, clock division of 1, and phase shift of 270 degrees (11364 ps) for altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] port
-Info: Implemented PLL "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|pll1" as Cyclone III PLL type
- Info: Implementing clock multiplication of 2, clock division of 1, and phase shift of 0 degrees (0 ps) for altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] port
-Critical Warning: The input clock frequency specification of PLL "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|pll1" is different from the output clock frequency specification of the source PLLs that are driving it
- Critical Warning: Input port inclk[0] of PLL "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|pll1" and its source clk[3] (the output port of PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1") have different specified frequencies, 48.0 MHz and 48.0 MHz respectively
-Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
-Warning: Feature LogicLock is only available with a valid subscription license. Please purchase a software subscription to gain full access to this feature.
-Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
- Info: Device EP3C16F484C6 is compatible
- Info: Device EP3C55F484C6 is compatible
- Info: Device EP3C80F484C6 is compatible
-Info: Fitter converted 7 user pins into dedicated programming pins
- Info: Pin ~ALTERA_ASDO_DATA1~ is reserved at location D1
- Info: Pin ~ALTERA_FLASH_nCE_nCSO~ is reserved at location E2
- Info: Pin ~ALTERA_DCLK~ is reserved at location K2
- Info: Pin ~ALTERA_DATA0~ is reserved at location K1
- Info: Pin ~ALTERA_DEV_OE~ is reserved at location N22
- Info: Pin ~ALTERA_DEV_CLRn~ is reserved at location N21
- Info: Pin ~ALTERA_nCEO~ is reserved at location K22
-Warning: Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
-Info: Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements.
-Warning: The parameters of the PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 and the PLL altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 do not have the same values - hence these PLLs cannot be merged
- Info: The values of the parameter "M" do not match for the PLL atoms altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 and PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1
- Info: The value of the parameter "M" for the PLL atom altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 is 67
- Info: The value of the parameter "M" for the PLL atom altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 is 109
- Info: The values of the parameter "N" do not match for the PLL atoms altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 and PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1
- Info: The value of the parameter "N" for the PLL atom altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 is 6
- Info: The value of the parameter "N" for the PLL atom altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 is 3
- Info: The values of the parameter "LOOP FILTER R" do not match for the PLL atoms altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 and PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1
- Info: The value of the parameter "LOOP FILTER R" for the PLL atom altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 is 12000
- Info: The value of the parameter "LOOP FILTER R" for the PLL atom altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 is 10000
- Info: The values of the parameter "VCO POST SCALE" do not match for the PLL atoms altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 and PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1
- Info: The value of the parameter "VCO POST SCALE" for the PLL atom altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 is 2
- Info: The value of the parameter "VCO POST SCALE" for the PLL atom altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 is 1
- Info: The values of the parameter "Min VCO Period" do not match for the PLL atoms altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 and PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1
- Info: The value of the parameter "Min VCO Period" for the PLL atom altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 is 1538
- Info: The value of the parameter "Min VCO Period" for the PLL atom altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 is 769
- Info: The values of the parameter "Max VCO Period" do not match for the PLL atoms altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 and PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1
- Info: The value of the parameter "Max VCO Period" for the PLL atom altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 is 3333
- Info: The value of the parameter "Max VCO Period" for the PLL atom altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 is 1666
- Info: The values of the parameter "Center VCO Period" do not match for the PLL atoms altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 and PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1
- Info: The value of the parameter "Center VCO Period" for the PLL atom altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 is 1538
- Info: The value of the parameter "Center VCO Period" for the PLL atom altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 is 769
- Info: The values of the parameter "Min Lock Period" do not match for the PLL atoms altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 and PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1
- Info: The value of the parameter "Min Lock Period" for the PLL atom altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 is 17174
- Info: The value of the parameter "Min Lock Period" for the PLL atom altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 is 27940
- Info: The values of the parameter "Max Lock Period" do not match for the PLL atoms altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 and PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1
- Info: The value of the parameter "Max Lock Period" for the PLL atom altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 is 30864
- Info: The value of the parameter "Max Lock Period" for the PLL atom altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 is 59523
- Info: The values of the parameter "Compensate Clock" do not match for the PLL atoms altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 and PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1
- Info: The value of the parameter "Compensate Clock" for the PLL atom altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1 is clock0
- Info: The value of the parameter "Compensate Clock" for the PLL atom altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 is clock1
-Warning: The input ports of the PLL altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|pll1 and the PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 are mismatched, preventing the PLLs to be merged
- Warning: Input clock frequency of PLL altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1 differs from input clock frequency of PLL altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|pll1
-Warning: Implemented PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1" as Cyclone III PLL type, but with warnings
- Warning: Can't achieve requested value multiplication of 16 for clock output altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] of parameter multiplication factor -- achieved value of multiplication of 109
- Warning: Can't achieve requested value division of 11 for clock output altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] of parameter division factor -- achieved value of division of 75
- Info: Implementing clock multiplication of 109, clock division of 1800, and phase shift of 0 degrees (0 ps) for altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] port
- Info: Implementing clock multiplication of 109, clock division of 225, and phase shift of 0 degrees (0 ps) for altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] port
- Info: Implementing clock multiplication of 109, clock division of 144, and phase shift of 0 degrees (0 ps) for altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] port
- Info: Implementing clock multiplication of 109, clock division of 75, and phase shift of 0 degrees (0 ps) for altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] port
-Info: Implemented PLL "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|pll1" as Cyclone III PLL type
- Info: Implementing clock multiplication of 2, clock division of 1, and phase shift of 0 degrees (0 ps) for altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] port
-Critical Warning: Input pin "CLK33M" feeds inclk port of PLL "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1" by global clock - I/O timing will be affected
-Info: Timing-driven compilation is using the Classic Timing Analyzer
-Info: Detected fmax, tsu, tco, and/or tpd requirements -- optimizing circuit to achieve only the specified requirements
-Info: Automatically promoted node altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] (placed in counter C1 of PLL_3)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G14
-Info: Automatically promoted node altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[1] (placed in counter C2 of PLL_3)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G12
-Info: Automatically promoted node altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[2] (placed in counter C3 of PLL_3)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G13
-Info: Automatically promoted node altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] (placed in counter C0 of PLL_1)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G3
-Info: Automatically promoted node altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] (placed in counter C3 of PLL_1)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G1
-Info: Automatically promoted node altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] (placed in counter C2 of PLL_1)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G0
-Info: Automatically promoted node altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] (placed in counter C4 of PLL_1)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G2
-Info: Automatically promoted node altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] (placed in counter C1 of PLL_1)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G4
-Info: Automatically promoted node altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] (placed in counter C1 of PLL_4)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G16
-Info: Automatically promoted node altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] (placed in counter C2 of PLL_4)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G17
-Info: Automatically promoted node altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] (placed in counter C3 of PLL_4)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G18
-Info: Automatically promoted node altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] (placed in counter C4 of PLL_4)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G19
-Info: Automatically promoted node altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] (placed in counter C0 of PLL_2)
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G8
-Info: Automatically promoted node CLK33M~input (placed in PIN AB12 (CLK12, DIFFCLK_7n))
- Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G15
- Info: Following destination nodes may be non-global or may not use global or regional clocks
- Info: Destination node Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~0
- Info: Destination node Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~3
- Info: Destination node Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLK17M
-Info: Automatically promoted node Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK
- Info: Automatically promoted destinations to use location or clock signal Global Clock
- Info: Following destination nodes may be non-global or may not use global or regional clocks
- Info: Destination node Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC
- Info: Destination node Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC
-Info: Automatically promoted node inst25
- Info: Automatically promoted destinations to use location or clock signal Global Clock
- Info: Following destination nodes may be non-global or may not use global or regional clocks
- Info: Destination node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nIDE_WR~reg0
- Info: Destination node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nIDE_RD~reg0
- Info: Destination node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_In
- Info: Destination node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|DTACK_OUTn
- Info: Destination node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|TDRE
- Info: Destination node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_PASS[10]
- Info: Destination node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_PASS[14]
- Info: Destination node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_PASS[15]
- Info: Destination node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_PASS[12]
- Info: Destination node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_PASS[13]
- Info: Non-global destination nodes limited to 10 nodes
-Info: Automatically promoted node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|CLR_FIFO
- Info: Automatically promoted destinations to use location or clock signal Global Clock
-Info: Automatically promoted node Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLR_FIFO
- Info: Automatically promoted destinations to use location or clock signal Global Clock
- Info: Following destination nodes may be non-global or may not use global or regional clocks
- Info: Destination node Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CLR_FIFO_SYNC
-Info: Automatically promoted node Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_9d9:wraclr|dffe20a[0]
- Info: Automatically promoted destinations to use location or clock signal Global Clock
- Info: Following destination nodes may be non-global or may not use global or regional clocks
- Info: Destination node Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|_~0
- Info: Destination node Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|valid_wrreq~0
-Info: Automatically promoted node FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|process_8~2
- Info: Automatically promoted destinations to use location or clock signal Global Clock
-Info: Following DDIO Input nodes are constrained by the Fitter to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[31]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[31]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[31]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "VD[31]~input" is constrained to location IOIBUF_X43_Y0_N1 to improve DDIO timing
- Info: Node "VD[31]" is constrained to location PIN U12 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[30]" is constrained to location LAB_X41_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[30]" is constrained to location LAB_X41_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[30]" is constrained to location LAB_X41_Y1_N0 to improve DDIO timing
- Info: Node "VD[30]~input" is constrained to location IOIBUF_X41_Y0_N29 to improve DDIO timing
- Info: Node "VD[30]" is constrained to location PIN V12 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[29]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[29]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[29]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "VD[29]~input" is constrained to location IOIBUF_X38_Y0_N22 to improve DDIO timing
- Info: Node "VD[29]" is constrained to location PIN AB13 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[28]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[28]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[28]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "VD[28]~input" is constrained to location IOIBUF_X43_Y0_N29 to improve DDIO timing
- Info: Node "VD[28]" is constrained to location PIN W13 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[27]" is constrained to location LAB_X48_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[27]" is constrained to location LAB_X48_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[27]" is constrained to location LAB_X48_Y1_N0 to improve DDIO timing
- Info: Node "VD[27]~input" is constrained to location IOIBUF_X48_Y0_N29 to improve DDIO timing
- Info: Node "VD[27]" is constrained to location PIN V13 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[26]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[26]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[26]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "VD[26]~input" is constrained to location IOIBUF_X38_Y0_N8 to improve DDIO timing
- Info: Node "VD[26]" is constrained to location PIN AB14 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[25]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[25]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[25]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "VD[25]~input" is constrained to location IOIBUF_X38_Y0_N15 to improve DDIO timing
- Info: Node "VD[25]" is constrained to location PIN AA14 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[24]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[24]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[24]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "VD[24]~input" is constrained to location IOIBUF_X43_Y0_N8 to improve DDIO timing
- Info: Node "VD[24]" is constrained to location PIN AB15 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[23]" is constrained to location LAB_X45_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[23]" is constrained to location LAB_X45_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[23]" is constrained to location LAB_X45_Y1_N0 to improve DDIO timing
- Info: Node "VD[23]~input" is constrained to location IOIBUF_X45_Y0_N15 to improve DDIO timing
- Info: Node "VD[23]" is constrained to location PIN AB16 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[22]" is constrained to location LAB_X48_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[22]" is constrained to location LAB_X48_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[22]" is constrained to location LAB_X48_Y1_N0 to improve DDIO timing
- Info: Node "VD[22]~input" is constrained to location IOIBUF_X48_Y0_N22 to improve DDIO timing
- Info: Node "VD[22]" is constrained to location PIN W14 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[21]" is constrained to location LAB_X50_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[21]" is constrained to location LAB_X50_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[21]" is constrained to location LAB_X50_Y1_N0 to improve DDIO timing
- Info: Node "VD[21]~input" is constrained to location IOIBUF_X50_Y0_N1 to improve DDIO timing
- Info: Node "VD[21]" is constrained to location PIN V15 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[20]" is constrained to location LAB_X50_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[20]" is constrained to location LAB_X50_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[20]" is constrained to location LAB_X50_Y1_N0 to improve DDIO timing
- Info: Node "VD[20]~input" is constrained to location IOIBUF_X50_Y0_N29 to improve DDIO timing
- Info: Node "VD[20]" is constrained to location PIN U13 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[19]" is constrained to location LAB_X50_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[19]" is constrained to location LAB_X50_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[19]" is constrained to location LAB_X50_Y1_N0 to improve DDIO timing
- Info: Node "VD[19]~input" is constrained to location IOIBUF_X50_Y0_N22 to improve DDIO timing
- Info: Node "VD[19]" is constrained to location PIN V14 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[18]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[18]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[18]" is constrained to location LAB_X38_Y1_N0 to improve DDIO timing
- Info: Node "VD[18]~input" is constrained to location IOIBUF_X38_Y0_N29 to improve DDIO timing
- Info: Node "VD[18]" is constrained to location PIN AA13 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[17]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[17]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[17]" is constrained to location LAB_X43_Y1_N0 to improve DDIO timing
- Info: Node "VD[17]~input" is constrained to location IOIBUF_X43_Y0_N22 to improve DDIO timing
- Info: Node "VD[17]" is constrained to location PIN Y13 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[16]" is constrained to location LAB_X45_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[16]" is constrained to location LAB_X45_Y1_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[16]" is constrained to location LAB_X45_Y1_N0 to improve DDIO timing
- Info: Node "VD[16]~input" is constrained to location IOIBUF_X45_Y0_N8 to improve DDIO timing
- Info: Node "VD[16]" is constrained to location PIN T12 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[15]" is constrained to location LAB_X66_Y15_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[15]" is constrained to location LAB_X66_Y15_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[15]" is constrained to location LAB_X66_Y15_N0 to improve DDIO timing
- Info: Node "VD[15]~input" is constrained to location IOIBUF_X67_Y15_N8 to improve DDIO timing
- Info: Node "VD[15]" is constrained to location PIN N20 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[14]" is constrained to location LAB_X66_Y13_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[14]" is constrained to location LAB_X66_Y13_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[14]" is constrained to location LAB_X66_Y13_N0 to improve DDIO timing
- Info: Node "VD[14]~input" is constrained to location IOIBUF_X67_Y13_N8 to improve DDIO timing
- Info: Node "VD[14]" is constrained to location PIN R22 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[13]" is constrained to location LAB_X66_Y14_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[13]" is constrained to location LAB_X66_Y14_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[13]" is constrained to location LAB_X66_Y14_N0 to improve DDIO timing
- Info: Node "VD[13]~input" is constrained to location IOIBUF_X67_Y14_N22 to improve DDIO timing
- Info: Node "VD[13]" is constrained to location PIN P20 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[12]" is constrained to location LAB_X66_Y17_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[12]" is constrained to location LAB_X66_Y17_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[12]" is constrained to location LAB_X66_Y17_N0 to improve DDIO timing
- Info: Node "VD[12]~input" is constrained to location IOIBUF_X67_Y17_N22 to improve DDIO timing
- Info: Node "VD[12]" is constrained to location PIN N17 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[11]" is constrained to location LAB_X66_Y13_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[11]" is constrained to location LAB_X66_Y13_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[11]" is constrained to location LAB_X66_Y13_N0 to improve DDIO timing
- Info: Node "VD[11]~input" is constrained to location IOIBUF_X67_Y13_N1 to improve DDIO timing
- Info: Node "VD[11]" is constrained to location PIN R21 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[10]" is constrained to location LAB_X66_Y10_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[10]" is constrained to location LAB_X66_Y10_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[10]" is constrained to location LAB_X66_Y10_N0 to improve DDIO timing
- Info: Node "VD[10]~input" is constrained to location IOIBUF_X67_Y10_N15 to improve DDIO timing
- Info: Node "VD[10]" is constrained to location PIN P17 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[9]" is constrained to location LAB_X66_Y12_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[9]" is constrained to location LAB_X66_Y12_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[9]" is constrained to location LAB_X66_Y12_N0 to improve DDIO timing
- Info: Node "VD[9]~input" is constrained to location IOIBUF_X67_Y12_N22 to improve DDIO timing
- Info: Node "VD[9]" is constrained to location PIN R18 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[8]" is constrained to location LAB_X66_Y10_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[8]" is constrained to location LAB_X66_Y10_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[8]" is constrained to location LAB_X66_Y10_N0 to improve DDIO timing
- Info: Node "VD[8]~input" is constrained to location IOIBUF_X67_Y10_N8 to improve DDIO timing
- Info: Node "VD[8]" is constrained to location PIN V22 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[7]" is constrained to location LAB_X66_Y11_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[7]" is constrained to location LAB_X66_Y11_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[7]" is constrained to location LAB_X66_Y11_N0 to improve DDIO timing
- Info: Node "VD[7]~input" is constrained to location IOIBUF_X67_Y11_N1 to improve DDIO timing
- Info: Node "VD[7]" is constrained to location PIN U21 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[6]" is constrained to location LAB_X66_Y12_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[6]" is constrained to location LAB_X66_Y12_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[6]" is constrained to location LAB_X66_Y12_N0 to improve DDIO timing
- Info: Node "VD[6]~input" is constrained to location IOIBUF_X67_Y12_N15 to improve DDIO timing
- Info: Node "VD[6]" is constrained to location PIN R19 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[5]" is constrained to location LAB_X66_Y10_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[5]" is constrained to location LAB_X66_Y10_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[5]" is constrained to location LAB_X66_Y10_N0 to improve DDIO timing
- Info: Node "VD[5]~input" is constrained to location IOIBUF_X67_Y10_N22 to improve DDIO timing
- Info: Node "VD[5]" is constrained to location PIN R17 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[4]" is constrained to location LAB_X66_Y14_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[4]" is constrained to location LAB_X66_Y14_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[4]" is constrained to location LAB_X66_Y14_N0 to improve DDIO timing
- Info: Node "VD[4]~input" is constrained to location IOIBUF_X67_Y14_N1 to improve DDIO timing
- Info: Node "VD[4]" is constrained to location PIN P21 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[3]" is constrained to location LAB_X66_Y11_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[3]" is constrained to location LAB_X66_Y11_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[3]" is constrained to location LAB_X66_Y11_N0 to improve DDIO timing
- Info: Node "VD[3]~input" is constrained to location IOIBUF_X67_Y11_N22 to improve DDIO timing
- Info: Node "VD[3]" is constrained to location PIN R20 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[2]" is constrained to location LAB_X66_Y14_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[2]" is constrained to location LAB_X66_Y14_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[2]" is constrained to location LAB_X66_Y14_N0 to improve DDIO timing
- Info: Node "VD[2]~input" is constrained to location IOIBUF_X67_Y14_N8 to improve DDIO timing
- Info: Node "VD[2]" is constrained to location PIN P22 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[1]" is constrained to location LAB_X66_Y18_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[1]" is constrained to location LAB_X66_Y18_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[1]" is constrained to location LAB_X66_Y18_N0 to improve DDIO timing
- Info: Node "VD[1]~input" is constrained to location IOIBUF_X67_Y18_N1 to improve DDIO timing
- Info: Node "VD[1]" is constrained to location PIN M21 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[0]" is constrained to location LAB_X66_Y18_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[0]" is constrained to location LAB_X66_Y18_N0 to improve DDIO timing
- Info: Node "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[0]" is constrained to location LAB_X66_Y18_N0 to improve DDIO timing
- Info: Node "VD[0]~input" is constrained to location IOIBUF_X67_Y18_N8 to improve DDIO timing
- Info: Node "VD[0]" is constrained to location PIN M22 to improve DDIO timing
-Info: Starting register packing
-Extra Info: Performing register packing on registers with non-logic cell location assignments
-Extra Info: Completed register packing on registers with non-logic cell location assignments
-Extra Info: Started Fast Input/Output/OE register processing
-Warning: Can't pack node Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|MCS[0] to I/O pin
- Warning: Can't pack node Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|MCS[0] and I/O node MAIN_CLK -- I/O node is a dedicated I/O pin
-Extra Info: Finished Fast Input/Output/OE register processing
-Extra Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density
-Extra Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks
-Info: Finished register packing
- Extra Info: Packed 33 registers into blocks of type I/O Input Buffer
- Extra Info: Packed 25 registers into blocks of type I/O Output Buffer
- Extra Info: Created 9 register duplicates
-Warning: PLL "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1" in Source Synchronous mode with compensated output clock set to clk[0] is not fully compensated because it does not feed an I/O input register
-Warning: PLL "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1" input clock inclk[0] is not fully compensated and may have reduced jitter performance because it is fed by a non-dedicated input
- Info: Input port INCLK[0] of node "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1" is driven by CLK33M~inputclkctrl which is OUTCLK output port of Clock control block type node CLK33M~inputclkctrl
-Warning: PLL "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|pll1" output port clk[2] feeds output pin "CLK24M576~output" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance
-Warning: PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1" output port clk[2] feeds output pin "CLK25M~output" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance
-Warning: PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|pll1" output port clk[3] feeds output pin "CLKUSB~output" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1" output port clk[0] feeds output pin "VDQS[3]~output" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1" output port clk[0] feeds output pin "VDQS[2]~output" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1" output port clk[0] feeds output pin "VDQS[1]~output" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1" output port clk[0] feeds output pin "VDQS[0]~output" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1" output port clk[0] feeds output pin "nDDR_CLK~output" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1" output port clk[0] feeds output pin "DDR_CLK~output" via non-dedicated routing -- jitter performance depends on switching rate of other design elements. Use PLL dedicated clock outputs to ensure jitter performance
-Warning: PLL "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|pll1" input clock inclk[0] is not fully compensated and may have reduced jitter performance because it is fed by a non-dedicated input
- Info: Input port INCLK[0] of node "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|pll1" is driven by altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3]~clkctrl which is OUTCLK output port of Clock control block type node altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3]~clkctrl
-Info: Starting physical synthesis optimizations for speed
-Info: Starting physical synthesis algorithm combinational resynthesis using boolean division
-Info: Physical synthesis algorithm combinational resynthesis using boolean division complete: estimated slack improvement of 2208 ps
-Info: Physical synthesis optimizations for speed complete: elapsed CPU time is 00:00:23
-Info: Fitter preparation operations ending: elapsed time is 00:00:47
-Info: Fitter placement preparation operations beginning
-Info: Fitter placement preparation operations ending: elapsed time is 00:00:18
-Info: Fitter placement operations beginning
-Info: Fitter placement was successful
-Info: Fitter placement operations ending: elapsed time is 00:01:10
-Info: Starting physical synthesis optimizations for speed
-Info: Physical synthesis optimizations for speed complete: elapsed CPU time is 00:00:05
-Info: Estimated most critical path is register to pin delay of 5.130 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X15_Y12_N0; Fanout = 3; REG Node = 'interrupt_handler:nobody|INT_LATCH[9]'
- Info: 2: + IC(0.161 ns) + CELL(0.369 ns) = 0.530 ns; Loc. = LAB_X16_Y12_N0; Fanout = 1; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~359_RESYN14_BDD15'
- Info: 3: + IC(0.528 ns) + CELL(0.243 ns) = 1.301 ns; Loc. = LAB_X17_Y13_N0; Fanout = 1; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~359'
- Info: 4: + IC(0.172 ns) + CELL(0.130 ns) = 1.603 ns; Loc. = LAB_X17_Y13_N0; Fanout = 1; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[29]~360'
- Info: 5: + IC(1.521 ns) + CELL(2.006 ns) = 5.130 ns; Loc. = IOOBUF_X34_Y0_N23; Fanout = 1; COMB Node = 'FB_AD[29]~output'
- Info: 6: + IC(0.000 ns) + CELL(0.000 ns) = 5.130 ns; Loc. = PIN_W10; Fanout = 0; PIN Node = 'FB_AD[29]'
- Info: Total cell delay = 2.748 ns ( 53.57 % )
- Info: Total interconnect delay = 2.382 ns ( 46.43 % )
-Info: Fitter routing operations beginning
-Info: 2 (of 32134) connections in the design require a large routing delay to satisfy hold requirements. Refer to the Fitter report for a summary of the relevant clock transfers. Also, check the circuit's timing constraints and clocking methodology, especially multicycles and gated clocks.
-Info: Average interconnect usage is 13% of the available device resources
- Info: Peak interconnect usage is 51% of the available device resources in the region that extends from location X22_Y11 to location X33_Y21
-Info: Fitter routing operations ending: elapsed time is 00:01:18
-Info: The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time.
- Info: Optimizations that may affect the design's routability were skipped
-Info: Started post-fitting delay annotation
-Info: Delay annotation completed successfully
-Info: Auto delay chain can't change the delay chain setting on I/O pin nRD_DATA since it's a PLL compensated pin
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|pll1" in Source Synchronous mode with compensated output clock set to clk[0] is not fully compensated because it does not feed an I/O input register
-Warning: Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
-Warning: Total number of single-ended output or bi-directional pins in bank 4 have exceeded the recommended amount in a bank where dedicated LVDS, RSDS, or mini-LVDS outputs exists. Refer to the pad placement and DC guidelines section in the Cyclone III Device I/O Features chapter of the Cyclone III Device Handbook for details on this condition.
- Info: There are 32 output pin(s) with I/O standard 2.5 V and current strength 12mA
- Info: Location AA13 (pad PAD_208): Pin VD[18] of type bi-directional uses 2.5 V I/O standard
- Info: Location AB13 (pad PAD_209): Pin VD[29] of type bi-directional uses 2.5 V I/O standard
- Info: Location AA14 (pad PAD_210): Pin VD[25] of type bi-directional uses 2.5 V I/O standard
- Info: Location AB14 (pad PAD_211): Pin VD[26] of type bi-directional uses 2.5 V I/O standard
- Info: Location V12 (pad PAD_213): Pin VD[30] of type bi-directional uses 2.5 V I/O standard
- Info: Location W13 (pad PAD_218): Pin VD[28] of type bi-directional uses 2.5 V I/O standard
- Info: Location Y13 (pad PAD_219): Pin VD[17] of type bi-directional uses 2.5 V I/O standard
- Info: Location AA15 (pad PAD_220): Pin VDQS[0] of type bi-directional uses 2.5 V I/O standard
- Info: Location AB15 (pad PAD_221): Pin VD[24] of type bi-directional uses 2.5 V I/O standard
- Info: Location U12 (pad PAD_222): Pin VD[31] of type bi-directional uses 2.5 V I/O standard
- Info: Location AA16 (pad PAD_224): Pin VDM[0] of type output uses 2.5 V I/O standard
- Info: Location AB16 (pad PAD_225): Pin VD[23] of type bi-directional uses 2.5 V I/O standard
- Info: Location T12 (pad PAD_226): Pin VD[16] of type bi-directional uses 2.5 V I/O standard
- Info: Location V13 (pad PAD_228): Pin VD[27] of type bi-directional uses 2.5 V I/O standard
- Info: Location W14 (pad PAD_229): Pin VD[22] of type bi-directional uses 2.5 V I/O standard
- Info: Location U13 (pad PAD_233): Pin VD[20] of type bi-directional uses 2.5 V I/O standard
- Info: Location V14 (pad PAD_234): Pin VD[19] of type bi-directional uses 2.5 V I/O standard
- Info: Location U15 (pad PAD_236): Pin VCKE of type output uses 2.5 V I/O standard
- Info: Location V15 (pad PAD_237): Pin VD[21] of type bi-directional uses 2.5 V I/O standard
- Info: Location W15 (pad PAD_239): Pin VDQS[1] of type bi-directional uses 2.5 V I/O standard
- Info: Location AB18 (pad PAD_242): Pin nVCAS of type output uses 2.5 V I/O standard
- Info: Location AA17 (pad PAD_243): Pin nDDR_CLK of type output uses 2.5 V I/O standard
- Info: Location AB17 (pad PAD_244): Pin DDR_CLK of type output uses 2.5 V I/O standard
- Info: Location AA18 (pad PAD_245): Pin VA[12] of type output uses 2.5 V I/O standard
- Info: Location AA19 (pad PAD_252): Pin BA[1] of type output uses 2.5 V I/O standard
- Info: Location AB19 (pad PAD_253): Pin VA[9] of type output uses 2.5 V I/O standard
- Info: Location W17 (pad PAD_257): Pin nVRAS of type output uses 2.5 V I/O standard
- Info: Location Y17 (pad PAD_258): Pin nVWE of type output uses 2.5 V I/O standard
- Info: Location AA20 (pad PAD_259): Pin VA[7] of type output uses 2.5 V I/O standard
- Info: Location AB20 (pad PAD_260): Pin VA[8] of type output uses 2.5 V I/O standard
- Info: Location V16 (pad PAD_261): Pin VDM[1] of type output uses 2.5 V I/O standard
- Info: Location T16 (pad PAD_266): Pin VDQS[3] of type bi-directional uses 2.5 V I/O standard
-Warning: Total number of single-ended output or bi-directional pins in bank 5 have exceeded the recommended amount in a bank where dedicated LVDS, RSDS, or mini-LVDS outputs exists. Refer to the pad placement and DC guidelines section in the Cyclone III Device I/O Features chapter of the Cyclone III Device Handbook for details on this condition.
- Info: There are 30 output pin(s) with I/O standard 2.5 V and current strength 12mA
- Info: Location AA22 (pad PAD_273): Pin VA[4] of type output uses 2.5 V I/O standard
- Info: Location AA21 (pad PAD_274): Pin VA[6] of type output uses 2.5 V I/O standard
- Info: Location T17 (pad PAD_277): Pin VDM[3] of type output uses 2.5 V I/O standard
- Info: Location T18 (pad PAD_278): Pin nVCS of type output uses 2.5 V I/O standard
- Info: Location W20 (pad PAD_280): Pin VA[0] of type output uses 2.5 V I/O standard
- Info: Location W19 (pad PAD_285): Pin BA[0] of type output uses 2.5 V I/O standard
- Info: Location Y22 (pad PAD_288): Pin VA[3] of type output uses 2.5 V I/O standard
- Info: Location Y21 (pad PAD_289): Pin VA[5] of type output uses 2.5 V I/O standard
- Info: Location U20 (pad PAD_290): Pin VDM[2] of type output uses 2.5 V I/O standard
- Info: Location U19 (pad PAD_291): Pin VA[11] of type output uses 2.5 V I/O standard
- Info: Location W22 (pad PAD_292): Pin VA[1] of type output uses 2.5 V I/O standard
- Info: Location W21 (pad PAD_293): Pin VA[2] of type output uses 2.5 V I/O standard
- Info: Location R17 (pad PAD_301): Pin VD[5] of type bi-directional uses 2.5 V I/O standard
- Info: Location P17 (pad PAD_302): Pin VD[10] of type bi-directional uses 2.5 V I/O standard
- Info: Location V22 (pad PAD_303): Pin VD[8] of type bi-directional uses 2.5 V I/O standard
- Info: Location V21 (pad PAD_304): Pin VA[10] of type output uses 2.5 V I/O standard
- Info: Location R20 (pad PAD_305): Pin VD[3] of type bi-directional uses 2.5 V I/O standard
- Info: Location U22 (pad PAD_307): Pin VDQS[2] of type bi-directional uses 2.5 V I/O standard
- Info: Location U21 (pad PAD_308): Pin VD[7] of type bi-directional uses 2.5 V I/O standard
- Info: Location R18 (pad PAD_309): Pin VD[9] of type bi-directional uses 2.5 V I/O standard
- Info: Location R19 (pad PAD_310): Pin VD[6] of type bi-directional uses 2.5 V I/O standard
- Info: Location R22 (pad PAD_315): Pin VD[14] of type bi-directional uses 2.5 V I/O standard
- Info: Location R21 (pad PAD_316): Pin VD[11] of type bi-directional uses 2.5 V I/O standard
- Info: Location P20 (pad PAD_317): Pin VD[13] of type bi-directional uses 2.5 V I/O standard
- Info: Location P22 (pad PAD_319): Pin VD[2] of type bi-directional uses 2.5 V I/O standard
- Info: Location P21 (pad PAD_320): Pin VD[4] of type bi-directional uses 2.5 V I/O standard
- Info: Location N20 (pad PAD_323): Pin VD[15] of type bi-directional uses 2.5 V I/O standard
- Info: Location N17 (pad PAD_329): Pin VD[12] of type bi-directional uses 2.5 V I/O standard
- Info: Location M22 (pad PAD_333): Pin VD[0] of type bi-directional uses 2.5 V I/O standard
- Info: Location M21 (pad PAD_334): Pin VD[1] of type bi-directional uses 2.5 V I/O standard
-Warning: 145 pins must meet Altera requirements for 3.3, 3.0, and 2.5-V interfaces. Refer to the device Application Note 447 (Interfacing Cyclone III Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems).
- Info: Pin nFB_BURST uses I/O standard 3.3-V LVTTL at T3
- Info: Pin nACSI_DRQ uses I/O standard 3.3-V LVTTL at K7
- Info: Pin nACSI_INT uses I/O standard 3.3-V LVTTL at J4
- Info: Pin nSCSI_DRQ uses I/O standard 3.3-V LVTTL at U1
- Info: Pin nSCSI_MSG uses I/O standard 3.3-V LVTTL at H2
- Info: Pin nDCHG uses I/O standard 3.3-V LVTTL at C17
- Info: Pin SD_DATA0 uses I/O standard 3.3-V LVTTL at B16
- Info: Pin SD_DATA1 uses I/O standard 3.3-V LVTTL at A16
- Info: Pin SD_DATA2 uses I/O standard 3.3-V LVTTL at B17
- Info: Pin SD_CARD_DEDECT uses I/O standard 3.3-V LVTTL at M20
- Info: Pin SD_WP uses I/O standard 3.3-V LVTTL at M19
- Info: Pin nDACK0 uses I/O standard 3.3-V LVTTL at B12
- Info: Pin WP_CF_CARD uses I/O standard 3.3-V LVTTL at T1
- Info: Pin nSCSI_C_D uses I/O standard 3.3-V LVTTL at H1
- Info: Pin nSCSI_I_O uses I/O standard 3.3-V LVTTL at J3
- Info: Pin nFB_CS3 uses I/O standard 3.3-V LVTTL at V6
- Info: Pin TOUT0 uses I/O standard 3.3-V LVTTL at T22
- Info: Pin nMASTER uses I/O standard 3.3-V LVTTL at T21
- Info: Pin FB_AD[31] uses I/O standard 3.3-V LVTTL at AA10
- Info: Pin FB_AD[30] uses I/O standard 3.3-V LVTTL at Y10
- Info: Pin FB_AD[29] uses I/O standard 3.3-V LVTTL at W10
- Info: Pin FB_AD[28] uses I/O standard 3.3-V LVTTL at V11
- Info: Pin FB_AD[27] uses I/O standard 3.3-V LVTTL at U11
- Info: Pin FB_AD[26] uses I/O standard 3.3-V LVTTL at AB9
- Info: Pin FB_AD[25] uses I/O standard 3.3-V LVTTL at AA9
- Info: Pin FB_AD[24] uses I/O standard 3.3-V LVTTL at T11
- Info: Pin FB_AD[23] uses I/O standard 3.3-V LVTTL at AB8
- Info: Pin FB_AD[22] uses I/O standard 3.3-V LVTTL at AA8
- Info: Pin FB_AD[21] uses I/O standard 3.3-V LVTTL at U10
- Info: Pin FB_AD[20] uses I/O standard 3.3-V LVTTL at T10
- Info: Pin FB_AD[19] uses I/O standard 3.3-V LVTTL at V10
- Info: Pin FB_AD[18] uses I/O standard 3.3-V LVTTL at V9
- Info: Pin FB_AD[17] uses I/O standard 3.3-V LVTTL at Y8
- Info: Pin FB_AD[16] uses I/O standard 3.3-V LVTTL at AB7
- Info: Pin FB_AD[15] uses I/O standard 3.3-V LVTTL at AA7
- Info: Pin FB_AD[14] uses I/O standard 3.3-V LVTTL at W8
- Info: Pin FB_AD[13] uses I/O standard 3.3-V LVTTL at V8
- Info: Pin FB_AD[12] uses I/O standard 3.3-V LVTTL at U9
- Info: Pin FB_AD[11] uses I/O standard 3.3-V LVTTL at Y7
- Info: Pin FB_AD[10] uses I/O standard 3.3-V LVTTL at W7
- Info: Pin FB_AD[9] uses I/O standard 3.3-V LVTTL at AB5
- Info: Pin FB_AD[8] uses I/O standard 3.3-V LVTTL at AA5
- Info: Pin FB_AD[7] uses I/O standard 3.3-V LVTTL at AB4
- Info: Pin FB_AD[6] uses I/O standard 3.3-V LVTTL at AA4
- Info: Pin FB_AD[5] uses I/O standard 3.3-V LVTTL at V7
- Info: Pin FB_AD[4] uses I/O standard 3.3-V LVTTL at W6
- Info: Pin FB_AD[3] uses I/O standard 3.3-V LVTTL at AB3
- Info: Pin FB_AD[2] uses I/O standard 3.3-V LVTTL at AA3
- Info: Pin FB_AD[1] uses I/O standard 3.3-V LVTTL at Y6
- Info: Pin FB_AD[0] uses I/O standard 3.3-V LVTTL at Y3
- Info: Pin IO[17] uses I/O standard 3.3-V LVTTL at B13
- Info: Pin IO[16] uses I/O standard 3.3-V LVTTL at A13
- Info: Pin IO[15] uses I/O standard 3.3-V LVTTL at B14
- Info: Pin IO[14] uses I/O standard 3.3-V LVTTL at A14
- Info: Pin IO[13] uses I/O standard 3.3-V LVTTL at E13
- Info: Pin IO[12] uses I/O standard 3.3-V LVTTL at D13
- Info: Pin IO[11] uses I/O standard 3.3-V LVTTL at C13
- Info: Pin IO[10] uses I/O standard 3.3-V LVTTL at B15
- Info: Pin IO[9] uses I/O standard 3.3-V LVTTL at A15
- Info: Pin IO[8] uses I/O standard 3.3-V LVTTL at G10
- Info: Pin IO[7] uses I/O standard 3.3-V LVTTL at C7
- Info: Pin IO[6] uses I/O standard 3.3-V LVTTL at C8
- Info: Pin IO[5] uses I/O standard 3.3-V LVTTL at E9
- Info: Pin IO[4] uses I/O standard 3.3-V LVTTL at B6
- Info: Pin IO[3] uses I/O standard 3.3-V LVTTL at A6
- Info: Pin IO[2] uses I/O standard 3.3-V LVTTL at B7
- Info: Pin IO[1] uses I/O standard 3.3-V LVTTL at A7
- Info: Pin IO[0] uses I/O standard 3.3-V LVTTL at A8
- Info: Pin SRD[15] uses I/O standard 3.3-V LVTTL at H10
- Info: Pin SRD[14] uses I/O standard 3.3-V LVTTL at G9
- Info: Pin SRD[13] uses I/O standard 3.3-V LVTTL at F10
- Info: Pin SRD[12] uses I/O standard 3.3-V LVTTL at D10
- Info: Pin SRD[11] uses I/O standard 3.3-V LVTTL at B10
- Info: Pin SRD[10] uses I/O standard 3.3-V LVTTL at A9
- Info: Pin SRD[9] uses I/O standard 3.3-V LVTTL at A10
- Info: Pin SRD[8] uses I/O standard 3.3-V LVTTL at B9
- Info: Pin SRD[7] uses I/O standard 3.3-V LVTTL at H11
- Info: Pin SRD[6] uses I/O standard 3.3-V LVTTL at E10
- Info: Pin SRD[5] uses I/O standard 3.3-V LVTTL at F9
- Info: Pin SRD[4] uses I/O standard 3.3-V LVTTL at C10
- Info: Pin SRD[3] uses I/O standard 3.3-V LVTTL at G11
- Info: Pin SRD[2] uses I/O standard 3.3-V LVTTL at C6
- Info: Pin SRD[1] uses I/O standard 3.3-V LVTTL at A5
- Info: Pin SRD[0] uses I/O standard 3.3-V LVTTL at B5
- Info: Pin SCSI_PAR uses I/O standard 3.3-V LVTTL at M7
- Info: Pin nSCSI_SEL uses I/O standard 3.3-V LVTTL at M8
- Info: Pin nSCSI_BUSY uses I/O standard 3.3-V LVTTL at N8
- Info: Pin nSCSI_RST uses I/O standard 3.3-V LVTTL at N6
- Info: Pin SD_CD_DATA3 uses I/O standard 3.3-V LVTTL at F13
- Info: Pin SD_CMD_D1 uses I/O standard 3.3-V LVTTL at E14
- Info: Pin ACSI_D[7] uses I/O standard 3.3-V LVTTL at H6
- Info: Pin ACSI_D[6] uses I/O standard 3.3-V LVTTL at H7
- Info: Pin ACSI_D[5] uses I/O standard 3.3-V LVTTL at D2
- Info: Pin ACSI_D[4] uses I/O standard 3.3-V LVTTL at C1
- Info: Pin ACSI_D[3] uses I/O standard 3.3-V LVTTL at C2
- Info: Pin ACSI_D[2] uses I/O standard 3.3-V LVTTL at E3
- Info: Pin ACSI_D[1] uses I/O standard 3.3-V LVTTL at G5
- Info: Pin ACSI_D[0] uses I/O standard 3.3-V LVTTL at B1
- Info: Pin LP_D[7] uses I/O standard 3.3-V LVTTL at G8
- Info: Pin LP_D[6] uses I/O standard 3.3-V LVTTL at A3
- Info: Pin LP_D[5] uses I/O standard 3.3-V LVTTL at B3
- Info: Pin LP_D[4] uses I/O standard 3.3-V LVTTL at D6
- Info: Pin LP_D[3] uses I/O standard 3.3-V LVTTL at E7
- Info: Pin LP_D[2] uses I/O standard 3.3-V LVTTL at C3
- Info: Pin LP_D[1] uses I/O standard 3.3-V LVTTL at C4
- Info: Pin LP_D[0] uses I/O standard 3.3-V LVTTL at F7
- Info: Pin SCSI_D[7] uses I/O standard 3.3-V LVTTL at K8
- Info: Pin SCSI_D[6] uses I/O standard 3.3-V LVTTL at L8
- Info: Pin SCSI_D[5] uses I/O standard 3.3-V LVTTL at G3
- Info: Pin SCSI_D[4] uses I/O standard 3.3-V LVTTL at G4
- Info: Pin SCSI_D[3] uses I/O standard 3.3-V LVTTL at F1
- Info: Pin SCSI_D[2] uses I/O standard 3.3-V LVTTL at F2
- Info: Pin SCSI_D[1] uses I/O standard 3.3-V LVTTL at E1
- Info: Pin SCSI_D[0] uses I/O standard 3.3-V LVTTL at J6
- Info: Pin nRSTO_MCF uses I/O standard 3.3-V LVTTL at B11
- Info: Pin nFB_WR uses I/O standard 3.3-V LVTTL at T5
- Info: Pin nFB_CS1 uses I/O standard 3.3-V LVTTL at T8
- Info: Pin FB_SIZE1 uses I/O standard 3.3-V LVTTL at Y4
- Info: Pin FB_SIZE0 uses I/O standard 3.3-V LVTTL at U8
- Info: Pin FB_ALE uses I/O standard 3.3-V LVTTL at R7
- Info: Pin nFB_CS2 uses I/O standard 3.3-V LVTTL at T9
- Info: Pin MAIN_CLK uses I/O standard 3.3-V LVTTL at G2
- Info: Pin nDACK1 uses I/O standard 3.3-V LVTTL at A12
- Info: Pin nFB_OE uses I/O standard 3.3-V LVTTL at R6
- Info: Pin IDE_RDY uses I/O standard 3.3-V LVTTL at Y1
- Info: Pin CLK33M uses I/O standard 3.3-V LVTTL at AB12
- Info: Pin HD_DD uses I/O standard 3.3-V LVTTL at F16
- Info: Pin nINDEX uses I/O standard 3.3-V LVTTL at E16
- Info: Pin RxD uses I/O standard 3.3-V LVTTL at H15
- Info: Pin nWP uses I/O standard 3.3-V LVTTL at D19
- Info: Pin LP_BUSY uses I/O standard 3.3-V LVTTL at G7
- Info: Pin DCD uses I/O standard 3.3-V LVTTL at A19
- Info: Pin CTS uses I/O standard 3.3-V LVTTL at H14
- Info: Pin TRACK00 uses I/O standard 3.3-V LVTTL at C19
- Info: Pin RI uses I/O standard 3.3-V LVTTL at B19
- Info: Pin nPCI_INTD uses I/O standard 3.3-V LVTTL at P6
- Info: Pin nPCI_INTC uses I/O standard 3.3-V LVTTL at V3
- Info: Pin nPCI_INTB uses I/O standard 3.3-V LVTTL at V4
- Info: Pin nPCI_INTA uses I/O standard 3.3-V LVTTL at AA1
- Info: Pin DVI_INT uses I/O standard 3.3-V LVTTL at A11
- Info: Pin PIC_INT uses I/O standard 3.3-V LVTTL at AA2
- Info: Pin PIC_AMKB_RX uses I/O standard 3.3-V LVTTL at L7
- Info: Pin MIDI_IN uses I/O standard 3.3-V LVTTL at E12
- Info: Pin nRD_DATA uses I/O standard 3.3-V LVTTL at A20
- Info: Pin AMKB_RX uses I/O standard 3.3-V LVTTL at Y2
-Warning: Following 40 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results
- Info: Pin IO[17] has a permanently enabled output enable
- Info: Pin IO[16] has a permanently enabled output enable
- Info: Pin IO[15] has a permanently enabled output enable
- Info: Pin IO[14] has a permanently enabled output enable
- Info: Pin IO[13] has a permanently enabled output enable
- Info: Pin IO[12] has a permanently enabled output enable
- Info: Pin IO[11] has a permanently enabled output enable
- Info: Pin IO[10] has a permanently enabled output enable
- Info: Pin IO[9] has a permanently enabled output enable
- Info: Pin IO[8] has a permanently enabled output enable
- Info: Pin IO[7] has a permanently enabled output enable
- Info: Pin IO[6] has a permanently enabled output enable
- Info: Pin IO[5] has a permanently enabled output enable
- Info: Pin IO[4] has a permanently enabled output enable
- Info: Pin IO[3] has a permanently enabled output enable
- Info: Pin IO[2] has a permanently enabled output enable
- Info: Pin IO[1] has a permanently enabled output enable
- Info: Pin IO[0] has a permanently enabled output enable
- Info: Pin SCSI_PAR has a permanently disabled output enable
- Info: Pin nSCSI_SEL has a permanently enabled output enable
- Info: Pin nSCSI_BUSY has a permanently enabled output enable
- Info: Pin nSCSI_RST has a permanently disabled output enable
- Info: Pin SD_CD_DATA3 has a permanently disabled output enable
- Info: Pin SD_CMD_D1 has a permanently disabled output enable
- Info: Pin ACSI_D[7] has a permanently disabled output enable
- Info: Pin ACSI_D[6] has a permanently disabled output enable
- Info: Pin ACSI_D[5] has a permanently disabled output enable
- Info: Pin ACSI_D[4] has a permanently disabled output enable
- Info: Pin ACSI_D[3] has a permanently disabled output enable
- Info: Pin ACSI_D[2] has a permanently disabled output enable
- Info: Pin ACSI_D[1] has a permanently disabled output enable
- Info: Pin ACSI_D[0] has a permanently disabled output enable
- Info: Pin SCSI_D[7] has a permanently disabled output enable
- Info: Pin SCSI_D[6] has a permanently disabled output enable
- Info: Pin SCSI_D[5] has a permanently disabled output enable
- Info: Pin SCSI_D[4] has a permanently disabled output enable
- Info: Pin SCSI_D[3] has a permanently disabled output enable
- Info: Pin SCSI_D[2] has a permanently disabled output enable
- Info: Pin SCSI_D[1] has a permanently disabled output enable
- Info: Pin SCSI_D[0] has a permanently disabled output enable
-Info: Quartus II Fitter was successful. 0 errors, 34 warnings
- Info: Peak virtual memory: 334 megabytes
- Info: Processing ended: Wed Dec 15 02:25:07 2010
- Info: Elapsed time: 00:03:10
- Info: Total CPU time (on all processors): 00:03:11
-
-
diff --git a/FPGA_by_Fredi/firebee1.fit.summary b/FPGA_by_Fredi/firebee1.fit.summary
index f177099..f4ccea5 100644
--- a/FPGA_by_Fredi/firebee1.fit.summary
+++ b/FPGA_by_Fredi/firebee1.fit.summary
@@ -1,16 +1,16 @@
-Fitter Status : Successful - Wed Dec 15 02:25:02 2010
+Fitter Status : Successful - Fri Aug 28 13:39:32 2015
Quartus II Version : 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
Revision Name : firebee1
Top-level Entity Name : firebee1
Family : Cyclone III
Device : EP3C40F484C6
Timing Models : Final
-Total logic elements : 9,526 / 39,600 ( 24 % )
- Total combinational functions : 8,061 / 39,600 ( 20 % )
- Dedicated logic registers : 4,563 / 39,600 ( 12 % )
-Total registers : 4749
+Total logic elements : 10,207 / 39,600 ( 26 % )
+ Total combinational functions : 8,661 / 39,600 ( 22 % )
+ Dedicated logic registers : 5,025 / 39,600 ( 13 % )
+Total registers : 5162
Total pins : 295 / 332 ( 89 % )
Total virtual pins : 0
-Total memory bits : 109,344 / 1,161,216 ( 9 % )
+Total memory bits : 109,600 / 1,161,216 ( 9 % )
Embedded Multiplier 9-bit elements : 6 / 252 ( 2 % )
Total PLLs : 4 / 4 ( 100 % )
diff --git a/FPGA_by_Fredi/firebee1.flow.rpt b/FPGA_by_Fredi/firebee1.flow.rpt
deleted file mode 100644
index 297d7a0..0000000
--- a/FPGA_by_Fredi/firebee1.flow.rpt
+++ /dev/null
@@ -1,380 +0,0 @@
-Flow report for firebee1
-Wed Dec 15 02:25:22 2010
-Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
-
-
----------------------
-; Table of Contents ;
----------------------
- 1. Legal Notice
- 2. Flow Summary
- 3. Flow Settings
- 4. Flow Non-Default Global Settings
- 5. Flow Elapsed Time
- 6. Flow OS Summary
- 7. Flow Log
-
-
-
-----------------
-; Legal Notice ;
-----------------
-Copyright (C) 1991-2010 Altera Corporation
-Your use of Altera Corporation's design tools, logic functions
-and other software and tools, and its AMPP partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Altera Program License
-Subscription Agreement, Altera MegaCore Function License
-Agreement, or other applicable license agreement, including,
-without limitation, that your use is for the sole purpose of
-programming logic devices manufactured by Altera and sold by
-Altera or its authorized distributors. Please refer to the
-applicable agreement for further details.
-
-
-
-+-----------------------------------------------------------------------------------+
-; Flow Summary ;
-+------------------------------------+----------------------------------------------+
-; Flow Status ; Successful - Wed Dec 15 02:25:21 2010 ;
-; Quartus II Version ; 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition ;
-; Revision Name ; firebee1 ;
-; Top-level Entity Name ; firebee1 ;
-; Family ; Cyclone III ;
-; Device ; EP3C40F484C6 ;
-; Timing Models ; Final ;
-; Met timing requirements ; No ;
-; Total logic elements ; 9,526 / 39,600 ( 24 % ) ;
-; Total combinational functions ; 8,061 / 39,600 ( 20 % ) ;
-; Dedicated logic registers ; 4,563 / 39,600 ( 12 % ) ;
-; Total registers ; 4749 ;
-; Total pins ; 295 / 332 ( 89 % ) ;
-; Total virtual pins ; 0 ;
-; Total memory bits ; 109,344 / 1,161,216 ( 9 % ) ;
-; Embedded Multiplier 9-bit elements ; 6 / 252 ( 2 % ) ;
-; Total PLLs ; 4 / 4 ( 100 % ) ;
-+------------------------------------+----------------------------------------------+
-
-
-+-----------------------------------------+
-; Flow Settings ;
-+-------------------+---------------------+
-; Option ; Setting ;
-+-------------------+---------------------+
-; Start date & time ; 12/15/2010 02:20:37 ;
-; Main task ; Compilation ;
-; Revision Name ; firebee1 ;
-+-------------------+---------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Flow Non-Default Global Settings ;
-+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
-; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
-+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
-; COMPILER_SIGNATURE_ID ; 150661768621.129237603704664 ; -- ; -- ; -- ;
-; CYCLONEII_OPTIMIZATION_TECHNIQUE ; Speed ; Balanced ; -- ; -- ;
-; FMAX_REQUIREMENT ; 30 ns ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_COUNTER ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_RAM_DP+ ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_RAM_DP+ ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_RAM_DP+ ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_LATCH ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_CONSTANT ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_COMPARE ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_BUSTRI ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_FF ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_FF ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_FF ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTDDIO_BIDIR ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_SHIFTREG ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTDDIO_OUT ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_FIFO+ ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_FIFO+ ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; LPM_MUX ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTPLL_RECONFIG ; -- ; -- ; -- ;
-; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 8.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
-; IP_TOOL_VERSION ; 9.1 ; -- ; -- ; -- ;
-; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
-; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
-; MISC_FILE ; C:/firebee/FPGA/firebee1.dpf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll1.inc ; -- ; -- ; -- ;
-; MISC_FILE ; altpll1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; altpll1.ppf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll2.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll2.inc ; -- ; -- ; -- ;
-; MISC_FILE ; altpll2.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; altpll2.ppf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll3.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll3.inc ; -- ; -- ; -- ;
-; MISC_FILE ; altpll3.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; altpll3.ppf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll0.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll0.inc ; -- ; -- ; -- ;
-; MISC_FILE ; altpll0.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; altpll0.ppf ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_counter0.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_counter0.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg0.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg0.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg0.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altdpram0.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altdpram0.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altdpram0.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_bustri1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_bustri1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altdpram1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altdpram1.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altdpram1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_bustri2.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_bustri2.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_bustri4.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_bustri4.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant0.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant0.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant1.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux0.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux0.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux0.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux1.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux2.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux2.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux2.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant2.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant2.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altdpram2.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altdpram2.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altdpram2.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_bustri6.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_bustri6.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux3.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux3.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux4.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux4.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant3.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant3.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_latch1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_latch1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant4.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant4.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_constant4.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg2.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg2.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_compare1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_compare1.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_compare1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_bustri_LONG.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_bustri_LONG.inc ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_bustri_LONG.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_bustri_BYT.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_bustri_BYT.inc ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_bustri_BYT.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_bustri_WORD.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_bustri_WORD.inc ; -- ; -- ; -- ;
-; MISC_FILE ; lpm_bustri_WORD.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_ff4.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_ff4.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_ff4.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_ff5.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_ff5.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_ff5.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_ff6.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_ff6.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_ff6.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg3.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg3.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg3.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_bidir0.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_bidir0.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_bidir0.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_bidir0.ppf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out0.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out0.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out0.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out0.ppf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux5.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux5.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux5.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg5.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg5.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg5.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg6.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg6.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg6.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg4.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg4.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_shiftreg4.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out1.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out1.ppf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out2.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out2.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out2.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/altddio_out2.ppf ; -- ; -- ; -- ;
-; MISC_FILE ; altddio_out3.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; altddio_out3.inc ; -- ; -- ; -- ;
-; MISC_FILE ; altddio_out3.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; altddio_out3.ppf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux6.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux6.inc ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_mux6.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo0.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo0.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; FalconIO_SDCard_IDE_CF/dcfifo1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_muxDZ.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_muxDZ.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_muxVDM.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; Video/lpm_muxVDM.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; C:/FireBee/FPGA/firebee1.dpf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll_reconfig1.tdf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll_reconfig1.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll_reconfig1.inc ; -- ; -- ; -- ;
-; MISC_FILE ; altpll_reconfig1.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; altpll4.tdf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll4.bsf ; -- ; -- ; -- ;
-; MISC_FILE ; altpll4.inc ; -- ; -- ; -- ;
-; MISC_FILE ; altpll4.cmp ; -- ; -- ; -- ;
-; MISC_FILE ; altpll4.ppf ; -- ; -- ; -- ;
-; NOMINAL_CORE_SUPPLY_VOLTAGE ; 1.2V ; -- ; -- ; -- ;
-; PARTITION_COLOR ; 16764057 ; -- ; -- ; Top ;
-; PARTITION_NETLIST_TYPE ; SOURCE ; -- ; -- ; Top ;
-; PHYSICAL_SYNTHESIS_COMBO_LOGIC ; On ; Off ; -- ; -- ;
-; PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ; On ; Off ; -- ; -- ;
-; PHYSICAL_SYNTHESIS_EFFORT ; Fast ; Normal ; -- ; -- ;
-; PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ; On ; Off ; -- ; -- ;
-; STATE_MACHINE_PROCESSING ; One-Hot ; Auto ; -- ; -- ;
-; TCO_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
-; TH_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
-; TPD_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
-; TSU_REQUIREMENT ; 1 ns ; -- ; -- ; -- ;
-; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off ; -- ; -- ; eda_blast_fpga ;
-; USE_TIMEQUEST_TIMING_ANALYZER ; Off ; On ; -- ; -- ;
-+-----------------------------------------+------------------------------------+---------------+-------------+----------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Flow Elapsed Time ;
-+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
-; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
-+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
-; Analysis & Synthesis ; 00:01:16 ; 1.0 ; 347 MB ; 00:01:17 ;
-; Fitter ; 00:03:05 ; 1.0 ; 334 MB ; 00:03:07 ;
-; Assembler ; 00:00:05 ; 1.0 ; 291 MB ; 00:00:04 ;
-; Classic Timing Analyzer ; 00:00:07 ; 1.0 ; 227 MB ; 00:00:09 ;
-; Total ; 00:04:33 ; -- ; -- ; 00:04:37 ;
-+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
-
-
-+------------------------------------------------------------------------------------------+
-; Flow OS Summary ;
-+-------------------------+------------------+---------------+------------+----------------+
-; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
-+-------------------------+------------------+---------------+------------+----------------+
-; Analysis & Synthesis ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
-; Fitter ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
-; Assembler ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
-; Classic Timing Analyzer ; envy15 ; Windows Vista ; 6.1 ; x86_64 ;
-+-------------------------+------------------+---------------+------------+----------------+
-
-
-------------
-; Flow Log ;
-------------
-quartus_map --read_settings_files=on --write_settings_files=off firebeei1 -c firebee1
-quartus_fit --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
-quartus_asm --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1
-quartus_tan --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1 --timing_analysis_only
-
-
-
diff --git a/FPGA_by_Fredi/firebee1.map.rpt b/FPGA_by_Fredi/firebee1.map.rpt
deleted file mode 100644
index 11a1ac1..0000000
--- a/FPGA_by_Fredi/firebee1.map.rpt
+++ /dev/null
@@ -1,8590 +0,0 @@
-Analysis & Synthesis report for firebee1
-Wed Dec 15 02:21:56 2010
-Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
-
-
----------------------
-; Table of Contents ;
----------------------
- 1. Legal Notice
- 2. Analysis & Synthesis Summary
- 3. Analysis & Synthesis Settings
- 4. Parallel Compilation
- 5. Analysis & Synthesis Source Files Read
- 6. Analysis & Synthesis Resource Usage Summary
- 7. Analysis & Synthesis Resource Utilization by Entity
- 8. Analysis & Synthesis RAM Summary
- 9. Analysis & Synthesis DSP Block Usage Summary
- 10. State Machine - |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_REGDDR
- 11. State Machine - |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_SM
- 12. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_STATE
- 13. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|CMD_STATE
- 14. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_STATE
- 15. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|TR_STATE
- 16. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|RCV_STATE
- 17. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|TR_STATE
- 18. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|RCV_STATE
- 19. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|TR_STATE
- 20. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|RCV_STATE
- 21. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE
- 22. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE
- 23. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|PRECOMP
- 24. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_STATE
- 25. State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE
- 26. Registers Protected by Synthesis
- 27. User-Specified and Inferred Latches
- 28. Registers Removed During Synthesis
- 29. Removed Registers Triggering Further Register Optimizations
- 30. General Register Statistics
- 31. Inverted Register Statistics
- 32. Multiplexer Restructuring Statistics (Restructuring Performed)
- 33. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated
- 34. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p
- 35. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p
- 36. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram
- 37. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_ikd:rs_dgwp
- 38. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_ikd:rs_dgwp|dffpipe_hd9:dffpipe12
- 39. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_gd9:ws_brp
- 40. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_pe9:ws_bwp
- 41. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp
- 42. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17
- 43. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated
- 44. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p
- 45. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_gic:wrptr_g1p
- 46. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram
- 47. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_pe9:rs_brp
- 48. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_gd9:rs_bwp
- 49. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp
- 50. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12
- 51. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_lkd:ws_dgrp
- 52. Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_lkd:ws_dgrp|dffpipe_kd9:dffpipe15
- 53. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component
- 54. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated
- 55. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p
- 56. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_ojc:wrptr_g1p
- 57. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp
- 58. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram
- 59. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_rld:rs_dgwp
- 60. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_rld:rs_dgwp|dffpipe_qe9:dffpipe15
- 61. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_9d9:wraclr
- 62. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp
- 63. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp
- 64. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp
- 65. Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22
- 66. Source assignments for Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component
- 67. Source assignments for Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated
- 68. Source assignments for Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated
- 69. Source assignments for Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram
- 70. Source assignments for Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated
- 71. Source assignments for Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated
- 72. Source assignments for Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated
- 73. Source assignments for Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated
- 74. Source assignments for Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated
- 75. Source assignments for Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated
- 76. Source assignments for Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated
- 77. Source assignments for Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated
- 78. Source assignments for Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component
- 79. Source assignments for Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component|ddio_out_o2f:auto_generated
- 80. Source assignments for Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component
- 81. Source assignments for Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated
- 82. Source assignments for altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated
- 83. Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component
- 84. Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4|altsyncram_46r:auto_generated
- 85. Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1
- 86. Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12
- 87. Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13
- 88. Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14
- 89. Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15
- 90. Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2
- 91. Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3
- 92. Source assignments for lpm_counter0:inst18|lpm_counter:lpm_counter_component
- 93. Source assignments for altddio_out3:inst5|altddio_out:altddio_out_component
- 94. Source assignments for altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated
- 95. Source assignments for altddio_out3:inst6|altddio_out:altddio_out_component
- 96. Source assignments for altddio_out3:inst6|altddio_out:altddio_out_component|ddio_out_31f:auto_generated
- 97. Source assignments for altddio_out3:inst8|altddio_out:altddio_out_component
- 98. Source assignments for altddio_out3:inst8|altddio_out:altddio_out_component|ddio_out_31f:auto_generated
- 99. Source assignments for altddio_out3:inst9|altddio_out:altddio_out_component
-100. Source assignments for altddio_out3:inst9|altddio_out:altddio_out_component|ddio_out_31f:auto_generated
-101. Parameter Settings for User Entity Instance: altpll1:inst|altpll:altpll_component
-102. Parameter Settings for User Entity Instance: FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component
-103. Parameter Settings for User Entity Instance: FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component
-104. Parameter Settings for User Entity Instance: FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL
-105. Parameter Settings for User Entity Instance: altpll3:inst13|altpll:altpll_component
-106. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component
-107. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00002|lpm_bustri:lpm_bustri_component
-108. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg6:inst89|lpm_shiftreg:lpm_shiftreg_component
-109. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component
-110. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component
-111. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component
-112. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component
-113. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_muxVDM:inst100|LPM_MUX:lpm_mux_component
-114. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component
-115. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component
-116. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component
-117. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component
-118. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component
-119. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux5:inst22|LPM_MUX:lpm_mux_component
-120. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component
-121. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component
-122. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component
-123. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component
-124. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component
-125. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component
-126. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff6:inst36|lpm_ff:lpm_ff_component
-127. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_LONG:inst108|lpm_bustri:lpm_bustri_component
-128. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component
-129. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_LONG:inst119|lpm_bustri:lpm_bustri_component
-130. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst19|lpm_ff:lpm_ff_component
-131. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component
-132. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_LONG:inst110|lpm_bustri:lpm_bustri_component
-133. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst18|lpm_ff:lpm_ff_component
-134. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_LONG:inst109|lpm_bustri:lpm_bustri_component
-135. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component
-136. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri3:inst66|lpm_bustri:lpm_bustri_component
-137. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component
-138. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component
-139. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component
-140. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component
-141. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component
-142. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component
-143. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_muxDZ:inst62|LPM_MUX:lpm_mux_component
-144. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component
-145. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component
-146. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component
-147. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component
-148. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri3:inst70|lpm_bustri:lpm_bustri_component
-149. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component
-150. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri3:inst74|lpm_bustri:lpm_bustri_component
-151. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component
-152. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri1:inst51|lpm_bustri:lpm_bustri_component
-153. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component
-154. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri1:inst56|lpm_bustri:lpm_bustri_component
-155. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component
-156. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri1:inst61|lpm_bustri:lpm_bustri_component
-157. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component
-158. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_BYT:inst58|lpm_bustri:lpm_bustri_component
-159. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component
-160. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux3:inst102|LPM_MUX:lpm_mux_component
-161. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff5:inst11|lpm_ff:lpm_ff_component
-162. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux2:inst25|LPM_MUX:lpm_mux_component
-163. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux4:inst81|LPM_MUX:lpm_mux_component
-164. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant3:inst82|lpm_constant:lpm_constant_component
-165. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_BYT:inst57|lpm_bustri:lpm_bustri_component
-166. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component
-167. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_BYT:inst53|lpm_bustri:lpm_bustri_component
-168. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component
-169. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component
-170. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux6:inst7|LPM_MUX:lpm_mux_component
-171. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component
-172. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component
-173. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant0:inst59|lpm_constant:lpm_constant_component
-174. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant0:inst54|lpm_constant:lpm_constant_component
-175. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant0:inst64|lpm_constant:lpm_constant_component
-176. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component
-177. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component
-178. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant1:inst77|lpm_constant:lpm_constant_component
-179. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant1:inst80|lpm_constant:lpm_constant_component
-180. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant1:inst83|lpm_constant:lpm_constant_component
-181. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component
-182. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux1:inst24|LPM_MUX:lpm_mux_component
-183. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant2:inst23|lpm_constant:lpm_constant_component
-184. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component
-185. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux0:inst21|LPM_MUX:lpm_mux_component
-186. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component
-187. Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component
-188. Parameter Settings for User Entity Instance: altpll2:inst12|altpll:altpll_component
-189. Parameter Settings for User Entity Instance: altpll4:inst22|altpll:altpll_component
-190. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component
-191. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4
-192. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub5
-193. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub6
-194. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7
-195. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1
-196. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12
-197. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13
-198. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14
-199. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15
-200. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2
-201. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3
-202. Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_decode:decode11
-203. Parameter Settings for User Entity Instance: lpm_ff0:inst1|lpm_ff:lpm_ff_component
-204. Parameter Settings for User Entity Instance: interrupt_handler:nobody|lpm_bustri_BYT:$00000|lpm_bustri:lpm_bustri_component
-205. Parameter Settings for User Entity Instance: interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component
-206. Parameter Settings for User Entity Instance: interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component
-207. Parameter Settings for User Entity Instance: interrupt_handler:nobody|lpm_bustri_BYT:$00006|lpm_bustri:lpm_bustri_component
-208. Parameter Settings for User Entity Instance: lpm_counter0:inst18|lpm_counter:lpm_counter_component
-209. Parameter Settings for User Entity Instance: altddio_out3:inst5|altddio_out:altddio_out_component
-210. Parameter Settings for User Entity Instance: altddio_out3:inst6|altddio_out:altddio_out_component
-211. Parameter Settings for User Entity Instance: altddio_out3:inst8|altddio_out:altddio_out_component
-212. Parameter Settings for User Entity Instance: altddio_out3:inst9|altddio_out:altddio_out_component
-213. Parameter Settings for Inferred Entity Instance: Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14
-214. Parameter Settings for Inferred Entity Instance: Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6
-215. Parameter Settings for Inferred Entity Instance: Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_12
-216. altpll Parameter Settings by Entity Instance
-217. lpm_shiftreg Parameter Settings by Entity Instance
-218. dcfifo Parameter Settings by Entity Instance
-219. scfifo Parameter Settings by Entity Instance
-220. altsyncram Parameter Settings by Entity Instance
-221. lpm_mult Parameter Settings by Entity Instance
-222. Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND"
-223. Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP"
-224. Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI"
-225. Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD"
-226. Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS"
-227. Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI"
-228. Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC"
-229. Analysis & Synthesis Messages
-
-
-
-----------------
-; Legal Notice ;
-----------------
-Copyright (C) 1991-2010 Altera Corporation
-Your use of Altera Corporation's design tools, logic functions
-and other software and tools, and its AMPP partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Altera Program License
-Subscription Agreement, Altera MegaCore Function License
-Agreement, or other applicable license agreement, including,
-without limitation, that your use is for the sole purpose of
-programming logic devices manufactured by Altera and sold by
-Altera or its authorized distributors. Please refer to the
-applicable agreement for further details.
-
-
-
-+-----------------------------------------------------------------------------------+
-; Analysis & Synthesis Summary ;
-+------------------------------------+----------------------------------------------+
-; Analysis & Synthesis Status ; Successful - Wed Dec 15 02:21:55 2010 ;
-; Quartus II Version ; 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition ;
-; Revision Name ; firebee1 ;
-; Top-level Entity Name ; firebee1 ;
-; Family ; Cyclone III ;
-; Total logic elements ; 10,706 ;
-; Total combinational functions ; 8,060 ;
-; Dedicated logic registers ; 4,612 ;
-; Total registers ; 4740 ;
-; Total pins ; 295 ;
-; Total virtual pins ; 0 ;
-; Total memory bits ; 109,344 ;
-; Embedded Multiplier 9-bit elements ; 6 ;
-; Total PLLs ; 4 ;
-+------------------------------------+----------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------+
-; Analysis & Synthesis Settings ;
-+----------------------------------------------------------------------------+--------------------+--------------------+
-; Option ; Setting ; Default Value ;
-+----------------------------------------------------------------------------+--------------------+--------------------+
-; Device ; EP3C40F484C6 ; ;
-; Top-level entity name ; firebee1 ; firebee1 ;
-; Family name ; Cyclone III ; Stratix II ;
-; State Machine Processing ; One-Hot ; Auto ;
-; Optimization Technique ; Speed ; Balanced ;
-; Use Generated Physical Constraints File ; Off ; ;
-; Use smart compilation ; Off ; Off ;
-; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
-; Enable compact report table ; Off ; Off ;
-; Restructure Multiplexers ; Auto ; Auto ;
-; Create Debugging Nodes for IP Cores ; Off ; Off ;
-; Preserve fewer node names ; On ; On ;
-; Disable OpenCore Plus hardware evaluation ; Off ; Off ;
-; Verilog Version ; Verilog_2001 ; Verilog_2001 ;
-; VHDL Version ; VHDL_1993 ; VHDL_1993 ;
-; Safe State Machine ; Off ; Off ;
-; Extract Verilog State Machines ; On ; On ;
-; Extract VHDL State Machines ; On ; On ;
-; Ignore Verilog initial constructs ; Off ; Off ;
-; Iteration limit for constant Verilog loops ; 5000 ; 5000 ;
-; Iteration limit for non-constant Verilog loops ; 250 ; 250 ;
-; Add Pass-Through Logic to Inferred RAMs ; On ; On ;
-; Parallel Synthesis ; On ; On ;
-; DSP Block Balancing ; Auto ; Auto ;
-; NOT Gate Push-Back ; On ; On ;
-; Power-Up Don't Care ; On ; On ;
-; Remove Redundant Logic Cells ; Off ; Off ;
-; Remove Duplicate Registers ; On ; On ;
-; Ignore CARRY Buffers ; Off ; Off ;
-; Ignore CASCADE Buffers ; Off ; Off ;
-; Ignore GLOBAL Buffers ; Off ; Off ;
-; Ignore ROW GLOBAL Buffers ; Off ; Off ;
-; Ignore LCELL Buffers ; Off ; Off ;
-; Ignore SOFT Buffers ; On ; On ;
-; Limit AHDL Integers to 32 Bits ; Off ; Off ;
-; Carry Chain Length ; 70 ; 70 ;
-; Auto Carry Chains ; On ; On ;
-; Auto Open-Drain Pins ; On ; On ;
-; Perform WYSIWYG Primitive Resynthesis ; Off ; Off ;
-; Auto ROM Replacement ; On ; On ;
-; Auto RAM Replacement ; On ; On ;
-; Auto DSP Block Replacement ; On ; On ;
-; Auto Shift Register Replacement ; Auto ; Auto ;
-; Auto Clock Enable Replacement ; On ; On ;
-; Strict RAM Replacement ; Off ; Off ;
-; Allow Synchronous Control Signals ; On ; On ;
-; Force Use of Synchronous Clear Signals ; Off ; Off ;
-; Auto RAM Block Balancing ; On ; On ;
-; Auto RAM to Logic Cell Conversion ; Off ; Off ;
-; Auto Resource Sharing ; Off ; Off ;
-; Allow Any RAM Size For Recognition ; Off ; Off ;
-; Allow Any ROM Size For Recognition ; Off ; Off ;
-; Allow Any Shift Register Size For Recognition ; Off ; Off ;
-; Use LogicLock Constraints during Resource Balancing ; On ; On ;
-; Ignore translate_off and synthesis_off directives ; Off ; Off ;
-; Timing-Driven Synthesis ; On ; On ;
-; Show Parameter Settings Tables in Synthesis Report ; On ; On ;
-; Ignore Maximum Fan-Out Assignments ; Off ; Off ;
-; Synchronization Register Chain Length ; 2 ; 2 ;
-; PowerPlay Power Optimization ; Normal compilation ; Normal compilation ;
-; HDL message level ; Level2 ; Level2 ;
-; Suppress Register Optimization Related Messages ; Off ; Off ;
-; Number of Removed Registers Reported in Synthesis Report ; 5000 ; 5000 ;
-; Number of Inverted Registers Reported in Synthesis Report ; 100 ; 100 ;
-; Clock MUX Protection ; On ; On ;
-; Auto Gated Clock Conversion ; Off ; Off ;
-; Block Design Naming ; Auto ; Auto ;
-; SDC constraint protection ; Off ; Off ;
-; Synthesis Effort ; Auto ; Auto ;
-; Shift Register Replacement - Allow Asynchronous Clear Signal ; On ; On ;
-; Analysis & Synthesis Message Level ; Medium ; Medium ;
-; Disable Register Merging Across Hierarchies ; Auto ; Auto ;
-; Resource Aware Inference For Block RAM ; On ; On ;
-+----------------------------------------------------------------------------+--------------------+--------------------+
-
-
-Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
-+-------------------------------------+
-; Parallel Compilation ;
-+----------------------------+--------+
-; Processors ; Number ;
-+----------------------------+--------+
-; Number detected on machine ; 4 ;
-; Maximum allowed ; 1 ;
-+----------------------------+--------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Analysis & Synthesis Source Files Read ;
-+----------------------------------------------------------------+-----------------+------------------------------------+--------------------------------------------------------------------------------+
-; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ;
-+----------------------------------------------------------------+-----------------+------------------------------------+--------------------------------------------------------------------------------+
-; FalconIO_SDCard_IDE_CF/WF5380/wf5380_control.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF5380/wf5380_control.vhd ;
-; FalconIO_SDCard_IDE_CF/WF5380/wf5380_pkg.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF5380/wf5380_pkg.vhd ;
-; FalconIO_SDCard_IDE_CF/WF5380/wf5380_registers.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF5380/wf5380_registers.vhd ;
-; FalconIO_SDCard_IDE_CF/WF5380/wf5380_soc_top.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF5380/wf5380_soc_top.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_am_detector.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_am_detector.vhd ;
-; FalconIO_SDCard_IDE_CF/dcfifo0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/dcfifo0.vhd ;
-; Video/DDR_CTR.tdf ; yes ; User AHDL File ; C:/FireBee/FPGA/Video/DDR_CTR.tdf ;
-; FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_control.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_control.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_crc_logic.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_crc_logic.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_digital_pll.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_digital_pll.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_pkg.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_pkg.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_registers.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_registers.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top_soc.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top_soc.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_transceiver.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_transceiver.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top_soc.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top_soc.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_gpio.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_gpio.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_pkg.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_pkg.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_timers.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_timers.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top_soc.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top_soc.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_ctrl.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_ctrl.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_rx.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_rx.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_top.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_top.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_tx.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_tx.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_pkg.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_pkg.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd ;
-; FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_wave.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_wave.vhd ;
-; lpm_latch0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/lpm_latch0.vhd ;
-; altpll1.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/altpll1.vhd ;
-; Video/lpm_fifoDZ.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_fifoDZ.vhd ;
-; altpll2.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/altpll2.vhd ;
-; altpll3.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/altpll3.vhd ;
-; Video/altdpram0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/altdpram0.vhd ;
-; Video/lpm_muxDZ.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_muxDZ.vhd ;
-; Video/lpm_bustri3.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_bustri3.vhd ;
-; Video/lpm_ff0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_ff0.vhd ;
-; Video/lpm_ff1.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_ff1.vhd ;
-; Video/lpm_ff3.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_ff3.vhd ;
-; Video/VIDEO_MOD_MUX_CLUTCTR.tdf ; yes ; User AHDL File ; C:/FireBee/FPGA/Video/VIDEO_MOD_MUX_CLUTCTR.tdf ;
-; Video/lpm_fifo_dc0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_fifo_dc0.vhd ;
-; Video/Video.bdf ; yes ; User Block Diagram/Schematic File ; C:/FireBee/FPGA/Video/Video.bdf ;
-; firebee1.bdf ; yes ; User Block Diagram/Schematic File ; C:/FireBee/FPGA/firebee1.bdf ;
-; lpm_counter0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/lpm_counter0.vhd ;
-; FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd ;
-; DSP/DSP.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/DSP/DSP.vhd ;
-; Video/lpm_shiftreg0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_shiftreg0.vhd ;
-; Video/lpm_bustri1.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_bustri1.vhd ;
-; Video/altdpram1.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/altdpram1.vhd ;
-; Video/lpm_constant0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_constant0.vhd ;
-; Video/lpm_constant1.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_constant1.vhd ;
-; Video/lpm_mux0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_mux0.vhd ;
-; Video/lpm_mux1.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_mux1.vhd ;
-; Video/lpm_mux2.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_mux2.vhd ;
-; Video/lpm_constant2.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_constant2.vhd ;
-; Video/altdpram2.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/altdpram2.vhd ;
-; Video/lpm_mux3.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_mux3.vhd ;
-; Video/lpm_mux4.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_mux4.vhd ;
-; Video/lpm_constant3.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_constant3.vhd ;
-; Interrupt_Handler/interrupt_handler.tdf ; yes ; User AHDL File ; C:/FireBee/FPGA/Interrupt_Handler/interrupt_handler.tdf ;
-; lpm_bustri_LONG.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/lpm_bustri_LONG.vhd ;
-; lpm_bustri_BYT.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/lpm_bustri_BYT.vhd ;
-; lpm_bustri_WORD.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/lpm_bustri_WORD.vhd ;
-; Video/lpm_ff4.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_ff4.vhd ;
-; Video/lpm_ff5.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_ff5.vhd ;
-; Video/lpm_ff6.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_ff6.vhd ;
-; Video/altddio_bidir0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/altddio_bidir0.vhd ;
-; Video/altddio_out0.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/altddio_out0.vhd ;
-; Video/lpm_mux5.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_mux5.vhd ;
-; Video/BLITTER/BLITTER.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/Video/BLITTER/BLITTER.vhd ;
-; Video/lpm_shiftreg6.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_shiftreg6.vhd ;
-; Video/lpm_shiftreg4.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_shiftreg4.vhd ;
-; Video/altddio_out2.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/altddio_out2.vhd ;
-; altddio_out3.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/altddio_out3.vhd ;
-; Video/lpm_mux6.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_mux6.vhd ;
-; FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF_pgk.vhd ; yes ; User VHDL File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF_pgk.vhd ;
-; FalconIO_SDCard_IDE_CF/dcfifo1.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/FalconIO_SDCard_IDE_CF/dcfifo1.vhd ;
-; Video/lpm_muxVDM.vhd ; yes ; User Wizard-Generated File ; C:/FireBee/FPGA/Video/lpm_muxVDM.vhd ;
-; lpm_bustri_byt.inc ; yes ; Auto-Found AHDL File ; C:/FireBee/FPGA/lpm_bustri_byt.inc ;
-; lpm_bustri_word.inc ; yes ; Auto-Found AHDL File ; C:/FireBee/FPGA/lpm_bustri_word.inc ;
-; lpm_bustri_long.inc ; yes ; Auto-Found AHDL File ; C:/FireBee/FPGA/lpm_bustri_long.inc ;
-; altpll.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/altpll.tdf ;
-; db/altpll_pul2.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altpll_pul2.tdf ;
-; dcfifo_mixed_widths.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/dcfifo_mixed_widths.tdf ;
-; db/dcfifo_0hh1.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dcfifo_0hh1.tdf ;
-; db/a_gray2bin_lfb.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/a_gray2bin_lfb.tdf ;
-; db/a_graycounter_k47.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/a_graycounter_k47.tdf ;
-; db/a_graycounter_fic.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/a_graycounter_fic.tdf ;
-; db/altsyncram_bi31.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altsyncram_bi31.tdf ;
-; db/alt_synch_pipe_ikd.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/alt_synch_pipe_ikd.tdf ;
-; db/dffpipe_hd9.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dffpipe_hd9.tdf ;
-; db/dffpipe_gd9.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dffpipe_gd9.tdf ;
-; db/dffpipe_pe9.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dffpipe_pe9.tdf ;
-; db/alt_synch_pipe_jkd.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/alt_synch_pipe_jkd.tdf ;
-; db/dffpipe_id9.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dffpipe_id9.tdf ;
-; db/cmpr_256.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cmpr_256.tdf ;
-; db/cmpr_156.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cmpr_156.tdf ;
-; db/cntr_t2e.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cntr_t2e.tdf ;
-; db/mux_a18.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mux_a18.tdf ;
-; db/dcfifo_3fh1.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dcfifo_3fh1.tdf ;
-; db/a_graycounter_j47.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/a_graycounter_j47.tdf ;
-; db/a_graycounter_gic.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/a_graycounter_gic.tdf ;
-; db/altsyncram_ci31.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altsyncram_ci31.tdf ;
-; db/alt_synch_pipe_kkd.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/alt_synch_pipe_kkd.tdf ;
-; db/dffpipe_jd9.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dffpipe_jd9.tdf ;
-; db/alt_synch_pipe_lkd.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/alt_synch_pipe_lkd.tdf ;
-; db/dffpipe_kd9.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dffpipe_kd9.tdf ;
-; db/altpll_41p2.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altpll_41p2.tdf ;
-; lpm_bustri.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_bustri.tdf ;
-; lpm_shiftreg.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_shiftreg.tdf ;
-; dcfifo.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/dcfifo.tdf ;
-; db/dcfifo_8fi1.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dcfifo_8fi1.tdf ;
-; db/a_gray2bin_tgb.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/a_gray2bin_tgb.tdf ;
-; db/a_graycounter_s57.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/a_graycounter_s57.tdf ;
-; db/a_graycounter_ojc.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/a_graycounter_ojc.tdf ;
-; db/a_graycounter_njc.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/a_graycounter_njc.tdf ;
-; db/altsyncram_tl31.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altsyncram_tl31.tdf ;
-; db/alt_synch_pipe_rld.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/alt_synch_pipe_rld.tdf ;
-; db/dffpipe_qe9.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dffpipe_qe9.tdf ;
-; db/dffpipe_9d9.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dffpipe_9d9.tdf ;
-; db/dffpipe_oe9.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dffpipe_oe9.tdf ;
-; db/alt_synch_pipe_sld.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/alt_synch_pipe_sld.tdf ;
-; db/dffpipe_re9.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/dffpipe_re9.tdf ;
-; lpm_mux.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_mux.tdf ;
-; db/mux_bbe.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mux_bbe.tdf ;
-; lpm_ff.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_ff.tdf ;
-; altddio_bidir.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/altddio_bidir.tdf ;
-; db/ddio_bidir_3jl.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/ddio_bidir_3jl.tdf ;
-; db/mux_58e.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mux_58e.tdf ;
-; lpm_latch.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_latch.tdf ;
-; altsyncram.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/altsyncram.tdf ;
-; db/altsyncram_lf92.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altsyncram_lf92.tdf ;
-; mux41.bdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/others/maxplus2/mux41.bdf ;
-; db/mux_dcf.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mux_dcf.tdf ;
-; scfifo.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/scfifo.tdf ;
-; db/scfifo_lk21.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/scfifo_lk21.tdf ;
-; db/a_dpfifo_oq21.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/a_dpfifo_oq21.tdf ;
-; db/altsyncram_gj81.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altsyncram_gj81.tdf ;
-; db/cmpr_br8.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cmpr_br8.tdf ;
-; db/cntr_omb.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cntr_omb.tdf ;
-; db/cntr_5n7.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cntr_5n7.tdf ;
-; db/cntr_pmb.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cntr_pmb.tdf ;
-; db/altsyncram_rb92.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altsyncram_rb92.tdf ;
-; db/altsyncram_pf92.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altsyncram_pf92.tdf ;
-; db/mux_96e.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mux_96e.tdf ;
-; db/mux_mpe.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mux_mpe.tdf ;
-; db/mux_f6e.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mux_f6e.tdf ;
-; lpm_constant.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_constant.tdf ;
-; altddio_out.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/altddio_out.tdf ;
-; db/ddio_out_o2f.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/ddio_out_o2f.tdf ;
-; db/mux_kpe.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mux_kpe.tdf ;
-; db/mux_npe.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mux_npe.tdf ;
-; db/mux_gpe.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mux_gpe.tdf ;
-; db/ddio_out_are.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/ddio_out_are.tdf ;
-; db/altpll_isv2.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altpll_isv2.tdf ;
-; altpll4.tdf ; yes ; Auto-Found Wizard-Generated File ; C:/FireBee/FPGA/altpll4.tdf ;
-; altpll.inc ; yes ; Auto-Found AHDL File ; c:/altera/91sp2/quartus/libraries/megafunctions/altpll.inc ;
-; db/altpll_c6j2.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altpll_c6j2.tdf ;
-; altpll_reconfig1.tdf ; yes ; Auto-Found Wizard-Generated File ; C:/FireBee/FPGA/altpll_reconfig1.tdf ;
-; altpll_reconfig1_pllrcfg_t4q.tdf ; yes ; Auto-Found AHDL File ; C:/FireBee/FPGA/altpll_reconfig1_pllrcfg_t4q.tdf ;
-; altsyncram.inc ; yes ; Auto-Found AHDL File ; c:/altera/91sp2/quartus/libraries/megafunctions/altsyncram.inc ;
-; db/altsyncram_46r.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/altsyncram_46r.tdf ;
-; lpm_add_sub.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_add_sub.tdf ;
-; db/add_sub_hpa.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/add_sub_hpa.tdf ;
-; db/add_sub_k8a.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/add_sub_k8a.tdf ;
-; lpm_compare.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_compare.tdf ;
-; db/cmpr_tnd.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cmpr_tnd.tdf ;
-; lpm_counter.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_counter.tdf ;
-; db/cntr_30l.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cntr_30l.tdf ;
-; db/cntr_qij.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cntr_qij.tdf ;
-; db/cntr_pij.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cntr_pij.tdf ;
-; db/cntr_9cj.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cntr_9cj.tdf ;
-; lpm_decode.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_decode.tdf ;
-; db/decode_2af.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/decode_2af.tdf ;
-; db/cntr_mph.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/cntr_mph.tdf ;
-; db/ddio_out_31f.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/ddio_out_31f.tdf ;
-; lpm_mult.tdf ; yes ; Megafunction ; c:/altera/91sp2/quartus/libraries/megafunctions/lpm_mult.tdf ;
-; db/mult_cat.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mult_cat.tdf ;
-; db/mult_aat.tdf ; yes ; Auto-Generated Megafunction ; C:/FireBee/FPGA/db/mult_aat.tdf ;
-+----------------------------------------------------------------+-----------------+------------------------------------+--------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------+
-; Analysis & Synthesis Resource Usage Summary ;
-+---------------------------------------------+----------------+
-; Resource ; Usage ;
-+---------------------------------------------+----------------+
-; Estimated Total logic elements ; 10,706 ;
-; ; ;
-; Total combinational functions ; 8060 ;
-; Logic element usage by number of LUT inputs ; ;
-; -- 4 input functions ; 4947 ;
-; -- 3 input functions ; 1867 ;
-; -- <=2 input functions ; 1246 ;
-; ; ;
-; Logic elements by mode ; ;
-; -- normal mode ; 7261 ;
-; -- arithmetic mode ; 799 ;
-; ; ;
-; Total registers ; 4740 ;
-; -- Dedicated logic registers ; 4612 ;
-; -- I/O registers ; 256 ;
-; ; ;
-; I/O pins ; 295 ;
-; Total memory bits ; 109344 ;
-; Embedded Multiplier 9-bit elements ; 6 ;
-; Total PLLs ; 4 ;
-; Maximum fan-out node ; MAIN_CLK~input ;
-; Maximum fan-out ; 2327 ;
-; Total fan-out ; 49317 ;
-; Average fan-out ; 3.57 ;
-+---------------------------------------------+----------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Analysis & Synthesis Resource Utilization by Entity ;
-+-----------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
-; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ; Library Name ;
-+-----------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
-; |firebee1 ; 8060 (10) ; 4612 (0) ; 109344 ; 6 ; 0 ; 3 ; 295 ; 0 ; |firebee1 ; work ;
-; |DSP:Mathias_Alles| ; 10 (10) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|DSP:Mathias_Alles ; ;
-; |FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden| ; 3814 (634) ; 1633 (114) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden ; ;
-; |WF1772IP_TOP_SOC:I_FDC| ; 944 (24) ; 406 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC ; ;
-; |WF1772IP_AM_DETECTOR:I_AM_DETECTOR| ; 39 (39) ; 27 (27) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR ; ;
-; |WF1772IP_CONTROL:I_CONTROL| ; 533 (533) ; 197 (197) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL ; ;
-; |WF1772IP_CRC_LOGIC:I_CRC_LOGIC| ; 40 (40) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC ; ;
-; |WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL| ; 104 (104) ; 38 (38) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL ; ;
-; |WF1772IP_REGISTERS:I_REGISTERS| ; 86 (86) ; 48 (48) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS ; ;
-; |WF1772IP_TRANSCEIVER:I_TRANSCEIVER| ; 118 (118) ; 80 (80) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER ; ;
-; |WF2149IP_TOP_SOC:I_SOUND| ; 445 (32) ; 210 (29) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND ; ;
-; |WF2149IP_WAVE:I_PSG_WAVE| ; 413 (413) ; 181 (181) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE ; ;
-; |WF5380_TOP_SOC:I_SCSI| ; 0 (0) ; 1 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI ; ;
-; |WF5380_CONTROL:I_CONTROL| ; 0 (0) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL ; ;
-; |WF6850IP_TOP_SOC:I_ACIA_KEYBOARD| ; 199 (2) ; 97 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD ; ;
-; |WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS| ; 16 (16) ; 11 (11) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS ; ;
-; |WF6850IP_RECEIVE:I_UART_RECEIVE| ; 94 (94) ; 47 (47) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE ; ;
-; |WF6850IP_TRANSMIT:I_UART_TRANSMIT| ; 87 (87) ; 39 (39) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT ; ;
-; |WF6850IP_TOP_SOC:I_ACIA_MIDI| ; 203 (2) ; 97 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI ; ;
-; |WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS| ; 20 (20) ; 11 (11) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS ; ;
-; |WF6850IP_RECEIVE:I_UART_RECEIVE| ; 94 (94) ; 47 (47) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE ; ;
-; |WF6850IP_TRANSMIT:I_UART_TRANSMIT| ; 87 (87) ; 39 (39) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT ; ;
-; |WF68901IP_TOP_SOC:I_MFP| ; 1199 (178) ; 460 (2) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP ; ;
-; |WF68901IP_GPIO:I_GPIO| ; 25 (25) ; 24 (24) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO ; ;
-; |WF68901IP_INTERRUPTS:I_INTERRUPTS| ; 273 (273) ; 128 (128) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS ; ;
-; |WF68901IP_TIMERS:I_TIMERS| ; 434 (434) ; 166 (166) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS ; ;
-; |WF68901IP_USART_TOP:I_USART| ; 289 (4) ; 140 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART ; ;
-; |WF68901IP_USART_CTRL:I_USART_CTRL| ; 38 (38) ; 49 (49) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL ; ;
-; |WF68901IP_USART_RX:I_USART_RECEIVE| ; 159 (159) ; 56 (56) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE ; ;
-; |WF68901IP_USART_TX:I_USART_TRANSMIT| ; 88 (88) ; 35 (35) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT ; ;
-; |dcfifo0:RDF| ; 94 (0) ; 124 (0) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF ; ;
-; |dcfifo_mixed_widths:dcfifo_mixed_widths_component| ; 94 (0) ; 124 (0) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component ; ;
-; |dcfifo_0hh1:auto_generated| ; 94 (17) ; 124 (42) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated ; ;
-; |a_gray2bin_lfb:wrptr_g_gray2bin| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_gray2bin_lfb:wrptr_g_gray2bin ; ;
-; |a_gray2bin_lfb:ws_dgrp_gray2bin| ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_gray2bin_lfb:ws_dgrp_gray2bin ; ;
-; |a_graycounter_fic:wrptr_g1p| ; 16 (16) ; 13 (13) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p ; ;
-; |a_graycounter_k47:rdptr_g1p| ; 17 (17) ; 13 (13) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p ; ;
-; |alt_synch_pipe_ikd:rs_dgwp| ; 0 (0) ; 18 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_ikd:rs_dgwp ; ;
-; |dffpipe_hd9:dffpipe12| ; 0 (0) ; 18 (18) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_ikd:rs_dgwp|dffpipe_hd9:dffpipe12 ; ;
-; |alt_synch_pipe_jkd:ws_dgrp| ; 0 (0) ; 18 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp ; ;
-; |dffpipe_id9:dffpipe17| ; 0 (0) ; 18 (18) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17 ; ;
-; |altsyncram_bi31:fifo_ram| ; 0 (0) ; 0 (0) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram ; ;
-; |cmpr_156:rdempty_eq_comp1_msb| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cmpr_156:rdempty_eq_comp1_msb ; ;
-; |cmpr_156:wrfull_eq_comp1_msb| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cmpr_156:wrfull_eq_comp1_msb ; ;
-; |cntr_t2e:cntr_b| ; 3 (3) ; 2 (2) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cntr_t2e:cntr_b ; ;
-; |dffpipe_gd9:ws_brp| ; 0 (0) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_gd9:ws_brp ; ;
-; |dffpipe_pe9:ws_bwp| ; 0 (0) ; 10 (10) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_pe9:ws_bwp ; ;
-; |mux_a18:rdemp_eq_comp_lsb_mux| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|mux_a18:rdemp_eq_comp_lsb_mux ; ;
-; |mux_a18:rdemp_eq_comp_msb_mux| ; 5 (5) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|mux_a18:rdemp_eq_comp_msb_mux ; ;
-; |mux_a18:wrfull_eq_comp_lsb_mux| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|mux_a18:wrfull_eq_comp_lsb_mux ; ;
-; |mux_a18:wrfull_eq_comp_msb_mux| ; 5 (5) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|mux_a18:wrfull_eq_comp_msb_mux ; ;
-; |dcfifo1:WRF| ; 96 (0) ; 124 (0) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF ; ;
-; |dcfifo_mixed_widths:dcfifo_mixed_widths_component| ; 96 (0) ; 124 (0) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component ; ;
-; |dcfifo_3fh1:auto_generated| ; 96 (18) ; 124 (42) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated ; ;
-; |a_gray2bin_lfb:rdptr_g_gray2bin| ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_gray2bin_lfb:rdptr_g_gray2bin ; ;
-; |a_gray2bin_lfb:rs_dgwp_gray2bin| ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_gray2bin_lfb:rs_dgwp_gray2bin ; ;
-; |a_graycounter_gic:wrptr_g1p| ; 16 (16) ; 13 (13) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_gic:wrptr_g1p ; ;
-; |a_graycounter_j47:rdptr_g1p| ; 16 (16) ; 13 (13) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p ; ;
-; |alt_synch_pipe_kkd:rs_dgwp| ; 0 (0) ; 18 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp ; ;
-; |dffpipe_jd9:dffpipe12| ; 0 (0) ; 18 (18) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12 ; ;
-; |alt_synch_pipe_lkd:ws_dgrp| ; 0 (0) ; 18 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_lkd:ws_dgrp ; ;
-; |dffpipe_kd9:dffpipe15| ; 0 (0) ; 18 (18) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_lkd:ws_dgrp|dffpipe_kd9:dffpipe15 ; ;
-; |altsyncram_ci31:fifo_ram| ; 0 (0) ; 0 (0) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram ; ;
-; |cmpr_156:rdempty_eq_comp1_msb| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|cmpr_156:rdempty_eq_comp1_msb ; ;
-; |cntr_t2e:cntr_b| ; 4 (4) ; 2 (2) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|cntr_t2e:cntr_b ; ;
-; |dffpipe_gd9:rs_bwp| ; 0 (0) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_gd9:rs_bwp ; ;
-; |dffpipe_pe9:rs_brp| ; 0 (0) ; 10 (10) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_pe9:rs_brp ; ;
-; |mux_a18:rdemp_eq_comp_lsb_mux| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|mux_a18:rdemp_eq_comp_lsb_mux ; ;
-; |mux_a18:rdemp_eq_comp_msb_mux| ; 5 (5) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|mux_a18:rdemp_eq_comp_msb_mux ; ;
-; |mux_a18:wrfull_eq_comp_lsb_mux| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|mux_a18:wrfull_eq_comp_lsb_mux ; ;
-; |mux_a18:wrfull_eq_comp_msb_mux| ; 6 (6) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|mux_a18:wrfull_eq_comp_msb_mux ; ;
-; |Video:Fredi_Aschwanden| ; 3109 (10) ; 2172 (4) ; 92816 ; 6 ; 0 ; 3 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden ; ;
-; |DDR_CTR:DDR_CTR| ; 348 (314) ; 158 (158) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR ; ;
-; |lpm_bustri_BYT:$00002| ; 3 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00002 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 3 (3) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_bustri_BYT:$00004| ; 31 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00004 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 31 (31) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component ; ;
-; |VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR| ; 1260 (1013) ; 529 (529) ; 0 ; 6 ; 0 ; 3 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR ; ;
-; |lpm_bustri_WORD:$00000| ; 187 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 187 (187) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_bustri_WORD:$00002| ; 60 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00002 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 60 (60) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00002|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_mult:op_12| ; 0 (0) ; 0 (0) ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_12 ; ;
-; |mult_aat:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_12|mult_aat:auto_generated ; ;
-; |lpm_mult:op_14| ; 0 (0) ; 0 (0) ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14 ; ;
-; |mult_cat:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14|mult_cat:auto_generated ; ;
-; |lpm_mult:op_6| ; 0 (0) ; 0 (0) ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6 ; ;
-; |mult_aat:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6|mult_aat:auto_generated ; ;
-; |altddio_bidir0:inst1| ; 0 (0) ; 96 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altddio_bidir0:inst1 ; ;
-; |altddio_bidir:altddio_bidir_component| ; 0 (0) ; 96 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component ; ;
-; |ddio_bidir_3jl:auto_generated| ; 0 (0) ; 96 (96) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated ; ;
-; |altddio_out0:inst2| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altddio_out0:inst2 ; ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component ; ;
-; |ddio_out_are:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated ; ;
-; |altddio_out2:inst5| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altddio_out2:inst5 ; ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component ; ;
-; |ddio_out_o2f:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component|ddio_out_o2f:auto_generated ; ;
-; |altdpram0:ST_CLUT_BLUE| ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component ; ;
-; |altsyncram_rb92:auto_generated| ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated ; ;
-; |altdpram0:ST_CLUT_GREEN| ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component ; ;
-; |altsyncram_rb92:auto_generated| ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated ; ;
-; |altdpram0:ST_CLUT_RED| ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component ; ;
-; |altsyncram_rb92:auto_generated| ; 0 (0) ; 0 (0) ; 48 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated ; ;
-; |altdpram1:FALCON_CLUT_BLUE| ; 0 (0) ; 0 (0) ; 1536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 1536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component ; ;
-; |altsyncram_lf92:auto_generated| ; 0 (0) ; 0 (0) ; 1536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated ; ;
-; |altdpram1:FALCON_CLUT_GREEN| ; 0 (0) ; 0 (0) ; 1536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 1536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component ; ;
-; |altsyncram_lf92:auto_generated| ; 0 (0) ; 0 (0) ; 1536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated ; ;
-; |altdpram1:FALCON_CLUT_RED| ; 0 (0) ; 0 (0) ; 1536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 1536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component ; ;
-; |altsyncram_lf92:auto_generated| ; 0 (0) ; 0 (0) ; 1536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated ; ;
-; |altdpram2:ACP_CLUT_RAM54| ; 0 (0) ; 0 (0) ; 2048 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54 ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 2048 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component ; ;
-; |altsyncram_pf92:auto_generated| ; 0 (0) ; 0 (0) ; 2048 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated ; ;
-; |altdpram2:ACP_CLUT_RAM55| ; 0 (0) ; 0 (0) ; 2048 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55 ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 2048 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component ; ;
-; |altsyncram_pf92:auto_generated| ; 0 (0) ; 0 (0) ; 2048 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated ; ;
-; |altdpram2:ACP_CLUT_RAM| ; 0 (0) ; 0 (0) ; 2048 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM ; ;
-; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 2048 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component ; ;
-; |altsyncram_pf92:auto_generated| ; 0 (0) ; 0 (0) ; 2048 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated ; ;
-; |lpm_bustri_LONG:inst119| ; 5 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_bustri_LONG:inst119 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 5 (5) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_bustri_LONG:inst119|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_ff0:inst13| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst13 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst14| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst14 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst15| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst15 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst16| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst16 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst17| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst17 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst18| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst18 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst18|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff0:inst19| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst19 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff0:inst19|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff1:inst12| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst12 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff1:inst20| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst20 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff1:inst3| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst3 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff1:inst4| ; 0 (0) ; 32 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst4 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff1:inst9| ; 0 (0) ; 24 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst9 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 24 (24) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff3:inst46| ; 0 (0) ; 18 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst46 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 18 (18) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff3:inst47| ; 0 (0) ; 18 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst47 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 18 (18) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff3:inst49| ; 0 (0) ; 9 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst49 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 9 (9) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff3:inst52| ; 0 (0) ; 9 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst52 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 9 (9) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff4:inst10| ; 0 (0) ; 16 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff4:inst10 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff5:inst11| ; 0 (0) ; 8 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff5:inst11 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff5:inst11|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff5:inst97| ; 0 (0) ; 5 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff5:inst97 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff6:inst71| ; 0 (0) ; 128 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff6:inst71 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 128 (128) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component ; ;
-; |lpm_ff6:inst94| ; 0 (0) ; 128 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff6:inst94 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 128 (128) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component ; ;
-; |lpm_fifoDZ:inst63| ; 22 (0) ; 21 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63 ; ;
-; |scfifo:scfifo_component| ; 22 (0) ; 21 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component ; ;
-; |scfifo_lk21:auto_generated| ; 22 (0) ; 21 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated ; ;
-; |a_dpfifo_oq21:dpfifo| ; 22 (9) ; 21 (8) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo ; ;
-; |altsyncram_gj81:FIFOram| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram ; ;
-; |cntr_omb:rd_ptr_msb| ; 6 (6) ; 6 (6) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb ; ;
-; |cntr_pmb:wr_ptr| ; 7 (7) ; 7 (7) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr ; ;
-; |lpm_fifo_dc0:inst| ; 66 (0) ; 98 (0) ; 65536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst ; ;
-; |dcfifo:dcfifo_component| ; 66 (0) ; 98 (0) ; 65536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component ; ;
-; |dcfifo_8fi1:auto_generated| ; 66 (12) ; 98 (20) ; 65536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated ; ;
-; |a_gray2bin_tgb:wrptr_g_gray2bin| ; 9 (9) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_gray2bin_tgb:wrptr_g_gray2bin ; ;
-; |a_gray2bin_tgb:ws_dgrp_gray2bin| ; 9 (9) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_gray2bin_tgb:ws_dgrp_gray2bin ; ;
-; |a_graycounter_njc:wrptr_gp| ; 17 (17) ; 14 (14) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp ; ;
-; |a_graycounter_s57:rdptr_g1p| ; 19 (19) ; 14 (14) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p ; ;
-; |alt_synch_pipe_sld:ws_dgrp| ; 0 (0) ; 30 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp ; ;
-; |dffpipe_re9:dffpipe22| ; 0 (0) ; 30 (30) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22 ; ;
-; |altsyncram_tl31:fifo_ram| ; 0 (0) ; 0 (0) ; 65536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram ; ;
-; |dffpipe_9d9:wraclr| ; 0 (0) ; 2 (2) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_9d9:wraclr ; ;
-; |dffpipe_oe9:ws_brp| ; 0 (0) ; 9 (9) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp ; ;
-; |dffpipe_oe9:ws_bwp| ; 0 (0) ; 9 (9) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp ; ;
-; |lpm_latch0:inst27| ; 32 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_latch0:inst27 ; ;
-; |lpm_latch:lpm_latch_component| ; 32 (32) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component ; ;
-; |lpm_mux0:inst21| ; 48 (0) ; 96 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux0:inst21 ; ;
-; |lpm_mux:lpm_mux_component| ; 48 (0) ; 96 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component ; ;
-; |mux_gpe:auto_generated| ; 48 (48) ; 96 (96) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated ; ;
-; |lpm_mux1:inst24| ; 80 (0) ; 81 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux1:inst24 ; ;
-; |lpm_mux:lpm_mux_component| ; 80 (0) ; 81 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component ; ;
-; |mux_npe:auto_generated| ; 80 (80) ; 81 (81) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated ; ;
-; |lpm_mux2:inst25| ; 80 (0) ; 41 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux2:inst25 ; ;
-; |lpm_mux:lpm_mux_component| ; 80 (0) ; 41 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component ; ;
-; |mux_mpe:auto_generated| ; 80 (80) ; 41 (41) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated ; ;
-; |lpm_mux3:inst102| ; 1 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux3:inst102 ; ;
-; |lpm_mux:lpm_mux_component| ; 1 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux3:inst102|lpm_mux:lpm_mux_component ; ;
-; |mux_96e:auto_generated| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux3:inst102|lpm_mux:lpm_mux_component|mux_96e:auto_generated ; ;
-; |lpm_mux4:inst81| ; 7 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux4:inst81 ; ;
-; |lpm_mux:lpm_mux_component| ; 7 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux4:inst81|lpm_mux:lpm_mux_component ; ;
-; |mux_f6e:auto_generated| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux4:inst81|lpm_mux:lpm_mux_component|mux_f6e:auto_generated ; ;
-; |lpm_mux5:inst22| ; 64 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux5:inst22 ; ;
-; |lpm_mux:lpm_mux_component| ; 64 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux5:inst22|lpm_mux:lpm_mux_component ; ;
-; |mux_58e:auto_generated| ; 64 (64) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux5:inst22|lpm_mux:lpm_mux_component|mux_58e:auto_generated ; ;
-; |lpm_mux6:inst7| ; 90 (0) ; 67 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux6:inst7 ; ;
-; |lpm_mux:lpm_mux_component| ; 90 (0) ; 67 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component ; ;
-; |mux_kpe:auto_generated| ; 90 (90) ; 67 (67) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated ; ;
-; |lpm_muxDZ:inst62| ; 128 (0) ; 128 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_muxDZ:inst62 ; ;
-; |lpm_mux:lpm_mux_component| ; 128 (0) ; 128 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component ; ;
-; |mux_dcf:auto_generated| ; 128 (128) ; 128 (128) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated ; ;
-; |lpm_muxVDM:inst100| ; 736 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_muxVDM:inst100 ; ;
-; |lpm_mux:lpm_mux_component| ; 736 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_muxVDM:inst100|lpm_mux:lpm_mux_component ; ;
-; |mux_bbe:auto_generated| ; 736 (736) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_muxVDM:inst100|lpm_mux:lpm_mux_component|mux_bbe:auto_generated ; ;
-; |lpm_shiftreg0:sr0| ; 15 (0) ; 16 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr0 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 15 (15) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr1| ; 15 (0) ; 16 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr1 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 15 (15) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr2| ; 15 (0) ; 16 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr2 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 15 (15) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr3| ; 15 (0) ; 16 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr3 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 15 (15) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr4| ; 15 (0) ; 16 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr4 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 15 (15) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr5| ; 15 (0) ; 16 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr5 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 15 (15) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr6| ; 16 (0) ; 16 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr6 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 16 (16) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg0:sr7| ; 16 (0) ; 16 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr7 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 16 (16) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg4:inst26| ; 0 (0) ; 5 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg4:inst26 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 0 (0) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |lpm_shiftreg6:inst92| ; 0 (0) ; 5 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg6:inst92 ; ;
-; |lpm_shiftreg:lpm_shiftreg_component| ; 0 (0) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component ; ;
-; |mux41:inst40| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|mux41:inst40 ; ;
-; |mux41:inst41| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|mux41:inst41 ; ;
-; |mux41:inst42| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|mux41:inst42 ; ;
-; |mux41:inst43| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|mux41:inst43 ; ;
-; |mux41:inst44| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|mux41:inst44 ; ;
-; |mux41:inst45| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|Video:Fredi_Aschwanden|mux41:inst45 ; ;
-; |altddio_out3:inst5| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst5 ; ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst5|altddio_out:altddio_out_component ; ;
-; |ddio_out_31f:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ; ;
-; |altddio_out3:inst6| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst6 ; ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst6|altddio_out:altddio_out_component ; ;
-; |ddio_out_31f:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst6|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ; ;
-; |altddio_out3:inst8| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst8 ; ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst8|altddio_out:altddio_out_component ; ;
-; |ddio_out_31f:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst8|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ; ;
-; |altddio_out3:inst9| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst9 ; work ;
-; |altddio_out:altddio_out_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst9|altddio_out:altddio_out_component ; work ;
-; |ddio_out_31f:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altddio_out3:inst9|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ; work ;
-; |altpll1:inst| ; 1 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll1:inst ; ;
-; |altpll:altpll_component| ; 1 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll1:inst|altpll:altpll_component ; ;
-; |altpll_pul2:auto_generated| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated ; ;
-; |altpll2:inst12| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll2:inst12 ; ;
-; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll2:inst12|altpll:altpll_component ; ;
-; |altpll_isv2:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated ; ;
-; |altpll3:inst13| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll3:inst13 ; ;
-; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll3:inst13|altpll:altpll_component ; ;
-; |altpll_41p2:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated ; ;
-; |altpll4:inst22| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll4:inst22 ; ;
-; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll4:inst22|altpll:altpll_component ; ;
-; |altpll_c6j2:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated ; ;
-; |altpll_reconfig1:inst7| ; 309 (0) ; 128 (0) ; 144 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7 ; ;
-; |altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component| ; 309 (211) ; 128 (80) ; 144 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component ; ;
-; |altsyncram:altsyncram4| ; 0 (0) ; 0 (0) ; 144 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4 ; ;
-; |altsyncram_46r:auto_generated| ; 0 (0) ; 0 (0) ; 144 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4|altsyncram_46r:auto_generated ; ;
-; |lpm_compare:cmpr7| ; 3 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7 ; ;
-; |cmpr_tnd:auto_generated| ; 3 (3) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated ; ;
-; |lpm_counter:cntr12| ; 10 (0) ; 8 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12 ; ;
-; |cntr_30l:auto_generated| ; 10 (10) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated ; ;
-; |lpm_counter:cntr13| ; 7 (0) ; 6 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13 ; ;
-; |cntr_qij:auto_generated| ; 7 (7) ; 6 (6) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13|cntr_qij:auto_generated ; ;
-; |lpm_counter:cntr14| ; 5 (0) ; 5 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14 ; ;
-; |cntr_pij:auto_generated| ; 5 (5) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14|cntr_pij:auto_generated ; ;
-; |lpm_counter:cntr15| ; 18 (0) ; 8 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15 ; ;
-; |cntr_30l:auto_generated| ; 18 (18) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated ; ;
-; |lpm_counter:cntr1| ; 41 (0) ; 8 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1 ; ;
-; |cntr_30l:auto_generated| ; 41 (41) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated ; ;
-; |lpm_counter:cntr2| ; 9 (0) ; 8 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2 ; ;
-; |cntr_9cj:auto_generated| ; 9 (9) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated ; ;
-; |lpm_counter:cntr3| ; 5 (0) ; 5 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3 ; ;
-; |cntr_pij:auto_generated| ; 5 (5) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3|cntr_pij:auto_generated ; ;
-; |interrupt_handler:nobody| ; 789 (711) ; 633 (633) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|interrupt_handler:nobody ; ;
-; |lpm_bustri_BYT:$00000| ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00000 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00000|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_bustri_BYT:$00002| ; 24 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00002 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 24 (24) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_bustri_BYT:$00004| ; 16 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00004 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_bustri_BYT:$00006| ; 22 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00006 ; ;
-; |lpm_bustri:lpm_bustri_component| ; 22 (22) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|interrupt_handler:nobody|lpm_bustri_BYT:$00006|lpm_bustri:lpm_bustri_component ; ;
-; |lpm_counter0:inst18| ; 18 (0) ; 18 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|lpm_counter0:inst18 ; ;
-; |lpm_counter:lpm_counter_component| ; 18 (0) ; 18 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|lpm_counter0:inst18|lpm_counter:lpm_counter_component ; ;
-; |cntr_mph:auto_generated| ; 18 (18) ; 18 (18) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated ; ;
-; |lpm_ff0:inst1| ; 0 (0) ; 28 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|lpm_ff0:inst1 ; ;
-; |lpm_ff:lpm_ff_component| ; 0 (0) ; 28 (28) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |firebee1|lpm_ff0:inst1|lpm_ff:lpm_ff_component ; ;
-+-----------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
-Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Analysis & Synthesis RAM Summary ;
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+------+
-; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+------+
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 1024 ; 8 ; 256 ; 32 ; 8192 ; None ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 256 ; 32 ; 1024 ; 8 ; 8192 ; None ;
-; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 16 ; 3 ; 16 ; 3 ; 48 ; None ;
-; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 16 ; 3 ; 16 ; 3 ; 48 ; None ;
-; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 16 ; 3 ; 16 ; 3 ; 48 ; None ;
-; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 256 ; 6 ; 256 ; 6 ; 1536 ; None ;
-; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 256 ; 6 ; 256 ; 6 ; 1536 ; None ;
-; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 256 ; 6 ; 256 ; 6 ; 1536 ; None ;
-; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 256 ; 8 ; 256 ; 8 ; 2048 ; None ;
-; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 256 ; 8 ; 256 ; 8 ; 2048 ; None ;
-; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 256 ; 8 ; 256 ; 8 ; 2048 ; None ;
-; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 128 ; 128 ; 128 ; 128 ; 16384 ; None ;
-; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 512 ; 128 ; 512 ; 128 ; 65536 ; None ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4|altsyncram_46r:auto_generated|ALTSYNCRAM ; AUTO ; Single Port ; 144 ; 1 ; -- ; -- ; 144 ; None ;
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+------+
-
-
-+-----------------------------------------------------+
-; Analysis & Synthesis DSP Block Usage Summary ;
-+---------------------------------------+-------------+
-; Statistic ; Number Used ;
-+---------------------------------------+-------------+
-; Simple Multipliers (9-bit) ; 0 ;
-; Simple Multipliers (18-bit) ; 3 ;
-; Embedded Multiplier Blocks ; -- ;
-; Embedded Multiplier 9-bit elements ; 6 ;
-; Signed Embedded Multipliers ; 0 ;
-; Unsigned Embedded Multipliers ; 3 ;
-; Mixed Sign Embedded Multipliers ; 0 ;
-; Variable Sign Embedded Multipliers ; 0 ;
-; Dedicated Input Shift Register Chains ; 0 ;
-+---------------------------------------+-------------+
-Note: number of Embedded Multiplier Blocks used is only available after a successful fit.
-
-
-Encoding Type: One-Hot
-+----------------------------------------------------------------------------+
-; State Machine - |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FB_REGDDR ;
-+---------+-------+-------+-------+-------+----------------------------------+
-; Name ; FR_S3 ; FR_S2 ; FR_S1 ; FR_S0 ; FR_WAIT ;
-+---------+-------+-------+-------+-------+----------------------------------+
-; FR_WAIT ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; FR_S0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; FR_S1 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; FR_S2 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; FR_S3 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-+---------+-------+-------+-------+-------+----------------------------------+
-
-
-Encoding Type: One-Hot
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_SM ;
-+---------+-------+-------+-------+-------+-------+--------+--------+---------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+--------+--------+-------+
-; Name ; DS_R6 ; DS_R5 ; DS_R4 ; DS_R3 ; DS_R2 ; DS_CB8 ; DS_CB6 ; DS_T10F ; DS_T9F ; DS_T8F ; DS_T7F ; DS_T6F ; DS_T5F ; DS_T4F ; DS_T9W ; DS_T8W ; DS_T7W ; DS_T6W ; DS_T5W ; DS_T4W ; DS_T5R ; DS_T4R ; DS_C7 ; DS_C6 ; DS_C5 ; DS_C4 ; DS_C3 ; DS_C2 ; DS_N8 ; DS_N7 ; DS_N6 ; DS_N5 ; DS_T3 ; DS_T2B ; DS_T2A ; DS_T1 ;
-+---------+-------+-------+-------+-------+-------+--------+--------+---------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+--------+--------+-------+
-; DS_T1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; DS_T2A ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; DS_T2B ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; DS_T3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; DS_N5 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-; DS_N6 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_N7 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_N8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_C2 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_C3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_C4 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_C5 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_C6 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_C7 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T4R ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T5R ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T4W ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T5W ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T6W ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T7W ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T8W ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T9W ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T4F ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T5F ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T6F ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T7F ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T8F ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T9F ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_T10F ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_CB6 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_CB8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_R2 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_R3 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_R4 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_R5 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; DS_R6 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-+---------+-------+-------+-------+-------+-------+--------+--------+---------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+--------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+-------+--------+--------+-------+
-
-
-Encoding Type: One-Hot
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_STATE ;
-+--------------------+------------------+------------------+------------------+------------------+------------------+------------------+--------------------+
-; Name ; FCF_STATE.FCF_T7 ; FCF_STATE.FCF_T6 ; FCF_STATE.FCF_T3 ; FCF_STATE.FCF_T2 ; FCF_STATE.FCF_T1 ; FCF_STATE.FCF_T0 ; FCF_STATE.FCF_IDLE ;
-+--------------------+------------------+------------------+------------------+------------------+------------------+------------------+--------------------+
-; FCF_STATE.FCF_IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; FCF_STATE.FCF_T0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; FCF_STATE.FCF_T1 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; FCF_STATE.FCF_T2 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; FCF_STATE.FCF_T3 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-; FCF_STATE.FCF_T6 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; FCF_STATE.FCF_T7 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-+--------------------+------------------+------------------+------------------+------------------+------------------+------------------+--------------------+
-
-
-Encoding Type: One-Hot
-+---------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|CMD_STATE ;
-+----------------+--------------+--------------+--------------+-------------------------------------+
-; Name ; CMD_STATE.T7 ; CMD_STATE.T6 ; CMD_STATE.T1 ; CMD_STATE.IDLE ;
-+----------------+--------------+--------------+--------------+-------------------------------------+
-; CMD_STATE.IDLE ; 0 ; 0 ; 0 ; 0 ;
-; CMD_STATE.T1 ; 0 ; 0 ; 1 ; 1 ;
-; CMD_STATE.T6 ; 0 ; 1 ; 0 ; 1 ;
-; CMD_STATE.T7 ; 1 ; 0 ; 0 ; 1 ;
-+----------------+--------------+--------------+--------------+-------------------------------------+
-
-
-Encoding Type: One-Hot
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_STATE ;
-+----------------------+----------------------+-------------------+-------------------------------------------------------------------------------------------+
-; Name ; INT_STATE.VECTOR_OUT ; INT_STATE.REQUEST ; INT_STATE.SCAN ;
-+----------------------+----------------------+-------------------+-------------------------------------------------------------------------------------------+
-; INT_STATE.SCAN ; 0 ; 0 ; 0 ;
-; INT_STATE.REQUEST ; 0 ; 1 ; 1 ;
-; INT_STATE.VECTOR_OUT ; 1 ; 0 ; 1 ;
-+----------------------+----------------------+-------------------+-------------------------------------------------------------------------------------------+
-
-
-Encoding Type: One-Hot
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|TR_STATE ;
-+----------------------+----------------+----------------+-----------------+-------------------+----------------+--------------------+----------------------+------------------------------+
-; Name ; TR_STATE.STOP2 ; TR_STATE.STOP1 ; TR_STATE.PARITY ; TR_STATE.SHIFTOUT ; TR_STATE.START ; TR_STATE.LOAD_SHFT ; TR_STATE.CHECK_BREAK ; TR_STATE.IDLE ;
-+----------------------+----------------+----------------+-----------------+-------------------+----------------+--------------------+----------------------+------------------------------+
-; TR_STATE.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; TR_STATE.CHECK_BREAK ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; TR_STATE.LOAD_SHFT ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; TR_STATE.START ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; TR_STATE.SHIFTOUT ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-; TR_STATE.PARITY ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; TR_STATE.STOP1 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; TR_STATE.STOP2 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-+----------------------+----------------+----------------+-----------------+-------------------+----------------+--------------------+----------------------+------------------------------+
-
-
-Encoding Type: One-Hot
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|RCV_STATE ;
-+----------------------+----------------+-----------------+-----------------+------------------+------------------+----------------------+-------------------------------------------------+
-; Name ; RCV_STATE.SYNC ; RCV_STATE.STOP2 ; RCV_STATE.STOP1 ; RCV_STATE.PARITY ; RCV_STATE.SAMPLE ; RCV_STATE.WAIT_START ; RCV_STATE.IDLE ;
-+----------------------+----------------+-----------------+-----------------+------------------+------------------+----------------------+-------------------------------------------------+
-; RCV_STATE.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; RCV_STATE.WAIT_START ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; RCV_STATE.SAMPLE ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; RCV_STATE.PARITY ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; RCV_STATE.STOP1 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-; RCV_STATE.STOP2 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; RCV_STATE.SYNC ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-+----------------------+----------------+-----------------+-----------------+------------------+------------------+----------------------+-------------------------------------------------+
-
-
-Encoding Type: One-Hot
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|TR_STATE ;
-+--------------------+----------------+----------------+-----------------+-------------------+----------------+--------------------+------------------------------+
-; Name ; TR_STATE.STOP2 ; TR_STATE.STOP1 ; TR_STATE.PARITY ; TR_STATE.SHIFTOUT ; TR_STATE.START ; TR_STATE.LOAD_SHFT ; TR_STATE.IDLE ;
-+--------------------+----------------+----------------+-----------------+-------------------+----------------+--------------------+------------------------------+
-; TR_STATE.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; TR_STATE.LOAD_SHFT ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; TR_STATE.START ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; TR_STATE.SHIFTOUT ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; TR_STATE.PARITY ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-; TR_STATE.STOP1 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; TR_STATE.STOP2 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-+--------------------+----------------+----------------+-----------------+-------------------+----------------+--------------------+------------------------------+
-
-
-Encoding Type: One-Hot
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|RCV_STATE ;
-+----------------------+----------------+-----------------+-----------------+------------------+------------------+----------------------+-----------------------+
-; Name ; RCV_STATE.SYNC ; RCV_STATE.STOP2 ; RCV_STATE.STOP1 ; RCV_STATE.PARITY ; RCV_STATE.SAMPLE ; RCV_STATE.WAIT_START ; RCV_STATE.IDLE ;
-+----------------------+----------------+-----------------+-----------------+------------------+------------------+----------------------+-----------------------+
-; RCV_STATE.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; RCV_STATE.WAIT_START ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; RCV_STATE.SAMPLE ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; RCV_STATE.PARITY ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; RCV_STATE.STOP1 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-; RCV_STATE.STOP2 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; RCV_STATE.SYNC ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-+----------------------+----------------+-----------------+-----------------+------------------+------------------+----------------------+-----------------------+
-
-
-Encoding Type: One-Hot
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|TR_STATE ;
-+--------------------+----------------+----------------+-----------------+-------------------+----------------+--------------------+----------------------------------+
-; Name ; TR_STATE.STOP2 ; TR_STATE.STOP1 ; TR_STATE.PARITY ; TR_STATE.SHIFTOUT ; TR_STATE.START ; TR_STATE.LOAD_SHFT ; TR_STATE.IDLE ;
-+--------------------+----------------+----------------+-----------------+-------------------+----------------+--------------------+----------------------------------+
-; TR_STATE.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; TR_STATE.LOAD_SHFT ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; TR_STATE.START ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; TR_STATE.SHIFTOUT ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; TR_STATE.PARITY ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-; TR_STATE.STOP1 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; TR_STATE.STOP2 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-+--------------------+----------------+----------------+-----------------+-------------------+----------------+--------------------+----------------------------------+
-
-
-Encoding Type: One-Hot
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|RCV_STATE ;
-+----------------------+----------------+-----------------+-----------------+------------------+------------------+----------------------+---------------------------+
-; Name ; RCV_STATE.SYNC ; RCV_STATE.STOP2 ; RCV_STATE.STOP1 ; RCV_STATE.PARITY ; RCV_STATE.SAMPLE ; RCV_STATE.WAIT_START ; RCV_STATE.IDLE ;
-+----------------------+----------------+-----------------+-----------------+------------------+------------------+----------------------+---------------------------+
-; RCV_STATE.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; RCV_STATE.WAIT_START ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; RCV_STATE.SAMPLE ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; RCV_STATE.PARITY ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; RCV_STATE.STOP1 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-; RCV_STATE.STOP2 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; RCV_STATE.SYNC ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-+----------------------+----------------+-----------------+-----------------+------------------+------------------+----------------------+---------------------------+
-
-
-Encoding Type: One-Hot
-+--------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE ;
-+----------------------+----------------------+----------------------+----------------------+----------------------+-------------------------------+
-; Name ; DMA_STATE.DMA_STEP_4 ; DMA_STATE.DMA_STEP_3 ; DMA_STATE.DMA_STEP_2 ; DMA_STATE.DMA_STEP_1 ; DMA_STATE.IDLE ;
-+----------------------+----------------------+----------------------+----------------------+----------------------+-------------------------------+
-; DMA_STATE.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; DMA_STATE.DMA_STEP_1 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; DMA_STATE.DMA_STEP_2 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; DMA_STATE.DMA_STEP_3 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; DMA_STATE.DMA_STEP_4 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-+----------------------+----------------------+----------------------+----------------------+----------------------+-------------------------------+
-
-
-Encoding Type: One-Hot
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE ;
-+-------------------------+-------------------------+-------------------------+---------------------+------------------------+-----------------------+-----------------+
-; Name ; CTRL_STATE.DMA_INIT_RCV ; CTRL_STATE.DMA_TARG_RCV ; CTRL_STATE.DMA_SEND ; CTRL_STATE.WAIT_2200ns ; CTRL_STATE.WAIT_800ns ; CTRL_STATE.IDLE ;
-+-------------------------+-------------------------+-------------------------+---------------------+------------------------+-----------------------+-----------------+
-; CTRL_STATE.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; CTRL_STATE.WAIT_800ns ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
-; CTRL_STATE.WAIT_2200ns ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ;
-; CTRL_STATE.DMA_SEND ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ;
-; CTRL_STATE.DMA_TARG_RCV ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ;
-; CTRL_STATE.DMA_INIT_RCV ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-+-------------------------+-------------------------+-------------------------+---------------------+------------------------+-----------------------+-----------------+
-
-
-Encoding Type: One-Hot
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|PRECOMP ;
-+-----------------+--------------+---------------+----------------------------------------------------------------------------------------------------------+
-; Name ; PRECOMP.LATE ; PRECOMP.EARLY ; PRECOMP.NOMINAL ;
-+-----------------+--------------+---------------+----------------------------------------------------------------------------------------------------------+
-; PRECOMP.NOMINAL ; 0 ; 0 ; 0 ;
-; PRECOMP.EARLY ; 0 ; 1 ; 1 ;
-; PRECOMP.LATE ; 1 ; 0 ; 1 ;
-+-----------------+--------------+---------------+----------------------------------------------------------------------------------------------------------+
-
-
-Encoding Type: One-Hot
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_STATE ;
-+----------------+----------------+----------------+----------------------------------------------------------------------------------------------------------+
-; Name ; MFM_STATE.C_10 ; MFM_STATE.B_01 ; MFM_STATE.A_00 ;
-+----------------+----------------+----------------+----------------------------------------------------------------------------------------------------------+
-; MFM_STATE.A_00 ; 0 ; 0 ; 0 ;
-; MFM_STATE.B_01 ; 0 ; 1 ; 1 ;
-; MFM_STATE.C_10 ; 1 ; 0 ; 1 ;
-+----------------+----------------+----------------+----------------------------------------------------------------------------------------------------------+
-
-
-Encoding Type: One-Hot
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; State Machine - |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE ;
-+----------------------------+-------------------------+----------------------+-----------------------+------------------------+--------------------------+------------------------+------------------------+---------------------+------------------------+--------------------------+-----------------------+-------------------------+------------------------+----------------------------+--------------------+-----------------------+-----------------------+----------------------------+----------------------+------------------------+----------------------------+-------------------------+-----------------------+-----------------+--------------------+---------------------+---------------------+-----------------------+---------------------------+----------------------+------------------------+--------------------+------------------------+------------------------+-------------------------+-----------------------+---------------------------+-----------------------+----------------------+-----------------------+------------------------+---------------------------+---------------------+---------------------------+-----------------------+------------------------+------------------------+------------------------+---------------------------+-----------------------+------------------------+-------------------------+-------------------+-------------------------+-------------------------+---------------------------+-----------------------+-------------------------+-----------------------+-------------------------+-------------------+-------------------+------------------------+------------------------+--------------------------+------------------------+-----------------------+---------------------------+------------------+----------------------+------------------+----------------+----------------+
-; Name ; CMD_STATE.T3_VERIFY_CRC ; CMD_STATE.T3_LOAD_SR ; CMD_STATE.T3_CHECK_RD ; CMD_STATE.T3_SET_DRQ_2 ; CMD_STATE.T3_LOAD_DATA_2 ; CMD_STATE.T3_SHIFT_ADR ; CMD_STATE.T3_VERIFY_AM ; CMD_STATE.T3_RD_ADR ; CMD_STATE.T3_SET_DRQ_1 ; CMD_STATE.T3_LOAD_DATA_1 ; CMD_STATE.T3_CHECK_DR ; CMD_STATE.T3_CHECK_BYTE ; CMD_STATE.T3_DETECT_AM ; CMD_STATE.T3_CHECK_INDEX_3 ; CMD_STATE.T3_SHIFT ; CMD_STATE.T3_RD_TRACK ; CMD_STATE.T3_DATALOST ; CMD_STATE.T3_CHECK_INDEX_2 ; CMD_STATE.T3_WR_DATA ; CMD_STATE.T3_LOAD_SHFT ; CMD_STATE.T3_CHECK_INDEX_1 ; CMD_STATE.T3_VERIFY_DRQ ; CMD_STATE.T3_DELAY_B3 ; CMD_STATE.T3_WR ; CMD_STATE.T2_WR_FF ; CMD_STATE.T2_WR_CRC ; CMD_STATE.T2_WRSTAT ; CMD_STATE.T2_DATALOST ; CMD_STATE.T2_VERIFY_DRQ_3 ; CMD_STATE.T2_WR_BYTE ; CMD_STATE.T2_LOAD_SHFT ; CMD_STATE.T2_WR_AM ; CMD_STATE.T2_WR_LEADIN ; CMD_STATE.T2_DELAY_B11 ; CMD_STATE.T2_CHECK_MODE ; CMD_STATE.T2_DELAY_B1 ; CMD_STATE.T2_VERIFY_DRQ_2 ; CMD_STATE.T2_DELAY_B8 ; CMD_STATE.T2_SET_DRQ ; CMD_STATE.T2_DELAY_B2 ; CMD_STATE.T2_MULTISECT ; CMD_STATE.T2_VERIFY_CRC_2 ; CMD_STATE.T2_RDSTAT ; CMD_STATE.T2_VERIFY_DRQ_1 ; CMD_STATE.T2_NEXTBYTE ; CMD_STATE.T2_LOAD_DATA ; CMD_STATE.T2_FIRSTBYTE ; CMD_STATE.T2_VERIFY_AM ; CMD_STATE.T2_VERIFY_CRC_1 ; CMD_STATE.T2_SCAN_LEN ; CMD_STATE.T2_SCAN_SECT ; CMD_STATE.T2_SCAN_TRACK ; CMD_STATE.T2_INIT ; CMD_STATE.T2_RD_WR_SECT ; CMD_STATE.T1_VERIFY_CRC ; CMD_STATE.T1_VERIFY_DELAY ; CMD_STATE.T1_SCAN_CRC ; CMD_STATE.T1_SCAN_TRACK ; CMD_STATE.T1_SPINDOWN ; CMD_STATE.T1_STEP_DELAY ; CMD_STATE.T1_TRAP ; CMD_STATE.T1_STEP ; CMD_STATE.T1_HEAD_CTRL ; CMD_STATE.T1_CHECK_DIR ; CMD_STATE.T1_COMP_TR_DSR ; CMD_STATE.T1_LOAD_SHFT ; CMD_STATE.T1_STEPPING ; CMD_STATE.T1_SEEK_RESTORE ; CMD_STATE.DECODE ; CMD_STATE.DELAY_15MS ; CMD_STATE.SPINUP ; CMD_STATE.INIT ; CMD_STATE.IDLE ;
-+----------------------------+-------------------------+----------------------+-----------------------+------------------------+--------------------------+------------------------+------------------------+---------------------+------------------------+--------------------------+-----------------------+-------------------------+------------------------+----------------------------+--------------------+-----------------------+-----------------------+----------------------------+----------------------+------------------------+----------------------------+-------------------------+-----------------------+-----------------+--------------------+---------------------+---------------------+-----------------------+---------------------------+----------------------+------------------------+--------------------+------------------------+------------------------+-------------------------+-----------------------+---------------------------+-----------------------+----------------------+-----------------------+------------------------+---------------------------+---------------------+---------------------------+-----------------------+------------------------+------------------------+------------------------+---------------------------+-----------------------+------------------------+-------------------------+-------------------+-------------------------+-------------------------+---------------------------+-----------------------+-------------------------+-----------------------+-------------------------+-------------------+-------------------+------------------------+------------------------+--------------------------+------------------------+-----------------------+---------------------------+------------------+----------------------+------------------+----------------+----------------+
-; CMD_STATE.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; CMD_STATE.INIT ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
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-; CMD_STATE.T2_WR_FF ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_WR ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_DELAY_B3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_VERIFY_DRQ ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_CHECK_INDEX_1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_LOAD_SHFT ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_WR_DATA ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_CHECK_INDEX_2 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_DATALOST ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_RD_TRACK ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_SHIFT ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_CHECK_INDEX_3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_DETECT_AM ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_CHECK_BYTE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_CHECK_DR ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_LOAD_DATA_1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_SET_DRQ_1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_RD_ADR ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_VERIFY_AM ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_SHIFT_ADR ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_LOAD_DATA_2 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_SET_DRQ_2 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_CHECK_RD ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_LOAD_SR ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-; CMD_STATE.T3_VERIFY_CRC ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
-+----------------------------+-------------------------+----------------------+-----------------------+------------------------+--------------------------+------------------------+------------------------+---------------------+------------------------+--------------------------+-----------------------+-------------------------+------------------------+----------------------------+--------------------+-----------------------+-----------------------+----------------------------+----------------------+------------------------+----------------------------+-------------------------+-----------------------+-----------------+--------------------+---------------------+---------------------+-----------------------+---------------------------+----------------------+------------------------+--------------------+------------------------+------------------------+-------------------------+-----------------------+---------------------------+-----------------------+----------------------+-----------------------+------------------------+---------------------------+---------------------+---------------------------+-----------------------+------------------------+------------------------+------------------------+---------------------------+-----------------------+------------------------+-------------------------+-------------------+-------------------------+-------------------------+---------------------------+-----------------------+-------------------------+-----------------------+-------------------------+-------------------+-------------------+------------------------+------------------------+--------------------------+------------------------+-----------------------+---------------------------+------------------+----------------------+------------------+----------------+----------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Registers Protected by Synthesis ;
-+----------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
-; Register Name ; Protected by Synthesis Attribute or Preserve Register Assignment ; Not to be Touched by Netlist Optimizations ;
-+----------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|areset_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|idle_state ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[16] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[16] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[10] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|tmp_nominal_data_out_state ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[31] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[31] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|areset_init_state_1 ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3|cntr_pij:auto_generated|counter_reg_bit[4] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3|cntr_pij:auto_generated|counter_reg_bit[3] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3|cntr_pij:auto_generated|counter_reg_bit[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3|cntr_pij:auto_generated|counter_reg_bit[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3|cntr_pij:auto_generated|counter_reg_bit[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|write_data_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|write_nominal_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_wait_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|read_last_nominal_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|read_last_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reset_state ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[30] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[30] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[13] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[13] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[12] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[12] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[17] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[17] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[11] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[18] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[18] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[3] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[12] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|C0_data_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|C1_data_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|C2_data_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|C3_data_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|C4_data_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_post_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_seq_data_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14|cntr_pij:auto_generated|counter_reg_bit[4] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14|cntr_pij:auto_generated|counter_reg_bit[3] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14|cntr_pij:auto_generated|counter_reg_bit[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14|cntr_pij:auto_generated|counter_reg_bit[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14|cntr_pij:auto_generated|counter_reg_bit[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|configupdate3_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|configupdate_state ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[26] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[26] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[25] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[25] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[24] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[24] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[8] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[17] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[7] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[16] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[6] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[15] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[5] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[14] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[4] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[13] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[23] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[23] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[22] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[22] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[21] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[21] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[20] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[20] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[19] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[19] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[15] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[15] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[14] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[14] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[29] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[29] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[28] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[28] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[27] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[27] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[11] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[11] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[10] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[10] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[9] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[9] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[8] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[8] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[7] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[7] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[6] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[6] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[5] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[5] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[4] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[4] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[3] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[3] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[2] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[2] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[1] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[1] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[0] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[0] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[16] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[16] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|read_data_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|read_data_nominal_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|read_init_nominal_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|read_init_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[7] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[9] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[17] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[31] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|counter_param_latch_reg[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|counter_param_latch_reg[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|counter_param_latch_reg[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|counter_type_latch_reg[3] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|counter_type_latch_reg[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|counter_type_latch_reg[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|write_init_nominal_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|write_init_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|read_first_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|counter_type_latch_reg[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|read_first_nominal_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_counter_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_init_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_seq_ena_state ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[30] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[13] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[12] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[17] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[15] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[6] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[18] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[14] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[5] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|C0_ena_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|C1_ena_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|C2_ena_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|C3_ena_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|C4_ena_state ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13|cntr_qij:auto_generated|counter_reg_bit[5] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13|cntr_qij:auto_generated|counter_reg_bit[4] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13|cntr_qij:auto_generated|counter_reg_bit[3] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13|cntr_qij:auto_generated|counter_reg_bit[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13|cntr_qij:auto_generated|counter_reg_bit[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13|cntr_qij:auto_generated|counter_reg_bit[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated|counter_reg_bit[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated|counter_reg_bit[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated|counter_reg_bit[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated|counter_reg_bit[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated|counter_reg_bit[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated|counter_reg_bit[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated|counter_reg_bit[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated|counter_reg_bit[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated|counter_reg_bit[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated|counter_reg_bit[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated|counter_reg_bit[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated|counter_reg_bit[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated|counter_reg_bit[3] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated|counter_reg_bit[3] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated|counter_reg_bit[3] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated|counter_reg_bit[3] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated|counter_reg_bit[4] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated|counter_reg_bit[4] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated|counter_reg_bit[4] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated|counter_reg_bit[4] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated|counter_reg_bit[5] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated|counter_reg_bit[5] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated|counter_reg_bit[5] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated|counter_reg_bit[5] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated|counter_reg_bit[6] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated|counter_reg_bit[6] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated|counter_reg_bit[6] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated|counter_reg_bit[6] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated|counter_reg_bit[7] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated|counter_reg_bit[7] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15|cntr_30l:auto_generated|counter_reg_bit[7] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12|cntr_30l:auto_generated|counter_reg_bit[7] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|configupdate2_state ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[26] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[25] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[24] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[9] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[10] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[1] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[11] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[2] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[12] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[3] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[13] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[4] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[23] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[22] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[21] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[20] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[19] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[15] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[14] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[29] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[28] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[27] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[11] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[10] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[9] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[8] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[7] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[6] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[5] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[4] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[3] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[2] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[1] ; no ; yes ;
-; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[0] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|nominal_data[8] ; no ; yes ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|tmp_seq_ena_state ; no ; yes ;
-+----------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; User-Specified and Inferred Latches ;
-+------------------------------------------------------------------------------------+--------------------------------------------------------------------------+------------------------+
-; Latch Name ; Latch Enable Signal ; Free of Timing Hazards ;
-+------------------------------------------------------------------------------------+--------------------------------------------------------------------------+------------------------+
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[13] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[26] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[25] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[24] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[23] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[14] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[29] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[28] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[27] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; yes ;
-; Number of user-specified and inferred latches = 32 ; ; ;
-+------------------------------------------------------------------------------------+--------------------------------------------------------------------------+------------------------+
-Note: All latches listed above may not be present at the end of synthesis due to various synthesis optimizations.
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Registers Removed During Synthesis ;
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Register name ; Reason for Removal ;
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; interrupt_handler:nobody|INT_LATCH[31] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[31] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[30] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[30] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[29] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[29] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[28] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[28] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[27] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[27] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[26] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[26] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[25] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[25] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[24] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[24] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[23] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[23] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[22] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[22] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[21] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[21] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[20] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[20] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[19] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[19] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[18] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[18] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[17] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[17] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[16] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[16] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[15] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[15] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[14] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[14] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[13] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[13] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[12] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[12] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[11] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[11] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[10] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[10] ; Lost fanout ;
-; interrupt_handler:nobody|INT_LATCH[7] ; Stuck at GND due to stuck port clock ;
-; interrupt_handler:nobody|INT_CLEAR[7] ; Lost fanout ;
-; interrupt_handler:nobody|WERTE[7][13] ; Stuck at VCC due to stuck port data_in ;
-; interrupt_handler:nobody|WERTE[6][10] ; Stuck at GND due to stuck port clear ;
-; interrupt_handler:nobody|WERTE[2][11] ; Stuck at VCC due to stuck port data_in ;
-; interrupt_handler:nobody|WERTE[1][11] ; Stuck at VCC due to stuck port data_in ;
-; interrupt_handler:nobody|WERTE[0][11] ; Stuck at VCC due to stuck port data_in ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[0..1,8..9,16..17] ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[0..1,8..9,16..17] ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[0..4,8..12,16..20] ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[0..4,8..12,16..20] ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BLITTER_REQ ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|DCD_In ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTS_In ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|DCD_In ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTS_In ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|FM_In ; Lost fanout ;
-; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_5n7:usedw_counter|counter_reg_bit[0..6] ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|\P_WAVSTRB:TMP ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|\P_IRQ:DCD_TRANS ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|\P_IRQ:DCD_TRANS ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|AIP ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|LA ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|BSY_ERR ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|TCR[3] ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|IDR[0..5] ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|\PARITY:LOCK ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\FM_ENCODER:CNT[0..7] ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|ICR[6] ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|MR2[0,2..5,7] ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|TCR[0..2] ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|SER[0..7] ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|SPER ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|BUS_FREE ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|\REGISTERS:BSY_LOCK ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|\P_BUSFREE:TMP[0..2] ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|IDR[6..7] ; Lost fanout ;
-; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[9] ; Lost fanout ;
-; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[9] ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_gd9:rs_bwp|dffe15a[8] ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_pe9:rs_brp|dffe16a[10] ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_pe9:ws_bwp|dffe16a[10] ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_gd9:ws_brp|dffe15a[8] ; Lost fanout ;
-; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe1a[2] ; Merged with Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|NOISE_OUT ; Merged with FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\NOISEGENERATOR:N_SHFT[16] ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|OE ; Merged with FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|\OVERRUN:FIRST_READ ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|OVR ; Merged with FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|\OVERRUN:FIRST_READ ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|OVR ; Merged with FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|\OVERRUN:FIRST_READ ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|MR2[6] ; Merged with FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|ICR[7] ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|ICR[0..3] ; Merged with FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|ICR[4] ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|DCD_FLAGn ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|DCD_FLAGn ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|\P_DRQ:LOCK ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_ACTIVE_I ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|ICR[4,7] ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|MR2[1] ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe18 ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe2 ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe20 ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe34 ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe36 ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe4 ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|INT ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DRQ ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|ODR[0..7] ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDRWR_D_SEL ; Merged with Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[0..2] ; Merged with Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[3] ;
-; Video:Fredi_Aschwanden|inst88 ; Merged with Video:Fredi_Aschwanden|inst90 ;
-; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[0..2] ; Merged with Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ;
-; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BLITTER_AC ; Stuck at GND due to stuck port data_in ;
-; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[2] ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE.IDLE ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE.DMA_STEP_1 ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE.DMA_STEP_2 ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE.DMA_STEP_3 ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE.DMA_STEP_4 ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.IDLE ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.DMA_SEND ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.DMA_TARG_RCV ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.DMA_INIT_RCV ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.WAIT_2200ns ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_STATE.A_00 ; Lost fanout ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.WAIT_800ns ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DATA_EN ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DELAY_800ns ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|\DELAY_800:TMP[0..3] ; Stuck at GND due to stuck port data_in ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[0] ; Merged with FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_STATE.B_01 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\ADDER:ADDER_DATA[12] ; Lost fanout ;
-; Total Number of Removed Registers = 223 ; ;
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Removed Registers Triggering Further Register Optimizations ;
-+-----------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Register name ; Reason for Removal ; Registers Removed due to This Register ;
-+-----------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.WAIT_800ns ; Stuck at GND ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DATA_EN, ;
-; ; due to stuck port data_in ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|\DELAY_800:TMP[2] ;
-; interrupt_handler:nobody|INT_LATCH[30] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[30] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[29] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[29] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[28] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[28] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[27] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[27] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[26] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[26] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[25] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[25] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[24] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[24] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[23] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[23] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[22] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[22] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[21] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[21] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[20] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[20] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[19] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[19] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[18] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[18] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[17] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[17] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[16] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[16] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[15] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[15] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[14] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[14] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[13] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[13] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[12] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[12] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[11] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[11] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[10] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[10] ;
-; ; due to stuck port clock ; ;
-; interrupt_handler:nobody|INT_LATCH[7] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[7] ;
-; ; due to stuck port clock ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[17] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[17] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[16] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[16] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[9] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[9] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[8] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[8] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[1] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[1] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[0] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[0] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[20] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[20] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[19] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[19] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[18] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[18] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[17] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[17] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[16] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[16] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[12] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[12] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[11] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[11] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[10] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[10] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[9] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[9] ;
-; ; due to stuck port data_in ; ;
-; interrupt_handler:nobody|INT_LATCH[31] ; Stuck at GND ; interrupt_handler:nobody|INT_CLEAR[31] ;
-; ; due to stuck port clock ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[4] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[4] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[3] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[3] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[2] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[2] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[1] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[1] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[0] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[0] ;
-; ; due to stuck port data_in ; ;
-; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[8] ; Stuck at GND ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[8] ;
-; ; due to stuck port data_in ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTS_In ; Stuck at GND ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|TCR[3] ;
-; ; due to stuck port data_in ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|DCD_In ; Stuck at GND ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|\P_IRQ:DCD_TRANS ;
-; ; due to stuck port data_in ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|MR2[2] ; Stuck at GND ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|ICR[4] ;
-; ; due to stuck port data_in ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|MR2[0] ; Stuck at GND ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|BUS_FREE ;
-; ; due to stuck port data_in ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|DCD_FLAGn ; Stuck at GND ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|ODR[2] ;
-; ; due to stuck port data_in ; ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|DCD_In ; Stuck at GND ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|\P_IRQ:DCD_TRANS ;
-; ; due to stuck port data_in ; ;
-+-----------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+------------------------------------------------------+
-; General Register Statistics ;
-+----------------------------------------------+-------+
-; Statistic ; Value ;
-+----------------------------------------------+-------+
-; Total registers ; 4612 ;
-; Number of registers using Synchronous Clear ; 156 ;
-; Number of registers using Synchronous Load ; 204 ;
-; Number of registers using Asynchronous Clear ; 1431 ;
-; Number of registers using Asynchronous Load ; 0 ;
-; Number of registers using Clock Enable ; 2735 ;
-; Number of registers using Preset ; 0 ;
-+----------------------------------------------+-------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Inverted Register Statistics ;
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
-; Inverted Register ; Fan out ;
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|WR_CNT[3] ; 4 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|WR_CNT[2] ; 5 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|WR_CNT[1] ; 5 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|WR_CNT[0] ; 4 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|PER_CNT[7] ; 7 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|TDRE ; 7 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|TDRE ; 7 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|IRQ_ACIAn ; 2 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdemp_eq_comp_lsb_aeb ; 1 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdemp_eq_comp_msb_aeb ; 1 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a0 ; 8 ;
-; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reset_state ; 2 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|rdemp_eq_comp_lsb_aeb ; 1 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|rdemp_eq_comp_msb_aeb ; 1 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|parity6 ; 4 ;
-; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|sub_parity12a0 ; 1 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_gic:wrptr_g1p|counter8a0 ; 8 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_gic:wrptr_g1p|parity9 ; 4 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|sub_parity6a0 ; 1 ;
-; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|sub_parity9a0 ; 1 ;
-; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a0 ; 7 ;
-; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|parity6 ; 3 ;
-; Total number of inverted registers = 22 ; ;
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Multiplexer Restructuring Statistics (Restructuring Performed) ;
-+--------------------+-----------+---------------+----------------------+------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
-+--------------------+-----------+---------------+----------------------+------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SECTOR_REG[7] ;
-; 3:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\NOISEGENERATOR:CLK_DIV[0] ;
-; 3:1 ; 2 bits ; 4 LEs ; 4 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|\P_SAMPLE:HI_FLT[0] ;
-; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|SHIFT_REG[6] ;
-; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG[2] ;
-; 3:1 ; 2 bits ; 4 LEs ; 0 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|\P_SAMPLE:FLT_TMP[0] ;
-; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|SHIFT_REG[0] ;
-; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|CTRL_REG[7] ;
-; 3:1 ; 2 bits ; 4 LEs ; 0 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|\P_SAMPLE:FLT_TMP[0] ;
-; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|SHIFT_REG[4] ;
-; 3:1 ; 8 bits ; 16 LEs ; 0 LEs ; 16 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|COMMAND_REG[7] ;
-; 3:1 ; 16 bits ; 32 LEs ; 16 LEs ; 16 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[4] ;
-; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|\MFM_SYNCLOCK:TMP[4] ;
-; 3:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_D:PRESCALE[4] ;
-; 3:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_C:PRESCALE[4] ;
-; 3:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_B:PRESCALE[7] ;
-; 3:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_A:PRESCALE[6] ;
-; 3:1 ; 2 bits ; 4 LEs ; 0 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UCR[3] ;
-; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\RESTORE_TRAP:STEP_CNT[2] ;
-; 4:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[3] ;
-; 4:1 ; 4 bits ; 8 LEs ; 8 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[6] ;
-; 4:1 ; 7 bits ; 14 LEs ; 14 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|SHIFT_REG[4] ;
-; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|BITCNT[2] ;
-; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|BITCNT[0] ;
-; 4:1 ; 7 bits ; 14 LEs ; 14 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|SHIFT_REG[6] ;
-; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|BITCNT[0] ;
-; 4:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|\CLKDIV:CLK_DIVCNT[0] ;
-; 4:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|\P_START_BIT:TMP[0] ;
-; 4:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|\P_SAMPLE:LOW_FLT[0] ;
-; 4:1 ; 5 bits ; 10 LEs ; 10 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|\CLKDIV:CLK_DIVCNT[3] ;
-; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|BITCNT[0] ;
-; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|BITCNT[1] ;
-; 4:1 ; 7 bits ; 14 LEs ; 7 LEs ; 7 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG[0] ;
-; 4:1 ; 7 bits ; 14 LEs ; 7 LEs ; 7 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|DATA_REG[2] ;
-; 4:1 ; 7 bits ; 14 LEs ; 14 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|DATA_REG[0] ;
-; 4:1 ; 7 bits ; 14 LEs ; 14 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|DATA_REG[2] ;
-; 4:1 ; 5 bits ; 10 LEs ; 10 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ;
-; 4:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|BITCNT[0] ;
-; 3:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[7] ;
-; 5:1 ; 21 bits ; 63 LEs ; 42 LEs ; 21 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[7] ;
-; 5:1 ; 2 bits ; 6 LEs ; 4 LEs ; 2 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[19] ;
-; 5:1 ; 5 bits ; 15 LEs ; 10 LEs ; 5 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|SHIFT_REG[1] ;
-; 5:1 ; 5 bits ; 15 LEs ; 10 LEs ; 5 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\NOISEGENERATOR:CNT_NOISE[0] ;
-; 4:1 ; 31 bits ; 62 LEs ; 62 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[26] ;
-; 5:1 ; 3 bits ; 9 LEs ; 6 LEs ; 3 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|\P_SAMPLE:TIMER[1] ;
-; 5:1 ; 8 bits ; 24 LEs ; 16 LEs ; 8 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|DATA_REG[4] ;
-; 10:1 ; 4 bits ; 24 LEs ; 24 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_A:PRESCALE[5] ;
-; 10:1 ; 4 bits ; 24 LEs ; 24 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_D:PRESCALE[2] ;
-; 10:1 ; 4 bits ; 24 LEs ; 24 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_B:PRESCALE[1] ;
-; 10:1 ; 4 bits ; 24 LEs ; 24 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|\PRESCALE_C:PRESCALE[5] ;
-; 5:1 ; 8 bits ; 24 LEs ; 16 LEs ; 8 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_D[3] ;
-; 5:1 ; 8 bits ; 24 LEs ; 16 LEs ; 8 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_C[0] ;
-; 7:1 ; 7 bits ; 28 LEs ; 14 LEs ; 14 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_TRANSMIT:I_UART_TRANSMIT|\CLKDIV:CLK_DIVCNT[2] ;
-; 7:1 ; 7 bits ; 28 LEs ; 21 LEs ; 7 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|\CLKDIV:CLK_DIVCNT[4] ;
-; 7:1 ; 7 bits ; 28 LEs ; 14 LEs ; 14 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|\CLKDIV:CLK_DIVCNT[4] ;
-; 7:1 ; 7 bits ; 28 LEs ; 21 LEs ; 7 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|\CLKDIV:CLK_DIVCNT[5] ;
-; 6:1 ; 8 bits ; 32 LEs ; 16 LEs ; 16 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|TRACK_REG[6] ;
-; 7:1 ; 2 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nIDE_RD~reg0 ;
-; 7:1 ; 13 bits ; 52 LEs ; 52 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[10] ;
-; 6:1 ; 20 bits ; 80 LEs ; 20 LEs ; 60 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ;
-; 11:1 ; 2 bits ; 14 LEs ; 10 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\PHASE_DECODER:PHASE_AMOUNT[1] ;
-; 8:1 ; 5 bits ; 25 LEs ; 20 LEs ; 5 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL|UDR[0] ;
-; 9:1 ; 2 bits ; 12 LEs ; 8 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[5] ;
-; 14:1 ; 5 bits ; 45 LEs ; 10 LEs ; 35 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|VOL_ENV[3] ;
-; 11:1 ; 8 bits ; 56 LEs ; 16 LEs ; 40 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_B[1] ;
-; 11:1 ; 8 bits ; 56 LEs ; 16 LEs ; 40 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_A[1] ;
-; 17:1 ; 4 bits ; 44 LEs ; 40 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VECT_NUMBER[2] ;
-; 17:1 ; 4 bits ; 44 LEs ; 0 LEs ; 44 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VECT_NUMBER[7] ;
-; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MID[1] ;
-; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[5] ;
-; 3:1 ; 24 bits ; 48 LEs ; 48 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[1] ;
-; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[16] ;
-; 3:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|WR_CNT[0] ;
-; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE ;
-; 3:1 ; 2 bits ; 4 LEs ; 4 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE|RCV_NEXT_STATE ;
-; 3:1 ; 5 bits ; 10 LEs ; 10 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE ;
-; 3:1 ; 4 bits ; 8 LEs ; 8 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INDEXCNT ;
-; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[21] ;
-; 3:1 ; 6 bits ; 12 LEs ; 12 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|DATA_OUT[4] ;
-; 3:1 ; 6 bits ; 12 LEs ; 12 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|DATA_OUT[1] ;
-; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CNT ;
-; 3:1 ; 2 bits ; 4 LEs ; 4 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_RECEIVE:I_UART_RECEIVE|RCV_NEXT_STATE ;
-; 3:1 ; 2 bits ; 4 LEs ; 4 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE|RCV_NEXT_STATE ;
-; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|NEXT_CMD_STATE ;
-; 3:1 ; 4 bits ; 8 LEs ; 8 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|AMPLITUDE_A[1] ;
-; 3:1 ; 4 bits ; 8 LEs ; 8 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|AMPLITUDE_B[2] ;
-; 3:1 ; 4 bits ; 8 LEs ; 8 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|AMPLITUDE_C[1] ;
-; 16:1 ; 8 bits ; 80 LEs ; 24 LEs ; 56 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|DATA_OUT[2] ;
-; 4:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|ADDER_IN[1] ;
-; 64:1 ; 3 bits ; 126 LEs ; 126 LEs ; 0 LEs ; No ; |firebee1|interrupt_handler:nobody|_ ;
-; 17:1 ; 3 bits ; 33 LEs ; 18 LEs ; 15 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|DA_OUT[7] ;
-; 18:1 ; 4 bits ; 48 LEs ; 44 LEs ; 4 LEs ; No ; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|DA_OUT[2] ;
-+--------------------+-----------+---------------+----------------------+------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated ;
-+---------------------------------------+-------------------------------------------------------------------------------------+-----------------+-------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------------+-------------------------------------------------------------------------------------+-----------------+-------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-; REMOVE_DUPLICATE_REGISTERS ; OFF ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; d101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; d102 ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; OFF ; - ; - ;
-; SYNCHRONIZATION_REGISTER_CHAIN_LENGTH ; 3 ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; rdemp_eq_comp_lsb_aeb ;
-; POWER_UP_LEVEL ; HIGH ; - ; rdemp_eq_comp_lsb_aeb ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; rdemp_eq_comp_msb_aeb ;
-; POWER_UP_LEVEL ; HIGH ; - ; rdemp_eq_comp_msb_aeb ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; rs_dgwp_reg ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; wrfull_eq_comp_lsb_mux_reg ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; wrfull_eq_comp_msb_mux_reg ;
-; SUPPRESS_DA_RULE_INTERNAL ; S102 ; - ; wrptr_g ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; ws_dgrp_reg ;
-; CUT ; ON ; rdptr_g ; ws_dgrp|dffpipe17|dffe18a ;
-; SDC_STATEMENT ; set_false_path -from *rdptr_g* -to *ws_dgrp|dffpipe_id9:dffpipe17|dffe18a* ; - ; - ;
-; CUT ; ON ; delayed_wrptr_g ; rs_dgwp|dffpipe12|dffe13a ;
-; SDC_STATEMENT ; set_false_path -from *delayed_wrptr_g* -to *rs_dgwp|dffpipe_hd9:dffpipe12|dffe13a* ; - ; - ;
-+---------------------------------------+-------------------------------------------------------------------------------------+-----------------+-------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p ;
-+----------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+----------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; POWER_UP_LEVEL ; HIGH ; - ; counter5a0 ;
-; POWER_UP_LEVEL ; HIGH ; - ; parity6 ;
-+----------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p ;
-+---------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; S102 ; - ; - ;
-; POWER_UP_LEVEL ; HIGH ; - ; sub_parity9a0 ;
-; POWER_UP_LEVEL ; LOW ; - ; parity8 ;
-+---------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram ;
-+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_ikd:rs_dgwp ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-; X_ON_VIOLATION_OPTION ; OFF ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; - ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_ikd:rs_dgwp|dffpipe_hd9:dffpipe12 ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_gd9:ws_brp ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_pe9:ws_bwp ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-; X_ON_VIOLATION_OPTION ; OFF ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; - ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17 ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated ;
-+---------------------------------------+-------------------------------------------------------------------------------------+-----------------+-------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------------+-------------------------------------------------------------------------------------+-----------------+-------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-; REMOVE_DUPLICATE_REGISTERS ; OFF ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; d101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; d102 ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; OFF ; - ; - ;
-; SYNCHRONIZATION_REGISTER_CHAIN_LENGTH ; 3 ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; rdemp_eq_comp_lsb_aeb ;
-; POWER_UP_LEVEL ; HIGH ; - ; rdemp_eq_comp_lsb_aeb ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; rdemp_eq_comp_msb_aeb ;
-; POWER_UP_LEVEL ; HIGH ; - ; rdemp_eq_comp_msb_aeb ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; rs_dgwp_reg ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; wrfull_eq_comp_lsb_mux_reg ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; wrfull_eq_comp_msb_mux_reg ;
-; SUPPRESS_DA_RULE_INTERNAL ; S102 ; - ; wrptr_g ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; ws_dgrp_reg ;
-; CUT ; ON ; rdptr_g ; ws_dgrp|dffpipe15|dffe16a ;
-; SDC_STATEMENT ; set_false_path -from *rdptr_g* -to *ws_dgrp|dffpipe_kd9:dffpipe15|dffe16a* ; - ; - ;
-; CUT ; ON ; delayed_wrptr_g ; rs_dgwp|dffpipe12|dffe13a ;
-; SDC_STATEMENT ; set_false_path -from *delayed_wrptr_g* -to *rs_dgwp|dffpipe_jd9:dffpipe12|dffe13a* ; - ; - ;
-+---------------------------------------+-------------------------------------------------------------------------------------+-----------------+-------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p ;
-+----------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+----------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; POWER_UP_LEVEL ; HIGH ; - ; sub_parity6a0 ;
-; POWER_UP_LEVEL ; LOW ; - ; parity5 ;
-+----------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_gic:wrptr_g1p ;
-+---------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; S102 ; - ; - ;
-; POWER_UP_LEVEL ; HIGH ; - ; counter8a0 ;
-; POWER_UP_LEVEL ; HIGH ; - ; parity9 ;
-+---------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram ;
-+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_pe9:rs_brp ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_gd9:rs_bwp ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-; X_ON_VIOLATION_OPTION ; OFF ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; - ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12 ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_lkd:ws_dgrp ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-; X_ON_VIOLATION_OPTION ; OFF ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; - ;
-+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_lkd:ws_dgrp|dffpipe_kd9:dffpipe15 ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component ;
-+---------------------------------+-------+------+----------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+----------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+----------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated ;
-+---------------------------------------+-------------------------------------------------------------------------------------+-----------------+----------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------------+-------------------------------------------------------------------------------------+-----------------+----------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-; REMOVE_DUPLICATE_REGISTERS ; OFF ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; OFF ; - ; - ;
-; SYNCHRONIZATION_REGISTER_CHAIN_LENGTH ; 4 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; d101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; d102 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; R105 ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; rdemp_eq_comp_lsb_aeb ;
-; POWER_UP_LEVEL ; HIGH ; - ; rdemp_eq_comp_lsb_aeb ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; rdemp_eq_comp_msb_aeb ;
-; POWER_UP_LEVEL ; HIGH ; - ; rdemp_eq_comp_msb_aeb ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; rs_dgwp_reg ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; wrfull_eq_comp_lsb_mux_reg ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; wrfull_eq_comp_msb_mux_reg ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; ws_dgrp_reg ;
-; CUT ; ON ; rdptr_g ; ws_dgrp|dffpipe22|dffe23a ;
-; SDC_STATEMENT ; set_false_path -from *rdptr_g* -to *ws_dgrp|dffpipe_re9:dffpipe22|dffe23a* ; - ; - ;
-; CUT ; ON ; delayed_wrptr_g ; rs_dgwp|dffpipe15|dffe16a ;
-; SDC_STATEMENT ; set_false_path -from *delayed_wrptr_g* -to *rs_dgwp|dffpipe_qe9:dffpipe15|dffe16a* ; - ; - ;
-+---------------------------------------+-------------------------------------------------------------------------------------+-----------------+----------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p ;
-+----------------+-------+------+----------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+----------------+-------+------+----------------------------------------------------------------------------------------------------------------+
-; POWER_UP_LEVEL ; HIGH ; - ; counter5a0 ;
-; POWER_UP_LEVEL ; HIGH ; - ; parity6 ;
-+----------------+-------+------+----------------------------------------------------------------------------------------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_ojc:wrptr_g1p ;
-+---------------------------+-------+------+-----------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+-----------------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; S102 ; - ; - ;
-; POWER_UP_LEVEL ; HIGH ; - ; counter8a0 ;
-; POWER_UP_LEVEL ; HIGH ; - ; parity9 ;
-+---------------------------+-------+------+-----------------------------------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp ;
-+---------------------------+-------+------+----------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+----------------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; S102 ; - ; - ;
-; POWER_UP_LEVEL ; HIGH ; - ; sub_parity12a0 ;
-; POWER_UP_LEVEL ; LOW ; - ; parity11 ;
-+---------------------------+-------+------+----------------------------------------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram ;
-+---------------------------------+--------------------+------+-------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+-------------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+-------------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_rld:rs_dgwp ;
-+-----------------------------+------------------------+------+---------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+------------------------+------+---------------------------------------------------------------------------------+
-; X_ON_VIOLATION_OPTION ; OFF ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; - ;
-+-----------------------------+------------------------+------+---------------------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_rld:rs_dgwp|dffpipe_qe9:dffpipe15 ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_9d9:wraclr ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp ;
-+-----------------------------+------------------------+------+---------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+------------------------+------+---------------------------------------------------------------------------------+
-; X_ON_VIOLATION_OPTION ; OFF ; - ; - ;
-; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; - ; - ;
-+-----------------------------+------------------------+------+---------------------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22 ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------+
-; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
-+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component ;
-+---------------------------+-------------+------+---------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------------+------+---------------------------------------------------------+
-; ADV_NETLIST_OPT_ALLOWED ; NEVER_ALLOW ; - ; - ;
-; PRESERVE_REGISTER ; ON ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; LOW ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; HIGH ; - ; mux ;
-; DDIO_INPUT_REGISTER ; LOW ; - ; input_cell_L ;
-; DDIO_INPUT_REGISTER ; HIGH ; - ; input_cell_H ;
-; SUPPRESS_DA_RULE_INTERNAL ; D101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; D103 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; C104 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; C106 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; D102 ; - ; - ;
-+---------------------------+-------------+------+---------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated ;
-+-----------------------------+-------+------+-------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+-------+------+-------------------------------------------------------------------------------------------+
-; SYNCHRONIZER_IDENTIFICATION ; OFF ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; C106 ; - ; - ;
-; DDIO_INPUT_REGISTER ; HIGH ; - ; input_cell_h ;
-; DDIO_INPUT_REGISTER ; LOW ; - ; input_cell_l ;
-; MEGAFUNCTION_GENERATED_TRI ; ON ; - ; tri_buf1a ;
-+-----------------------------+-------+------+-------------------------------------------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated ;
-+---------------------------------+--------------------+------+--------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+--------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+--------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram ;
-+---------------------------------+--------------------+------+---------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+---------------------------------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+---------------------------------------------------------------------------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated ;
-+---------------------------------+--------------------+------+----------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+----------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+----------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated ;
-+---------------------------------+--------------------+------+---------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+---------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+---------------------------------------------------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated ;
-+---------------------------------+--------------------+------+----------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+----------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+----------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated ;
-+---------------------------------+--------------------+------+------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+------------------------------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated ;
-+---------------------------------+--------------------+------+-----------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+-----------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+-----------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated ;
-+---------------------------------+--------------------+------+-------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+-------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+-------------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated ;
-+---------------------------------+--------------------+------+-------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+-------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+-------------------------------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated ;
-+---------------------------------+--------------------+------+-----------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+-----------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+-----------------------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component ;
-+---------------------------+-------------+------+---------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------------+------+---------------------------------------------------+
-; ADV_NETLIST_OPT_ALLOWED ; NEVER_ALLOW ; - ; - ;
-; PRESERVE_REGISTER ; ON ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; LOW ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; HIGH ; - ; mux ;
-; SUPPRESS_DA_RULE_INTERNAL ; C104 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; C106 ; - ; - ;
-+---------------------------+-------------+------+---------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component|ddio_out_o2f:auto_generated ;
-+-----------------------------+-------+------+-----------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+-------+------+-----------------------------------------------------------------------------------+
-; SYNCHRONIZER_IDENTIFICATION ; OFF ; - ; - ;
-+-----------------------------+-------+------+-----------------------------------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component ;
-+---------------------------+-------------+------+---------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------------+------+---------------------------------------------------+
-; ADV_NETLIST_OPT_ALLOWED ; NEVER_ALLOW ; - ; - ;
-; PRESERVE_REGISTER ; ON ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; LOW ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; HIGH ; - ; mux ;
-; SUPPRESS_DA_RULE_INTERNAL ; C104 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; C106 ; - ; - ;
-+---------------------------+-------------+------+---------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated ;
-+-----------------------------+-------+------+-----------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+-------+------+-----------------------------------------------------------------------------------+
-; SYNCHRONIZER_IDENTIFICATION ; OFF ; - ; - ;
-+-----------------------------+-------+------+-----------------------------------------------------------------------------------+
-
-
-+------------------------------------------------------------------------------------------+
-; Source assignments for altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated ;
-+---------------------------+-------+------+-----------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+-----------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; C104 ; - ; - ;
-+---------------------------+-------+------+-----------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------+
-; Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component ;
-+---------------------------------------+-------------+------+------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------------+-------------+------+------------------------------------------------------+
-; ADV_NETLIST_OPT_ALLOWED ; NEVER_ALLOW ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; C106 ; - ; - ;
-; PLL_SCAN_RECONFIG_COUNTER_REMAP_LCELL ; 2 ; - ; le_comb10 ;
-; PLL_SCAN_RECONFIG_COUNTER_REMAP_LCELL ; 0 ; - ; le_comb8 ;
-; PLL_SCAN_RECONFIG_COUNTER_REMAP_LCELL ; 1 ; - ; le_comb9 ;
-; POWER_UP_LEVEL ; LOW ; - ; idle_state ;
-; POWER_UP_LEVEL ; LOW ; - ; read_data_nominal_state ;
-; POWER_UP_LEVEL ; LOW ; - ; read_data_state ;
-; POWER_UP_LEVEL ; LOW ; - ; read_first_nominal_state ;
-; POWER_UP_LEVEL ; LOW ; - ; read_first_state ;
-; POWER_UP_LEVEL ; LOW ; - ; read_init_nominal_state ;
-; POWER_UP_LEVEL ; LOW ; - ; read_init_state ;
-; POWER_UP_LEVEL ; LOW ; - ; read_last_nominal_state ;
-; POWER_UP_LEVEL ; LOW ; - ; read_last_state ;
-; POWER_UP_LEVEL ; LOW ; - ; reconfig_counter_state ;
-; POWER_UP_LEVEL ; LOW ; - ; reconfig_init_state ;
-; POWER_UP_LEVEL ; LOW ; - ; reconfig_post_state ;
-; POWER_UP_LEVEL ; LOW ; - ; reconfig_seq_data_state ;
-; POWER_UP_LEVEL ; LOW ; - ; reconfig_seq_ena_state ;
-; POWER_UP_LEVEL ; LOW ; - ; reconfig_wait_state ;
-; POWER_UP_LEVEL ; HIGH ; - ; reset_state ;
-; POWER_UP_LEVEL ; LOW ; - ; write_data_state ;
-; POWER_UP_LEVEL ; LOW ; - ; write_init_nominal_state ;
-; POWER_UP_LEVEL ; LOW ; - ; write_init_state ;
-; POWER_UP_LEVEL ; LOW ; - ; write_nominal_state ;
-+---------------------------------------+-------------+------+------------------------------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4|altsyncram_46r:auto_generated ;
-+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1 ;
-+---------------------------+-------+------+------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; a101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s102 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s103 ; - ; - ;
-+---------------------------+-------+------+------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12 ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; a101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s102 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s103 ; - ; - ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13 ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; a101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s102 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s103 ; - ; - ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14 ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; a101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s102 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s103 ; - ; - ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15 ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; a101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s102 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s103 ; - ; - ;
-+---------------------------+-------+------+-------------------------------------------------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2 ;
-+---------------------------+-------+------+------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; a101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s102 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s103 ; - ; - ;
-+---------------------------+-------+------+------------------------------------------------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------+
-; Source assignments for altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3 ;
-+---------------------------+-------+------+------------------------------------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+------------------------------------------------------------------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; a101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s102 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s103 ; - ; - ;
-+---------------------------+-------+------+------------------------------------------------------------------------------------------+
-
-
-+------------------------------------------------------------------------------+
-; Source assignments for lpm_counter0:inst18|lpm_counter:lpm_counter_component ;
-+---------------------------+-------+------+-----------------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------+------+-----------------------------------+
-; SUPPRESS_DA_RULE_INTERNAL ; a101 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s102 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; s103 ; - ; - ;
-+---------------------------+-------+------+-----------------------------------+
-
-
-+-----------------------------------------------------------------------------+
-; Source assignments for altddio_out3:inst5|altddio_out:altddio_out_component ;
-+---------------------------+-------------+------+----------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------------+------+----------------------------+
-; ADV_NETLIST_OPT_ALLOWED ; NEVER_ALLOW ; - ; - ;
-; PRESERVE_REGISTER ; ON ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; LOW ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; HIGH ; - ; mux ;
-; SUPPRESS_DA_RULE_INTERNAL ; C104 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; C106 ; - ; - ;
-+---------------------------+-------------+------+----------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------+
-; Source assignments for altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-; SYNCHRONIZER_IDENTIFICATION ; OFF ; - ; - ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------+
-; Source assignments for altddio_out3:inst6|altddio_out:altddio_out_component ;
-+---------------------------+-------------+------+----------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------------+------+----------------------------+
-; ADV_NETLIST_OPT_ALLOWED ; NEVER_ALLOW ; - ; - ;
-; PRESERVE_REGISTER ; ON ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; LOW ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; HIGH ; - ; mux ;
-; SUPPRESS_DA_RULE_INTERNAL ; C104 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; C106 ; - ; - ;
-+---------------------------+-------------+------+----------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------+
-; Source assignments for altddio_out3:inst6|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-; SYNCHRONIZER_IDENTIFICATION ; OFF ; - ; - ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------+
-; Source assignments for altddio_out3:inst8|altddio_out:altddio_out_component ;
-+---------------------------+-------------+------+----------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------------+------+----------------------------+
-; ADV_NETLIST_OPT_ALLOWED ; NEVER_ALLOW ; - ; - ;
-; PRESERVE_REGISTER ; ON ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; LOW ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; HIGH ; - ; mux ;
-; SUPPRESS_DA_RULE_INTERNAL ; C104 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; C106 ; - ; - ;
-+---------------------------+-------------+------+----------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------+
-; Source assignments for altddio_out3:inst8|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-; SYNCHRONIZER_IDENTIFICATION ; OFF ; - ; - ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------+
-; Source assignments for altddio_out3:inst9|altddio_out:altddio_out_component ;
-+---------------------------+-------------+------+----------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------+-------------+------+----------------------------+
-; ADV_NETLIST_OPT_ALLOWED ; NEVER_ALLOW ; - ; - ;
-; PRESERVE_REGISTER ; ON ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; LOW ; - ; output_cell_L ;
-; DDIO_OUTPUT_REGISTER ; HIGH ; - ; mux ;
-; SUPPRESS_DA_RULE_INTERNAL ; C104 ; - ; - ;
-; SUPPRESS_DA_RULE_INTERNAL ; C106 ; - ; - ;
-+---------------------------+-------------+------+----------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------+
-; Source assignments for altddio_out3:inst9|altddio_out:altddio_out_component|ddio_out_31f:auto_generated ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-; Assignment ; Value ; From ; To ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-; SYNCHRONIZER_IDENTIFICATION ; OFF ; - ; - ;
-+-----------------------------+-------+------+------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll1:inst|altpll:altpll_component ;
-+-------------------------------+--------------------+------------------------------+
-; Parameter Name ; Value ; Type ;
-+-------------------------------+--------------------+------------------------------+
-; OPERATION_MODE ; SOURCE_SYNCHRONOUS ; Untyped ;
-; PLL_TYPE ; AUTO ; Untyped ;
-; QUALIFY_CONF_DONE ; OFF ; Untyped ;
-; COMPENSATE_CLOCK ; CLK0 ; Untyped ;
-; SCAN_CHAIN ; LONG ; Untyped ;
-; PRIMARY_CLOCK ; INCLK0 ; Untyped ;
-; INCLK0_INPUT_FREQUENCY ; 30303 ; Signed Integer ;
-; INCLK1_INPUT_FREQUENCY ; 0 ; Untyped ;
-; GATE_LOCK_SIGNAL ; NO ; Untyped ;
-; GATE_LOCK_COUNTER ; 0 ; Untyped ;
-; LOCK_HIGH ; 1 ; Untyped ;
-; LOCK_LOW ; 1 ; Untyped ;
-; VALID_LOCK_MULTIPLIER ; 1 ; Untyped ;
-; INVALID_LOCK_MULTIPLIER ; 5 ; Untyped ;
-; SWITCH_OVER_ON_LOSSCLK ; OFF ; Untyped ;
-; SWITCH_OVER_ON_GATED_LOCK ; OFF ; Untyped ;
-; ENABLE_SWITCH_OVER_COUNTER ; OFF ; Untyped ;
-; SKIP_VCO ; OFF ; Untyped ;
-; SWITCH_OVER_COUNTER ; 0 ; Untyped ;
-; SWITCH_OVER_TYPE ; AUTO ; Untyped ;
-; FEEDBACK_SOURCE ; EXTCLK0 ; Untyped ;
-; BANDWIDTH ; 0 ; Untyped ;
-; BANDWIDTH_TYPE ; AUTO ; Untyped ;
-; SPREAD_FREQUENCY ; 0 ; Untyped ;
-; DOWN_SPREAD ; 0 ; Untyped ;
-; SELF_RESET_ON_GATED_LOSS_LOCK ; OFF ; Untyped ;
-; SELF_RESET_ON_LOSS_LOCK ; OFF ; Untyped ;
-; CLK9_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK8_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK7_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK6_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK5_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK4_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK3_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK2_MULTIPLY_BY ; 67 ; Signed Integer ;
-; CLK1_MULTIPLY_BY ; 67 ; Signed Integer ;
-; CLK0_MULTIPLY_BY ; 1 ; Signed Integer ;
-; CLK9_DIVIDE_BY ; 0 ; Untyped ;
-; CLK8_DIVIDE_BY ; 0 ; Untyped ;
-; CLK7_DIVIDE_BY ; 0 ; Untyped ;
-; CLK6_DIVIDE_BY ; 0 ; Untyped ;
-; CLK5_DIVIDE_BY ; 1 ; Untyped ;
-; CLK4_DIVIDE_BY ; 1 ; Untyped ;
-; CLK3_DIVIDE_BY ; 1 ; Untyped ;
-; CLK2_DIVIDE_BY ; 90 ; Signed Integer ;
-; CLK1_DIVIDE_BY ; 900 ; Signed Integer ;
-; CLK0_DIVIDE_BY ; 66 ; Signed Integer ;
-; CLK9_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK8_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK7_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK6_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK5_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK4_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK3_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK2_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK1_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK0_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK5_TIME_DELAY ; 0 ; Untyped ;
-; CLK4_TIME_DELAY ; 0 ; Untyped ;
-; CLK3_TIME_DELAY ; 0 ; Untyped ;
-; CLK2_TIME_DELAY ; 0 ; Untyped ;
-; CLK1_TIME_DELAY ; 0 ; Untyped ;
-; CLK0_TIME_DELAY ; 0 ; Untyped ;
-; CLK9_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK8_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK7_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK6_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK5_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK4_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK3_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK2_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK1_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK0_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK9_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK8_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK7_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK6_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK5_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK4_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK3_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK2_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK1_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK0_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK9_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK8_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK7_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK6_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK5_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK4_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK3_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK2_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK1_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK0_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; LOCK_WINDOW_UI ; 0.05 ; Untyped ;
-; LOCK_WINDOW_UI_BITS ; UNUSED ; Untyped ;
-; VCO_RANGE_DETECTOR_LOW_BITS ; UNUSED ; Untyped ;
-; VCO_RANGE_DETECTOR_HIGH_BITS ; UNUSED ; Untyped ;
-; DPA_MULTIPLY_BY ; 0 ; Untyped ;
-; DPA_DIVIDE_BY ; 1 ; Untyped ;
-; DPA_DIVIDER ; 0 ; Untyped ;
-; EXTCLK3_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK2_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK1_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK0_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK3_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK2_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK1_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK0_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK3_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK2_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK1_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK0_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK3_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK2_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK1_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK0_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK3_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK2_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK1_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK0_DUTY_CYCLE ; 50 ; Untyped ;
-; VCO_MULTIPLY_BY ; 0 ; Untyped ;
-; VCO_DIVIDE_BY ; 0 ; Untyped ;
-; SCLKOUT0_PHASE_SHIFT ; 0 ; Untyped ;
-; SCLKOUT1_PHASE_SHIFT ; 0 ; Untyped ;
-; VCO_MIN ; 0 ; Untyped ;
-; VCO_MAX ; 0 ; Untyped ;
-; VCO_CENTER ; 0 ; Untyped ;
-; PFD_MIN ; 0 ; Untyped ;
-; PFD_MAX ; 0 ; Untyped ;
-; M_INITIAL ; 0 ; Untyped ;
-; M ; 0 ; Untyped ;
-; N ; 1 ; Untyped ;
-; M2 ; 1 ; Untyped ;
-; N2 ; 1 ; Untyped ;
-; SS ; 1 ; Untyped ;
-; C0_HIGH ; 0 ; Untyped ;
-; C1_HIGH ; 0 ; Untyped ;
-; C2_HIGH ; 0 ; Untyped ;
-; C3_HIGH ; 0 ; Untyped ;
-; C4_HIGH ; 0 ; Untyped ;
-; C5_HIGH ; 0 ; Untyped ;
-; C6_HIGH ; 0 ; Untyped ;
-; C7_HIGH ; 0 ; Untyped ;
-; C8_HIGH ; 0 ; Untyped ;
-; C9_HIGH ; 0 ; Untyped ;
-; C0_LOW ; 0 ; Untyped ;
-; C1_LOW ; 0 ; Untyped ;
-; C2_LOW ; 0 ; Untyped ;
-; C3_LOW ; 0 ; Untyped ;
-; C4_LOW ; 0 ; Untyped ;
-; C5_LOW ; 0 ; Untyped ;
-; C6_LOW ; 0 ; Untyped ;
-; C7_LOW ; 0 ; Untyped ;
-; C8_LOW ; 0 ; Untyped ;
-; C9_LOW ; 0 ; Untyped ;
-; C0_INITIAL ; 0 ; Untyped ;
-; C1_INITIAL ; 0 ; Untyped ;
-; C2_INITIAL ; 0 ; Untyped ;
-; C3_INITIAL ; 0 ; Untyped ;
-; C4_INITIAL ; 0 ; Untyped ;
-; C5_INITIAL ; 0 ; Untyped ;
-; C6_INITIAL ; 0 ; Untyped ;
-; C7_INITIAL ; 0 ; Untyped ;
-; C8_INITIAL ; 0 ; Untyped ;
-; C9_INITIAL ; 0 ; Untyped ;
-; C0_MODE ; BYPASS ; Untyped ;
-; C1_MODE ; BYPASS ; Untyped ;
-; C2_MODE ; BYPASS ; Untyped ;
-; C3_MODE ; BYPASS ; Untyped ;
-; C4_MODE ; BYPASS ; Untyped ;
-; C5_MODE ; BYPASS ; Untyped ;
-; C6_MODE ; BYPASS ; Untyped ;
-; C7_MODE ; BYPASS ; Untyped ;
-; C8_MODE ; BYPASS ; Untyped ;
-; C9_MODE ; BYPASS ; Untyped ;
-; C0_PH ; 0 ; Untyped ;
-; C1_PH ; 0 ; Untyped ;
-; C2_PH ; 0 ; Untyped ;
-; C3_PH ; 0 ; Untyped ;
-; C4_PH ; 0 ; Untyped ;
-; C5_PH ; 0 ; Untyped ;
-; C6_PH ; 0 ; Untyped ;
-; C7_PH ; 0 ; Untyped ;
-; C8_PH ; 0 ; Untyped ;
-; C9_PH ; 0 ; Untyped ;
-; L0_HIGH ; 1 ; Untyped ;
-; L1_HIGH ; 1 ; Untyped ;
-; G0_HIGH ; 1 ; Untyped ;
-; G1_HIGH ; 1 ; Untyped ;
-; G2_HIGH ; 1 ; Untyped ;
-; G3_HIGH ; 1 ; Untyped ;
-; E0_HIGH ; 1 ; Untyped ;
-; E1_HIGH ; 1 ; Untyped ;
-; E2_HIGH ; 1 ; Untyped ;
-; E3_HIGH ; 1 ; Untyped ;
-; L0_LOW ; 1 ; Untyped ;
-; L1_LOW ; 1 ; Untyped ;
-; G0_LOW ; 1 ; Untyped ;
-; G1_LOW ; 1 ; Untyped ;
-; G2_LOW ; 1 ; Untyped ;
-; G3_LOW ; 1 ; Untyped ;
-; E0_LOW ; 1 ; Untyped ;
-; E1_LOW ; 1 ; Untyped ;
-; E2_LOW ; 1 ; Untyped ;
-; E3_LOW ; 1 ; Untyped ;
-; L0_INITIAL ; 1 ; Untyped ;
-; L1_INITIAL ; 1 ; Untyped ;
-; G0_INITIAL ; 1 ; Untyped ;
-; G1_INITIAL ; 1 ; Untyped ;
-; G2_INITIAL ; 1 ; Untyped ;
-; G3_INITIAL ; 1 ; Untyped ;
-; E0_INITIAL ; 1 ; Untyped ;
-; E1_INITIAL ; 1 ; Untyped ;
-; E2_INITIAL ; 1 ; Untyped ;
-; E3_INITIAL ; 1 ; Untyped ;
-; L0_MODE ; BYPASS ; Untyped ;
-; L1_MODE ; BYPASS ; Untyped ;
-; G0_MODE ; BYPASS ; Untyped ;
-; G1_MODE ; BYPASS ; Untyped ;
-; G2_MODE ; BYPASS ; Untyped ;
-; G3_MODE ; BYPASS ; Untyped ;
-; E0_MODE ; BYPASS ; Untyped ;
-; E1_MODE ; BYPASS ; Untyped ;
-; E2_MODE ; BYPASS ; Untyped ;
-; E3_MODE ; BYPASS ; Untyped ;
-; L0_PH ; 0 ; Untyped ;
-; L1_PH ; 0 ; Untyped ;
-; G0_PH ; 0 ; Untyped ;
-; G1_PH ; 0 ; Untyped ;
-; G2_PH ; 0 ; Untyped ;
-; G3_PH ; 0 ; Untyped ;
-; E0_PH ; 0 ; Untyped ;
-; E1_PH ; 0 ; Untyped ;
-; E2_PH ; 0 ; Untyped ;
-; E3_PH ; 0 ; Untyped ;
-; M_PH ; 0 ; Untyped ;
-; C1_USE_CASC_IN ; OFF ; Untyped ;
-; C2_USE_CASC_IN ; OFF ; Untyped ;
-; C3_USE_CASC_IN ; OFF ; Untyped ;
-; C4_USE_CASC_IN ; OFF ; Untyped ;
-; C5_USE_CASC_IN ; OFF ; Untyped ;
-; C6_USE_CASC_IN ; OFF ; Untyped ;
-; C7_USE_CASC_IN ; OFF ; Untyped ;
-; C8_USE_CASC_IN ; OFF ; Untyped ;
-; C9_USE_CASC_IN ; OFF ; Untyped ;
-; CLK0_COUNTER ; G0 ; Untyped ;
-; CLK1_COUNTER ; G0 ; Untyped ;
-; CLK2_COUNTER ; G0 ; Untyped ;
-; CLK3_COUNTER ; G0 ; Untyped ;
-; CLK4_COUNTER ; G0 ; Untyped ;
-; CLK5_COUNTER ; G0 ; Untyped ;
-; CLK6_COUNTER ; E0 ; Untyped ;
-; CLK7_COUNTER ; E1 ; Untyped ;
-; CLK8_COUNTER ; E2 ; Untyped ;
-; CLK9_COUNTER ; E3 ; Untyped ;
-; L0_TIME_DELAY ; 0 ; Untyped ;
-; L1_TIME_DELAY ; 0 ; Untyped ;
-; G0_TIME_DELAY ; 0 ; Untyped ;
-; G1_TIME_DELAY ; 0 ; Untyped ;
-; G2_TIME_DELAY ; 0 ; Untyped ;
-; G3_TIME_DELAY ; 0 ; Untyped ;
-; E0_TIME_DELAY ; 0 ; Untyped ;
-; E1_TIME_DELAY ; 0 ; Untyped ;
-; E2_TIME_DELAY ; 0 ; Untyped ;
-; E3_TIME_DELAY ; 0 ; Untyped ;
-; M_TIME_DELAY ; 0 ; Untyped ;
-; N_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK3_COUNTER ; E3 ; Untyped ;
-; EXTCLK2_COUNTER ; E2 ; Untyped ;
-; EXTCLK1_COUNTER ; E1 ; Untyped ;
-; EXTCLK0_COUNTER ; E0 ; Untyped ;
-; ENABLE0_COUNTER ; L0 ; Untyped ;
-; ENABLE1_COUNTER ; L0 ; Untyped ;
-; CHARGE_PUMP_CURRENT ; 2 ; Untyped ;
-; LOOP_FILTER_R ; 1.000000 ; Untyped ;
-; LOOP_FILTER_C ; 5 ; Untyped ;
-; CHARGE_PUMP_CURRENT_BITS ; 9999 ; Untyped ;
-; LOOP_FILTER_R_BITS ; 9999 ; Untyped ;
-; LOOP_FILTER_C_BITS ; 9999 ; Untyped ;
-; VCO_POST_SCALE ; 0 ; Untyped ;
-; CLK2_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; CLK1_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; CLK0_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; PORT_CLKENA0 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA1 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA2 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA3 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA4 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA5 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLKENA0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA2 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA3 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLK0 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK1 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK2 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK3 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKBAD0 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKBAD1 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK0 ; PORT_USED ; Untyped ;
-; PORT_CLK1 ; PORT_USED ; Untyped ;
-; PORT_CLK2 ; PORT_USED ; Untyped ;
-; PORT_CLK3 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK4 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK5 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK6 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK7 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK8 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK9 ; PORT_UNUSED ; Untyped ;
-; PORT_SCANDATA ; PORT_UNUSED ; Untyped ;
-; PORT_SCANDATAOUT ; PORT_UNUSED ; Untyped ;
-; PORT_SCANDONE ; PORT_UNUSED ; Untyped ;
-; PORT_SCLKOUT1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_SCLKOUT0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_ACTIVECLOCK ; PORT_UNUSED ; Untyped ;
-; PORT_CLKLOSS ; PORT_UNUSED ; Untyped ;
-; PORT_INCLK1 ; PORT_UNUSED ; Untyped ;
-; PORT_INCLK0 ; PORT_USED ; Untyped ;
-; PORT_FBIN ; PORT_UNUSED ; Untyped ;
-; PORT_PLLENA ; PORT_UNUSED ; Untyped ;
-; PORT_CLKSWITCH ; PORT_UNUSED ; Untyped ;
-; PORT_ARESET ; PORT_UNUSED ; Untyped ;
-; PORT_PFDENA ; PORT_UNUSED ; Untyped ;
-; PORT_SCANCLK ; PORT_UNUSED ; Untyped ;
-; PORT_SCANACLR ; PORT_UNUSED ; Untyped ;
-; PORT_SCANREAD ; PORT_UNUSED ; Untyped ;
-; PORT_SCANWRITE ; PORT_UNUSED ; Untyped ;
-; PORT_ENABLE0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_ENABLE1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_LOCKED ; PORT_USED ; Untyped ;
-; PORT_CONFIGUPDATE ; PORT_UNUSED ; Untyped ;
-; PORT_FBOUT ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_PHASEDONE ; PORT_UNUSED ; Untyped ;
-; PORT_PHASESTEP ; PORT_UNUSED ; Untyped ;
-; PORT_PHASEUPDOWN ; PORT_UNUSED ; Untyped ;
-; PORT_SCANCLKENA ; PORT_UNUSED ; Untyped ;
-; PORT_PHASECOUNTERSELECT ; PORT_UNUSED ; Untyped ;
-; PORT_VCOOVERRANGE ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_VCOUNDERRANGE ; PORT_CONNECTIVITY ; Untyped ;
-; M_TEST_SOURCE ; 5 ; Untyped ;
-; C0_TEST_SOURCE ; 5 ; Untyped ;
-; C1_TEST_SOURCE ; 5 ; Untyped ;
-; C2_TEST_SOURCE ; 5 ; Untyped ;
-; C3_TEST_SOURCE ; 5 ; Untyped ;
-; C4_TEST_SOURCE ; 5 ; Untyped ;
-; C5_TEST_SOURCE ; 5 ; Untyped ;
-; C6_TEST_SOURCE ; 5 ; Untyped ;
-; C7_TEST_SOURCE ; 5 ; Untyped ;
-; C8_TEST_SOURCE ; 5 ; Untyped ;
-; C9_TEST_SOURCE ; 5 ; Untyped ;
-; CBXI_PARAMETER ; altpll_pul2 ; Untyped ;
-; VCO_FREQUENCY_CONTROL ; AUTO ; Untyped ;
-; VCO_PHASE_SHIFT_STEP ; 0 ; Untyped ;
-; WIDTH_CLOCK ; 5 ; Signed Integer ;
-; WIDTH_PHASECOUNTERSELECT ; 4 ; Untyped ;
-; USING_FBMIMICBIDIR_PORT ; OFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; SCAN_CHAIN_MIF_FILE ; UNUSED ; Untyped ;
-; SIM_GATE_LOCK_DEVICE_BEHAVIOR ; OFF ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+-------------------------------+--------------------+------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component ;
-+--------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
-; ACF_DISABLE_MLAB_RAM_USE ; FALSE ; Untyped ;
-; ADD_RAM_OUTPUT_REGISTER ; OFF ; Untyped ;
-; ADD_USEDW_MSB_BIT ; OFF ; Untyped ;
-; CLOCKS_ARE_SYNCHRONIZED ; FALSE ; Untyped ;
-; DELAY_RDUSEDW ; 1 ; Untyped ;
-; DELAY_WRUSEDW ; 1 ; Untyped ;
-; LPM_NUMWORDS ; 1024 ; Signed Integer ;
-; LPM_SHOWAHEAD ; OFF ; Untyped ;
-; LPM_WIDTH ; 8 ; Signed Integer ;
-; LPM_WIDTH_R ; 32 ; Signed Integer ;
-; LPM_WIDTHU ; 10 ; Signed Integer ;
-; LPM_WIDTHU_R ; 8 ; Signed Integer ;
-; MAXIMIZE_SPEED ; 5 ; Untyped ;
-; OVERFLOW_CHECKING ; ON ; Untyped ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; RDSYNC_DELAYPIPE ; 5 ; Signed Integer ;
-; UNDERFLOW_CHECKING ; ON ; Untyped ;
-; USE_EAB ; ON ; Untyped ;
-; WRITE_ACLR_SYNCH ; OFF ; Untyped ;
-; WRSYNC_DELAYPIPE ; 5 ; Signed Integer ;
-; CBXI_PARAMETER ; dcfifo_0hh1 ; Untyped ;
-+--------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component ;
-+--------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
-; ACF_DISABLE_MLAB_RAM_USE ; FALSE ; Untyped ;
-; ADD_RAM_OUTPUT_REGISTER ; OFF ; Untyped ;
-; ADD_USEDW_MSB_BIT ; OFF ; Untyped ;
-; CLOCKS_ARE_SYNCHRONIZED ; FALSE ; Untyped ;
-; DELAY_RDUSEDW ; 1 ; Untyped ;
-; DELAY_WRUSEDW ; 1 ; Untyped ;
-; LPM_NUMWORDS ; 256 ; Signed Integer ;
-; LPM_SHOWAHEAD ; OFF ; Untyped ;
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_WIDTH_R ; 8 ; Signed Integer ;
-; LPM_WIDTHU ; 8 ; Signed Integer ;
-; LPM_WIDTHU_R ; 10 ; Signed Integer ;
-; MAXIMIZE_SPEED ; 5 ; Untyped ;
-; OVERFLOW_CHECKING ; ON ; Untyped ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; RDSYNC_DELAYPIPE ; 5 ; Signed Integer ;
-; UNDERFLOW_CHECKING ; ON ; Untyped ;
-; USE_EAB ; ON ; Untyped ;
-; WRITE_ACLR_SYNCH ; OFF ; Untyped ;
-; WRSYNC_DELAYPIPE ; 5 ; Signed Integer ;
-; CBXI_PARAMETER ; dcfifo_3fh1 ; Untyped ;
-+--------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL ;
-+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------+
-; TOP ; 152 ; Signed Integer ;
-; BOTTOM ; 104 ; Signed Integer ;
-; PHASE_CORR ; 75 ; Signed Integer ;
-+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll3:inst13|altpll:altpll_component ;
-+-------------------------------+--------------------+--------------------------------+
-; Parameter Name ; Value ; Type ;
-+-------------------------------+--------------------+--------------------------------+
-; OPERATION_MODE ; SOURCE_SYNCHRONOUS ; Untyped ;
-; PLL_TYPE ; AUTO ; Untyped ;
-; QUALIFY_CONF_DONE ; OFF ; Untyped ;
-; COMPENSATE_CLOCK ; CLK1 ; Untyped ;
-; SCAN_CHAIN ; LONG ; Untyped ;
-; PRIMARY_CLOCK ; INCLK0 ; Untyped ;
-; INCLK0_INPUT_FREQUENCY ; 30303 ; Signed Integer ;
-; INCLK1_INPUT_FREQUENCY ; 0 ; Untyped ;
-; GATE_LOCK_SIGNAL ; NO ; Untyped ;
-; GATE_LOCK_COUNTER ; 0 ; Untyped ;
-; LOCK_HIGH ; 1 ; Untyped ;
-; LOCK_LOW ; 1 ; Untyped ;
-; VALID_LOCK_MULTIPLIER ; 1 ; Untyped ;
-; INVALID_LOCK_MULTIPLIER ; 5 ; Untyped ;
-; SWITCH_OVER_ON_LOSSCLK ; OFF ; Untyped ;
-; SWITCH_OVER_ON_GATED_LOCK ; OFF ; Untyped ;
-; ENABLE_SWITCH_OVER_COUNTER ; OFF ; Untyped ;
-; SKIP_VCO ; OFF ; Untyped ;
-; SWITCH_OVER_COUNTER ; 0 ; Untyped ;
-; SWITCH_OVER_TYPE ; AUTO ; Untyped ;
-; FEEDBACK_SOURCE ; EXTCLK0 ; Untyped ;
-; BANDWIDTH ; 0 ; Untyped ;
-; BANDWIDTH_TYPE ; AUTO ; Untyped ;
-; SPREAD_FREQUENCY ; 0 ; Untyped ;
-; DOWN_SPREAD ; 0 ; Untyped ;
-; SELF_RESET_ON_GATED_LOSS_LOCK ; OFF ; Untyped ;
-; SELF_RESET_ON_LOSS_LOCK ; OFF ; Untyped ;
-; CLK9_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK8_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK7_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK6_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK5_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK4_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK3_MULTIPLY_BY ; 16 ; Signed Integer ;
-; CLK2_MULTIPLY_BY ; 25 ; Signed Integer ;
-; CLK1_MULTIPLY_BY ; 16 ; Signed Integer ;
-; CLK0_MULTIPLY_BY ; 2 ; Signed Integer ;
-; CLK9_DIVIDE_BY ; 0 ; Untyped ;
-; CLK8_DIVIDE_BY ; 0 ; Untyped ;
-; CLK7_DIVIDE_BY ; 0 ; Untyped ;
-; CLK6_DIVIDE_BY ; 0 ; Untyped ;
-; CLK5_DIVIDE_BY ; 1 ; Untyped ;
-; CLK4_DIVIDE_BY ; 1 ; Untyped ;
-; CLK3_DIVIDE_BY ; 11 ; Signed Integer ;
-; CLK2_DIVIDE_BY ; 33 ; Signed Integer ;
-; CLK1_DIVIDE_BY ; 33 ; Signed Integer ;
-; CLK0_DIVIDE_BY ; 33 ; Signed Integer ;
-; CLK9_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK8_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK7_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK6_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK5_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK4_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK3_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK2_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK1_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK0_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK5_TIME_DELAY ; 0 ; Untyped ;
-; CLK4_TIME_DELAY ; 0 ; Untyped ;
-; CLK3_TIME_DELAY ; 0 ; Untyped ;
-; CLK2_TIME_DELAY ; 0 ; Untyped ;
-; CLK1_TIME_DELAY ; 0 ; Untyped ;
-; CLK0_TIME_DELAY ; 0 ; Untyped ;
-; CLK9_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK8_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK7_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK6_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK5_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK4_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK3_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK2_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK1_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK0_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK9_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK8_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK7_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK6_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK5_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK4_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK3_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK2_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK1_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK0_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK9_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK8_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK7_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK6_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK5_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK4_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK3_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK2_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK1_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK0_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; LOCK_WINDOW_UI ; 0.05 ; Untyped ;
-; LOCK_WINDOW_UI_BITS ; UNUSED ; Untyped ;
-; VCO_RANGE_DETECTOR_LOW_BITS ; UNUSED ; Untyped ;
-; VCO_RANGE_DETECTOR_HIGH_BITS ; UNUSED ; Untyped ;
-; DPA_MULTIPLY_BY ; 0 ; Untyped ;
-; DPA_DIVIDE_BY ; 1 ; Untyped ;
-; DPA_DIVIDER ; 0 ; Untyped ;
-; EXTCLK3_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK2_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK1_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK0_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK3_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK2_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK1_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK0_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK3_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK2_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK1_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK0_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK3_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK2_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK1_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK0_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK3_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK2_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK1_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK0_DUTY_CYCLE ; 50 ; Untyped ;
-; VCO_MULTIPLY_BY ; 0 ; Untyped ;
-; VCO_DIVIDE_BY ; 0 ; Untyped ;
-; SCLKOUT0_PHASE_SHIFT ; 0 ; Untyped ;
-; SCLKOUT1_PHASE_SHIFT ; 0 ; Untyped ;
-; VCO_MIN ; 0 ; Untyped ;
-; VCO_MAX ; 0 ; Untyped ;
-; VCO_CENTER ; 0 ; Untyped ;
-; PFD_MIN ; 0 ; Untyped ;
-; PFD_MAX ; 0 ; Untyped ;
-; M_INITIAL ; 0 ; Untyped ;
-; M ; 0 ; Untyped ;
-; N ; 1 ; Untyped ;
-; M2 ; 1 ; Untyped ;
-; N2 ; 1 ; Untyped ;
-; SS ; 1 ; Untyped ;
-; C0_HIGH ; 0 ; Untyped ;
-; C1_HIGH ; 0 ; Untyped ;
-; C2_HIGH ; 0 ; Untyped ;
-; C3_HIGH ; 0 ; Untyped ;
-; C4_HIGH ; 0 ; Untyped ;
-; C5_HIGH ; 0 ; Untyped ;
-; C6_HIGH ; 0 ; Untyped ;
-; C7_HIGH ; 0 ; Untyped ;
-; C8_HIGH ; 0 ; Untyped ;
-; C9_HIGH ; 0 ; Untyped ;
-; C0_LOW ; 0 ; Untyped ;
-; C1_LOW ; 0 ; Untyped ;
-; C2_LOW ; 0 ; Untyped ;
-; C3_LOW ; 0 ; Untyped ;
-; C4_LOW ; 0 ; Untyped ;
-; C5_LOW ; 0 ; Untyped ;
-; C6_LOW ; 0 ; Untyped ;
-; C7_LOW ; 0 ; Untyped ;
-; C8_LOW ; 0 ; Untyped ;
-; C9_LOW ; 0 ; Untyped ;
-; C0_INITIAL ; 0 ; Untyped ;
-; C1_INITIAL ; 0 ; Untyped ;
-; C2_INITIAL ; 0 ; Untyped ;
-; C3_INITIAL ; 0 ; Untyped ;
-; C4_INITIAL ; 0 ; Untyped ;
-; C5_INITIAL ; 0 ; Untyped ;
-; C6_INITIAL ; 0 ; Untyped ;
-; C7_INITIAL ; 0 ; Untyped ;
-; C8_INITIAL ; 0 ; Untyped ;
-; C9_INITIAL ; 0 ; Untyped ;
-; C0_MODE ; BYPASS ; Untyped ;
-; C1_MODE ; BYPASS ; Untyped ;
-; C2_MODE ; BYPASS ; Untyped ;
-; C3_MODE ; BYPASS ; Untyped ;
-; C4_MODE ; BYPASS ; Untyped ;
-; C5_MODE ; BYPASS ; Untyped ;
-; C6_MODE ; BYPASS ; Untyped ;
-; C7_MODE ; BYPASS ; Untyped ;
-; C8_MODE ; BYPASS ; Untyped ;
-; C9_MODE ; BYPASS ; Untyped ;
-; C0_PH ; 0 ; Untyped ;
-; C1_PH ; 0 ; Untyped ;
-; C2_PH ; 0 ; Untyped ;
-; C3_PH ; 0 ; Untyped ;
-; C4_PH ; 0 ; Untyped ;
-; C5_PH ; 0 ; Untyped ;
-; C6_PH ; 0 ; Untyped ;
-; C7_PH ; 0 ; Untyped ;
-; C8_PH ; 0 ; Untyped ;
-; C9_PH ; 0 ; Untyped ;
-; L0_HIGH ; 1 ; Untyped ;
-; L1_HIGH ; 1 ; Untyped ;
-; G0_HIGH ; 1 ; Untyped ;
-; G1_HIGH ; 1 ; Untyped ;
-; G2_HIGH ; 1 ; Untyped ;
-; G3_HIGH ; 1 ; Untyped ;
-; E0_HIGH ; 1 ; Untyped ;
-; E1_HIGH ; 1 ; Untyped ;
-; E2_HIGH ; 1 ; Untyped ;
-; E3_HIGH ; 1 ; Untyped ;
-; L0_LOW ; 1 ; Untyped ;
-; L1_LOW ; 1 ; Untyped ;
-; G0_LOW ; 1 ; Untyped ;
-; G1_LOW ; 1 ; Untyped ;
-; G2_LOW ; 1 ; Untyped ;
-; G3_LOW ; 1 ; Untyped ;
-; E0_LOW ; 1 ; Untyped ;
-; E1_LOW ; 1 ; Untyped ;
-; E2_LOW ; 1 ; Untyped ;
-; E3_LOW ; 1 ; Untyped ;
-; L0_INITIAL ; 1 ; Untyped ;
-; L1_INITIAL ; 1 ; Untyped ;
-; G0_INITIAL ; 1 ; Untyped ;
-; G1_INITIAL ; 1 ; Untyped ;
-; G2_INITIAL ; 1 ; Untyped ;
-; G3_INITIAL ; 1 ; Untyped ;
-; E0_INITIAL ; 1 ; Untyped ;
-; E1_INITIAL ; 1 ; Untyped ;
-; E2_INITIAL ; 1 ; Untyped ;
-; E3_INITIAL ; 1 ; Untyped ;
-; L0_MODE ; BYPASS ; Untyped ;
-; L1_MODE ; BYPASS ; Untyped ;
-; G0_MODE ; BYPASS ; Untyped ;
-; G1_MODE ; BYPASS ; Untyped ;
-; G2_MODE ; BYPASS ; Untyped ;
-; G3_MODE ; BYPASS ; Untyped ;
-; E0_MODE ; BYPASS ; Untyped ;
-; E1_MODE ; BYPASS ; Untyped ;
-; E2_MODE ; BYPASS ; Untyped ;
-; E3_MODE ; BYPASS ; Untyped ;
-; L0_PH ; 0 ; Untyped ;
-; L1_PH ; 0 ; Untyped ;
-; G0_PH ; 0 ; Untyped ;
-; G1_PH ; 0 ; Untyped ;
-; G2_PH ; 0 ; Untyped ;
-; G3_PH ; 0 ; Untyped ;
-; E0_PH ; 0 ; Untyped ;
-; E1_PH ; 0 ; Untyped ;
-; E2_PH ; 0 ; Untyped ;
-; E3_PH ; 0 ; Untyped ;
-; M_PH ; 0 ; Untyped ;
-; C1_USE_CASC_IN ; OFF ; Untyped ;
-; C2_USE_CASC_IN ; OFF ; Untyped ;
-; C3_USE_CASC_IN ; OFF ; Untyped ;
-; C4_USE_CASC_IN ; OFF ; Untyped ;
-; C5_USE_CASC_IN ; OFF ; Untyped ;
-; C6_USE_CASC_IN ; OFF ; Untyped ;
-; C7_USE_CASC_IN ; OFF ; Untyped ;
-; C8_USE_CASC_IN ; OFF ; Untyped ;
-; C9_USE_CASC_IN ; OFF ; Untyped ;
-; CLK0_COUNTER ; G0 ; Untyped ;
-; CLK1_COUNTER ; G0 ; Untyped ;
-; CLK2_COUNTER ; G0 ; Untyped ;
-; CLK3_COUNTER ; G0 ; Untyped ;
-; CLK4_COUNTER ; G0 ; Untyped ;
-; CLK5_COUNTER ; G0 ; Untyped ;
-; CLK6_COUNTER ; E0 ; Untyped ;
-; CLK7_COUNTER ; E1 ; Untyped ;
-; CLK8_COUNTER ; E2 ; Untyped ;
-; CLK9_COUNTER ; E3 ; Untyped ;
-; L0_TIME_DELAY ; 0 ; Untyped ;
-; L1_TIME_DELAY ; 0 ; Untyped ;
-; G0_TIME_DELAY ; 0 ; Untyped ;
-; G1_TIME_DELAY ; 0 ; Untyped ;
-; G2_TIME_DELAY ; 0 ; Untyped ;
-; G3_TIME_DELAY ; 0 ; Untyped ;
-; E0_TIME_DELAY ; 0 ; Untyped ;
-; E1_TIME_DELAY ; 0 ; Untyped ;
-; E2_TIME_DELAY ; 0 ; Untyped ;
-; E3_TIME_DELAY ; 0 ; Untyped ;
-; M_TIME_DELAY ; 0 ; Untyped ;
-; N_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK3_COUNTER ; E3 ; Untyped ;
-; EXTCLK2_COUNTER ; E2 ; Untyped ;
-; EXTCLK1_COUNTER ; E1 ; Untyped ;
-; EXTCLK0_COUNTER ; E0 ; Untyped ;
-; ENABLE0_COUNTER ; L0 ; Untyped ;
-; ENABLE1_COUNTER ; L0 ; Untyped ;
-; CHARGE_PUMP_CURRENT ; 2 ; Untyped ;
-; LOOP_FILTER_R ; 1.000000 ; Untyped ;
-; LOOP_FILTER_C ; 5 ; Untyped ;
-; CHARGE_PUMP_CURRENT_BITS ; 9999 ; Untyped ;
-; LOOP_FILTER_R_BITS ; 9999 ; Untyped ;
-; LOOP_FILTER_C_BITS ; 9999 ; Untyped ;
-; VCO_POST_SCALE ; 0 ; Untyped ;
-; CLK2_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; CLK1_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; CLK0_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; PORT_CLKENA0 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA1 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA2 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA3 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA4 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA5 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLKENA0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA2 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA3 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLK0 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK1 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK2 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK3 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKBAD0 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKBAD1 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK0 ; PORT_USED ; Untyped ;
-; PORT_CLK1 ; PORT_USED ; Untyped ;
-; PORT_CLK2 ; PORT_USED ; Untyped ;
-; PORT_CLK3 ; PORT_USED ; Untyped ;
-; PORT_CLK4 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK5 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK6 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK7 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK8 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK9 ; PORT_UNUSED ; Untyped ;
-; PORT_SCANDATA ; PORT_UNUSED ; Untyped ;
-; PORT_SCANDATAOUT ; PORT_UNUSED ; Untyped ;
-; PORT_SCANDONE ; PORT_UNUSED ; Untyped ;
-; PORT_SCLKOUT1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_SCLKOUT0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_ACTIVECLOCK ; PORT_UNUSED ; Untyped ;
-; PORT_CLKLOSS ; PORT_UNUSED ; Untyped ;
-; PORT_INCLK1 ; PORT_UNUSED ; Untyped ;
-; PORT_INCLK0 ; PORT_USED ; Untyped ;
-; PORT_FBIN ; PORT_UNUSED ; Untyped ;
-; PORT_PLLENA ; PORT_UNUSED ; Untyped ;
-; PORT_CLKSWITCH ; PORT_UNUSED ; Untyped ;
-; PORT_ARESET ; PORT_UNUSED ; Untyped ;
-; PORT_PFDENA ; PORT_UNUSED ; Untyped ;
-; PORT_SCANCLK ; PORT_UNUSED ; Untyped ;
-; PORT_SCANACLR ; PORT_UNUSED ; Untyped ;
-; PORT_SCANREAD ; PORT_UNUSED ; Untyped ;
-; PORT_SCANWRITE ; PORT_UNUSED ; Untyped ;
-; PORT_ENABLE0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_ENABLE1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_LOCKED ; PORT_UNUSED ; Untyped ;
-; PORT_CONFIGUPDATE ; PORT_UNUSED ; Untyped ;
-; PORT_FBOUT ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_PHASEDONE ; PORT_UNUSED ; Untyped ;
-; PORT_PHASESTEP ; PORT_UNUSED ; Untyped ;
-; PORT_PHASEUPDOWN ; PORT_UNUSED ; Untyped ;
-; PORT_SCANCLKENA ; PORT_UNUSED ; Untyped ;
-; PORT_PHASECOUNTERSELECT ; PORT_UNUSED ; Untyped ;
-; PORT_VCOOVERRANGE ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_VCOUNDERRANGE ; PORT_CONNECTIVITY ; Untyped ;
-; M_TEST_SOURCE ; 5 ; Untyped ;
-; C0_TEST_SOURCE ; 5 ; Untyped ;
-; C1_TEST_SOURCE ; 5 ; Untyped ;
-; C2_TEST_SOURCE ; 5 ; Untyped ;
-; C3_TEST_SOURCE ; 5 ; Untyped ;
-; C4_TEST_SOURCE ; 5 ; Untyped ;
-; C5_TEST_SOURCE ; 5 ; Untyped ;
-; C6_TEST_SOURCE ; 5 ; Untyped ;
-; C7_TEST_SOURCE ; 5 ; Untyped ;
-; C8_TEST_SOURCE ; 5 ; Untyped ;
-; C9_TEST_SOURCE ; 5 ; Untyped ;
-; CBXI_PARAMETER ; altpll_41p2 ; Untyped ;
-; VCO_FREQUENCY_CONTROL ; AUTO ; Untyped ;
-; VCO_PHASE_SHIFT_STEP ; 0 ; Untyped ;
-; WIDTH_CLOCK ; 5 ; Signed Integer ;
-; WIDTH_PHASECOUNTERSELECT ; 4 ; Untyped ;
-; USING_FBMIMICBIDIR_PORT ; OFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; SCAN_CHAIN_MIF_FILE ; UNUSED ; Untyped ;
-; SIM_GATE_LOCK_DEVICE_BEHAVIOR ; OFF ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+-------------------------------+--------------------+--------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00002|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg6:inst89|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+---------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 5 ; Signed Integer ;
-; LPM_DIRECTION ; RIGHT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+------------------------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-+----------------+-------+------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+------------------------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-+----------------+-------+------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component ;
-+-------------------------+-------------+-----------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+-------------------------+-------------+-----------------------------------------------------------------------+
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 128 ; Signed Integer ;
-; LPM_NUMWORDS ; 512 ; Signed Integer ;
-; LPM_WIDTHU ; 9 ; Signed Integer ;
-; LPM_SHOWAHEAD ; OFF ; Untyped ;
-; UNDERFLOW_CHECKING ; OFF ; Untyped ;
-; OVERFLOW_CHECKING ; OFF ; Untyped ;
-; USE_EAB ; ON ; Untyped ;
-; ADD_RAM_OUTPUT_REGISTER ; OFF ; Untyped ;
-; DELAY_RDUSEDW ; 1 ; Untyped ;
-; DELAY_WRUSEDW ; 1 ; Untyped ;
-; RDSYNC_DELAYPIPE ; 6 ; Signed Integer ;
-; WRSYNC_DELAYPIPE ; 6 ; Signed Integer ;
-; CLOCKS_ARE_SYNCHRONIZED ; FALSE ; Untyped ;
-; MAXIMIZE_SPEED ; 5 ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; ADD_USEDW_MSB_BIT ; OFF ; Untyped ;
-; WRITE_ACLR_SYNCH ; ON ; Untyped ;
-; CBXI_PARAMETER ; dcfifo_8fi1 ; Untyped ;
-+-------------------------+-------------+-----------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+---------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 5 ; Signed Integer ;
-; LPM_DIRECTION ; RIGHT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_muxVDM:inst100|LPM_MUX:lpm_mux_component ;
-+------------------------+-------------+---------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 128 ; Signed Integer ;
-; LPM_SIZE ; 16 ; Signed Integer ;
-; LPM_WIDTHS ; 4 ; Signed Integer ;
-; LPM_PIPELINE ; 0 ; Signed Integer ;
-; CBXI_PARAMETER ; mux_bbe ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-+------------------------+-------------+---------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 128 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 128 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+--------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+--------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+--------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+--------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+--------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+--------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+--------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component ;
-+--------------------------+----------------+------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------------+----------------+------------------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH ; 32 ; Signed Integer ;
-; POWER_UP_HIGH ; OFF ; Untyped ;
-; OE_REG ; UNUSED ; Untyped ;
-; extend_oe_disable ; UNUSED ; Untyped ;
-; IMPLEMENT_INPUT_IN_LCELL ; ON ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; ddio_bidir_3jl ; Untyped ;
-+--------------------------+----------------+------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux5:inst22|LPM_MUX:lpm_mux_component ;
-+------------------------+-------------+------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 64 ; Signed Integer ;
-; LPM_SIZE ; 4 ; Signed Integer ;
-; LPM_WIDTHS ; 2 ; Signed Integer ;
-; LPM_PIPELINE ; 0 ; Signed Integer ;
-; CBXI_PARAMETER ; mux_58e ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-+------------------------+-------------+------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff6:inst36|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 128 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_LONG:inst108|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component ;
-+----------------+--------+-------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+--------+-------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-+----------------+--------+-------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_LONG:inst119|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst19|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+---------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 5 ; Signed Integer ;
-; LPM_DIRECTION ; RIGHT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_LONG:inst110|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst18|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_LONG:inst109|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri3:inst66|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 6 ; Signed Integer ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component ;
-+------------------------------------+-----------------+------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+-----------------+------------------------------------------------------------------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; BIDIR_DUAL_PORT ; Untyped ;
-; WIDTH_A ; 6 ; Signed Integer ;
-; WIDTHAD_A ; 8 ; Signed Integer ;
-; NUMWORDS_A ; 256 ; Signed Integer ;
-; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 6 ; Signed Integer ;
-; WIDTHAD_B ; 8 ; Signed Integer ;
-; NUMWORDS_B ; 256 ; Signed Integer ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; OUTDATA_REG_B ; CLOCK1 ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
-; WIDTH_BYTEENA_B ; 1 ; Signed Integer ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; OLD_DATA ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; OLD_DATA ; Untyped ;
-; INIT_FILE ; UNUSED ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_lf92 ; Untyped ;
-+------------------------------------+-----------------+------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-; LPM_DIRECTION ; LEFT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-; LPM_DIRECTION ; LEFT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-; LPM_DIRECTION ; LEFT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-; LPM_DIRECTION ; LEFT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-; LPM_DIRECTION ; LEFT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+----------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_muxDZ:inst62|LPM_MUX:lpm_mux_component ;
-+------------------------+-------------+-------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+-------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 128 ; Signed Integer ;
-; LPM_SIZE ; 2 ; Signed Integer ;
-; LPM_WIDTHS ; 1 ; Signed Integer ;
-; LPM_PIPELINE ; 1 ; Signed Integer ;
-; CBXI_PARAMETER ; mux_dcf ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-+------------------------+-------------+-------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component ;
-+-------------------------+-------------+-----------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+-------------------------+-------------+-----------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; lpm_width ; 128 ; Signed Integer ;
-; LPM_NUMWORDS ; 128 ; Signed Integer ;
-; LPM_WIDTHU ; 7 ; Signed Integer ;
-; LPM_SHOWAHEAD ; ON ; Untyped ;
-; UNDERFLOW_CHECKING ; OFF ; Untyped ;
-; OVERFLOW_CHECKING ; OFF ; Untyped ;
-; ALLOW_RWCYCLE_WHEN_FULL ; OFF ; Untyped ;
-; ADD_RAM_OUTPUT_REGISTER ; OFF ; Untyped ;
-; ALMOST_FULL_VALUE ; 0 ; Untyped ;
-; ALMOST_EMPTY_VALUE ; 0 ; Untyped ;
-; USE_EAB ; ON ; Untyped ;
-; MAXIMIZE_SPEED ; 5 ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; OPTIMIZE_FOR_SPEED ; 9 ; Untyped ;
-; CBXI_PARAMETER ; scfifo_lk21 ; Untyped ;
-+-------------------------+-------------+-----------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-; LPM_DIRECTION ; LEFT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-; LPM_DIRECTION ; LEFT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-; LPM_DIRECTION ; LEFT ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri3:inst70|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 6 ; Signed Integer ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component ;
-+------------------------------------+-----------------+--------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+-----------------+--------------------------------------------------------------------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; BIDIR_DUAL_PORT ; Untyped ;
-; WIDTH_A ; 6 ; Signed Integer ;
-; WIDTHAD_A ; 8 ; Signed Integer ;
-; NUMWORDS_A ; 256 ; Signed Integer ;
-; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 6 ; Signed Integer ;
-; WIDTHAD_B ; 8 ; Signed Integer ;
-; NUMWORDS_B ; 256 ; Signed Integer ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; OUTDATA_REG_B ; CLOCK1 ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
-; WIDTH_BYTEENA_B ; 1 ; Signed Integer ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; OLD_DATA ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; OLD_DATA ; Untyped ;
-; INIT_FILE ; UNUSED ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_lf92 ; Untyped ;
-+------------------------------------+-----------------+--------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri3:inst74|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 6 ; Signed Integer ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+--------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component ;
-+------------------------------------+-----------------+-------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+-----------------+-------------------------------------------------------------------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; BIDIR_DUAL_PORT ; Untyped ;
-; WIDTH_A ; 6 ; Signed Integer ;
-; WIDTHAD_A ; 8 ; Signed Integer ;
-; NUMWORDS_A ; 256 ; Signed Integer ;
-; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 6 ; Signed Integer ;
-; WIDTHAD_B ; 8 ; Signed Integer ;
-; NUMWORDS_B ; 256 ; Signed Integer ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; OUTDATA_REG_B ; CLOCK1 ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
-; WIDTH_BYTEENA_B ; 1 ; Signed Integer ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; OLD_DATA ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; OLD_DATA ; Untyped ;
-; INIT_FILE ; UNUSED ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_lf92 ; Untyped ;
-+------------------------------------+-----------------+-------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri1:inst51|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 3 ; Signed Integer ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component ;
-+------------------------------------+-----------------+--------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+-----------------+--------------------------------------------------------------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; BIDIR_DUAL_PORT ; Untyped ;
-; WIDTH_A ; 3 ; Signed Integer ;
-; WIDTHAD_A ; 4 ; Signed Integer ;
-; NUMWORDS_A ; 16 ; Signed Integer ;
-; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 3 ; Signed Integer ;
-; WIDTHAD_B ; 4 ; Signed Integer ;
-; NUMWORDS_B ; 16 ; Signed Integer ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; OUTDATA_REG_B ; CLOCK1 ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
-; WIDTH_BYTEENA_B ; 1 ; Signed Integer ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; OLD_DATA ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; OLD_DATA ; Untyped ;
-; INIT_FILE ; UNUSED ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_rb92 ; Untyped ;
-+------------------------------------+-----------------+--------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri1:inst56|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 3 ; Signed Integer ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component ;
-+------------------------------------+-----------------+----------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+-----------------+----------------------------------------------------------------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; BIDIR_DUAL_PORT ; Untyped ;
-; WIDTH_A ; 3 ; Signed Integer ;
-; WIDTHAD_A ; 4 ; Signed Integer ;
-; NUMWORDS_A ; 16 ; Signed Integer ;
-; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 3 ; Signed Integer ;
-; WIDTHAD_B ; 4 ; Signed Integer ;
-; NUMWORDS_B ; 16 ; Signed Integer ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; OUTDATA_REG_B ; CLOCK1 ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
-; WIDTH_BYTEENA_B ; 1 ; Signed Integer ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; OLD_DATA ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; OLD_DATA ; Untyped ;
-; INIT_FILE ; UNUSED ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_rb92 ; Untyped ;
-+------------------------------------+-----------------+----------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri1:inst61|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 3 ; Signed Integer ;
-+----------------+-------+-----------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component ;
-+------------------------------------+-----------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+-----------------+---------------------------------------------------------------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; BIDIR_DUAL_PORT ; Untyped ;
-; WIDTH_A ; 3 ; Signed Integer ;
-; WIDTHAD_A ; 4 ; Signed Integer ;
-; NUMWORDS_A ; 16 ; Signed Integer ;
-; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 3 ; Signed Integer ;
-; WIDTHAD_B ; 4 ; Signed Integer ;
-; NUMWORDS_B ; 16 ; Signed Integer ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; OUTDATA_REG_B ; CLOCK1 ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
-; WIDTH_BYTEENA_B ; 1 ; Signed Integer ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; OLD_DATA ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; OLD_DATA ; Untyped ;
-; INIT_FILE ; UNUSED ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_rb92 ; Untyped ;
-+------------------------------------+-----------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_BYT:inst58|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+--------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+--------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-+----------------+-------+--------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component ;
-+------------------------------------+-----------------+-----------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+-----------------+-----------------------------------------------------------------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; BIDIR_DUAL_PORT ; Untyped ;
-; WIDTH_A ; 8 ; Signed Integer ;
-; WIDTHAD_A ; 8 ; Signed Integer ;
-; NUMWORDS_A ; 256 ; Signed Integer ;
-; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 8 ; Signed Integer ;
-; WIDTHAD_B ; 8 ; Signed Integer ;
-; NUMWORDS_B ; 256 ; Signed Integer ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; OUTDATA_REG_B ; CLOCK1 ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
-; WIDTH_BYTEENA_B ; 1 ; Signed Integer ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; OLD_DATA ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; OLD_DATA ; Untyped ;
-; INIT_FILE ; UNUSED ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_pf92 ; Untyped ;
-+------------------------------------+-----------------+-----------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+----------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux3:inst102|LPM_MUX:lpm_mux_component ;
-+------------------------+-------------+-------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+-------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 1 ; Signed Integer ;
-; LPM_SIZE ; 2 ; Signed Integer ;
-; LPM_WIDTHS ; 1 ; Signed Integer ;
-; LPM_PIPELINE ; 0 ; Signed Integer ;
-; CBXI_PARAMETER ; mux_96e ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-+------------------------+-------------+-------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff5:inst11|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux2:inst25|LPM_MUX:lpm_mux_component ;
-+------------------------+-------------+------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 8 ; Signed Integer ;
-; LPM_SIZE ; 16 ; Signed Integer ;
-; LPM_WIDTHS ; 4 ; Signed Integer ;
-; LPM_PIPELINE ; 2 ; Signed Integer ;
-; CBXI_PARAMETER ; mux_mpe ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-+------------------------+-------------+------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux4:inst81|LPM_MUX:lpm_mux_component ;
-+------------------------+-------------+------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 7 ; Signed Integer ;
-; LPM_SIZE ; 2 ; Signed Integer ;
-; LPM_WIDTHS ; 1 ; Signed Integer ;
-; LPM_PIPELINE ; 0 ; Signed Integer ;
-; CBXI_PARAMETER ; mux_f6e ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-+------------------------+-------------+------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant3:inst82|lpm_constant:lpm_constant_component ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 7 ; Signed Integer ;
-; LPM_CVALUE ; 0 ; Signed Integer ;
-; ENABLE_RUNTIME_MOD ; NO ; Untyped ;
-; CBXI_PARAMETER ; lpm_constant_pf6 ; Untyped ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_BYT:inst57|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+--------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+--------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-+----------------+-------+--------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component ;
-+------------------------------------+-----------------+-----------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+-----------------+-----------------------------------------------------------------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; BIDIR_DUAL_PORT ; Untyped ;
-; WIDTH_A ; 8 ; Signed Integer ;
-; WIDTHAD_A ; 8 ; Signed Integer ;
-; NUMWORDS_A ; 256 ; Signed Integer ;
-; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 8 ; Signed Integer ;
-; WIDTHAD_B ; 8 ; Signed Integer ;
-; NUMWORDS_B ; 256 ; Signed Integer ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; OUTDATA_REG_B ; CLOCK1 ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
-; WIDTH_BYTEENA_B ; 1 ; Signed Integer ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; OLD_DATA ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; OLD_DATA ; Untyped ;
-; INIT_FILE ; UNUSED ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_pf92 ; Untyped ;
-+------------------------------------+-----------------+-----------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_bustri_BYT:inst53|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+--------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+--------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-+----------------+-------+--------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component ;
-+------------------------------------+-----------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+-----------------+---------------------------------------------------------------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; BIDIR_DUAL_PORT ; Untyped ;
-; WIDTH_A ; 8 ; Signed Integer ;
-; WIDTHAD_A ; 8 ; Signed Integer ;
-; NUMWORDS_A ; 256 ; Signed Integer ;
-; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 8 ; Signed Integer ;
-; WIDTHAD_B ; 8 ; Signed Integer ;
-; NUMWORDS_B ; 256 ; Signed Integer ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; OUTDATA_REG_B ; CLOCK1 ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
-; WIDTH_BYTEENA_B ; 1 ; Signed Integer ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; OLD_DATA ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; OLD_DATA ; Untyped ;
-; INIT_FILE ; UNUSED ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_pf92 ; Untyped ;
-+------------------------------------+-----------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+--------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component ;
-+------------------------+--------------+----------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+--------------+----------------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH ; 24 ; Signed Integer ;
-; POWER_UP_HIGH ; OFF ; Untyped ;
-; OE_REG ; UNUSED ; Untyped ;
-; extend_oe_disable ; UNUSED ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; ddio_out_o2f ; Untyped ;
-+------------------------+--------------+----------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+--------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux6:inst7|LPM_MUX:lpm_mux_component ;
-+------------------------+-------------+-----------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+-----------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 24 ; Signed Integer ;
-; LPM_SIZE ; 8 ; Signed Integer ;
-; LPM_WIDTHS ; 3 ; Signed Integer ;
-; LPM_PIPELINE ; 2 ; Signed Integer ;
-; CBXI_PARAMETER ; mux_kpe ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-+------------------------+-------------+-----------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 24 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 24 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant0:inst59|lpm_constant:lpm_constant_component ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 5 ; Signed Integer ;
-; LPM_CVALUE ; 0 ; Signed Integer ;
-; ENABLE_RUNTIME_MOD ; NO ; Untyped ;
-; CBXI_PARAMETER ; lpm_constant_nf6 ; Untyped ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant0:inst54|lpm_constant:lpm_constant_component ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 5 ; Signed Integer ;
-; LPM_CVALUE ; 0 ; Signed Integer ;
-; ENABLE_RUNTIME_MOD ; NO ; Untyped ;
-; CBXI_PARAMETER ; lpm_constant_nf6 ; Untyped ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant0:inst64|lpm_constant:lpm_constant_component ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 5 ; Signed Integer ;
-; LPM_CVALUE ; 0 ; Signed Integer ;
-; ENABLE_RUNTIME_MOD ; NO ; Untyped ;
-; CBXI_PARAMETER ; lpm_constant_nf6 ; Untyped ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 24 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 24 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant1:inst77|lpm_constant:lpm_constant_component ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 2 ; Signed Integer ;
-; LPM_CVALUE ; 0 ; Signed Integer ;
-; ENABLE_RUNTIME_MOD ; NO ; Untyped ;
-; CBXI_PARAMETER ; lpm_constant_4e6 ; Untyped ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant1:inst80|lpm_constant:lpm_constant_component ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 2 ; Signed Integer ;
-; LPM_CVALUE ; 0 ; Signed Integer ;
-; ENABLE_RUNTIME_MOD ; NO ; Untyped ;
-; CBXI_PARAMETER ; lpm_constant_4e6 ; Untyped ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant1:inst83|lpm_constant:lpm_constant_component ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 2 ; Signed Integer ;
-; LPM_CVALUE ; 0 ; Signed Integer ;
-; ENABLE_RUNTIME_MOD ; NO ; Untyped ;
-; CBXI_PARAMETER ; lpm_constant_4e6 ; Untyped ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 16 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux1:inst24|LPM_MUX:lpm_mux_component ;
-+------------------------+-------------+------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 16 ; Signed Integer ;
-; LPM_SIZE ; 8 ; Signed Integer ;
-; LPM_WIDTHS ; 3 ; Signed Integer ;
-; LPM_PIPELINE ; 4 ; Signed Integer ;
-; CBXI_PARAMETER ; mux_npe ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-+------------------------+-------------+------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_constant2:inst23|lpm_constant:lpm_constant_component ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-; LPM_CVALUE ; 0 ; Signed Integer ;
-; ENABLE_RUNTIME_MOD ; NO ; Untyped ;
-; CBXI_PARAMETER ; lpm_constant_qf6 ; Untyped ;
-+--------------------+------------------+--------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+--------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+--------------------------------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+--------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_mux0:inst21|LPM_MUX:lpm_mux_component ;
-+------------------------+-------------+------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_SIZE ; 4 ; Signed Integer ;
-; LPM_WIDTHS ; 2 ; Signed Integer ;
-; LPM_PIPELINE ; 4 ; Signed Integer ;
-; CBXI_PARAMETER ; mux_gpe ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-+------------------------+-------------+------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+--------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component ;
-+------------------------+--------------+----------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+--------------+----------------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH ; 4 ; Signed Integer ;
-; POWER_UP_HIGH ; ON ; Untyped ;
-; OE_REG ; UNUSED ; Untyped ;
-; extend_oe_disable ; UNUSED ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; ddio_out_are ; Untyped ;
-+------------------------+--------------+----------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll2:inst12|altpll:altpll_component ;
-+-------------------------------+--------------------+--------------------------------+
-; Parameter Name ; Value ; Type ;
-+-------------------------------+--------------------+--------------------------------+
-; OPERATION_MODE ; SOURCE_SYNCHRONOUS ; Untyped ;
-; PLL_TYPE ; AUTO ; Untyped ;
-; QUALIFY_CONF_DONE ; OFF ; Untyped ;
-; COMPENSATE_CLOCK ; CLK0 ; Untyped ;
-; SCAN_CHAIN ; LONG ; Untyped ;
-; PRIMARY_CLOCK ; INCLK0 ; Untyped ;
-; INCLK0_INPUT_FREQUENCY ; 30303 ; Signed Integer ;
-; INCLK1_INPUT_FREQUENCY ; 0 ; Untyped ;
-; GATE_LOCK_SIGNAL ; NO ; Untyped ;
-; GATE_LOCK_COUNTER ; 0 ; Untyped ;
-; LOCK_HIGH ; 1 ; Untyped ;
-; LOCK_LOW ; 1 ; Untyped ;
-; VALID_LOCK_MULTIPLIER ; 1 ; Untyped ;
-; INVALID_LOCK_MULTIPLIER ; 5 ; Untyped ;
-; SWITCH_OVER_ON_LOSSCLK ; OFF ; Untyped ;
-; SWITCH_OVER_ON_GATED_LOCK ; OFF ; Untyped ;
-; ENABLE_SWITCH_OVER_COUNTER ; OFF ; Untyped ;
-; SKIP_VCO ; OFF ; Untyped ;
-; SWITCH_OVER_COUNTER ; 0 ; Untyped ;
-; SWITCH_OVER_TYPE ; AUTO ; Untyped ;
-; FEEDBACK_SOURCE ; EXTCLK0 ; Untyped ;
-; BANDWIDTH ; 0 ; Untyped ;
-; BANDWIDTH_TYPE ; AUTO ; Untyped ;
-; SPREAD_FREQUENCY ; 0 ; Untyped ;
-; DOWN_SPREAD ; 0 ; Untyped ;
-; SELF_RESET_ON_GATED_LOSS_LOCK ; OFF ; Untyped ;
-; SELF_RESET_ON_LOSS_LOCK ; OFF ; Untyped ;
-; CLK9_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK8_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK7_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK6_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK5_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK4_MULTIPLY_BY ; 2 ; Signed Integer ;
-; CLK3_MULTIPLY_BY ; 4 ; Signed Integer ;
-; CLK2_MULTIPLY_BY ; 4 ; Signed Integer ;
-; CLK1_MULTIPLY_BY ; 4 ; Signed Integer ;
-; CLK0_MULTIPLY_BY ; 4 ; Signed Integer ;
-; CLK9_DIVIDE_BY ; 0 ; Untyped ;
-; CLK8_DIVIDE_BY ; 0 ; Untyped ;
-; CLK7_DIVIDE_BY ; 0 ; Untyped ;
-; CLK6_DIVIDE_BY ; 0 ; Untyped ;
-; CLK5_DIVIDE_BY ; 1 ; Untyped ;
-; CLK4_DIVIDE_BY ; 1 ; Signed Integer ;
-; CLK3_DIVIDE_BY ; 1 ; Signed Integer ;
-; CLK2_DIVIDE_BY ; 1 ; Signed Integer ;
-; CLK1_DIVIDE_BY ; 1 ; Signed Integer ;
-; CLK0_DIVIDE_BY ; 1 ; Signed Integer ;
-; CLK9_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK8_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK7_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK6_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK5_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK4_PHASE_SHIFT ; 11364 ; Untyped ;
-; CLK3_PHASE_SHIFT ; 2210 ; Untyped ;
-; CLK2_PHASE_SHIFT ; 3788 ; Untyped ;
-; CLK1_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK0_PHASE_SHIFT ; 5051 ; Untyped ;
-; CLK5_TIME_DELAY ; 0 ; Untyped ;
-; CLK4_TIME_DELAY ; 0 ; Untyped ;
-; CLK3_TIME_DELAY ; 0 ; Untyped ;
-; CLK2_TIME_DELAY ; 0 ; Untyped ;
-; CLK1_TIME_DELAY ; 0 ; Untyped ;
-; CLK0_TIME_DELAY ; 0 ; Untyped ;
-; CLK9_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK8_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK7_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK6_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK5_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK4_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK3_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK2_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK1_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK0_DUTY_CYCLE ; 50 ; Signed Integer ;
-; CLK9_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK8_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK7_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK6_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK5_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK4_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK3_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK2_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK1_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK0_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK9_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK8_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK7_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK6_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK5_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK4_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK3_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK2_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK1_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK0_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; LOCK_WINDOW_UI ; 0.05 ; Untyped ;
-; LOCK_WINDOW_UI_BITS ; UNUSED ; Untyped ;
-; VCO_RANGE_DETECTOR_LOW_BITS ; UNUSED ; Untyped ;
-; VCO_RANGE_DETECTOR_HIGH_BITS ; UNUSED ; Untyped ;
-; DPA_MULTIPLY_BY ; 0 ; Untyped ;
-; DPA_DIVIDE_BY ; 1 ; Untyped ;
-; DPA_DIVIDER ; 0 ; Untyped ;
-; EXTCLK3_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK2_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK1_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK0_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK3_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK2_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK1_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK0_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK3_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK2_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK1_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK0_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK3_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK2_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK1_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK0_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK3_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK2_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK1_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK0_DUTY_CYCLE ; 50 ; Untyped ;
-; VCO_MULTIPLY_BY ; 0 ; Untyped ;
-; VCO_DIVIDE_BY ; 0 ; Untyped ;
-; SCLKOUT0_PHASE_SHIFT ; 0 ; Untyped ;
-; SCLKOUT1_PHASE_SHIFT ; 0 ; Untyped ;
-; VCO_MIN ; 0 ; Untyped ;
-; VCO_MAX ; 0 ; Untyped ;
-; VCO_CENTER ; 0 ; Untyped ;
-; PFD_MIN ; 0 ; Untyped ;
-; PFD_MAX ; 0 ; Untyped ;
-; M_INITIAL ; 0 ; Untyped ;
-; M ; 0 ; Untyped ;
-; N ; 1 ; Untyped ;
-; M2 ; 1 ; Untyped ;
-; N2 ; 1 ; Untyped ;
-; SS ; 1 ; Untyped ;
-; C0_HIGH ; 0 ; Untyped ;
-; C1_HIGH ; 0 ; Untyped ;
-; C2_HIGH ; 0 ; Untyped ;
-; C3_HIGH ; 0 ; Untyped ;
-; C4_HIGH ; 0 ; Untyped ;
-; C5_HIGH ; 0 ; Untyped ;
-; C6_HIGH ; 0 ; Untyped ;
-; C7_HIGH ; 0 ; Untyped ;
-; C8_HIGH ; 0 ; Untyped ;
-; C9_HIGH ; 0 ; Untyped ;
-; C0_LOW ; 0 ; Untyped ;
-; C1_LOW ; 0 ; Untyped ;
-; C2_LOW ; 0 ; Untyped ;
-; C3_LOW ; 0 ; Untyped ;
-; C4_LOW ; 0 ; Untyped ;
-; C5_LOW ; 0 ; Untyped ;
-; C6_LOW ; 0 ; Untyped ;
-; C7_LOW ; 0 ; Untyped ;
-; C8_LOW ; 0 ; Untyped ;
-; C9_LOW ; 0 ; Untyped ;
-; C0_INITIAL ; 0 ; Untyped ;
-; C1_INITIAL ; 0 ; Untyped ;
-; C2_INITIAL ; 0 ; Untyped ;
-; C3_INITIAL ; 0 ; Untyped ;
-; C4_INITIAL ; 0 ; Untyped ;
-; C5_INITIAL ; 0 ; Untyped ;
-; C6_INITIAL ; 0 ; Untyped ;
-; C7_INITIAL ; 0 ; Untyped ;
-; C8_INITIAL ; 0 ; Untyped ;
-; C9_INITIAL ; 0 ; Untyped ;
-; C0_MODE ; BYPASS ; Untyped ;
-; C1_MODE ; BYPASS ; Untyped ;
-; C2_MODE ; BYPASS ; Untyped ;
-; C3_MODE ; BYPASS ; Untyped ;
-; C4_MODE ; BYPASS ; Untyped ;
-; C5_MODE ; BYPASS ; Untyped ;
-; C6_MODE ; BYPASS ; Untyped ;
-; C7_MODE ; BYPASS ; Untyped ;
-; C8_MODE ; BYPASS ; Untyped ;
-; C9_MODE ; BYPASS ; Untyped ;
-; C0_PH ; 0 ; Untyped ;
-; C1_PH ; 0 ; Untyped ;
-; C2_PH ; 0 ; Untyped ;
-; C3_PH ; 0 ; Untyped ;
-; C4_PH ; 0 ; Untyped ;
-; C5_PH ; 0 ; Untyped ;
-; C6_PH ; 0 ; Untyped ;
-; C7_PH ; 0 ; Untyped ;
-; C8_PH ; 0 ; Untyped ;
-; C9_PH ; 0 ; Untyped ;
-; L0_HIGH ; 1 ; Untyped ;
-; L1_HIGH ; 1 ; Untyped ;
-; G0_HIGH ; 1 ; Untyped ;
-; G1_HIGH ; 1 ; Untyped ;
-; G2_HIGH ; 1 ; Untyped ;
-; G3_HIGH ; 1 ; Untyped ;
-; E0_HIGH ; 1 ; Untyped ;
-; E1_HIGH ; 1 ; Untyped ;
-; E2_HIGH ; 1 ; Untyped ;
-; E3_HIGH ; 1 ; Untyped ;
-; L0_LOW ; 1 ; Untyped ;
-; L1_LOW ; 1 ; Untyped ;
-; G0_LOW ; 1 ; Untyped ;
-; G1_LOW ; 1 ; Untyped ;
-; G2_LOW ; 1 ; Untyped ;
-; G3_LOW ; 1 ; Untyped ;
-; E0_LOW ; 1 ; Untyped ;
-; E1_LOW ; 1 ; Untyped ;
-; E2_LOW ; 1 ; Untyped ;
-; E3_LOW ; 1 ; Untyped ;
-; L0_INITIAL ; 1 ; Untyped ;
-; L1_INITIAL ; 1 ; Untyped ;
-; G0_INITIAL ; 1 ; Untyped ;
-; G1_INITIAL ; 1 ; Untyped ;
-; G2_INITIAL ; 1 ; Untyped ;
-; G3_INITIAL ; 1 ; Untyped ;
-; E0_INITIAL ; 1 ; Untyped ;
-; E1_INITIAL ; 1 ; Untyped ;
-; E2_INITIAL ; 1 ; Untyped ;
-; E3_INITIAL ; 1 ; Untyped ;
-; L0_MODE ; BYPASS ; Untyped ;
-; L1_MODE ; BYPASS ; Untyped ;
-; G0_MODE ; BYPASS ; Untyped ;
-; G1_MODE ; BYPASS ; Untyped ;
-; G2_MODE ; BYPASS ; Untyped ;
-; G3_MODE ; BYPASS ; Untyped ;
-; E0_MODE ; BYPASS ; Untyped ;
-; E1_MODE ; BYPASS ; Untyped ;
-; E2_MODE ; BYPASS ; Untyped ;
-; E3_MODE ; BYPASS ; Untyped ;
-; L0_PH ; 0 ; Untyped ;
-; L1_PH ; 0 ; Untyped ;
-; G0_PH ; 0 ; Untyped ;
-; G1_PH ; 0 ; Untyped ;
-; G2_PH ; 0 ; Untyped ;
-; G3_PH ; 0 ; Untyped ;
-; E0_PH ; 0 ; Untyped ;
-; E1_PH ; 0 ; Untyped ;
-; E2_PH ; 0 ; Untyped ;
-; E3_PH ; 0 ; Untyped ;
-; M_PH ; 0 ; Untyped ;
-; C1_USE_CASC_IN ; OFF ; Untyped ;
-; C2_USE_CASC_IN ; OFF ; Untyped ;
-; C3_USE_CASC_IN ; OFF ; Untyped ;
-; C4_USE_CASC_IN ; OFF ; Untyped ;
-; C5_USE_CASC_IN ; OFF ; Untyped ;
-; C6_USE_CASC_IN ; OFF ; Untyped ;
-; C7_USE_CASC_IN ; OFF ; Untyped ;
-; C8_USE_CASC_IN ; OFF ; Untyped ;
-; C9_USE_CASC_IN ; OFF ; Untyped ;
-; CLK0_COUNTER ; G0 ; Untyped ;
-; CLK1_COUNTER ; G0 ; Untyped ;
-; CLK2_COUNTER ; G0 ; Untyped ;
-; CLK3_COUNTER ; G0 ; Untyped ;
-; CLK4_COUNTER ; G0 ; Untyped ;
-; CLK5_COUNTER ; G0 ; Untyped ;
-; CLK6_COUNTER ; E0 ; Untyped ;
-; CLK7_COUNTER ; E1 ; Untyped ;
-; CLK8_COUNTER ; E2 ; Untyped ;
-; CLK9_COUNTER ; E3 ; Untyped ;
-; L0_TIME_DELAY ; 0 ; Untyped ;
-; L1_TIME_DELAY ; 0 ; Untyped ;
-; G0_TIME_DELAY ; 0 ; Untyped ;
-; G1_TIME_DELAY ; 0 ; Untyped ;
-; G2_TIME_DELAY ; 0 ; Untyped ;
-; G3_TIME_DELAY ; 0 ; Untyped ;
-; E0_TIME_DELAY ; 0 ; Untyped ;
-; E1_TIME_DELAY ; 0 ; Untyped ;
-; E2_TIME_DELAY ; 0 ; Untyped ;
-; E3_TIME_DELAY ; 0 ; Untyped ;
-; M_TIME_DELAY ; 0 ; Untyped ;
-; N_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK3_COUNTER ; E3 ; Untyped ;
-; EXTCLK2_COUNTER ; E2 ; Untyped ;
-; EXTCLK1_COUNTER ; E1 ; Untyped ;
-; EXTCLK0_COUNTER ; E0 ; Untyped ;
-; ENABLE0_COUNTER ; L0 ; Untyped ;
-; ENABLE1_COUNTER ; L0 ; Untyped ;
-; CHARGE_PUMP_CURRENT ; 2 ; Untyped ;
-; LOOP_FILTER_R ; 1.000000 ; Untyped ;
-; LOOP_FILTER_C ; 5 ; Untyped ;
-; CHARGE_PUMP_CURRENT_BITS ; 9999 ; Untyped ;
-; LOOP_FILTER_R_BITS ; 9999 ; Untyped ;
-; LOOP_FILTER_C_BITS ; 9999 ; Untyped ;
-; VCO_POST_SCALE ; 0 ; Untyped ;
-; CLK2_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; CLK1_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; CLK0_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; PORT_CLKENA0 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA1 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA2 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA3 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA4 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA5 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLKENA0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA2 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA3 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLK0 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK1 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK2 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK3 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKBAD0 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKBAD1 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK0 ; PORT_USED ; Untyped ;
-; PORT_CLK1 ; PORT_USED ; Untyped ;
-; PORT_CLK2 ; PORT_USED ; Untyped ;
-; PORT_CLK3 ; PORT_USED ; Untyped ;
-; PORT_CLK4 ; PORT_USED ; Untyped ;
-; PORT_CLK5 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK6 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK7 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK8 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK9 ; PORT_UNUSED ; Untyped ;
-; PORT_SCANDATA ; PORT_UNUSED ; Untyped ;
-; PORT_SCANDATAOUT ; PORT_UNUSED ; Untyped ;
-; PORT_SCANDONE ; PORT_UNUSED ; Untyped ;
-; PORT_SCLKOUT1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_SCLKOUT0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_ACTIVECLOCK ; PORT_UNUSED ; Untyped ;
-; PORT_CLKLOSS ; PORT_UNUSED ; Untyped ;
-; PORT_INCLK1 ; PORT_UNUSED ; Untyped ;
-; PORT_INCLK0 ; PORT_USED ; Untyped ;
-; PORT_FBIN ; PORT_UNUSED ; Untyped ;
-; PORT_PLLENA ; PORT_UNUSED ; Untyped ;
-; PORT_CLKSWITCH ; PORT_UNUSED ; Untyped ;
-; PORT_ARESET ; PORT_UNUSED ; Untyped ;
-; PORT_PFDENA ; PORT_UNUSED ; Untyped ;
-; PORT_SCANCLK ; PORT_UNUSED ; Untyped ;
-; PORT_SCANACLR ; PORT_UNUSED ; Untyped ;
-; PORT_SCANREAD ; PORT_UNUSED ; Untyped ;
-; PORT_SCANWRITE ; PORT_UNUSED ; Untyped ;
-; PORT_ENABLE0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_ENABLE1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_LOCKED ; PORT_UNUSED ; Untyped ;
-; PORT_CONFIGUPDATE ; PORT_UNUSED ; Untyped ;
-; PORT_FBOUT ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_PHASEDONE ; PORT_UNUSED ; Untyped ;
-; PORT_PHASESTEP ; PORT_UNUSED ; Untyped ;
-; PORT_PHASEUPDOWN ; PORT_UNUSED ; Untyped ;
-; PORT_SCANCLKENA ; PORT_UNUSED ; Untyped ;
-; PORT_PHASECOUNTERSELECT ; PORT_UNUSED ; Untyped ;
-; PORT_VCOOVERRANGE ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_VCOUNDERRANGE ; PORT_CONNECTIVITY ; Untyped ;
-; M_TEST_SOURCE ; 5 ; Untyped ;
-; C0_TEST_SOURCE ; 5 ; Untyped ;
-; C1_TEST_SOURCE ; 5 ; Untyped ;
-; C2_TEST_SOURCE ; 5 ; Untyped ;
-; C3_TEST_SOURCE ; 5 ; Untyped ;
-; C4_TEST_SOURCE ; 5 ; Untyped ;
-; C5_TEST_SOURCE ; 5 ; Untyped ;
-; C6_TEST_SOURCE ; 5 ; Untyped ;
-; C7_TEST_SOURCE ; 5 ; Untyped ;
-; C8_TEST_SOURCE ; 5 ; Untyped ;
-; C9_TEST_SOURCE ; 5 ; Untyped ;
-; CBXI_PARAMETER ; altpll_isv2 ; Untyped ;
-; VCO_FREQUENCY_CONTROL ; AUTO ; Untyped ;
-; VCO_PHASE_SHIFT_STEP ; 0 ; Untyped ;
-; WIDTH_CLOCK ; 5 ; Signed Integer ;
-; WIDTH_PHASECOUNTERSELECT ; 4 ; Untyped ;
-; USING_FBMIMICBIDIR_PORT ; OFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; SCAN_CHAIN_MIF_FILE ; UNUSED ; Untyped ;
-; SIM_GATE_LOCK_DEVICE_BEHAVIOR ; OFF ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+-------------------------------+--------------------+--------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll4:inst22|altpll:altpll_component ;
-+-------------------------------+-------------------+---------------------------------+
-; Parameter Name ; Value ; Type ;
-+-------------------------------+-------------------+---------------------------------+
-; OPERATION_MODE ; NORMAL ; Untyped ;
-; PLL_TYPE ; AUTO ; Untyped ;
-; QUALIFY_CONF_DONE ; OFF ; Untyped ;
-; COMPENSATE_CLOCK ; CLK0 ; Untyped ;
-; SCAN_CHAIN ; LONG ; Untyped ;
-; PRIMARY_CLOCK ; INCLK0 ; Untyped ;
-; INCLK0_INPUT_FREQUENCY ; 20833 ; Untyped ;
-; INCLK1_INPUT_FREQUENCY ; 0 ; Untyped ;
-; GATE_LOCK_SIGNAL ; NO ; Untyped ;
-; GATE_LOCK_COUNTER ; 0 ; Untyped ;
-; LOCK_HIGH ; 1 ; Untyped ;
-; LOCK_LOW ; 1 ; Untyped ;
-; VALID_LOCK_MULTIPLIER ; 1 ; Untyped ;
-; INVALID_LOCK_MULTIPLIER ; 5 ; Untyped ;
-; SWITCH_OVER_ON_LOSSCLK ; OFF ; Untyped ;
-; SWITCH_OVER_ON_GATED_LOCK ; OFF ; Untyped ;
-; ENABLE_SWITCH_OVER_COUNTER ; OFF ; Untyped ;
-; SKIP_VCO ; OFF ; Untyped ;
-; SWITCH_OVER_COUNTER ; 0 ; Untyped ;
-; SWITCH_OVER_TYPE ; AUTO ; Untyped ;
-; FEEDBACK_SOURCE ; EXTCLK0 ; Untyped ;
-; BANDWIDTH ; 0 ; Untyped ;
-; BANDWIDTH_TYPE ; AUTO ; Untyped ;
-; SPREAD_FREQUENCY ; 0 ; Untyped ;
-; DOWN_SPREAD ; 0 ; Untyped ;
-; SELF_RESET_ON_GATED_LOSS_LOCK ; OFF ; Untyped ;
-; SELF_RESET_ON_LOSS_LOCK ; OFF ; Untyped ;
-; CLK9_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK8_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK7_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK6_MULTIPLY_BY ; 0 ; Untyped ;
-; CLK5_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK4_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK3_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK2_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK1_MULTIPLY_BY ; 1 ; Untyped ;
-; CLK0_MULTIPLY_BY ; 2 ; Untyped ;
-; CLK9_DIVIDE_BY ; 0 ; Untyped ;
-; CLK8_DIVIDE_BY ; 0 ; Untyped ;
-; CLK7_DIVIDE_BY ; 0 ; Untyped ;
-; CLK6_DIVIDE_BY ; 0 ; Untyped ;
-; CLK5_DIVIDE_BY ; 1 ; Untyped ;
-; CLK4_DIVIDE_BY ; 1 ; Untyped ;
-; CLK3_DIVIDE_BY ; 1 ; Untyped ;
-; CLK2_DIVIDE_BY ; 1 ; Untyped ;
-; CLK1_DIVIDE_BY ; 1 ; Untyped ;
-; CLK0_DIVIDE_BY ; 1 ; Untyped ;
-; CLK9_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK8_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK7_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK6_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK5_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK4_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK3_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK2_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK1_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK0_PHASE_SHIFT ; 0 ; Untyped ;
-; CLK5_TIME_DELAY ; 0 ; Untyped ;
-; CLK4_TIME_DELAY ; 0 ; Untyped ;
-; CLK3_TIME_DELAY ; 0 ; Untyped ;
-; CLK2_TIME_DELAY ; 0 ; Untyped ;
-; CLK1_TIME_DELAY ; 0 ; Untyped ;
-; CLK0_TIME_DELAY ; 0 ; Untyped ;
-; CLK9_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK8_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK7_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK6_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK5_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK4_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK3_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK2_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK1_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK0_DUTY_CYCLE ; 50 ; Untyped ;
-; CLK9_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK8_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK7_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK6_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK5_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK4_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK3_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK2_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK1_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK0_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
-; CLK9_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK8_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK7_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK6_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK5_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK4_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK3_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK2_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK1_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; CLK0_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
-; LOCK_WINDOW_UI ; 0.05 ; Untyped ;
-; LOCK_WINDOW_UI_BITS ; UNUSED ; Untyped ;
-; VCO_RANGE_DETECTOR_LOW_BITS ; UNUSED ; Untyped ;
-; VCO_RANGE_DETECTOR_HIGH_BITS ; UNUSED ; Untyped ;
-; DPA_MULTIPLY_BY ; 0 ; Untyped ;
-; DPA_DIVIDE_BY ; 1 ; Untyped ;
-; DPA_DIVIDER ; 0 ; Untyped ;
-; EXTCLK3_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK2_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK1_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK0_MULTIPLY_BY ; 1 ; Untyped ;
-; EXTCLK3_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK2_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK1_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK0_DIVIDE_BY ; 1 ; Untyped ;
-; EXTCLK3_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK2_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK1_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK0_PHASE_SHIFT ; 0 ; Untyped ;
-; EXTCLK3_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK2_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK1_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK0_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK3_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK2_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK1_DUTY_CYCLE ; 50 ; Untyped ;
-; EXTCLK0_DUTY_CYCLE ; 50 ; Untyped ;
-; VCO_MULTIPLY_BY ; 0 ; Untyped ;
-; VCO_DIVIDE_BY ; 0 ; Untyped ;
-; SCLKOUT0_PHASE_SHIFT ; 0 ; Untyped ;
-; SCLKOUT1_PHASE_SHIFT ; 0 ; Untyped ;
-; VCO_MIN ; 0 ; Untyped ;
-; VCO_MAX ; 0 ; Untyped ;
-; VCO_CENTER ; 0 ; Untyped ;
-; PFD_MIN ; 0 ; Untyped ;
-; PFD_MAX ; 0 ; Untyped ;
-; M_INITIAL ; 0 ; Untyped ;
-; M ; 0 ; Untyped ;
-; N ; 1 ; Untyped ;
-; M2 ; 1 ; Untyped ;
-; N2 ; 1 ; Untyped ;
-; SS ; 1 ; Untyped ;
-; C0_HIGH ; 0 ; Untyped ;
-; C1_HIGH ; 0 ; Untyped ;
-; C2_HIGH ; 0 ; Untyped ;
-; C3_HIGH ; 0 ; Untyped ;
-; C4_HIGH ; 0 ; Untyped ;
-; C5_HIGH ; 0 ; Untyped ;
-; C6_HIGH ; 0 ; Untyped ;
-; C7_HIGH ; 0 ; Untyped ;
-; C8_HIGH ; 0 ; Untyped ;
-; C9_HIGH ; 0 ; Untyped ;
-; C0_LOW ; 0 ; Untyped ;
-; C1_LOW ; 0 ; Untyped ;
-; C2_LOW ; 0 ; Untyped ;
-; C3_LOW ; 0 ; Untyped ;
-; C4_LOW ; 0 ; Untyped ;
-; C5_LOW ; 0 ; Untyped ;
-; C6_LOW ; 0 ; Untyped ;
-; C7_LOW ; 0 ; Untyped ;
-; C8_LOW ; 0 ; Untyped ;
-; C9_LOW ; 0 ; Untyped ;
-; C0_INITIAL ; 0 ; Untyped ;
-; C1_INITIAL ; 0 ; Untyped ;
-; C2_INITIAL ; 0 ; Untyped ;
-; C3_INITIAL ; 0 ; Untyped ;
-; C4_INITIAL ; 0 ; Untyped ;
-; C5_INITIAL ; 0 ; Untyped ;
-; C6_INITIAL ; 0 ; Untyped ;
-; C7_INITIAL ; 0 ; Untyped ;
-; C8_INITIAL ; 0 ; Untyped ;
-; C9_INITIAL ; 0 ; Untyped ;
-; C0_MODE ; BYPASS ; Untyped ;
-; C1_MODE ; BYPASS ; Untyped ;
-; C2_MODE ; BYPASS ; Untyped ;
-; C3_MODE ; BYPASS ; Untyped ;
-; C4_MODE ; BYPASS ; Untyped ;
-; C5_MODE ; BYPASS ; Untyped ;
-; C6_MODE ; BYPASS ; Untyped ;
-; C7_MODE ; BYPASS ; Untyped ;
-; C8_MODE ; BYPASS ; Untyped ;
-; C9_MODE ; BYPASS ; Untyped ;
-; C0_PH ; 0 ; Untyped ;
-; C1_PH ; 0 ; Untyped ;
-; C2_PH ; 0 ; Untyped ;
-; C3_PH ; 0 ; Untyped ;
-; C4_PH ; 0 ; Untyped ;
-; C5_PH ; 0 ; Untyped ;
-; C6_PH ; 0 ; Untyped ;
-; C7_PH ; 0 ; Untyped ;
-; C8_PH ; 0 ; Untyped ;
-; C9_PH ; 0 ; Untyped ;
-; L0_HIGH ; 1 ; Untyped ;
-; L1_HIGH ; 1 ; Untyped ;
-; G0_HIGH ; 1 ; Untyped ;
-; G1_HIGH ; 1 ; Untyped ;
-; G2_HIGH ; 1 ; Untyped ;
-; G3_HIGH ; 1 ; Untyped ;
-; E0_HIGH ; 1 ; Untyped ;
-; E1_HIGH ; 1 ; Untyped ;
-; E2_HIGH ; 1 ; Untyped ;
-; E3_HIGH ; 1 ; Untyped ;
-; L0_LOW ; 1 ; Untyped ;
-; L1_LOW ; 1 ; Untyped ;
-; G0_LOW ; 1 ; Untyped ;
-; G1_LOW ; 1 ; Untyped ;
-; G2_LOW ; 1 ; Untyped ;
-; G3_LOW ; 1 ; Untyped ;
-; E0_LOW ; 1 ; Untyped ;
-; E1_LOW ; 1 ; Untyped ;
-; E2_LOW ; 1 ; Untyped ;
-; E3_LOW ; 1 ; Untyped ;
-; L0_INITIAL ; 1 ; Untyped ;
-; L1_INITIAL ; 1 ; Untyped ;
-; G0_INITIAL ; 1 ; Untyped ;
-; G1_INITIAL ; 1 ; Untyped ;
-; G2_INITIAL ; 1 ; Untyped ;
-; G3_INITIAL ; 1 ; Untyped ;
-; E0_INITIAL ; 1 ; Untyped ;
-; E1_INITIAL ; 1 ; Untyped ;
-; E2_INITIAL ; 1 ; Untyped ;
-; E3_INITIAL ; 1 ; Untyped ;
-; L0_MODE ; BYPASS ; Untyped ;
-; L1_MODE ; BYPASS ; Untyped ;
-; G0_MODE ; BYPASS ; Untyped ;
-; G1_MODE ; BYPASS ; Untyped ;
-; G2_MODE ; BYPASS ; Untyped ;
-; G3_MODE ; BYPASS ; Untyped ;
-; E0_MODE ; BYPASS ; Untyped ;
-; E1_MODE ; BYPASS ; Untyped ;
-; E2_MODE ; BYPASS ; Untyped ;
-; E3_MODE ; BYPASS ; Untyped ;
-; L0_PH ; 0 ; Untyped ;
-; L1_PH ; 0 ; Untyped ;
-; G0_PH ; 0 ; Untyped ;
-; G1_PH ; 0 ; Untyped ;
-; G2_PH ; 0 ; Untyped ;
-; G3_PH ; 0 ; Untyped ;
-; E0_PH ; 0 ; Untyped ;
-; E1_PH ; 0 ; Untyped ;
-; E2_PH ; 0 ; Untyped ;
-; E3_PH ; 0 ; Untyped ;
-; M_PH ; 0 ; Untyped ;
-; C1_USE_CASC_IN ; OFF ; Untyped ;
-; C2_USE_CASC_IN ; OFF ; Untyped ;
-; C3_USE_CASC_IN ; OFF ; Untyped ;
-; C4_USE_CASC_IN ; OFF ; Untyped ;
-; C5_USE_CASC_IN ; OFF ; Untyped ;
-; C6_USE_CASC_IN ; OFF ; Untyped ;
-; C7_USE_CASC_IN ; OFF ; Untyped ;
-; C8_USE_CASC_IN ; OFF ; Untyped ;
-; C9_USE_CASC_IN ; OFF ; Untyped ;
-; CLK0_COUNTER ; G0 ; Untyped ;
-; CLK1_COUNTER ; G0 ; Untyped ;
-; CLK2_COUNTER ; G0 ; Untyped ;
-; CLK3_COUNTER ; G0 ; Untyped ;
-; CLK4_COUNTER ; G0 ; Untyped ;
-; CLK5_COUNTER ; G0 ; Untyped ;
-; CLK6_COUNTER ; E0 ; Untyped ;
-; CLK7_COUNTER ; E1 ; Untyped ;
-; CLK8_COUNTER ; E2 ; Untyped ;
-; CLK9_COUNTER ; E3 ; Untyped ;
-; L0_TIME_DELAY ; 0 ; Untyped ;
-; L1_TIME_DELAY ; 0 ; Untyped ;
-; G0_TIME_DELAY ; 0 ; Untyped ;
-; G1_TIME_DELAY ; 0 ; Untyped ;
-; G2_TIME_DELAY ; 0 ; Untyped ;
-; G3_TIME_DELAY ; 0 ; Untyped ;
-; E0_TIME_DELAY ; 0 ; Untyped ;
-; E1_TIME_DELAY ; 0 ; Untyped ;
-; E2_TIME_DELAY ; 0 ; Untyped ;
-; E3_TIME_DELAY ; 0 ; Untyped ;
-; M_TIME_DELAY ; 0 ; Untyped ;
-; N_TIME_DELAY ; 0 ; Untyped ;
-; EXTCLK3_COUNTER ; E3 ; Untyped ;
-; EXTCLK2_COUNTER ; E2 ; Untyped ;
-; EXTCLK1_COUNTER ; E1 ; Untyped ;
-; EXTCLK0_COUNTER ; E0 ; Untyped ;
-; ENABLE0_COUNTER ; L0 ; Untyped ;
-; ENABLE1_COUNTER ; L0 ; Untyped ;
-; CHARGE_PUMP_CURRENT ; 2 ; Untyped ;
-; LOOP_FILTER_R ; 1.000000 ; Untyped ;
-; LOOP_FILTER_C ; 5 ; Untyped ;
-; CHARGE_PUMP_CURRENT_BITS ; 9999 ; Untyped ;
-; LOOP_FILTER_R_BITS ; 9999 ; Untyped ;
-; LOOP_FILTER_C_BITS ; 9999 ; Untyped ;
-; VCO_POST_SCALE ; 0 ; Untyped ;
-; CLK2_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; CLK1_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; CLK0_OUTPUT_FREQUENCY ; 0 ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; PORT_CLKENA0 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA1 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA2 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA3 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA4 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKENA5 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLKENA0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA2 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLKENA3 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_EXTCLK0 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK1 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK2 ; PORT_UNUSED ; Untyped ;
-; PORT_EXTCLK3 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKBAD0 ; PORT_UNUSED ; Untyped ;
-; PORT_CLKBAD1 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK0 ; PORT_USED ; Untyped ;
-; PORT_CLK1 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK2 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK3 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK4 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK5 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK6 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK7 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK8 ; PORT_UNUSED ; Untyped ;
-; PORT_CLK9 ; PORT_UNUSED ; Untyped ;
-; PORT_SCANDATA ; PORT_USED ; Untyped ;
-; PORT_SCANDATAOUT ; PORT_USED ; Untyped ;
-; PORT_SCANDONE ; PORT_USED ; Untyped ;
-; PORT_SCLKOUT1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_SCLKOUT0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_ACTIVECLOCK ; PORT_UNUSED ; Untyped ;
-; PORT_CLKLOSS ; PORT_UNUSED ; Untyped ;
-; PORT_INCLK1 ; PORT_UNUSED ; Untyped ;
-; PORT_INCLK0 ; PORT_USED ; Untyped ;
-; PORT_FBIN ; PORT_UNUSED ; Untyped ;
-; PORT_PLLENA ; PORT_UNUSED ; Untyped ;
-; PORT_CLKSWITCH ; PORT_UNUSED ; Untyped ;
-; PORT_ARESET ; PORT_USED ; Untyped ;
-; PORT_PFDENA ; PORT_UNUSED ; Untyped ;
-; PORT_SCANCLK ; PORT_USED ; Untyped ;
-; PORT_SCANACLR ; PORT_UNUSED ; Untyped ;
-; PORT_SCANREAD ; PORT_UNUSED ; Untyped ;
-; PORT_SCANWRITE ; PORT_UNUSED ; Untyped ;
-; PORT_ENABLE0 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_ENABLE1 ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_LOCKED ; PORT_USED ; Untyped ;
-; PORT_CONFIGUPDATE ; PORT_USED ; Untyped ;
-; PORT_FBOUT ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_PHASEDONE ; PORT_UNUSED ; Untyped ;
-; PORT_PHASESTEP ; PORT_UNUSED ; Untyped ;
-; PORT_PHASEUPDOWN ; PORT_UNUSED ; Untyped ;
-; PORT_SCANCLKENA ; PORT_USED ; Untyped ;
-; PORT_PHASECOUNTERSELECT ; PORT_UNUSED ; Untyped ;
-; PORT_VCOOVERRANGE ; PORT_CONNECTIVITY ; Untyped ;
-; PORT_VCOUNDERRANGE ; PORT_CONNECTIVITY ; Untyped ;
-; M_TEST_SOURCE ; 5 ; Untyped ;
-; C0_TEST_SOURCE ; 5 ; Untyped ;
-; C1_TEST_SOURCE ; 5 ; Untyped ;
-; C2_TEST_SOURCE ; 5 ; Untyped ;
-; C3_TEST_SOURCE ; 5 ; Untyped ;
-; C4_TEST_SOURCE ; 5 ; Untyped ;
-; C5_TEST_SOURCE ; 5 ; Untyped ;
-; C6_TEST_SOURCE ; 5 ; Untyped ;
-; C7_TEST_SOURCE ; 5 ; Untyped ;
-; C8_TEST_SOURCE ; 5 ; Untyped ;
-; C9_TEST_SOURCE ; 5 ; Untyped ;
-; CBXI_PARAMETER ; altpll_c6j2 ; Untyped ;
-; VCO_FREQUENCY_CONTROL ; AUTO ; Untyped ;
-; VCO_PHASE_SHIFT_STEP ; 0 ; Untyped ;
-; WIDTH_CLOCK ; 5 ; Untyped ;
-; WIDTH_PHASECOUNTERSELECT ; 4 ; Untyped ;
-; USING_FBMIMICBIDIR_PORT ; OFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; SCAN_CHAIN_MIF_FILE ; altpll4.mif ; Untyped ;
-; SIM_GATE_LOCK_DEVICE_BEHAVIOR ; OFF ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+-------------------------------+-------------------+---------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component ;
-+-----------------+-------+---------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+-----------------+-------+---------------------------------------------------------------------------------------------------------------+
-; WIDTH_BYTEENA_A ; 1 ; Untyped ;
-; WIDTH_BYTEENA_B ; 1 ; Untyped ;
-+-----------------+-------+---------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4 ;
-+------------------------------------+----------------------+----------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+----------------------+----------------------------------------------------------------------------------------------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; SINGLE_PORT ; Untyped ;
-; WIDTH_A ; 1 ; Untyped ;
-; WIDTHAD_A ; 8 ; Untyped ;
-; NUMWORDS_A ; 144 ; Untyped ;
-; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 1 ; Untyped ;
-; WIDTHAD_B ; 1 ; Untyped ;
-; NUMWORDS_B ; 1 ; Untyped ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Untyped ;
-; WIDTH_BYTEENA_B ; 1 ; Untyped ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
-; INIT_FILE ; UNUSED ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_46r ; Untyped ;
-+------------------------------------+----------------------+----------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub5 ;
-+------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 9 ; Untyped ;
-; LPM_REPRESENTATION ; SIGNED ; Untyped ;
-; LPM_DIRECTION ; DEFAULT ; Untyped ;
-; ONE_INPUT_IS_CONSTANT ; NO ; Untyped ;
-; LPM_PIPELINE ; 0 ; Untyped ;
-; MAXIMIZE_SPEED ; 5 ; Untyped ;
-; REGISTERED_AT_END ; 0 ; Untyped ;
-; OPTIMIZE_FOR_SPEED ; 9 ; Untyped ;
-; USE_CS_BUFFERS ; 1 ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; USE_WYS ; OFF ; Untyped ;
-; STYLE ; FAST ; Untyped ;
-; CBXI_PARAMETER ; add_sub_hpa ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub6 ;
-+------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Untyped ;
-; LPM_REPRESENTATION ; SIGNED ; Untyped ;
-; LPM_DIRECTION ; DEFAULT ; Untyped ;
-; ONE_INPUT_IS_CONSTANT ; NO ; Untyped ;
-; LPM_PIPELINE ; 0 ; Untyped ;
-; MAXIMIZE_SPEED ; 5 ; Untyped ;
-; REGISTERED_AT_END ; 0 ; Untyped ;
-; OPTIMIZE_FOR_SPEED ; 9 ; Untyped ;
-; USE_CS_BUFFERS ; 1 ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; USE_WYS ; OFF ; Untyped ;
-; STYLE ; FAST ; Untyped ;
-; CBXI_PARAMETER ; add_sub_k8a ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7 ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-; lpm_width ; 8 ; Untyped ;
-; LPM_REPRESENTATION ; UNSIGNED ; Untyped ;
-; LPM_PIPELINE ; 0 ; Untyped ;
-; CHAIN_SIZE ; 8 ; Untyped ;
-; ONE_INPUT_IS_CONSTANT ; NO ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CASCADE_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; CASCADE_CHAIN_LENGTH ; 2 ; CASCADE_CHAIN_LENGTH ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; cmpr_tnd ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1 ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 8 ; Untyped ;
-; LPM_DIRECTION ; DOWN ; Untyped ;
-; LPM_MODULUS ; 144 ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_PORT_UPDOWN ; PORT_UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
-; CARRY_CNT_EN ; SMART ; Untyped ;
-; LABWIDE_SCLR ; ON ; Untyped ;
-; USE_NEW_VERSION ; TRUE ; Untyped ;
-; CBXI_PARAMETER ; cntr_30l ; Untyped ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr12 ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 8 ; Untyped ;
-; LPM_DIRECTION ; DOWN ; Untyped ;
-; LPM_MODULUS ; 144 ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_PORT_UPDOWN ; PORT_UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
-; CARRY_CNT_EN ; SMART ; Untyped ;
-; LABWIDE_SCLR ; ON ; Untyped ;
-; USE_NEW_VERSION ; TRUE ; Untyped ;
-; CBXI_PARAMETER ; cntr_30l ; Untyped ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13 ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 6 ; Untyped ;
-; LPM_DIRECTION ; DOWN ; Untyped ;
-; LPM_MODULUS ; 0 ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_PORT_UPDOWN ; PORT_UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
-; CARRY_CNT_EN ; SMART ; Untyped ;
-; LABWIDE_SCLR ; ON ; Untyped ;
-; USE_NEW_VERSION ; TRUE ; Untyped ;
-; CBXI_PARAMETER ; cntr_qij ; Untyped ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14 ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 5 ; Untyped ;
-; LPM_DIRECTION ; DOWN ; Untyped ;
-; LPM_MODULUS ; 0 ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_PORT_UPDOWN ; PORT_UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
-; CARRY_CNT_EN ; SMART ; Untyped ;
-; LABWIDE_SCLR ; ON ; Untyped ;
-; USE_NEW_VERSION ; TRUE ; Untyped ;
-; CBXI_PARAMETER ; cntr_pij ; Untyped ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr15 ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 8 ; Untyped ;
-; LPM_DIRECTION ; DOWN ; Untyped ;
-; LPM_MODULUS ; 144 ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_PORT_UPDOWN ; PORT_UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
-; CARRY_CNT_EN ; SMART ; Untyped ;
-; LABWIDE_SCLR ; ON ; Untyped ;
-; USE_NEW_VERSION ; TRUE ; Untyped ;
-; CBXI_PARAMETER ; cntr_30l ; Untyped ;
-+------------------------+-------------+---------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2 ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 8 ; Untyped ;
-; LPM_DIRECTION ; UP ; Untyped ;
-; LPM_MODULUS ; 0 ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_PORT_UPDOWN ; PORT_UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
-; CARRY_CNT_EN ; SMART ; Untyped ;
-; LABWIDE_SCLR ; ON ; Untyped ;
-; USE_NEW_VERSION ; TRUE ; Untyped ;
-; CBXI_PARAMETER ; cntr_9cj ; Untyped ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr3 ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 5 ; Untyped ;
-; LPM_DIRECTION ; DOWN ; Untyped ;
-; LPM_MODULUS ; 0 ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_PORT_UPDOWN ; PORT_UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
-; CARRY_CNT_EN ; SMART ; Untyped ;
-; LABWIDE_SCLR ; ON ; Untyped ;
-; USE_NEW_VERSION ; TRUE ; Untyped ;
-; CBXI_PARAMETER ; cntr_pij ; Untyped ;
-+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_decode:decode11 ;
-+------------------------+-------------+----------------------------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+----------------------------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 3 ; Untyped ;
-; LPM_DECODES ; 5 ; Untyped ;
-; LPM_PIPELINE ; 0 ; Untyped ;
-; CASCADE_CHAIN ; MANUAL ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; decode_2af ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+----------------------------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: lpm_ff0:inst1|lpm_ff:lpm_ff_component ;
-+------------------------+-------------+---------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+---------------------------------------------+
-; LPM_WIDTH ; 32 ; Signed Integer ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_FFTYPE ; DFF ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; NOTHING ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-+------------------------+-------------+---------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: interrupt_handler:nobody|lpm_bustri_BYT:$00000|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: interrupt_handler:nobody|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: interrupt_handler:nobody|lpm_bustri_BYT:$00004|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: interrupt_handler:nobody|lpm_bustri_BYT:$00006|lpm_bustri:lpm_bustri_component ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-; LPM_WIDTH ; 8 ; Signed Integer ;
-+----------------+-------+----------------------------------------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+----------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: lpm_counter0:inst18|lpm_counter:lpm_counter_component ;
-+------------------------+-------------+-------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+-------------+-------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTH ; 18 ; Signed Integer ;
-; LPM_DIRECTION ; UP ; Untyped ;
-; LPM_MODULUS ; 0 ; Untyped ;
-; LPM_AVALUE ; UNUSED ; Untyped ;
-; LPM_SVALUE ; UNUSED ; Untyped ;
-; LPM_PORT_UPDOWN ; PORT_UNUSED ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
-; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
-; CARRY_CNT_EN ; SMART ; Untyped ;
-; LABWIDE_SCLR ; ON ; Untyped ;
-; USE_NEW_VERSION ; TRUE ; Untyped ;
-; CBXI_PARAMETER ; cntr_mph ; Untyped ;
-+------------------------+-------------+-------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altddio_out3:inst5|altddio_out:altddio_out_component ;
-+------------------------+--------------+-----------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+--------------+-----------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH ; 1 ; Signed Integer ;
-; POWER_UP_HIGH ; OFF ; Untyped ;
-; OE_REG ; UNUSED ; Untyped ;
-; extend_oe_disable ; UNUSED ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; ddio_out_31f ; Untyped ;
-+------------------------+--------------+-----------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altddio_out3:inst6|altddio_out:altddio_out_component ;
-+------------------------+--------------+-----------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+--------------+-----------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH ; 1 ; Signed Integer ;
-; POWER_UP_HIGH ; OFF ; Untyped ;
-; OE_REG ; UNUSED ; Untyped ;
-; extend_oe_disable ; UNUSED ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; ddio_out_31f ; Untyped ;
-+------------------------+--------------+-----------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altddio_out3:inst8|altddio_out:altddio_out_component ;
-+------------------------+--------------+-----------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+--------------+-----------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH ; 1 ; Signed Integer ;
-; POWER_UP_HIGH ; OFF ; Untyped ;
-; OE_REG ; UNUSED ; Untyped ;
-; extend_oe_disable ; UNUSED ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; ddio_out_31f ; Untyped ;
-+------------------------+--------------+-----------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: altddio_out3:inst9|altddio_out:altddio_out_component ;
-+------------------------+--------------+-----------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------+--------------+-----------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH ; 1 ; Signed Integer ;
-; POWER_UP_HIGH ; OFF ; Untyped ;
-; OE_REG ; UNUSED ; Untyped ;
-; extend_oe_disable ; UNUSED ; Untyped ;
-; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CBXI_PARAMETER ; ddio_out_31f ; Untyped ;
-+------------------------+--------------+-----------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for Inferred Entity Instance: Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14 ;
-+------------------------------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------------------+-------------+---------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTHA ; 12 ; Untyped ;
-; LPM_WIDTHB ; 6 ; Untyped ;
-; LPM_WIDTHP ; 18 ; Untyped ;
-; LPM_WIDTHR ; 18 ; Untyped ;
-; LPM_WIDTHS ; 1 ; Untyped ;
-; LPM_REPRESENTATION ; UNSIGNED ; Untyped ;
-; LPM_PIPELINE ; 0 ; Untyped ;
-; LATENCY ; 0 ; Untyped ;
-; INPUT_A_IS_CONSTANT ; NO ; Untyped ;
-; INPUT_B_IS_CONSTANT ; NO ; Untyped ;
-; USE_EAB ; OFF ; Untyped ;
-; MAXIMIZE_SPEED ; 5 ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; APEX20K_TECHNOLOGY_MAPPER ; LUT ; TECH_MAPPER_APEX20K ;
-; DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO ; Untyped ;
-; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO ; 0 ; Untyped ;
-; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0 ; Untyped ;
-; CBXI_PARAMETER ; mult_cat ; Untyped ;
-; INPUT_A_FIXED_VALUE ; Bx ; Untyped ;
-; INPUT_B_FIXED_VALUE ; Bx ; Untyped ;
-; USE_AHDL_IMPLEMENTATION ; OFF ; Untyped ;
-+------------------------------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for Inferred Entity Instance: Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6 ;
-+------------------------------------------------+-------------+--------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------------------+-------------+--------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTHA ; 12 ; Untyped ;
-; LPM_WIDTHB ; 5 ; Untyped ;
-; LPM_WIDTHP ; 17 ; Untyped ;
-; LPM_WIDTHR ; 17 ; Untyped ;
-; LPM_WIDTHS ; 1 ; Untyped ;
-; LPM_REPRESENTATION ; UNSIGNED ; Untyped ;
-; LPM_PIPELINE ; 0 ; Untyped ;
-; LATENCY ; 0 ; Untyped ;
-; INPUT_A_IS_CONSTANT ; NO ; Untyped ;
-; INPUT_B_IS_CONSTANT ; NO ; Untyped ;
-; USE_EAB ; OFF ; Untyped ;
-; MAXIMIZE_SPEED ; 5 ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; APEX20K_TECHNOLOGY_MAPPER ; LUT ; TECH_MAPPER_APEX20K ;
-; DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO ; Untyped ;
-; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO ; 0 ; Untyped ;
-; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0 ; Untyped ;
-; CBXI_PARAMETER ; mult_aat ; Untyped ;
-; INPUT_A_FIXED_VALUE ; Bx ; Untyped ;
-; INPUT_B_FIXED_VALUE ; Bx ; Untyped ;
-; USE_AHDL_IMPLEMENTATION ; OFF ; Untyped ;
-+------------------------------------------------+-------------+--------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------------------------------------------------------------------+
-; Parameter Settings for Inferred Entity Instance: Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_12 ;
-+------------------------------------------------+-------------+---------------------------------------------------------------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------------------+-------------+---------------------------------------------------------------------+
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; LPM_WIDTHA ; 12 ; Untyped ;
-; LPM_WIDTHB ; 5 ; Untyped ;
-; LPM_WIDTHP ; 17 ; Untyped ;
-; LPM_WIDTHR ; 17 ; Untyped ;
-; LPM_WIDTHS ; 1 ; Untyped ;
-; LPM_REPRESENTATION ; UNSIGNED ; Untyped ;
-; LPM_PIPELINE ; 0 ; Untyped ;
-; LATENCY ; 0 ; Untyped ;
-; INPUT_A_IS_CONSTANT ; NO ; Untyped ;
-; INPUT_B_IS_CONSTANT ; NO ; Untyped ;
-; USE_EAB ; OFF ; Untyped ;
-; MAXIMIZE_SPEED ; 5 ; Untyped ;
-; DEVICE_FAMILY ; Cyclone III ; Untyped ;
-; CARRY_CHAIN ; MANUAL ; Untyped ;
-; APEX20K_TECHNOLOGY_MAPPER ; LUT ; TECH_MAPPER_APEX20K ;
-; DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO ; Untyped ;
-; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO ; 0 ; Untyped ;
-; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0 ; Untyped ;
-; CBXI_PARAMETER ; mult_aat ; Untyped ;
-; INPUT_A_FIXED_VALUE ; Bx ; Untyped ;
-; INPUT_B_FIXED_VALUE ; Bx ; Untyped ;
-; USE_AHDL_IMPLEMENTATION ; OFF ; Untyped ;
-+------------------------------------------------+-------------+---------------------------------------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+------------------------------------------------------------------------+
-; altpll Parameter Settings by Entity Instance ;
-+-------------------------------+----------------------------------------+
-; Name ; Value ;
-+-------------------------------+----------------------------------------+
-; Number of entity instances ; 4 ;
-; Entity Instance ; altpll1:inst|altpll:altpll_component ;
-; -- OPERATION_MODE ; SOURCE_SYNCHRONOUS ;
-; -- PLL_TYPE ; AUTO ;
-; -- PRIMARY_CLOCK ; INCLK0 ;
-; -- INCLK0_INPUT_FREQUENCY ; 30303 ;
-; -- INCLK1_INPUT_FREQUENCY ; 0 ;
-; -- VCO_MULTIPLY_BY ; 0 ;
-; -- VCO_DIVIDE_BY ; 0 ;
-; Entity Instance ; altpll3:inst13|altpll:altpll_component ;
-; -- OPERATION_MODE ; SOURCE_SYNCHRONOUS ;
-; -- PLL_TYPE ; AUTO ;
-; -- PRIMARY_CLOCK ; INCLK0 ;
-; -- INCLK0_INPUT_FREQUENCY ; 30303 ;
-; -- INCLK1_INPUT_FREQUENCY ; 0 ;
-; -- VCO_MULTIPLY_BY ; 0 ;
-; -- VCO_DIVIDE_BY ; 0 ;
-; Entity Instance ; altpll2:inst12|altpll:altpll_component ;
-; -- OPERATION_MODE ; SOURCE_SYNCHRONOUS ;
-; -- PLL_TYPE ; AUTO ;
-; -- PRIMARY_CLOCK ; INCLK0 ;
-; -- INCLK0_INPUT_FREQUENCY ; 30303 ;
-; -- INCLK1_INPUT_FREQUENCY ; 0 ;
-; -- VCO_MULTIPLY_BY ; 0 ;
-; -- VCO_DIVIDE_BY ; 0 ;
-; Entity Instance ; altpll4:inst22|altpll:altpll_component ;
-; -- OPERATION_MODE ; NORMAL ;
-; -- PLL_TYPE ; AUTO ;
-; -- PRIMARY_CLOCK ; INCLK0 ;
-; -- INCLK0_INPUT_FREQUENCY ; 20833 ;
-; -- INCLK1_INPUT_FREQUENCY ; 0 ;
-; -- VCO_MULTIPLY_BY ; 0 ;
-; -- VCO_DIVIDE_BY ; 0 ;
-+-------------------------------+----------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------+
-; lpm_shiftreg Parameter Settings by Entity Instance ;
-+----------------------------+---------------------------------------------------------------------------------+
-; Name ; Value ;
-+----------------------------+---------------------------------------------------------------------------------+
-; Number of entity instances ; 11 ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg6:inst89|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 5 ;
-; -- LPM_DIRECTION ; RIGHT ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 5 ;
-; -- LPM_DIRECTION ; RIGHT ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 5 ;
-; -- LPM_DIRECTION ; RIGHT ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 16 ;
-; -- LPM_DIRECTION ; LEFT ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 16 ;
-; -- LPM_DIRECTION ; LEFT ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 16 ;
-; -- LPM_DIRECTION ; LEFT ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 16 ;
-; -- LPM_DIRECTION ; LEFT ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 16 ;
-; -- LPM_DIRECTION ; LEFT ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 16 ;
-; -- LPM_DIRECTION ; LEFT ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 16 ;
-; -- LPM_DIRECTION ; LEFT ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component ;
-; -- LPM_WIDTH ; 16 ;
-; -- LPM_DIRECTION ; LEFT ;
-+----------------------------+---------------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------+
-; dcfifo Parameter Settings by Entity Instance ;
-+----------------------------+------------------------------------------------------------------+
-; Name ; Value ;
-+----------------------------+------------------------------------------------------------------+
-; Number of entity instances ; 1 ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component ;
-; -- FIFO Type ; Dual Clock ;
-; -- LPM_WIDTH ; 128 ;
-; -- LPM_NUMWORDS ; 512 ;
-; -- LPM_SHOWAHEAD ; OFF ;
-; -- USE_EAB ; ON ;
-+----------------------------+------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------+
-; scfifo Parameter Settings by Entity Instance ;
-+----------------------------+------------------------------------------------------------------+
-; Name ; Value ;
-+----------------------------+------------------------------------------------------------------+
-; Number of entity instances ; 1 ;
-; Entity Instance ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component ;
-; -- FIFO Type ; Single Clock ;
-; -- lpm_width ; 128 ;
-; -- LPM_NUMWORDS ; 128 ;
-; -- LPM_SHOWAHEAD ; ON ;
-; -- USE_EAB ; ON ;
-+----------------------------+------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; altsyncram Parameter Settings by Entity Instance ;
-+-------------------------------------------+-------------------------------------------------------------------------------------------------------------------+
-; Name ; Value ;
-+-------------------------------------------+-------------------------------------------------------------------------------------------------------------------+
-; Number of entity instances ; 10 ;
-; Entity Instance ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component ;
-; -- OPERATION_MODE ; BIDIR_DUAL_PORT ;
-; -- WIDTH_A ; 6 ;
-; -- NUMWORDS_A ; 256 ;
-; -- OUTDATA_REG_A ; CLOCK0 ;
-; -- WIDTH_B ; 6 ;
-; -- NUMWORDS_B ; 256 ;
-; -- ADDRESS_REG_B ; CLOCK1 ;
-; -- OUTDATA_REG_B ; CLOCK1 ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
-; Entity Instance ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component ;
-; -- OPERATION_MODE ; BIDIR_DUAL_PORT ;
-; -- WIDTH_A ; 6 ;
-; -- NUMWORDS_A ; 256 ;
-; -- OUTDATA_REG_A ; CLOCK0 ;
-; -- WIDTH_B ; 6 ;
-; -- NUMWORDS_B ; 256 ;
-; -- ADDRESS_REG_B ; CLOCK1 ;
-; -- OUTDATA_REG_B ; CLOCK1 ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
-; Entity Instance ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component ;
-; -- OPERATION_MODE ; BIDIR_DUAL_PORT ;
-; -- WIDTH_A ; 6 ;
-; -- NUMWORDS_A ; 256 ;
-; -- OUTDATA_REG_A ; CLOCK0 ;
-; -- WIDTH_B ; 6 ;
-; -- NUMWORDS_B ; 256 ;
-; -- ADDRESS_REG_B ; CLOCK1 ;
-; -- OUTDATA_REG_B ; CLOCK1 ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
-; Entity Instance ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component ;
-; -- OPERATION_MODE ; BIDIR_DUAL_PORT ;
-; -- WIDTH_A ; 3 ;
-; -- NUMWORDS_A ; 16 ;
-; -- OUTDATA_REG_A ; CLOCK0 ;
-; -- WIDTH_B ; 3 ;
-; -- NUMWORDS_B ; 16 ;
-; -- ADDRESS_REG_B ; CLOCK1 ;
-; -- OUTDATA_REG_B ; CLOCK1 ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
-; Entity Instance ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component ;
-; -- OPERATION_MODE ; BIDIR_DUAL_PORT ;
-; -- WIDTH_A ; 3 ;
-; -- NUMWORDS_A ; 16 ;
-; -- OUTDATA_REG_A ; CLOCK0 ;
-; -- WIDTH_B ; 3 ;
-; -- NUMWORDS_B ; 16 ;
-; -- ADDRESS_REG_B ; CLOCK1 ;
-; -- OUTDATA_REG_B ; CLOCK1 ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
-; Entity Instance ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component ;
-; -- OPERATION_MODE ; BIDIR_DUAL_PORT ;
-; -- WIDTH_A ; 3 ;
-; -- NUMWORDS_A ; 16 ;
-; -- OUTDATA_REG_A ; CLOCK0 ;
-; -- WIDTH_B ; 3 ;
-; -- NUMWORDS_B ; 16 ;
-; -- ADDRESS_REG_B ; CLOCK1 ;
-; -- OUTDATA_REG_B ; CLOCK1 ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
-; Entity Instance ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component ;
-; -- OPERATION_MODE ; BIDIR_DUAL_PORT ;
-; -- WIDTH_A ; 8 ;
-; -- NUMWORDS_A ; 256 ;
-; -- OUTDATA_REG_A ; CLOCK0 ;
-; -- WIDTH_B ; 8 ;
-; -- NUMWORDS_B ; 256 ;
-; -- ADDRESS_REG_B ; CLOCK1 ;
-; -- OUTDATA_REG_B ; CLOCK1 ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
-; Entity Instance ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component ;
-; -- OPERATION_MODE ; BIDIR_DUAL_PORT ;
-; -- WIDTH_A ; 8 ;
-; -- NUMWORDS_A ; 256 ;
-; -- OUTDATA_REG_A ; CLOCK0 ;
-; -- WIDTH_B ; 8 ;
-; -- NUMWORDS_B ; 256 ;
-; -- ADDRESS_REG_B ; CLOCK1 ;
-; -- OUTDATA_REG_B ; CLOCK1 ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
-; Entity Instance ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component ;
-; -- OPERATION_MODE ; BIDIR_DUAL_PORT ;
-; -- WIDTH_A ; 8 ;
-; -- NUMWORDS_A ; 256 ;
-; -- OUTDATA_REG_A ; CLOCK0 ;
-; -- WIDTH_B ; 8 ;
-; -- NUMWORDS_B ; 256 ;
-; -- ADDRESS_REG_B ; CLOCK1 ;
-; -- OUTDATA_REG_B ; CLOCK1 ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
-; Entity Instance ; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4 ;
-; -- OPERATION_MODE ; SINGLE_PORT ;
-; -- WIDTH_A ; 1 ;
-; -- NUMWORDS_A ; 144 ;
-; -- OUTDATA_REG_A ; UNREGISTERED ;
-; -- WIDTH_B ; 1 ;
-; -- NUMWORDS_B ; 1 ;
-; -- ADDRESS_REG_B ; CLOCK1 ;
-; -- OUTDATA_REG_B ; UNREGISTERED ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
-+-------------------------------------------+-------------------------------------------------------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; lpm_mult Parameter Settings by Entity Instance ;
-+---------------------------------------+-----------------------------------------------------------------------------------+
-; Name ; Value ;
-+---------------------------------------+-----------------------------------------------------------------------------------+
-; Number of entity instances ; 3 ;
-; Entity Instance ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14 ;
-; -- LPM_WIDTHA ; 12 ;
-; -- LPM_WIDTHB ; 6 ;
-; -- LPM_WIDTHP ; 18 ;
-; -- LPM_REPRESENTATION ; UNSIGNED ;
-; -- INPUT_A_IS_CONSTANT ; NO ;
-; -- INPUT_B_IS_CONSTANT ; NO ;
-; -- USE_EAB ; OFF ;
-; -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO ;
-; -- INPUT_A_FIXED_VALUE ; Bx ;
-; -- INPUT_B_FIXED_VALUE ; Bx ;
-; Entity Instance ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6 ;
-; -- LPM_WIDTHA ; 12 ;
-; -- LPM_WIDTHB ; 5 ;
-; -- LPM_WIDTHP ; 17 ;
-; -- LPM_REPRESENTATION ; UNSIGNED ;
-; -- INPUT_A_IS_CONSTANT ; NO ;
-; -- INPUT_B_IS_CONSTANT ; NO ;
-; -- USE_EAB ; OFF ;
-; -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO ;
-; -- INPUT_A_FIXED_VALUE ; Bx ;
-; -- INPUT_B_FIXED_VALUE ; Bx ;
-; Entity Instance ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_12 ;
-; -- LPM_WIDTHA ; 12 ;
-; -- LPM_WIDTHB ; 5 ;
-; -- LPM_WIDTHP ; 17 ;
-; -- LPM_REPRESENTATION ; UNSIGNED ;
-; -- INPUT_A_IS_CONSTANT ; NO ;
-; -- INPUT_B_IS_CONSTANT ; NO ;
-; -- USE_EAB ; OFF ;
-; -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO ;
-; -- INPUT_A_FIXED_VALUE ; Bx ;
-; -- INPUT_B_FIXED_VALUE ; Bx ;
-+---------------------------------------+-----------------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------+
-; Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND" ;
-+-------------+--------+----------+-------------------------------------------------------------------------------------+
-; Port ; Type ; Severity ; Details ;
-+-------------+--------+----------+-------------------------------------------------------------------------------------+
-; seln ; Input ; Info ; Stuck at VCC ;
-; bc2 ; Input ; Info ; Stuck at VCC ;
-; a9n ; Input ; Info ; Stuck at GND ;
-; a8 ; Input ; Info ; Stuck at VCC ;
-; da_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; io_a_in ; Input ; Info ; Stuck at GND ;
-; io_a_out[2] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; io_a_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; io_b_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-+-------------+--------+----------+-------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------+
-; Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP" ;
-+----------+--------+----------+-------------------------------------------------------------------------------------+
-; Port ; Type ; Severity ; Details ;
-+----------+--------+----------+-------------------------------------------------------------------------------------+
-; data_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; gpip_out ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; gpip_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; iein ; Input ; Info ; Stuck at GND ;
-; ieon ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; tai ; Input ; Info ; Stuck at GND ;
-; tao ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; tbo ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; tco ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; so_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; rrn ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; trn ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-+----------+--------+----------+-------------------------------------------------------------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------+
-; Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI" ;
-+---------+--------+----------+------------------------------------------------------------------------------------------+
-; Port ; Type ; Severity ; Details ;
-+---------+--------+----------+------------------------------------------------------------------------------------------+
-; cs2n ; Input ; Info ; Stuck at GND ;
-; data_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; ctsn ; Input ; Info ; Stuck at GND ;
-; dcdn ; Input ; Info ; Stuck at GND ;
-; rtsn ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-+---------+--------+----------+------------------------------------------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------+
-; Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD" ;
-+---------+--------+----------+----------------------------------------------------------------------------------------------+
-; Port ; Type ; Severity ; Details ;
-+---------+--------+----------+----------------------------------------------------------------------------------------------+
-; cs1 ; Input ; Info ; Stuck at VCC ;
-; data_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; ctsn ; Input ; Info ; Stuck at GND ;
-; dcdn ; Input ; Info ; Stuck at GND ;
-; rtsn ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-+---------+--------+----------+----------------------------------------------------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------+
-; Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS" ;
-+------------+--------+----------+-------------------------------------------------------------------------------------------------------------+
-; Port ; Type ; Severity ; Details ;
-+------------+--------+----------+-------------------------------------------------------------------------------------------------------------+
-; icr_out[7] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; icr_out[5] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-+------------+--------+----------+-------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------+
-; Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI" ;
-+----------+--------+----------+-------------------------------------------------------------------------------------+
-; Port ; Type ; Severity ; Details ;
-+----------+--------+----------+-------------------------------------------------------------------------------------+
-; data_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; csn ; Input ; Info ; Stuck at VCC ;
-; eopn ; Input ; Info ; Stuck at VCC ;
-; ready ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; ack_inn ; Input ; Info ; Stuck at VCC ;
-; ack_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; atn_inn ; Input ; Info ; Stuck at VCC ;
-; atn_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; req_outn ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; req_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; ion_out ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; io_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; cdn_out ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; cd_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; msg_outn ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; msg_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-+----------+--------+----------+-------------------------------------------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------+
-; Port Connectivity Checks: "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC" ;
-+---------+--------+----------+-------------------------------------------------------------------------------------+
-; Port ; Type ; Severity ; Details ;
-+---------+--------+----------+-------------------------------------------------------------------------------------+
-; data_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-; dden ; Input ; Info ; Stuck at GND ;
-+---------+--------+----------+-------------------------------------------------------------------------------------+
-
-
-+-------------------------------+
-; Analysis & Synthesis Messages ;
-+-------------------------------+
-Info: *******************************************************************
-Info: Running Quartus II Analysis & Synthesis
- Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
- Info: Processing started: Wed Dec 15 02:20:37 2010
-Info: Command: quartus_map --read_settings_files=on --write_settings_files=off firebeei1 -c firebee1
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf5380/wf5380_control.vhd
- Info: Found design unit 1: WF5380_CONTROL-BEHAVIOUR
- Info: Found entity 1: WF5380_CONTROL
-Info: Found 1 design units, including 0 entities, in source file falconio_sdcard_ide_cf/wf5380/wf5380_pkg.vhd
- Info: Found design unit 1: WF5380_PKG
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf5380/wf5380_registers.vhd
- Info: Found design unit 1: WF5380_REGISTERS-BEHAVIOUR
- Info: Found entity 1: WF5380_REGISTERS
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf5380/wf5380_soc_top.vhd
- Info: Found design unit 1: WF5380_TOP_SOC-STRUCTURE
- Info: Found entity 1: WF5380_TOP_SOC
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf5380/wf5380_top.vhd
- Info: Found design unit 1: WF5380_TOP-STRUCTURE
- Info: Found entity 1: WF5380_TOP
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_fdc1772_ip/wf1772ip_am_detector.vhd
- Info: Found design unit 1: WF1772IP_AM_DETECTOR-BEHAVIOR
- Info: Found entity 1: WF1772IP_AM_DETECTOR
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/dcfifo0.vhd
- Info: Found design unit 1: dcfifo0-SYN
- Info: Found entity 1: dcfifo0
-Info: Found 1 design units, including 1 entities, in source file video/ddr_ctr.tdf
- Info: Found entity 1: DDR_CTR
-Info: Found 2 design units, including 1 entities, in source file video/lpm_bustri0.vhd
- Info: Found design unit 1: lpm_bustri0-SYN
- Info: Found entity 1: lpm_bustri0
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_fdc1772_ip/wf1772ip_control.vhd
- Info: Found design unit 1: WF1772IP_CONTROL-BEHAVIOR
- Info: Found entity 1: WF1772IP_CONTROL
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_fdc1772_ip/wf1772ip_crc_logic.vhd
- Info: Found design unit 1: WF1772IP_CRC_LOGIC-BEHAVIOR
- Info: Found entity 1: WF1772IP_CRC_LOGIC
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_fdc1772_ip/wf1772ip_digital_pll.vhd
- Info: Found design unit 1: WF1772IP_DIGITAL_PLL-BEHAVIOR
- Info: Found entity 1: WF1772IP_DIGITAL_PLL
-Info: Found 1 design units, including 0 entities, in source file falconio_sdcard_ide_cf/wf_fdc1772_ip/wf1772ip_pkg.vhd
- Info: Found design unit 1: WF1772IP_PKG
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_fdc1772_ip/wf1772ip_registers.vhd
- Info: Found design unit 1: WF1772IP_REGISTERS-BEHAVIOR
- Info: Found entity 1: WF1772IP_REGISTERS
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_fdc1772_ip/wf1772ip_top.vhd
- Info: Found design unit 1: WF1772IP_TOP-STRUCTURE
- Info: Found entity 1: WF1772IP_TOP
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_fdc1772_ip/wf1772ip_top_soc.vhd
- Info: Found design unit 1: WF1772IP_TOP_SOC-STRUCTURE
- Info: Found entity 1: WF1772IP_TOP_SOC
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_fdc1772_ip/wf1772ip_transceiver.vhd
- Info: Found design unit 1: WF1772IP_TRANSCEIVER-BEHAVIOR
- Info: Found entity 1: WF1772IP_TRANSCEIVER
-Info: Found 2 design units, including 1 entities, in source file video/lpm_bustri5.vhd
- Info: Found design unit 1: lpm_bustri5-SYN
- Info: Found entity 1: lpm_bustri5
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_uart6850_ip/wf6850ip_ctrl_status.vhd
- Info: Found design unit 1: WF6850IP_CTRL_STATUS-BEHAVIOR
- Info: Found entity 1: WF6850IP_CTRL_STATUS
-Info: Found 2 design units, including 1 entities, in source file video/lpm_bustri7.vhd
- Info: Found design unit 1: lpm_bustri7-SYN
- Info: Found entity 1: lpm_bustri7
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_uart6850_ip/wf6850ip_receive.vhd
- Info: Found design unit 1: WF6850IP_RECEIVE-BEHAVIOR
- Info: Found entity 1: WF6850IP_RECEIVE
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_uart6850_ip/wf6850ip_top.vhd
- Info: Found design unit 1: WF6850IP_TOP-STRUCTURE
- Info: Found entity 1: WF6850IP_TOP
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_uart6850_ip/wf6850ip_top_soc.vhd
- Info: Found design unit 1: WF6850IP_TOP_SOC-STRUCTURE
- Info: Found entity 1: WF6850IP_TOP_SOC
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_uart6850_ip/wf6850ip_transmit.vhd
- Info: Found design unit 1: WF6850IP_TRANSMIT-BEHAVIOR
- Info: Found entity 1: WF6850IP_TRANSMIT
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_mfp68901_ip/wf68901ip_gpio.vhd
- Info: Found design unit 1: WF68901IP_GPIO-BEHAVIOR
- Info: Found entity 1: WF68901IP_GPIO
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_mfp68901_ip/wf68901ip_interrupts.vhd
- Info: Found design unit 1: WF68901IP_INTERRUPTS-BEHAVIOR
- Info: Found entity 1: WF68901IP_INTERRUPTS
-Info: Found 1 design units, including 0 entities, in source file falconio_sdcard_ide_cf/wf_mfp68901_ip/wf68901ip_pkg.vhd
- Info: Found design unit 1: WF68901IP_PKG
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_mfp68901_ip/wf68901ip_timers.vhd
- Info: Found design unit 1: WF68901IP_TIMERS-BEHAVIOR
- Info: Found entity 1: WF68901IP_TIMERS
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_mfp68901_ip/wf68901ip_top.vhd
- Info: Found design unit 1: WF68901IP_TOP-STRUCTURE
- Info: Found entity 1: WF68901IP_TOP
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_mfp68901_ip/wf68901ip_top_soc.vhd
- Info: Found design unit 1: WF68901IP_TOP_SOC-STRUCTURE
- Info: Found entity 1: WF68901IP_TOP_SOC
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_mfp68901_ip/wf68901ip_usart_ctrl.vhd
- Info: Found design unit 1: WF68901IP_USART_CTRL-BEHAVIOR
- Info: Found entity 1: WF68901IP_USART_CTRL
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_mfp68901_ip/wf68901ip_usart_rx.vhd
- Info: Found design unit 1: WF68901IP_USART_RX-BEHAVIOR
- Info: Found entity 1: WF68901IP_USART_RX
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_mfp68901_ip/wf68901ip_usart_top.vhd
- Info: Found design unit 1: WF68901IP_USART_TOP-STRUCTURE
- Info: Found entity 1: WF68901IP_USART_TOP
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_mfp68901_ip/wf68901ip_usart_tx.vhd
- Info: Found design unit 1: WF68901IP_USART_TX-BEHAVIOR
- Info: Found entity 1: WF68901IP_USART_TX
-Info: Found 1 design units, including 0 entities, in source file falconio_sdcard_ide_cf/wf_snd2149_ip/wf2149ip_pkg.vhd
- Info: Found design unit 1: WF2149IP_PKG
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_snd2149_ip/wf2149ip_top.vhd
- Info: Found design unit 1: WF2149IP_TOP-STRUCTURE
- Info: Found entity 1: WF2149IP_TOP
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_snd2149_ip/wf2149ip_top_soc.vhd
- Info: Found design unit 1: WF2149IP_TOP_SOC-STRUCTURE
- Info: Found entity 1: WF2149IP_TOP_SOC
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/wf_snd2149_ip/wf2149ip_wave.vhd
- Info: Found design unit 1: WF2149IP_WAVE-BEHAVIOR
- Info: Found entity 1: WF2149IP_WAVE
-Info: Found 2 design units, including 1 entities, in source file lpm_latch0.vhd
- Info: Found design unit 1: lpm_latch0-SYN
- Info: Found entity 1: lpm_latch0
-Info: Found 2 design units, including 1 entities, in source file altpll1.vhd
- Info: Found design unit 1: altpll1-SYN
- Info: Found entity 1: altpll1
-Info: Found 2 design units, including 1 entities, in source file video/lpm_fifodz.vhd
- Info: Found design unit 1: lpm_fifodz-SYN
- Info: Found entity 1: lpm_fifoDZ
-Info: Found 2 design units, including 1 entities, in source file altpll2.vhd
- Info: Found design unit 1: altpll2-SYN
- Info: Found entity 1: altpll2
-Info: Found 2 design units, including 1 entities, in source file altpll3.vhd
- Info: Found design unit 1: altpll3-SYN
- Info: Found entity 1: altpll3
-Info: Found 2 design units, including 1 entities, in source file video/altdpram0.vhd
- Info: Found design unit 1: altdpram0-SYN
- Info: Found entity 1: altdpram0
-Info: Found 2 design units, including 1 entities, in source file video/lpm_muxdz2.vhd
- Info: Found design unit 1: lpm_muxdz2-SYN
- Info: Found entity 1: lpm_muxDZ2
-Info: Found 2 design units, including 1 entities, in source file video/lpm_muxdz.vhd
- Info: Found design unit 1: lpm_muxdz-SYN
- Info: Found entity 1: lpm_muxDZ
-Info: Found 2 design units, including 1 entities, in source file video/lpm_bustri3.vhd
- Info: Found design unit 1: lpm_bustri3-SYN
- Info: Found entity 1: lpm_bustri3
-Info: Found 2 design units, including 1 entities, in source file video/lpm_ff0.vhd
- Info: Found design unit 1: lpm_ff0-SYN
- Info: Found entity 1: lpm_ff0
-Info: Found 2 design units, including 1 entities, in source file video/lpm_ff1.vhd
- Info: Found design unit 1: lpm_ff1-SYN
- Info: Found entity 1: lpm_ff1
-Info: Found 2 design units, including 1 entities, in source file video/lpm_ff3.vhd
- Info: Found design unit 1: lpm_ff3-SYN
- Info: Found entity 1: lpm_ff3
-Info: Found 1 design units, including 1 entities, in source file video/video_mod_mux_clutctr.tdf
- Info: Found entity 1: VIDEO_MOD_MUX_CLUTCTR
-Info: Found 2 design units, including 1 entities, in source file video/lpm_ff2.vhd
- Info: Found design unit 1: lpm_ff2-SYN
- Info: Found entity 1: lpm_ff2
-Info: Found 2 design units, including 1 entities, in source file video/lpm_fifo_dc0.vhd
- Info: Found design unit 1: lpm_fifo_dc0-SYN
- Info: Found entity 1: lpm_fifo_dc0
-Info: Found 1 design units, including 1 entities, in source file video/video.bdf
- Info: Found entity 1: Video
-Info: Found 1 design units, including 1 entities, in source file firebee1.bdf
- Info: Found entity 1: firebee1
-Info: Found 2 design units, including 1 entities, in source file altpll0.vhd
- Info: Found design unit 1: altpll0-SYN
- Info: Found entity 1: altpll0
-Info: Found 2 design units, including 1 entities, in source file lpm_counter0.vhd
- Info: Found design unit 1: lpm_counter0-SYN
- Info: Found entity 1: lpm_counter0
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/falconio_sdcard_ide_cf.vhd
- Info: Found design unit 1: FalconIO_SDCard_IDE_CF-FalconIO_SDCard_IDE_CF_architecture
- Info: Found entity 1: FalconIO_SDCard_IDE_CF
-Info: Found 2 design units, including 1 entities, in source file dsp/dsp.vhd
- Info: Found design unit 1: DSP-DSP_architecture
- Info: Found entity 1: DSP
-Info: Found 2 design units, including 1 entities, in source file video/lpm_shiftreg0.vhd
- Info: Found design unit 1: lpm_shiftreg0-SYN
- Info: Found entity 1: lpm_shiftreg0
-Info: Found 2 design units, including 1 entities, in source file video/lpm_bustri1.vhd
- Info: Found design unit 1: lpm_bustri1-SYN
- Info: Found entity 1: lpm_bustri1
-Info: Found 2 design units, including 1 entities, in source file video/altdpram1.vhd
- Info: Found design unit 1: altdpram1-SYN
- Info: Found entity 1: altdpram1
-Info: Found 2 design units, including 1 entities, in source file video/lpm_bustri2.vhd
- Info: Found design unit 1: lpm_bustri2-SYN
- Info: Found entity 1: lpm_bustri2
-Info: Found 2 design units, including 1 entities, in source file video/lpm_bustri4.vhd
- Info: Found design unit 1: lpm_bustri4-SYN
- Info: Found entity 1: lpm_bustri4
-Info: Found 2 design units, including 1 entities, in source file video/lpm_constant0.vhd
- Info: Found design unit 1: lpm_constant0-SYN
- Info: Found entity 1: lpm_constant0
-Info: Found 2 design units, including 1 entities, in source file video/lpm_constant1.vhd
- Info: Found design unit 1: lpm_constant1-SYN
- Info: Found entity 1: lpm_constant1
-Info: Found 2 design units, including 1 entities, in source file video/lpm_mux0.vhd
- Info: Found design unit 1: lpm_mux0-SYN
- Info: Found entity 1: lpm_mux0
-Info: Found 2 design units, including 1 entities, in source file video/lpm_mux1.vhd
- Info: Found design unit 1: lpm_mux1-SYN
- Info: Found entity 1: lpm_mux1
-Info: Found 2 design units, including 1 entities, in source file video/lpm_mux2.vhd
- Info: Found design unit 1: lpm_mux2-SYN
- Info: Found entity 1: lpm_mux2
-Info: Found 2 design units, including 1 entities, in source file video/lpm_constant2.vhd
- Info: Found design unit 1: lpm_constant2-SYN
- Info: Found entity 1: lpm_constant2
-Info: Found 2 design units, including 1 entities, in source file video/altdpram2.vhd
- Info: Found design unit 1: altdpram2-SYN
- Info: Found entity 1: altdpram2
-Info: Found 2 design units, including 1 entities, in source file video/lpm_bustri6.vhd
- Info: Found design unit 1: lpm_bustri6-SYN
- Info: Found entity 1: lpm_bustri6
-Info: Found 2 design units, including 1 entities, in source file video/lpm_mux3.vhd
- Info: Found design unit 1: lpm_mux3-SYN
- Info: Found entity 1: lpm_mux3
-Info: Found 2 design units, including 1 entities, in source file video/lpm_mux4.vhd
- Info: Found design unit 1: lpm_mux4-SYN
- Info: Found entity 1: lpm_mux4
-Info: Found 2 design units, including 1 entities, in source file video/lpm_constant3.vhd
- Info: Found design unit 1: lpm_constant3-SYN
- Info: Found entity 1: lpm_constant3
-Info: Found 2 design units, including 1 entities, in source file video/lpm_shiftreg1.vhd
- Info: Found design unit 1: lpm_shiftreg1-SYN
- Info: Found entity 1: lpm_shiftreg1
-Info: Found 2 design units, including 1 entities, in source file video/lpm_latch1.vhd
- Info: Found design unit 1: lpm_latch1-SYN
- Info: Found entity 1: lpm_latch1
-Info: Found 2 design units, including 1 entities, in source file video/lpm_constant4.vhd
- Info: Found design unit 1: lpm_constant4-SYN
- Info: Found entity 1: lpm_constant4
-Info: Found 2 design units, including 1 entities, in source file video/lpm_shiftreg2.vhd
- Info: Found design unit 1: lpm_shiftreg2-SYN
- Info: Found entity 1: lpm_shiftreg2
-Info: Found 2 design units, including 1 entities, in source file video/lpm_compare1.vhd
- Info: Found design unit 1: lpm_compare1-SYN
- Info: Found entity 1: lpm_compare1
-Info: Found 1 design units, including 1 entities, in source file interrupt_handler/interrupt_handler.tdf
- Info: Found entity 1: interrupt_handler
-Info: Found 2 design units, including 1 entities, in source file lpm_bustri_long.vhd
- Info: Found design unit 1: lpm_bustri_long-SYN
- Info: Found entity 1: lpm_bustri_LONG
-Info: Found 2 design units, including 1 entities, in source file lpm_bustri_byt.vhd
- Info: Found design unit 1: lpm_bustri_byt-SYN
- Info: Found entity 1: lpm_bustri_BYT
-Info: Found 2 design units, including 1 entities, in source file lpm_bustri_word.vhd
- Info: Found design unit 1: lpm_bustri_word-SYN
- Info: Found entity 1: lpm_bustri_WORD
-Info: Found 2 design units, including 1 entities, in source file video/lpm_ff4.vhd
- Info: Found design unit 1: lpm_ff4-SYN
- Info: Found entity 1: lpm_ff4
-Info: Found 2 design units, including 1 entities, in source file video/lpm_ff5.vhd
- Info: Found design unit 1: lpm_ff5-SYN
- Info: Found entity 1: lpm_ff5
-Info: Found 2 design units, including 1 entities, in source file video/lpm_ff6.vhd
- Info: Found design unit 1: lpm_ff6-SYN
- Info: Found entity 1: lpm_ff6
-Info: Found 2 design units, including 1 entities, in source file video/lpm_shiftreg3.vhd
- Info: Found design unit 1: lpm_shiftreg3-SYN
- Info: Found entity 1: lpm_shiftreg3
-Info: Found 2 design units, including 1 entities, in source file video/altddio_bidir0.vhd
- Info: Found design unit 1: altddio_bidir0-SYN
- Info: Found entity 1: altddio_bidir0
-Info: Found 2 design units, including 1 entities, in source file video/altddio_out0.vhd
- Info: Found design unit 1: altddio_out0-SYN
- Info: Found entity 1: altddio_out0
-Info: Found 2 design units, including 1 entities, in source file video/lpm_mux5.vhd
- Info: Found design unit 1: lpm_mux5-SYN
- Info: Found entity 1: lpm_mux5
-Info: Found 2 design units, including 1 entities, in source file video/blitter/blitter.vhd
- Info: Found design unit 1: BLITTER-BLITTER_architecture
- Info: Found entity 1: BLITTER
-Info: Found 2 design units, including 1 entities, in source file video/lpm_shiftreg5.vhd
- Info: Found design unit 1: lpm_shiftreg5-SYN
- Info: Found entity 1: lpm_shiftreg5
-Info: Found 2 design units, including 1 entities, in source file video/lpm_shiftreg6.vhd
- Info: Found design unit 1: lpm_shiftreg6-SYN
- Info: Found entity 1: lpm_shiftreg6
-Info: Found 2 design units, including 1 entities, in source file video/lpm_shiftreg4.vhd
- Info: Found design unit 1: lpm_shiftreg4-SYN
- Info: Found entity 1: lpm_shiftreg4
-Info: Found 2 design units, including 1 entities, in source file video/altddio_out1.vhd
- Info: Found design unit 1: altddio_out1-SYN
- Info: Found entity 1: altddio_out1
-Info: Found 2 design units, including 1 entities, in source file video/altddio_out2.vhd
- Info: Found design unit 1: altddio_out2-SYN
- Info: Found entity 1: altddio_out2
-Info: Found 2 design units, including 1 entities, in source file altddio_out3.vhd
- Info: Found design unit 1: altddio_out3-SYN
- Info: Found entity 1: altddio_out3
-Info: Found 2 design units, including 1 entities, in source file video/lpm_mux6.vhd
- Info: Found design unit 1: lpm_mux6-SYN
- Info: Found entity 1: lpm_mux6
-Info: Found 1 design units, including 0 entities, in source file falconio_sdcard_ide_cf/falconio_sdcard_ide_cf_pgk.vhd
- Info: Found design unit 1: FalconIO_SDCard_IDE_CF_PKG
-Info: Found 2 design units, including 1 entities, in source file falconio_sdcard_ide_cf/dcfifo1.vhd
- Info: Found design unit 1: dcfifo1-SYN
- Info: Found entity 1: dcfifo1
-Info: Found 2 design units, including 1 entities, in source file video/lpm_muxvdm.vhd
- Info: Found design unit 1: lpm_muxvdm-SYN
- Info: Found entity 1: lpm_muxVDM
-Info: Elaborating entity "firebee1" for the top level hierarchy
-Warning: Pin "TOUT0" not connected
-Warning: Pin "nMASTER" not connected
-Info: Elaborating entity "altpll1" for hierarchy "altpll1:inst"
-Info: Elaborating entity "altpll" for hierarchy "altpll1:inst|altpll:altpll_component"
-Info: Elaborated megafunction instantiation "altpll1:inst|altpll:altpll_component"
-Info: Instantiated megafunction "altpll1:inst|altpll:altpll_component" with the following parameter:
- Info: Parameter "bandwidth_type" = "AUTO"
- Info: Parameter "clk0_divide_by" = "66"
- Info: Parameter "clk0_duty_cycle" = "50"
- Info: Parameter "clk0_multiply_by" = "1"
- Info: Parameter "clk0_phase_shift" = "0"
- Info: Parameter "clk1_divide_by" = "900"
- Info: Parameter "clk1_duty_cycle" = "50"
- Info: Parameter "clk1_multiply_by" = "67"
- Info: Parameter "clk1_phase_shift" = "0"
- Info: Parameter "clk2_divide_by" = "90"
- Info: Parameter "clk2_duty_cycle" = "50"
- Info: Parameter "clk2_multiply_by" = "67"
- Info: Parameter "clk2_phase_shift" = "0"
- Info: Parameter "compensate_clock" = "CLK0"
- Info: Parameter "inclk0_input_frequency" = "30303"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_type" = "altpll"
- Info: Parameter "operation_mode" = "SOURCE_SYNCHRONOUS"
- Info: Parameter "pll_type" = "AUTO"
- Info: Parameter "port_activeclock" = "PORT_UNUSED"
- Info: Parameter "port_areset" = "PORT_UNUSED"
- Info: Parameter "port_clkbad0" = "PORT_UNUSED"
- Info: Parameter "port_clkbad1" = "PORT_UNUSED"
- Info: Parameter "port_clkloss" = "PORT_UNUSED"
- Info: Parameter "port_clkswitch" = "PORT_UNUSED"
- Info: Parameter "port_configupdate" = "PORT_UNUSED"
- Info: Parameter "port_fbin" = "PORT_UNUSED"
- Info: Parameter "port_inclk0" = "PORT_USED"
- Info: Parameter "port_inclk1" = "PORT_UNUSED"
- Info: Parameter "port_locked" = "PORT_USED"
- Info: Parameter "port_pfdena" = "PORT_UNUSED"
- Info: Parameter "port_phasecounterselect" = "PORT_UNUSED"
- Info: Parameter "port_phasedone" = "PORT_UNUSED"
- Info: Parameter "port_phasestep" = "PORT_UNUSED"
- Info: Parameter "port_phaseupdown" = "PORT_UNUSED"
- Info: Parameter "port_pllena" = "PORT_UNUSED"
- Info: Parameter "port_scanaclr" = "PORT_UNUSED"
- Info: Parameter "port_scanclk" = "PORT_UNUSED"
- Info: Parameter "port_scanclkena" = "PORT_UNUSED"
- Info: Parameter "port_scandata" = "PORT_UNUSED"
- Info: Parameter "port_scandataout" = "PORT_UNUSED"
- Info: Parameter "port_scandone" = "PORT_UNUSED"
- Info: Parameter "port_scanread" = "PORT_UNUSED"
- Info: Parameter "port_scanwrite" = "PORT_UNUSED"
- Info: Parameter "port_clk0" = "PORT_USED"
- Info: Parameter "port_clk1" = "PORT_USED"
- Info: Parameter "port_clk2" = "PORT_USED"
- Info: Parameter "port_clk3" = "PORT_UNUSED"
- Info: Parameter "port_clk4" = "PORT_UNUSED"
- Info: Parameter "port_clk5" = "PORT_UNUSED"
- Info: Parameter "port_clkena0" = "PORT_UNUSED"
- Info: Parameter "port_clkena1" = "PORT_UNUSED"
- Info: Parameter "port_clkena2" = "PORT_UNUSED"
- Info: Parameter "port_clkena3" = "PORT_UNUSED"
- Info: Parameter "port_clkena4" = "PORT_UNUSED"
- Info: Parameter "port_clkena5" = "PORT_UNUSED"
- Info: Parameter "port_extclk0" = "PORT_UNUSED"
- Info: Parameter "port_extclk1" = "PORT_UNUSED"
- Info: Parameter "port_extclk2" = "PORT_UNUSED"
- Info: Parameter "port_extclk3" = "PORT_UNUSED"
- Info: Parameter "self_reset_on_loss_lock" = "OFF"
- Info: Parameter "width_clock" = "5"
-Info: Found 1 design units, including 1 entities, in source file db/altpll_pul2.tdf
- Info: Found entity 1: altpll_pul2
-Info: Elaborating entity "altpll_pul2" for hierarchy "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated"
-Info: Elaborating entity "FalconIO_SDCard_IDE_CF" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden"
-Warning (10036): Verilog HDL or VHDL warning at FalconIO_SDCard_IDE_CF.vhd(244): object "SCSI_CSn" assigned a value but never read
-Warning (10492): VHDL Process Statement warning at FalconIO_SDCard_IDE_CF.vhd(303): signal "nIDE_RD" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
-Warning (10492): VHDL Process Statement warning at FalconIO_SDCard_IDE_CF.vhd(304): signal "nIDE_WR" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
-Warning (10492): VHDL Process Statement warning at FalconIO_SDCard_IDE_CF.vhd(313): signal "IDE_CF_CS" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
-Warning (10492): VHDL Process Statement warning at FalconIO_SDCard_IDE_CF.vhd(314): signal "nFB_WR" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
-Warning (10492): VHDL Process Statement warning at FalconIO_SDCard_IDE_CF.vhd(315): signal "nFB_WR" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
-Warning (10492): VHDL Process Statement warning at FalconIO_SDCard_IDE_CF.vhd(324): signal "nFB_WR" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
-Warning (10492): VHDL Process Statement warning at FalconIO_SDCard_IDE_CF.vhd(325): signal "nFB_WR" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
-Warning (10492): VHDL Process Statement warning at FalconIO_SDCard_IDE_CF.vhd(335): signal "nFB_WR" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
-Warning (10492): VHDL Process Statement warning at FalconIO_SDCard_IDE_CF.vhd(336): signal "nFB_WR" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
-Critical Warning (10920): VHDL Incomplete Partial Association warning at FalconIO_SDCard_IDE_CF.vhd(928): port or argument "IO_A_OUT" has 1/8 unassociated elements
-Info: Elaborating entity "dcfifo0" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF"
-Info: Elaborating entity "dcfifo_mixed_widths" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component"
-Info: Elaborated megafunction instantiation "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component"
-Info: Instantiated megafunction "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component" with the following parameter:
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_numwords" = "1024"
- Info: Parameter "lpm_showahead" = "OFF"
- Info: Parameter "lpm_type" = "dcfifo"
- Info: Parameter "lpm_width" = "8"
- Info: Parameter "lpm_widthu" = "10"
- Info: Parameter "lpm_widthu_r" = "8"
- Info: Parameter "lpm_width_r" = "32"
- Info: Parameter "overflow_checking" = "ON"
- Info: Parameter "rdsync_delaypipe" = "5"
- Info: Parameter "underflow_checking" = "ON"
- Info: Parameter "use_eab" = "ON"
- Info: Parameter "write_aclr_synch" = "OFF"
- Info: Parameter "wrsync_delaypipe" = "5"
-Info: Found 1 design units, including 1 entities, in source file db/dcfifo_0hh1.tdf
- Info: Found entity 1: dcfifo_0hh1
-Info: Elaborating entity "dcfifo_0hh1" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated"
-Info: Found 1 design units, including 1 entities, in source file db/a_gray2bin_lfb.tdf
- Info: Found entity 1: a_gray2bin_lfb
-Info: Elaborating entity "a_gray2bin_lfb" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_gray2bin_lfb:wrptr_g_gray2bin"
-Info: Found 1 design units, including 1 entities, in source file db/a_graycounter_k47.tdf
- Info: Found entity 1: a_graycounter_k47
-Info: Elaborating entity "a_graycounter_k47" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p"
-Info: Found 1 design units, including 1 entities, in source file db/a_graycounter_fic.tdf
- Info: Found entity 1: a_graycounter_fic
-Info: Elaborating entity "a_graycounter_fic" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p"
-Info: Found 1 design units, including 1 entities, in source file db/altsyncram_bi31.tdf
- Info: Found entity 1: altsyncram_bi31
-Info: Elaborating entity "altsyncram_bi31" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram"
-Info: Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_ikd.tdf
- Info: Found entity 1: alt_synch_pipe_ikd
-Info: Elaborating entity "alt_synch_pipe_ikd" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_ikd:rs_dgwp"
-Info: Found 1 design units, including 1 entities, in source file db/dffpipe_hd9.tdf
- Info: Found entity 1: dffpipe_hd9
-Info: Elaborating entity "dffpipe_hd9" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_ikd:rs_dgwp|dffpipe_hd9:dffpipe12"
-Info: Found 1 design units, including 1 entities, in source file db/dffpipe_gd9.tdf
- Info: Found entity 1: dffpipe_gd9
-Info: Elaborating entity "dffpipe_gd9" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_gd9:ws_brp"
-Info: Found 1 design units, including 1 entities, in source file db/dffpipe_pe9.tdf
- Info: Found entity 1: dffpipe_pe9
-Info: Elaborating entity "dffpipe_pe9" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_pe9:ws_bwp"
-Info: Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_jkd.tdf
- Info: Found entity 1: alt_synch_pipe_jkd
-Info: Elaborating entity "alt_synch_pipe_jkd" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp"
-Info: Found 1 design units, including 1 entities, in source file db/dffpipe_id9.tdf
- Info: Found entity 1: dffpipe_id9
-Info: Elaborating entity "dffpipe_id9" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17"
-Info: Found 1 design units, including 1 entities, in source file db/cmpr_256.tdf
- Info: Found entity 1: cmpr_256
-Info: Elaborating entity "cmpr_256" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cmpr_256:rdempty_eq_comp1_lsb"
-Info: Found 1 design units, including 1 entities, in source file db/cmpr_156.tdf
- Info: Found entity 1: cmpr_156
-Info: Elaborating entity "cmpr_156" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cmpr_156:rdempty_eq_comp1_msb"
-Info: Found 1 design units, including 1 entities, in source file db/cntr_t2e.tdf
- Info: Found entity 1: cntr_t2e
-Info: Elaborating entity "cntr_t2e" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cntr_t2e:cntr_b"
-Info: Found 1 design units, including 1 entities, in source file db/mux_a18.tdf
- Info: Found entity 1: mux_a18
-Info: Elaborating entity "mux_a18" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|mux_a18:rdemp_eq_comp_lsb_mux"
-Info: Elaborating entity "dcfifo1" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF"
-Info: Elaborating entity "dcfifo_mixed_widths" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component"
-Info: Elaborated megafunction instantiation "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component"
-Info: Instantiated megafunction "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component" with the following parameter:
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_numwords" = "256"
- Info: Parameter "lpm_showahead" = "OFF"
- Info: Parameter "lpm_type" = "dcfifo"
- Info: Parameter "lpm_width" = "32"
- Info: Parameter "lpm_widthu" = "8"
- Info: Parameter "lpm_widthu_r" = "10"
- Info: Parameter "lpm_width_r" = "8"
- Info: Parameter "overflow_checking" = "ON"
- Info: Parameter "rdsync_delaypipe" = "5"
- Info: Parameter "underflow_checking" = "ON"
- Info: Parameter "use_eab" = "ON"
- Info: Parameter "write_aclr_synch" = "OFF"
- Info: Parameter "wrsync_delaypipe" = "5"
-Info: Found 1 design units, including 1 entities, in source file db/dcfifo_3fh1.tdf
- Info: Found entity 1: dcfifo_3fh1
-Info: Elaborating entity "dcfifo_3fh1" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated"
-Info: Found 1 design units, including 1 entities, in source file db/a_graycounter_j47.tdf
- Info: Found entity 1: a_graycounter_j47
-Info: Elaborating entity "a_graycounter_j47" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p"
-Info: Found 1 design units, including 1 entities, in source file db/a_graycounter_gic.tdf
- Info: Found entity 1: a_graycounter_gic
-Info: Elaborating entity "a_graycounter_gic" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_gic:wrptr_g1p"
-Info: Found 1 design units, including 1 entities, in source file db/altsyncram_ci31.tdf
- Info: Found entity 1: altsyncram_ci31
-Info: Elaborating entity "altsyncram_ci31" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram"
-Info: Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_kkd.tdf
- Info: Found entity 1: alt_synch_pipe_kkd
-Info: Elaborating entity "alt_synch_pipe_kkd" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp"
-Info: Found 1 design units, including 1 entities, in source file db/dffpipe_jd9.tdf
- Info: Found entity 1: dffpipe_jd9
-Info: Elaborating entity "dffpipe_jd9" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12"
-Info: Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_lkd.tdf
- Info: Found entity 1: alt_synch_pipe_lkd
-Info: Elaborating entity "alt_synch_pipe_lkd" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_lkd:ws_dgrp"
-Info: Found 1 design units, including 1 entities, in source file db/dffpipe_kd9.tdf
- Info: Found entity 1: dffpipe_kd9
-Info: Elaborating entity "dffpipe_kd9" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_lkd:ws_dgrp|dffpipe_kd9:dffpipe15"
-Info: Elaborating entity "WF1772IP_TOP_SOC" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC"
-Info: Elaborating entity "WF1772IP_CONTROL" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL"
-Info: Elaborating entity "WF1772IP_REGISTERS" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS"
-Info: Elaborating entity "WF1772IP_DIGITAL_PLL" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL"
-Info: Elaborating entity "WF1772IP_AM_DETECTOR" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR"
-Info: Elaborating entity "WF1772IP_CRC_LOGIC" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC"
-Info: Elaborating entity "WF1772IP_TRANSCEIVER" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER"
-Info: Elaborating entity "WF5380_TOP_SOC" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI"
-Info: Elaborating entity "WF5380_REGISTERS" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS"
-Info: Elaborating entity "WF5380_CONTROL" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL"
-Info: Elaborating entity "WF6850IP_TOP_SOC" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD"
-Info: Elaborating entity "WF6850IP_CTRL_STATUS" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS"
-Info: Elaborating entity "WF6850IP_RECEIVE" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_RECEIVE:I_UART_RECEIVE"
-Info: Elaborating entity "WF6850IP_TRANSMIT" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT"
-Info: Elaborating entity "WF68901IP_TOP_SOC" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP"
-Info: Elaborating entity "WF68901IP_USART_TOP" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART"
-Info: Elaborating entity "WF68901IP_USART_CTRL" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_CTRL:I_USART_CTRL"
-Info: Elaborating entity "WF68901IP_USART_RX" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_RX:I_USART_RECEIVE"
-Info: Elaborating entity "WF68901IP_USART_TX" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT"
-Info: Elaborating entity "WF68901IP_INTERRUPTS" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS"
-Info: Elaborating entity "WF68901IP_GPIO" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_GPIO:I_GPIO"
-Info: Elaborating entity "WF68901IP_TIMERS" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS"
-Info: Elaborating entity "WF2149IP_TOP_SOC" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND"
-Info: Elaborating entity "WF2149IP_WAVE" for hierarchy "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE"
-Info: Elaborating entity "altpll3" for hierarchy "altpll3:inst13"
-Info: Elaborating entity "altpll" for hierarchy "altpll3:inst13|altpll:altpll_component"
-Info: Elaborated megafunction instantiation "altpll3:inst13|altpll:altpll_component"
-Info: Instantiated megafunction "altpll3:inst13|altpll:altpll_component" with the following parameter:
- Info: Parameter "bandwidth_type" = "AUTO"
- Info: Parameter "clk0_divide_by" = "33"
- Info: Parameter "clk0_duty_cycle" = "50"
- Info: Parameter "clk0_multiply_by" = "2"
- Info: Parameter "clk0_phase_shift" = "0"
- Info: Parameter "clk1_divide_by" = "33"
- Info: Parameter "clk1_duty_cycle" = "50"
- Info: Parameter "clk1_multiply_by" = "16"
- Info: Parameter "clk1_phase_shift" = "0"
- Info: Parameter "clk2_divide_by" = "33"
- Info: Parameter "clk2_duty_cycle" = "50"
- Info: Parameter "clk2_multiply_by" = "25"
- Info: Parameter "clk2_phase_shift" = "0"
- Info: Parameter "clk3_divide_by" = "11"
- Info: Parameter "clk3_duty_cycle" = "50"
- Info: Parameter "clk3_multiply_by" = "16"
- Info: Parameter "clk3_phase_shift" = "0"
- Info: Parameter "compensate_clock" = "CLK1"
- Info: Parameter "inclk0_input_frequency" = "30303"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_type" = "altpll"
- Info: Parameter "operation_mode" = "SOURCE_SYNCHRONOUS"
- Info: Parameter "pll_type" = "AUTO"
- Info: Parameter "port_activeclock" = "PORT_UNUSED"
- Info: Parameter "port_areset" = "PORT_UNUSED"
- Info: Parameter "port_clkbad0" = "PORT_UNUSED"
- Info: Parameter "port_clkbad1" = "PORT_UNUSED"
- Info: Parameter "port_clkloss" = "PORT_UNUSED"
- Info: Parameter "port_clkswitch" = "PORT_UNUSED"
- Info: Parameter "port_configupdate" = "PORT_UNUSED"
- Info: Parameter "port_fbin" = "PORT_UNUSED"
- Info: Parameter "port_inclk0" = "PORT_USED"
- Info: Parameter "port_inclk1" = "PORT_UNUSED"
- Info: Parameter "port_locked" = "PORT_UNUSED"
- Info: Parameter "port_pfdena" = "PORT_UNUSED"
- Info: Parameter "port_phasecounterselect" = "PORT_UNUSED"
- Info: Parameter "port_phasedone" = "PORT_UNUSED"
- Info: Parameter "port_phasestep" = "PORT_UNUSED"
- Info: Parameter "port_phaseupdown" = "PORT_UNUSED"
- Info: Parameter "port_pllena" = "PORT_UNUSED"
- Info: Parameter "port_scanaclr" = "PORT_UNUSED"
- Info: Parameter "port_scanclk" = "PORT_UNUSED"
- Info: Parameter "port_scanclkena" = "PORT_UNUSED"
- Info: Parameter "port_scandata" = "PORT_UNUSED"
- Info: Parameter "port_scandataout" = "PORT_UNUSED"
- Info: Parameter "port_scandone" = "PORT_UNUSED"
- Info: Parameter "port_scanread" = "PORT_UNUSED"
- Info: Parameter "port_scanwrite" = "PORT_UNUSED"
- Info: Parameter "port_clk0" = "PORT_USED"
- Info: Parameter "port_clk1" = "PORT_USED"
- Info: Parameter "port_clk2" = "PORT_USED"
- Info: Parameter "port_clk3" = "PORT_USED"
- Info: Parameter "port_clk4" = "PORT_UNUSED"
- Info: Parameter "port_clk5" = "PORT_UNUSED"
- Info: Parameter "port_clkena0" = "PORT_UNUSED"
- Info: Parameter "port_clkena1" = "PORT_UNUSED"
- Info: Parameter "port_clkena2" = "PORT_UNUSED"
- Info: Parameter "port_clkena3" = "PORT_UNUSED"
- Info: Parameter "port_clkena4" = "PORT_UNUSED"
- Info: Parameter "port_clkena5" = "PORT_UNUSED"
- Info: Parameter "port_extclk0" = "PORT_UNUSED"
- Info: Parameter "port_extclk1" = "PORT_UNUSED"
- Info: Parameter "port_extclk2" = "PORT_UNUSED"
- Info: Parameter "port_extclk3" = "PORT_UNUSED"
- Info: Parameter "width_clock" = "5"
-Info: Found 1 design units, including 1 entities, in source file db/altpll_41p2.tdf
- Info: Found entity 1: altpll_41p2
-Info: Elaborating entity "altpll_41p2" for hierarchy "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated"
-Info: Elaborating entity "Video" for hierarchy "Video:Fredi_Aschwanden"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "FB_ADR[31..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "MAIN_CLK"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nFB_CS1"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nFB_CS2"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nFB_CS3"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nFB_WR"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "FB_SIZE0"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "FB_SIZE1"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nRSTO"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nFB_OE"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "FB_ALE"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "DDRCLK[3..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "DDR_SYNC_66M"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "CLK33M"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "CLK25M"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "CLK_VIDEO"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VR_D[8..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VR_BUSY"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VG[7..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VB[7..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VR[7..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nBLANK"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VA[12..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nVWE"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nVCAS"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nVRAS"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nVCS"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VDM[3..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nPD_VGA"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VCKE"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VSYNC"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "HSYNC"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "nSYNC"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VIDEO_TA"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "PIXEL_CLK"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "BA[1..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VIDEO_RECONFIG"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VR_WR"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VR_RD"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VDQS[3..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "FB_AD[31..0]"
-Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin "VD[31..0]"
-Info: Elaborating entity "VIDEO_MOD_MUX_CLUTCTR" for hierarchy "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR"
-Warning: Variable or input pin "nRSTO" is defined but never used
-Warning: Variable or input pin "nFB_CS3" is defined but never used
-Warning: Variable or input pin "nFB_BURST" is defined but never used
-Info: Elaborating entity "lpm_bustri_WORD" for hierarchy "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000"
-Info: Elaborating entity "lpm_bustri" for hierarchy "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component" with the following parameter:
- Info: Parameter "lpm_type" = "LPM_BUSTRI"
- Info: Parameter "lpm_width" = "16"
-Info: Elaborating entity "BLITTER" for hierarchy "Video:Fredi_Aschwanden|BLITTER:BLITTER"
-Info: Elaborating entity "lpm_shiftreg6" for hierarchy "Video:Fredi_Aschwanden|lpm_shiftreg6:inst89"
-Info: Elaborating entity "lpm_shiftreg" for hierarchy "Video:Fredi_Aschwanden|lpm_shiftreg6:inst89|lpm_shiftreg:lpm_shiftreg_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_shiftreg6:inst89|lpm_shiftreg:lpm_shiftreg_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_shiftreg6:inst89|lpm_shiftreg:lpm_shiftreg_component" with the following parameter:
- Info: Parameter "lpm_direction" = "RIGHT"
- Info: Parameter "lpm_type" = "LPM_SHIFTREG"
- Info: Parameter "lpm_width" = "5"
-Info: Elaborating entity "DDR_CTR" for hierarchy "Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR"
-Warning: Variable or input pin "nFB_CS2" is defined but never used
-Warning: Variable or input pin "nFB_CS3" is defined but never used
-Warning: Variable or input pin "nRSTO" is defined but never used
-Info: Elaborating entity "lpm_bustri_BYT" for hierarchy "Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00002"
-Info: Elaborating entity "lpm_bustri" for hierarchy "Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|lpm_bustri_BYT:$00002|lpm_bustri:lpm_bustri_component" with the following parameter:
- Info: Parameter "lpm_type" = "LPM_BUSTRI"
- Info: Parameter "lpm_width" = "8"
-Info: Elaborating entity "lpm_fifo_dc0" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst"
-Info: Elaborating entity "dcfifo" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component" with the following parameter:
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_numwords" = "512"
- Info: Parameter "lpm_showahead" = "OFF"
- Info: Parameter "lpm_type" = "dcfifo"
- Info: Parameter "lpm_width" = "128"
- Info: Parameter "lpm_widthu" = "9"
- Info: Parameter "overflow_checking" = "OFF"
- Info: Parameter "rdsync_delaypipe" = "6"
- Info: Parameter "underflow_checking" = "OFF"
- Info: Parameter "use_eab" = "ON"
- Info: Parameter "write_aclr_synch" = "ON"
- Info: Parameter "wrsync_delaypipe" = "6"
-Info: Found 1 design units, including 1 entities, in source file db/dcfifo_8fi1.tdf
- Info: Found entity 1: dcfifo_8fi1
-Info: Elaborating entity "dcfifo_8fi1" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated"
-Info: Found 1 design units, including 1 entities, in source file db/a_gray2bin_tgb.tdf
- Info: Found entity 1: a_gray2bin_tgb
-Info: Elaborating entity "a_gray2bin_tgb" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_gray2bin_tgb:wrptr_g_gray2bin"
-Info: Found 1 design units, including 1 entities, in source file db/a_graycounter_s57.tdf
- Info: Found entity 1: a_graycounter_s57
-Info: Elaborating entity "a_graycounter_s57" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p"
-Info: Found 1 design units, including 1 entities, in source file db/a_graycounter_ojc.tdf
- Info: Found entity 1: a_graycounter_ojc
-Info: Elaborating entity "a_graycounter_ojc" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_ojc:wrptr_g1p"
-Info: Found 1 design units, including 1 entities, in source file db/a_graycounter_njc.tdf
- Info: Found entity 1: a_graycounter_njc
-Info: Elaborating entity "a_graycounter_njc" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp"
-Info: Found 1 design units, including 1 entities, in source file db/altsyncram_tl31.tdf
- Info: Found entity 1: altsyncram_tl31
-Info: Elaborating entity "altsyncram_tl31" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram"
-Info: Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_rld.tdf
- Info: Found entity 1: alt_synch_pipe_rld
-Info: Elaborating entity "alt_synch_pipe_rld" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_rld:rs_dgwp"
-Info: Found 1 design units, including 1 entities, in source file db/dffpipe_qe9.tdf
- Info: Found entity 1: dffpipe_qe9
-Info: Elaborating entity "dffpipe_qe9" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_rld:rs_dgwp|dffpipe_qe9:dffpipe15"
-Info: Found 1 design units, including 1 entities, in source file db/dffpipe_9d9.tdf
- Info: Found entity 1: dffpipe_9d9
-Info: Elaborating entity "dffpipe_9d9" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_9d9:wraclr"
-Info: Found 1 design units, including 1 entities, in source file db/dffpipe_oe9.tdf
- Info: Found entity 1: dffpipe_oe9
-Info: Elaborating entity "dffpipe_oe9" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp"
-Info: Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_sld.tdf
- Info: Found entity 1: alt_synch_pipe_sld
-Info: Elaborating entity "alt_synch_pipe_sld" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp"
-Info: Found 1 design units, including 1 entities, in source file db/dffpipe_re9.tdf
- Info: Found entity 1: dffpipe_re9
-Info: Elaborating entity "dffpipe_re9" for hierarchy "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22"
-Info: Elaborating entity "lpm_shiftreg4" for hierarchy "Video:Fredi_Aschwanden|lpm_shiftreg4:inst26"
-Info: Elaborating entity "lpm_shiftreg" for hierarchy "Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component" with the following parameter:
- Info: Parameter "lpm_direction" = "RIGHT"
- Info: Parameter "lpm_type" = "LPM_SHIFTREG"
- Info: Parameter "lpm_width" = "5"
-Info: Elaborating entity "lpm_muxVDM" for hierarchy "Video:Fredi_Aschwanden|lpm_muxVDM:inst100"
-Info: Elaborating entity "LPM_MUX" for hierarchy "Video:Fredi_Aschwanden|lpm_muxVDM:inst100|LPM_MUX:lpm_mux_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_muxVDM:inst100|LPM_MUX:lpm_mux_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_muxVDM:inst100|LPM_MUX:lpm_mux_component" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "128"
- Info: Parameter "LPM_SIZE" = "16"
- Info: Parameter "LPM_WIDTHS" = "4"
- Info: Parameter "LPM_PIPELINE" = "0"
- Info: Parameter "LPM_TYPE" = "LPM_MUX"
- Info: Parameter "LPM_HINT" = "UNUSED"
-Info: Found 1 design units, including 1 entities, in source file db/mux_bbe.tdf
- Info: Found entity 1: mux_bbe
-Info: Elaborating entity "mux_bbe" for hierarchy "Video:Fredi_Aschwanden|lpm_muxVDM:inst100|LPM_MUX:lpm_mux_component|mux_bbe:auto_generated"
-Info: Elaborating entity "lpm_ff6" for hierarchy "Video:Fredi_Aschwanden|lpm_ff6:inst94"
-Info: Elaborating entity "lpm_ff" for hierarchy "Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component" with the following parameter:
- Info: Parameter "lpm_fftype" = "DFF"
- Info: Parameter "lpm_type" = "LPM_FF"
- Info: Parameter "lpm_width" = "128"
-Info: Elaborating entity "lpm_ff1" for hierarchy "Video:Fredi_Aschwanden|lpm_ff1:inst4"
-Info: Elaborating entity "lpm_ff" for hierarchy "Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component" with the following parameter:
- Info: Parameter "lpm_fftype" = "DFF"
- Info: Parameter "lpm_type" = "LPM_FF"
- Info: Parameter "lpm_width" = "32"
-Info: Elaborating entity "altddio_bidir0" for hierarchy "Video:Fredi_Aschwanden|altddio_bidir0:inst1"
-Info: Elaborating entity "altddio_bidir" for hierarchy "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component" with the following parameter:
- Info: Parameter "extend_oe_disable" = "UNUSED"
- Info: Parameter "implement_input_in_lcell" = "ON"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "invert_output" = "OFF"
- Info: Parameter "lpm_type" = "altddio_bidir"
- Info: Parameter "oe_reg" = "UNUSED"
- Info: Parameter "power_up_high" = "OFF"
- Info: Parameter "width" = "32"
-Info: Found 1 design units, including 1 entities, in source file db/ddio_bidir_3jl.tdf
- Info: Found entity 1: ddio_bidir_3jl
-Info: Elaborating entity "ddio_bidir_3jl" for hierarchy "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated"
-Info: Elaborating entity "lpm_mux5" for hierarchy "Video:Fredi_Aschwanden|lpm_mux5:inst22"
-Info: Elaborating entity "LPM_MUX" for hierarchy "Video:Fredi_Aschwanden|lpm_mux5:inst22|LPM_MUX:lpm_mux_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_mux5:inst22|LPM_MUX:lpm_mux_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_mux5:inst22|LPM_MUX:lpm_mux_component" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "64"
- Info: Parameter "LPM_SIZE" = "4"
- Info: Parameter "LPM_WIDTHS" = "2"
- Info: Parameter "LPM_PIPELINE" = "0"
- Info: Parameter "LPM_TYPE" = "LPM_MUX"
- Info: Parameter "LPM_HINT" = "UNUSED"
-Info: Found 1 design units, including 1 entities, in source file db/mux_58e.tdf
- Info: Found entity 1: mux_58e
-Info: Elaborating entity "mux_58e" for hierarchy "Video:Fredi_Aschwanden|lpm_mux5:inst22|LPM_MUX:lpm_mux_component|mux_58e:auto_generated"
-Info: Elaborating entity "lpm_ff0" for hierarchy "Video:Fredi_Aschwanden|lpm_ff0:inst14"
-Info: Elaborating entity "lpm_ff" for hierarchy "Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component" with the following parameter:
- Info: Parameter "lpm_fftype" = "DFF"
- Info: Parameter "lpm_type" = "LPM_FF"
- Info: Parameter "lpm_width" = "32"
-Info: Elaborating entity "lpm_bustri_LONG" for hierarchy "Video:Fredi_Aschwanden|lpm_bustri_LONG:inst108"
-Info: Elaborating entity "lpm_bustri" for hierarchy "Video:Fredi_Aschwanden|lpm_bustri_LONG:inst108|lpm_bustri:lpm_bustri_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_bustri_LONG:inst108|lpm_bustri:lpm_bustri_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_bustri_LONG:inst108|lpm_bustri:lpm_bustri_component" with the following parameter:
- Info: Parameter "lpm_type" = "LPM_BUSTRI"
- Info: Parameter "lpm_width" = "32"
-Info: Elaborating entity "lpm_latch0" for hierarchy "Video:Fredi_Aschwanden|lpm_latch0:inst27"
-Info: Elaborating entity "lpm_latch" for hierarchy "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component" with the following parameter:
- Info: Parameter "lpm_type" = "LPM_LATCH"
- Info: Parameter "lpm_width" = "32"
-Info: Elaborating entity "lpm_bustri3" for hierarchy "Video:Fredi_Aschwanden|lpm_bustri3:inst66"
-Info: Elaborating entity "lpm_bustri" for hierarchy "Video:Fredi_Aschwanden|lpm_bustri3:inst66|lpm_bustri:lpm_bustri_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_bustri3:inst66|lpm_bustri:lpm_bustri_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_bustri3:inst66|lpm_bustri:lpm_bustri_component" with the following parameter:
- Info: Parameter "lpm_type" = "LPM_BUSTRI"
- Info: Parameter "lpm_width" = "6"
-Info: Elaborating entity "altdpram1" for hierarchy "Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED"
-Info: Elaborating entity "altsyncram" for hierarchy "Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component" with the following parameter:
- Info: Parameter "address_reg_b" = "CLOCK1"
- Info: Parameter "clock_enable_input_a" = "BYPASS"
- Info: Parameter "clock_enable_input_b" = "BYPASS"
- Info: Parameter "clock_enable_output_a" = "BYPASS"
- Info: Parameter "clock_enable_output_b" = "BYPASS"
- Info: Parameter "indata_reg_b" = "CLOCK1"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_type" = "altsyncram"
- Info: Parameter "numwords_a" = "256"
- Info: Parameter "numwords_b" = "256"
- Info: Parameter "operation_mode" = "BIDIR_DUAL_PORT"
- Info: Parameter "outdata_aclr_a" = "NONE"
- Info: Parameter "outdata_aclr_b" = "NONE"
- Info: Parameter "outdata_reg_a" = "CLOCK0"
- Info: Parameter "outdata_reg_b" = "CLOCK1"
- Info: Parameter "power_up_uninitialized" = "FALSE"
- Info: Parameter "read_during_write_mode_port_a" = "OLD_DATA"
- Info: Parameter "read_during_write_mode_port_b" = "OLD_DATA"
- Info: Parameter "widthad_a" = "8"
- Info: Parameter "widthad_b" = "8"
- Info: Parameter "width_a" = "6"
- Info: Parameter "width_b" = "6"
- Info: Parameter "width_byteena_a" = "1"
- Info: Parameter "width_byteena_b" = "1"
- Info: Parameter "wrcontrol_wraddress_reg_b" = "CLOCK1"
-Info: Found 1 design units, including 1 entities, in source file db/altsyncram_lf92.tdf
- Info: Found entity 1: altsyncram_lf92
-Info: Elaborating entity "altsyncram_lf92" for hierarchy "Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated"
-Info: Elaborating entity "lpm_shiftreg0" for hierarchy "Video:Fredi_Aschwanden|lpm_shiftreg0:sr0"
-Info: Elaborating entity "lpm_shiftreg" for hierarchy "Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component" with the following parameter:
- Info: Parameter "lpm_direction" = "LEFT"
- Info: Parameter "lpm_type" = "LPM_SHIFTREG"
- Info: Parameter "lpm_width" = "16"
-Info: Elaborating entity "MUX41" for hierarchy "Video:Fredi_Aschwanden|MUX41:inst45"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|MUX41:inst45"
-Info: Elaborating entity "lpm_muxDZ" for hierarchy "Video:Fredi_Aschwanden|lpm_muxDZ:inst62"
-Info: Elaborating entity "LPM_MUX" for hierarchy "Video:Fredi_Aschwanden|lpm_muxDZ:inst62|LPM_MUX:lpm_mux_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_muxDZ:inst62|LPM_MUX:lpm_mux_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_muxDZ:inst62|LPM_MUX:lpm_mux_component" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "128"
- Info: Parameter "LPM_SIZE" = "2"
- Info: Parameter "LPM_WIDTHS" = "1"
- Info: Parameter "LPM_PIPELINE" = "1"
- Info: Parameter "LPM_TYPE" = "LPM_MUX"
- Info: Parameter "LPM_HINT" = "UNUSED"
-Info: Found 1 design units, including 1 entities, in source file db/mux_dcf.tdf
- Info: Found entity 1: mux_dcf
-Info: Elaborating entity "mux_dcf" for hierarchy "Video:Fredi_Aschwanden|lpm_muxDZ:inst62|LPM_MUX:lpm_mux_component|mux_dcf:auto_generated"
-Info: Elaborating entity "lpm_fifoDZ" for hierarchy "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63"
-Info: Elaborating entity "scfifo" for hierarchy "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component" with the following parameter:
- Info: Parameter "add_ram_output_register" = "OFF"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_numwords" = "128"
- Info: Parameter "lpm_showahead" = "ON"
- Info: Parameter "lpm_type" = "scfifo"
- Info: Parameter "lpm_width" = "128"
- Info: Parameter "lpm_widthu" = "7"
- Info: Parameter "overflow_checking" = "OFF"
- Info: Parameter "underflow_checking" = "OFF"
- Info: Parameter "use_eab" = "ON"
-Info: Found 1 design units, including 1 entities, in source file db/scfifo_lk21.tdf
- Info: Found entity 1: scfifo_lk21
-Info: Elaborating entity "scfifo_lk21" for hierarchy "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated"
-Info: Found 1 design units, including 1 entities, in source file db/a_dpfifo_oq21.tdf
- Info: Found entity 1: a_dpfifo_oq21
-Info: Elaborating entity "a_dpfifo_oq21" for hierarchy "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo"
-Info: Found 1 design units, including 1 entities, in source file db/altsyncram_gj81.tdf
- Info: Found entity 1: altsyncram_gj81
-Info: Elaborating entity "altsyncram_gj81" for hierarchy "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram"
-Info: Found 1 design units, including 1 entities, in source file db/cmpr_br8.tdf
- Info: Found entity 1: cmpr_br8
-Info: Elaborating entity "cmpr_br8" for hierarchy "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cmpr_br8:almost_full_comparer"
-Info: Elaborating entity "cmpr_br8" for hierarchy "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cmpr_br8:three_comparison"
-Info: Found 1 design units, including 1 entities, in source file db/cntr_omb.tdf
- Info: Found entity 1: cntr_omb
-Info: Elaborating entity "cntr_omb" for hierarchy "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb"
-Info: Found 1 design units, including 1 entities, in source file db/cntr_5n7.tdf
- Info: Found entity 1: cntr_5n7
-Info: Elaborating entity "cntr_5n7" for hierarchy "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_5n7:usedw_counter"
-Info: Found 1 design units, including 1 entities, in source file db/cntr_pmb.tdf
- Info: Found entity 1: cntr_pmb
-Info: Elaborating entity "cntr_pmb" for hierarchy "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr"
-Info: Elaborating entity "lpm_bustri1" for hierarchy "Video:Fredi_Aschwanden|lpm_bustri1:inst51"
-Info: Elaborating entity "lpm_bustri" for hierarchy "Video:Fredi_Aschwanden|lpm_bustri1:inst51|lpm_bustri:lpm_bustri_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_bustri1:inst51|lpm_bustri:lpm_bustri_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_bustri1:inst51|lpm_bustri:lpm_bustri_component" with the following parameter:
- Info: Parameter "lpm_type" = "LPM_BUSTRI"
- Info: Parameter "lpm_width" = "3"
-Info: Elaborating entity "altdpram0" for hierarchy "Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED"
-Info: Elaborating entity "altsyncram" for hierarchy "Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component" with the following parameter:
- Info: Parameter "address_reg_b" = "CLOCK1"
- Info: Parameter "clock_enable_input_a" = "BYPASS"
- Info: Parameter "clock_enable_input_b" = "BYPASS"
- Info: Parameter "clock_enable_output_a" = "BYPASS"
- Info: Parameter "clock_enable_output_b" = "BYPASS"
- Info: Parameter "indata_reg_b" = "CLOCK1"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_type" = "altsyncram"
- Info: Parameter "numwords_a" = "16"
- Info: Parameter "numwords_b" = "16"
- Info: Parameter "operation_mode" = "BIDIR_DUAL_PORT"
- Info: Parameter "outdata_aclr_a" = "NONE"
- Info: Parameter "outdata_aclr_b" = "NONE"
- Info: Parameter "outdata_reg_a" = "CLOCK0"
- Info: Parameter "outdata_reg_b" = "CLOCK1"
- Info: Parameter "power_up_uninitialized" = "FALSE"
- Info: Parameter "read_during_write_mode_port_a" = "OLD_DATA"
- Info: Parameter "read_during_write_mode_port_b" = "OLD_DATA"
- Info: Parameter "widthad_a" = "4"
- Info: Parameter "widthad_b" = "4"
- Info: Parameter "width_a" = "3"
- Info: Parameter "width_b" = "3"
- Info: Parameter "width_byteena_a" = "1"
- Info: Parameter "width_byteena_b" = "1"
- Info: Parameter "wrcontrol_wraddress_reg_b" = "CLOCK1"
-Info: Found 1 design units, including 1 entities, in source file db/altsyncram_rb92.tdf
- Info: Found entity 1: altsyncram_rb92
-Info: Elaborating entity "altsyncram_rb92" for hierarchy "Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated"
-Info: Elaborating entity "altdpram2" for hierarchy "Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55"
-Info: Elaborating entity "altsyncram" for hierarchy "Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component" with the following parameter:
- Info: Parameter "address_reg_b" = "CLOCK1"
- Info: Parameter "clock_enable_input_a" = "BYPASS"
- Info: Parameter "clock_enable_input_b" = "BYPASS"
- Info: Parameter "clock_enable_output_a" = "BYPASS"
- Info: Parameter "clock_enable_output_b" = "BYPASS"
- Info: Parameter "indata_reg_b" = "CLOCK1"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_type" = "altsyncram"
- Info: Parameter "numwords_a" = "256"
- Info: Parameter "numwords_b" = "256"
- Info: Parameter "operation_mode" = "BIDIR_DUAL_PORT"
- Info: Parameter "outdata_aclr_a" = "NONE"
- Info: Parameter "outdata_aclr_b" = "NONE"
- Info: Parameter "outdata_reg_a" = "CLOCK0"
- Info: Parameter "outdata_reg_b" = "CLOCK1"
- Info: Parameter "power_up_uninitialized" = "FALSE"
- Info: Parameter "read_during_write_mode_port_a" = "OLD_DATA"
- Info: Parameter "read_during_write_mode_port_b" = "OLD_DATA"
- Info: Parameter "widthad_a" = "8"
- Info: Parameter "widthad_b" = "8"
- Info: Parameter "width_a" = "8"
- Info: Parameter "width_b" = "8"
- Info: Parameter "width_byteena_a" = "1"
- Info: Parameter "width_byteena_b" = "1"
- Info: Parameter "wrcontrol_wraddress_reg_b" = "CLOCK1"
-Info: Found 1 design units, including 1 entities, in source file db/altsyncram_pf92.tdf
- Info: Found entity 1: altsyncram_pf92
-Info: Elaborating entity "altsyncram_pf92" for hierarchy "Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated"
-Info: Elaborating entity "lpm_mux3" for hierarchy "Video:Fredi_Aschwanden|lpm_mux3:inst102"
-Info: Elaborating entity "LPM_MUX" for hierarchy "Video:Fredi_Aschwanden|lpm_mux3:inst102|LPM_MUX:lpm_mux_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_mux3:inst102|LPM_MUX:lpm_mux_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_mux3:inst102|LPM_MUX:lpm_mux_component" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "1"
- Info: Parameter "LPM_SIZE" = "2"
- Info: Parameter "LPM_WIDTHS" = "1"
- Info: Parameter "LPM_PIPELINE" = "0"
- Info: Parameter "LPM_TYPE" = "LPM_MUX"
- Info: Parameter "LPM_HINT" = "UNUSED"
-Info: Found 1 design units, including 1 entities, in source file db/mux_96e.tdf
- Info: Found entity 1: mux_96e
-Info: Elaborating entity "mux_96e" for hierarchy "Video:Fredi_Aschwanden|lpm_mux3:inst102|LPM_MUX:lpm_mux_component|mux_96e:auto_generated"
-Info: Elaborating entity "lpm_ff5" for hierarchy "Video:Fredi_Aschwanden|lpm_ff5:inst11"
-Info: Elaborating entity "lpm_ff" for hierarchy "Video:Fredi_Aschwanden|lpm_ff5:inst11|lpm_ff:lpm_ff_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_ff5:inst11|lpm_ff:lpm_ff_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_ff5:inst11|lpm_ff:lpm_ff_component" with the following parameter:
- Info: Parameter "lpm_fftype" = "DFF"
- Info: Parameter "lpm_type" = "LPM_FF"
- Info: Parameter "lpm_width" = "8"
-Info: Elaborating entity "lpm_mux2" for hierarchy "Video:Fredi_Aschwanden|lpm_mux2:inst25"
-Info: Elaborating entity "LPM_MUX" for hierarchy "Video:Fredi_Aschwanden|lpm_mux2:inst25|LPM_MUX:lpm_mux_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_mux2:inst25|LPM_MUX:lpm_mux_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_mux2:inst25|LPM_MUX:lpm_mux_component" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "8"
- Info: Parameter "LPM_SIZE" = "16"
- Info: Parameter "LPM_WIDTHS" = "4"
- Info: Parameter "LPM_PIPELINE" = "2"
- Info: Parameter "LPM_TYPE" = "LPM_MUX"
- Info: Parameter "LPM_HINT" = "UNUSED"
-Info: Found 1 design units, including 1 entities, in source file db/mux_mpe.tdf
- Info: Found entity 1: mux_mpe
-Info: Elaborating entity "mux_mpe" for hierarchy "Video:Fredi_Aschwanden|lpm_mux2:inst25|LPM_MUX:lpm_mux_component|mux_mpe:auto_generated"
-Info: Elaborating entity "lpm_mux4" for hierarchy "Video:Fredi_Aschwanden|lpm_mux4:inst81"
-Info: Elaborating entity "LPM_MUX" for hierarchy "Video:Fredi_Aschwanden|lpm_mux4:inst81|LPM_MUX:lpm_mux_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_mux4:inst81|LPM_MUX:lpm_mux_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_mux4:inst81|LPM_MUX:lpm_mux_component" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "7"
- Info: Parameter "LPM_SIZE" = "2"
- Info: Parameter "LPM_WIDTHS" = "1"
- Info: Parameter "LPM_PIPELINE" = "0"
- Info: Parameter "LPM_TYPE" = "LPM_MUX"
- Info: Parameter "LPM_HINT" = "UNUSED"
-Info: Found 1 design units, including 1 entities, in source file db/mux_f6e.tdf
- Info: Found entity 1: mux_f6e
-Info: Elaborating entity "mux_f6e" for hierarchy "Video:Fredi_Aschwanden|lpm_mux4:inst81|LPM_MUX:lpm_mux_component|mux_f6e:auto_generated"
-Info: Elaborating entity "lpm_constant3" for hierarchy "Video:Fredi_Aschwanden|lpm_constant3:inst82"
-Info: Elaborating entity "lpm_constant" for hierarchy "Video:Fredi_Aschwanden|lpm_constant3:inst82|lpm_constant:lpm_constant_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_constant3:inst82|lpm_constant:lpm_constant_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_constant3:inst82|lpm_constant:lpm_constant_component" with the following parameter:
- Info: Parameter "lpm_cvalue" = "0"
- Info: Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO"
- Info: Parameter "lpm_type" = "LPM_CONSTANT"
- Info: Parameter "lpm_width" = "7"
-Info: Elaborating entity "altddio_out2" for hierarchy "Video:Fredi_Aschwanden|altddio_out2:inst5"
-Info: Elaborating entity "altddio_out" for hierarchy "Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component" with the following parameter:
- Info: Parameter "extend_oe_disable" = "UNUSED"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "invert_output" = "OFF"
- Info: Parameter "lpm_type" = "altddio_out"
- Info: Parameter "oe_reg" = "UNUSED"
- Info: Parameter "power_up_high" = "OFF"
- Info: Parameter "width" = "24"
-Info: Found 1 design units, including 1 entities, in source file db/ddio_out_o2f.tdf
- Info: Found entity 1: ddio_out_o2f
-Info: Elaborating entity "ddio_out_o2f" for hierarchy "Video:Fredi_Aschwanden|altddio_out2:inst5|altddio_out:altddio_out_component|ddio_out_o2f:auto_generated"
-Info: Elaborating entity "lpm_mux6" for hierarchy "Video:Fredi_Aschwanden|lpm_mux6:inst7"
-Info: Elaborating entity "LPM_MUX" for hierarchy "Video:Fredi_Aschwanden|lpm_mux6:inst7|LPM_MUX:lpm_mux_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_mux6:inst7|LPM_MUX:lpm_mux_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_mux6:inst7|LPM_MUX:lpm_mux_component" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "24"
- Info: Parameter "LPM_SIZE" = "8"
- Info: Parameter "LPM_WIDTHS" = "3"
- Info: Parameter "LPM_PIPELINE" = "2"
- Info: Parameter "LPM_TYPE" = "LPM_MUX"
- Info: Parameter "LPM_HINT" = "UNUSED"
-Info: Found 1 design units, including 1 entities, in source file db/mux_kpe.tdf
- Info: Found entity 1: mux_kpe
-Info: Elaborating entity "mux_kpe" for hierarchy "Video:Fredi_Aschwanden|lpm_mux6:inst7|LPM_MUX:lpm_mux_component|mux_kpe:auto_generated"
-Info: Elaborating entity "lpm_ff3" for hierarchy "Video:Fredi_Aschwanden|lpm_ff3:inst49"
-Info: Elaborating entity "lpm_ff" for hierarchy "Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component" with the following parameter:
- Info: Parameter "lpm_fftype" = "DFF"
- Info: Parameter "lpm_type" = "LPM_FF"
- Info: Parameter "lpm_width" = "24"
-Info: Elaborating entity "lpm_constant0" for hierarchy "Video:Fredi_Aschwanden|lpm_constant0:inst59"
-Info: Elaborating entity "lpm_constant" for hierarchy "Video:Fredi_Aschwanden|lpm_constant0:inst59|lpm_constant:lpm_constant_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_constant0:inst59|lpm_constant:lpm_constant_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_constant0:inst59|lpm_constant:lpm_constant_component" with the following parameter:
- Info: Parameter "lpm_cvalue" = "0"
- Info: Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO"
- Info: Parameter "lpm_type" = "LPM_CONSTANT"
- Info: Parameter "lpm_width" = "5"
-Info: Elaborating entity "lpm_constant1" for hierarchy "Video:Fredi_Aschwanden|lpm_constant1:inst77"
-Info: Elaborating entity "lpm_constant" for hierarchy "Video:Fredi_Aschwanden|lpm_constant1:inst77|lpm_constant:lpm_constant_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_constant1:inst77|lpm_constant:lpm_constant_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_constant1:inst77|lpm_constant:lpm_constant_component" with the following parameter:
- Info: Parameter "lpm_cvalue" = "0"
- Info: Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO"
- Info: Parameter "lpm_type" = "LPM_CONSTANT"
- Info: Parameter "lpm_width" = "2"
-Info: Elaborating entity "lpm_ff4" for hierarchy "Video:Fredi_Aschwanden|lpm_ff4:inst10"
-Info: Elaborating entity "lpm_ff" for hierarchy "Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component" with the following parameter:
- Info: Parameter "lpm_fftype" = "DFF"
- Info: Parameter "lpm_type" = "LPM_FF"
- Info: Parameter "lpm_width" = "16"
-Info: Elaborating entity "lpm_mux1" for hierarchy "Video:Fredi_Aschwanden|lpm_mux1:inst24"
-Info: Elaborating entity "LPM_MUX" for hierarchy "Video:Fredi_Aschwanden|lpm_mux1:inst24|LPM_MUX:lpm_mux_component"
-Info: Assertion information: Value of LPM_PIPELINE parameter (4) should be lower -- use 1 for best performance/utilization
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_mux1:inst24|LPM_MUX:lpm_mux_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_mux1:inst24|LPM_MUX:lpm_mux_component" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "16"
- Info: Parameter "LPM_SIZE" = "8"
- Info: Parameter "LPM_WIDTHS" = "3"
- Info: Parameter "LPM_PIPELINE" = "4"
- Info: Parameter "LPM_TYPE" = "LPM_MUX"
- Info: Parameter "LPM_HINT" = "UNUSED"
-Info: Assertion information: Value of LPM_PIPELINE parameter 4 should be lower -- use 1 for best performance/utilization
-Info: Found 1 design units, including 1 entities, in source file db/mux_npe.tdf
- Info: Found entity 1: mux_npe
-Info: Elaborating entity "mux_npe" for hierarchy "Video:Fredi_Aschwanden|lpm_mux1:inst24|LPM_MUX:lpm_mux_component|mux_npe:auto_generated"
-Info: Elaborating entity "lpm_constant2" for hierarchy "Video:Fredi_Aschwanden|lpm_constant2:inst23"
-Info: Elaborating entity "lpm_constant" for hierarchy "Video:Fredi_Aschwanden|lpm_constant2:inst23|lpm_constant:lpm_constant_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_constant2:inst23|lpm_constant:lpm_constant_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_constant2:inst23|lpm_constant:lpm_constant_component" with the following parameter:
- Info: Parameter "lpm_cvalue" = "0"
- Info: Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO"
- Info: Parameter "lpm_type" = "LPM_CONSTANT"
- Info: Parameter "lpm_width" = "8"
-Info: Elaborating entity "lpm_mux0" for hierarchy "Video:Fredi_Aschwanden|lpm_mux0:inst21"
-Info: Elaborating entity "LPM_MUX" for hierarchy "Video:Fredi_Aschwanden|lpm_mux0:inst21|LPM_MUX:lpm_mux_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|lpm_mux0:inst21|LPM_MUX:lpm_mux_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|lpm_mux0:inst21|LPM_MUX:lpm_mux_component" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "32"
- Info: Parameter "LPM_SIZE" = "4"
- Info: Parameter "LPM_WIDTHS" = "2"
- Info: Parameter "LPM_PIPELINE" = "4"
- Info: Parameter "LPM_TYPE" = "LPM_MUX"
- Info: Parameter "LPM_HINT" = "UNUSED"
-Info: Found 1 design units, including 1 entities, in source file db/mux_gpe.tdf
- Info: Found entity 1: mux_gpe
-Info: Elaborating entity "mux_gpe" for hierarchy "Video:Fredi_Aschwanden|lpm_mux0:inst21|LPM_MUX:lpm_mux_component|mux_gpe:auto_generated"
-Info: Elaborating entity "altddio_out0" for hierarchy "Video:Fredi_Aschwanden|altddio_out0:inst2"
-Info: Elaborating entity "altddio_out" for hierarchy "Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component" with the following parameter:
- Info: Parameter "extend_oe_disable" = "UNUSED"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "invert_output" = "ON"
- Info: Parameter "lpm_type" = "altddio_out"
- Info: Parameter "oe_reg" = "UNUSED"
- Info: Parameter "power_up_high" = "ON"
- Info: Parameter "width" = "4"
-Info: Found 1 design units, including 1 entities, in source file db/ddio_out_are.tdf
- Info: Found entity 1: ddio_out_are
-Info: Elaborating entity "ddio_out_are" for hierarchy "Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated"
-Info: Elaborating entity "altpll2" for hierarchy "altpll2:inst12"
-Info: Elaborating entity "altpll" for hierarchy "altpll2:inst12|altpll:altpll_component"
-Info: Elaborated megafunction instantiation "altpll2:inst12|altpll:altpll_component"
-Info: Instantiated megafunction "altpll2:inst12|altpll:altpll_component" with the following parameter:
- Info: Parameter "bandwidth_type" = "AUTO"
- Info: Parameter "clk0_divide_by" = "1"
- Info: Parameter "clk0_duty_cycle" = "50"
- Info: Parameter "clk0_multiply_by" = "4"
- Info: Parameter "clk0_phase_shift" = "5051"
- Info: Parameter "clk1_divide_by" = "1"
- Info: Parameter "clk1_duty_cycle" = "50"
- Info: Parameter "clk1_multiply_by" = "4"
- Info: Parameter "clk1_phase_shift" = "0"
- Info: Parameter "clk2_divide_by" = "1"
- Info: Parameter "clk2_duty_cycle" = "50"
- Info: Parameter "clk2_multiply_by" = "4"
- Info: Parameter "clk2_phase_shift" = "3788"
- Info: Parameter "clk3_divide_by" = "1"
- Info: Parameter "clk3_duty_cycle" = "50"
- Info: Parameter "clk3_multiply_by" = "4"
- Info: Parameter "clk3_phase_shift" = "2210"
- Info: Parameter "clk4_divide_by" = "1"
- Info: Parameter "clk4_duty_cycle" = "50"
- Info: Parameter "clk4_multiply_by" = "2"
- Info: Parameter "clk4_phase_shift" = "11364"
- Info: Parameter "compensate_clock" = "CLK0"
- Info: Parameter "inclk0_input_frequency" = "30303"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_type" = "altpll"
- Info: Parameter "operation_mode" = "SOURCE_SYNCHRONOUS"
- Info: Parameter "pll_type" = "AUTO"
- Info: Parameter "port_activeclock" = "PORT_UNUSED"
- Info: Parameter "port_areset" = "PORT_UNUSED"
- Info: Parameter "port_clkbad0" = "PORT_UNUSED"
- Info: Parameter "port_clkbad1" = "PORT_UNUSED"
- Info: Parameter "port_clkloss" = "PORT_UNUSED"
- Info: Parameter "port_clkswitch" = "PORT_UNUSED"
- Info: Parameter "port_configupdate" = "PORT_UNUSED"
- Info: Parameter "port_fbin" = "PORT_UNUSED"
- Info: Parameter "port_inclk0" = "PORT_USED"
- Info: Parameter "port_inclk1" = "PORT_UNUSED"
- Info: Parameter "port_locked" = "PORT_UNUSED"
- Info: Parameter "port_pfdena" = "PORT_UNUSED"
- Info: Parameter "port_phasecounterselect" = "PORT_UNUSED"
- Info: Parameter "port_phasedone" = "PORT_UNUSED"
- Info: Parameter "port_phasestep" = "PORT_UNUSED"
- Info: Parameter "port_phaseupdown" = "PORT_UNUSED"
- Info: Parameter "port_pllena" = "PORT_UNUSED"
- Info: Parameter "port_scanaclr" = "PORT_UNUSED"
- Info: Parameter "port_scanclk" = "PORT_UNUSED"
- Info: Parameter "port_scanclkena" = "PORT_UNUSED"
- Info: Parameter "port_scandata" = "PORT_UNUSED"
- Info: Parameter "port_scandataout" = "PORT_UNUSED"
- Info: Parameter "port_scandone" = "PORT_UNUSED"
- Info: Parameter "port_scanread" = "PORT_UNUSED"
- Info: Parameter "port_scanwrite" = "PORT_UNUSED"
- Info: Parameter "port_clk0" = "PORT_USED"
- Info: Parameter "port_clk1" = "PORT_USED"
- Info: Parameter "port_clk2" = "PORT_USED"
- Info: Parameter "port_clk3" = "PORT_USED"
- Info: Parameter "port_clk4" = "PORT_USED"
- Info: Parameter "port_clk5" = "PORT_UNUSED"
- Info: Parameter "port_clkena0" = "PORT_UNUSED"
- Info: Parameter "port_clkena1" = "PORT_UNUSED"
- Info: Parameter "port_clkena2" = "PORT_UNUSED"
- Info: Parameter "port_clkena3" = "PORT_UNUSED"
- Info: Parameter "port_clkena4" = "PORT_UNUSED"
- Info: Parameter "port_clkena5" = "PORT_UNUSED"
- Info: Parameter "port_extclk0" = "PORT_UNUSED"
- Info: Parameter "port_extclk1" = "PORT_UNUSED"
- Info: Parameter "port_extclk2" = "PORT_UNUSED"
- Info: Parameter "port_extclk3" = "PORT_UNUSED"
- Info: Parameter "width_clock" = "5"
-Info: Found 1 design units, including 1 entities, in source file db/altpll_isv2.tdf
- Info: Found entity 1: altpll_isv2
-Info: Elaborating entity "altpll_isv2" for hierarchy "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated"
-Warning: Using design file altpll4.tdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
- Info: Found entity 1: altpll4
-Info: Elaborating entity "altpll4" for hierarchy "altpll4:inst22"
-Info: Elaborating entity "altpll" for hierarchy "altpll4:inst22|altpll:altpll_component"
-Info: Elaborated megafunction instantiation "altpll4:inst22|altpll:altpll_component"
-Info: Instantiated megafunction "altpll4:inst22|altpll:altpll_component" with the following parameter:
- Info: Parameter "bandwidth_type" = "AUTO"
- Info: Parameter "clk0_divide_by" = "1"
- Info: Parameter "clk0_duty_cycle" = "50"
- Info: Parameter "clk0_multiply_by" = "2"
- Info: Parameter "clk0_phase_shift" = "0"
- Info: Parameter "compensate_clock" = "CLK0"
- Info: Parameter "inclk0_input_frequency" = "20833"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "lpm_type" = "altpll"
- Info: Parameter "operation_mode" = "NORMAL"
- Info: Parameter "pll_type" = "AUTO"
- Info: Parameter "port_activeclock" = "PORT_UNUSED"
- Info: Parameter "port_areset" = "PORT_USED"
- Info: Parameter "port_clk0" = "PORT_USED"
- Info: Parameter "port_clk1" = "PORT_UNUSED"
- Info: Parameter "port_clk2" = "PORT_UNUSED"
- Info: Parameter "port_clk3" = "PORT_UNUSED"
- Info: Parameter "port_clk4" = "PORT_UNUSED"
- Info: Parameter "port_clk5" = "PORT_UNUSED"
- Info: Parameter "port_clkbad0" = "PORT_UNUSED"
- Info: Parameter "port_clkbad1" = "PORT_UNUSED"
- Info: Parameter "port_clkena0" = "PORT_UNUSED"
- Info: Parameter "port_clkena1" = "PORT_UNUSED"
- Info: Parameter "port_clkena2" = "PORT_UNUSED"
- Info: Parameter "port_clkena3" = "PORT_UNUSED"
- Info: Parameter "port_clkena4" = "PORT_UNUSED"
- Info: Parameter "port_clkena5" = "PORT_UNUSED"
- Info: Parameter "port_clkloss" = "PORT_UNUSED"
- Info: Parameter "port_clkswitch" = "PORT_UNUSED"
- Info: Parameter "port_configupdate" = "PORT_USED"
- Info: Parameter "port_extclk0" = "PORT_UNUSED"
- Info: Parameter "port_extclk1" = "PORT_UNUSED"
- Info: Parameter "port_extclk2" = "PORT_UNUSED"
- Info: Parameter "port_extclk3" = "PORT_UNUSED"
- Info: Parameter "port_fbin" = "PORT_UNUSED"
- Info: Parameter "port_inclk0" = "PORT_USED"
- Info: Parameter "port_inclk1" = "PORT_UNUSED"
- Info: Parameter "port_locked" = "PORT_USED"
- Info: Parameter "port_pfdena" = "PORT_UNUSED"
- Info: Parameter "port_phasecounterselect" = "PORT_UNUSED"
- Info: Parameter "port_phasedone" = "PORT_UNUSED"
- Info: Parameter "port_phasestep" = "PORT_UNUSED"
- Info: Parameter "port_phaseupdown" = "PORT_UNUSED"
- Info: Parameter "port_pllena" = "PORT_UNUSED"
- Info: Parameter "port_scanaclr" = "PORT_UNUSED"
- Info: Parameter "port_scanclk" = "PORT_USED"
- Info: Parameter "port_scanclkena" = "PORT_USED"
- Info: Parameter "port_scandata" = "PORT_USED"
- Info: Parameter "port_scandataout" = "PORT_USED"
- Info: Parameter "port_scandone" = "PORT_USED"
- Info: Parameter "port_scanread" = "PORT_UNUSED"
- Info: Parameter "port_scanwrite" = "PORT_UNUSED"
- Info: Parameter "scan_chain_mif_file" = "altpll4.mif"
- Info: Parameter "self_reset_on_loss_lock" = "OFF"
- Info: Parameter "width_clock" = "5"
- Info: Parameter "width_phasecounterselect" = "4"
-Info: Found 1 design units, including 1 entities, in source file db/altpll_c6j2.tdf
- Info: Found entity 1: altpll_c6j2
-Info: Elaborating entity "altpll_c6j2" for hierarchy "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated"
-Warning: Using design file altpll_reconfig1.tdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
- Info: Found entity 1: altpll_reconfig1
-Info: Elaborating entity "altpll_reconfig1" for hierarchy "altpll_reconfig1:inst7"
-Warning: Using design file altpll_reconfig1_pllrcfg_t4q.tdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
- Info: Found entity 1: altpll_reconfig1_pllrcfg_t4q
-Info: Elaborating entity "altpll_reconfig1_pllrcfg_t4q" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component"
-Info: Elaborating entity "altsyncram" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4"
-Info: Elaborated megafunction instantiation "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4"
-Info: Instantiated megafunction "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4" with the following parameter:
- Info: Parameter "OPERATION_MODE" = "SINGLE_PORT"
- Info: Parameter "WIDTH_A" = "1"
- Info: Parameter "WIDTHAD_A" = "8"
- Info: Parameter "NUMWORDS_A" = "144"
- Info: Parameter "WIDTH_BYTEENA_A" = "1"
-Info: Found 1 design units, including 1 entities, in source file db/altsyncram_46r.tdf
- Info: Found entity 1: altsyncram_46r
-Info: Elaborating entity "altsyncram_46r" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4|altsyncram_46r:auto_generated"
-Info: Elaborating entity "lpm_add_sub" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub5"
-Info: Elaborated megafunction instantiation "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub5"
-Info: Instantiated megafunction "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub5" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "9"
-Info: Found 1 design units, including 1 entities, in source file db/add_sub_hpa.tdf
- Info: Found entity 1: add_sub_hpa
-Info: Elaborating entity "add_sub_hpa" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub5|add_sub_hpa:auto_generated"
-Info: Elaborating entity "lpm_add_sub" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub6"
-Info: Elaborated megafunction instantiation "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub6"
-Info: Instantiated megafunction "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub6" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "8"
-Info: Found 1 design units, including 1 entities, in source file db/add_sub_k8a.tdf
- Info: Found entity 1: add_sub_k8a
-Info: Elaborating entity "add_sub_k8a" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_add_sub:add_sub6|add_sub_k8a:auto_generated"
-Info: Elaborating entity "lpm_compare" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7"
-Info: Elaborated megafunction instantiation "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7"
-Info: Instantiated megafunction "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7" with the following parameter:
- Info: Parameter "LPM_WIDTH" = "8"
-Info: Found 1 design units, including 1 entities, in source file db/cmpr_tnd.tdf
- Info: Found entity 1: cmpr_tnd
-Info: Elaborating entity "cmpr_tnd" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_compare:cmpr7|cmpr_tnd:auto_generated"
-Info: Elaborating entity "lpm_counter" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1"
-Info: Elaborated megafunction instantiation "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1"
-Info: Instantiated megafunction "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1" with the following parameter:
- Info: Parameter "LPM_DIRECTION" = "DOWN"
- Info: Parameter "lpm_modulus" = "144"
- Info: Parameter "lpm_port_updown" = "PORT_UNUSED"
- Info: Parameter "LPM_WIDTH" = "8"
-Info: Found 1 design units, including 1 entities, in source file db/cntr_30l.tdf
- Info: Found entity 1: cntr_30l
-Info: Elaborating entity "cntr_30l" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr1|cntr_30l:auto_generated"
-Info: Elaborating entity "lpm_counter" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13"
-Info: Elaborated megafunction instantiation "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13"
-Info: Instantiated megafunction "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13" with the following parameter:
- Info: Parameter "LPM_DIRECTION" = "DOWN"
- Info: Parameter "lpm_port_updown" = "PORT_UNUSED"
- Info: Parameter "LPM_WIDTH" = "6"
-Info: Found 1 design units, including 1 entities, in source file db/cntr_qij.tdf
- Info: Found entity 1: cntr_qij
-Info: Elaborating entity "cntr_qij" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr13|cntr_qij:auto_generated"
-Info: Elaborating entity "lpm_counter" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14"
-Info: Elaborated megafunction instantiation "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14"
-Info: Instantiated megafunction "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14" with the following parameter:
- Info: Parameter "LPM_DIRECTION" = "DOWN"
- Info: Parameter "lpm_port_updown" = "PORT_UNUSED"
- Info: Parameter "LPM_WIDTH" = "5"
-Info: Found 1 design units, including 1 entities, in source file db/cntr_pij.tdf
- Info: Found entity 1: cntr_pij
-Info: Elaborating entity "cntr_pij" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr14|cntr_pij:auto_generated"
-Info: Elaborating entity "lpm_counter" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2"
-Info: Elaborated megafunction instantiation "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2"
-Info: Instantiated megafunction "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2" with the following parameter:
- Info: Parameter "LPM_DIRECTION" = "UP"
- Info: Parameter "lpm_port_updown" = "PORT_UNUSED"
- Info: Parameter "LPM_WIDTH" = "8"
-Info: Found 1 design units, including 1 entities, in source file db/cntr_9cj.tdf
- Info: Found entity 1: cntr_9cj
-Info: Elaborating entity "cntr_9cj" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_counter:cntr2|cntr_9cj:auto_generated"
-Info: Elaborating entity "lpm_decode" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_decode:decode11"
-Info: Elaborated megafunction instantiation "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_decode:decode11"
-Info: Instantiated megafunction "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_decode:decode11" with the following parameter:
- Info: Parameter "LPM_DECODES" = "5"
- Info: Parameter "LPM_WIDTH" = "3"
-Info: Found 1 design units, including 1 entities, in source file db/decode_2af.tdf
- Info: Found entity 1: decode_2af
-Info: Elaborating entity "decode_2af" for hierarchy "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|lpm_decode:decode11|decode_2af:auto_generated"
-Info: Elaborating entity "DSP" for hierarchy "DSP:Mathias_Alles"
-Info: Elaborating entity "interrupt_handler" for hierarchy "interrupt_handler:nobody"
-Info: Elaborating entity "lpm_counter0" for hierarchy "lpm_counter0:inst18"
-Info: Elaborating entity "lpm_counter" for hierarchy "lpm_counter0:inst18|lpm_counter:lpm_counter_component"
-Info: Elaborated megafunction instantiation "lpm_counter0:inst18|lpm_counter:lpm_counter_component"
-Info: Instantiated megafunction "lpm_counter0:inst18|lpm_counter:lpm_counter_component" with the following parameter:
- Info: Parameter "lpm_direction" = "UP"
- Info: Parameter "lpm_port_updown" = "PORT_UNUSED"
- Info: Parameter "lpm_type" = "LPM_COUNTER"
- Info: Parameter "lpm_width" = "18"
-Info: Found 1 design units, including 1 entities, in source file db/cntr_mph.tdf
- Info: Found entity 1: cntr_mph
-Info: Elaborating entity "cntr_mph" for hierarchy "lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated"
-Info: Elaborating entity "altddio_out3" for hierarchy "altddio_out3:inst5"
-Info: Elaborating entity "altddio_out" for hierarchy "altddio_out3:inst5|altddio_out:altddio_out_component"
-Info: Elaborated megafunction instantiation "altddio_out3:inst5|altddio_out:altddio_out_component"
-Info: Instantiated megafunction "altddio_out3:inst5|altddio_out:altddio_out_component" with the following parameter:
- Info: Parameter "extend_oe_disable" = "UNUSED"
- Info: Parameter "intended_device_family" = "Cyclone III"
- Info: Parameter "invert_output" = "OFF"
- Info: Parameter "lpm_type" = "altddio_out"
- Info: Parameter "oe_reg" = "UNUSED"
- Info: Parameter "power_up_high" = "OFF"
- Info: Parameter "width" = "1"
-Info: Found 1 design units, including 1 entities, in source file db/ddio_out_31f.tdf
- Info: Found entity 1: ddio_out_31f
-Info: Elaborating entity "ddio_out_31f" for hierarchy "altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated"
-Warning: Timing-Driven Synthesis is skipped because the Classic Timing Analyzer is turned on
-Info: Inferred 3 megafunctions from design logic
- Info: Inferred multiplier megafunction ("lpm_mult") from the following logic: "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_14"
- Info: Inferred multiplier megafunction ("lpm_mult") from the following logic: "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_6"
- Info: Inferred multiplier megafunction ("lpm_mult") from the following logic: "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|op_12"
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14" with the following parameter:
- Info: Parameter "LPM_WIDTHA" = "12"
- Info: Parameter "LPM_WIDTHB" = "6"
- Info: Parameter "LPM_WIDTHP" = "18"
- Info: Parameter "LPM_WIDTHR" = "18"
- Info: Parameter "LPM_WIDTHS" = "1"
- Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
- Info: Parameter "INPUT_A_IS_CONSTANT" = "NO"
- Info: Parameter "INPUT_B_IS_CONSTANT" = "NO"
- Info: Parameter "MAXIMIZE_SPEED" = "5"
-Info: Found 1 design units, including 1 entities, in source file db/mult_cat.tdf
- Info: Found entity 1: mult_cat
-Info: Elaborated megafunction instantiation "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6"
-Info: Instantiated megafunction "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6" with the following parameter:
- Info: Parameter "LPM_WIDTHA" = "12"
- Info: Parameter "LPM_WIDTHB" = "5"
- Info: Parameter "LPM_WIDTHP" = "17"
- Info: Parameter "LPM_WIDTHR" = "17"
- Info: Parameter "LPM_WIDTHS" = "1"
- Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
- Info: Parameter "INPUT_A_IS_CONSTANT" = "NO"
- Info: Parameter "INPUT_B_IS_CONSTANT" = "NO"
- Info: Parameter "MAXIMIZE_SPEED" = "5"
-Info: Found 1 design units, including 1 entities, in source file db/mult_aat.tdf
- Info: Found entity 1: mult_aat
-Warning: The following nodes have both tri-state and non-tri-state drivers
- Warning: Inserted always-enabled tri-state buffer between "IO[17]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[16]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[15]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[14]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[13]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[12]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[11]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[10]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[9]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[8]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[7]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[6]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[5]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[4]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[3]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[2]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[1]" and its non-tri-state driver.
- Warning: Inserted always-enabled tri-state buffer between "IO[0]" and its non-tri-state driver.
-Info: Registers with preset signals will power-up high
-Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
-Warning: TRI or OPNDRN buffers permanently disabled
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SCSI_PAR~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nSCSI_RST~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SCSI_D[7]~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SCSI_D[6]~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SCSI_D[5]~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SCSI_D[4]~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SCSI_D[3]~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SCSI_D[2]~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SCSI_D[1]~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|SCSI_D[0]~synth"
-Warning: TRI or OPNDRN buffers permanently enabled
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "IO~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nSCSI_SEL~synth"
- Warning: Node "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|nSCSI_BUSY~synth"
-Warning: Output pins are stuck at VCC or GND
- Warning (13410): Pin "nACSI_ACK" is stuck at VCC
- Warning (13410): Pin "nACSI_CS" is stuck at VCC
- Warning (13410): Pin "ACSI_DIR" is stuck at GND
- Warning (13410): Pin "nSCSI_ACK" is stuck at VCC
- Warning (13410): Pin "nSCSI_ATN" is stuck at VCC
- Warning (13410): Pin "SCSI_DIR" is stuck at VCC
- Warning (13410): Pin "nSYNC" is stuck at GND
-Info: 78 registers lost all their fanouts during netlist optimizations. The first 78 are displayed below.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[31]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[30]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[29]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[28]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[27]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[26]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[25]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[24]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[23]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[22]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[21]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[20]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[19]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[18]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[17]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[16]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[15]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[14]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[13]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[12]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[11]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[10]" lost all its fanouts during netlist optimizations.
- Info: Register "interrupt_handler:nobody|INT_CLEAR[7]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|FM_In" lost all its fanouts during netlist optimizations.
- Info: Register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_5n7:usedw_counter|counter_reg_bit[6]" lost all its fanouts during netlist optimizations.
- Info: Register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_5n7:usedw_counter|counter_reg_bit[5]" lost all its fanouts during netlist optimizations.
- Info: Register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_5n7:usedw_counter|counter_reg_bit[4]" lost all its fanouts during netlist optimizations.
- Info: Register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_5n7:usedw_counter|counter_reg_bit[3]" lost all its fanouts during netlist optimizations.
- Info: Register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_5n7:usedw_counter|counter_reg_bit[2]" lost all its fanouts during netlist optimizations.
- Info: Register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_5n7:usedw_counter|counter_reg_bit[1]" lost all its fanouts during netlist optimizations.
- Info: Register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_5n7:usedw_counter|counter_reg_bit[0]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|\P_WAVSTRB:TMP" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_MIDI|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|\P_IRQ:DCD_TRANS" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|\P_IRQ:DCD_TRANS" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|AIP" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|LA" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|BSY_ERR" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|TCR[3]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|IDR[5]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|IDR[4]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|IDR[3]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|IDR[2]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|IDR[1]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|IDR[0]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|\PARITY:LOCK" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\FM_ENCODER:CNT[7]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\FM_ENCODER:CNT[6]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\FM_ENCODER:CNT[5]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\FM_ENCODER:CNT[4]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\FM_ENCODER:CNT[3]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\FM_ENCODER:CNT[2]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\FM_ENCODER:CNT[1]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\FM_ENCODER:CNT[0]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|BUS_FREE" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|\REGISTERS:BSY_LOCK" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|\P_BUSFREE:TMP[2]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|\P_BUSFREE:TMP[1]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|\P_BUSFREE:TMP[0]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|IDR[7]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|IDR[6]" lost all its fanouts during netlist optimizations.
- Info: Register "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[9]" lost all its fanouts during netlist optimizations.
- Info: Register "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[9]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_gd9:rs_bwp|dffe15a[8]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_pe9:rs_brp|dffe16a[10]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_pe9:ws_bwp|dffe16a[10]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|dffpipe_gd9:ws_brp|dffe15a[8]" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE.IDLE" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE.DMA_STEP_1" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE.DMA_STEP_2" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE.DMA_STEP_3" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|DMA_STATE.DMA_STEP_4" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.IDLE" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.DMA_SEND" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.DMA_TARG_RCV" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.DMA_INIT_RCV" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_CONTROL:I_CONTROL|CTRL_STATE.WAIT_2200ns" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_STATE.A_00" lost all its fanouts during netlist optimizations.
- Info: Register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\ADDER:ADDER_DATA[12]" lost all its fanouts during netlist optimizations.
-Info: Found the following redundant logic cells in design
- Info (17048): Logic cell "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|cuda_combout_wire[0]"
- Info (17048): Logic cell "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|cuda_combout_wire[1]"
- Info (17048): Logic cell "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|cuda_combout_wire[2]"
-Warning: Design contains 18 input pin(s) that do not drive logic
- Warning (15610): No output dependent on input pin "nFB_BURST"
- Warning (15610): No output dependent on input pin "nACSI_DRQ"
- Warning (15610): No output dependent on input pin "nACSI_INT"
- Warning (15610): No output dependent on input pin "nSCSI_DRQ"
- Warning (15610): No output dependent on input pin "nSCSI_MSG"
- Warning (15610): No output dependent on input pin "nDCHG"
- Warning (15610): No output dependent on input pin "SD_DATA0"
- Warning (15610): No output dependent on input pin "SD_DATA1"
- Warning (15610): No output dependent on input pin "SD_DATA2"
- Warning (15610): No output dependent on input pin "SD_CARD_DEDECT"
- Warning (15610): No output dependent on input pin "SD_WP"
- Warning (15610): No output dependent on input pin "nDACK0"
- Warning (15610): No output dependent on input pin "WP_CF_CARD"
- Warning (15610): No output dependent on input pin "nSCSI_C_D"
- Warning (15610): No output dependent on input pin "nSCSI_I_O"
- Warning (15610): No output dependent on input pin "nFB_CS3"
- Warning (15610): No output dependent on input pin "TOUT0"
- Warning (15610): No output dependent on input pin "nMASTER"
-Info: Implemented 11489 device resources after synthesis - the final resource count might be different
- Info: Implemented 51 input pins
- Info: Implemented 112 output pins
- Info: Implemented 132 bidirectional pins
- Info: Implemented 10796 logic cells
- Info: Implemented 324 RAM segments
- Info: Implemented 4 PLLs
- Info: Implemented 6 DSP elements
-Info: Quartus II Analysis & Synthesis was successful. 0 errors, 143 warnings
- Info: Peak virtual memory: 347 megabytes
- Info: Processing ended: Wed Dec 15 02:21:56 2010
- Info: Elapsed time: 00:01:19
- Info: Total CPU time (on all processors): 00:01:20
-
-
diff --git a/FPGA_by_Fredi/firebee1.map.summary b/FPGA_by_Fredi/firebee1.map.summary
index f8da91e..7a93fd1 100644
--- a/FPGA_by_Fredi/firebee1.map.summary
+++ b/FPGA_by_Fredi/firebee1.map.summary
@@ -1,14 +1,14 @@
-Analysis & Synthesis Status : Successful - Wed Dec 15 02:21:55 2010
+Analysis & Synthesis Status : Successful - Fri Aug 28 13:35:56 2015
Quartus II Version : 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
Revision Name : firebee1
Top-level Entity Name : firebee1
Family : Cyclone III
-Total logic elements : 10,706
- Total combinational functions : 8,060
- Dedicated logic registers : 4,612
-Total registers : 4740
+Total logic elements : 11,642
+ Total combinational functions : 8,656
+ Dedicated logic registers : 5,028
+Total registers : 5156
Total pins : 295
Total virtual pins : 0
-Total memory bits : 109,344
+Total memory bits : 109,600
Embedded Multiplier 9-bit elements : 6
Total PLLs : 4
diff --git a/FPGA_by_Fredi/firebee1.pin b/FPGA_by_Fredi/firebee1.pin
index 50b8dd7..9f213b1 100644
--- a/FPGA_by_Fredi/firebee1.pin
+++ b/FPGA_by_Fredi/firebee1.pin
@@ -33,7 +33,7 @@
-- Bank 5: 2.5V
-- Bank 6: 3.0V
-- Bank 7: 3.3V
- -- Bank 8: 3.3V
+ -- Bank 8: 3.0V
-- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND.
-- It can also be used to report unused dedicated pins. The connection
-- on the board for unused dedicated pins depends on whether this will
@@ -72,15 +72,15 @@ CHIP "firebee1" ASSIGNED TO AN: EP3C40F484C6
Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
-------------------------------------------------------------------------------------------------------------
GND : A1 : gnd : : : :
-VCCIO8 : A2 : power : : 3.3V : 8 :
-LP_D[6] : A3 : bidir : 3.3-V LVTTL : : 8 : Y
-nSRBLE : A4 : output : 3.3-V LVTTL : : 8 : Y
-SRD[1] : A5 : bidir : 3.3-V LVTTL : : 8 : Y
-IO[3] : A6 : bidir : 3.3-V LVTTL : : 8 : Y
-IO[1] : A7 : bidir : 3.3-V LVTTL : : 8 : Y
-IO[0] : A8 : bidir : 3.3-V LVTTL : : 8 : Y
-SRD[10] : A9 : bidir : 3.3-V LVTTL : : 8 : Y
-SRD[9] : A10 : bidir : 3.3-V LVTTL : : 8 : Y
+VCCIO8 : A2 : power : : 3.0V : 8 :
+LP_D[6] : A3 : bidir : 3.0-V LVCMOS : : 8 : Y
+nSRBLE : A4 : output : 3.0-V LVCMOS : : 8 : Y
+SRD[1] : A5 : bidir : 3.0-V LVCMOS : : 8 : Y
+IO[3] : A6 : bidir : 3.0-V LVCMOS : : 8 : Y
+IO[1] : A7 : bidir : 3.0-V LVCMOS : : 8 : Y
+IO[0] : A8 : bidir : 3.0-V LVCMOS : : 8 : Y
+SRD[10] : A9 : bidir : 3.0-V LVCMOS : : 8 : Y
+SRD[9] : A10 : bidir : 3.0-V LVCMOS : : 8 : Y
DVI_INT : A11 : input : 3.3-V LVTTL : : 8 : Y
nDACK1 : A12 : input : 3.3-V LVTTL : : 7 : Y
IO[16] : A13 : bidir : 3.3-V LVTTL : : 7 : Y
@@ -126,7 +126,7 @@ FB_AD[23] : AB8 : bidir : 3.3-V LVTTL :
FB_AD[26] : AB9 : bidir : 3.3-V LVTTL : : 3 : Y
CLK24M576 : AB10 : output : 3.3-V LVTTL : : 3 : Y
GND+ : AB11 : : : : 3 :
-CLK33M : AB12 : input : 3.3-V LVTTL : : 4 : Y
+CLK33MDIR : AB12 : input : 3.3-V LVTTL : : 4 : Y
VD[29] : AB13 : bidir : 2.5 V : : 4 : Y
VD[26] : AB14 : bidir : 2.5 V : : 4 : Y
VD[24] : AB15 : bidir : 2.5 V : : 4 : Y
@@ -139,14 +139,14 @@ VCCIO4 : AB21 : power : : 2.5V
GND : AB22 : gnd : : : :
ACSI_D[0] : B1 : bidir : 3.3-V LVTTL : : 1 : Y
MIDI_TLR : B2 : output : 3.3-V LVTTL : : 1 : Y
-LP_D[5] : B3 : bidir : 3.3-V LVTTL : : 8 : Y
-nSRBHE : B4 : output : 3.3-V LVTTL : : 8 : Y
-SRD[0] : B5 : bidir : 3.3-V LVTTL : : 8 : Y
-IO[4] : B6 : bidir : 3.3-V LVTTL : : 8 : Y
-IO[2] : B7 : bidir : 3.3-V LVTTL : : 8 : Y
-nSRCS : B8 : output : 3.3-V LVTTL : : 8 : Y
-SRD[8] : B9 : bidir : 3.3-V LVTTL : : 8 : Y
-SRD[11] : B10 : bidir : 3.3-V LVTTL : : 8 : Y
+LP_D[5] : B3 : bidir : 3.0-V LVCMOS : : 8 : Y
+nSRBHE : B4 : output : 3.0-V LVCMOS : : 8 : Y
+SRD[0] : B5 : bidir : 3.0-V LVCMOS : : 8 : Y
+IO[4] : B6 : bidir : 3.0-V LVCMOS : : 8 : Y
+IO[2] : B7 : bidir : 3.0-V LVCMOS : : 8 : Y
+nSRCS : B8 : output : 3.0-V LVCMOS : : 8 : Y
+SRD[8] : B9 : bidir : 3.0-V LVCMOS : : 8 : Y
+SRD[11] : B10 : bidir : 3.0-V LVCMOS : : 8 : Y
nRSTO_MCF : B11 : input : 3.3-V LVTTL : : 8 : Y
nDACK0 : B12 : input : 3.3-V LVTTL : : 7 : Y
IO[17] : B13 : bidir : 3.3-V LVTTL : : 7 : Y
@@ -161,14 +161,14 @@ VB[5] : B21 : output : 3.0-V LVTTL :
VB[4] : B22 : output : 3.0-V LVTTL : : 6 : Y
ACSI_D[4] : C1 : bidir : 3.3-V LVTTL : : 1 : Y
ACSI_D[3] : C2 : bidir : 3.3-V LVTTL : : 1 : Y
-LP_D[2] : C3 : bidir : 3.3-V LVTTL : : 8 : Y
-LP_D[1] : C4 : bidir : 3.3-V LVTTL : : 8 : Y
+LP_D[2] : C3 : bidir : 3.0-V LVCMOS : : 8 : Y
+LP_D[1] : C4 : bidir : 3.0-V LVCMOS : : 8 : Y
GND : C5 : gnd : : : :
-SRD[2] : C6 : bidir : 3.3-V LVTTL : : 8 : Y
-IO[7] : C7 : bidir : 3.3-V LVTTL : : 8 : Y
-IO[6] : C8 : bidir : 3.3-V LVTTL : : 8 : Y
+SRD[2] : C6 : bidir : 3.0-V LVCMOS : : 8 : Y
+IO[7] : C7 : bidir : 3.0-V LVCMOS : : 8 : Y
+IO[6] : C8 : bidir : 3.0-V LVCMOS : : 8 : Y
GND : C9 : gnd : : : :
-SRD[4] : C10 : bidir : 3.3-V LVTTL : : 8 : Y
+SRD[4] : C10 : bidir : 3.0-V LVCMOS : : 8 : Y
GND : C11 : gnd : : : :
GND : C12 : gnd : : : :
IO[11] : C13 : bidir : 3.3-V LVTTL : : 7 : Y
@@ -185,13 +185,13 @@ VB[2] : C22 : output : 3.0-V LVTTL :
ACSI_D[5] : D2 : bidir : 3.3-V LVTTL : : 1 : Y
GND : D3 : gnd : : : :
VCCIO1 : D4 : power : : 3.3V : 1 :
-VCCIO8 : D5 : power : : 3.3V : 8 :
-LP_D[4] : D6 : bidir : 3.3-V LVTTL : : 8 : Y
+VCCIO8 : D5 : power : : 3.0V : 8 :
+LP_D[4] : D6 : bidir : 3.0-V LVCMOS : : 8 : Y
RESERVED_INPUT_WITH_WEAK_PULLUP : D7 : : : : 8 :
GND : D8 : gnd : : : :
-VCCIO8 : D9 : power : : 3.3V : 8 :
-SRD[12] : D10 : bidir : 3.3-V LVTTL : : 8 : Y
-VCCIO8 : D11 : power : : 3.3V : 8 :
+VCCIO8 : D9 : power : : 3.0V : 8 :
+SRD[12] : D10 : bidir : 3.0-V LVCMOS : : 8 : Y
+VCCIO8 : D11 : power : : 3.0V : 8 :
VCCIO7 : D12 : power : : 3.3V : 7 :
IO[12] : D13 : bidir : 3.3-V LVTTL : : 7 : Y
VCCIO7 : D14 : power : : 3.3V : 7 :
@@ -207,14 +207,14 @@ SCSI_D[1] : E1 : bidir : 3.3-V LVTTL :
~ALTERA_FLASH_nCE_nCSO~ / RESERVED_INPUT : E2 : input : 3.3-V LVTTL : : 1 : N
ACSI_D[2] : E3 : bidir : 3.3-V LVTTL : : 1 : Y
RESERVED_INPUT_WITH_WEAK_PULLUP : E4 : : : : 1 :
-LPDIR : E5 : output : 3.3-V LVTTL : : 8 : Y
-LP_STR : E6 : output : 3.3-V LVTTL : : 8 : Y
-LP_D[3] : E7 : bidir : 3.3-V LVTTL : : 8 : Y
-VCCIO8 : E8 : power : : 3.3V : 8 :
-IO[5] : E9 : bidir : 3.3-V LVTTL : : 8 : Y
-SRD[6] : E10 : bidir : 3.3-V LVTTL : : 8 : Y
+LPDIR : E5 : output : 3.0-V LVCMOS : : 8 : Y
+LP_STR : E6 : output : 3.0-V LVCMOS : : 8 : Y
+LP_D[3] : E7 : bidir : 3.0-V LVCMOS : : 8 : Y
+VCCIO8 : E8 : power : : 3.0V : 8 :
+IO[5] : E9 : bidir : 3.0-V LVCMOS : : 8 : Y
+SRD[6] : E10 : bidir : 3.0-V LVCMOS : : 8 : Y
nDREQ1 : E11 : output : 3.3-V LVTTL : : 7 : Y
-MIDI_IN : E12 : input : 3.3-V LVTTL : : 7 : Y
+MIDI_IN_PIN : E12 : bidir : 3.3-V LVTTL : : 7 : Y
IO[13] : E13 : bidir : 3.3-V LVTTL : : 7 : Y
SD_CMD_D1 : E14 : bidir : 3.3-V LVTTL : : 7 : Y
YM_QC : E15 : output : 3.3-V LVTTL : : 7 : Y
@@ -231,10 +231,10 @@ GND : F3 : gnd : :
VCCIO1 : F4 : power : : 3.3V : 1 :
GNDA3 : F5 : gnd : : : :
VCCD_PLL3 : F6 : power : : 1.2V : :
-LP_D[0] : F7 : bidir : 3.3-V LVTTL : : 8 : Y
-nSRWE : F8 : output : 3.3-V LVTTL : : 8 : Y
-SRD[5] : F9 : bidir : 3.3-V LVTTL : : 8 : Y
-SRD[13] : F10 : bidir : 3.3-V LVTTL : : 8 : Y
+LP_D[0] : F7 : bidir : 3.0-V LVCMOS : : 8 : Y
+nSRWE : F8 : output : 3.0-V LVCMOS : : 8 : Y
+SRD[5] : F9 : bidir : 3.0-V LVCMOS : : 8 : Y
+SRD[13] : F10 : bidir : 3.0-V LVCMOS : : 8 : Y
nSROE : F11 : output : 3.3-V LVTTL : : 7 : Y
GND : F12 : gnd : : : :
SD_CD_DATA3 : F13 : bidir : 3.3-V LVTTL : : 7 : Y
@@ -254,10 +254,10 @@ SCSI_D[4] : G4 : bidir : 3.3-V LVTTL :
ACSI_D[1] : G5 : bidir : 3.3-V LVTTL : : 1 : Y
VCCA3 : G6 : power : : 2.5V : :
LP_BUSY : G7 : input : 3.3-V LVTTL : : 8 : Y
-LP_D[7] : G8 : bidir : 3.3-V LVTTL : : 8 : Y
-SRD[14] : G9 : bidir : 3.3-V LVTTL : : 8 : Y
-IO[8] : G10 : bidir : 3.3-V LVTTL : : 8 : Y
-SRD[3] : G11 : bidir : 3.3-V LVTTL : : 8 : Y
+LP_D[7] : G8 : bidir : 3.0-V LVCMOS : : 8 : Y
+SRD[14] : G9 : bidir : 3.0-V LVCMOS : : 8 : Y
+IO[8] : G10 : bidir : 3.0-V LVCMOS : : 8 : Y
+SRD[3] : G11 : bidir : 3.0-V LVCMOS : : 8 : Y
VCCINT : G12 : power : : 1.2V : :
YM_QB : G13 : output : 3.3-V LVTTL : : 7 : Y
nWR : G14 : output : 3.3-V LVTTL : : 7 : Y
@@ -278,8 +278,8 @@ ACSI_D[7] : H6 : bidir : 3.3-V LVTTL :
ACSI_D[6] : H7 : bidir : 3.3-V LVTTL : : 1 : Y
RESERVED_INPUT_WITH_WEAK_PULLUP : H8 : : : : 1 :
VCCINT : H9 : power : : 1.2V : :
-SRD[15] : H10 : bidir : 3.3-V LVTTL : : 8 : Y
-SRD[7] : H11 : bidir : 3.3-V LVTTL : : 8 : Y
+SRD[15] : H10 : bidir : 3.0-V LVCMOS : : 8 : Y
+SRD[7] : H11 : bidir : 3.0-V LVCMOS : : 8 : Y
GND : H12 : gnd : : : :
GND : H13 : gnd : : : :
CTS : H14 : input : 3.3-V LVTTL : : 7 : Y
@@ -534,7 +534,7 @@ VA[0] : W20 : output : 2.5 V :
VA[2] : W21 : output : 2.5 V : : 5 : Y
VA[1] : W22 : output : 2.5 V : : 5 : Y
IDE_RDY : Y1 : input : 3.3-V LVTTL : : 2 : Y
-AMKB_RX : Y2 : input : 3.3-V LVTTL : : 2 : Y
+AMKB_RX : Y2 : input : 3.3-V LVCMOS : : 2 : Y
FB_AD[0] : Y3 : bidir : 3.3-V LVTTL : : 3 : Y
FB_SIZE1 : Y4 : input : 3.3-V LVTTL : : 3 : Y
GND : Y5 : gnd : : : :
diff --git a/FPGA_by_Fredi/firebee1.qsf b/FPGA_by_Fredi/firebee1.qsf
index 86e8842..a1993e9 100644
--- a/FPGA_by_Fredi/firebee1.qsf
+++ b/FPGA_by_Fredi/firebee1.qsf
@@ -43,175 +43,9 @@ set_global_assignment -name ORIGINAL_QUARTUS_VERSION 8.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:07:29 SEPTEMBER 03, 2009"
set_global_assignment -name LAST_QUARTUS_VERSION "9.1 SP2"
set_global_assignment -name MISC_FILE "C:/firebee/FPGA/firebee1.dpf"
-set_global_assignment -name SOURCE_FILE Video/altddio_bidir0.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_control.vhd
-set_global_assignment -name SOURCE_FILE Video/altddio_out0.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_pkg.vhd
-set_global_assignment -name SOURCE_FILE Video/altddio_out1.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_registers.vhd
-set_global_assignment -name SOURCE_FILE Video/altddio_out2.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_soc_top.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_top.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_am_detector.vhd
-set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo0.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/dcfifo0.vhd
-set_global_assignment -name SOURCE_FILE Video/altdpram2.cmp
-set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo1.cmp
-set_global_assignment -name AHDL_FILE Video/DDR_CTR.tdf
-set_global_assignment -name SOURCE_FILE Video/lpm_bustri0.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_bustri0.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_control.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_crc_logic.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_digital_pll.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_pkg.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_registers.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top_soc.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_transceiver.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_bustri5.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_bustri5.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_bustri6.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_bustri7.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_bustri7.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_compare1.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top_soc.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_gpio.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_constant2.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_constant3.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_pkg.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_constant4.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_timers.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top_soc.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_ctrl.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_rx.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_top.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_tx.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_pkg.vhd
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_ff4.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_ff5.cmp
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_wave.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_ff6.cmp
-set_global_assignment -name VHDL_FILE lpm_latch0.vhd
-set_global_assignment -name SOURCE_FILE lpm_latch0.cmp
-set_global_assignment -name QIP_FILE altpll1.qip
-set_global_assignment -name SOURCE_FILE Video/lpm_fifoDZ.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_fifoDZ.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_latch1.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_mux0.cmp
-set_global_assignment -name QIP_FILE altpll2.qip
-set_global_assignment -name SOURCE_FILE Video/lpm_mux1.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_mux2.cmp
-set_global_assignment -name QIP_FILE altpll3.qip
-set_global_assignment -name SOURCE_FILE Video/lpm_mux3.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_mux4.cmp
-set_global_assignment -name SOURCE_FILE Video/altdpram0.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_mux5.cmp
-set_global_assignment -name VHDL_FILE Video/altdpram0.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_mux6.cmp
-set_global_assignment -name SOURCE_FILE Video/altdpram1.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ2.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_muxDZ2.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_muxDZ.vhd
-set_global_assignment -name SOURCE_FILE altpll0.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_bustri1.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg1.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_ff0.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg2.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_bustri2.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg3.cmp
-set_global_assignment -name SOURCE_FILE altpll2.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg4.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_bustri3.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg5.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_bustri3.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg6.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_bustri4.cmp
-set_global_assignment -name VHDL_FILE altpll2.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_constant0.cmp
-set_global_assignment -name SOURCE_FILE altpll3.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_constant1.cmp
-set_global_assignment -name VHDL_FILE altpll3.vhd
-set_global_assignment -name SOURCE_FILE lpm_counter0.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_ff0.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_ff1.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg0.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_ff1.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_ff2.cmp
-set_global_assignment -name SOURCE_FILE Video/lpm_ff3.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_ff3.vhd
-set_global_assignment -name AHDL_FILE Video/VIDEO_MOD_MUX_CLUTCTR.tdf
-set_global_assignment -name VHDL_FILE Video/lpm_ff2.vhd
-set_global_assignment -name SOURCE_FILE Video/lpm_fifo_dc0.cmp
-set_global_assignment -name VHDL_FILE Video/lpm_fifo_dc0.vhd
-set_global_assignment -name BDF_FILE Video/Video.bdf
-set_global_assignment -name VHDL_FILE altpll1.vhd
-set_global_assignment -name SOURCE_FILE altpll1.cmp
-set_global_assignment -name BDF_FILE firebee1.bdf
-set_global_assignment -name QIP_FILE altpll0.qip
-set_global_assignment -name QIP_FILE lpm_counter0.qip
-set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\FalconIO_SDCard_IDE_CF\\FalconIO_SDCard_IDE_CF.vhd"
-set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\DSP\\DSP.vhd"
-set_global_assignment -name QIP_FILE Video/lpm_shiftreg0.qip
-set_global_assignment -name QIP_FILE Video/altdpram0.qip
-set_global_assignment -name QIP_FILE Video/lpm_bustri1.qip
-set_global_assignment -name QIP_FILE Video/altdpram1.qip
-set_global_assignment -name QIP_FILE Video/lpm_bustri2.qip
-set_global_assignment -name QIP_FILE Video/lpm_bustri4.qip
-set_global_assignment -name QIP_FILE Video/lpm_constant0.qip
-set_global_assignment -name QIP_FILE Video/lpm_constant1.qip
-set_global_assignment -name QIP_FILE Video/lpm_mux0.qip
-set_global_assignment -name QIP_FILE Video/lpm_mux1.qip
-set_global_assignment -name QIP_FILE Video/lpm_mux2.qip
-set_global_assignment -name QIP_FILE Video/lpm_constant2.qip
-set_global_assignment -name QIP_FILE Video/altdpram2.qip
-set_global_assignment -name QIP_FILE Video/lpm_bustri6.qip
-set_global_assignment -name QIP_FILE Video/lpm_mux3.qip
-set_global_assignment -name QIP_FILE Video/lpm_mux4.qip
-set_global_assignment -name QIP_FILE Video/lpm_constant3.qip
-set_global_assignment -name QIP_FILE Video/lpm_shiftreg1.qip
-set_global_assignment -name QIP_FILE Video/lpm_latch1.qip
-set_global_assignment -name QIP_FILE Video/lpm_constant4.qip
-set_global_assignment -name QIP_FILE Video/lpm_shiftreg2.qip
-set_global_assignment -name QIP_FILE Video/lpm_compare1.qip
-set_global_assignment -name AHDL_FILE "C:\\firebee\\FPGA\\Interrupt_Handler\\interrupt_handler.tdf"
-set_global_assignment -name QIP_FILE lpm_bustri_LONG.qip
-set_global_assignment -name QIP_FILE lpm_bustri_BYT.qip
-set_global_assignment -name QIP_FILE lpm_bustri_WORD.qip
-set_global_assignment -name QIP_FILE Video/lpm_ff4.qip
-set_global_assignment -name QIP_FILE Video/lpm_ff5.qip
-set_global_assignment -name QIP_FILE Video/lpm_ff6.qip
-set_global_assignment -name VECTOR_WAVEFORM_FILE firebee1.vwf
-set_global_assignment -name QIP_FILE Video/lpm_shiftreg3.qip
-set_global_assignment -name QIP_FILE Video/altddio_bidir0.qip
-set_global_assignment -name QIP_FILE Video/altddio_out0.qip
-set_global_assignment -name QIP_FILE Video/lpm_mux5.qip
-set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\Video\\BLITTER\\BLITTER.vhd"
-set_global_assignment -name QIP_FILE Video/lpm_shiftreg5.qip
-set_global_assignment -name QIP_FILE Video/lpm_shiftreg6.qip
-set_global_assignment -name QIP_FILE Video/lpm_shiftreg4.qip
-set_global_assignment -name QIP_FILE Video/altddio_out1.qip
-set_global_assignment -name QIP_FILE Video/altddio_out2.qip
-set_global_assignment -name QIP_FILE altddio_out3.qip
-set_global_assignment -name QIP_FILE Video/lpm_mux6.qip
-set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF_pgk.vhd
-set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo0.qip
-set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo1.qip
-set_global_assignment -name QIP_FILE Video/lpm_muxDZ.qip
-set_global_assignment -name QIP_FILE Video/lpm_muxVDM.qip
-set_global_assignment -name SOURCE_FILE firebee1.fit.summary_alt
# Pin & Location Assignments
# ==========================
-set_location_assignment PIN_AB12 -to CLK33M
set_location_assignment PIN_G2 -to MAIN_CLK
set_location_assignment PIN_Y3 -to FB_AD[0]
set_location_assignment PIN_Y6 -to FB_AD[1]
@@ -485,7 +319,6 @@ set_location_assignment PIN_A20 -to nRD_DATA
set_location_assignment PIN_C17 -to nDCHG
set_location_assignment PIN_J4 -to nACSI_INT
set_location_assignment PIN_K7 -to nACSI_DRQ
-set_location_assignment PIN_E12 -to MIDI_IN
set_location_assignment PIN_G7 -to LP_BUSY
set_location_assignment PIN_Y1 -to IDE_RDY
set_location_assignment PIN_G22 -to IDE_INT
@@ -662,7 +495,7 @@ set_instance_assignment -name MAX_DELAY "5 ns" -from FB_AD -to BA
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to LED_FPGA_OK
set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to VCKE
set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to nVCS
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to FB_AD
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to FB_AD
set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to BA
set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to DDR_CLK
set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to VA
@@ -680,15 +513,14 @@ set_instance_assignment -name CURRENT_STRENGTH_NEW 16MA -to VG
set_instance_assignment -name CURRENT_STRENGTH_NEW 16MA -to VR
set_instance_assignment -name CURRENT_STRENGTH_NEW 16MA -to nBLANK_PAD
set_instance_assignment -name CURRENT_STRENGTH_NEW 16MA -to VSYNC_PAD
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to nPD_VGA
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nPD_VGA
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to nSYNC
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SRD
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to IO
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to nSRWE
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to nSROE
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to nSRCS
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to nSRBLE
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to nSRBHE
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to SRD
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to IO
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nSRWE
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nSRCS
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nSRBLE
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nSRBHE
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to CLK24M576
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to CLKUSB
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to CLK25M
@@ -733,8 +565,268 @@ set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
# end ENTITY(firebee1)
# --------------------
set_global_assignment -name MISC_FILE "C:/FireBee/FPGA/firebee1.dpf"
-set_global_assignment -name QIP_FILE altpll_reconfig1.qip
-set_global_assignment -name QIP_FILE altpll4.qip
set_location_assignment PIN_E5 -to LPDIR
set_location_assignment PIN_B11 -to nRSTO_MCF
+set_global_assignment -name SOURCE_FILE Video/BLITTER/lpm_clshift0.cmp
+set_global_assignment -name AHDL_FILE Video/BLITTER/lpm_clshift0.tdf
+set_global_assignment -name SOURCE_FILE Video/BLITTER/altsyncram0.cmp
+set_global_assignment -name AHDL_FILE Video/BLITTER/altsyncram0.tdf
+set_global_assignment -name SOURCE_FILE Video/altddio_bidir0.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_control.vhd
+set_global_assignment -name SOURCE_FILE Video/altddio_out0.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_pkg.vhd
+set_global_assignment -name SOURCE_FILE Video/altddio_out1.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_registers.vhd
+set_global_assignment -name SOURCE_FILE Video/altddio_out2.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_soc_top.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF5380/wf5380_top.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_am_detector.vhd
+set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo0.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/dcfifo0.vhd
+set_global_assignment -name SOURCE_FILE Video/altdpram2.cmp
+set_global_assignment -name SOURCE_FILE FalconIO_SDCard_IDE_CF/dcfifo1.cmp
+set_global_assignment -name AHDL_FILE Video/DDR_CTR.tdf
+set_global_assignment -name SOURCE_FILE Video/lpm_bustri0.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_bustri0.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_control.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_crc_logic.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_digital_pll.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_pkg.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_registers.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_top_soc.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_FDC1772_IP/wf1772ip_transceiver.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_bustri5.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_bustri5.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_bustri6.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_ctrl_status.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_bustri7.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_bustri7.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_compare1.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_receive.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_top_soc.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_UART6850_IP/wf6850ip_transmit.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_gpio.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_constant2.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_interrupts.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_constant3.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_pkg.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_constant4.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_timers.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_top_soc.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_ctrl.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_rx.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_top.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_MFP68901_IP/wf68901ip_usart_tx.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_pkg.vhd
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_ff4.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_top_soc.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_ff5.cmp
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/WF_SND2149_IP/wf2149ip_wave.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_ff6.cmp
+set_global_assignment -name VHDL_FILE lpm_latch0.vhd
+set_global_assignment -name SOURCE_FILE lpm_latch0.cmp
+set_global_assignment -name QIP_FILE altpll1.qip
+set_global_assignment -name SOURCE_FILE Video/lpm_fifoDZ.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_fifoDZ.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_latch1.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_mux0.cmp
+set_global_assignment -name QIP_FILE altpll2.qip
+set_global_assignment -name SOURCE_FILE Video/lpm_mux1.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_mux2.cmp
+set_global_assignment -name QIP_FILE altpll3.qip
+set_global_assignment -name SOURCE_FILE Video/lpm_mux3.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_mux4.cmp
+set_global_assignment -name SOURCE_FILE Video/altdpram0.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_mux5.cmp
+set_global_assignment -name VHDL_FILE Video/altdpram0.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_mux6.cmp
+set_global_assignment -name SOURCE_FILE Video/altdpram1.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ2.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_muxDZ2.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_muxDZ.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_muxDZ.vhd
+set_global_assignment -name SOURCE_FILE altpll0.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_bustri1.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg1.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_ff0.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg2.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_bustri2.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg3.cmp
+set_global_assignment -name SOURCE_FILE altpll2.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg4.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_bustri3.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg5.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_bustri3.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg6.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_bustri4.cmp
+set_global_assignment -name VHDL_FILE altpll2.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_constant0.cmp
+set_global_assignment -name SOURCE_FILE altpll3.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_constant1.cmp
+set_global_assignment -name VHDL_FILE altpll3.vhd
+set_global_assignment -name SOURCE_FILE lpm_counter0.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_ff0.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_ff1.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_shiftreg0.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_ff1.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_ff2.cmp
+set_global_assignment -name SOURCE_FILE Video/lpm_ff3.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_ff3.vhd
+set_global_assignment -name AHDL_FILE Video/VIDEO_MOD_MUX_CLUTCTR.tdf
+set_global_assignment -name VHDL_FILE Video/lpm_ff2.vhd
+set_global_assignment -name SOURCE_FILE Video/lpm_fifo_dc0.cmp
+set_global_assignment -name VHDL_FILE Video/lpm_fifo_dc0.vhd
+set_global_assignment -name BDF_FILE Video/Video.bdf
+set_global_assignment -name VHDL_FILE altpll1.vhd
+set_global_assignment -name SOURCE_FILE altpll1.cmp
+set_global_assignment -name BDF_FILE firebee1.bdf
+set_global_assignment -name QIP_FILE altpll0.qip
+set_global_assignment -name QIP_FILE lpm_counter0.qip
+set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\FalconIO_SDCard_IDE_CF\\FalconIO_SDCard_IDE_CF.vhd"
+set_global_assignment -name VHDL_FILE "C:\\firebee\\FPGA\\DSP\\DSP.vhd"
+set_global_assignment -name QIP_FILE Video/lpm_shiftreg0.qip
+set_global_assignment -name QIP_FILE Video/altdpram0.qip
+set_global_assignment -name QIP_FILE Video/lpm_bustri1.qip
+set_global_assignment -name QIP_FILE Video/altdpram1.qip
+set_global_assignment -name QIP_FILE Video/lpm_bustri2.qip
+set_global_assignment -name QIP_FILE Video/lpm_bustri4.qip
+set_global_assignment -name QIP_FILE Video/lpm_constant0.qip
+set_global_assignment -name QIP_FILE Video/lpm_constant1.qip
+set_global_assignment -name QIP_FILE Video/lpm_mux0.qip
+set_global_assignment -name QIP_FILE Video/lpm_mux1.qip
+set_global_assignment -name QIP_FILE Video/lpm_mux2.qip
+set_global_assignment -name QIP_FILE Video/lpm_constant2.qip
+set_global_assignment -name QIP_FILE Video/altdpram2.qip
+set_global_assignment -name QIP_FILE Video/lpm_bustri6.qip
+set_global_assignment -name QIP_FILE Video/lpm_mux3.qip
+set_global_assignment -name QIP_FILE Video/lpm_mux4.qip
+set_global_assignment -name QIP_FILE Video/lpm_constant3.qip
+set_global_assignment -name QIP_FILE Video/lpm_shiftreg1.qip
+set_global_assignment -name QIP_FILE Video/lpm_latch1.qip
+set_global_assignment -name QIP_FILE Video/lpm_constant4.qip
+set_global_assignment -name QIP_FILE Video/lpm_shiftreg2.qip
+set_global_assignment -name QIP_FILE Video/lpm_compare1.qip
+set_global_assignment -name AHDL_FILE "C:\\firebee\\FPGA\\Interrupt_Handler\\interrupt_handler.tdf"
+set_global_assignment -name QIP_FILE lpm_bustri_LONG.qip
+set_global_assignment -name QIP_FILE lpm_bustri_BYT.qip
+set_global_assignment -name QIP_FILE lpm_bustri_WORD.qip
+set_global_assignment -name QIP_FILE Video/lpm_ff4.qip
+set_global_assignment -name QIP_FILE Video/lpm_ff5.qip
+set_global_assignment -name QIP_FILE Video/lpm_ff6.qip
+set_global_assignment -name VECTOR_WAVEFORM_FILE firebee1.vwf
+set_global_assignment -name QIP_FILE Video/lpm_shiftreg3.qip
+set_global_assignment -name QIP_FILE Video/altddio_bidir0.qip
+set_global_assignment -name QIP_FILE Video/altddio_out0.qip
+set_global_assignment -name QIP_FILE Video/lpm_mux5.qip
+set_global_assignment -name QIP_FILE Video/lpm_shiftreg5.qip
+set_global_assignment -name QIP_FILE Video/lpm_shiftreg6.qip
+set_global_assignment -name QIP_FILE Video/lpm_shiftreg4.qip
+set_global_assignment -name QIP_FILE Video/altddio_out1.qip
+set_global_assignment -name QIP_FILE Video/altddio_out2.qip
+set_global_assignment -name QIP_FILE altddio_out3.qip
+set_global_assignment -name QIP_FILE Video/lpm_mux6.qip
+set_global_assignment -name VHDL_FILE FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF_pgk.vhd
+set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo0.qip
+set_global_assignment -name QIP_FILE FalconIO_SDCard_IDE_CF/dcfifo1.qip
+set_global_assignment -name QIP_FILE Video/lpm_muxDZ.qip
+set_global_assignment -name QIP_FILE Video/lpm_muxVDM.qip
+set_global_assignment -name SOURCE_FILE firebee1.fit.summary_alt
+set_global_assignment -name QIP_FILE altpll_reconfig1.qip
+set_global_assignment -name QIP_FILE altpll4.qip
+set_global_assignment -name QIP_FILE lpm_mux0.qip
+set_global_assignment -name QIP_FILE Video/BLITTER/lpm_clshift0.qip
+set_global_assignment -name SOURCE_FILE Video/BLITTER/blitter.tdf.ALT
+set_global_assignment -name QIP_FILE Video/BLITTER/altsyncram0.qip
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to E0_INT
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to DVI_INT
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nPCI_INTA
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nPCI_INTB
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nPCI_INTC
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nPCI_INTD
+set_location_assignment PIN_AB12 -to CLK33MDIR
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name QIP_FILE lpm_shiftreg0.qip
+set_global_assignment -name QIP_FILE lpm_counter1.qip
+set_global_assignment -name QIP_FILE altiobuf_bidir0.qip
+set_location_assignment PIN_E12 -to MIDI_IN_PIN
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MIDI_IN_PIN
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to MIDI_IN_PIN
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to MIDI_IN_PIN
+set_instance_assignment -name PCI_IO ON -to nPCI_INTA
+set_instance_assignment -name PCI_IO ON -to nPCI_INTB
+set_instance_assignment -name PCI_IO ON -to nPCI_INTC
+set_instance_assignment -name PCI_IO ON -to nPCI_INTD
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nACSI_DRQ
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nACSI_INT
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nPCI_INTA
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nPCI_INTB
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nPCI_INTC
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nPCI_INTD
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SD_WP
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SD_CARD_DEDECT
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nDACK1
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to TOUT0
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to MAIN_CLK
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to CLK33MDIR
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nRSTO_MCF
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nDACK0
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nIRQ[2]
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nIRQ[3]
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to TIN0
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to TIN0
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nIRQ[6]
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nIRQ[5]
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nIRQ[4]
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nIRQ[4]
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nIRQ[5]
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nIRQ[6]
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to nIRQ[3]
+set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to nIRQ[2]
+set_global_assignment -name POWER_USE_TA_VALUE 35
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
+set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to DSA_D
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nMOT_ON
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nSTEP_DIR
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nSTEP
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nWR
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nWR_GATE
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nSDSEL
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SCSI_PAR
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SCSI_DIR
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nSCSI_SEL
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nSCSI_RST
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nSCSI_BUSY
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nSCSI_ATN
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nSCSI_ACK
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ACSI_A1
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nACSI_CS
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ACSI_DIR
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nACSI_ACK
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to nACSI_RESET
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to LPDIR
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to LP_STR
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to LP_D
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to LP_D
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to LPDIR
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to LP_STR
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to SRD
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to IO[0]
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to IO[8]
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to IO[7]
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to IO[6]
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to IO[5]
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to IO[4]
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to IO[3]
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to IO[2]
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to IO[1]
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to nSRBHE
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to nSRWE
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to nSRCS
+set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to nSRBLE
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to AMKB_RX
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/FPGA_by_Fredi/firebee1.rbf b/FPGA_by_Fredi/firebee1.rbf
deleted file mode 100644
index 63c16f1..0000000
Binary files a/FPGA_by_Fredi/firebee1.rbf and /dev/null differ
diff --git a/FPGA_by_Fredi/firebee1.sof b/FPGA_by_Fredi/firebee1.sof
deleted file mode 100644
index 7b75b23..0000000
Binary files a/FPGA_by_Fredi/firebee1.sof and /dev/null differ
diff --git a/FPGA_by_Fredi/firebee1.sta.summary b/FPGA_by_Fredi/firebee1.sta.summary
new file mode 100644
index 0000000..08274d1
--- /dev/null
+++ b/FPGA_by_Fredi/firebee1.sta.summary
@@ -0,0 +1,857 @@
+------------------------------------------------------------
+TimeQuest Timing Analyzer Summary
+------------------------------------------------------------
+
+Type : Slow 1200mV 85C Model Setup 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -17.450
+TNS : -16147.437
+
+Type : Slow 1200mV 85C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -7.331
+TNS : -4287.365
+
+Type : Slow 1200mV 85C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -4.994
+TNS : -47.649
+
+Type : Slow 1200mV 85C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : -4.588
+TNS : -478.150
+
+Type : Slow 1200mV 85C Model Setup 'MAIN_CLK'
+Slack : -4.230
+TNS : -5479.268
+
+Type : Slow 1200mV 85C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 2.377
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 2.892
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[4]'
+Slack : 3.750
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 5.312
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 497.531
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 1997.881
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -11.047
+TNS : -9871.573
+
+Type : Slow 1200mV 85C Model Hold 'MAIN_CLK'
+Slack : -10.882
+TNS : -9731.628
+
+Type : Slow 1200mV 85C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -5.940
+TNS : -5.940
+
+Type : Slow 1200mV 85C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 0.283
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Hold 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 0.342
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 0.376
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 0.389
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 1.541
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 2.366
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[4]'
+Slack : 3.005
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 4.128
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Recovery 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -15.674
+TNS : -2798.000
+
+Type : Slow 1200mV 85C Model Recovery 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -8.406
+TNS : -16.812
+
+Type : Slow 1200mV 85C Model Recovery 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -4.536
+TNS : -782.022
+
+Type : Slow 1200mV 85C Model Recovery 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : -4.460
+TNS : -652.825
+
+Type : Slow 1200mV 85C Model Recovery 'MAIN_CLK'
+Slack : -3.788
+TNS : -646.634
+
+Type : Slow 1200mV 85C Model Recovery 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC'
+Slack : -2.802
+TNS : -2.802
+
+Type : Slow 1200mV 85C Model Recovery 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC'
+Slack : -1.533
+TNS : -1.533
+
+Type : Slow 1200mV 85C Model Recovery 'DVI_INT'
+Slack : -0.826
+TNS : -0.826
+
+Type : Slow 1200mV 85C Model Recovery 'E0_INT'
+Slack : -0.766
+TNS : -0.766
+
+Type : Slow 1200mV 85C Model Recovery 'nPCI_INTA'
+Slack : -0.281
+TNS : -0.281
+
+Type : Slow 1200mV 85C Model Recovery 'nPCI_INTD'
+Slack : -0.267
+TNS : -0.267
+
+Type : Slow 1200mV 85C Model Recovery 'nPCI_INTC'
+Slack : -0.249
+TNS : -0.249
+
+Type : Slow 1200mV 85C Model Recovery 'nPCI_INTB'
+Slack : -0.188
+TNS : -0.188
+
+Type : Slow 1200mV 85C Model Recovery 'PIC_INT'
+Slack : -0.038
+TNS : -0.038
+
+Type : Slow 1200mV 85C Model Removal 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -10.353
+TNS : -1430.734
+
+Type : Slow 1200mV 85C Model Removal 'MAIN_CLK'
+Slack : -10.188
+TNS : -1400.869
+
+Type : Slow 1200mV 85C Model Removal 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -2.755
+TNS : -5.510
+
+Type : Slow 1200mV 85C Model Removal 'PIC_INT'
+Slack : -0.526
+TNS : -0.526
+
+Type : Slow 1200mV 85C Model Removal 'nPCI_INTB'
+Slack : -0.361
+TNS : -0.361
+
+Type : Slow 1200mV 85C Model Removal 'nPCI_INTC'
+Slack : -0.295
+TNS : -0.295
+
+Type : Slow 1200mV 85C Model Removal 'nPCI_INTD'
+Slack : -0.274
+TNS : -0.274
+
+Type : Slow 1200mV 85C Model Removal 'nPCI_INTA'
+Slack : -0.256
+TNS : -0.256
+
+Type : Slow 1200mV 85C Model Removal 'E0_INT'
+Slack : 0.237
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Removal 'DVI_INT'
+Slack : 0.299
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Removal 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC'
+Slack : 1.026
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Removal 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 1.036
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Removal 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC'
+Slack : 2.350
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Removal 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 3.015
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'PIC_INT'
+Slack : -3.000
+TNS : -4.134
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'nPCI_INTB'
+Slack : -3.000
+TNS : -4.079
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'nPCI_INTD'
+Slack : -3.000
+TNS : -4.070
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'nPCI_INTC'
+Slack : -3.000
+TNS : -4.050
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'nPCI_INTA'
+Slack : -3.000
+TNS : -4.038
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'DVI_INT'
+Slack : -3.000
+TNS : -4.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'E0_INT'
+Slack : -3.000
+TNS : -4.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC'
+Slack : -1.000
+TNS : -1.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC'
+Slack : -1.000
+TNS : -1.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 3.527
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 3.533
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 3.533
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 3.533
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 4.811
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[4]'
+Slack : 7.320
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 10.398
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'MAIN_CLK'
+Slack : 13.528
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 18.585
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 30.973
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 249.617
+TNS : 0.000
+
+Type : Slow 1200mV 85C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 999.882
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Setup 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -15.403
+TNS : -14377.209
+
+Type : Slow 1200mV 0C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -6.421
+TNS : -3676.693
+
+Type : Slow 1200mV 0C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -4.520
+TNS : -37.132
+
+Type : Slow 1200mV 0C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : -4.094
+TNS : -426.105
+
+Type : Slow 1200mV 0C Model Setup 'MAIN_CLK'
+Slack : -3.696
+TNS : -4132.088
+
+Type : Slow 1200mV 0C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 2.718
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 2.995
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[4]'
+Slack : 3.994
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 5.426
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 497.772
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 1998.168
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -9.832
+TNS : -8727.393
+
+Type : Slow 1200mV 0C Model Hold 'MAIN_CLK'
+Slack : -9.617
+TNS : -8529.400
+
+Type : Slow 1200mV 0C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -5.065
+TNS : -5.065
+
+Type : Slow 1200mV 0C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 0.254
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Hold 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 0.297
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 0.335
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 0.346
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 1.517
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 2.163
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[4]'
+Slack : 2.766
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 4.082
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Recovery 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -13.902
+TNS : -2482.848
+
+Type : Slow 1200mV 0C Model Recovery 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -7.532
+TNS : -15.064
+
+Type : Slow 1200mV 0C Model Recovery 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : -3.927
+TNS : -573.408
+
+Type : Slow 1200mV 0C Model Recovery 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -3.851
+TNS : -663.617
+
+Type : Slow 1200mV 0C Model Recovery 'MAIN_CLK'
+Slack : -3.223
+TNS : -549.949
+
+Type : Slow 1200mV 0C Model Recovery 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC'
+Slack : -2.555
+TNS : -2.555
+
+Type : Slow 1200mV 0C Model Recovery 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC'
+Slack : -1.377
+TNS : -1.377
+
+Type : Slow 1200mV 0C Model Recovery 'DVI_INT'
+Slack : -0.706
+TNS : -0.706
+
+Type : Slow 1200mV 0C Model Recovery 'E0_INT'
+Slack : -0.653
+TNS : -0.653
+
+Type : Slow 1200mV 0C Model Recovery 'nPCI_INTA'
+Slack : -0.192
+TNS : -0.192
+
+Type : Slow 1200mV 0C Model Recovery 'nPCI_INTD'
+Slack : -0.190
+TNS : -0.190
+
+Type : Slow 1200mV 0C Model Recovery 'nPCI_INTC'
+Slack : -0.180
+TNS : -0.180
+
+Type : Slow 1200mV 0C Model Recovery 'nPCI_INTB'
+Slack : -0.104
+TNS : -0.104
+
+Type : Slow 1200mV 0C Model Recovery 'PIC_INT'
+Slack : 0.013
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Removal 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -9.193
+TNS : -1262.369
+
+Type : Slow 1200mV 0C Model Removal 'MAIN_CLK'
+Slack : -8.978
+TNS : -1223.454
+
+Type : Slow 1200mV 0C Model Removal 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -2.195
+TNS : -4.390
+
+Type : Slow 1200mV 0C Model Removal 'PIC_INT'
+Slack : -0.527
+TNS : -0.527
+
+Type : Slow 1200mV 0C Model Removal 'nPCI_INTB'
+Slack : -0.384
+TNS : -0.384
+
+Type : Slow 1200mV 0C Model Removal 'nPCI_INTC'
+Slack : -0.316
+TNS : -0.316
+
+Type : Slow 1200mV 0C Model Removal 'nPCI_INTD'
+Slack : -0.288
+TNS : -0.288
+
+Type : Slow 1200mV 0C Model Removal 'nPCI_INTA'
+Slack : -0.283
+TNS : -0.283
+
+Type : Slow 1200mV 0C Model Removal 'E0_INT'
+Slack : 0.170
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Removal 'DVI_INT'
+Slack : 0.223
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Removal 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC'
+Slack : 0.914
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Removal 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 0.936
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Removal 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC'
+Slack : 2.150
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Removal 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 2.663
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'PIC_INT'
+Slack : -3.000
+TNS : -4.036
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'nPCI_INTB'
+Slack : -3.000
+TNS : -4.036
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'nPCI_INTD'
+Slack : -3.000
+TNS : -4.012
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'nPCI_INTA'
+Slack : -3.000
+TNS : -4.002
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'DVI_INT'
+Slack : -3.000
+TNS : -4.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'E0_INT'
+Slack : -3.000
+TNS : -4.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'nPCI_INTC'
+Slack : -3.000
+TNS : -4.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC'
+Slack : -1.000
+TNS : -1.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC'
+Slack : -1.000
+TNS : -1.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 3.517
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 3.528
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 3.529
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 3.529
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 4.909
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[4]'
+Slack : 7.316
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 10.392
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'MAIN_CLK'
+Slack : 13.634
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 18.774
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 30.967
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 249.612
+TNS : 0.000
+
+Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 999.877
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Setup 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -9.748
+TNS : -9757.013
+
+Type : Fast 1200mV 0C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -3.484
+TNS : -1911.267
+
+Type : Fast 1200mV 0C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -2.773
+TNS : -9.357
+
+Type : Fast 1200mV 0C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : -2.483
+TNS : -260.497
+
+Type : Fast 1200mV 0C Model Setup 'MAIN_CLK'
+Slack : -1.767
+TNS : -1399.694
+
+Type : Fast 1200mV 0C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 3.283
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 3.689
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[4]'
+Slack : 4.868
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Setup 'inst12|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 5.744
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 498.517
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Setup 'inst13|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 1998.908
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -6.775
+TNS : -6188.069
+
+Type : Fast 1200mV 0C Model Hold 'MAIN_CLK'
+Slack : -6.521
+TNS : -5940.597
+
+Type : Fast 1200mV 0C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -3.440
+TNS : -3.440
+
+Type : Fast 1200mV 0C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 0.136
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Hold 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 0.178
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 0.197
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Hold 'inst13|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 0.204
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 1.296
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 1.392
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[4]'
+Slack : 1.655
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Hold 'inst12|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 3.971
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Recovery 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -9.449
+TNS : -1688.035
+
+Type : Fast 1200mV 0C Model Recovery 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -4.842
+TNS : -9.684
+
+Type : Fast 1200mV 0C Model Recovery 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : -2.521
+TNS : -370.829
+
+Type : Fast 1200mV 0C Model Recovery 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -2.077
+TNS : -353.703
+
+Type : Fast 1200mV 0C Model Recovery 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC'
+Slack : -1.593
+TNS : -1.593
+
+Type : Fast 1200mV 0C Model Recovery 'MAIN_CLK'
+Slack : -1.560
+TNS : -261.778
+
+Type : Fast 1200mV 0C Model Recovery 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC'
+Slack : -0.866
+TNS : -0.866
+
+Type : Fast 1200mV 0C Model Recovery 'DVI_INT'
+Slack : -0.475
+TNS : -0.475
+
+Type : Fast 1200mV 0C Model Recovery 'E0_INT'
+Slack : -0.438
+TNS : -0.438
+
+Type : Fast 1200mV 0C Model Recovery 'PIC_INT'
+Slack : -0.086
+TNS : -0.086
+
+Type : Fast 1200mV 0C Model Recovery 'nPCI_INTA'
+Slack : 0.253
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Recovery 'nPCI_INTC'
+Slack : 0.262
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Recovery 'nPCI_INTD'
+Slack : 0.263
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Recovery 'nPCI_INTB'
+Slack : 0.294
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Removal 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : -6.385
+TNS : -890.317
+
+Type : Fast 1200mV 0C Model Removal 'MAIN_CLK'
+Slack : -6.131
+TNS : -844.343
+
+Type : Fast 1200mV 0C Model Removal 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : -1.544
+TNS : -3.088
+
+Type : Fast 1200mV 0C Model Removal 'nPCI_INTB'
+Slack : -0.648
+TNS : -0.648
+
+Type : Fast 1200mV 0C Model Removal 'nPCI_INTD'
+Slack : -0.607
+TNS : -0.607
+
+Type : Fast 1200mV 0C Model Removal 'nPCI_INTA'
+Slack : -0.603
+TNS : -0.603
+
+Type : Fast 1200mV 0C Model Removal 'nPCI_INTC'
+Slack : -0.601
+TNS : -0.601
+
+Type : Fast 1200mV 0C Model Removal 'PIC_INT'
+Slack : -0.261
+TNS : -0.261
+
+Type : Fast 1200mV 0C Model Removal 'E0_INT'
+Slack : 0.109
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Removal 'DVI_INT'
+Slack : 0.148
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Removal 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC'
+Slack : 0.560
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Removal 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 0.568
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Removal 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC'
+Slack : 1.306
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Removal 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 1.739
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'PIC_INT'
+Slack : -3.000
+TNS : -5.254
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'nPCI_INTD'
+Slack : -3.000
+TNS : -5.059
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'nPCI_INTB'
+Slack : -3.000
+TNS : -5.025
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'nPCI_INTC'
+Slack : -3.000
+TNS : -5.003
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'nPCI_INTA'
+Slack : -3.000
+TNS : -4.993
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'E0_INT'
+Slack : -3.000
+TNS : -4.216
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'DVI_INT'
+Slack : -3.000
+TNS : -4.207
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC'
+Slack : -1.000
+TNS : -1.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC'
+Slack : -1.000
+TNS : -1.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 3.538
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 3.563
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 3.567
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 3.568
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst22|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 4.773
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst12|altpll_component|auto_generated|pll1|clk[4]'
+Slack : 7.355
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 10.398
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'MAIN_CLK'
+Slack : 13.572
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[2]'
+Slack : 18.964
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[1]'
+Slack : 30.983
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[0]'
+Slack : 249.649
+TNS : 0.000
+
+Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst13|altpll_component|auto_generated|pll1|clk[3]'
+Slack : 999.914
+TNS : 0.000
+
+------------------------------------------------------------
diff --git a/FPGA_by_Fredi/firebee1.tan.rpt b/FPGA_by_Fredi/firebee1.tan.rpt
deleted file mode 100644
index b84e104..0000000
--- a/FPGA_by_Fredi/firebee1.tan.rpt
+++ /dev/null
@@ -1,6936 +0,0 @@
-Classic Timing Analyzer report for firebee1
-Wed Dec 15 02:25:22 2010
-Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
-
-
----------------------
-; Table of Contents ;
----------------------
- 1. Legal Notice
- 2. Timing Analyzer Summary
- 3. Timing Analyzer Settings
- 4. Clock Settings Summary
- 5. Parallel Compilation
- 6. Clock Setup: 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]'
- 7. Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]'
- 8. Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]'
- 9. Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]'
- 10. Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]'
- 11. Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]'
- 12. Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]'
- 13. Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]'
- 14. Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]'
- 15. Clock Setup: 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]'
- 16. Clock Setup: 'CLK33M'
- 17. Clock Setup: 'MAIN_CLK'
- 18. Clock Hold: 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]'
- 19. Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]'
- 20. Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]'
- 21. Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]'
- 22. Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]'
- 23. Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]'
- 24. Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]'
- 25. Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]'
- 26. Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]'
- 27. Clock Hold: 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]'
- 28. Clock Hold: 'CLK33M'
- 29. Clock Hold: 'MAIN_CLK'
- 30. tsu
- 31. tco
- 32. tpd
- 33. th
- 34. Board Trace Model Assignments
- 35. Input Transition Times
- 36. Slow Corner Signal Integrity Metrics
- 37. Fast Corner Signal Integrity Metrics
- 38. Ignored Timing Assignments
- 39. Timing Analyzer Messages
-
-
-
-----------------
-; Legal Notice ;
-----------------
-Copyright (C) 1991-2010 Altera Corporation
-Your use of Altera Corporation's design tools, logic functions
-and other software and tools, and its AMPP partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Altera Program License
-Subscription Agreement, Altera MegaCore Function License
-Agreement, or other applicable license agreement, including,
-without limitation, that your use is for the sole purpose of
-programming logic devices manufactured by Altera and sold by
-Altera or its authorized distributors. Please refer to the
-applicable agreement for further details.
-
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Timing Analyzer Summary ;
-+-----------------------------------------------------------------------------------------+-------------+-----------------------------------+------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------+
-; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
-+-----------------------------------------------------------------------------------------+-------------+-----------------------------------+------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------+
-; Worst-case tsu ; -4.528 ns ; 1.000 ns ; 5.528 ns ; MAIN_CLK ; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|idle_state ; -- ; MAIN_CLK ; 6867 ;
-; Worst-case tco ; -14.840 ns ; 1.000 ns ; 15.840 ns ; interrupt_handler:nobody|INT_LATCH[8] ; nIRQ[5] ; MAIN_CLK ; -- ; 4976 ;
-; Worst-case tpd ; -11.944 ns ; 1.000 ns ; 12.944 ns ; nFB_CS1 ; FB_AD[18] ; -- ; -- ; 514 ;
-; Worst-case th ; -0.401 ns ; 1.000 ns ; 1.401 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[9] ; -- ; MAIN_CLK ; 117 ;
-; Clock Setup: 'CLK33M' ; -5.966 ns ; 33.00 MHz ( period = 30.303 ns ) ; N/A ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 3741 ;
-; Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]' ; -4.615 ns ; 24.98 MHz ( period = 40.033 ns ) ; N/A ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 3741 ;
-; Clock Setup: 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]' ; -4.294 ns ; 95.92 MHz ( period = 10.425 ns ) ; N/A ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 3741 ;
-; Clock Setup: 'MAIN_CLK' ; -4.261 ns ; 33.00 MHz ( period = 30.303 ns ) ; N/A ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a7 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 27347 ;
-; Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]' ; -2.673 ns ; 132.01 MHz ( period = 7.575 ns ) ; N/A ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 86 ;
-; Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]' ; -1.712 ns ; 66.00 MHz ( period = 15.151 ns ) ; N/A ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 29 ;
-; Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]' ; 1.672 ns ; 132.01 MHz ( period = 7.575 ns ) ; N/A ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0 ;
-; Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]' ; 2.965 ns ; 132.01 MHz ( period = 7.575 ns ) ; Restricted to 500.00 MHz ( period = 2.000 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 0 ;
-; Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]' ; 5.299 ns ; 132.01 MHz ( period = 7.575 ns ) ; N/A ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[3] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; 0 ;
-; Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]' ; 28.590 ns ; 15.99 MHz ( period = 62.552 ns ) ; 186.15 MHz ( period = 5.372 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|RD_In ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\EDGEDETECT:LOCK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0 ;
-; Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]' ; 498.663 ns ; 2.00 MHz ( period = 500.416 ns ) ; Restricted to 500.00 MHz ( period = 2.000 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0 ;
-; Clock Setup: 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]' ; 1997.239 ns ; 0.50 MHz ( period = 1999.998 ns ) ; 362.45 MHz ( period = 2.759 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0 ;
-; Clock Hold: 'MAIN_CLK' ; -3.786 ns ; 33.00 MHz ( period = 30.303 ns ) ; N/A ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[1][0] ; MAIN_CLK ; MAIN_CLK ; 108 ;
-; Clock Hold: 'CLK33M' ; -0.687 ns ; 33.00 MHz ( period = 30.303 ns ) ; N/A ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; CLK33M ; CLK33M ; 26 ;
-; Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]' ; -0.454 ns ; 24.98 MHz ( period = 40.033 ns ) ; N/A ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 26 ;
-; Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]' ; 0.502 ns ; 15.99 MHz ( period = 62.552 ns ) ; N/A ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0 ;
-; Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]' ; 0.502 ns ; 132.01 MHz ( period = 7.575 ns ) ; N/A ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0 ;
-; Clock Hold: 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]' ; 0.502 ns ; 95.92 MHz ( period = 10.425 ns ) ; N/A ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0 ;
-; Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]' ; 0.564 ns ; 2.00 MHz ( period = 500.416 ns ) ; N/A ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0 ;
-; Clock Hold: 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]' ; 0.825 ns ; 0.50 MHz ( period = 1999.998 ns ) ; N/A ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0 ;
-; Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]' ; 1.825 ns ; 132.01 MHz ( period = 7.575 ns ) ; N/A ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[6] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; 0 ;
-; Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]' ; 2.664 ns ; 66.00 MHz ( period = 15.151 ns ) ; N/A ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0 ;
-; Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]' ; 3.263 ns ; 132.01 MHz ( period = 7.575 ns ) ; N/A ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0 ;
-; Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]' ; 4.336 ns ; 132.01 MHz ( period = 7.575 ns ) ; N/A ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 0 ;
-; Total number of failed paths ; ; ; ; ; ; ; ; 51319 ;
-+-----------------------------------------------------------------------------------------+-------------+-----------------------------------+------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Timing Analyzer Settings ;
-+------------------------------------------------------------------------------------------------------+--------------------+-----------------+---------------------------+-------------+
-; Option ; Setting ; From ; To ; Entity Name ;
-+------------------------------------------------------------------------------------------------------+--------------------+-----------------+---------------------------+-------------+
-; Device Name ; EP3C40F484C6 ; ; ; ;
-; Timing Models ; Final ; ; ; ;
-; Default hold multicycle ; Same as Multicycle ; ; ; ;
-; Cut paths between unrelated clock domains ; On ; ; ; ;
-; Cut off read during write signal paths ; On ; ; ; ;
-; Cut off feedback from I/O pins ; On ; ; ; ;
-; Report Combined Fast/Slow Timing ; Off ; ; ; ;
-; tpd Requirement ; 1 ns ; ; ; ;
-; th Requirement ; 1 ns ; ; ; ;
-; tsu Requirement ; 1 ns ; ; ; ;
-; tco Requirement ; 1 ns ; ; ; ;
-; fmax Requirement ; 30 ns ; ; ; ;
-; Ignore Clock Settings ; Off ; ; ; ;
-; Analyze latches as synchronous elements ; On ; ; ; ;
-; Enable Recovery/Removal analysis ; Off ; ; ; ;
-; Enable Clock Latency ; Off ; ; ; ;
-; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
-; Nominal Core Supply Voltage ; 1.2V ; ; ; ;
-; Minimum Core Junction Temperature ; 0 ; ; ; ;
-; Maximum Core Junction Temperature ; 85 ; ; ; ;
-; Number of source nodes to report per destination node ; 10 ; ; ; ;
-; Number of destination nodes to report ; 10 ; ; ; ;
-; Number of paths to report ; 200 ; ; ; ;
-; Report Minimum Timing Checks ; Off ; ; ; ;
-; Use Fast Timing Models ; Off ; ; ; ;
-; Report IO Paths Separately ; Off ; ; ; ;
-; Perform Multicorner Analysis ; On ; ; ; ;
-; Reports the worst-case path for each clock domain and analysis ; Off ; ; ; ;
-; Reports worst-case timing paths for each clock domain and analysis ; On ; ; ; ;
-; Specifies the maximum number of worst-case timing paths to report for each clock domain and analysis ; 100 ; ; ; ;
-; Removes common clock path pessimism (CCPP) during slack computation ; On ; ; ; ;
-; Output I/O Timing Endpoint ; Near End ; ; ; ;
-; Cut Timing Path ; On ; delayed_wrptr_g ; rs_dgwp|dffpipe12|dffe13a ; dcfifo_0hh1 ;
-; Cut Timing Path ; On ; rdptr_g ; ws_dgrp|dffpipe17|dffe18a ; dcfifo_0hh1 ;
-; Cut Timing Path ; On ; delayed_wrptr_g ; rs_dgwp|dffpipe12|dffe13a ; dcfifo_3fh1 ;
-; Cut Timing Path ; On ; rdptr_g ; ws_dgrp|dffpipe15|dffe16a ; dcfifo_3fh1 ;
-; Cut Timing Path ; On ; rdptr_g ; ws_dgrp|dffpipe22|dffe23a ; dcfifo_8fi1 ;
-; Input Maximum Delay ; 4 ns ; * ; FB_ALE ; ;
-; Maximum Delay ; 5 ns ; FB_AD ; BA ; ;
-; Maximum Delay ; 5 ns ; FB_AD ; VA ; ;
-; Maximum Delay ; 5 ns ; FB_AD ; nVRAS ; ;
-+------------------------------------------------------------------------------------------------------+--------------------+-----------------+---------------------------+-------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Settings Summary ;
-+--------------------------------------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
-; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
-+--------------------------------------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; ; PLL output ; 0.5 MHz ; 0.000 ns ; 0.000 ns ; CLK33M ; 1 ; 66 ; -9.578 ns ; ;
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[1] ; ; PLL output ; 2.46 MHz ; 0.000 ns ; 0.000 ns ; CLK33M ; 67 ; 900 ; -9.578 ns ; ;
-; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[2] ; ; PLL output ; 24.57 MHz ; 0.000 ns ; 0.000 ns ; CLK33M ; 67 ; 90 ; -9.578 ns ; ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; ; PLL output ; 2.0 MHz ; 0.000 ns ; 0.000 ns ; CLK33M ; 109 ; 1800 ; -1.864 ns ; ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; ; PLL output ; 15.99 MHz ; 0.000 ns ; 0.000 ns ; CLK33M ; 109 ; 225 ; -1.864 ns ; ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; ; PLL output ; 24.98 MHz ; 0.000 ns ; 0.000 ns ; CLK33M ; 109 ; 144 ; -1.864 ns ; ;
-; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3] ; ; PLL output ; 47.96 MHz ; 0.000 ns ; 0.000 ns ; CLK33M ; 109 ; 75 ; -1.864 ns ; ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; ; PLL output ; 132.01 MHz ; 0.000 ns ; 0.000 ns ; MAIN_CLK ; 4 ; 1 ; -3.620 ns ; ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; ; PLL output ; 132.01 MHz ; 0.000 ns ; 0.000 ns ; MAIN_CLK ; 4 ; 1 ; -1.094 ns ; ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; ; PLL output ; 132.01 MHz ; 0.000 ns ; 0.000 ns ; MAIN_CLK ; 4 ; 1 ; 2.693 ns ; ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; ; PLL output ; 132.01 MHz ; 0.000 ns ; 0.000 ns ; MAIN_CLK ; 4 ; 1 ; 1.115 ns ; ;
-; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; ; PLL output ; 66.0 MHz ; 0.000 ns ; 0.000 ns ; MAIN_CLK ; 2 ; 1 ; -4.884 ns ; ;
-; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; ; PLL output ; 95.92 MHz ; 0.000 ns ; 0.000 ns ; CLK33M ; 218 ; 75 ; -2.843 ns ; ;
-; CLK33M ; ; User Pin ; 33.0 MHz ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
-; MAIN_CLK ; ; User Pin ; 33.0 MHz ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
-+--------------------------------------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
-
-
-Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
-+-------------------------------------+
-; Parallel Compilation ;
-+----------------------------+--------+
-; Processors ; Number ;
-+----------------------------+--------+
-; Number detected on machine ; 4 ;
-; Maximum allowed ; 1 ;
-+----------------------------+--------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]' ;
-+-------------+---------------------------------------------+---------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------+------------------------------------------------------------------------+------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+-------------+---------------------------------------------+---------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------+------------------------------------------------------------------------+------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; 1997.239 ns ; 362.45 MHz ( period = 2.759 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.574 ns ;
-; 1997.297 ns ; 370.23 MHz ( period = 2.701 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.516 ns ;
-; 1997.355 ns ; 378.36 MHz ( period = 2.643 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.458 ns ;
-; 1997.413 ns ; 386.85 MHz ( period = 2.585 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.400 ns ;
-; 1997.476 ns ; 396.51 MHz ( period = 2.522 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.337 ns ;
-; 1997.531 ns ; 405.35 MHz ( period = 2.467 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.282 ns ;
-; 1997.593 ns ; 415.80 MHz ( period = 2.405 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.220 ns ;
-; 1997.626 ns ; 421.59 MHz ( period = 2.372 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.187 ns ;
-; 1997.647 ns ; 425.35 MHz ( period = 2.351 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.166 ns ;
-; 1997.684 ns ; 432.15 MHz ( period = 2.314 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.129 ns ;
-; 1997.684 ns ; 432.15 MHz ( period = 2.314 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.129 ns ;
-; 1997.709 ns ; 436.87 MHz ( period = 2.289 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.104 ns ;
-; 1997.742 ns ; 443.26 MHz ( period = 2.256 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.071 ns ;
-; 1997.742 ns ; 443.26 MHz ( period = 2.256 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.071 ns ;
-; 1997.742 ns ; 443.26 MHz ( period = 2.256 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.071 ns ;
-; 1997.765 ns ; 447.83 MHz ( period = 2.233 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 2.049 ns ;
-; 1997.800 ns ; 454.96 MHz ( period = 2.198 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.013 ns ;
-; 1997.800 ns ; 454.96 MHz ( period = 2.198 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.013 ns ;
-; 1997.800 ns ; 454.96 MHz ( period = 2.198 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.013 ns ;
-; 1997.800 ns ; 454.96 MHz ( period = 2.198 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 2.013 ns ;
-; 1997.822 ns ; 459.56 MHz ( period = 2.176 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.992 ns ;
-; 1997.858 ns ; 467.29 MHz ( period = 2.140 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.955 ns ;
-; 1997.858 ns ; 467.29 MHz ( period = 2.140 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.955 ns ;
-; 1997.858 ns ; 467.29 MHz ( period = 2.140 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.955 ns ;
-; 1997.858 ns ; 467.29 MHz ( period = 2.140 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.955 ns ;
-; 1997.863 ns ; 468.38 MHz ( period = 2.135 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.950 ns ;
-; 1997.880 ns ; 472.14 MHz ( period = 2.118 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.934 ns ;
-; 1997.916 ns ; 480.31 MHz ( period = 2.082 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.897 ns ;
-; 1997.916 ns ; 480.31 MHz ( period = 2.082 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.897 ns ;
-; 1997.916 ns ; 480.31 MHz ( period = 2.082 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.897 ns ;
-; 1997.916 ns ; 480.31 MHz ( period = 2.082 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.897 ns ;
-; 1997.918 ns ; 480.77 MHz ( period = 2.080 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.895 ns ;
-; 1997.921 ns ; 481.46 MHz ( period = 2.077 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.892 ns ;
-; 1997.941 ns ; 486.14 MHz ( period = 2.057 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.873 ns ;
-; 1997.974 ns ; 494.07 MHz ( period = 2.024 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.839 ns ;
-; 1997.974 ns ; 494.07 MHz ( period = 2.024 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.839 ns ;
-; 1997.974 ns ; 494.07 MHz ( period = 2.024 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.839 ns ;
-; 1997.974 ns ; 494.07 MHz ( period = 2.024 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.839 ns ;
-; 1997.976 ns ; 494.56 MHz ( period = 2.022 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.837 ns ;
-; 1997.979 ns ; 495.29 MHz ( period = 2.019 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.834 ns ;
-; 1997.980 ns ; 495.54 MHz ( period = 2.018 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.833 ns ;
-; 1997.995 ns ; 499.25 MHz ( period = 2.003 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.819 ns ;
-; 1998.032 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.781 ns ;
-; 1998.032 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.781 ns ;
-; 1998.032 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.781 ns ;
-; 1998.032 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.781 ns ;
-; 1998.034 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.779 ns ;
-; 1998.034 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.779 ns ;
-; 1998.037 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.776 ns ;
-; 1998.038 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.775 ns ;
-; 1998.055 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.759 ns ;
-; 1998.090 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.723 ns ;
-; 1998.090 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.723 ns ;
-; 1998.090 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.723 ns ;
-; 1998.091 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.723 ns ;
-; 1998.092 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.721 ns ;
-; 1998.092 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.721 ns ;
-; 1998.095 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.718 ns ;
-; 1998.096 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.717 ns ;
-; 1998.096 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.717 ns ;
-; 1998.113 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.701 ns ;
-; 1998.148 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.665 ns ;
-; 1998.148 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.665 ns ;
-; 1998.149 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.665 ns ;
-; 1998.149 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.665 ns ;
-; 1998.150 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.663 ns ;
-; 1998.150 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.663 ns ;
-; 1998.152 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.662 ns ;
-; 1998.153 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.660 ns ;
-; 1998.154 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.659 ns ;
-; 1998.154 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.659 ns ;
-; 1998.167 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.647 ns ;
-; 1998.206 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.607 ns ;
-; 1998.207 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.607 ns ;
-; 1998.207 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.607 ns ;
-; 1998.207 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.607 ns ;
-; 1998.208 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.605 ns ;
-; 1998.208 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.605 ns ;
-; 1998.209 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.605 ns ;
-; 1998.210 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.604 ns ;
-; 1998.211 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.602 ns ;
-; 1998.212 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.601 ns ;
-; 1998.212 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.601 ns ;
-; 1998.265 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.549 ns ;
-; 1998.265 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.549 ns ;
-; 1998.265 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.549 ns ;
-; 1998.265 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.549 ns ;
-; 1998.266 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.547 ns ;
-; 1998.266 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.547 ns ;
-; 1998.267 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.547 ns ;
-; 1998.267 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.547 ns ;
-; 1998.268 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.546 ns ;
-; 1998.269 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.544 ns ;
-; 1998.270 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.543 ns ;
-; 1998.270 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.543 ns ;
-; 1998.323 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.491 ns ;
-; 1998.323 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.491 ns ;
-; 1998.323 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.491 ns ;
-; 1998.323 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.491 ns ;
-; 1998.324 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.489 ns ;
-; 1998.324 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.489 ns ;
-; 1998.325 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.489 ns ;
-; 1998.325 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.489 ns ;
-; 1998.326 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.488 ns ;
-; 1998.328 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.486 ns ;
-; 1998.328 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.485 ns ;
-; 1998.328 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.485 ns ;
-; 1998.328 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.486 ns ;
-; 1998.381 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.433 ns ;
-; 1998.381 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.433 ns ;
-; 1998.381 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.433 ns ;
-; 1998.381 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.433 ns ;
-; 1998.382 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.432 ns ;
-; 1998.382 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.431 ns ;
-; 1998.383 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.431 ns ;
-; 1998.383 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.431 ns ;
-; 1998.383 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.431 ns ;
-; 1998.384 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.430 ns ;
-; 1998.386 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.428 ns ;
-; 1998.386 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.427 ns ;
-; 1998.386 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.427 ns ;
-; 1998.386 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.428 ns ;
-; 1998.439 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.375 ns ;
-; 1998.439 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.375 ns ;
-; 1998.439 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.375 ns ;
-; 1998.439 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.375 ns ;
-; 1998.440 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.374 ns ;
-; 1998.440 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.373 ns ;
-; 1998.441 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.373 ns ;
-; 1998.441 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.373 ns ;
-; 1998.441 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.373 ns ;
-; 1998.442 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.372 ns ;
-; 1998.442 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.372 ns ;
-; 1998.444 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.370 ns ;
-; 1998.444 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.369 ns ;
-; 1998.444 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.370 ns ;
-; 1998.445 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.369 ns ;
-; 1998.497 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.317 ns ;
-; 1998.497 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.317 ns ;
-; 1998.497 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.317 ns ;
-; 1998.497 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.317 ns ;
-; 1998.498 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.316 ns ;
-; 1998.499 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.315 ns ;
-; 1998.499 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.315 ns ;
-; 1998.499 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.315 ns ;
-; 1998.499 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.315 ns ;
-; 1998.500 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.314 ns ;
-; 1998.500 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.314 ns ;
-; 1998.500 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.314 ns ;
-; 1998.502 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.312 ns ;
-; 1998.502 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.813 ns ; 1.311 ns ;
-; 1998.502 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.312 ns ;
-; 1998.503 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.311 ns ;
-; 1998.671 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 1.143 ns ;
-; 1999.023 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.791 ns ;
-; 1999.024 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.790 ns ;
-; 1999.025 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.789 ns ;
-; 1999.025 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.789 ns ;
-; 1999.026 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.788 ns ;
-; 1999.026 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.788 ns ;
-; 1999.026 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.788 ns ;
-; 1999.027 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.787 ns ;
-; 1999.027 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.787 ns ;
-; 1999.027 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.787 ns ;
-; 1999.027 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.787 ns ;
-; 1999.027 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.787 ns ;
-; 1999.028 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.786 ns ;
-; 1999.028 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.786 ns ;
-; 1999.029 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.785 ns ;
-; 1999.029 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.785 ns ;
-; 1999.031 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 1999.998 ns ; 1999.814 ns ; 0.783 ns ;
-+-------------+---------------------------------------------+---------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------+------------------------------------------------------------------------+------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]' ;
-+------------+---------------------------------------------+---------------------------------------------------------------------------+---------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+------------+---------------------------------------------+---------------------------------------------------------------------------+---------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; 498.663 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.569 ns ;
-; 498.663 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.569 ns ;
-; 498.663 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.569 ns ;
-; 498.663 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.569 ns ;
-; 498.663 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.569 ns ;
-; 498.729 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.503 ns ;
-; 498.743 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.489 ns ;
-; 498.787 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.445 ns ;
-; 498.800 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.432 ns ;
-; 498.801 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.431 ns ;
-; 498.858 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.374 ns ;
-; 498.859 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.373 ns ;
-; 498.894 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.338 ns ;
-; 498.916 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.316 ns ;
-; 498.917 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 1.315 ns ;
-; 499.319 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 0.913 ns ;
-; 499.422 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 0.810 ns ;
-; 499.444 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 0.788 ns ;
-; 499.449 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 500.416 ns ; 500.232 ns ; 0.783 ns ;
-+------------+---------------------------------------------+---------------------------------------------------------------------------+---------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]' ;
-+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; 28.590 ns ; 186.15 MHz ( period = 5.372 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|RD_In ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\EDGEDETECT:LOCK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 31.276 ns ; 31.135 ns ; 2.545 ns ;
-; 28.759 ns ; 198.65 MHz ( period = 5.034 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|RD_In ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|RD_PULSE ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 31.276 ns ; 31.135 ns ; 2.376 ns ;
-; 54.429 ns ; 123.11 MHz ( period = 8.123 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.941 ns ;
-; 54.452 ns ; 123.46 MHz ( period = 8.100 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 7.920 ns ;
-; 54.563 ns ; 125.17 MHz ( period = 7.989 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.803 ns ;
-; 54.586 ns ; 125.53 MHz ( period = 7.966 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.782 ns ;
-; 54.600 ns ; 125.75 MHz ( period = 7.952 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.766 ns ;
-; 54.623 ns ; 126.12 MHz ( period = 7.929 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.745 ns ;
-; 54.812 ns ; 129.20 MHz ( period = 7.740 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.551 ns ;
-; 54.822 ns ; 129.37 MHz ( period = 7.730 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.DELAY_15MS ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 7.550 ns ;
-; 54.835 ns ; 129.58 MHz ( period = 7.717 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 7.530 ns ;
-; 54.845 ns ; 129.75 MHz ( period = 7.707 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.DELAY_15MS ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.374 ns ; 7.529 ns ;
-; 54.868 ns ; 130.14 MHz ( period = 7.684 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 7.491 ns ;
-; 54.889 ns ; 130.50 MHz ( period = 7.663 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CRC_ERRFLAG ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.474 ns ;
-; 54.889 ns ; 130.50 MHz ( period = 7.663 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_SECT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.481 ns ;
-; 54.889 ns ; 130.50 MHz ( period = 7.663 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_LEN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.481 ns ;
-; 54.889 ns ; 130.50 MHz ( period = 7.663 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_SCAN_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.481 ns ;
-; 54.910 ns ; 130.86 MHz ( period = 7.642 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_DELAY_B2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.456 ns ;
-; 54.912 ns ; 130.89 MHz ( period = 7.640 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CRC_ERRFLAG ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 7.453 ns ;
-; 54.912 ns ; 130.89 MHz ( period = 7.640 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_SECT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 7.460 ns ;
-; 54.912 ns ; 130.89 MHz ( period = 7.640 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_LEN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 7.460 ns ;
-; 54.912 ns ; 130.89 MHz ( period = 7.640 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_SCAN_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 7.460 ns ;
-; 54.933 ns ; 131.25 MHz ( period = 7.619 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_DELAY_B2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.435 ns ;
-; 54.944 ns ; 131.44 MHz ( period = 7.608 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_FF ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.417 ns ;
-; 54.947 ns ; 131.49 MHz ( period = 7.605 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_INDEX_3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.414 ns ;
-; 54.948 ns ; 131.51 MHz ( period = 7.604 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SHIFT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.413 ns ;
-; 54.948 ns ; 131.51 MHz ( period = 7.604 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_AM ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.413 ns ;
-; 54.967 ns ; 131.84 MHz ( period = 7.585 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_FF ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.396 ns ;
-; 54.970 ns ; 131.89 MHz ( period = 7.582 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_INDEX_3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.393 ns ;
-; 54.971 ns ; 131.91 MHz ( period = 7.581 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SHIFT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.392 ns ;
-; 54.971 ns ; 131.91 MHz ( period = 7.581 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_AM ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.392 ns ;
-; 54.979 ns ; 132.05 MHz ( period = 7.573 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_DR ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.382 ns ;
-; 54.981 ns ; 132.08 MHz ( period = 7.571 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.387 ns ;
-; 54.996 ns ; 132.35 MHz ( period = 7.556 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.374 ns ;
-; 55.002 ns ; 132.45 MHz ( period = 7.550 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_DR ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.361 ns ;
-; 55.002 ns ; 132.45 MHz ( period = 7.550 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.355 ns ; 7.353 ns ;
-; 55.010 ns ; 132.59 MHz ( period = 7.542 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 7.362 ns ;
-; 55.035 ns ; 133.03 MHz ( period = 7.517 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.326 ns ;
-; 55.039 ns ; 133.10 MHz ( period = 7.513 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.355 ns ; 7.316 ns ;
-; 55.047 ns ; 133.24 MHz ( period = 7.505 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 7.312 ns ;
-; 55.078 ns ; 133.80 MHz ( period = 7.474 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.INIT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.369 ns ; 7.291 ns ;
-; 55.090 ns ; 134.01 MHz ( period = 7.462 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_LOAD_DATA ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.360 ns ; 7.270 ns ;
-; 55.094 ns ; 134.08 MHz ( period = 7.458 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.360 ns ; 7.266 ns ;
-; 55.101 ns ; 134.21 MHz ( period = 7.451 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.INIT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.371 ns ; 7.270 ns ;
-; 55.102 ns ; 134.23 MHz ( period = 7.450 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_INDEX_2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.259 ns ;
-; 55.104 ns ; 134.26 MHz ( period = 7.448 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WRSTAT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.257 ns ;
-; 55.113 ns ; 134.43 MHz ( period = 7.439 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_LOAD_DATA ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.362 ns ; 7.249 ns ;
-; 55.113 ns ; 134.43 MHz ( period = 7.439 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_LOAD_DATA_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.248 ns ;
-; 55.115 ns ; 134.46 MHz ( period = 7.437 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.364 ns ; 7.249 ns ;
-; 55.117 ns ; 134.50 MHz ( period = 7.435 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.362 ns ; 7.245 ns ;
-; 55.125 ns ; 134.64 MHz ( period = 7.427 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_INDEX_2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.238 ns ;
-; 55.127 ns ; 134.68 MHz ( period = 7.425 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WRSTAT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.236 ns ;
-; 55.127 ns ; 134.68 MHz ( period = 7.425 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[11] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.243 ns ;
-; 55.130 ns ; 134.73 MHz ( period = 7.422 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.236 ns ;
-; 55.136 ns ; 134.84 MHz ( period = 7.416 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_LOAD_DATA_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.227 ns ;
-; 55.140 ns ; 134.92 MHz ( period = 7.412 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 7.232 ns ;
-; 55.144 ns ; 134.99 MHz ( period = 7.408 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.224 ns ;
-; 55.152 ns ; 135.14 MHz ( period = 7.400 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.364 ns ; 7.212 ns ;
-; 55.152 ns ; 135.14 MHz ( period = 7.400 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[14] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.218 ns ;
-; 55.161 ns ; 135.30 MHz ( period = 7.391 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|COMMAND_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.369 ns ; 7.208 ns ;
-; 55.167 ns ; 135.41 MHz ( period = 7.385 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.199 ns ;
-; 55.169 ns ; 135.45 MHz ( period = 7.383 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.357 ns ; 7.188 ns ;
-; 55.181 ns ; 135.67 MHz ( period = 7.371 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.355 ns ; 7.174 ns ;
-; 55.181 ns ; 135.67 MHz ( period = 7.371 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.187 ns ;
-; 55.190 ns ; 135.83 MHz ( period = 7.362 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 7.169 ns ;
-; 55.204 ns ; 136.09 MHz ( period = 7.348 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_HEAD_CTRL ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.166 ns ;
-; 55.206 ns ; 136.13 MHz ( period = 7.346 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.357 ns ; 7.151 ns ;
-; 55.218 ns ; 136.35 MHz ( period = 7.334 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.355 ns ; 7.137 ns ;
-; 55.227 ns ; 136.52 MHz ( period = 7.325 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_HEAD_CTRL ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 7.145 ns ;
-; 55.251 ns ; 136.97 MHz ( period = 7.301 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.352 ns ; 7.101 ns ;
-; 55.261 ns ; 137.16 MHz ( period = 7.291 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[11] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.105 ns ;
-; 55.261 ns ; 137.16 MHz ( period = 7.291 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.DELAY_15MS ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.100 ns ;
-; 55.272 ns ; 137.36 MHz ( period = 7.280 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|COMMAND_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.369 ns ; 7.097 ns ;
-; 55.274 ns ; 137.40 MHz ( period = 7.278 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.094 ns ;
-; 55.278 ns ; 137.48 MHz ( period = 7.274 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|TRACK_REG[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|DIR ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.274 ns ; 6.996 ns ;
-; 55.286 ns ; 137.63 MHz ( period = 7.266 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[14] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.080 ns ;
-; 55.288 ns ; 137.67 MHz ( period = 7.264 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 7.084 ns ;
-; 55.294 ns ; 137.78 MHz ( period = 7.258 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[13] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.076 ns ;
-; 55.295 ns ; 137.80 MHz ( period = 7.257 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|COMMAND_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 7.070 ns ;
-; 55.298 ns ; 137.85 MHz ( period = 7.254 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[11] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.068 ns ;
-; 55.299 ns ; 137.87 MHz ( period = 7.253 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_WR_DATA ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.364 ns ; 7.065 ns ;
-; 55.300 ns ; 137.89 MHz ( period = 7.252 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.068 ns ;
-; 55.303 ns ; 137.95 MHz ( period = 7.249 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_DELAY_B8 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.364 ns ; 7.061 ns ;
-; 55.311 ns ; 138.10 MHz ( period = 7.241 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.057 ns ;
-; 55.316 ns ; 138.20 MHz ( period = 7.236 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_RD_TRACK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.045 ns ;
-; 55.316 ns ; 138.20 MHz ( period = 7.236 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_DRQ_3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.045 ns ;
-; 55.316 ns ; 138.20 MHz ( period = 7.236 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_LEADIN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.052 ns ;
-; 55.317 ns ; 138.22 MHz ( period = 7.235 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_DRQ_2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.044 ns ;
-; 55.319 ns ; 138.26 MHz ( period = 7.233 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_INDEX_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 7.042 ns ;
-; 55.322 ns ; 138.31 MHz ( period = 7.230 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_WR_DATA ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.044 ns ;
-; 55.323 ns ; 138.33 MHz ( period = 7.229 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[14] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.043 ns ;
-; 55.323 ns ; 138.33 MHz ( period = 7.229 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.047 ns ;
-; 55.324 ns ; 138.35 MHz ( period = 7.228 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.355 ns ; 7.031 ns ;
-; 55.326 ns ; 138.39 MHz ( period = 7.226 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_DELAY_B8 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.040 ns ;
-; 55.328 ns ; 138.43 MHz ( period = 7.224 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CRC_ERRFLAG ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.352 ns ; 7.024 ns ;
-; 55.328 ns ; 138.43 MHz ( period = 7.224 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_SECT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 7.031 ns ;
-; 55.328 ns ; 138.43 MHz ( period = 7.224 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_LEN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 7.031 ns ;
-; 55.328 ns ; 138.43 MHz ( period = 7.224 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_SCAN_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 7.031 ns ;
-; 55.331 ns ; 138.48 MHz ( period = 7.221 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.032 ns ;
-; 55.331 ns ; 138.48 MHz ( period = 7.221 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_LOAD_SHFT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.360 ns ; 7.029 ns ;
-; 55.332 ns ; 138.50 MHz ( period = 7.220 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_MULTISECT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.360 ns ; 7.028 ns ;
-; 55.332 ns ; 138.50 MHz ( period = 7.220 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|COMMAND_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 7.033 ns ;
-; 55.333 ns ; 138.52 MHz ( period = 7.219 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_CRC_2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.360 ns ; 7.027 ns ;
-; 55.333 ns ; 138.52 MHz ( period = 7.219 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_FIRSTBYTE ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.360 ns ; 7.027 ns ;
-; 55.339 ns ; 138.64 MHz ( period = 7.213 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_RD_TRACK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.024 ns ;
-; 55.339 ns ; 138.64 MHz ( period = 7.213 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_DRQ_3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.024 ns ;
-; 55.339 ns ; 138.64 MHz ( period = 7.213 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_LEADIN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 7.031 ns ;
-; 55.340 ns ; 138.66 MHz ( period = 7.212 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_DRQ_2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.023 ns ;
-; 55.341 ns ; 138.68 MHz ( period = 7.211 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_RDSTAT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.360 ns ; 7.019 ns ;
-; 55.342 ns ; 138.70 MHz ( period = 7.210 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_INDEX_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 7.021 ns ;
-; 55.344 ns ; 138.73 MHz ( period = 7.208 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_DRQ_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.360 ns ; 7.016 ns ;
-; 55.344 ns ; 138.73 MHz ( period = 7.208 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_AM ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 7.022 ns ;
-; 55.349 ns ; 138.83 MHz ( period = 7.203 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_DELAY_B2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.355 ns ; 7.006 ns ;
-; 55.354 ns ; 138.93 MHz ( period = 7.198 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 7.011 ns ;
-; 55.354 ns ; 138.93 MHz ( period = 7.198 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_LOAD_SHFT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.362 ns ; 7.008 ns ;
-; 55.355 ns ; 138.95 MHz ( period = 7.197 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_MULTISECT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.362 ns ; 7.007 ns ;
-; 55.356 ns ; 138.97 MHz ( period = 7.196 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_CRC_2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.362 ns ; 7.006 ns ;
-; 55.356 ns ; 138.97 MHz ( period = 7.196 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_FIRSTBYTE ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.362 ns ; 7.006 ns ;
-; 55.361 ns ; 139.06 MHz ( period = 7.191 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.355 ns ; 6.994 ns ;
-; 55.364 ns ; 139.12 MHz ( period = 7.188 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 6.997 ns ;
-; 55.364 ns ; 139.12 MHz ( period = 7.188 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_RDSTAT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.362 ns ; 6.998 ns ;
-; 55.367 ns ; 139.18 MHz ( period = 7.185 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_DRQ_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.362 ns ; 6.995 ns ;
-; 55.367 ns ; 139.18 MHz ( period = 7.185 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_AM ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 7.001 ns ;
-; 55.374 ns ; 139.31 MHz ( period = 7.178 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.DELAY_15MS ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 6.996 ns ;
-; 55.376 ns ; 139.35 MHz ( period = 7.176 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_SCAN_TRACK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 6.987 ns ;
-; 55.379 ns ; 139.41 MHz ( period = 7.173 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 6.984 ns ;
-; 55.383 ns ; 139.49 MHz ( period = 7.169 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_NEXTBYTE ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 6.980 ns ;
-; 55.383 ns ; 139.49 MHz ( period = 7.169 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_FF ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.350 ns ; 6.967 ns ;
-; 55.384 ns ; 139.51 MHz ( period = 7.168 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[9] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 6.986 ns ;
-; 55.386 ns ; 139.55 MHz ( period = 7.166 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_INDEX_3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.350 ns ; 6.964 ns ;
-; 55.386 ns ; 139.55 MHz ( period = 7.166 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_CRC_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 6.982 ns ;
-; 55.387 ns ; 139.57 MHz ( period = 7.165 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SHIFT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.350 ns ; 6.963 ns ;
-; 55.387 ns ; 139.57 MHz ( period = 7.165 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_AM ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.350 ns ; 6.963 ns ;
-; 55.389 ns ; 139.61 MHz ( period = 7.163 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.DELAY_15MS ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 6.983 ns ;
-; 55.393 ns ; 139.68 MHz ( period = 7.159 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 6.972 ns ;
-; 55.399 ns ; 139.80 MHz ( period = 7.153 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_SCAN_TRACK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 6.966 ns ;
-; 55.403 ns ; 139.88 MHz ( period = 7.149 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.DELAY_15MS ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.374 ns ; 6.971 ns ;
-; 55.406 ns ; 139.94 MHz ( period = 7.146 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|COMMAND_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 6.959 ns ;
-; 55.406 ns ; 139.94 MHz ( period = 7.146 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_NEXTBYTE ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 6.959 ns ;
-; 55.408 ns ; 139.98 MHz ( period = 7.144 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_ACTIV ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|ram_block11a0~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.739 ns ; 7.331 ns ;
-; 55.409 ns ; 140.00 MHz ( period = 7.143 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_CRC_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 6.961 ns ;
-; 55.415 ns ; 140.11 MHz ( period = 7.137 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 6.944 ns ;
-; 55.418 ns ; 140.17 MHz ( period = 7.134 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.354 ns ; 6.936 ns ;
-; 55.418 ns ; 140.17 MHz ( period = 7.134 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_DR ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.350 ns ; 6.932 ns ;
-; 55.422 ns ; 140.25 MHz ( period = 7.130 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 6.946 ns ;
-; 55.428 ns ; 140.37 MHz ( period = 7.124 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[13] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SET_DRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 6.938 ns ;
-; 55.428 ns ; 140.37 MHz ( period = 7.124 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.DELAY_15MS ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 6.935 ns ;
-; 55.430 ns ; 140.41 MHz ( period = 7.122 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.352 ns ; 6.922 ns ;
-; 55.440 ns ; 140.61 MHz ( period = 7.112 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.DELAY_15MS ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 6.921 ns ;
-; 55.441 ns ; 140.63 MHz ( period = 7.111 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CRC_ERRFLAG ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 6.920 ns ;
-; 55.441 ns ; 140.63 MHz ( period = 7.111 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_SECT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 6.927 ns ;
-; 55.441 ns ; 140.63 MHz ( period = 7.111 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_LEN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 6.927 ns ;
-; 55.441 ns ; 140.63 MHz ( period = 7.111 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_SCAN_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 6.927 ns ;
-; 55.441 ns ; 140.63 MHz ( period = 7.111 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[17] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 6.918 ns ;
-; 55.443 ns ; 140.67 MHz ( period = 7.109 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|COMMAND_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 6.922 ns ;
-; 55.456 ns ; 140.92 MHz ( period = 7.096 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CRC_ERRFLAG ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 6.907 ns ;
-; 55.456 ns ; 140.92 MHz ( period = 7.096 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_SECT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 6.914 ns ;
-; 55.456 ns ; 140.92 MHz ( period = 7.096 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_LEN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 6.914 ns ;
-; 55.456 ns ; 140.92 MHz ( period = 7.096 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_SCAN_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 6.914 ns ;
-; 55.459 ns ; 140.98 MHz ( period = 7.093 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 6.909 ns ;
-; 55.462 ns ; 141.04 MHz ( period = 7.090 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_DELAY_B2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.364 ns ; 6.902 ns ;
-; 55.463 ns ; 141.06 MHz ( period = 7.089 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_STEP_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.364 ns ; 6.901 ns ;
-; 55.465 ns ; 141.10 MHz ( period = 7.087 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[13] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_DELAY_B3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 6.901 ns ;
-; 55.467 ns ; 141.14 MHz ( period = 7.085 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SET_DRQ_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.364 ns ; 6.897 ns ;
-; 55.469 ns ; 141.18 MHz ( period = 7.083 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_TRAP ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.364 ns ; 6.895 ns ;
-; 55.470 ns ; 141.20 MHz ( period = 7.082 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CRC_ERRFLAG ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.365 ns ; 6.895 ns ;
-; 55.470 ns ; 141.20 MHz ( period = 7.082 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_SECT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 6.902 ns ;
-; 55.470 ns ; 141.20 MHz ( period = 7.082 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_LEN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 6.902 ns ;
-; 55.470 ns ; 141.20 MHz ( period = 7.082 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_SCAN_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.372 ns ; 6.902 ns ;
-; 55.471 ns ; 141.22 MHz ( period = 7.081 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_BYTE ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.364 ns ; 6.893 ns ;
-; 55.477 ns ; 141.34 MHz ( period = 7.075 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_DELAY_B2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 6.889 ns ;
-; 55.478 ns ; 141.36 MHz ( period = 7.074 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 6.890 ns ;
-; 55.480 ns ; 141.40 MHz ( period = 7.072 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 6.888 ns ;
-; 55.483 ns ; 141.46 MHz ( period = 7.069 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 6.885 ns ;
-; 55.486 ns ; 141.52 MHz ( period = 7.066 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_STEP_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 6.880 ns ;
-; 55.487 ns ; 141.54 MHz ( period = 7.065 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 6.883 ns ;
-; 55.490 ns ; 141.60 MHz ( period = 7.062 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|DIR ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.278 ns ; 6.788 ns ;
-; 55.490 ns ; 141.60 MHz ( period = 7.062 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SET_DRQ_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 6.876 ns ;
-; 55.491 ns ; 141.62 MHz ( period = 7.061 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_DELAY_B2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.368 ns ; 6.877 ns ;
-; 55.492 ns ; 141.64 MHz ( period = 7.060 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_TRAP ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 6.874 ns ;
-; 55.494 ns ; 141.68 MHz ( period = 7.058 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_BYTE ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.366 ns ; 6.872 ns ;
-; 55.495 ns ; 141.70 MHz ( period = 7.057 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CRC_ERRFLAG ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.354 ns ; 6.859 ns ;
-; 55.495 ns ; 141.70 MHz ( period = 7.057 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_SECT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 6.866 ns ;
-; 55.495 ns ; 141.70 MHz ( period = 7.057 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_LEN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 6.866 ns ;
-; 55.495 ns ; 141.70 MHz ( period = 7.057 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_SCAN_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 6.866 ns ;
-; 55.496 ns ; 141.72 MHz ( period = 7.056 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_FF ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 6.863 ns ;
-; 55.497 ns ; 141.74 MHz ( period = 7.055 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.IDLE ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 6.866 ns ;
-; 55.499 ns ; 141.78 MHz ( period = 7.053 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_INDEX_3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 6.860 ns ;
-; 55.500 ns ; 141.80 MHz ( period = 7.052 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SHIFT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 6.859 ns ;
-; 55.500 ns ; 141.80 MHz ( period = 7.052 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_DELAY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.361 ns ; 6.861 ns ;
-; 55.500 ns ; 141.80 MHz ( period = 7.052 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_AM ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 6.859 ns ;
-; 55.501 ns ; 141.82 MHz ( period = 7.051 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 6.869 ns ;
-; 55.503 ns ; 141.86 MHz ( period = 7.049 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 6.867 ns ;
-; 55.506 ns ; 141.92 MHz ( period = 7.046 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.370 ns ; 6.864 ns ;
-; 55.507 ns ; 141.94 MHz ( period = 7.045 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CRC_ERRFLAG ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.352 ns ; 6.845 ns ;
-; 55.507 ns ; 141.94 MHz ( period = 7.045 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_SECT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 6.852 ns ;
-; 55.507 ns ; 141.94 MHz ( period = 7.045 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_LEN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 6.852 ns ;
-; 55.507 ns ; 141.94 MHz ( period = 7.045 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_VERIFY_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 6.856 ns ;
-; 55.507 ns ; 141.94 MHz ( period = 7.045 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_SCAN_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.359 ns ; 6.852 ns ;
-; 55.508 ns ; 141.96 MHz ( period = 7.044 ns ) ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\P_DELAY:DELCNT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_SCAN_TRACK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 62.552 ns ; 62.363 ns ; 6.855 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]' ;
-+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; -4.615 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.928 ns ; 3.687 ns ;
-; -4.573 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[95] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.921 ns ; 3.652 ns ;
-; -4.568 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[107] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.642 ns ;
-; -4.562 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[90] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.915 ns ; 3.647 ns ;
-; -4.553 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[33] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.918 ns ; 3.635 ns ;
-; -4.549 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[49] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.918 ns ; 3.631 ns ;
-; -4.541 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[34] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.928 ns ; 3.613 ns ;
-; -4.533 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[99] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.610 ns ;
-; -4.526 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[57] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.918 ns ; 3.608 ns ;
-; -4.479 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.581 ns ; 3.898 ns ;
-; -4.440 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 4.141 ns ;
-; -4.440 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[42] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.517 ns ;
-; -4.413 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 4.114 ns ;
-; -4.409 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[111] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.486 ns ;
-; -4.407 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[84] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.916 ns ; 3.491 ns ;
-; -4.406 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[88] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.914 ns ; 3.492 ns ;
-; -4.394 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[85] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.468 ns ;
-; -4.391 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[60] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.465 ns ;
-; -4.391 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[48] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.466 ns ;
-; -4.386 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[50] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.461 ns ;
-; -4.381 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[97] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.458 ns ;
-; -4.378 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[23] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.455 ns ;
-; -4.372 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[83] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.447 ns ;
-; -4.370 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[28] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.447 ns ;
-; -4.370 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[20] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.447 ns ;
-; -4.370 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[41] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.445 ns ;
-; -4.369 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.301 ns ; 4.068 ns ;
-; -4.367 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[108] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.444 ns ;
-; -4.366 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[78] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.441 ns ;
-; -4.366 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[59] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.441 ns ;
-; -4.364 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[43] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.441 ns ;
-; -4.363 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.300 ns ; 4.063 ns ;
-; -4.363 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[3] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.440 ns ;
-; -4.361 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[72] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.436 ns ;
-; -4.360 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[70] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.434 ns ;
-; -4.360 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[81] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.435 ns ;
-; -4.357 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[38] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.431 ns ;
-; -4.356 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[112] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.433 ns ;
-; -4.353 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[75] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.428 ns ;
-; -4.353 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[82] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.428 ns ;
-; -4.351 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[4] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe27 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.931 ns ; 3.420 ns ;
-; -4.348 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[46] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.922 ns ; 3.426 ns ;
-; -4.318 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[92] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.916 ns ; 3.402 ns ;
-; -4.316 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[17] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.919 ns ; 3.397 ns ;
-; -4.308 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.300 ns ; 4.008 ns ;
-; -4.306 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.581 ns ; 3.725 ns ;
-; -4.305 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[37] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.379 ns ;
-; -4.301 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 4.002 ns ;
-; -4.299 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[80] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.376 ns ;
-; -4.298 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[45] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.924 ns ; 3.374 ns ;
-; -4.297 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[124] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.374 ns ;
-; -4.294 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[104] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.922 ns ; 3.372 ns ;
-; -4.293 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[91] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.370 ns ;
-; -4.293 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[30] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.922 ns ; 3.371 ns ;
-; -4.290 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[58] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.365 ns ;
-; -4.289 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[15] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.366 ns ;
-; -4.289 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.364 ns ;
-; -4.288 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[47] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.363 ns ;
-; -4.279 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[96] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.356 ns ;
-; -4.278 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[10] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.355 ns ;
-; -4.277 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[7] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.354 ns ;
-; -4.273 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[69] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.347 ns ;
-; -4.271 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.972 ns ;
-; -4.269 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.970 ns ;
-; -4.269 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[54] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.343 ns ;
-; -4.269 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[68] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.346 ns ;
-; -4.269 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[113] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.346 ns ;
-; -4.268 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[110] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.345 ns ;
-; -4.268 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[106] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.345 ns ;
-; -4.267 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[13] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.344 ns ;
-; -4.266 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[22] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.343 ns ;
-; -4.264 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[116] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.341 ns ;
-; -4.264 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[127] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.341 ns ;
-; -4.262 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[125] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.339 ns ;
-; -4.262 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[12] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.339 ns ;
-; -4.259 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.960 ns ;
-; -4.259 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[51] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.334 ns ;
-; -4.258 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[61] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.332 ns ;
-; -4.256 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[122] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.333 ns ;
-; -4.256 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[98] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.333 ns ;
-; -4.255 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[86] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.329 ns ;
-; -4.255 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[40] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.330 ns ;
-; -4.253 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[109] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.330 ns ;
-; -4.253 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[118] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.327 ns ;
-; -4.251 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[65] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.328 ns ;
-; -4.248 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[4] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.325 ns ;
-; -4.247 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[105] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.324 ns ;
-; -4.246 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[31] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.323 ns ;
-; -4.245 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[53] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.319 ns ;
-; -4.243 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.944 ns ;
-; -4.241 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.316 ns ;
-; -4.236 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[55] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.310 ns ;
-; -4.230 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.301 ns ; 3.929 ns ;
-; -4.229 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.301 ns ; 3.928 ns ;
-; -4.219 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.300 ns ; 3.919 ns ;
-; -4.217 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[8] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.292 ns ;
-; -4.215 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.916 ns ;
-; -4.203 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.904 ns ;
-; -4.199 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.300 ns ; 3.899 ns ;
-; -4.195 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.581 ns ; 3.614 ns ;
-; -4.194 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[26] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.269 ns ;
-; -4.190 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[7] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe33 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.933 ns ; 3.257 ns ;
-; -4.188 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.301 ns ; 3.887 ns ;
-; -4.188 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.624 ns ; 3.564 ns ;
-; -4.179 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[5] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe29 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.931 ns ; 3.248 ns ;
-; -4.175 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.876 ns ;
-; -4.172 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.581 ns ; 3.591 ns ;
-; -4.156 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.301 ns ; 3.855 ns ;
-; -4.154 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.603 ns ; 3.551 ns ;
-; -4.149 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[2] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.850 ns ;
-; -4.148 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.301 ns ; 3.847 ns ;
-; -4.143 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.603 ns ; 3.540 ns ;
-; -4.142 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe15 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.612 ns ; 3.530 ns ;
-; -4.140 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.624 ns ; 3.516 ns ;
-; -4.139 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[89] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.216 ns ;
-; -4.138 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.300 ns ; 3.838 ns ;
-; -4.137 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.211 ns ;
-; -4.135 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[87] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.212 ns ;
-; -4.135 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[100] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.212 ns ;
-; -4.135 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[71] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.212 ns ;
-; -4.134 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[39] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.211 ns ;
-; -4.133 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[121] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.210 ns ;
-; -4.133 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[14] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.208 ns ;
-; -4.133 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[9] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.208 ns ;
-; -4.130 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[123] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.204 ns ;
-; -4.130 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[120] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.205 ns ;
-; -4.128 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[126] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.205 ns ;
-; -4.127 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[114] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.202 ns ;
-; -4.125 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[117] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.199 ns ;
-; -4.124 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[2] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe23 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.933 ns ; 3.191 ns ;
-; -4.113 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[74] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.190 ns ;
-; -4.113 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[44] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.190 ns ;
-; -4.113 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[1] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe22 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.616 ns ; 3.497 ns ;
-; -4.109 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[64] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.186 ns ;
-; -4.108 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.603 ns ; 3.505 ns ;
-; -4.104 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[7] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe17 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.933 ns ; 3.171 ns ;
-; -4.102 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.176 ns ;
-; -4.101 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.802 ns ;
-; -4.100 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.581 ns ; 3.519 ns ;
-; -4.098 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[4] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe43 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.936 ns ; 3.162 ns ;
-; -4.098 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.603 ns ; 3.495 ns ;
-; -4.097 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[2] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.301 ns ; 3.796 ns ;
-; -4.092 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.793 ns ;
-; -4.088 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.581 ns ; 3.507 ns ;
-; -4.083 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.603 ns ; 3.480 ns ;
-; -4.078 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.779 ns ;
-; -4.069 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.306 ns ; 3.763 ns ;
-; -4.068 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe13 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.612 ns ; 3.456 ns ;
-; -4.068 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.306 ns ; 3.762 ns ;
-; -4.064 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.307 ns ; 3.757 ns ;
-; -4.049 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe49 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.613 ns ; 3.436 ns ;
-; -4.045 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.603 ns ; 3.442 ns ;
-; -4.045 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.603 ns ; 3.442 ns ;
-; -4.041 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.308 ns ; 3.733 ns ;
-; -4.038 ns ; None ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[110] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe26 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.615 ns ; 3.423 ns ;
-; -4.034 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[5] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe45 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.938 ns ; 3.096 ns ;
-; -4.034 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[4] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe11 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.943 ns ; 3.091 ns ;
-; -4.034 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.300 ns ; 3.734 ns ;
-; -4.024 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe47 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.613 ns ; 3.411 ns ;
-; -4.019 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.581 ns ; 3.438 ns ;
-; -4.016 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[79] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.093 ns ;
-; -4.015 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[32] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.092 ns ;
-; -4.014 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[73] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.091 ns ;
-; -4.014 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[119] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.091 ns ;
-; -4.014 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[24] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.089 ns ;
-; -4.012 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[77] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.089 ns ;
-; -4.012 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[63] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.089 ns ;
-; -4.012 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[36] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.089 ns ;
-; -4.011 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[93] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.088 ns ;
-; -4.011 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[115] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.085 ns ;
-; -4.009 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[56] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.084 ns ;
-; -4.006 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[102] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.080 ns ;
-; -4.006 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.603 ns ; 3.403 ns ;
-; -4.005 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[18] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.080 ns ;
-; -4.004 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.301 ns ; 3.703 ns ;
-; -4.000 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.581 ns ; 3.419 ns ;
-; -3.998 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[76] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.075 ns ;
-; -3.998 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.299 ns ; 3.699 ns ;
-; -3.996 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[62] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.073 ns ;
-; -3.995 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.603 ns ; 3.392 ns ;
-; -3.993 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[52] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.070 ns ;
-; -3.991 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[66] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.068 ns ;
-; -3.989 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe41 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.938 ns ; 3.051 ns ;
-; -3.989 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe43 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.610 ns ; 3.379 ns ;
-; -3.988 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[103] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.923 ns ; 3.065 ns ;
-; -3.986 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[16] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.061 ns ;
-; -3.986 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[1] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.061 ns ;
-; -3.985 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[94] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.060 ns ;
-; -3.985 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[29] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.059 ns ;
-; -3.985 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[5] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.059 ns ;
-; -3.985 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.060 ns ;
-; -3.984 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[19] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.058 ns ;
-; -3.984 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[25] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.925 ns ; 3.059 ns ;
-; -3.983 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[27] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.057 ns ;
-; -3.982 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[21] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.056 ns ;
-; -3.981 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[101] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.926 ns ; 3.055 ns ;
-; -3.972 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.603 ns ; 3.369 ns ;
-; -3.970 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe25 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.933 ns ; 3.037 ns ;
-; -3.966 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.300 ns ; 3.666 ns ;
-; -3.954 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe9 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.145 ns ; -0.935 ns ; 3.019 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]' ;
-+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; -2.673 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.262 ns ; 0.814 ns ; 3.487 ns ;
-; -2.447 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.083 ns ; 3.530 ns ;
-; -2.348 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_BANK_OK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.262 ns ; 0.807 ns ; 3.155 ns ;
-; -2.346 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_AC ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.262 ns ; 0.807 ns ; 3.153 ns ;
-; -2.275 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.262 ns ; 0.807 ns ; 3.082 ns ;
-; -2.254 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_AC ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.262 ns ; 0.807 ns ; 3.061 ns ;
-; -2.243 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.138 ns ; 3.381 ns ;
-; -2.194 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.100 ns ; 3.294 ns ;
-; -2.187 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.075 ns ; 3.262 ns ;
-; -2.094 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.145 ns ; 3.239 ns ;
-; -2.024 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.145 ns ; 3.169 ns ;
-; -2.006 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.145 ns ; 3.151 ns ;
-; -1.993 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.132 ns ; 3.125 ns ;
-; -1.990 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_FIFO_WRE ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.262 ns ; 0.807 ns ; 2.797 ns ;
-; -1.911 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.140 ns ; 3.051 ns ;
-; -1.896 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_S[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.090 ns ; 2.986 ns ;
-; -1.895 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_S[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.090 ns ; 2.985 ns ;
-; -1.873 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T7F ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.262 ns ; 0.807 ns ; 2.680 ns ;
-; -1.871 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T3 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.262 ns ; 0.807 ns ; 2.678 ns ;
-; -1.838 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLR_FIFO ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CLR_FIFO_SYNC ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; -1.306 ns ; 0.532 ns ;
-; -1.834 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.131 ns ; 2.965 ns ;
-; -1.828 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.079 ns ; 2.907 ns ;
-; -1.827 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.079 ns ; 2.906 ns ;
-; -1.824 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.079 ns ; 2.903 ns ;
-; -1.800 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.131 ns ; 2.931 ns ;
-; -1.800 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.079 ns ; 2.879 ns ;
-; -1.765 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.145 ns ; 2.910 ns ;
-; -1.763 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.132 ns ; 2.895 ns ;
-; -1.755 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.136 ns ; 2.891 ns ;
-; -1.647 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.133 ns ; 2.780 ns ;
-; -1.646 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.133 ns ; 2.779 ns ;
-; -1.641 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.129 ns ; 2.770 ns ;
-; -1.610 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.129 ns ; 2.739 ns ;
-; -1.593 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.152 ns ; 2.745 ns ;
-; -1.556 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.134 ns ; 2.690 ns ;
-; -1.553 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.129 ns ; 2.682 ns ;
-; -1.470 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_S[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.142 ns ; 2.612 ns ;
-; -1.465 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.129 ns ; 2.594 ns ;
-; -1.463 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.127 ns ; 2.590 ns ;
-; -1.451 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.145 ns ; 2.596 ns ;
-; -1.441 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.145 ns ; 2.586 ns ;
-; -1.436 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.136 ns ; 2.572 ns ;
-; -1.413 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.142 ns ; 2.555 ns ;
-; -1.361 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.145 ns ; 2.506 ns ;
-; -1.341 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.145 ns ; 2.486 ns ;
-; -1.329 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.075 ns ; 2.404 ns ;
-; -1.327 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_AC ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.083 ns ; 2.410 ns ;
-; -1.326 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.084 ns ; 2.410 ns ;
-; -1.302 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.083 ns ; 2.385 ns ;
-; -1.298 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.126 ns ; 2.424 ns ;
-; -1.271 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.077 ns ; 2.348 ns ;
-; -1.252 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_AC ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.083 ns ; 2.335 ns ;
-; -1.216 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_S[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.142 ns ; 2.358 ns ;
-; -1.202 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.075 ns ; 2.277 ns ;
-; -1.202 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.075 ns ; 2.277 ns ;
-; -1.181 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.083 ns ; 2.264 ns ;
-; -1.167 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_CB8 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.079 ns ; 2.246 ns ;
-; -1.162 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T8F ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.079 ns ; 2.241 ns ;
-; -1.139 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.130 ns ; 2.269 ns ;
-; -1.102 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.084 ns ; 2.186 ns ;
-; -1.077 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.140 ns ; 2.217 ns ;
-; -1.048 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.151 ns ; 2.199 ns ;
-; -1.047 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.084 ns ; 2.131 ns ;
-; -0.910 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.123 ns ; 2.033 ns ;
-; -0.901 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.091 ns ; 1.992 ns ;
-; -0.827 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.090 ns ; 1.917 ns ;
-; -0.750 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.091 ns ; 1.841 ns ;
-; -0.750 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T2A ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.091 ns ; 1.841 ns ;
-; -0.741 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.091 ns ; 1.832 ns ;
-; -0.642 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.088 ns ; 1.730 ns ;
-; -0.623 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.088 ns ; 1.711 ns ;
-; -0.616 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.088 ns ; 1.704 ns ;
-; -0.600 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_C5 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.088 ns ; 1.688 ns ;
-; -0.596 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T1 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.087 ns ; 1.683 ns ;
-; -0.413 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.077 ns ; 1.490 ns ;
-; -0.410 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.077 ns ; 1.487 ns ;
-; -0.199 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.090 ns ; 1.289 ns ;
-; -0.193 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T2B ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.090 ns ; 1.283 ns ;
-; -0.191 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.091 ns ; 1.282 ns ;
-; -0.186 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a14~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.175 ns ; 4.361 ns ;
-; -0.183 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_P[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.091 ns ; 1.274 ns ;
-; -0.102 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[24] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_REQ ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 3.040 ns ; 3.142 ns ;
-; -0.068 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a4~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.171 ns ; 4.239 ns ;
-; -0.062 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a14~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.175 ns ; 4.237 ns ;
-; -0.041 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a1~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.162 ns ; 4.203 ns ;
-; -0.024 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a3~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.181 ns ; 4.205 ns ;
-; 0.003 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a5~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.168 ns ; 4.165 ns ;
-; 0.039 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a0~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.173 ns ; 4.134 ns ;
-; 0.059 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_P[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 1.264 ns ; 1.091 ns ; 1.032 ns ;
-; 0.073 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a4~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.171 ns ; 4.098 ns ;
-; 0.080 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a2~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.167 ns ; 4.087 ns ;
-; 0.108 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a3~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.181 ns ; 4.073 ns ;
-; 0.123 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a5~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.168 ns ; 4.045 ns ;
-; 0.165 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a7~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.182 ns ; 4.017 ns ;
-; 0.166 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a0~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.173 ns ; 4.007 ns ;
-; 0.194 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a2~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.167 ns ; 3.973 ns ;
-; 0.201 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a1~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.162 ns ; 3.961 ns ;
-; 0.250 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a1~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.464 ns ; 4.214 ns ;
-; 0.301 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a3~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.522 ns ; 4.221 ns ;
-; 0.306 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a3~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.483 ns ; 4.177 ns ;
-; 0.375 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a0~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.514 ns ; 4.139 ns ;
-; 0.401 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a0~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.475 ns ; 4.074 ns ;
-; 0.451 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a7~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.182 ns ; 3.731 ns ;
-; 0.454 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a14~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.477 ns ; 4.023 ns ;
-; 0.467 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a4~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.473 ns ; 4.006 ns ;
-; 0.509 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a1~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.503 ns ; 3.994 ns ;
-; 0.514 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a2~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.469 ns ; 3.955 ns ;
-; 0.539 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a7~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.484 ns ; 3.945 ns ;
-; 0.568 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.391 ns ; 3.823 ns ;
-; 0.576 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a5~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.470 ns ; 3.894 ns ;
-; 0.579 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.383 ns ; 3.804 ns ;
-; 0.580 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.408 ns ; 3.828 ns ;
-; 0.619 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.387 ns ; 3.768 ns ;
-; 0.677 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a14~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.516 ns ; 3.839 ns ;
-; 0.695 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a2~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.508 ns ; 3.813 ns ;
-; 0.773 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a4~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.512 ns ; 3.739 ns ;
-; 0.800 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.387 ns ; 3.587 ns ;
-; 0.805 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.387 ns ; 3.582 ns ;
-; 0.810 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a5~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.509 ns ; 3.699 ns ;
-; 0.818 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_L_D[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a7~porta_datain_reg0 ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.523 ns ; 3.705 ns ;
-; 0.834 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.212 ns ; 3.378 ns ;
-; 0.838 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.383 ns ; 3.545 ns ;
-; 0.840 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_AC ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.391 ns ; 3.551 ns ;
-; 0.841 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.392 ns ; 3.551 ns ;
-; 0.933 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.387 ns ; 3.454 ns ;
-; 0.965 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.383 ns ; 3.418 ns ;
-; 0.965 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.383 ns ; 3.418 ns ;
-; 1.026 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.391 ns ; 3.365 ns ;
-; 1.038 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.385 ns ; 3.347 ns ;
-; 1.057 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_AC ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.391 ns ; 3.334 ns ;
-; 1.110 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.057 ns ; 2.947 ns ;
-; 1.120 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.392 ns ; 3.272 ns ;
-; 1.147 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.391 ns ; 3.244 ns ;
-; 1.153 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_S[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.398 ns ; 3.245 ns ;
-; 1.207 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.392 ns ; 3.185 ns ;
-; 1.266 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.399 ns ; 3.133 ns ;
-; 1.344 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.057 ns ; 2.713 ns ;
-; 1.374 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_S[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.398 ns ; 3.024 ns ;
-; 1.417 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.399 ns ; 2.982 ns ;
-; 1.417 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T2A ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.399 ns ; 2.982 ns ;
-; 1.426 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.399 ns ; 2.973 ns ;
-; 1.426 ns ; 162.63 MHz ( period = 6.149 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.936 ns ;
-; 1.427 ns ; 162.65 MHz ( period = 6.148 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.935 ns ;
-; 1.481 ns ; 164.10 MHz ( period = 6.094 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.881 ns ;
-; 1.482 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.398 ns ; 2.916 ns ;
-; 1.484 ns ; 164.18 MHz ( period = 6.091 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.878 ns ;
-; 1.526 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[24] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CLEAR_FIFO_CNT ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 3.055 ns ; 1.529 ns ;
-; 1.527 ns ; 165.34 MHz ( period = 6.048 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[4] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.835 ns ;
-; 1.540 ns ; 165.70 MHz ( period = 6.035 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[2] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.822 ns ;
-; 1.543 ns ; 165.78 MHz ( period = 6.032 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[2] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.819 ns ;
-; 1.582 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[16] ; Video:Fredi_Aschwanden|lpm_ff0:inst19|lpm_ff:lpm_ff_component|dffs[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.858 ns ; 3.276 ns ;
-; 1.589 ns ; 167.06 MHz ( period = 5.986 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[5] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.773 ns ;
-; 1.598 ns ; 167.31 MHz ( period = 5.977 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[3] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.764 ns ;
-; 1.601 ns ; 167.39 MHz ( period = 5.974 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[3] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.761 ns ;
-; 1.656 ns ; 168.95 MHz ( period = 5.919 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[4] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.706 ns ;
-; 1.676 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[17] ; Video:Fredi_Aschwanden|lpm_ff0:inst18|lpm_ff:lpm_ff_component|dffs[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.850 ns ; 3.174 ns ;
-; 1.677 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[24] ; Video:Fredi_Aschwanden|lpm_ff0:inst18|lpm_ff:lpm_ff_component|dffs[24] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.824 ns ; 3.147 ns ;
-; 1.679 ns ; 169.61 MHz ( period = 5.896 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.379 ns ; 5.700 ns ;
-; 1.680 ns ; 169.64 MHz ( period = 5.895 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.379 ns ; 5.699 ns ;
-; 1.686 ns ; 169.81 MHz ( period = 5.889 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.668 ns ;
-; 1.687 ns ; 169.84 MHz ( period = 5.888 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.667 ns ;
-; 1.714 ns ; 170.62 MHz ( period = 5.861 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[5] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.648 ns ;
-; 1.734 ns ; 171.20 MHz ( period = 5.841 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.379 ns ; 5.645 ns ;
-; 1.737 ns ; 171.29 MHz ( period = 5.838 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.379 ns ; 5.642 ns ;
-; 1.738 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[21] ; Video:Fredi_Aschwanden|lpm_ff0:inst19|lpm_ff:lpm_ff_component|dffs[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.841 ns ; 3.103 ns ;
-; 1.741 ns ; 171.41 MHz ( period = 5.834 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.613 ns ;
-; 1.744 ns ; 171.50 MHz ( period = 5.831 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.610 ns ;
-; 1.746 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[21] ; Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component|dffs[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.841 ns ; 3.095 ns ;
-; 1.747 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[1] ; Video:Fredi_Aschwanden|lpm_ff0:inst19|lpm_ff:lpm_ff_component|dffs[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.865 ns ; 3.118 ns ;
-; 1.750 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[26] ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[26] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.866 ns ; 3.116 ns ;
-; 1.756 ns ; 171.85 MHz ( period = 5.819 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[6] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.362 ns ; 5.606 ns ;
-; 1.760 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[1] ; Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component|dffs[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.865 ns ; 3.105 ns ;
-; 1.779 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[24] ; Video:Fredi_Aschwanden|lpm_ff0:inst19|lpm_ff:lpm_ff_component|dffs[24] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.824 ns ; 3.045 ns ;
-; 1.780 ns ; 172.56 MHz ( period = 5.795 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[4] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.379 ns ; 5.599 ns ;
-; 1.787 ns ; 172.77 MHz ( period = 5.788 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[4] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.567 ns ;
-; 1.792 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[24] ; Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component|dffs[24] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.824 ns ; 3.032 ns ;
-; 1.793 ns ; 172.95 MHz ( period = 5.782 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[2] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.379 ns ; 5.586 ns ;
-; 1.796 ns ; 173.04 MHz ( period = 5.779 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[2] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.379 ns ; 5.583 ns ;
-; 1.800 ns ; 173.16 MHz ( period = 5.775 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[2] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.554 ns ;
-; 1.803 ns ; 173.25 MHz ( period = 5.772 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[2] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.551 ns ;
-; 1.805 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.385 ns ; 2.580 ns ;
-; 1.808 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.385 ns ; 2.577 ns ;
-; 1.812 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[23] ; Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component|dffs[23] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.831 ns ; 3.019 ns ;
-; 1.829 ns ; 174.03 MHz ( period = 5.746 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_REQ ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.525 ns ;
-; 1.830 ns ; 174.06 MHz ( period = 5.745 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_REQ ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.524 ns ;
-; 1.840 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_P[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.399 ns ; 2.559 ns ;
-; 1.842 ns ; 174.43 MHz ( period = 5.733 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[5] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.379 ns ; 5.537 ns ;
-; 1.842 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BA_P[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.399 ns ; 2.557 ns ;
-; 1.842 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[28] ; Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component|dffs[28] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.824 ns ; 2.982 ns ;
-; 1.845 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[31] ; Video:Fredi_Aschwanden|lpm_ff0:inst18|lpm_ff:lpm_ff_component|dffs[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.847 ns ; 3.002 ns ;
-; 1.847 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[23] ; Video:Fredi_Aschwanden|lpm_ff0:inst19|lpm_ff:lpm_ff_component|dffs[23] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.847 ns ; 3.000 ns ;
-; 1.849 ns ; 174.64 MHz ( period = 5.726 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[5] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.505 ns ;
-; 1.851 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 3.955 ns ; 4.398 ns ; 2.547 ns ;
-; 1.851 ns ; 174.70 MHz ( period = 5.724 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[3] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.379 ns ; 5.528 ns ;
-; 1.854 ns ; 174.79 MHz ( period = 5.721 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[3] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.379 ns ; 5.525 ns ;
-; 1.858 ns ; 174.92 MHz ( period = 5.717 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_bwp|dffe21a[3] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.496 ns ;
-; 1.861 ns ; 175.01 MHz ( period = 5.714 ns ) ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_oe9:ws_brp|dffe21a[3] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 7.575 ns ; 7.354 ns ; 5.493 ns ;
-; 1.865 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[16] ; Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component|dffs[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.826 ns ; 2.961 ns ;
-; 1.873 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[17] ; Video:Fredi_Aschwanden|lpm_ff0:inst19|lpm_ff:lpm_ff_component|dffs[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.829 ns ; 2.956 ns ;
-; 1.881 ns ; None ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[17] ; Video:Fredi_Aschwanden|lpm_ff0:inst17|lpm_ff:lpm_ff_component|dffs[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 5.049 ns ; 4.829 ns ; 2.948 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]' ;
-+----------+---------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+----------+---------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; 2.965 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.639 ns ;
-; 2.966 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[25] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[25] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.638 ns ;
-; 2.967 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[29] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[29] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.637 ns ;
-; 2.968 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[28] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[28] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.636 ns ;
-; 3.093 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[20] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.511 ns ;
-; 3.093 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[11] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.511 ns ;
-; 3.093 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[9] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.511 ns ;
-; 3.093 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[16] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.511 ns ;
-; 3.093 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[15] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.511 ns ;
-; 3.093 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[30] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.511 ns ;
-; 3.094 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[14] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.510 ns ;
-; 3.094 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[0] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.510 ns ;
-; 3.094 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[13] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[13] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.510 ns ;
-; 3.094 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.510 ns ;
-; 3.094 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[24] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[24] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.510 ns ;
-; 3.094 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[18] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.510 ns ;
-; 3.094 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[17] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.510 ns ;
-; 3.094 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[31] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.510 ns ;
-; 3.095 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.509 ns ;
-; 3.095 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[10] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.509 ns ;
-; 3.095 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[23] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[23] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.509 ns ;
-; 3.095 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[19] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.509 ns ;
-; 3.095 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[26] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.509 ns ;
-; 3.095 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[22] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.509 ns ;
-; 3.096 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[3] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.508 ns ;
-; 3.096 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.508 ns ;
-; 3.096 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[21] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.508 ns ;
-; 3.097 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.507 ns ;
-; 3.097 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.507 ns ;
-; 3.097 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[12] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.507 ns ;
-; 3.097 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[27] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[27] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.507 ns ;
-; 3.097 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[1] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; 3.788 ns ; 3.604 ns ; 0.507 ns ;
-+----------+---------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]' ;
-+----------+----------------------+---------------------------------------------------+-----------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+----------+----------------------+---------------------------------------------------+-----------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; 5.299 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[3] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; 6.313 ns ; 6.118 ns ; 0.819 ns ;
-; 5.479 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[5] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; 6.313 ns ; 6.116 ns ; 0.637 ns ;
-; 5.480 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[4] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; 6.313 ns ; 6.116 ns ; 0.636 ns ;
-; 5.606 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[7] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; 6.313 ns ; 6.116 ns ; 0.510 ns ;
-; 5.608 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[6] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; 6.313 ns ; 6.116 ns ; 0.508 ns ;
-+----------+----------------------+---------------------------------------------------+-----------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]' ;
-+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; 1.672 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.308 ns ; 3.636 ns ;
-; 1.683 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.304 ns ; 3.621 ns ;
-; 1.703 ns ; 170.30 MHz ( period = 5.872 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.893 ns ; 5.190 ns ;
-; 1.806 ns ; 173.34 MHz ( period = 5.769 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.887 ns ; 5.081 ns ;
-; 1.842 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.327 ns ; 3.485 ns ;
-; 1.881 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.309 ns ; 3.428 ns ;
-; 1.904 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.325 ns ; 3.421 ns ;
-; 1.914 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.309 ns ; 3.395 ns ;
-; 1.923 ns ; 176.93 MHz ( period = 5.652 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.893 ns ; 4.970 ns ;
-; 2.000 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.308 ns ; 3.308 ns ;
-; 2.018 ns ; 179.95 MHz ( period = 5.557 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.883 ns ; 4.865 ns ;
-; 2.034 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.321 ns ; 3.287 ns ;
-; 2.040 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.293 ns ; 3.253 ns ;
-; 2.068 ns ; 181.59 MHz ( period = 5.507 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.887 ns ; 4.819 ns ;
-; 2.105 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.302 ns ; 3.197 ns ;
-; 2.112 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR ; Video:Fredi_Aschwanden|inst90~_Duplicate_2 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 4.735 ns ; 4.488 ns ; 2.376 ns ;
-; 2.131 ns ; 183.69 MHz ( period = 5.444 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.896 ns ; 4.765 ns ;
-; 2.141 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.316 ns ; 3.175 ns ;
-; 2.151 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.307 ns ; 3.156 ns ;
-; 2.155 ns ; 184.50 MHz ( period = 5.420 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.900 ns ; 4.745 ns ;
-; 2.159 ns ; 184.64 MHz ( period = 5.416 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.891 ns ; 4.732 ns ;
-; 2.166 ns ; 184.88 MHz ( period = 5.409 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.878 ns ; 4.712 ns ;
-; 2.178 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.309 ns ; 3.131 ns ;
-; 2.202 ns ; 186.12 MHz ( period = 5.373 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.893 ns ; 4.691 ns ;
-; 2.203 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.312 ns ; 3.109 ns ;
-; 2.207 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.335 ns ; 3.128 ns ;
-; 2.238 ns ; 187.37 MHz ( period = 5.337 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.878 ns ; 4.640 ns ;
-; 2.242 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.317 ns ; 3.075 ns ;
-; 2.260 ns ; 188.15 MHz ( period = 5.315 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.891 ns ; 4.631 ns ;
-; 2.265 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR ; Video:Fredi_Aschwanden|inst90~_Duplicate_1 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 4.735 ns ; 4.428 ns ; 2.163 ns ;
-; 2.273 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR ; Video:Fredi_Aschwanden|inst90~_Duplicate_3 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 4.735 ns ; 4.492 ns ; 2.219 ns ;
-; 2.298 ns ; 189.50 MHz ( period = 5.277 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.901 ns ; 4.603 ns ;
-; 2.325 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.316 ns ; 2.991 ns ;
-; 2.338 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[18]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.383 ns ; 3.045 ns ;
-; 2.357 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.321 ns ; 2.964 ns ;
-; 2.370 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.302 ns ; 2.932 ns ;
-; 2.376 ns ; 192.34 MHz ( period = 5.199 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.883 ns ; 4.507 ns ;
-; 2.385 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.635 ns ; 3.250 ns ;
-; 2.410 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.316 ns ; 2.906 ns ;
-; 2.417 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.307 ns ; 2.890 ns ;
-; 2.434 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.373 ns ; 2.939 ns ;
-; 2.445 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR ; Video:Fredi_Aschwanden|inst90 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 4.735 ns ; 4.495 ns ; 2.050 ns ;
-; 2.447 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.312 ns ; 2.865 ns ;
-; 2.470 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.645 ns ; 3.175 ns ;
-; 2.502 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.652 ns ; 3.150 ns ;
-; 2.509 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.643 ns ; 3.134 ns ;
-; 2.516 ns ; 197.67 MHz ( period = 5.059 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.241 ns ; 4.725 ns ;
-; 2.517 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.308 ns ; 2.791 ns ;
-; 2.520 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.293 ns ; 2.773 ns ;
-; 2.523 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.645 ns ; 3.122 ns ;
-; 2.531 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.639 ns ; 3.108 ns ;
-; 2.548 ns ; 198.93 MHz ( period = 5.027 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.248 ns ; 4.700 ns ;
-; 2.549 ns ; 198.97 MHz ( period = 5.026 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.878 ns ; 4.329 ns ;
-; 2.550 ns ; 199.00 MHz ( period = 5.025 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.901 ns ; 4.351 ns ;
-; 2.550 ns ; 199.00 MHz ( period = 5.025 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.239 ns ; 4.689 ns ;
-; 2.561 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.375 ns ; 2.814 ns ;
-; 2.567 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.290 ns ; 2.723 ns ;
-; 2.569 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.317 ns ; 2.748 ns ;
-; 2.569 ns ; 199.76 MHz ( period = 5.006 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.231 ns ; 4.662 ns ;
-; 2.570 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.375 ns ; 2.805 ns ;
-; 2.571 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.643 ns ; 3.072 ns ;
-; 2.572 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.306 ns ; 2.734 ns ;
-; 2.597 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.316 ns ; 2.719 ns ;
-; 2.603 ns ; 201.13 MHz ( period = 4.972 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.241 ns ; 4.638 ns ;
-; 2.614 ns ; 201.57 MHz ( period = 4.961 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.239 ns ; 4.625 ns ;
-; 2.616 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.377 ns ; 2.761 ns ;
-; 2.622 ns ; 201.90 MHz ( period = 4.953 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.947 ns ; 4.325 ns ;
-; 2.641 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.645 ns ; 3.004 ns ;
-; 2.685 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.330 ns ; 2.645 ns ;
-; 2.690 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.639 ns ; 2.949 ns ;
-; 2.695 ns ; 204.92 MHz ( period = 4.880 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[18]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.949 ns ; 4.254 ns ;
-; 2.697 ns ; 205.00 MHz ( period = 4.878 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.226 ns ; 4.529 ns ;
-; 2.708 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.648 ns ; 2.940 ns ;
-; 2.716 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.312 ns ; 2.596 ns ;
-; 2.717 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.630 ns ; 2.913 ns ;
-; 2.718 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.630 ns ; 2.912 ns ;
-; 2.724 ns ; 206.14 MHz ( period = 4.851 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.241 ns ; 4.517 ns ;
-; 2.733 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.356 ns ; 2.623 ns ;
-; 2.734 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.645 ns ; 2.911 ns ;
-; 2.734 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.381 ns ; 2.647 ns ;
-; 2.734 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 4.735 ns ; 4.559 ns ; 1.825 ns ;
-; 2.751 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.377 ns ; 2.626 ns ;
-; 2.758 ns ; 207.60 MHz ( period = 4.817 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.244 ns ; 4.486 ns ;
-; 2.761 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.635 ns ; 2.874 ns ;
-; 2.761 ns ; 207.73 MHz ( period = 4.814 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.949 ns ; 4.188 ns ;
-; 2.764 ns ; 207.86 MHz ( period = 4.811 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.949 ns ; 4.185 ns ;
-; 2.768 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.652 ns ; 2.884 ns ;
-; 2.771 ns ; 208.16 MHz ( period = 4.804 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.235 ns ; 4.464 ns ;
-; 2.776 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.643 ns ; 2.867 ns ;
-; 2.778 ns ; 208.46 MHz ( period = 4.797 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.948 ns ; 4.170 ns ;
-; 2.780 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.635 ns ; 2.855 ns ;
-; 2.793 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.645 ns ; 2.852 ns ;
-; 2.793 ns ; 209.12 MHz ( period = 4.782 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.226 ns ; 4.433 ns ;
-; 2.797 ns ; 209.29 MHz ( period = 4.778 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.226 ns ; 4.429 ns ;
-; 2.798 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.378 ns ; 2.580 ns ;
-; 2.807 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[31] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.779 ns ; 2.972 ns ;
-; 2.808 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.374 ns ; 2.566 ns ;
-; 2.815 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[31] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.373 ns ; 2.558 ns ;
-; 2.821 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.639 ns ; 2.818 ns ;
-; 2.838 ns ; 211.10 MHz ( period = 4.737 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.231 ns ; 4.393 ns ;
-; 2.839 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.643 ns ; 2.804 ns ;
-; 2.846 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.293 ns ; 2.447 ns ;
-; 2.851 ns ; None ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[3]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.997 ns ; 5.334 ns ; 2.483 ns ;
-; 2.862 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.316 ns ; 2.454 ns ;
-; 2.909 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.645 ns ; 2.736 ns ;
-; 2.935 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.358 ns ; 2.423 ns ;
-; 2.937 ns ; 215.61 MHz ( period = 4.638 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.943 ns ; 4.006 ns ;
-; 2.951 ns ; 216.26 MHz ( period = 4.624 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.949 ns ; 3.998 ns ;
-; 2.954 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.639 ns ; 2.685 ns ;
-; 2.960 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.655 ns ; 2.695 ns ;
-; 2.963 ns ; 216.83 MHz ( period = 4.612 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.943 ns ; 3.980 ns ;
-; 2.969 ns ; 217.11 MHz ( period = 4.606 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.947 ns ; 3.978 ns ;
-; 2.977 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.648 ns ; 2.671 ns ;
-; 2.983 ns ; 217.77 MHz ( period = 4.592 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.235 ns ; 4.252 ns ;
-; 2.984 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.630 ns ; 2.646 ns ;
-; 2.985 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.630 ns ; 2.645 ns ;
-; 2.988 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.779 ns ; 2.791 ns ;
-; 3.004 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.362 ns ; 2.358 ns ;
-; 3.005 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[18]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.364 ns ; 2.359 ns ;
-; 3.010 ns ; 219.06 MHz ( period = 4.565 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.292 ns ; 4.282 ns ;
-; 3.018 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.653 ns ; 2.635 ns ;
-; 3.027 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.635 ns ; 2.608 ns ;
-; 3.042 ns ; 220.60 MHz ( period = 4.533 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.294 ns ; 4.252 ns ;
-; 3.047 ns ; None ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[1]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.997 ns ; 5.729 ns ; 2.682 ns ;
-; 3.051 ns ; 221.04 MHz ( period = 4.524 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.249 ns ; 4.198 ns ;
-; 3.058 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[31] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.354 ns ; 2.296 ns ;
-; 3.061 ns ; 221.53 MHz ( period = 4.514 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.249 ns ; 4.188 ns ;
-; 3.074 ns ; 222.17 MHz ( period = 4.501 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.946 ns ; 3.872 ns ;
-; 3.096 ns ; 223.26 MHz ( period = 4.479 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.947 ns ; 3.851 ns ;
-; 3.115 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.361 ns ; 2.246 ns ;
-; 3.127 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.361 ns ; 2.234 ns ;
-; 3.131 ns ; 225.02 MHz ( period = 4.444 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.943 ns ; 3.812 ns ;
-; 3.141 ns ; None ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[2]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.997 ns ; 5.325 ns ; 2.184 ns ;
-; 3.143 ns ; 225.63 MHz ( period = 4.432 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.295 ns ; 4.152 ns ;
-; 3.151 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.630 ns ; 2.479 ns ;
-; 3.158 ns ; 226.40 MHz ( period = 4.417 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.292 ns ; 4.134 ns ;
-; 3.159 ns ; 226.45 MHz ( period = 4.416 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.291 ns ; 4.132 ns ;
-; 3.162 ns ; 226.60 MHz ( period = 4.413 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.295 ns ; 4.133 ns ;
-; 3.163 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.780 ns ; 2.617 ns ;
-; 3.173 ns ; None ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[3]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.997 ns ; 5.680 ns ; 2.507 ns ;
-; 3.181 ns ; 227.58 MHz ( period = 4.394 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.944 ns ; 3.763 ns ;
-; 3.192 ns ; 228.15 MHz ( period = 4.383 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.947 ns ; 3.755 ns ;
-; 3.199 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.630 ns ; 2.431 ns ;
-; 3.207 ns ; None ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[2]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.997 ns ; 5.671 ns ; 2.464 ns ;
-; 3.208 ns ; 228.99 MHz ( period = 4.367 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.946 ns ; 3.738 ns ;
-; 3.209 ns ; 229.04 MHz ( period = 4.366 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 6.944 ns ; 3.735 ns ;
-; 3.225 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.695 ns ; 2.470 ns ;
-; 3.226 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.655 ns ; 2.429 ns ;
-; 3.233 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.359 ns ; 2.126 ns ;
-; 3.236 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.361 ns ; 2.125 ns ;
-; 3.251 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.358 ns ; 2.107 ns ;
-; 3.253 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.355 ns ; 2.102 ns ;
-; 3.261 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.358 ns ; 2.097 ns ;
-; 3.262 ns ; 231.86 MHz ( period = 4.313 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.297 ns ; 4.035 ns ;
-; 3.263 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.363 ns ; 2.100 ns ;
-; 3.266 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.363 ns ; 2.097 ns ;
-; 3.271 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.362 ns ; 2.091 ns ;
-; 3.277 ns ; 232.67 MHz ( period = 4.298 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.291 ns ; 4.014 ns ;
-; 3.279 ns ; 232.77 MHz ( period = 4.296 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.291 ns ; 4.012 ns ;
-; 3.282 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.653 ns ; 2.371 ns ;
-; 3.307 ns ; None ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[1]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.997 ns ; 5.383 ns ; 2.076 ns ;
-; 3.346 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.698 ns ; 2.352 ns ;
-; 3.351 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.695 ns ; 2.344 ns ;
-; 3.365 ns ; 237.53 MHz ( period = 4.210 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.296 ns ; 3.931 ns ;
-; 3.387 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.361 ns ; 1.974 ns ;
-; 3.390 ns ; 238.95 MHz ( period = 4.185 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.294 ns ; 3.904 ns ;
-; 3.410 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.362 ns ; 1.952 ns ;
-; 3.415 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.698 ns ; 2.283 ns ;
-; 3.429 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.358 ns ; 1.929 ns ;
-; 3.438 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.375 ns ; 1.937 ns ;
-; 3.450 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.700 ns ; 2.250 ns ;
-; 3.458 ns ; 242.90 MHz ( period = 4.117 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.295 ns ; 3.837 ns ;
-; 3.459 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.698 ns ; 2.239 ns ;
-; 3.461 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.781 ns ; 2.320 ns ;
-; 3.474 ns ; None ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[0]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.997 ns ; 5.380 ns ; 1.906 ns ;
-; 3.477 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.359 ns ; 1.882 ns ;
-; 3.492 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.695 ns ; 2.203 ns ;
-; 3.495 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.700 ns ; 2.205 ns ;
-; 3.499 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.359 ns ; 1.860 ns ;
-; 3.504 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.361 ns ; 1.857 ns ;
-; 3.558 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.699 ns ; 2.141 ns ;
-; 3.575 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.697 ns ; 2.122 ns ;
-; 3.602 ns ; 251.70 MHz ( period = 3.973 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.295 ns ; 3.693 ns ;
-; 3.610 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.699 ns ; 2.089 ns ;
-; 3.614 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.698 ns ; 2.084 ns ;
-; 3.616 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.701 ns ; 2.085 ns ;
-; 3.617 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.696 ns ; 2.079 ns ;
-; 3.620 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.697 ns ; 2.077 ns ;
-; 3.625 ns ; 253.16 MHz ( period = 3.950 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.297 ns ; 3.672 ns ;
-; 3.640 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.699 ns ; 2.059 ns ;
-; 3.649 ns ; None ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[0]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.997 ns ; 5.726 ns ; 2.077 ns ;
-; 3.657 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.699 ns ; 2.042 ns ;
-; 3.663 ns ; 255.62 MHz ( period = 3.912 ns ) ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 7.575 ns ; 7.297 ns ; 3.634 ns ;
-; 3.664 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.696 ns ; 2.032 ns ;
-; 3.673 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.703 ns ; 2.030 ns ;
-; 3.675 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[31] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.699 ns ; 2.024 ns ;
-; 3.708 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[18]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.702 ns ; 1.994 ns ;
-; 3.720 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.703 ns ; 1.983 ns ;
-; 3.738 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.697 ns ; 1.959 ns ;
-; 3.825 ns ; None ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 5.999 ns ; 5.699 ns ; 1.874 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]' ;
-+-----------------------------------------+-----------------------------------------------------+------------------------------------------------+------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------+------------------------------------------------+------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; -1.712 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 1.118 ns ; 2.830 ns ;
-; -1.664 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[27] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.992 ns ; 2.656 ns ;
-; -1.597 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[26] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.992 ns ; 2.589 ns ;
-; -1.597 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[25] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.992 ns ; 2.589 ns ;
-; -1.358 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.985 ns ; 2.343 ns ;
-; -1.358 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[24] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.985 ns ; 2.343 ns ;
-; -1.358 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.985 ns ; 2.343 ns ;
-; -1.358 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.985 ns ; 2.343 ns ;
-; -1.354 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.987 ns ; 2.341 ns ;
-; -1.354 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.987 ns ; 2.341 ns ;
-; -1.354 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[23] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.987 ns ; 2.341 ns ;
-; -1.333 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.986 ns ; 2.319 ns ;
-; -1.333 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.986 ns ; 2.319 ns ;
-; -1.280 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.986 ns ; 2.266 ns ;
-; -1.280 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.986 ns ; 2.266 ns ;
-; -1.280 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[14] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.986 ns ; 2.266 ns ;
-; -1.280 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[13] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.986 ns ; 2.266 ns ;
-; -1.278 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.986 ns ; 2.264 ns ;
-; -1.278 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.986 ns ; 2.264 ns ;
-; -1.250 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.988 ns ; 2.238 ns ;
-; -1.250 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.988 ns ; 2.238 ns ;
-; -1.250 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.988 ns ; 2.238 ns ;
-; -1.250 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.988 ns ; 2.238 ns ;
-; -1.248 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.989 ns ; 2.237 ns ;
-; -1.243 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.989 ns ; 2.232 ns ;
-; -1.228 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.988 ns ; 2.216 ns ;
-; -1.228 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.988 ns ; 2.216 ns ;
-; -1.228 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.988 ns ; 2.216 ns ;
-; -1.228 ns ; None ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 1.576 ns ; 0.988 ns ; 2.216 ns ;
-; 4.485 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 6.311 ns ; 6.117 ns ; 1.632 ns ;
-; 6.612 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.393 ns ; 3.781 ns ;
-; 6.644 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.392 ns ; 3.748 ns ;
-; 6.644 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.392 ns ; 3.748 ns ;
-; 6.644 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.392 ns ; 3.748 ns ;
-; 6.644 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.392 ns ; 3.748 ns ;
-; 6.644 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.392 ns ; 3.748 ns ;
-; 6.665 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.873 ns ;
-; 6.665 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.873 ns ;
-; 6.665 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.873 ns ;
-; 6.672 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.527 ns ; 3.855 ns ;
-; 6.672 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.527 ns ; 3.855 ns ;
-; 6.672 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.527 ns ; 3.855 ns ;
-; 6.672 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.527 ns ; 3.855 ns ;
-; 6.672 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.527 ns ; 3.855 ns ;
-; 6.672 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.527 ns ; 3.855 ns ;
-; 6.672 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.527 ns ; 3.855 ns ;
-; 6.685 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.537 ns ; 3.852 ns ;
-; 6.685 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.537 ns ; 3.852 ns ;
-; 6.685 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.537 ns ; 3.852 ns ;
-; 6.727 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.811 ns ;
-; 6.727 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.811 ns ;
-; 6.727 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.811 ns ;
-; 6.727 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.811 ns ;
-; 6.727 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.811 ns ;
-; 6.727 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.811 ns ;
-; 6.788 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.234 ns ; 3.446 ns ;
-; 6.788 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.234 ns ; 3.446 ns ;
-; 6.788 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.234 ns ; 3.446 ns ;
-; 6.788 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.234 ns ; 3.446 ns ;
-; 6.826 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.568 ns ;
-; 6.826 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.568 ns ;
-; 6.826 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.568 ns ;
-; 6.826 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.568 ns ;
-; 6.826 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.568 ns ;
-; 6.826 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.568 ns ;
-; 6.843 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.545 ns ; 3.702 ns ;
-; 6.845 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.549 ns ;
-; 6.845 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.549 ns ;
-; 6.845 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.549 ns ;
-; 6.845 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.549 ns ;
-; 6.845 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.549 ns ;
-; 6.845 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.549 ns ;
-; 6.845 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.549 ns ;
-; 6.845 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.549 ns ;
-; 6.849 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.545 ns ;
-; 6.849 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.545 ns ;
-; 6.849 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.545 ns ;
-; 6.849 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.545 ns ;
-; 6.849 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.545 ns ;
-; 6.849 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.545 ns ;
-; 6.849 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.545 ns ;
-; 6.849 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.394 ns ; 3.545 ns ;
-; 6.955 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.564 ns ;
-; 6.955 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.564 ns ;
-; 6.955 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.564 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 6.969 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.519 ns ; 3.550 ns ;
-; 7.011 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.390 ns ; 3.379 ns ;
-; 7.016 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.546 ns ; 3.530 ns ;
-; 7.016 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.546 ns ; 3.530 ns ;
-; 7.016 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.546 ns ; 3.530 ns ;
-; 7.016 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.546 ns ; 3.530 ns ;
-; 7.074 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.537 ns ; 3.463 ns ;
-; 7.074 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.537 ns ; 3.463 ns ;
-; 7.074 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.537 ns ; 3.463 ns ;
-; 7.111 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.514 ns ; 3.403 ns ;
-; 7.123 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.364 ns ; 3.241 ns ;
-; 7.123 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.364 ns ; 3.241 ns ;
-; 7.123 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.364 ns ; 3.241 ns ;
-; 7.147 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.656 ns ; 3.509 ns ;
-; 7.147 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.656 ns ; 3.509 ns ;
-; 7.147 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.656 ns ; 3.509 ns ;
-; 7.147 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.656 ns ; 3.509 ns ;
-; 7.147 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.656 ns ; 3.509 ns ;
-; 7.147 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.656 ns ; 3.509 ns ;
-; 7.184 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.391 ns ; 3.207 ns ;
-; 7.184 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.391 ns ; 3.207 ns ;
-; 7.184 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.391 ns ; 3.207 ns ;
-; 7.184 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.391 ns ; 3.207 ns ;
-; 7.242 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.382 ns ; 3.140 ns ;
-; 7.242 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.382 ns ; 3.140 ns ;
-; 7.242 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.382 ns ; 3.140 ns ;
-; 7.264 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.548 ns ; 3.284 ns ;
-; 7.286 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.252 ns ;
-; 7.286 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.252 ns ;
-; 7.286 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.252 ns ;
-; 7.286 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.252 ns ;
-; 7.286 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.252 ns ;
-; 7.286 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.252 ns ;
-; 7.286 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.252 ns ;
-; 7.286 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.252 ns ;
-; 7.286 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.252 ns ;
-; 7.296 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.251 ns ;
-; 7.296 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.251 ns ;
-; 7.296 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.251 ns ;
-; 7.296 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.251 ns ;
-; 7.296 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.251 ns ;
-; 7.297 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.361 ns ;
-; 7.297 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.361 ns ;
-; 7.297 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.361 ns ;
-; 7.297 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.361 ns ;
-; 7.297 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.361 ns ;
-; 7.297 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.361 ns ;
-; 7.297 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.361 ns ;
-; 7.297 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.361 ns ;
-; 7.298 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.249 ns ;
-; 7.298 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.249 ns ;
-; 7.298 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.249 ns ;
-; 7.298 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.249 ns ;
-; 7.298 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.249 ns ;
-; 7.298 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.547 ns ; 3.249 ns ;
-; 7.323 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.539 ns ; 3.216 ns ;
-; 7.323 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.539 ns ; 3.216 ns ;
-; 7.323 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.539 ns ; 3.216 ns ;
-; 7.334 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.324 ns ;
-; 7.334 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.324 ns ;
-; 7.334 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.324 ns ;
-; 7.334 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.324 ns ;
-; 7.334 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.324 ns ;
-; 7.334 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.324 ns ;
-; 7.334 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.324 ns ;
-; 7.334 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.324 ns ;
-; 7.380 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.278 ns ;
-; 7.380 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.278 ns ;
-; 7.380 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.278 ns ;
-; 7.380 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.278 ns ;
-; 7.380 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.278 ns ;
-; 7.380 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.278 ns ;
-; 7.380 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.278 ns ;
-; 7.380 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.278 ns ;
-; 7.380 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.278 ns ;
-; 7.380 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.658 ns ; 3.278 ns ;
-; 7.411 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.127 ns ;
-; 7.411 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.127 ns ;
-; 7.411 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.127 ns ;
-; 7.411 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.127 ns ;
-; 7.411 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.127 ns ;
-; 7.411 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.127 ns ;
-; 7.411 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.127 ns ;
-; 7.411 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.127 ns ;
-; 7.411 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.538 ns ; 3.127 ns ;
-; 7.440 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.389 ns ; 2.949 ns ;
-; 7.440 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.389 ns ; 2.949 ns ;
-; 7.440 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.389 ns ; 2.949 ns ;
-; 7.440 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.389 ns ; 2.949 ns ;
-; 7.448 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.549 ns ; 3.101 ns ;
-; 7.448 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.549 ns ; 3.101 ns ;
-; 7.448 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.549 ns ; 3.101 ns ;
-; 7.448 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.549 ns ; 3.101 ns ;
-; 7.448 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.549 ns ; 3.101 ns ;
-; 7.448 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.549 ns ; 3.101 ns ;
-; 7.448 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.549 ns ; 3.101 ns ;
-; 7.448 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.549 ns ; 3.101 ns ;
-; 7.454 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.383 ns ; 2.929 ns ;
-; 7.454 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.383 ns ; 2.929 ns ;
-; 7.454 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.383 ns ; 2.929 ns ;
-; 7.454 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.383 ns ; 2.929 ns ;
-; 7.454 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.383 ns ; 2.929 ns ;
-; 7.454 ns ; None ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 10.267 ns ; 10.383 ns ; 2.929 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+------------------------------------------------+------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]' ;
-+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-; -4.294 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.607 ns ; 3.687 ns ;
-; -4.252 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[95] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.600 ns ; 3.652 ns ;
-; -4.247 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[107] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.642 ns ;
-; -4.241 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[90] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.594 ns ; 3.647 ns ;
-; -4.232 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[33] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.597 ns ; 3.635 ns ;
-; -4.228 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[49] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.597 ns ; 3.631 ns ;
-; -4.220 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[34] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.607 ns ; 3.613 ns ;
-; -4.212 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[99] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.610 ns ;
-; -4.205 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[57] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.597 ns ; 3.608 ns ;
-; -4.158 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.260 ns ; 3.898 ns ;
-; -4.119 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 4.141 ns ;
-; -4.119 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[42] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.517 ns ;
-; -4.092 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 4.114 ns ;
-; -4.088 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[111] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.486 ns ;
-; -4.086 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[84] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.595 ns ; 3.491 ns ;
-; -4.085 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[88] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.593 ns ; 3.492 ns ;
-; -4.073 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[85] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.468 ns ;
-; -4.070 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[60] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.465 ns ;
-; -4.070 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[48] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.466 ns ;
-; -4.065 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[50] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.461 ns ;
-; -4.060 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[97] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.458 ns ;
-; -4.057 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[23] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.455 ns ;
-; -4.051 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[83] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.447 ns ;
-; -4.049 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[28] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.447 ns ;
-; -4.049 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[20] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.447 ns ;
-; -4.049 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[41] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.445 ns ;
-; -4.048 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.020 ns ; 4.068 ns ;
-; -4.046 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[108] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.444 ns ;
-; -4.045 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[78] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.441 ns ;
-; -4.045 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[59] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.441 ns ;
-; -4.043 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[43] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.441 ns ;
-; -4.042 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.021 ns ; 4.063 ns ;
-; -4.042 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.440 ns ;
-; -4.040 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[72] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.436 ns ;
-; -4.039 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[70] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.434 ns ;
-; -4.039 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[81] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.435 ns ;
-; -4.036 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[38] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.431 ns ;
-; -4.035 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[112] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.433 ns ;
-; -4.032 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[75] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.428 ns ;
-; -4.032 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[82] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.428 ns ;
-; -4.030 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[4] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe27 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.610 ns ; 3.420 ns ;
-; -4.027 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[46] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.601 ns ; 3.426 ns ;
-; -3.997 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[92] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.595 ns ; 3.402 ns ;
-; -3.995 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[17] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.598 ns ; 3.397 ns ;
-; -3.987 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.021 ns ; 4.008 ns ;
-; -3.985 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.260 ns ; 3.725 ns ;
-; -3.984 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[37] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.379 ns ;
-; -3.980 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 4.002 ns ;
-; -3.978 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[80] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.376 ns ;
-; -3.977 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[45] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.603 ns ; 3.374 ns ;
-; -3.976 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[124] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.374 ns ;
-; -3.973 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[104] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.601 ns ; 3.372 ns ;
-; -3.972 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[91] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.370 ns ;
-; -3.972 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[30] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.601 ns ; 3.371 ns ;
-; -3.969 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[58] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.365 ns ;
-; -3.968 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[15] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.366 ns ;
-; -3.968 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.364 ns ;
-; -3.967 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[47] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.363 ns ;
-; -3.958 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[96] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.356 ns ;
-; -3.957 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[10] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.355 ns ;
-; -3.956 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.354 ns ;
-; -3.952 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[69] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.347 ns ;
-; -3.950 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.972 ns ;
-; -3.948 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.970 ns ;
-; -3.948 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[54] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.343 ns ;
-; -3.948 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[68] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.346 ns ;
-; -3.948 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[113] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.346 ns ;
-; -3.947 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[110] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.345 ns ;
-; -3.947 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[106] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.345 ns ;
-; -3.946 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[13] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.344 ns ;
-; -3.945 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[22] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.343 ns ;
-; -3.943 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[116] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.341 ns ;
-; -3.943 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[127] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.341 ns ;
-; -3.941 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[125] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.339 ns ;
-; -3.941 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[12] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.339 ns ;
-; -3.938 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.960 ns ;
-; -3.938 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[51] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.334 ns ;
-; -3.937 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[61] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.332 ns ;
-; -3.935 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[122] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.333 ns ;
-; -3.935 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[98] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.333 ns ;
-; -3.934 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[86] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.329 ns ;
-; -3.934 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[40] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.330 ns ;
-; -3.932 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[109] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.330 ns ;
-; -3.932 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[118] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.327 ns ;
-; -3.930 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[65] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.328 ns ;
-; -3.927 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.325 ns ;
-; -3.926 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[105] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.324 ns ;
-; -3.925 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[31] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.323 ns ;
-; -3.924 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[53] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.319 ns ;
-; -3.922 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.944 ns ;
-; -3.920 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.316 ns ;
-; -3.915 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[55] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.310 ns ;
-; -3.909 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.020 ns ; 3.929 ns ;
-; -3.908 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.020 ns ; 3.928 ns ;
-; -3.898 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.021 ns ; 3.919 ns ;
-; -3.896 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.292 ns ;
-; -3.894 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.916 ns ;
-; -3.882 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.904 ns ;
-; -3.878 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.021 ns ; 3.899 ns ;
-; -3.874 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.260 ns ; 3.614 ns ;
-; -3.873 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[26] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.269 ns ;
-; -3.869 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[7] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe33 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.612 ns ; 3.257 ns ;
-; -3.867 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.020 ns ; 3.887 ns ;
-; -3.867 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.303 ns ; 3.564 ns ;
-; -3.858 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[5] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe29 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.610 ns ; 3.248 ns ;
-; -3.854 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.876 ns ;
-; -3.851 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.260 ns ; 3.591 ns ;
-; -3.835 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.020 ns ; 3.855 ns ;
-; -3.833 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.282 ns ; 3.551 ns ;
-; -3.828 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[2] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.850 ns ;
-; -3.827 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.020 ns ; 3.847 ns ;
-; -3.822 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.282 ns ; 3.540 ns ;
-; -3.821 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe15 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.291 ns ; 3.530 ns ;
-; -3.819 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.303 ns ; 3.516 ns ;
-; -3.818 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[89] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.216 ns ;
-; -3.817 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.021 ns ; 3.838 ns ;
-; -3.816 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.211 ns ;
-; -3.814 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[87] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.212 ns ;
-; -3.814 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[100] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.212 ns ;
-; -3.814 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[71] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.212 ns ;
-; -3.813 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[39] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.211 ns ;
-; -3.812 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[121] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.210 ns ;
-; -3.812 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.208 ns ;
-; -3.812 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.208 ns ;
-; -3.809 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[123] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.204 ns ;
-; -3.809 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[120] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.205 ns ;
-; -3.807 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[126] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.205 ns ;
-; -3.806 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[114] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.202 ns ;
-; -3.804 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[117] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.199 ns ;
-; -3.803 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[2] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe23 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.612 ns ; 3.191 ns ;
-; -3.792 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[74] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.190 ns ;
-; -3.792 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[44] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.190 ns ;
-; -3.792 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[1] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe22 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.295 ns ; 3.497 ns ;
-; -3.788 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[64] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.186 ns ;
-; -3.787 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.282 ns ; 3.505 ns ;
-; -3.783 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[7] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe17 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.612 ns ; 3.171 ns ;
-; -3.781 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.176 ns ;
-; -3.780 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.802 ns ;
-; -3.779 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.260 ns ; 3.519 ns ;
-; -3.777 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[4] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe43 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.615 ns ; 3.162 ns ;
-; -3.777 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.282 ns ; 3.495 ns ;
-; -3.776 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[2] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.020 ns ; 3.796 ns ;
-; -3.771 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.793 ns ;
-; -3.767 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.260 ns ; 3.507 ns ;
-; -3.762 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.282 ns ; 3.480 ns ;
-; -3.757 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.779 ns ;
-; -3.748 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.015 ns ; 3.763 ns ;
-; -3.747 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe13 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.291 ns ; 3.456 ns ;
-; -3.747 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.015 ns ; 3.762 ns ;
-; -3.743 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.014 ns ; 3.757 ns ;
-; -3.728 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe49 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.292 ns ; 3.436 ns ;
-; -3.724 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.282 ns ; 3.442 ns ;
-; -3.724 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.282 ns ; 3.442 ns ;
-; -3.720 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.013 ns ; 3.733 ns ;
-; -3.717 ns ; None ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[110] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe26 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.294 ns ; 3.423 ns ;
-; -3.713 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[5] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe45 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.617 ns ; 3.096 ns ;
-; -3.713 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[4] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe11 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.622 ns ; 3.091 ns ;
-; -3.713 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.021 ns ; 3.734 ns ;
-; -3.703 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe47 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.292 ns ; 3.411 ns ;
-; -3.698 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.260 ns ; 3.438 ns ;
-; -3.695 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[79] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.093 ns ;
-; -3.694 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[32] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.092 ns ;
-; -3.693 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[73] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.091 ns ;
-; -3.693 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[119] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.091 ns ;
-; -3.693 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[24] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.089 ns ;
-; -3.691 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[77] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.089 ns ;
-; -3.691 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[63] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.089 ns ;
-; -3.691 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[36] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.089 ns ;
-; -3.690 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[93] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.088 ns ;
-; -3.690 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[115] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.085 ns ;
-; -3.688 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[56] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.084 ns ;
-; -3.685 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[102] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.080 ns ;
-; -3.685 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.282 ns ; 3.403 ns ;
-; -3.684 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[18] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.080 ns ;
-; -3.683 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.020 ns ; 3.703 ns ;
-; -3.679 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.260 ns ; 3.419 ns ;
-; -3.677 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[76] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.075 ns ;
-; -3.677 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.022 ns ; 3.699 ns ;
-; -3.675 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[62] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.073 ns ;
-; -3.674 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.282 ns ; 3.392 ns ;
-; -3.672 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[52] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.070 ns ;
-; -3.670 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[66] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.068 ns ;
-; -3.668 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe41 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.617 ns ; 3.051 ns ;
-; -3.668 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe43 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.289 ns ; 3.379 ns ;
-; -3.667 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[103] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.602 ns ; 3.065 ns ;
-; -3.665 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[16] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.061 ns ;
-; -3.665 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.061 ns ;
-; -3.664 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[94] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.060 ns ;
-; -3.664 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[29] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.059 ns ;
-; -3.664 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.059 ns ;
-; -3.664 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.060 ns ;
-; -3.663 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[19] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.058 ns ;
-; -3.663 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[25] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.604 ns ; 3.059 ns ;
-; -3.662 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[27] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.057 ns ;
-; -3.661 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[21] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.056 ns ;
-; -3.660 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[101] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.605 ns ; 3.055 ns ;
-; -3.651 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.282 ns ; 3.369 ns ;
-; -3.649 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe25 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.612 ns ; 3.037 ns ;
-; -3.645 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; 0.021 ns ; 3.666 ns ;
-; -3.633 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe9 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.272 ns ; -0.614 ns ; 3.019 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'CLK33M' ;
-+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+----------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+----------+-----------------------------+---------------------------+-------------------------+
-; -5.966 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.279 ns ; 3.687 ns ;
-; -5.924 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[95] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.272 ns ; 3.652 ns ;
-; -5.919 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[107] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.642 ns ;
-; -5.913 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[90] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.266 ns ; 3.647 ns ;
-; -5.904 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[33] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.269 ns ; 3.635 ns ;
-; -5.900 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[49] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.269 ns ; 3.631 ns ;
-; -5.892 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[34] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.279 ns ; 3.613 ns ;
-; -5.884 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[99] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.610 ns ;
-; -5.877 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[57] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.269 ns ; 3.608 ns ;
-; -5.830 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.932 ns ; 3.898 ns ;
-; -5.791 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 4.141 ns ;
-; -5.791 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[42] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.517 ns ;
-; -5.764 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 4.114 ns ;
-; -5.760 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[111] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.486 ns ;
-; -5.758 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[84] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.267 ns ; 3.491 ns ;
-; -5.757 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[88] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.265 ns ; 3.492 ns ;
-; -5.745 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[85] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.468 ns ;
-; -5.742 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[60] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.465 ns ;
-; -5.742 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[48] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.466 ns ;
-; -5.737 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[50] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.461 ns ;
-; -5.732 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[97] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.458 ns ;
-; -5.729 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[23] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.455 ns ;
-; -5.723 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[83] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.447 ns ;
-; -5.721 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[28] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.447 ns ;
-; -5.721 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[20] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.447 ns ;
-; -5.721 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[41] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.445 ns ;
-; -5.720 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.652 ns ; 4.068 ns ;
-; -5.718 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[108] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.444 ns ;
-; -5.717 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[78] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.441 ns ;
-; -5.717 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[59] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.441 ns ;
-; -5.715 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[43] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.441 ns ;
-; -5.714 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.651 ns ; 4.063 ns ;
-; -5.714 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.440 ns ;
-; -5.712 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[72] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.436 ns ;
-; -5.711 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[70] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.434 ns ;
-; -5.711 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[81] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.435 ns ;
-; -5.708 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[38] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.431 ns ;
-; -5.707 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[112] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.433 ns ;
-; -5.704 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[75] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.428 ns ;
-; -5.704 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[82] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.428 ns ;
-; -5.702 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[4] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe27 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.282 ns ; 3.420 ns ;
-; -5.699 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[46] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.273 ns ; 3.426 ns ;
-; -5.669 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[92] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.267 ns ; 3.402 ns ;
-; -5.667 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[17] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.270 ns ; 3.397 ns ;
-; -5.659 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.651 ns ; 4.008 ns ;
-; -5.657 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.932 ns ; 3.725 ns ;
-; -5.656 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[37] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.379 ns ;
-; -5.652 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 4.002 ns ;
-; -5.650 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[80] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.376 ns ;
-; -5.649 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[45] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.275 ns ; 3.374 ns ;
-; -5.648 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[124] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.374 ns ;
-; -5.645 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[104] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.273 ns ; 3.372 ns ;
-; -5.644 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[91] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.370 ns ;
-; -5.644 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[30] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.273 ns ; 3.371 ns ;
-; -5.641 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[58] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.365 ns ;
-; -5.640 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[15] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.366 ns ;
-; -5.640 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.364 ns ;
-; -5.639 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[47] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.363 ns ;
-; -5.630 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[96] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.356 ns ;
-; -5.629 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[10] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.355 ns ;
-; -5.628 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.354 ns ;
-; -5.624 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[69] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.347 ns ;
-; -5.622 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.972 ns ;
-; -5.620 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.970 ns ;
-; -5.620 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[54] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.343 ns ;
-; -5.620 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[68] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.346 ns ;
-; -5.620 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[113] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.346 ns ;
-; -5.619 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[110] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.345 ns ;
-; -5.619 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[106] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.345 ns ;
-; -5.618 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[13] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.344 ns ;
-; -5.617 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[22] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.343 ns ;
-; -5.615 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[116] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.341 ns ;
-; -5.615 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[127] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.341 ns ;
-; -5.613 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[125] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.339 ns ;
-; -5.613 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[12] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.339 ns ;
-; -5.610 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.960 ns ;
-; -5.610 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[51] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.334 ns ;
-; -5.609 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[61] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.332 ns ;
-; -5.607 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[122] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.333 ns ;
-; -5.607 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[98] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.333 ns ;
-; -5.606 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[86] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.329 ns ;
-; -5.606 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[40] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.330 ns ;
-; -5.604 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[109] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.330 ns ;
-; -5.604 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[118] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.327 ns ;
-; -5.602 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[65] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.328 ns ;
-; -5.599 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.325 ns ;
-; -5.598 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[105] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.324 ns ;
-; -5.597 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[31] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.323 ns ;
-; -5.596 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[53] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.319 ns ;
-; -5.594 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.944 ns ;
-; -5.592 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.316 ns ;
-; -5.587 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[55] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.310 ns ;
-; -5.581 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.652 ns ; 3.929 ns ;
-; -5.580 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.652 ns ; 3.928 ns ;
-; -5.570 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.651 ns ; 3.919 ns ;
-; -5.568 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.292 ns ;
-; -5.566 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.916 ns ;
-; -5.554 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.904 ns ;
-; -5.550 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.651 ns ; 3.899 ns ;
-; -5.546 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.932 ns ; 3.614 ns ;
-; -5.545 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[26] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.269 ns ;
-; -5.541 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[7] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe33 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.284 ns ; 3.257 ns ;
-; -5.539 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.652 ns ; 3.887 ns ;
-; -5.539 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.975 ns ; 3.564 ns ;
-; -5.530 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[5] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe29 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.282 ns ; 3.248 ns ;
-; -5.526 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.876 ns ;
-; -5.523 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.932 ns ; 3.591 ns ;
-; -5.507 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.652 ns ; 3.855 ns ;
-; -5.505 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.954 ns ; 3.551 ns ;
-; -5.500 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[2] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.850 ns ;
-; -5.499 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.652 ns ; 3.847 ns ;
-; -5.494 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.954 ns ; 3.540 ns ;
-; -5.493 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe15 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.963 ns ; 3.530 ns ;
-; -5.491 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.975 ns ; 3.516 ns ;
-; -5.490 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[89] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.216 ns ;
-; -5.489 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.651 ns ; 3.838 ns ;
-; -5.488 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.211 ns ;
-; -5.486 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[87] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.212 ns ;
-; -5.486 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[100] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.212 ns ;
-; -5.486 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[71] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.212 ns ;
-; -5.485 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[39] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.211 ns ;
-; -5.484 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[121] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.210 ns ;
-; -5.484 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.208 ns ;
-; -5.484 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.208 ns ;
-; -5.481 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[123] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.204 ns ;
-; -5.481 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[120] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.205 ns ;
-; -5.479 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[126] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.205 ns ;
-; -5.478 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[114] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.202 ns ;
-; -5.476 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[117] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.199 ns ;
-; -5.475 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[2] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe23 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.284 ns ; 3.191 ns ;
-; -5.464 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[74] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.190 ns ;
-; -5.464 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[44] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.190 ns ;
-; -5.464 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[1] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe22 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.967 ns ; 3.497 ns ;
-; -5.460 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[64] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.186 ns ;
-; -5.459 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.954 ns ; 3.505 ns ;
-; -5.455 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[7] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe17 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.284 ns ; 3.171 ns ;
-; -5.453 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.176 ns ;
-; -5.452 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.802 ns ;
-; -5.451 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.932 ns ; 3.519 ns ;
-; -5.449 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[4] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe43 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.287 ns ; 3.162 ns ;
-; -5.449 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.954 ns ; 3.495 ns ;
-; -5.448 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[2] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.652 ns ; 3.796 ns ;
-; -5.443 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.793 ns ;
-; -5.439 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.932 ns ; 3.507 ns ;
-; -5.434 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.954 ns ; 3.480 ns ;
-; -5.429 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.779 ns ;
-; -5.420 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.657 ns ; 3.763 ns ;
-; -5.419 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe13 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.963 ns ; 3.456 ns ;
-; -5.419 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.657 ns ; 3.762 ns ;
-; -5.415 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.658 ns ; 3.757 ns ;
-; -5.400 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe49 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.964 ns ; 3.436 ns ;
-; -5.396 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.954 ns ; 3.442 ns ;
-; -5.396 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.954 ns ; 3.442 ns ;
-; -5.392 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.659 ns ; 3.733 ns ;
-; -5.389 ns ; None ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[110] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe26 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.966 ns ; 3.423 ns ;
-; -5.385 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[5] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe45 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.289 ns ; 3.096 ns ;
-; -5.385 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[4] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe11 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.294 ns ; 3.091 ns ;
-; -5.385 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.651 ns ; 3.734 ns ;
-; -5.375 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe47 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.964 ns ; 3.411 ns ;
-; -5.370 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.932 ns ; 3.438 ns ;
-; -5.367 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[79] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.093 ns ;
-; -5.366 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[32] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.092 ns ;
-; -5.365 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[73] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.091 ns ;
-; -5.365 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[119] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.091 ns ;
-; -5.365 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[24] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.089 ns ;
-; -5.363 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[77] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.089 ns ;
-; -5.363 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[63] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.089 ns ;
-; -5.363 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[36] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.089 ns ;
-; -5.362 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[93] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.088 ns ;
-; -5.362 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[115] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.085 ns ;
-; -5.360 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[56] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.084 ns ;
-; -5.357 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[102] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.080 ns ;
-; -5.357 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.954 ns ; 3.403 ns ;
-; -5.356 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[18] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.080 ns ;
-; -5.355 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.652 ns ; 3.703 ns ;
-; -5.351 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.932 ns ; 3.419 ns ;
-; -5.349 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[76] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.075 ns ;
-; -5.349 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.650 ns ; 3.699 ns ;
-; -5.347 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[62] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.073 ns ;
-; -5.346 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.954 ns ; 3.392 ns ;
-; -5.344 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[52] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.070 ns ;
-; -5.342 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[66] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.068 ns ;
-; -5.340 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe41 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.289 ns ; 3.051 ns ;
-; -5.340 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe43 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.961 ns ; 3.379 ns ;
-; -5.339 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[103] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.274 ns ; 3.065 ns ;
-; -5.337 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[16] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.061 ns ;
-; -5.337 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.061 ns ;
-; -5.336 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[94] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.060 ns ;
-; -5.336 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[29] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.059 ns ;
-; -5.336 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.059 ns ;
-; -5.336 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.060 ns ;
-; -5.335 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[19] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.058 ns ;
-; -5.335 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[25] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.276 ns ; 3.059 ns ;
-; -5.334 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[27] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.057 ns ;
-; -5.333 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[21] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.056 ns ;
-; -5.332 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~portb_address_reg0 ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[101] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.277 ns ; 3.055 ns ;
-; -5.323 ns ; None ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.954 ns ; 3.369 ns ;
-; -5.321 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe25 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.284 ns ; 3.037 ns ;
-; -5.317 ns ; None ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_omb:rd_ptr_msb|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -1.651 ns ; 3.666 ns ;
-; -5.305 ns ; None ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe9 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; CLK33M ; 0.196 ns ; -2.286 ns ; 3.019 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+----------+-----------------------------+---------------------------+-------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Setup: 'MAIN_CLK' ;
-+-----------------------------------------+-----------------------------------------------------+------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+----------+-----------------------------+---------------------------+-------------------------+
-; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------+------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+----------+-----------------------------+---------------------------+-------------------------+
-; -4.261 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a7 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.057 ns ; 4.318 ns ;
-; -4.260 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a8 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.057 ns ; 4.317 ns ;
-; -4.258 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a6 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.057 ns ; 4.315 ns ;
-; -4.239 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a5 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.057 ns ; 4.296 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[29] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[28] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[27] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[26] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[25] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[24] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[23] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[14] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[13] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.204 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|q_b[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.122 ns ; 4.326 ns ;
-; -4.071 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|ram_block11a0~portb_address_reg0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.225 ns ; 4.296 ns ;
-; -4.023 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.012 ns ; 4.035 ns ;
-; -4.023 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdptr_g[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.012 ns ; 4.035 ns ;
-; -3.979 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a2 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.272 ns ; 4.251 ns ;
-; -3.910 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a4 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.057 ns ; 3.967 ns ;
-; -3.907 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a3 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.057 ns ; 3.964 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|sub_parity7a[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|sub_parity7a[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|sub_parity7a[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|parity6 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdptr_g[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdptr_g[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdptr_g[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdptr_g[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdptr_g[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdptr_g[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdptr_g[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.784 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdptr_g[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.055 ns ; 3.839 ns ;
-; -3.546 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a1 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.057 ns ; 3.603 ns ;
-; -3.544 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdemp_eq_comp_lsb_aeb ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.057 ns ; 3.601 ns ;
-; -3.541 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.096 ns ; 3.637 ns ;
-; -3.426 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|rdemp_eq_comp_msb_aeb ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; -0.013 ns ; 3.413 ns ;
-; -3.055 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.360 ns ; 3.415 ns ;
-; -3.039 ns ; None ; FB_ALE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WRF_WRE ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; -0.013 ns ; 3.026 ns ;
-; -2.598 ns ; None ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; MAIN_CLK ; 1.094 ns ; 0.205 ns ; 2.803 ns ;
-; -2.463 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.067 ns ; 6.530 ns ;
-; -2.463 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.067 ns ; 6.530 ns ;
-; -2.375 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_TA ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.768 ns ; 7.143 ns ;
-; -2.355 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.986 ns ; 6.341 ns ;
-; -2.320 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.984 ns ; 6.304 ns ;
-; -2.317 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.067 ns ; 6.384 ns ;
-; -2.317 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.067 ns ; 6.384 ns ;
-; -2.290 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_TA ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.766 ns ; 7.056 ns ;
-; -2.250 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[11] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.067 ns ; 6.317 ns ;
-; -2.250 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[11] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.067 ns ; 6.317 ns ;
-; -2.246 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.999 ns ; 6.245 ns ;
-; -2.239 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.068 ns ; 6.307 ns ;
-; -2.239 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.068 ns ; 6.307 ns ;
-; -2.229 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_TA ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.768 ns ; 6.997 ns ;
-; -2.209 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.986 ns ; 6.195 ns ;
-; -2.199 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.118 ns ; 6.317 ns ;
-; -2.199 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.118 ns ; 6.317 ns ;
-; -2.183 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.129 ns ; 6.312 ns ;
-; -2.177 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.213 ns ; 6.390 ns ;
-; -2.177 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.213 ns ; 6.390 ns ;
-; -2.151 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_TA ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.769 ns ; 6.920 ns ;
-; -2.151 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.119 ns ; 6.270 ns ;
-; -2.151 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.119 ns ; 6.270 ns ;
-; -2.147 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.118 ns ; 6.265 ns ;
-; -2.147 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.118 ns ; 6.265 ns ;
-; -2.146 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.120 ns ; 6.266 ns ;
-; -2.146 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.120 ns ; 6.266 ns ;
-; -2.142 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.118 ns ; 6.260 ns ;
-; -2.142 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.119 ns ; 6.261 ns ;
-; -2.142 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.118 ns ; 6.260 ns ;
-; -2.142 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.119 ns ; 6.261 ns ;
-; -2.139 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_TA ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.766 ns ; 6.905 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.135 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.957 ns ;
-; -2.133 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.986 ns ; 6.119 ns ;
-; -2.132 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.984 ns ; 6.116 ns ;
-; -2.131 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.987 ns ; 6.118 ns ;
-; -2.129 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.119 ns ; 6.248 ns ;
-; -2.129 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.119 ns ; 6.248 ns ;
-; -2.122 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.065 ns ; 6.187 ns ;
-; -2.122 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.065 ns ; 6.187 ns ;
-; -2.118 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[16] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.068 ns ; 6.186 ns ;
-; -2.118 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[16] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.068 ns ; 6.186 ns ;
-; -2.100 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.999 ns ; 6.099 ns ;
-; -2.098 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.117 ns ; 6.215 ns ;
-; -2.098 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.117 ns ; 6.215 ns ;
-; -2.094 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.065 ns ; 6.159 ns ;
-; -2.094 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.065 ns ; 6.159 ns ;
-; -2.084 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[3] ; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[14] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.238 ns ; 6.322 ns ;
-; -2.084 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[3] ; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.238 ns ; 6.322 ns ;
-; -2.084 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[3] ; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|shift_reg[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.238 ns ; 6.322 ns ;
-; -2.083 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.537 ns ; 6.620 ns ;
-; -2.062 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_TA ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.768 ns ; 6.830 ns ;
-; -2.060 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_TA ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.768 ns ; 6.828 ns ;
-; -2.048 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_X_D[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.176 ns ; 6.224 ns ;
-; -2.048 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_X_D[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.176 ns ; 6.224 ns ;
-; -2.048 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_X_D[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.176 ns ; 6.224 ns ;
-; -2.045 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_TA ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.766 ns ; 6.811 ns ;
-; -2.045 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_USART_TOP:I_USART|WF68901IP_USART_TX:I_USART_TRANSMIT|UE ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.701 ns ; 5.746 ns ;
-; -2.037 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_BASE_M_D[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.129 ns ; 6.166 ns ;
-; -2.035 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.538 ns ; 6.573 ns ;
-; -2.033 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; interrupt_handler:nobody|WERTE[3][19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.251 ns ; 6.284 ns ;
-; -2.033 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; interrupt_handler:nobody|WERTE[4][19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.251 ns ; 6.284 ns ;
-; -2.033 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; interrupt_handler:nobody|WERTE[5][19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.251 ns ; 6.284 ns ;
-; -2.033 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.984 ns ; 6.017 ns ;
-; -2.031 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.537 ns ; 6.568 ns ;
-; -2.031 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.213 ns ; 6.244 ns ;
-; -2.031 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_TOP[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.213 ns ; 6.244 ns ;
-; -2.031 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.113 ns ; 6.144 ns ;
-; -2.031 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.113 ns ; 6.144 ns ;
-; -2.030 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_TA ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.769 ns ; 6.799 ns ;
-; -2.030 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.539 ns ; 6.569 ns ;
-; -2.026 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.537 ns ; 6.563 ns ;
-; -2.026 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.538 ns ; 6.564 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.000 ns ; 6.022 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.022 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.841 ns ;
-; -2.013 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.538 ns ; 6.551 ns ;
-; -2.010 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[16] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.987 ns ; 5.997 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.005 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.819 ns ; 5.824 ns ;
-; -2.002 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.984 ns ; 5.986 ns ;
-; -2.001 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.984 ns ; 5.985 ns ;
-; -1.998 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VECT_NUMBER[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.013 ns ; 6.011 ns ;
-; -1.998 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VECT_NUMBER[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.013 ns ; 6.011 ns ;
-; -1.998 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VECT_NUMBER[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.013 ns ; 6.011 ns ;
-; -1.998 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|VECT_NUMBER[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.013 ns ; 6.011 ns ;
-; -1.998 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[14] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|FREQUENCY_B[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.999 ns ; 5.997 ns ;
-; -1.997 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_CTRL_STATUS:I_UART_CTRL_STATUS|IRQn ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.984 ns ; 5.981 ns ;
-; -1.996 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.064 ns ; 6.060 ns ;
-; -1.996 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_LOW[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.064 ns ; 6.060 ns ;
-; -1.993 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.113 ns ; 6.106 ns ;
-; -1.993 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.113 ns ; 6.106 ns ;
-; -1.991 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.050 ns ; 6.041 ns ;
-; -1.991 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.050 ns ; 6.041 ns ;
-; -1.990 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.119 ns ; 6.109 ns ;
-; -1.990 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.119 ns ; 6.109 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.117 ns ; 6.106 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 4.117 ns ; 6.106 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.811 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.811 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.811 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.811 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.811 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.811 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.811 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.811 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.811 ns ;
-; -1.989 ns ; None ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_BYT_CNT[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; MAIN_CLK ; 4.884 ns ; 3.822 ns ; 5.811 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+----------+-----------------------------+---------------------------+-------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]' ;
-+---------------+---------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------+------------------------------------------------------------------------+------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+---------------+---------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------+------------------------------------------------------------------------+------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; 0.825 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.783 ns ;
-; 0.827 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.785 ns ;
-; 0.827 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.785 ns ;
-; 0.828 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.786 ns ;
-; 0.828 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.786 ns ;
-; 0.829 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.787 ns ;
-; 0.829 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.787 ns ;
-; 0.829 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.787 ns ;
-; 0.829 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.787 ns ;
-; 0.829 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.787 ns ;
-; 0.830 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.788 ns ;
-; 0.830 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.788 ns ;
-; 0.830 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.788 ns ;
-; 0.831 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.789 ns ;
-; 0.831 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.789 ns ;
-; 0.832 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.790 ns ;
-; 0.833 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.791 ns ;
-; 1.185 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.143 ns ;
-; 1.353 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.311 ns ;
-; 1.354 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.312 ns ;
-; 1.354 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.311 ns ;
-; 1.354 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.312 ns ;
-; 1.356 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.314 ns ;
-; 1.356 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.314 ns ;
-; 1.356 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.314 ns ;
-; 1.357 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.315 ns ;
-; 1.357 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.315 ns ;
-; 1.357 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.315 ns ;
-; 1.357 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.315 ns ;
-; 1.358 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.316 ns ;
-; 1.359 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.317 ns ;
-; 1.359 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.317 ns ;
-; 1.359 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.317 ns ;
-; 1.359 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.317 ns ;
-; 1.411 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.369 ns ;
-; 1.412 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.370 ns ;
-; 1.412 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.369 ns ;
-; 1.412 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.370 ns ;
-; 1.414 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.372 ns ;
-; 1.414 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.372 ns ;
-; 1.415 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.373 ns ;
-; 1.415 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.373 ns ;
-; 1.415 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.373 ns ;
-; 1.416 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.374 ns ;
-; 1.416 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.373 ns ;
-; 1.417 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.375 ns ;
-; 1.417 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.375 ns ;
-; 1.417 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.375 ns ;
-; 1.417 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.375 ns ;
-; 1.470 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.428 ns ;
-; 1.470 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.427 ns ;
-; 1.470 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.427 ns ;
-; 1.470 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.428 ns ;
-; 1.472 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.430 ns ;
-; 1.473 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.431 ns ;
-; 1.473 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.431 ns ;
-; 1.473 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.431 ns ;
-; 1.474 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.432 ns ;
-; 1.474 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.431 ns ;
-; 1.475 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.433 ns ;
-; 1.475 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.433 ns ;
-; 1.475 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.433 ns ;
-; 1.475 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.433 ns ;
-; 1.528 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.486 ns ;
-; 1.528 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.485 ns ;
-; 1.528 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.485 ns ;
-; 1.528 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.486 ns ;
-; 1.530 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.488 ns ;
-; 1.531 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.489 ns ;
-; 1.531 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.489 ns ;
-; 1.532 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.489 ns ;
-; 1.532 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.489 ns ;
-; 1.533 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.491 ns ;
-; 1.533 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.491 ns ;
-; 1.533 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.491 ns ;
-; 1.533 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.491 ns ;
-; 1.586 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.543 ns ;
-; 1.586 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.543 ns ;
-; 1.587 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.544 ns ;
-; 1.588 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.546 ns ;
-; 1.589 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.547 ns ;
-; 1.589 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.547 ns ;
-; 1.590 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.547 ns ;
-; 1.590 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.547 ns ;
-; 1.591 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.549 ns ;
-; 1.591 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.549 ns ;
-; 1.591 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.549 ns ;
-; 1.591 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.549 ns ;
-; 1.644 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.601 ns ;
-; 1.644 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.601 ns ;
-; 1.645 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.602 ns ;
-; 1.646 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.604 ns ;
-; 1.647 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.605 ns ;
-; 1.648 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.605 ns ;
-; 1.648 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.605 ns ;
-; 1.649 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.607 ns ;
-; 1.649 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.607 ns ;
-; 1.649 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.607 ns ;
-; 1.650 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.607 ns ;
-; 1.689 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.647 ns ;
-; 1.702 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.659 ns ;
-; 1.702 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.659 ns ;
-; 1.703 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.660 ns ;
-; 1.704 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.662 ns ;
-; 1.706 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.663 ns ;
-; 1.706 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.663 ns ;
-; 1.707 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.665 ns ;
-; 1.707 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.665 ns ;
-; 1.708 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.665 ns ;
-; 1.708 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.665 ns ;
-; 1.743 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.701 ns ;
-; 1.760 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.717 ns ;
-; 1.760 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.717 ns ;
-; 1.761 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.718 ns ;
-; 1.764 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.721 ns ;
-; 1.764 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.721 ns ;
-; 1.765 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.723 ns ;
-; 1.766 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.723 ns ;
-; 1.766 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.723 ns ;
-; 1.766 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.723 ns ;
-; 1.801 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.759 ns ;
-; 1.818 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.775 ns ;
-; 1.819 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.776 ns ;
-; 1.822 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.779 ns ;
-; 1.822 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.779 ns ;
-; 1.824 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.781 ns ;
-; 1.824 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.781 ns ;
-; 1.824 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.781 ns ;
-; 1.824 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.781 ns ;
-; 1.861 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.819 ns ;
-; 1.876 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.833 ns ;
-; 1.877 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.834 ns ;
-; 1.880 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.837 ns ;
-; 1.882 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.839 ns ;
-; 1.882 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.839 ns ;
-; 1.882 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.839 ns ;
-; 1.882 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.839 ns ;
-; 1.915 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.873 ns ;
-; 1.935 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.892 ns ;
-; 1.938 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.895 ns ;
-; 1.940 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.897 ns ;
-; 1.940 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.897 ns ;
-; 1.940 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.897 ns ;
-; 1.940 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.897 ns ;
-; 1.976 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[11] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.934 ns ;
-; 1.993 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.950 ns ;
-; 1.998 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.955 ns ;
-; 1.998 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.955 ns ;
-; 1.998 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.955 ns ;
-; 1.998 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[12] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.955 ns ;
-; 2.034 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.992 ns ;
-; 2.056 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.013 ns ;
-; 2.056 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.013 ns ;
-; 2.056 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.013 ns ;
-; 2.056 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[13] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.013 ns ;
-; 2.091 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[9] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 2.049 ns ;
-; 2.114 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.071 ns ;
-; 2.114 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.071 ns ;
-; 2.114 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[14] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.071 ns ;
-; 2.147 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[8] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.104 ns ;
-; 2.172 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.129 ns ;
-; 2.172 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[15] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.129 ns ;
-; 2.209 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[7] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.166 ns ;
-; 2.230 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[16] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.187 ns ;
-; 2.263 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[6] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.220 ns ;
-; 2.325 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[5] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.282 ns ;
-; 2.380 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[4] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.337 ns ;
-; 2.443 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[3] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.400 ns ;
-; 2.501 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[2] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.458 ns ;
-; 2.559 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[1] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.516 ns ;
-; 2.617 ns ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0] ; lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 2.574 ns ;
-+---------------+---------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------+------------------------------------------------------------------------+------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]' ;
-+---------------+---------------------------------------------------------------------------+---------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+---------------+---------------------------------------------------------------------------+---------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; 0.564 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.522 ns ;
-; 0.825 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.783 ns ;
-; 0.830 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.788 ns ;
-; 0.852 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.810 ns ;
-; 0.955 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.913 ns ;
-; 1.357 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.315 ns ;
-; 1.358 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.316 ns ;
-; 1.380 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.338 ns ;
-; 1.415 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.373 ns ;
-; 1.416 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.374 ns ;
-; 1.473 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.431 ns ;
-; 1.474 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.432 ns ;
-; 1.487 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.445 ns ;
-; 1.531 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.489 ns ;
-; 1.545 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.503 ns ;
-; 1.611 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.569 ns ;
-; 1.611 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.569 ns ;
-; 1.611 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.569 ns ;
-; 1.611 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.569 ns ;
-+---------------+---------------------------------------------------------------------------+---------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]' ;
-+-----------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+-----------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WR_PR ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WR_PR ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\MOTORSWITCH:LOCK ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\MOTORSWITCH:LOCK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\MOTORSWITCH:INDEXCNT[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\MOTORSWITCH:INDEXCNT[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\MOTORSWITCH:INDEXCNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\MOTORSWITCH:INDEXCNT[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\MOTORSWITCH:INDEXCNT[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\MOTORSWITCH:INDEXCNT[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\MOTORSWITCH:INDEXCNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\MOTORSWITCH:INDEXCNT[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\INDEX_COUNTER:LOCK ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\INDEX_COUNTER:LOCK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\BYTEASMBLY:CNT[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\BYTEASMBLY:CNT[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\BYTEASMBLY:CNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\BYTEASMBLY:CNT[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\BYTEASMBLY:CNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\BYTEASMBLY:CNT[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\BYTEASMBLY:CNT[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\BYTEASMBLY:CNT[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SECTOR_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SECTOR_REG[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\CNT_T3BYTES:CNT[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\CNT_T3BYTES:CNT[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\CNT_T3BYTES:CNT[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\CNT_T3BYTES:CNT[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\CNT_T3BYTES:CNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\CNT_T3BYTES:CNT[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|MO~_Duplicate_1 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|MO~_Duplicate_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[9] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\EDGEDETECT:LOCK ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\EDGEDETECT:LOCK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\FREQUENCY_DECODER:FREQ_AMOUNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\FREQUENCY_DECODER:FREQ_AMOUNT[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\PHASE_DECODER:PHASE_AMOUNT[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\PHASE_DECODER:PHASE_AMOUNT[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|SECT_LEN[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_CRC ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_VERIFY_CRC ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_CRC_1 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_VERIFY_CRC_1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SHIFT ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SHIFT ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SHIFT_ADR ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SHIFT_ADR ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INDEX_MARK ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INDEX_MARK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|PLL_D ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|PLL_D ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_CHECK_DIR ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T1_CHECK_DIR ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_STATE.FCF_T7 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_STATE.FCF_T7 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_ACTIV ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_ACTIV ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_LEADIN ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_LEADIN ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|BUSY ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|BUSY ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:LOCK ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:LOCK ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[15] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_FF ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_FF ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_AM ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T2_WR_AM ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_STROBES:CNT[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_STROBES:CNT[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_WR_TIMING:CLKMASK_MFM ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_WR_TIMING:CLKMASK_MFM ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|DEC_STATE ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|DEC_STATE ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_STATE.B_01 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_STATE.B_01 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_STATE.C_10 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_STATE.C_10 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.547 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.505 ns ;
-; 0.549 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[19] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[20] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.549 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|TRACKMEM[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SECTOR_REG[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.550 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe18a[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[9] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[10] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[11] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[12] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[13] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe13a[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe14a[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_STATE.FCF_T2 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_STATE.FCF_T3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[28] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[29] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\MFM_PRECOMPENSATION:WRITEPATTERN[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.551 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|sub_parity9a1 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|parity8 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe18a[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe18a[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe13a[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe14a[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe13a[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe14a[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|sub_parity6a1 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|parity5 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.552 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe18a[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe18a[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[17] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[18] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[20] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[21] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.553 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.553 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[16] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[17] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.553 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe13a[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe14a[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.553 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|\ADRMARK_STROBES:DDATA_AM_LOCK ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|DDATA_AM ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.553 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[30] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[31] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.559 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\RESTORE_TRAP:STEP_CNT[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\RESTORE_TRAP:STEP_CNT[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.517 ns ;
-; 0.562 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_RD ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_LOAD_SR ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.520 ns ;
-; 0.563 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cntr_t2e:cntr_b|counter_reg_bit[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|wrptr_g[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.521 ns ;
-; 0.569 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|\MFM_SYNCLOCK:TMP[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|\MFM_SYNCLOCK:TMP[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.527 ns ;
-; 0.569 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\ADDER:ADDER_DATA[11] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\ADDER:ADDER_DATA[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.527 ns ;
-; 0.571 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|sub_parity9a1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.529 ns ;
-; 0.572 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_RD_ADR ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_VERIFY_AM ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.530 ns ;
-; 0.572 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SHIFT_REG[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.530 ns ;
-; 0.573 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|cntr_t2e:cntr_b|counter_reg_bit[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|rdptr_b[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.531 ns ;
-; 0.577 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe14a[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|rs_dgwp_reg[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.535 ns ;
-; 0.580 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|sub_parity6a2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.538 ns ;
-; 0.582 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|parity5 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.540 ns ;
-; 0.584 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|parity5 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.542 ns ;
-; 0.591 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|WR_CNT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|WR_CNT[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.549 ns ;
-; 0.592 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|sub_parity9a2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.550 ns ;
-; 0.593 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|sub_parity6a0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.551 ns ;
-; 0.608 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.566 ns ;
-; 0.609 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SET_DRQ_2 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\CNT_T3BYTES:CNT[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.567 ns ;
-; 0.610 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.568 ns ;
-; 0.610 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.568 ns ;
-; 0.614 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|sub_parity9a0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.572 ns ;
-; 0.614 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.572 ns ;
-; 0.616 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SET_DRQ_2 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\CNT_T3BYTES:CNT[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.574 ns ;
-; 0.616 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SET_DRQ_2 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_CHECK_RD ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.574 ns ;
-; 0.625 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.583 ns ;
-; 0.626 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.584 ns ;
-; 0.627 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.585 ns ;
-; 0.667 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[23] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[24] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.625 ns ;
-; 0.668 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.626 ns ;
-; 0.669 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[14] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[15] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.627 ns ;
-; 0.670 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.628 ns ;
-; 0.670 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[12] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[13] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.628 ns ;
-; 0.670 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[25] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[26] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.628 ns ;
-; 0.670 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[26] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[27] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.628 ns ;
-; 0.670 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[27] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[28] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.628 ns ;
-; 0.670 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[21] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[22] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.628 ns ;
-; 0.670 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[22] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[23] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.628 ns ;
-; 0.671 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|sub_parity9a0 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|parity8 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.629 ns ;
-; 0.671 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.629 ns ;
-; 0.671 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.629 ns ;
-; 0.671 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[16] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[17] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.629 ns ;
-; 0.671 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|TRACKMEM[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SECTOR_REG[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.629 ns ;
-; 0.671 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|sub_parity6a0 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|parity5 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.629 ns ;
-; 0.672 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.630 ns ;
-; 0.672 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[13] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|\CLK_MASK:MASK_SHFT[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.630 ns ;
-; 0.672 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[24] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[25] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.630 ns ;
-; 0.673 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[29] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[30] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.631 ns ;
-; 0.675 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe13a[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe14a[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.633 ns ;
-; 0.677 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe18a[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.635 ns ;
-; 0.677 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe18a[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.635 ns ;
-; 0.677 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.635 ns ;
-; 0.678 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|cntr_t2e:cntr_b|counter_reg_bit[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|wrptr_g[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.636 ns ;
-; 0.678 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe18a[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.636 ns ;
-; 0.678 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[15] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[16] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.636 ns ;
-; 0.678 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_STATE.FCF_T1 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_STATE.FCF_T2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.636 ns ;
-; 0.678 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe13a[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe14a[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.636 ns ;
-; 0.679 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe13a[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe14a[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.637 ns ;
-; 0.680 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|ws_dgrp_reg[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.041 ns ; 0.639 ns ;
-; 0.680 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe13a[6] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe14a[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.638 ns ;
-; 0.680 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_STATE.FCF_T3 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_STATE.FCF_T6 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.638 ns ;
-; 0.681 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[14] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|AM_SHFT[15] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.639 ns ;
-; 0.683 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[14] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[15] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.641 ns ;
-; 0.683 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[5] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.641 ns ;
-; 0.689 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|rs_dgwp_reg[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_gd9:rs_bwp|dffe15a[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.647 ns ;
-; 0.689 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|\CNT_T3BYTES:CNT[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_LOAD_SR ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.647 ns ;
-; 0.690 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|rs_dgwp_reg[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_gd9:rs_bwp|dffe15a[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.041 ns ; 0.649 ns ;
-; 0.690 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_LOAD_DATA_2 ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SET_DRQ_2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.648 ns ;
-; 0.690 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_SHIFT_ADR ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.T3_LOAD_DATA_2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.648 ns ;
-; 0.690 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.648 ns ;
-; 0.691 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.649 ns ;
-; 0.693 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|rs_dgwp_reg[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|dffpipe_gd9:rs_bwp|dffe15a[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.041 ns ; 0.652 ns ;
-; 0.698 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|wrptr_g[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|ram_block11a0~porta_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; 0.330 ns ; 1.028 ns ;
-; 0.699 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|wrptr_g[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|delayed_wrptr_g[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.657 ns ;
-; 0.700 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|TRACKMEM[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_REGISTERS:I_REGISTERS|SECTOR_REG[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.658 ns ;
-; 0.701 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|wrptr_g[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.659 ns ;
-; 0.701 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.659 ns ;
-; 0.701 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|sub_parity6a1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.659 ns ;
-; 0.704 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|sub_parity9a1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.662 ns ;
-; 0.704 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe13a[4] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|alt_synch_pipe_kkd:rs_dgwp|dffpipe_jd9:dffpipe12|dffe14a[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.662 ns ;
-; 0.706 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|HISTORY_REG[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|HISTORY_REG[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.664 ns ;
-; 0.708 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_AM_DETECTOR:I_AM_DETECTOR|SHIFT[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.666 ns ;
-; 0.711 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|cntr_t2e:cntr_b|counter_reg_bit[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|rdptr_b[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.669 ns ;
-; 0.712 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe18a[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.043 ns ; 0.669 ns ;
-; 0.712 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[0] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|sub_parity6a0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.670 ns ;
-; 0.714 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|wrptr_g[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|delayed_wrptr_g[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.041 ns ; 0.673 ns ;
-; 0.715 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[3] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|ws_dgrp_reg[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.673 ns ;
-; 0.715 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|alt_synch_pipe_jkd:ws_dgrp|dffpipe_id9:dffpipe17|dffe19a[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|ws_dgrp_reg[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.673 ns ;
-; 0.720 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CRC_PRES ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CRC_LOGIC:I_CRC_LOGIC|CRC_SHIFT[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.678 ns ;
-; 0.724 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[1] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|sub_parity9a0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.682 ns ;
-; 0.726 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|wrptr_g[7] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|ram_block11a0~porta_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; 0.330 ns ; 1.056 ns ;
-; 0.726 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|wrptr_g[10] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|delayed_wrptr_g[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.041 ns ; 0.685 ns ;
-; 0.726 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|a_graycounter_j47:rdptr_g1p|counter7a[8] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|rdptr_g[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.684 ns ;
-; 0.728 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_fic:wrptr_g1p|counter10a[2] ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|wrptr_g[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1] ; 0.000 ns ; -0.042 ns ; 0.686 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ;
-+-----------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]' ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[2] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DISP_ON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DISP_ON ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SUB_PIXEL_CNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SUB_PIXEL_CNT[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a7 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a7 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a1 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a1 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a4 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a4 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a5 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a5 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a0 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a2 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a2 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a6 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a6 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a3 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a3 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; -0.454 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLK13M ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLK13M ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.531 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[45] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe29 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.443 ns ;
-; 0.536 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC ; altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated|ddio_outa[0]~DFFHI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 2.403 ns ; 2.939 ns ;
-; 0.538 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe48 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.450 ns ;
-; 0.538 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe28 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.450 ns ;
-; 0.541 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe30 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.453 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[1] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[33] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.908 ns ; 1.459 ns ;
-; 0.556 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[62] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.947 ns ; 1.503 ns ;
-; 0.557 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[35] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.960 ns ; 1.517 ns ;
-; 0.559 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[19] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[35] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.471 ns ;
-; 0.559 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYNC_PIX2 ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.935 ns ; 1.494 ns ;
-; 0.560 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[5] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[23] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.583 ns ; 1.143 ns ;
-; 0.560 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.916 ns ; 1.476 ns ;
-; 0.561 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.478 ns ;
-; 0.564 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[11] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.570 ns ; 1.134 ns ;
-; 0.567 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[79] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.947 ns ; 1.514 ns ;
-; 0.570 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.916 ns ; 1.486 ns ;
-; 0.573 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe16 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.905 ns ; 1.478 ns ;
-; 0.576 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|sub_parity7a[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|parity6 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.929 ns ; 1.505 ns ;
-; 0.578 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[19] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[19] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.490 ns ;
-; 0.579 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe29 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.493 ns ;
-; 0.580 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 1.284 ns ; 1.864 ns ;
-; 0.583 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe48 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[23] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.919 ns ; 1.502 ns ;
-; 0.583 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[13] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.584 ns ; 1.167 ns ;
-; 0.583 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe8 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.911 ns ; 1.494 ns ;
-; 0.584 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[93] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.967 ns ; 1.551 ns ;
-; 0.585 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.911 ns ; 1.496 ns ;
-; 0.586 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[27] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component|dffs[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.500 ns ;
-; 0.588 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe49 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[23] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.916 ns ; 1.504 ns ;
-; 0.589 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.906 ns ; 1.495 ns ;
-; 0.589 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe23 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.909 ns ; 1.498 ns ;
-; 0.590 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.504 ns ;
-; 0.591 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 1.284 ns ; 1.875 ns ;
-; 0.592 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[15] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.915 ns ; 1.507 ns ;
-; 0.592 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.929 ns ; 1.521 ns ;
-; 0.597 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe32 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.511 ns ;
-; 0.600 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[18] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[50] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.517 ns ;
-; 0.600 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[82] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe6 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.924 ns ; 1.524 ns ;
-; 0.600 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.921 ns ; 1.521 ns ;
-; 0.600 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 1.282 ns ; 1.882 ns ;
-; 0.601 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[55] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[87] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.513 ns ;
-; 0.601 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe16 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.926 ns ; 1.527 ns ;
-; 0.604 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[48] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.947 ns ; 1.551 ns ;
-; 0.608 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe22 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.916 ns ; 1.524 ns ;
-; 0.608 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[5] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.522 ns ;
-; 0.609 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC ; altddio_out3:inst6|altddio_out:altddio_out_component|ddio_out_31f:auto_generated|ddio_outa[0]~DFFHI ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 2.401 ns ; 3.010 ns ;
-; 0.610 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 1.284 ns ; 1.894 ns ;
-; 0.611 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe9 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.528 ns ;
-; 0.613 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.527 ns ;
-; 0.613 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.530 ns ;
-; 0.613 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[125] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.967 ns ; 1.580 ns ;
-; 0.614 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.526 ns ;
-; 0.614 ns ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe15 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.526 ns ;
-; 0.614 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.531 ns ;
-; 0.614 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[36] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.947 ns ; 1.561 ns ;
-; 0.614 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.531 ns ;
-; 0.617 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe13 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.534 ns ;
-; 0.618 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[16] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.962 ns ; 1.580 ns ;
-; 0.619 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.921 ns ; 1.540 ns ;
-; 0.620 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.921 ns ; 1.541 ns ;
-; 0.620 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.534 ns ;
-; 0.620 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.921 ns ; 1.541 ns ;
-; 0.622 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[26] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[42] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.920 ns ; 1.542 ns ;
-; 0.622 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe12 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.539 ns ;
-; 0.622 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.924 ns ; 1.546 ns ;
-; 0.622 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[88] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[88] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.597 ns ; 1.219 ns ;
-; 0.622 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_AV[1][0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[0] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.906 ns ; 1.528 ns ;
-; 0.623 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[38] ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.537 ns ;
-; 0.623 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.921 ns ; 1.544 ns ;
-; 0.623 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~porta_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 1.283 ns ; 1.906 ns ;
-; 0.626 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.921 ns ; 1.547 ns ;
-; 0.626 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.924 ns ; 1.550 ns ;
-; 0.626 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.924 ns ; 1.550 ns ;
-; 0.627 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.921 ns ; 1.548 ns ;
-; 0.627 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.924 ns ; 1.551 ns ;
-; 0.627 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[3] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe1a[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.544 ns ;
-; 0.628 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe42 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.915 ns ; 1.543 ns ;
-; 0.628 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe15 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.915 ns ; 1.543 ns ;
-; 0.628 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 1.284 ns ; 1.912 ns ;
-; 0.628 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe12 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.545 ns ;
-; 0.628 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[20] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[36] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.913 ns ; 1.541 ns ;
-; 0.629 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.921 ns ; 1.550 ns ;
-; 0.629 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.921 ns ; 1.550 ns ;
-; 0.629 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.924 ns ; 1.553 ns ;
-; 0.630 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.544 ns ;
-; 0.630 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.924 ns ; 1.554 ns ;
-; 0.631 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe38 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.545 ns ;
-; 0.632 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[96] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[96] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.588 ns ; 1.220 ns ;
-; 0.633 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[54] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[86] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.913 ns ; 1.546 ns ;
-; 0.633 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|RAND[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|RAND[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.916 ns ; 1.549 ns ;
-; 0.636 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[43] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe25 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.909 ns ; 1.545 ns ;
-; 0.637 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[117] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[21] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.551 ns ;
-; 0.637 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe33 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.551 ns ;
-; 0.638 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[5] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[37] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.555 ns ;
-; 0.638 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[25] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.911 ns ; 1.549 ns ;
-; 0.638 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[71] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[103] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.552 ns ;
-; 0.639 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe39 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[18] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.556 ns ;
-; 0.639 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.916 ns ; 1.555 ns ;
-; 0.641 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[16] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[16] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.558 ns ;
-; 0.641 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[101] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.555 ns ;
-; 0.642 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.916 ns ; 1.558 ns ;
-; 0.643 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[111] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[15] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.557 ns ;
-; 0.644 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe30 ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.558 ns ;
-; 0.644 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[124] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.967 ns ; 1.611 ns ;
-; 0.645 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.557 ns ;
-; 0.646 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[75] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[107] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.560 ns ;
-; 0.646 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[8] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.586 ns ; 1.232 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe20 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.561 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[9] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[8] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[10] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[3] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.910 ns ; 1.557 ns ;
-; 0.648 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.907 ns ; 1.555 ns ;
-; 0.648 ns ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|q_b[1] ; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.577 ns ; 1.225 ns ;
-; 0.648 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[114] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.560 ns ;
-; 0.648 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.907 ns ; 1.555 ns ;
-; 0.648 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[103] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[7] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.562 ns ;
-; 0.649 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[49] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[81] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.566 ns ;
-; 0.649 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe42 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.918 ns ; 1.567 ns ;
-; 0.649 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[119] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[23] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.563 ns ;
-; 0.650 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe26 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.918 ns ; 1.568 ns ;
-; 0.650 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[107] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[107] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.570 ns ; 1.220 ns ;
-; 0.651 ns ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|q_b[0] ; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[5] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.577 ns ; 1.228 ns ;
-; 0.651 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC ; altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated|ddio_outa[0]~DFFLO ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 2.404 ns ; 3.055 ns ;
-; 0.652 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe40 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[19] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.924 ns ; 1.576 ns ;
-; 0.653 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[77] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe28 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.567 ns ;
-; 0.653 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component|dffs[5] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.567 ns ;
-; 0.655 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[19] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.947 ns ; 1.602 ns ;
-; 0.656 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[1] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[19] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.585 ns ; 1.241 ns ;
-; 0.656 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 1.282 ns ; 1.938 ns ;
-; 0.657 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe41 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[19] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.924 ns ; 1.581 ns ;
-; 0.657 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.571 ns ;
-; 0.658 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[46] ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.905 ns ; 1.563 ns ;
-; 0.658 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.572 ns ;
-; 0.659 ns ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe29 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.906 ns ; 1.565 ns ;
-; 0.660 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[28] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.967 ns ; 1.627 ns ;
-; 0.661 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[30] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.947 ns ; 1.608 ns ;
-; 0.661 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.575 ns ;
-; 0.662 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[1] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe22 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.915 ns ; 1.577 ns ;
-; 0.662 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[100] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.912 ns ; 1.574 ns ;
-; 0.662 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.576 ns ;
-; 0.662 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[0][3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[0][4] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.918 ns ; 1.580 ns ;
-; 0.663 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[12] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.916 ns ; 1.579 ns ;
-; 0.663 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[44] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.947 ns ; 1.610 ns ;
-; 0.664 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[13] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe29 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.911 ns ; 1.575 ns ;
-; 0.664 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[21] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.930 ns ; 1.594 ns ;
-; 0.664 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[13] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[45] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.906 ns ; 1.570 ns ;
-; 0.664 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[1] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe9 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.920 ns ; 1.584 ns ;
-; 0.665 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe37 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[17] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.582 ns ;
-; 0.665 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[1] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe33 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.579 ns ;
-; 0.665 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[8] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[40] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.913 ns ; 1.578 ns ;
-; 0.666 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe4 ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.580 ns ;
-; 0.666 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.580 ns ;
-; 0.667 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe24 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[11] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.581 ns ;
-; 0.667 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[109] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[13] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.581 ns ;
-; 0.667 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[1] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[1] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.920 ns ; 1.587 ns ;
-; 0.667 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[0] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[16] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.913 ns ; 1.580 ns ;
-; 0.667 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[12] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.967 ns ; 1.634 ns ;
-; 0.669 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[21] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.585 ns ; 1.254 ns ;
-; 0.669 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[106] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[10] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.913 ns ; 1.582 ns ;
-; 0.669 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[6] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 1.284 ns ; 1.953 ns ;
-; 0.669 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[117] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.967 ns ; 1.636 ns ;
-; 0.669 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[5] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe25 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.583 ns ;
-; 0.670 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[33] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[65] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.914 ns ; 1.584 ns ;
-; 0.670 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[3] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[35] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.917 ns ; 1.587 ns ;
-; 0.671 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[17] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[49] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.915 ns ; 1.586 ns ;
-; 0.671 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[99] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe8 ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] ; 0.000 ns ; 0.908 ns ; 1.579 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]' ;
-+-----------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+-----------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[7] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_REFRESH_SIG[0] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_REFRESH_SIG[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_REFRESH_SIG[2] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_REFRESH_SIG[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_REFRESH_SIG[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_REFRESH_SIG[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[4] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[5] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[9] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[8] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_AC ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_AC ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FIFO_REQ ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.549 ns ; Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.549 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[75] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.549 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[99] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.549 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[65] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.549 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[81] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.549 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe23a[8] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.549 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe23a[9] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.549 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.549 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[5] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|ws_dgrp_reg[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.507 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[87] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[105] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[110] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[94] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe23a[7] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe23a[5] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_R5 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_R6 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[4] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.550 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.508 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[124] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[123] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[66] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[126] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_R4 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_R5 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe23a[4] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe23a[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[8] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[9] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[4] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|ws_dgrp_reg[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[7] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|ws_dgrp_reg[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.551 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_9d9:wraclr|dffe19a[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|dffpipe_9d9:wraclr|dffe20a[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.509 ns ;
-; 0.552 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[102] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[86] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[118] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[67] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[83] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_C5 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_C6 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe23a[6] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.552 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|sub_parity12a0 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|parity11 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.510 ns ;
-; 0.553 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[125] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.553 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[92] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.553 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[73] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.553 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[121] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.553 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe23a[0] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.553 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|MCS[1] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_DDR_SYNC ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.511 ns ;
-; 0.554 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[120] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.512 ns ;
-; 0.554 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[6] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.512 ns ;
-; 0.558 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[25] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.516 ns ;
-; 0.558 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[24] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.516 ns ;
-; 0.558 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.516 ns ;
-; 0.558 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[27] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.516 ns ;
-; 0.559 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.517 ns ;
-; 0.559 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[42] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.517 ns ;
-; 0.559 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.517 ns ;
-; 0.559 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[56] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.517 ns ;
-; 0.560 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.518 ns ;
-; 0.560 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.518 ns ;
-; 0.560 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[32] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.518 ns ;
-; 0.560 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.518 ns ;
-; 0.560 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.518 ns ;
-; 0.561 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[39] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.519 ns ;
-; 0.561 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[40] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.519 ns ;
-; 0.562 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[27] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.520 ns ;
-; 0.562 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.520 ns ;
-; 0.562 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.520 ns ;
-; 0.563 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[52] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.521 ns ;
-; 0.563 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[57] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.521 ns ;
-; 0.569 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.527 ns ;
-; 0.569 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[31] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.527 ns ;
-; 0.569 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.527 ns ;
-; 0.570 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.528 ns ;
-; 0.570 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.528 ns ;
-; 0.571 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.529 ns ;
-; 0.571 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.529 ns ;
-; 0.571 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.529 ns ;
-; 0.572 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_ADR_CNT[22] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VIDEO_ADR_CNT[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.530 ns ;
-; 0.573 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.531 ns ;
-; 0.573 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.531 ns ;
-; 0.573 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.531 ns ;
-; 0.573 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.531 ns ;
-; 0.573 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[84] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[84] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.531 ns ;
-; 0.573 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[95] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[95] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.531 ns ;
-; 0.573 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[46] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[46] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.531 ns ;
-; 0.573 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|parity11 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.531 ns ;
-; 0.573 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|parity11 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.531 ns ;
-; 0.574 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.532 ns ;
-; 0.582 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[70] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[70] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.540 ns ;
-; 0.583 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_REFRESH_SIG[3] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_R3 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.541 ns ;
-; 0.592 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[4] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.550 ns ;
-; 0.593 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[4] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|sub_parity12a1 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.551 ns ;
-; 0.595 ns ; Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; Video:Fredi_Aschwanden|lpm_shiftreg6:inst92|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.553 ns ;
-; 0.601 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.559 ns ;
-; 0.604 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[7] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.562 ns ;
-; 0.605 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|sub_parity12a0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.563 ns ;
-; 0.605 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[7] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.563 ns ;
-; 0.643 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a3~porta_address_reg0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; 0.340 ns ; 0.983 ns ;
-; 0.647 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[7] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a5~porta_address_reg0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; 0.332 ns ; 0.979 ns ;
-; 0.654 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a14~porta_address_reg0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; 0.334 ns ; 0.988 ns ;
-; 0.670 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a0~porta_address_reg0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; 0.332 ns ; 1.002 ns ;
-; 0.671 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_R3 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_R4 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.629 ns ;
-; 0.673 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[5] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a14~porta_address_reg0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; 0.334 ns ; 1.007 ns ;
-; 0.675 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[90] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.633 ns ;
-; 0.676 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_C2 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_C3 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.634 ns ;
-; 0.677 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[77] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.635 ns ;
-; 0.677 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[88] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.635 ns ;
-; 0.678 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[97] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.636 ns ;
-; 0.678 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe23a[2] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.636 ns ;
-; 0.678 ns ; Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; Video:Fredi_Aschwanden|lpm_shiftreg4:inst26|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.636 ns ;
-; 0.679 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[85] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.637 ns ;
-; 0.679 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[100] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.637 ns ;
-; 0.679 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe23a[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.637 ns ;
-; 0.679 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe24a[5] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.637 ns ;
-; 0.680 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[93] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.638 ns ;
-; 0.680 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[114] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.638 ns ;
-; 0.680 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|alt_synch_pipe_sld:ws_dgrp|dffpipe_re9:dffpipe22|dffe25a[3] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|ws_dgrp_reg[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.638 ns ;
-; 0.681 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[98] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.639 ns ;
-; 0.687 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.645 ns ;
-; 0.687 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.645 ns ;
-; 0.688 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.646 ns ;
-; 0.688 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.646 ns ;
-; 0.688 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.646 ns ;
-; 0.688 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.646 ns ;
-; 0.688 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.646 ns ;
-; 0.689 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.647 ns ;
-; 0.689 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.647 ns ;
-; 0.689 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.647 ns ;
-; 0.689 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[41] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.647 ns ;
-; 0.689 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[49] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.647 ns ;
-; 0.690 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.648 ns ;
-; 0.690 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[44] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.648 ns ;
-; 0.690 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.648 ns ;
-; 0.690 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[33] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.648 ns ;
-; 0.690 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[61] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.648 ns ;
-; 0.690 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_C4 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T1 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.648 ns ;
-; 0.691 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.649 ns ;
-; 0.691 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.649 ns ;
-; 0.691 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[43] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.649 ns ;
-; 0.691 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.649 ns ;
-; 0.691 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.649 ns ;
-; 0.692 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[29] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.650 ns ;
-; 0.692 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.650 ns ;
-; 0.692 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.650 ns ;
-; 0.692 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.650 ns ;
-; 0.692 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[54] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.650 ns ;
-; 0.692 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[91] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 0.649 ns ;
-; 0.692 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_R6 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_N5 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.650 ns ;
-; 0.693 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.651 ns ;
-; 0.694 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a14~porta_address_reg0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; 0.334 ns ; 1.028 ns ;
-; 0.695 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[106] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 0.656 ns ;
-; 0.698 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[27] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.656 ns ;
-; 0.698 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[23] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.656 ns ;
-; 0.698 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[45] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.656 ns ;
-; 0.698 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[77] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[77] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.656 ns ;
-; 0.698 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.656 ns ;
-; 0.698 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[109] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 0.655 ns ;
-; 0.698 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.656 ns ;
-; 0.698 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[27] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.656 ns ;
-; 0.698 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[14] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.656 ns ;
-; 0.698 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_C4 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_C5 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.041 ns ; 0.657 ns ;
-; 0.699 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[46] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.657 ns ;
-; 0.699 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[78] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[78] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.657 ns ;
-; 0.700 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst12|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[28] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.658 ns ;
-; 0.700 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.658 ns ;
-; 0.700 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[53] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.658 ns ;
-; 0.700 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst20|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[82] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.658 ns ;
-; 0.700 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T7W ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T8W ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.658 ns ;
-; 0.701 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[14] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.659 ns ;
-; 0.701 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.659 ns ;
-; 0.701 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_C3 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_C4 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.659 ns ;
-; 0.701 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T1 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_R2 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.659 ns ;
-; 0.701 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T4W ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DS_T5W ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.659 ns ;
-; 0.703 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|lpm_ff1:inst4|lpm_ff:lpm_ff_component|dffs[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.661 ns ;
-; 0.703 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|sub_parity12a0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.661 ns ;
-; 0.704 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[5] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a5~porta_address_reg0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; 0.327 ns ; 1.031 ns ;
-; 0.705 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[5] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a7~porta_address_reg0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; 0.341 ns ; 1.046 ns ;
-; 0.706 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ram_block14a5~porta_address_reg0 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; 0.327 ns ; 1.033 ns ;
-; 0.707 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst3|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[51] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.665 ns ;
-; 0.710 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.041 ns ; 0.669 ns ;
-; 0.712 ns ; Video:Fredi_Aschwanden|lpm_ff6:inst71|lpm_ff:lpm_ff_component|dffs[40] ; Video:Fredi_Aschwanden|lpm_ff6:inst94|lpm_ff:lpm_ff_component|dffs[40] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 0.669 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ;
-+-----------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]' ;
-+---------------+----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+---------------+----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; 4.336 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.507 ns ;
-; 4.336 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.507 ns ;
-; 4.336 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[12] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.507 ns ;
-; 4.336 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[27] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[27] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.507 ns ;
-; 4.336 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[1] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.507 ns ;
-; 4.337 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[3] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.508 ns ;
-; 4.337 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.508 ns ;
-; 4.337 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[21] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.508 ns ;
-; 4.338 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.509 ns ;
-; 4.338 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[10] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.509 ns ;
-; 4.338 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[23] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[23] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.509 ns ;
-; 4.338 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[19] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.509 ns ;
-; 4.338 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[26] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.509 ns ;
-; 4.338 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[22] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.509 ns ;
-; 4.339 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[14] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.510 ns ;
-; 4.339 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[0] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.510 ns ;
-; 4.339 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[13] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[13] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.510 ns ;
-; 4.339 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.510 ns ;
-; 4.339 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[24] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[24] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.510 ns ;
-; 4.339 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[18] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.510 ns ;
-; 4.339 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[17] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.510 ns ;
-; 4.339 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[31] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[31] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.510 ns ;
-; 4.340 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[20] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.511 ns ;
-; 4.340 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[11] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.511 ns ;
-; 4.340 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[9] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.511 ns ;
-; 4.340 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[16] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.511 ns ;
-; 4.340 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[15] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.511 ns ;
-; 4.340 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[30] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[30] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.511 ns ;
-; 4.465 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[28] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[28] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.636 ns ;
-; 4.466 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[29] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[29] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.637 ns ;
-; 4.467 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[25] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[25] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.638 ns ;
-; 4.468 ns ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1] ; -3.787 ns ; -3.829 ns ; 0.639 ns ;
-+---------------+----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]' ;
-+---------------+---------------------------------------------------+-----------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+---------------+---------------------------------------------------+-----------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; 1.825 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[6] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; -1.262 ns ; -1.317 ns ; 0.508 ns ;
-; 1.827 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[7] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; -1.262 ns ; -1.317 ns ; 0.510 ns ;
-; 1.953 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[4] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; -1.262 ns ; -1.317 ns ; 0.636 ns ;
-; 1.954 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[5] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; -1.262 ns ; -1.317 ns ; 0.637 ns ;
-; 2.134 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[3] ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; -1.262 ns ; -1.315 ns ; 0.819 ns ;
-+---------------+---------------------------------------------------+-----------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]' ;
-+-----------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+-----------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; 3.263 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.693 ns ; 1.570 ns ;
-; 3.273 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[18]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.693 ns ; 1.580 ns ;
-; 3.460 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[18]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.097 ns ; 3.363 ns ;
-; 3.511 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.693 ns ; 1.818 ns ;
-; 3.539 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.694 ns ; 1.845 ns ;
-; 3.543 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.686 ns ; 1.857 ns ;
-; 3.548 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.688 ns ; 1.860 ns ;
-; 3.569 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.695 ns ; 1.874 ns ;
-; 3.570 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.688 ns ; 1.882 ns ;
-; 3.573 ns ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[0]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.578 ns ; -1.667 ns ; 1.906 ns ;
-; 3.609 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.672 ns ; 1.937 ns ;
-; 3.618 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.689 ns ; 1.929 ns ;
-; 3.637 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.685 ns ; 1.952 ns ;
-; 3.656 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.697 ns ; 1.959 ns ;
-; 3.660 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.686 ns ; 1.974 ns ;
-; 3.674 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.691 ns ; 1.983 ns ;
-; 3.686 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[18]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.692 ns ; 1.994 ns ;
-; 3.719 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[31] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.695 ns ; 2.024 ns ;
-; 3.721 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.691 ns ; 2.030 ns ;
-; 3.730 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.698 ns ; 2.032 ns ;
-; 3.731 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.097 ns ; 3.634 ns ;
-; 3.737 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.695 ns ; 2.042 ns ;
-; 3.740 ns ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[1]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.578 ns ; -1.664 ns ; 2.076 ns ;
-; 3.745 ns ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[0]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.578 ns ; -1.668 ns ; 2.077 ns ;
-; 3.754 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.695 ns ; 2.059 ns ;
-; 3.769 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.097 ns ; 3.672 ns ;
-; 3.774 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.697 ns ; 2.077 ns ;
-; 3.776 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.685 ns ; 2.091 ns ;
-; 3.777 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.698 ns ; 2.079 ns ;
-; 3.778 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.693 ns ; 2.085 ns ;
-; 3.780 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.696 ns ; 2.084 ns ;
-; 3.781 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.684 ns ; 2.097 ns ;
-; 3.784 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.695 ns ; 2.089 ns ;
-; 3.784 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.684 ns ; 2.100 ns ;
-; 3.786 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.689 ns ; 2.097 ns ;
-; 3.792 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.099 ns ; 3.693 ns ;
-; 3.794 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.692 ns ; 2.102 ns ;
-; 3.796 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.689 ns ; 2.107 ns ;
-; 3.811 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.686 ns ; 2.125 ns ;
-; 3.814 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[27] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.688 ns ; 2.126 ns ;
-; 3.819 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.697 ns ; 2.122 ns ;
-; 3.836 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.695 ns ; 2.141 ns ;
-; 3.838 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.103 ns ; 3.735 ns ;
-; 3.839 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.101 ns ; 3.738 ns ;
-; 3.855 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.100 ns ; 3.755 ns ;
-; 3.866 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.103 ns ; 3.763 ns ;
-; 3.899 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.694 ns ; 2.205 ns ;
-; 3.902 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.699 ns ; 2.203 ns ;
-; 3.906 ns ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[2]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.578 ns ; -1.722 ns ; 2.184 ns ;
-; 3.916 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.104 ns ; 3.812 ns ;
-; 3.920 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.686 ns ; 2.234 ns ;
-; 3.932 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.686 ns ; 2.246 ns ;
-; 3.933 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.613 ns ; 2.320 ns ;
-; 3.935 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.696 ns ; 2.239 ns ;
-; 3.936 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.099 ns ; 3.837 ns ;
-; 3.944 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[23] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.694 ns ; 2.250 ns ;
-; 3.951 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.100 ns ; 3.851 ns ;
-; 3.973 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.101 ns ; 3.872 ns ;
-; 3.979 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.696 ns ; 2.283 ns ;
-; 3.989 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[31] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.693 ns ; 2.296 ns ;
-; 4.004 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.100 ns ; 3.904 ns ;
-; 4.029 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.098 ns ; 3.931 ns ;
-; 4.042 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[18]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.683 ns ; 2.359 ns ;
-; 4.043 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[17] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.685 ns ; 2.358 ns ;
-; 4.043 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.699 ns ; 2.344 ns ;
-; 4.048 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[16] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[16]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.696 ns ; 2.352 ns ;
-; 4.078 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[17]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.100 ns ; 3.978 ns ;
-; 4.084 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.104 ns ; 3.980 ns ;
-; 4.096 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.098 ns ; 3.998 ns ;
-; 4.110 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.104 ns ; 4.006 ns ;
-; 4.112 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.741 ns ; 2.371 ns ;
-; 4.112 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.689 ns ; 2.423 ns ;
-; 4.115 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[21]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.103 ns ; 4.012 ns ;
-; 4.117 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.103 ns ; 4.014 ns ;
-; 4.132 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.097 ns ; 4.035 ns ;
-; 4.168 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.739 ns ; 2.429 ns ;
-; 4.169 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.699 ns ; 2.470 ns ;
-; 4.185 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.731 ns ; 2.454 ns ;
-; 4.187 ns ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[2]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.578 ns ; -1.723 ns ; 2.464 ns ;
-; 4.195 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.764 ns ; 2.431 ns ;
-; 4.196 ns ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[3]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.578 ns ; -1.713 ns ; 2.483 ns ;
-; 4.201 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.754 ns ; 2.447 ns ;
-; 4.221 ns ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[3]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.578 ns ; -1.714 ns ; 2.507 ns ;
-; 4.231 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.614 ns ; 2.617 ns ;
-; 4.232 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.099 ns ; 4.133 ns ;
-; 4.232 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[31] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.674 ns ; 2.558 ns ;
-; 4.235 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.103 ns ; 4.132 ns ;
-; 4.236 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[27]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.102 ns ; 4.134 ns ;
-; 4.239 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[30] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.673 ns ; 2.566 ns ;
-; 4.243 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.764 ns ; 2.479 ns ;
-; 4.249 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[22] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.669 ns ; 2.580 ns ;
-; 4.251 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.099 ns ; 4.152 ns ;
-; 4.269 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.099 ns ; 4.170 ns ;
-; 4.283 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.098 ns ; 4.185 ns ;
-; 4.286 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.098 ns ; 4.188 ns ;
-; 4.296 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[20]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.670 ns ; 2.626 ns ;
-; 4.313 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[24] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[24]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.666 ns ; 2.647 ns ;
-; 4.314 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[29] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.691 ns ; 2.623 ns ;
-; 4.331 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.735 ns ; 2.596 ns ;
-; 4.333 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.145 ns ; 4.188 ns ;
-; 4.343 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.145 ns ; 4.198 ns ;
-; 4.347 ns ; Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_out0:inst2|altddio_out:altddio_out_component|ddio_out_are:auto_generated|ddio_outa[1]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.578 ns ; -1.665 ns ; 2.682 ns ;
-; 4.352 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[18]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.098 ns ; 4.254 ns ;
-; 4.352 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[23]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.100 ns ; 4.252 ns ;
-; 4.362 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.717 ns ; 2.645 ns ;
-; 4.367 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.759 ns ; 2.608 ns ;
-; 4.376 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.741 ns ; 2.635 ns ;
-; 4.384 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[22]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.102 ns ; 4.282 ns ;
-; 4.406 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.615 ns ; 2.791 ns ;
-; 4.409 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.764 ns ; 2.645 ns ;
-; 4.410 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.764 ns ; 2.646 ns ;
-; 4.411 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.159 ns ; 4.252 ns ;
-; 4.417 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.746 ns ; 2.671 ns ;
-; 4.425 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.100 ns ; 4.325 ns ;
-; 4.431 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[19] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[19]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.670 ns ; 2.761 ns ;
-; 4.434 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.739 ns ; 2.695 ns ;
-; 4.440 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.755 ns ; 2.685 ns ;
-; 4.450 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.731 ns ; 2.719 ns ;
-; 4.475 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.741 ns ; 2.734 ns ;
-; 4.477 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[26]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.672 ns ; 2.805 ns ;
-; 4.478 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.730 ns ; 2.748 ns ;
-; 4.480 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.757 ns ; 2.723 ns ;
-; 4.485 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.749 ns ; 2.736 ns ;
-; 4.486 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[25] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[25]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.672 ns ; 2.814 ns ;
-; 4.497 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.146 ns ; 4.351 ns ;
-; 4.498 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.169 ns ; 4.329 ns ;
-; 4.527 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.754 ns ; 2.773 ns ;
-; 4.530 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.739 ns ; 2.791 ns ;
-; 4.555 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.751 ns ; 2.804 ns ;
-; 4.556 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.163 ns ; 4.393 ns ;
-; 4.573 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.755 ns ; 2.818 ns ;
-; 4.587 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[31] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[31]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.615 ns ; 2.972 ns ;
-; 4.597 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.168 ns ; 4.429 ns ;
-; 4.600 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.735 ns ; 2.865 ns ;
-; 4.601 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.749 ns ; 2.852 ns ;
-; 4.601 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.168 ns ; 4.433 ns ;
-; 4.613 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[28] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[28]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.674 ns ; 2.939 ns ;
-; 4.614 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.759 ns ; 2.855 ns ;
-; 4.618 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.751 ns ; 2.867 ns ;
-; 4.623 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.159 ns ; 4.464 ns ;
-; 4.626 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.742 ns ; 2.884 ns ;
-; 4.630 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.740 ns ; 2.890 ns ;
-; 4.633 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.759 ns ; 2.874 ns ;
-; 4.636 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.150 ns ; 4.486 ns ;
-; 4.637 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.731 ns ; 2.906 ns ;
-; 4.660 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.749 ns ; 2.911 ns ;
-; 4.670 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.153 ns ; 4.517 ns ;
-; 4.671 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.164 ns ; 4.507 ns ;
-; 4.676 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.764 ns ; 2.912 ns ;
-; 4.677 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.745 ns ; 2.932 ns ;
-; 4.677 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[8]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.764 ns ; 2.913 ns ;
-; 4.686 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.746 ns ; 2.940 ns ;
-; 4.690 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.726 ns ; 2.964 ns ;
-; 4.697 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.168 ns ; 4.529 ns ;
-; 4.699 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -2.840 ns ; -2.874 ns ; 1.825 ns ;
-; 4.704 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.755 ns ; 2.949 ns ;
-; 4.709 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[18]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.664 ns ; 3.045 ns ;
-; 4.722 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[0] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.731 ns ; 2.991 ns ;
-; 4.749 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[0]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.146 ns ; 4.603 ns ;
-; 4.753 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.749 ns ; 3.004 ns ;
-; 4.780 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.155 ns ; 4.625 ns ;
-; 4.787 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.156 ns ; 4.631 ns ;
-; 4.791 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.153 ns ; 4.638 ns ;
-; 4.805 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.730 ns ; 3.075 ns ;
-; 4.809 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.169 ns ; 4.640 ns ;
-; 4.823 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.751 ns ; 3.072 ns ;
-; 4.825 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.163 ns ; 4.662 ns ;
-; 4.840 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[1] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[1]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.712 ns ; 3.128 ns ;
-; 4.844 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.735 ns ; 3.109 ns ;
-; 4.844 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.155 ns ; 4.689 ns ;
-; 4.845 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.154 ns ; 4.691 ns ;
-; 4.846 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.146 ns ; 4.700 ns ;
-; 4.863 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.755 ns ; 3.108 ns ;
-; 4.869 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.738 ns ; 3.131 ns ;
-; 4.871 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.749 ns ; 3.122 ns ;
-; 4.878 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.153 ns ; 4.725 ns ;
-; 4.881 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[10]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.169 ns ; 4.712 ns ;
-; 4.885 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.751 ns ; 3.134 ns ;
-; 4.888 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.156 ns ; 4.732 ns ;
-; 4.892 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.147 ns ; 4.745 ns ;
-; 4.892 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.742 ns ; 3.150 ns ;
-; 4.896 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[14]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.740 ns ; 3.156 ns ;
-; 4.906 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[12]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.731 ns ; 3.175 ns ;
-; 4.916 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR ; Video:Fredi_Aschwanden|inst90 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -2.840 ns ; -2.866 ns ; 2.050 ns ;
-; 4.916 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[15]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.151 ns ; 4.765 ns ;
-; 4.924 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.749 ns ; 3.175 ns ;
-; 4.942 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[6] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.745 ns ; 3.197 ns ;
-; 4.979 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[6]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.160 ns ; 4.819 ns ;
-; 5.007 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[5]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.754 ns ; 3.253 ns ;
-; 5.009 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFLO ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.759 ns ; 3.250 ns ;
-; 5.013 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[9] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[9]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.726 ns ; 3.287 ns ;
-; 5.029 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[3]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.164 ns ; 4.865 ns ;
-; 5.047 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[2] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.739 ns ; 3.308 ns ;
-; 5.088 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR ; Video:Fredi_Aschwanden|inst90~_Duplicate_3 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -2.840 ns ; -2.869 ns ; 2.219 ns ;
-; 5.096 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR ; Video:Fredi_Aschwanden|inst90~_Duplicate_1 ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -2.840 ns ; -2.933 ns ; 2.163 ns ;
-; 5.124 ns ; Video:Fredi_Aschwanden|inst90~_Duplicate_4 ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; 0.000 ns ; -0.154 ns ; 4.970 ns ;
-; 5.133 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[13] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[13]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.738 ns ; 3.395 ns ;
-; 5.143 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[11] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[11]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.722 ns ; 3.421 ns ;
-; 5.166 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[7]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.738 ns ; 3.428 ns ;
-; 5.205 ns ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[4]~DFFHI ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3] ; -1.576 ns ; -1.720 ns ; 3.485 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ;
-+-----------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]' ;
-+-----------------------------------------+---------------------------------------------------------------------------------+------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+-----------------------------------------+---------------------------------------------------------------------------------+------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; 2.664 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.448 ns ; 2.216 ns ;
-; 2.664 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.448 ns ; 2.216 ns ;
-; 2.664 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[3] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.448 ns ; 2.216 ns ;
-; 2.664 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[5] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.448 ns ; 2.216 ns ;
-; 2.679 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.447 ns ; 2.232 ns ;
-; 2.684 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[1] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.447 ns ; 2.237 ns ;
-; 2.686 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.448 ns ; 2.238 ns ;
-; 2.686 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[6] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.448 ns ; 2.238 ns ;
-; 2.686 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.448 ns ; 2.238 ns ;
-; 2.686 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[9] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.448 ns ; 2.238 ns ;
-; 2.714 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[11] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.450 ns ; 2.264 ns ;
-; 2.714 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[10] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.450 ns ; 2.264 ns ;
-; 2.716 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.450 ns ; 2.266 ns ;
-; 2.716 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[15] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.450 ns ; 2.266 ns ;
-; 2.716 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[14] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.450 ns ; 2.266 ns ;
-; 2.716 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[13] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.450 ns ; 2.266 ns ;
-; 2.769 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.450 ns ; 2.319 ns ;
-; 2.769 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.450 ns ; 2.319 ns ;
-; 2.790 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[21] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.449 ns ; 2.341 ns ;
-; 2.790 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[22] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.449 ns ; 2.341 ns ;
-; 2.790 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[23] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.449 ns ; 2.341 ns ;
-; 2.794 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[20] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.451 ns ; 2.343 ns ;
-; 2.794 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[24] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.451 ns ; 2.343 ns ;
-; 2.794 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.451 ns ; 2.343 ns ;
-; 2.794 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[16] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.451 ns ; 2.343 ns ;
-; 2.948 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -1.264 ns ; -1.316 ns ; 1.632 ns ;
-; 3.033 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[26] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.444 ns ; 2.589 ns ;
-; 3.033 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[25] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.444 ns ; 2.589 ns ;
-; 3.088 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.042 ns ; 3.046 ns ;
-; 3.100 ns ; FB_ALE ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[27] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.444 ns ; 2.656 ns ;
-; 3.146 ns ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; 0.000 ns ; -0.316 ns ; 2.830 ns ;
-; 6.237 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.309 ns ; 1.928 ns ;
-; 6.282 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.386 ns ; 1.896 ns ;
-; 6.650 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.288 ns ;
-; 6.650 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.288 ns ;
-; 6.650 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.288 ns ;
-; 6.650 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.288 ns ;
-; 6.650 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.288 ns ;
-; 6.650 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.288 ns ;
-; 6.650 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.288 ns ;
-; 6.650 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.288 ns ;
-; 6.650 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.288 ns ;
-; 6.738 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.361 ns ; 2.377 ns ;
-; 6.738 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.361 ns ; 2.377 ns ;
-; 6.738 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.361 ns ; 2.377 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.739 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.358 ns ;
-; 6.775 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.413 ns ;
-; 6.775 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.413 ns ;
-; 6.775 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.413 ns ;
-; 6.775 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.413 ns ;
-; 6.775 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.413 ns ;
-; 6.775 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.413 ns ;
-; 6.775 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.413 ns ;
-; 6.775 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.413 ns ;
-; 6.775 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.413 ns ;
-; 6.981 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.619 ns ;
-; 6.981 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.619 ns ;
-; 6.981 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.619 ns ;
-; 6.981 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.619 ns ;
-; 6.981 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.619 ns ;
-; 6.981 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.619 ns ;
-; 6.987 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.363 ns ; 2.624 ns ;
-; 6.987 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.363 ns ; 2.624 ns ;
-; 6.987 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.363 ns ; 2.624 ns ;
-; 7.023 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.363 ns ; 2.660 ns ;
-; 7.023 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.363 ns ; 2.660 ns ;
-; 7.023 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.363 ns ; 2.660 ns ;
-; 7.036 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.373 ns ; 2.663 ns ;
-; 7.036 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.373 ns ; 2.663 ns ;
-; 7.036 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.373 ns ; 2.663 ns ;
-; 7.036 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.373 ns ; 2.663 ns ;
-; 7.036 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.373 ns ; 2.663 ns ;
-; 7.036 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.373 ns ; 2.663 ns ;
-; 7.036 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.373 ns ; 2.663 ns ;
-; 7.043 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.681 ns ;
-; 7.043 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.681 ns ;
-; 7.043 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.362 ns ; 2.681 ns ;
-; 7.045 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.354 ns ; 2.691 ns ;
-; 7.045 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.354 ns ; 2.691 ns ;
-; 7.045 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.354 ns ; 2.691 ns ;
-; 7.045 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.354 ns ; 2.691 ns ;
-; 7.106 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.725 ns ;
-; 7.106 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.725 ns ;
-; 7.106 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.381 ns ; 2.725 ns ;
-; 7.218 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_WAIT ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.355 ns ; 2.863 ns ;
-; 7.413 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.650 ns ; 2.763 ns ;
-; 7.427 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.650 ns ; 2.777 ns ;
-; 7.430 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.804 ns ;
-; 7.430 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.804 ns ;
-; 7.430 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.804 ns ;
-; 7.430 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.804 ns ;
-; 7.430 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.804 ns ;
-; 7.430 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.804 ns ;
-; 7.430 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.804 ns ;
-; 7.430 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.804 ns ;
-; 7.430 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.804 ns ;
-; 7.478 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.018 ns ;
-; 7.478 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.018 ns ;
-; 7.478 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.018 ns ;
-; 7.478 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.018 ns ;
-; 7.478 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.018 ns ;
-; 7.478 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.018 ns ;
-; 7.478 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.018 ns ;
-; 7.478 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.018 ns ;
-; 7.478 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.018 ns ;
-; 7.478 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.018 ns ;
-; 7.508 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.048 ns ;
-; 7.508 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.048 ns ;
-; 7.508 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.048 ns ;
-; 7.508 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.048 ns ;
-; 7.508 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.048 ns ;
-; 7.508 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.048 ns ;
-; 7.508 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.048 ns ;
-; 7.508 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.048 ns ;
-; 7.512 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.052 ns ;
-; 7.512 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.052 ns ;
-; 7.512 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.052 ns ;
-; 7.512 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.052 ns ;
-; 7.512 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.052 ns ;
-; 7.512 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.052 ns ;
-; 7.512 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.052 ns ;
-; 7.512 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.052 ns ;
-; 7.518 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.625 ns ; 2.893 ns ;
-; 7.518 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.625 ns ; 2.893 ns ;
-; 7.518 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.625 ns ; 2.893 ns ;
-; 7.524 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.064 ns ;
-; 7.524 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.064 ns ;
-; 7.524 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.064 ns ;
-; 7.524 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.064 ns ;
-; 7.524 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.064 ns ;
-; 7.524 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.064 ns ;
-; 7.524 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.064 ns ;
-; 7.524 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.064 ns ;
-; 7.531 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.071 ns ;
-; 7.531 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.071 ns ;
-; 7.531 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.071 ns ;
-; 7.531 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.071 ns ;
-; 7.531 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.071 ns ;
-; 7.531 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.071 ns ;
-; 7.555 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.929 ns ;
-; 7.555 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.929 ns ;
-; 7.555 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.929 ns ;
-; 7.555 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.929 ns ;
-; 7.555 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.929 ns ;
-; 7.555 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.929 ns ;
-; 7.555 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.929 ns ;
-; 7.555 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.929 ns ;
-; 7.555 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.626 ns ; 2.929 ns ;
-; 7.561 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.101 ns ;
-; 7.561 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.101 ns ;
-; 7.561 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.101 ns ;
-; 7.561 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.101 ns ;
-; 7.561 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.101 ns ;
-; 7.561 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.101 ns ;
-; 7.561 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.101 ns ;
-; 7.561 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.460 ns ; 3.101 ns ;
-; 7.571 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.622 ns ; 2.949 ns ;
-; 7.571 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.622 ns ; 2.949 ns ;
-; 7.571 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.622 ns ; 2.949 ns ;
-; 7.571 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.622 ns ; 2.949 ns ;
-; 7.598 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.471 ns ; 3.127 ns ;
-; 7.598 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.471 ns ; 3.127 ns ;
-; 7.598 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.471 ns ; 3.127 ns ;
-; 7.598 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.471 ns ; 3.127 ns ;
-; 7.598 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.471 ns ; 3.127 ns ;
-; 7.598 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.471 ns ; 3.127 ns ;
-; 7.598 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.471 ns ; 3.127 ns ;
-; 7.598 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.471 ns ; 3.127 ns ;
-; 7.598 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.471 ns ; 3.127 ns ;
-; 7.629 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.278 ns ;
-; 7.629 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.278 ns ;
-; 7.629 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.278 ns ;
-; 7.629 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.278 ns ;
-; 7.629 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.278 ns ;
-; 7.629 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.278 ns ;
-; 7.629 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.278 ns ;
-; 7.629 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.278 ns ;
-; 7.629 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.278 ns ;
-; 7.629 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.278 ns ;
-; 7.675 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.324 ns ;
-; 7.675 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.324 ns ;
-; 7.675 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.324 ns ;
-; 7.675 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.324 ns ;
-; 7.675 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.324 ns ;
-; 7.675 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.324 ns ;
-; 7.675 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.324 ns ;
-; 7.675 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.351 ns ; 3.324 ns ;
-; 7.686 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ; altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4] ; -4.884 ns ; -4.470 ns ; 3.216 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ;
-+-----------------------------------------+---------------------------------------------------------------------------------+------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]' ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[5] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[4] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[3] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[2] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[1] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DISP_ON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DISP_ON ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[1] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SUB_PIXEL_CNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SUB_PIXEL_CNT[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a7 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a7 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a1 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a1 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a4 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a4 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a5 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a5 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a0 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a2 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a2 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a6 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a6 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a3 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a3 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 0.502 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 0.460 ns ;
-; 1.487 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[45] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe29 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.443 ns ;
-; 1.492 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC ; altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated|ddio_outa[0]~DFFHI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 1.447 ns ; 2.939 ns ;
-; 1.494 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe48 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.450 ns ;
-; 1.494 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe28 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.450 ns ;
-; 1.497 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe30 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.453 ns ;
-; 1.507 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[1] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[33] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.048 ns ; 1.459 ns ;
-; 1.512 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[62] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.009 ns ; 1.503 ns ;
-; 1.513 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[35] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.004 ns ; 1.517 ns ;
-; 1.515 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[19] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[35] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.471 ns ;
-; 1.515 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYNC_PIX2 ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.021 ns ; 1.494 ns ;
-; 1.516 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[5] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[23] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.373 ns ; 1.143 ns ;
-; 1.516 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[11] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.040 ns ; 1.476 ns ;
-; 1.517 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.478 ns ;
-; 1.520 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[11] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.386 ns ; 1.134 ns ;
-; 1.523 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[79] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.009 ns ; 1.514 ns ;
-; 1.526 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.040 ns ; 1.486 ns ;
-; 1.529 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe16 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[3] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.051 ns ; 1.478 ns ;
-; 1.532 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|sub_parity7a[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|parity6 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.027 ns ; 1.505 ns ;
-; 1.534 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[19] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[19] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.490 ns ;
-; 1.535 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe29 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.493 ns ;
-; 1.536 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.328 ns ; 1.864 ns ;
-; 1.539 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe48 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[23] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.037 ns ; 1.502 ns ;
-; 1.539 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[13] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.372 ns ; 1.167 ns ;
-; 1.539 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe8 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.045 ns ; 1.494 ns ;
-; 1.540 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[93] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.011 ns ; 1.551 ns ;
-; 1.541 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[3] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.045 ns ; 1.496 ns ;
-; 1.542 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[27] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component|dffs[11] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.500 ns ;
-; 1.544 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe49 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[23] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.040 ns ; 1.504 ns ;
-; 1.545 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[11] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.050 ns ; 1.495 ns ;
-; 1.545 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe23 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.047 ns ; 1.498 ns ;
-; 1.546 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.504 ns ;
-; 1.547 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.328 ns ; 1.875 ns ;
-; 1.548 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[15] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.041 ns ; 1.507 ns ;
-; 1.548 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.027 ns ; 1.521 ns ;
-; 1.553 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe32 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.511 ns ;
-; 1.556 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[18] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[50] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.517 ns ;
-; 1.556 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[82] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe6 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.032 ns ; 1.524 ns ;
-; 1.556 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.035 ns ; 1.521 ns ;
-; 1.556 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.326 ns ; 1.882 ns ;
-; 1.557 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[55] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[87] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.513 ns ;
-; 1.557 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe16 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[7] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.030 ns ; 1.527 ns ;
-; 1.560 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[48] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.009 ns ; 1.551 ns ;
-; 1.564 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe22 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.040 ns ; 1.524 ns ;
-; 1.564 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[5] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.522 ns ;
-; 1.565 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC ; altddio_out3:inst6|altddio_out:altddio_out_component|ddio_out_31f:auto_generated|ddio_outa[0]~DFFHI ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 1.445 ns ; 3.010 ns ;
-; 1.566 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.328 ns ; 1.894 ns ;
-; 1.567 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe9 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[1] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.528 ns ;
-; 1.569 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.527 ns ;
-; 1.569 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[7] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.530 ns ;
-; 1.569 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[125] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.011 ns ; 1.580 ns ;
-; 1.570 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.526 ns ;
-; 1.570 ns ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe15 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.526 ns ;
-; 1.570 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.531 ns ;
-; 1.570 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[36] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.009 ns ; 1.561 ns ;
-; 1.570 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.531 ns ;
-; 1.573 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe13 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.534 ns ;
-; 1.574 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[16] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.006 ns ; 1.580 ns ;
-; 1.575 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.035 ns ; 1.540 ns ;
-; 1.576 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[5] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.035 ns ; 1.541 ns ;
-; 1.576 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[7] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.534 ns ;
-; 1.576 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.035 ns ; 1.541 ns ;
-; 1.578 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[26] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[42] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.036 ns ; 1.542 ns ;
-; 1.578 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe12 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[5] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.539 ns ;
-; 1.578 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.032 ns ; 1.546 ns ;
-; 1.578 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[88] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[88] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.359 ns ; 1.219 ns ;
-; 1.578 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_AV[1][0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.050 ns ; 1.528 ns ;
-; 1.579 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[38] ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.537 ns ;
-; 1.579 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.035 ns ; 1.544 ns ;
-; 1.579 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~porta_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.327 ns ; 1.906 ns ;
-; 1.582 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.035 ns ; 1.547 ns ;
-; 1.582 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[8] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.032 ns ; 1.550 ns ;
-; 1.582 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[11] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.032 ns ; 1.550 ns ;
-; 1.583 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.035 ns ; 1.548 ns ;
-; 1.583 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.032 ns ; 1.551 ns ;
-; 1.583 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[3] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe1a[3] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.544 ns ;
-; 1.584 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe42 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.041 ns ; 1.543 ns ;
-; 1.584 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe15 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.041 ns ; 1.543 ns ;
-; 1.584 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.328 ns ; 1.912 ns ;
-; 1.584 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe12 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.545 ns ;
-; 1.584 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[20] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[36] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.541 ns ;
-; 1.585 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.035 ns ; 1.550 ns ;
-; 1.585 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.035 ns ; 1.550 ns ;
-; 1.585 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.032 ns ; 1.553 ns ;
-; 1.586 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.544 ns ;
-; 1.586 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[7] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.032 ns ; 1.554 ns ;
-; 1.587 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe38 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.545 ns ;
-; 1.588 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[96] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[96] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.368 ns ; 1.220 ns ;
-; 1.589 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[54] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[86] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.546 ns ;
-; 1.589 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|RAND[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|RAND[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.040 ns ; 1.549 ns ;
-; 1.592 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[43] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe25 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.047 ns ; 1.545 ns ;
-; 1.593 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[117] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[21] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.551 ns ;
-; 1.593 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe33 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[7] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.551 ns ;
-; 1.594 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[5] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[37] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.555 ns ;
-; 1.594 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[25] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.045 ns ; 1.549 ns ;
-; 1.594 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[71] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[103] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.552 ns ;
-; 1.595 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe39 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[18] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.556 ns ;
-; 1.595 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.040 ns ; 1.555 ns ;
-; 1.597 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[16] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[16] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.558 ns ;
-; 1.597 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[101] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[5] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.555 ns ;
-; 1.598 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.040 ns ; 1.558 ns ;
-; 1.599 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[111] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[15] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.557 ns ;
-; 1.600 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe30 ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[14] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.558 ns ;
-; 1.600 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[124] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.011 ns ; 1.611 ns ;
-; 1.601 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[9] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.557 ns ;
-; 1.602 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[75] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[107] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.560 ns ;
-; 1.602 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[8] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[8] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.370 ns ; 1.232 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe20 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[4] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.561 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[4] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[5] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[9] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[8] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[10] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[11] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[7] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[3] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.603 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[1] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.046 ns ; 1.557 ns ;
-; 1.604 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[7] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.049 ns ; 1.555 ns ;
-; 1.604 ns ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|q_b[1] ; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.379 ns ; 1.225 ns ;
-; 1.604 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[114] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.560 ns ;
-; 1.604 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[11] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.049 ns ; 1.555 ns ;
-; 1.604 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[103] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[7] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.562 ns ;
-; 1.605 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[49] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[81] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.566 ns ;
-; 1.605 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe42 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.038 ns ; 1.567 ns ;
-; 1.605 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[119] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[23] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.563 ns ;
-; 1.606 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe26 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.038 ns ; 1.568 ns ;
-; 1.606 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[107] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[107] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.386 ns ; 1.220 ns ;
-; 1.607 ns ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|q_b[0] ; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[5] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.379 ns ; 1.228 ns ;
-; 1.607 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC ; altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated|ddio_outa[0]~DFFLO ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 1.448 ns ; 3.055 ns ;
-; 1.608 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe40 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[19] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.032 ns ; 1.576 ns ;
-; 1.609 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[77] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe28 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.567 ns ;
-; 1.609 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component|dffs[5] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.567 ns ;
-; 1.611 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[19] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.009 ns ; 1.602 ns ;
-; 1.612 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[1] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[19] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.371 ns ; 1.241 ns ;
-; 1.612 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.326 ns ; 1.938 ns ;
-; 1.613 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe41 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[19] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.032 ns ; 1.581 ns ;
-; 1.613 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.571 ns ;
-; 1.614 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[46] ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[14] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.051 ns ; 1.563 ns ;
-; 1.614 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.572 ns ;
-; 1.615 ns ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe29 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.050 ns ; 1.565 ns ;
-; 1.616 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[28] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.011 ns ; 1.627 ns ;
-; 1.617 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[30] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.009 ns ; 1.608 ns ;
-; 1.617 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.575 ns ;
-; 1.618 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[1] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe22 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.041 ns ; 1.577 ns ;
-; 1.618 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[100] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[4] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.044 ns ; 1.574 ns ;
-; 1.618 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.576 ns ;
-; 1.618 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[0][3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[0][4] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.038 ns ; 1.580 ns ;
-; 1.619 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[12] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.040 ns ; 1.579 ns ;
-; 1.619 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[44] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.009 ns ; 1.610 ns ;
-; 1.620 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[13] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe29 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.045 ns ; 1.575 ns ;
-; 1.620 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[21] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.026 ns ; 1.594 ns ;
-; 1.620 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[13] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[45] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.050 ns ; 1.570 ns ;
-; 1.620 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[1] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe9 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.036 ns ; 1.584 ns ;
-; 1.621 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe37 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[17] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.582 ns ;
-; 1.621 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[1] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe33 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.579 ns ;
-; 1.621 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[8] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[40] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.578 ns ;
-; 1.622 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe4 ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[1] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.580 ns ;
-; 1.622 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.580 ns ;
-; 1.623 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe24 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[11] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.581 ns ;
-; 1.623 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[109] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[13] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.581 ns ;
-; 1.623 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[1] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[1] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.036 ns ; 1.587 ns ;
-; 1.623 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[0] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[16] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.580 ns ;
-; 1.623 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[12] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.011 ns ; 1.634 ns ;
-; 1.625 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[21] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.371 ns ; 1.254 ns ;
-; 1.625 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[106] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[10] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.043 ns ; 1.582 ns ;
-; 1.625 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[6] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.328 ns ; 1.953 ns ;
-; 1.625 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[117] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; 0.011 ns ; 1.636 ns ;
-; 1.625 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[5] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe25 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.583 ns ;
-; 1.626 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[33] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[65] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.584 ns ;
-; 1.626 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[3] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[35] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.039 ns ; 1.587 ns ;
-; 1.627 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[17] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[49] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.041 ns ; 1.586 ns ;
-; 1.627 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[99] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe8 ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.048 ns ; 1.579 ns ;
-; 1.627 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0] ; 0.000 ns ; -0.042 ns ; 1.585 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------+--------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'CLK33M' ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[5] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[4] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[3] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[2] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[2] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[1] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[0] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DISP_ON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DISP_ON ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[0] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[1] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[0] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SUB_PIXEL_CNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SUB_PIXEL_CNT[0] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a7 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a7 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a1 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a1 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a4 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a4 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a5 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a5 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a0 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a2 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a2 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a6 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a6 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a3 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a3 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; -0.687 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 0.460 ns ;
-; 0.298 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[45] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe29 ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.443 ns ;
-; 0.303 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC ; altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated|ddio_outa[0]~DFFHI ; CLK33M ; CLK33M ; 0.000 ns ; 2.636 ns ; 2.939 ns ;
-; 0.305 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe48 ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.450 ns ;
-; 0.305 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe28 ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.450 ns ;
-; 0.308 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe30 ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.453 ns ;
-; 0.318 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[1] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[33] ; CLK33M ; CLK33M ; 0.000 ns ; 1.141 ns ; 1.459 ns ;
-; 0.323 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[62] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.180 ns ; 1.503 ns ;
-; 0.324 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[35] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.193 ns ; 1.517 ns ;
-; 0.326 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[19] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[35] ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.471 ns ;
-; 0.326 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYNC_PIX2 ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; CLK33M ; CLK33M ; 0.000 ns ; 1.168 ns ; 1.494 ns ;
-; 0.327 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[5] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[23] ; CLK33M ; CLK33M ; 0.000 ns ; 0.816 ns ; 1.143 ns ;
-; 0.327 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[11] ; CLK33M ; CLK33M ; 0.000 ns ; 1.149 ns ; 1.476 ns ;
-; 0.328 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.478 ns ;
-; 0.331 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[11] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; CLK33M ; CLK33M ; 0.000 ns ; 0.803 ns ; 1.134 ns ;
-; 0.334 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[79] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.180 ns ; 1.514 ns ;
-; 0.337 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; CLK33M ; CLK33M ; 0.000 ns ; 1.149 ns ; 1.486 ns ;
-; 0.340 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe16 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[3] ; CLK33M ; CLK33M ; 0.000 ns ; 1.138 ns ; 1.478 ns ;
-; 0.343 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|sub_parity7a[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|parity6 ; CLK33M ; CLK33M ; 0.000 ns ; 1.162 ns ; 1.505 ns ;
-; 0.345 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[19] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[19] ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.490 ns ;
-; 0.346 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe29 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[6] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.493 ns ;
-; 0.347 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.517 ns ; 1.864 ns ;
-; 0.350 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe48 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[23] ; CLK33M ; CLK33M ; 0.000 ns ; 1.152 ns ; 1.502 ns ;
-; 0.350 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[13] ; CLK33M ; CLK33M ; 0.000 ns ; 0.817 ns ; 1.167 ns ;
-; 0.350 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe8 ; CLK33M ; CLK33M ; 0.000 ns ; 1.144 ns ; 1.494 ns ;
-; 0.351 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[93] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.200 ns ; 1.551 ns ;
-; 0.352 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[3] ; CLK33M ; CLK33M ; 0.000 ns ; 1.144 ns ; 1.496 ns ;
-; 0.353 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[27] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component|dffs[11] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.500 ns ;
-; 0.355 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe49 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[23] ; CLK33M ; CLK33M ; 0.000 ns ; 1.149 ns ; 1.504 ns ;
-; 0.356 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[11] ; CLK33M ; CLK33M ; 0.000 ns ; 1.139 ns ; 1.495 ns ;
-; 0.356 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe23 ; CLK33M ; CLK33M ; 0.000 ns ; 1.142 ns ; 1.498 ns ;
-; 0.357 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.504 ns ;
-; 0.358 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.517 ns ; 1.875 ns ;
-; 0.359 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[15] ; CLK33M ; CLK33M ; 0.000 ns ; 1.148 ns ; 1.507 ns ;
-; 0.359 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; CLK33M ; CLK33M ; 0.000 ns ; 1.162 ns ; 1.521 ns ;
-; 0.364 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe32 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.511 ns ;
-; 0.367 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[18] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[50] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.517 ns ;
-; 0.367 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[82] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe6 ; CLK33M ; CLK33M ; 0.000 ns ; 1.157 ns ; 1.524 ns ;
-; 0.367 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; CLK33M ; CLK33M ; 0.000 ns ; 1.154 ns ; 1.521 ns ;
-; 0.367 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_address_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.515 ns ; 1.882 ns ;
-; 0.368 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[55] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[87] ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.513 ns ;
-; 0.368 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe16 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[7] ; CLK33M ; CLK33M ; 0.000 ns ; 1.159 ns ; 1.527 ns ;
-; 0.371 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[48] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.180 ns ; 1.551 ns ;
-; 0.375 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe22 ; CLK33M ; CLK33M ; 0.000 ns ; 1.149 ns ; 1.524 ns ;
-; 0.375 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[5] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.522 ns ;
-; 0.376 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC ; altddio_out3:inst6|altddio_out:altddio_out_component|ddio_out_31f:auto_generated|ddio_outa[0]~DFFHI ; CLK33M ; CLK33M ; 0.000 ns ; 2.634 ns ; 3.010 ns ;
-; 0.377 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_address_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.517 ns ; 1.894 ns ;
-; 0.378 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe9 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[1] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.528 ns ;
-; 0.380 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.527 ns ;
-; 0.380 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[7] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.530 ns ;
-; 0.380 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[125] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.200 ns ; 1.580 ns ;
-; 0.381 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[6] ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.526 ns ;
-; 0.381 ns ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe15 ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.526 ns ;
-; 0.381 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.531 ns ;
-; 0.381 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[36] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.180 ns ; 1.561 ns ;
-; 0.381 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.531 ns ;
-; 0.384 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe13 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[2] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.534 ns ;
-; 0.385 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[16] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.195 ns ; 1.580 ns ;
-; 0.386 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; CLK33M ; CLK33M ; 0.000 ns ; 1.154 ns ; 1.540 ns ;
-; 0.387 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[5] ; CLK33M ; CLK33M ; 0.000 ns ; 1.154 ns ; 1.541 ns ;
-; 0.387 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[7] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.534 ns ;
-; 0.387 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; CLK33M ; CLK33M ; 0.000 ns ; 1.154 ns ; 1.541 ns ;
-; 0.389 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[26] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[42] ; CLK33M ; CLK33M ; 0.000 ns ; 1.153 ns ; 1.542 ns ;
-; 0.389 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe12 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[5] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.539 ns ;
-; 0.389 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; CLK33M ; CLK33M ; 0.000 ns ; 1.157 ns ; 1.546 ns ;
-; 0.389 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[88] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[88] ; CLK33M ; CLK33M ; 0.000 ns ; 0.830 ns ; 1.219 ns ;
-; 0.389 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_AV[1][0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[0] ; CLK33M ; CLK33M ; 0.000 ns ; 1.139 ns ; 1.528 ns ;
-; 0.390 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[38] ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[6] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.537 ns ;
-; 0.390 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; CLK33M ; CLK33M ; 0.000 ns ; 1.154 ns ; 1.544 ns ;
-; 0.390 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~porta_address_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.516 ns ; 1.906 ns ;
-; 0.393 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; CLK33M ; CLK33M ; 0.000 ns ; 1.154 ns ; 1.547 ns ;
-; 0.393 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[8] ; CLK33M ; CLK33M ; 0.000 ns ; 1.157 ns ; 1.550 ns ;
-; 0.393 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[11] ; CLK33M ; CLK33M ; 0.000 ns ; 1.157 ns ; 1.550 ns ;
-; 0.394 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; CLK33M ; CLK33M ; 0.000 ns ; 1.154 ns ; 1.548 ns ;
-; 0.394 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; CLK33M ; CLK33M ; 0.000 ns ; 1.157 ns ; 1.551 ns ;
-; 0.394 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[3] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe1a[3] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.544 ns ;
-; 0.395 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[20] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe42 ; CLK33M ; CLK33M ; 0.000 ns ; 1.148 ns ; 1.543 ns ;
-; 0.395 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe15 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[6] ; CLK33M ; CLK33M ; 0.000 ns ; 1.148 ns ; 1.543 ns ;
-; 0.395 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_address_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.517 ns ; 1.912 ns ;
-; 0.395 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe12 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[2] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.545 ns ;
-; 0.395 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[20] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[36] ; CLK33M ; CLK33M ; 0.000 ns ; 1.146 ns ; 1.541 ns ;
-; 0.396 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; CLK33M ; CLK33M ; 0.000 ns ; 1.154 ns ; 1.550 ns ;
-; 0.396 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; CLK33M ; CLK33M ; 0.000 ns ; 1.154 ns ; 1.550 ns ;
-; 0.396 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; CLK33M ; CLK33M ; 0.000 ns ; 1.157 ns ; 1.553 ns ;
-; 0.397 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.544 ns ;
-; 0.397 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr2|lpm_shiftreg:lpm_shiftreg_component|dffs[7] ; CLK33M ; CLK33M ; 0.000 ns ; 1.157 ns ; 1.554 ns ;
-; 0.398 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[18] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe38 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.545 ns ;
-; 0.399 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[96] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[96] ; CLK33M ; CLK33M ; 0.000 ns ; 0.821 ns ; 1.220 ns ;
-; 0.400 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[54] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[86] ; CLK33M ; CLK33M ; 0.000 ns ; 1.146 ns ; 1.546 ns ;
-; 0.400 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|RAND[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|RAND[6] ; CLK33M ; CLK33M ; 0.000 ns ; 1.149 ns ; 1.549 ns ;
-; 0.403 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[43] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe25 ; CLK33M ; CLK33M ; 0.000 ns ; 1.142 ns ; 1.545 ns ;
-; 0.404 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[117] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[21] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.551 ns ;
-; 0.404 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe33 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[7] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.551 ns ;
-; 0.405 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[5] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[37] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.555 ns ;
-; 0.405 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[25] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; CLK33M ; CLK33M ; 0.000 ns ; 1.144 ns ; 1.549 ns ;
-; 0.405 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[71] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[103] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.552 ns ;
-; 0.406 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe39 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[18] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.556 ns ;
-; 0.406 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; CLK33M ; CLK33M ; 0.000 ns ; 1.149 ns ; 1.555 ns ;
-; 0.408 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[16] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[16] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.558 ns ;
-; 0.408 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[101] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[5] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.555 ns ;
-; 0.409 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; CLK33M ; CLK33M ; 0.000 ns ; 1.149 ns ; 1.558 ns ;
-; 0.410 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[111] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[15] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.557 ns ;
-; 0.411 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe30 ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[14] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.558 ns ;
-; 0.411 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[124] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.200 ns ; 1.611 ns ;
-; 0.412 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[9] ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.557 ns ;
-; 0.413 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[75] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[107] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.560 ns ;
-; 0.413 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[8] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[8] ; CLK33M ; CLK33M ; 0.000 ns ; 0.819 ns ; 1.232 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe20 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[4] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.561 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[4] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[5] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[9] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[8] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[10] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[11] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[6] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[7] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[2] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[3] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.414 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[1] ; CLK33M ; CLK33M ; 0.000 ns ; 1.143 ns ; 1.557 ns ;
-; 0.415 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[7] ; CLK33M ; CLK33M ; 0.000 ns ; 1.140 ns ; 1.555 ns ;
-; 0.415 ns ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|q_b[1] ; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[6] ; CLK33M ; CLK33M ; 0.000 ns ; 0.810 ns ; 1.225 ns ;
-; 0.415 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[114] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[2] ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.560 ns ;
-; 0.415 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr3|lpm_shiftreg:lpm_shiftreg_component|dffs[11] ; CLK33M ; CLK33M ; 0.000 ns ; 1.140 ns ; 1.555 ns ;
-; 0.415 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[103] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[7] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.562 ns ;
-; 0.416 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[49] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[81] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.566 ns ;
-; 0.416 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe42 ; CLK33M ; CLK33M ; 0.000 ns ; 1.151 ns ; 1.567 ns ;
-; 0.416 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[119] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[23] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.563 ns ;
-; 0.417 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe26 ; CLK33M ; CLK33M ; 0.000 ns ; 1.151 ns ; 1.568 ns ;
-; 0.417 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[107] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[107] ; CLK33M ; CLK33M ; 0.000 ns ; 0.803 ns ; 1.220 ns ;
-; 0.418 ns ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|q_b[0] ; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[5] ; CLK33M ; CLK33M ; 0.000 ns ; 0.810 ns ; 1.228 ns ;
-; 0.418 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC ; altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated|ddio_outa[0]~DFFLO ; CLK33M ; CLK33M ; 0.000 ns ; 2.637 ns ; 3.055 ns ;
-; 0.419 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe40 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[19] ; CLK33M ; CLK33M ; 0.000 ns ; 1.157 ns ; 1.576 ns ;
-; 0.420 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[77] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe28 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.567 ns ;
-; 0.420 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component|dffs[5] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr7|lpm_shiftreg:lpm_shiftreg_component|dffs[6] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.567 ns ;
-; 0.422 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[19] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.180 ns ; 1.602 ns ;
-; 0.423 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[1] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[19] ; CLK33M ; CLK33M ; 0.000 ns ; 0.818 ns ; 1.241 ns ;
-; 0.423 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_address_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.515 ns ; 1.938 ns ;
-; 0.424 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe41 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[19] ; CLK33M ; CLK33M ; 0.000 ns ; 1.157 ns ; 1.581 ns ;
-; 0.424 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[10] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.571 ns ;
-; 0.425 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[46] ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[14] ; CLK33M ; CLK33M ; 0.000 ns ; 1.138 ns ; 1.563 ns ;
-; 0.425 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.572 ns ;
-; 0.426 ns ; Video:Fredi_Aschwanden|lpm_ff4:inst10|lpm_ff:lpm_ff_component|dffs[8] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe29 ; CLK33M ; CLK33M ; 0.000 ns ; 1.139 ns ; 1.565 ns ;
-; 0.427 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[28] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.200 ns ; 1.627 ns ;
-; 0.428 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[30] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.180 ns ; 1.608 ns ;
-; 0.428 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[14] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.575 ns ;
-; 0.429 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[1] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe22 ; CLK33M ; CLK33M ; 0.000 ns ; 1.148 ns ; 1.577 ns ;
-; 0.429 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[100] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[4] ; CLK33M ; CLK33M ; 0.000 ns ; 1.145 ns ; 1.574 ns ;
-; 0.429 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.576 ns ;
-; 0.429 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[0][3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[0][4] ; CLK33M ; CLK33M ; 0.000 ns ; 1.151 ns ; 1.580 ns ;
-; 0.430 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_ff3:inst46|lpm_ff:lpm_ff_component|dffs[12] ; CLK33M ; CLK33M ; 0.000 ns ; 1.149 ns ; 1.579 ns ;
-; 0.430 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[44] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.180 ns ; 1.610 ns ;
-; 0.431 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[13] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe29 ; CLK33M ; CLK33M ; 0.000 ns ; 1.144 ns ; 1.575 ns ;
-; 0.431 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst52|lpm_ff:lpm_ff_component|dffs[21] ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[21] ; CLK33M ; CLK33M ; 0.000 ns ; 1.163 ns ; 1.594 ns ;
-; 0.431 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[13] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[45] ; CLK33M ; CLK33M ; 0.000 ns ; 1.139 ns ; 1.570 ns ;
-; 0.431 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[1] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe9 ; CLK33M ; CLK33M ; 0.000 ns ; 1.153 ns ; 1.584 ns ;
-; 0.432 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe37 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[17] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.582 ns ;
-; 0.432 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLUT_MUX_ADR[1] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe33 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.579 ns ;
-; 0.432 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[8] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[40] ; CLK33M ; CLK33M ; 0.000 ns ; 1.146 ns ; 1.578 ns ;
-; 0.433 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe4 ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[1] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.580 ns ;
-; 0.433 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component|dffs[0] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component|dffs[1] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.580 ns ;
-; 0.434 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe24 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[11] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.581 ns ;
-; 0.434 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[109] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[13] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.581 ns ;
-; 0.434 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[1] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[1] ; CLK33M ; CLK33M ; 0.000 ns ; 1.153 ns ; 1.587 ns ;
-; 0.434 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[0] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[16] ; CLK33M ; CLK33M ; 0.000 ns ; 1.146 ns ; 1.580 ns ;
-; 0.434 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[12] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.200 ns ; 1.634 ns ;
-; 0.436 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[21] ; CLK33M ; CLK33M ; 0.000 ns ; 0.818 ns ; 1.254 ns ;
-; 0.436 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[106] ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[10] ; CLK33M ; CLK33M ; 0.000 ns ; 1.146 ns ; 1.582 ns ;
-; 0.436 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[6] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.517 ns ; 1.953 ns ;
-; 0.436 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[117] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; CLK33M ; CLK33M ; 0.000 ns ; 1.200 ns ; 1.636 ns ;
-; 0.436 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[5] ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe25 ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.583 ns ;
-; 0.437 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[33] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[65] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.584 ns ;
-; 0.437 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[3] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[35] ; CLK33M ; CLK33M ; 0.000 ns ; 1.150 ns ; 1.587 ns ;
-; 0.438 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[17] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[49] ; CLK33M ; CLK33M ; 0.000 ns ; 1.148 ns ; 1.586 ns ;
-; 0.438 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[99] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe8 ; CLK33M ; CLK33M ; 0.000 ns ; 1.141 ns ; 1.579 ns ;
-; 0.438 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr4|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; CLK33M ; CLK33M ; 0.000 ns ; 1.147 ns ; 1.585 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clock Hold: 'MAIN_CLK' ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
-; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
-; -3.786 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[1][0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.716 ns ; 1.930 ns ;
-; -3.611 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.756 ns ; 2.145 ns ;
-; -3.448 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[2][0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.709 ns ; 2.261 ns ;
-; -3.293 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|RAND[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.327 ns ; 1.034 ns ;
-; -3.012 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.706 ns ; 2.694 ns ;
-; -2.912 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.706 ns ; 2.794 ns ;
-; -2.048 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[6] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.740 ns ; 1.692 ns ;
-; -1.996 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[19] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe41 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.143 ns ; 1.147 ns ;
-; -1.985 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[2] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.356 ns ; 1.371 ns ;
-; -1.961 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[15] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[2][0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.104 ns ; 1.143 ns ;
-; -1.958 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[23] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe49 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.142 ns ; 1.184 ns ;
-; -1.934 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.356 ns ; 1.422 ns ;
-; -1.923 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[3] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.356 ns ; 1.433 ns ;
-; -1.867 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[21] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe45 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.143 ns ; 1.276 ns ;
-; -1.842 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[4] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.356 ns ; 1.514 ns ;
-; -1.835 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[11] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe25 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.390 ns ; 1.555 ns ;
-; -1.795 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[13] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe29 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.392 ns ; 1.597 ns ;
-; -1.749 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[10] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe23 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.390 ns ; 1.641 ns ;
-; -1.745 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[12] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe27 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.392 ns ; 1.647 ns ;
-; -1.641 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.348 ns ; 1.707 ns ;
-; -1.595 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.204 ns ; 1.609 ns ;
-; -1.569 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[22] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe47 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.142 ns ; 1.573 ns ;
-; -1.508 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[15] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[1][0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.111 ns ; 1.603 ns ;
-; -1.350 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[14] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe31 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.398 ns ; 2.048 ns ;
-; -1.326 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.623 ns ; 2.297 ns ;
-; -1.242 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[20] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe43 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.145 ns ; 1.903 ns ;
-; -1.234 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DOP_ZEI ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.973 ns ; 0.739 ns ;
-; -1.159 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[5] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe13 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.081 ns ; 1.922 ns ;
-; -1.152 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[16] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe35 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.141 ns ; 1.989 ns ;
-; -1.113 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[7] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.740 ns ; 2.627 ns ;
-; -1.095 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[17] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe37 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.141 ns ; 2.046 ns ;
-; -1.072 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[8] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe19 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.362 ns ; 2.290 ns ;
-; -1.055 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[18] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe39 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.141 ns ; 2.086 ns ;
-; -1.001 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DOP_ZEI ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.966 ns ; 0.965 ns ;
-; -0.993 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.303 ns ; 1.310 ns ;
-; -0.961 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[6] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe15 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.081 ns ; 2.120 ns ;
-; -0.918 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[15] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe33 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.364 ns ; 2.446 ns ;
-; -0.893 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.350 ns ; 1.457 ns ;
-; -0.849 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.563 ns ; 1.714 ns ;
-; -0.825 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[7] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe17 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.091 ns ; 2.266 ns ;
-; -0.819 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[1] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe5 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.080 ns ; 2.261 ns ;
-; -0.770 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe3 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.080 ns ; 2.310 ns ;
-; -0.743 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[7] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.179 ns ; 1.436 ns ;
-; -0.742 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[6] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.179 ns ; 1.437 ns ;
-; -0.692 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[3] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe9 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.089 ns ; 2.397 ns ;
-; -0.675 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[10] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ZL ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.521 ns ; 2.846 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[5] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[4] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[3] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[3] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[2] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[2] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[0] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|rd_ptr_lsb ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DISP_ON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DISP_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_I[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_I[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SUB_PIXEL_CNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SUB_PIXEL_CNT[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a7 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a7 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a1 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a1 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a4 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a4 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a5 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a5 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a8 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a0 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a2 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a2 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a6 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a6 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a9 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a3 ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|counter5a3 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VHCNT[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.672 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VVCNT[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 0.460 ns ;
-; -0.668 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.643 ns ; 2.975 ns ;
-; -0.658 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.563 ns ; 1.905 ns ;
-; -0.655 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.563 ns ; 1.908 ns ;
-; -0.591 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[4] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe11 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.081 ns ; 2.490 ns ;
-; -0.569 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.300 ns ; 1.731 ns ;
-; -0.553 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.296 ns ; 1.743 ns ;
-; -0.530 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[4] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.563 ns ; 2.033 ns ;
-; -0.447 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.350 ns ; 1.903 ns ;
-; -0.441 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.090 ns ; 1.649 ns ;
-; -0.422 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[4] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.300 ns ; 1.878 ns ;
-; -0.420 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.300 ns ; 1.880 ns ;
-; -0.407 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[2] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe7 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.091 ns ; 2.684 ns ;
-; -0.353 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[4] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.563 ns ; 2.210 ns ;
-; -0.320 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[3] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.300 ns ; 1.980 ns ;
-; -0.319 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[2] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.300 ns ; 1.981 ns ;
-; -0.198 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.526 ns ; 3.328 ns ;
-; -0.184 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ZL ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.709 ns ; 5.525 ns ;
-; -0.155 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.216 ns ; 3.061 ns ;
-; -0.143 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[3] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.133 ns ; 3.990 ns ;
-; -0.133 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.718 ns ; 5.585 ns ;
-; -0.126 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[2] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.133 ns ; 4.007 ns ;
-; -0.126 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.685 ns ; 5.559 ns ;
-; -0.125 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[2] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.129 ns ; 4.004 ns ;
-; -0.116 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[0] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.133 ns ; 4.017 ns ;
-; -0.097 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_START ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.690 ns ; 5.593 ns ;
-; -0.097 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.411 ns ; 3.314 ns ;
-; -0.092 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[3] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.129 ns ; 4.037 ns ;
-; -0.070 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[11] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.885 ns ; 3.815 ns ;
-; -0.067 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.214 ns ; 3.147 ns ;
-; -0.065 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[11] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.849 ns ; 3.784 ns ;
-; -0.060 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.917 ns ; 3.857 ns ;
-; -0.059 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[9] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe21 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.363 ns ; 3.304 ns ;
-; -0.046 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.311 ns ; 4.265 ns ;
-; -0.025 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.690 ns ; 5.665 ns ;
-; -0.022 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.411 ns ; 3.389 ns ;
-; -0.006 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.036 ns ; 2.030 ns ;
-; 0.007 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DOP_ZEI ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|INTER_ZEI ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.760 ns ; 3.767 ns ;
-; 0.026 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.689 ns ; 5.715 ns ;
-; 0.067 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.526 ns ; 3.593 ns ;
-; 0.072 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.526 ns ; 3.598 ns ;
-; 0.091 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_START ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.637 ns ; 3.728 ns ;
-; 0.093 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[10] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.885 ns ; 3.978 ns ;
-; 0.093 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 0.961 ns ; 1.054 ns ;
-; 0.097 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.036 ns ; 2.133 ns ;
-; 0.104 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.718 ns ; 5.822 ns ;
-; 0.118 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[11] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.643 ns ; 3.761 ns ;
-; 0.119 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[3] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.303 ns ; 2.422 ns ;
-; 0.119 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[2] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.303 ns ; 2.422 ns ;
-; 0.121 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.598 ns ; 4.719 ns ;
-; 0.123 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.849 ns ; 3.972 ns ;
-; 0.132 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.083 ns ; 2.215 ns ;
-; 0.150 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.815 ns ; 3.965 ns ;
-; 0.151 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[0] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.129 ns ; 4.280 ns ;
-; 0.158 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[0] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.228 ns ; 1.386 ns ;
-; 0.167 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[4] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.303 ns ; 2.470 ns ;
-; 0.168 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.817 ns ; 3.985 ns ;
-; 0.177 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.357 ns ; 2.534 ns ;
-; 0.181 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.689 ns ; 5.870 ns ;
-; 0.184 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 6.017 ns ; 6.201 ns ;
-; 0.186 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[11] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.615 ns ; 3.801 ns ;
-; 0.188 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[10] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.849 ns ; 4.037 ns ;
-; 0.191 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[3] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.132 ns ; 4.323 ns ;
-; 0.192 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[0] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.132 ns ; 4.324 ns ;
-; 0.195 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.498 ns ; 3.693 ns ;
-; 0.216 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.685 ns ; 3.901 ns ;
-; 0.226 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.598 ns ; 4.824 ns ;
-; 0.231 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[2] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.707 ns ; 5.938 ns ;
-; 0.235 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 6.013 ns ; 6.248 ns ;
-; 0.243 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.459 ns ; 3.702 ns ;
-; 0.261 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[7] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.916 ns ; 2.177 ns ;
-; 0.262 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[6] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.916 ns ; 2.178 ns ;
-; 0.265 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[2] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.132 ns ; 4.397 ns ;
-; 0.266 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_ZL ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.707 ns ; 5.973 ns ;
-; 0.291 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.917 ns ; 4.208 ns ;
-; 0.311 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.411 ns ; 3.722 ns ;
-; 0.313 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[45] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe29 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.130 ns ; 1.443 ns ;
-; 0.314 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[1] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.133 ns ; 4.447 ns ;
-; 0.315 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.498 ns ; 3.813 ns ;
-; 0.315 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[1] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.033 ns ; 2.348 ns ;
-; 0.318 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC ; altddio_out3:inst5|altddio_out:altddio_out_component|ddio_out_31f:auto_generated|ddio_outa[0]~DFFHI ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.621 ns ; 2.939 ns ;
-; 0.320 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe48 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.130 ns ; 1.450 ns ;
-; 0.320 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe28 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.130 ns ; 1.450 ns ;
-; 0.323 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[0] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe30 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.130 ns ; 1.453 ns ;
-; 0.324 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.768 ns ; 6.092 ns ;
-; 0.333 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[1] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[33] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.126 ns ; 1.459 ns ;
-; 0.338 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[62] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.165 ns ; 1.503 ns ;
-; 0.339 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[35] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~porta_datain_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.178 ns ; 1.517 ns ;
-; 0.341 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[19] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[35] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.130 ns ; 1.471 ns ;
-; 0.341 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|SYNC_PIX2 ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FIFO_RDE ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.153 ns ; 1.494 ns ;
-; 0.342 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[5] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 0.801 ns ; 1.143 ns ;
-; 0.342 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[11] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.134 ns ; 1.476 ns ;
-; 0.343 ns ; Video:Fredi_Aschwanden|inst95 ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr1|lpm_shiftreg:lpm_shiftreg_component|dffs[9] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.135 ns ; 1.478 ns ;
-; 0.344 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_START ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.637 ns ; 3.981 ns ;
-; 0.346 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[11] ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[11] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 0.788 ns ; 1.134 ns ;
-; 0.347 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[10] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.643 ns ; 3.990 ns ;
-; 0.349 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[79] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a0~porta_datain_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.165 ns ; 1.514 ns ;
-; 0.350 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 2.303 ns ; 2.653 ns ;
-; 0.352 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[12] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr0|lpm_shiftreg:lpm_shiftreg_component|dffs[13] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.134 ns ; 1.486 ns ;
-; 0.354 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7] ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ram_block1a0~portb_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 6.067 ns ; 6.421 ns ;
-; 0.355 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe16 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[3] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.123 ns ; 1.478 ns ;
-; 0.355 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.498 ns ; 3.853 ns ;
-; 0.358 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|sub_parity7a[1] ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_s57:rdptr_g1p|parity6 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.147 ns ; 1.505 ns ;
-; 0.360 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[19] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[19] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.130 ns ; 1.490 ns ;
-; 0.360 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.411 ns ; 3.771 ns ;
-; 0.361 ns ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|dffe29 ; Video:Fredi_Aschwanden|lpm_mux2:inst25|lpm_mux:lpm_mux_component|mux_mpe:auto_generated|external_latency_ffsa[6] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 1.493 ns ;
-; 0.362 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[4] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.502 ns ; 1.864 ns ;
-; 0.365 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe48 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[23] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.137 ns ; 1.502 ns ;
-; 0.365 ns ; Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|q_b[3] ; Video:Fredi_Aschwanden|lpm_ff3:inst47|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 0.802 ns ; 1.167 ns ;
-; 0.365 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe8 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.129 ns ; 1.494 ns ;
-; 0.366 ns ; Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|q_b[93] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a3~porta_datain_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.185 ns ; 1.551 ns ;
-; 0.366 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.747 ns ; 6.113 ns ;
-; 0.367 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[67] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[3] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.129 ns ; 1.496 ns ;
-; 0.367 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSY_LEN[5] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 0.868 ns ; 1.235 ns ;
-; 0.367 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|LAST ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.746 ns ; 6.113 ns ;
-; 0.368 ns ; Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[27] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr6|lpm_shiftreg:lpm_shiftreg_component|dffs[11] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 1.500 ns ;
-; 0.368 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[10] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC_START ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 4.264 ns ; 4.632 ns ;
-; 0.370 ns ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe49 ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|external_latency_ffsa[23] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.134 ns ; 1.504 ns ;
-; 0.371 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[11] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.124 ns ; 1.495 ns ;
-; 0.371 ns ; Video:Fredi_Aschwanden|lpm_ff1:inst9|lpm_ff:lpm_ff_component|dffs[10] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe23 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.127 ns ; 1.498 ns ;
-; 0.372 ns ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[3] ; Video:Fredi_Aschwanden|lpm_shiftreg0:sr5|lpm_shiftreg:lpm_shiftreg_component|dffs[4] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 1.504 ns ;
-; 0.373 ns ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|cntr_pmb:wr_ptr|counter_reg_bit[1] ; Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a5~porta_address_reg0 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.502 ns ; 1.875 ns ;
-; 0.374 ns ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|dffe1a[2] ; Video:Fredi_Aschwanden|lpm_mux1:inst24|lpm_mux:lpm_mux_component|mux_npe:auto_generated|external_latency_ffsa[15] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.133 ns ; 1.507 ns ;
-; 0.374 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC_START ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.706 ns ; 6.080 ns ;
-; 0.374 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDTRON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.147 ns ; 1.521 ns ;
-; 0.376 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_OFF ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 5.690 ns ; 6.066 ns ;
-; 0.379 ns ; Video:Fredi_Aschwanden|lpm_ff3:inst49|lpm_ff:lpm_ff_component|dffs[15] ; Video:Fredi_Aschwanden|lpm_mux6:inst7|lpm_mux:lpm_mux_component|mux_kpe:auto_generated|dffe32 ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.132 ns ; 1.511 ns ;
-; 0.381 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDO_ON ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 3.460 ns ; 3.841 ns ;
-; 0.382 ns ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[18] ; Video:Fredi_Aschwanden|lpm_mux0:inst21|lpm_mux:lpm_mux_component|mux_gpe:auto_generated|external_latency_ffsa[50] ; MAIN_CLK ; MAIN_CLK ; 0.000 ns ; 1.135 ns ; 1.517 ns ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; tsu ;
-+-----------------------------------------+-----------------------------------------------------+------------+-----------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+----------+
-; Slack ; Required tsu ; Actual tsu ; From ; To ; To Clock ;
-+-----------------------------------------+-----------------------------------------------------+------------+-----------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+----------+
-; -4.528 ns ; 1.000 ns ; 5.528 ns ; MAIN_CLK ; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|idle_state ; MAIN_CLK ;
-; -4.169 ns ; 1.000 ns ; 5.169 ns ; VD[19] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[19] ; MAIN_CLK ;
-; -4.134 ns ; 1.000 ns ; 5.134 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ;
-; -4.083 ns ; 1.000 ns ; 5.083 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ;
-; -4.051 ns ; 1.000 ns ; 5.051 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ;
-; -4.051 ns ; 1.000 ns ; 5.051 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ;
-; -4.051 ns ; 1.000 ns ; 5.051 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ;
-; -4.051 ns ; 1.000 ns ; 5.051 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ;
-; -4.051 ns ; 1.000 ns ; 5.051 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ;
-; -4.047 ns ; 1.000 ns ; 5.047 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ;
-; -4.047 ns ; 1.000 ns ; 5.047 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ;
-; -4.047 ns ; 1.000 ns ; 5.047 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ;
-; -4.047 ns ; 1.000 ns ; 5.047 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ;
-; -4.047 ns ; 1.000 ns ; 5.047 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ;
-; -4.047 ns ; 1.000 ns ; 5.047 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ;
-; -4.022 ns ; 1.000 ns ; 5.022 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ;
-; -4.022 ns ; 1.000 ns ; 5.022 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ;
-; -4.022 ns ; 1.000 ns ; 5.022 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ;
-; -3.961 ns ; 1.000 ns ; 4.961 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ;
-; -3.961 ns ; 1.000 ns ; 4.961 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ;
-; -3.961 ns ; 1.000 ns ; 4.961 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ;
-; -3.961 ns ; 1.000 ns ; 4.961 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ;
-; -3.956 ns ; 1.000 ns ; 4.956 ns ; VD[27] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[27] ; MAIN_CLK ;
-; -3.930 ns ; 1.000 ns ; 4.930 ns ; nINDEX ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|MO ; CLK33M ;
-; -3.930 ns ; 1.000 ns ; 4.930 ns ; VD[31] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[31] ; MAIN_CLK ;
-; -3.927 ns ; 1.000 ns ; 4.927 ns ; VD[1] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[1] ; MAIN_CLK ;
-; -3.927 ns ; 1.000 ns ; 4.927 ns ; VD[9] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[9] ; MAIN_CLK ;
-; -3.913 ns ; 1.000 ns ; 4.913 ns ; VD[2] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[2] ; MAIN_CLK ;
-; -3.912 ns ; 1.000 ns ; 4.912 ns ; VD[12] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[12] ; MAIN_CLK ;
-; -3.907 ns ; 1.000 ns ; 4.907 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ;
-; -3.907 ns ; 1.000 ns ; 4.907 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ;
-; -3.907 ns ; 1.000 ns ; 4.907 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ;
-; -3.907 ns ; 1.000 ns ; 4.907 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ;
-; -3.903 ns ; 1.000 ns ; 4.903 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ;
-; -3.903 ns ; 1.000 ns ; 4.903 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ;
-; -3.903 ns ; 1.000 ns ; 4.903 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ;
-; -3.897 ns ; 1.000 ns ; 4.897 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ;
-; -3.897 ns ; 1.000 ns ; 4.897 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ;
-; -3.897 ns ; 1.000 ns ; 4.897 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ;
-; -3.897 ns ; 1.000 ns ; 4.897 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ;
-; -3.897 ns ; 1.000 ns ; 4.897 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ;
-; -3.897 ns ; 1.000 ns ; 4.897 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ;
-; -3.897 ns ; 1.000 ns ; 4.897 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ;
-; -3.897 ns ; 1.000 ns ; 4.897 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ;
-; -3.885 ns ; 1.000 ns ; 4.885 ns ; VD[20] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[20] ; MAIN_CLK ;
-; -3.883 ns ; 1.000 ns ; 4.883 ns ; VD[25] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[25] ; MAIN_CLK ;
-; -3.869 ns ; 1.000 ns ; 4.869 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ;
-; -3.869 ns ; 1.000 ns ; 4.869 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ;
-; -3.869 ns ; 1.000 ns ; 4.869 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ;
-; -3.869 ns ; 1.000 ns ; 4.869 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ;
-; -3.869 ns ; 1.000 ns ; 4.869 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ;
-; -3.869 ns ; 1.000 ns ; 4.869 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ;
-; -3.860 ns ; 1.000 ns ; 4.860 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ;
-; -3.860 ns ; 1.000 ns ; 4.860 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ;
-; -3.860 ns ; 1.000 ns ; 4.860 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ;
-; -3.860 ns ; 1.000 ns ; 4.860 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ;
-; -3.860 ns ; 1.000 ns ; 4.860 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ;
-; -3.860 ns ; 1.000 ns ; 4.860 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ;
-; -3.860 ns ; 1.000 ns ; 4.860 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ;
-; -3.860 ns ; 1.000 ns ; 4.860 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ;
-; -3.859 ns ; 1.000 ns ; 4.859 ns ; VD[28] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[28] ; MAIN_CLK ;
-; -3.855 ns ; 1.000 ns ; 4.855 ns ; VD[22] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[22] ; MAIN_CLK ;
-; -3.851 ns ; 1.000 ns ; 4.851 ns ; VD[17] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[17] ; MAIN_CLK ;
-; -3.850 ns ; 1.000 ns ; 4.850 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ;
-; -3.850 ns ; 1.000 ns ; 4.850 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ;
-; -3.850 ns ; 1.000 ns ; 4.850 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ;
-; -3.850 ns ; 1.000 ns ; 4.850 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ;
-; -3.850 ns ; 1.000 ns ; 4.850 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ;
-; -3.850 ns ; 1.000 ns ; 4.850 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ;
-; -3.850 ns ; 1.000 ns ; 4.850 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ;
-; -3.850 ns ; 1.000 ns ; 4.850 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ;
-; -3.846 ns ; 1.000 ns ; 4.846 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ;
-; -3.846 ns ; 1.000 ns ; 4.846 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ;
-; -3.846 ns ; 1.000 ns ; 4.846 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ;
-; -3.846 ns ; 1.000 ns ; 4.846 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ;
-; -3.846 ns ; 1.000 ns ; 4.846 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ;
-; -3.846 ns ; 1.000 ns ; 4.846 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ;
-; -3.846 ns ; 1.000 ns ; 4.846 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ;
-; -3.846 ns ; 1.000 ns ; 4.846 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ;
-; -3.827 ns ; 1.000 ns ; 4.827 ns ; VD[11] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[11] ; MAIN_CLK ;
-; -3.814 ns ; 1.000 ns ; 4.814 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ;
-; -3.814 ns ; 1.000 ns ; 4.814 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ;
-; -3.814 ns ; 1.000 ns ; 4.814 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ;
-; -3.814 ns ; 1.000 ns ; 4.814 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ;
-; -3.814 ns ; 1.000 ns ; 4.814 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ;
-; -3.814 ns ; 1.000 ns ; 4.814 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ;
-; -3.814 ns ; 1.000 ns ; 4.814 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ;
-; -3.814 ns ; 1.000 ns ; 4.814 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ;
-; -3.814 ns ; 1.000 ns ; 4.814 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ;
-; -3.814 ns ; 1.000 ns ; 4.814 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ;
-; -3.804 ns ; 1.000 ns ; 4.804 ns ; VD[0] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[0] ; MAIN_CLK ;
-; -3.801 ns ; 1.000 ns ; 4.801 ns ; VD[10] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[10] ; MAIN_CLK ;
-; -3.796 ns ; 1.000 ns ; 4.796 ns ; MAIN_CLK ; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_post_state ; MAIN_CLK ;
-; -3.794 ns ; 1.000 ns ; 4.794 ns ; MAIN_CLK ; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|areset_init_state_1 ; MAIN_CLK ;
-; -3.794 ns ; 1.000 ns ; 4.794 ns ; MAIN_CLK ; altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|reconfig_wait_state ; MAIN_CLK ;
-; -3.783 ns ; 1.000 ns ; 4.783 ns ; VD[14] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[14] ; MAIN_CLK ;
-; -3.768 ns ; 1.000 ns ; 4.768 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ;
-; -3.768 ns ; 1.000 ns ; 4.768 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ;
-; -3.768 ns ; 1.000 ns ; 4.768 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ;
-; -3.765 ns ; 1.000 ns ; 4.765 ns ; nFB_WR ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|MO ; CLK33M ;
-; -3.761 ns ; 1.000 ns ; 4.761 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ;
-; -3.761 ns ; 1.000 ns ; 4.761 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ;
-; -3.761 ns ; 1.000 ns ; 4.761 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ;
-; -3.761 ns ; 1.000 ns ; 4.761 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ;
-; -3.761 ns ; 1.000 ns ; 4.761 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[29] ; MAIN_CLK ;
-; -3.761 ns ; 1.000 ns ; 4.761 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[30] ; MAIN_CLK ;
-; -3.761 ns ; 1.000 ns ; 4.761 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[31] ; MAIN_CLK ;
-; -3.752 ns ; 1.000 ns ; 4.752 ns ; VD[6] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[6] ; MAIN_CLK ;
-; -3.748 ns ; 1.000 ns ; 4.748 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ;
-; -3.748 ns ; 1.000 ns ; 4.748 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[13] ; MAIN_CLK ;
-; -3.748 ns ; 1.000 ns ; 4.748 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[14] ; MAIN_CLK ;
-; -3.744 ns ; 1.000 ns ; 4.744 ns ; VD[21] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[21] ; MAIN_CLK ;
-; -3.742 ns ; 1.000 ns ; 4.742 ns ; FB_SIZE0 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ;
-; -3.740 ns ; 1.000 ns ; 4.740 ns ; FB_SIZE0 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; MAIN_CLK ;
-; -3.740 ns ; 1.000 ns ; 4.740 ns ; VD[16] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[16] ; MAIN_CLK ;
-; -3.739 ns ; 1.000 ns ; 4.739 ns ; VD[29] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[29] ; MAIN_CLK ;
-; -3.735 ns ; 1.000 ns ; 4.735 ns ; VD[15] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[15] ; MAIN_CLK ;
-; -3.708 ns ; 1.000 ns ; 4.708 ns ; VD[26] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[26] ; MAIN_CLK ;
-; -3.707 ns ; 1.000 ns ; 4.707 ns ; VD[13] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[13] ; MAIN_CLK ;
-; -3.706 ns ; 1.000 ns ; 4.706 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ;
-; -3.706 ns ; 1.000 ns ; 4.706 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ;
-; -3.706 ns ; 1.000 ns ; 4.706 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ;
-; -3.706 ns ; 1.000 ns ; 4.706 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ;
-; -3.706 ns ; 1.000 ns ; 4.706 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ;
-; -3.706 ns ; 1.000 ns ; 4.706 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ;
-; -3.703 ns ; 1.000 ns ; 4.703 ns ; VD[3] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[3] ; MAIN_CLK ;
-; -3.699 ns ; 1.000 ns ; 4.699 ns ; VD[30] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[30] ; MAIN_CLK ;
-; -3.694 ns ; 1.000 ns ; 4.694 ns ; VD[24] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[24] ; MAIN_CLK ;
-; -3.691 ns ; 1.000 ns ; 4.691 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ;
-; -3.691 ns ; 1.000 ns ; 4.691 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ;
-; -3.691 ns ; 1.000 ns ; 4.691 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ;
-; -3.691 ns ; 1.000 ns ; 4.691 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ;
-; -3.691 ns ; 1.000 ns ; 4.691 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ;
-; -3.691 ns ; 1.000 ns ; 4.691 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ;
-; -3.691 ns ; 1.000 ns ; 4.691 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ;
-; -3.691 ns ; 1.000 ns ; 4.691 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ;
-; -3.691 ns ; 1.000 ns ; 4.691 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ;
-; -3.684 ns ; 1.000 ns ; 4.684 ns ; FB_SIZE1 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; MAIN_CLK ;
-; -3.684 ns ; 1.000 ns ; 4.684 ns ; FB_SIZE1 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ;
-; -3.680 ns ; 1.000 ns ; 4.680 ns ; FB_AD[30] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ;
-; -3.654 ns ; 1.000 ns ; 4.654 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[25] ; MAIN_CLK ;
-; -3.654 ns ; 1.000 ns ; 4.654 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[26] ; MAIN_CLK ;
-; -3.654 ns ; 1.000 ns ; 4.654 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[28] ; MAIN_CLK ;
-; -3.634 ns ; 1.000 ns ; 4.634 ns ; FB_AD[31] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ;
-; -3.566 ns ; 1.000 ns ; 4.566 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[0] ; MAIN_CLK ;
-; -3.566 ns ; 1.000 ns ; 4.566 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2] ; MAIN_CLK ;
-; -3.566 ns ; 1.000 ns ; 4.566 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ;
-; -3.566 ns ; 1.000 ns ; 4.566 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[8] ; MAIN_CLK ;
-; -3.566 ns ; 1.000 ns ; 4.566 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ;
-; -3.566 ns ; 1.000 ns ; 4.566 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[21] ; MAIN_CLK ;
-; -3.566 ns ; 1.000 ns ; 4.566 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ;
-; -3.566 ns ; 1.000 ns ; 4.566 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[23] ; MAIN_CLK ;
-; -3.566 ns ; 1.000 ns ; 4.566 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[27] ; MAIN_CLK ;
-; -3.471 ns ; 1.000 ns ; 4.471 ns ; VD[4] ; Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[4] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[9] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[11] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[18] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[19] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[20] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[22] ; MAIN_CLK ;
-; -3.464 ns ; 1.000 ns ; 4.464 ns ; nFB_WR ; Video:Fredi_Aschwanden|lpm_ff0:inst15|lpm_ff:lpm_ff_component|dffs[24] ; MAIN_CLK ;
-; -3.386 ns ; 1.000 ns ; 4.386 ns ; FB_AD[5] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[5] ; MAIN_CLK ;
-; -3.339 ns ; 1.000 ns ; 4.339 ns ; FB_SIZE0 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; MAIN_CLK ;
-; -3.334 ns ; 1.000 ns ; 4.334 ns ; nFB_WR ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|CMD_STATE.IDLE ; CLK33M ;
-; -3.324 ns ; 1.000 ns ; 4.324 ns ; nFB_WR ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ;
-; -3.290 ns ; 1.000 ns ; 4.290 ns ; nFB_WR ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; MAIN_CLK ;
-; -3.272 ns ; 1.000 ns ; 4.272 ns ; FB_AD[12] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC ; MAIN_CLK ;
-; -3.248 ns ; 1.000 ns ; 4.248 ns ; nFB_WR ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ ; CLK33M ;
-; -3.245 ns ; 1.000 ns ; 4.245 ns ; FB_AD[7] ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ;
-; -3.236 ns ; 1.000 ns ; 4.236 ns ; FB_AD[17] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ;
-; -3.226 ns ; 1.000 ns ; 4.226 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ;
-; -3.226 ns ; 1.000 ns ; 4.226 ns ; FB_AD[17] ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[17] ; MAIN_CLK ;
-; -3.218 ns ; 1.000 ns ; 4.218 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[16] ; MAIN_CLK ;
-; -3.214 ns ; 1.000 ns ; 4.214 ns ; FB_AD[1] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ;
-; -3.214 ns ; 1.000 ns ; 4.214 ns ; FB_AD[7] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[7] ; MAIN_CLK ;
-; -3.211 ns ; 1.000 ns ; 4.211 ns ; FB_SIZE0 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_AC ; MAIN_CLK ;
-; -3.208 ns ; 1.000 ns ; 4.208 ns ; FB_AD[3] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ;
-; -3.206 ns ; 1.000 ns ; 4.206 ns ; FB_AD[4] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ;
-; -3.203 ns ; 1.000 ns ; 4.203 ns ; FB_AD[1] ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ;
-; -3.199 ns ; 1.000 ns ; 4.199 ns ; FB_AD[31] ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; MAIN_CLK ;
-; -3.197 ns ; 1.000 ns ; 4.197 ns ; FB_AD[3] ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[3] ; MAIN_CLK ;
-; -3.194 ns ; 1.000 ns ; 4.194 ns ; FB_AD[4] ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[4] ; MAIN_CLK ;
-; -3.193 ns ; 1.000 ns ; 4.193 ns ; FB_AD[15] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ;
-; -3.190 ns ; 1.000 ns ; 4.190 ns ; FB_AD[10] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[10] ; MAIN_CLK ;
-; -3.187 ns ; 1.000 ns ; 4.187 ns ; FB_AD[15] ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[15] ; MAIN_CLK ;
-; -3.182 ns ; 1.000 ns ; 4.182 ns ; HD_DD ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\FREQUENCY_DECODER:FREQ_AMOUNT[1] ; CLK33M ;
-; -3.181 ns ; 1.000 ns ; 4.181 ns ; FB_AD[5] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ;
-; -3.174 ns ; 1.000 ns ; 4.174 ns ; FB_AD[12] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[12] ; MAIN_CLK ;
-; -3.173 ns ; 1.000 ns ; 4.173 ns ; FB_SIZE1 ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10] ; MAIN_CLK ;
-; -3.172 ns ; 1.000 ns ; 4.172 ns ; FB_ALE ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ ; MAIN_CLK ;
-; -3.171 ns ; 1.000 ns ; 4.171 ns ; FB_AD[5] ; Video:Fredi_Aschwanden|lpm_ff0:inst16|lpm_ff:lpm_ff_component|dffs[5] ; MAIN_CLK ;
-; -3.167 ns ; 1.000 ns ; 4.167 ns ; FB_AD[6] ; Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[6] ; MAIN_CLK ;
-; -3.162 ns ; 1.000 ns ; 4.162 ns ; FB_AD[1] ; Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[1] ; MAIN_CLK ;
-; -3.160 ns ; 1.000 ns ; 4.160 ns ; nFB_WR ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[9] ; MAIN_CLK ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+------------+-----------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+----------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; tco ;
-+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------+-----------+------------+
-; Slack ; Required tco ; Actual tco ; From ; To ; From Clock ;
-+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------+-----------+------------+
-; -14.840 ns ; 1.000 ns ; 15.840 ns ; interrupt_handler:nobody|INT_LATCH[8] ; nIRQ[5] ; MAIN_CLK ;
-; -14.829 ns ; 1.000 ns ; 15.829 ns ; interrupt_handler:nobody|INT_LATCH[9] ; nIRQ[5] ; MAIN_CLK ;
-; -13.764 ns ; 1.000 ns ; 14.764 ns ; interrupt_handler:nobody|INT_LATCH[8] ; FB_AD[8] ; MAIN_CLK ;
-; -13.654 ns ; 1.000 ns ; 14.654 ns ; interrupt_handler:nobody|INT_LATCH[9] ; FB_AD[9] ; MAIN_CLK ;
-; -13.587 ns ; 1.000 ns ; 14.587 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[2] ; FB_AD[18] ; MAIN_CLK ;
-; -13.587 ns ; 1.000 ns ; 14.587 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[2] ; FB_AD[18] ; MAIN_CLK ;
-; -13.587 ns ; 1.000 ns ; 14.587 ns ; interrupt_handler:nobody|INT_LATCH[8] ; FB_AD[29] ; MAIN_CLK ;
-; -13.575 ns ; 1.000 ns ; 14.575 ns ; interrupt_handler:nobody|INT_LATCH[9] ; FB_AD[29] ; MAIN_CLK ;
-; -13.493 ns ; 1.000 ns ; 14.493 ns ; interrupt_handler:nobody|RTC_ADR[0] ; FB_AD[18] ; MAIN_CLK ;
-; -13.477 ns ; 1.000 ns ; 14.477 ns ; interrupt_handler:nobody|RTC_ADR[1] ; FB_AD[18] ; MAIN_CLK ;
-; -13.457 ns ; 1.000 ns ; 14.457 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[18] ; FB_AD[18] ; MAIN_CLK ;
-; -13.418 ns ; 1.000 ns ; 14.418 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[2] ; FB_AD[18] ; MAIN_CLK ;
-; -13.386 ns ; 1.000 ns ; 14.386 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[7] ; FB_AD[7] ; MAIN_CLK ;
-; -13.358 ns ; 1.000 ns ; 14.358 ns ; interrupt_handler:nobody|RTC_ADR[3] ; FB_AD[18] ; MAIN_CLK ;
-; -13.358 ns ; 1.000 ns ; 14.358 ns ; interrupt_handler:nobody|RTC_ADR[4] ; FB_AD[18] ; MAIN_CLK ;
-; -13.309 ns ; 1.000 ns ; 14.309 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; FB_AD[27] ; MAIN_CLK ;
-; -13.294 ns ; 1.000 ns ; 14.294 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[11] ; FB_AD[27] ; MAIN_CLK ;
-; -13.259 ns ; 1.000 ns ; 14.259 ns ; interrupt_handler:nobody|RTC_ADR[2] ; FB_AD[18] ; MAIN_CLK ;
-; -13.250 ns ; 1.000 ns ; 14.250 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[2] ; FB_AD[18] ; MAIN_CLK ;
-; -13.227 ns ; 1.000 ns ; 14.227 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[2] ; FB_AD[18] ; MAIN_CLK ;
-; -13.207 ns ; 1.000 ns ; 14.207 ns ; interrupt_handler:nobody|RTC_ADR[5] ; FB_AD[18] ; MAIN_CLK ;
-; -13.171 ns ; 1.000 ns ; 14.171 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[2] ; FB_AD[18] ; MAIN_CLK ;
-; -13.170 ns ; 1.000 ns ; 14.170 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[11] ; FB_AD[27] ; MAIN_CLK ;
-; -13.157 ns ; 1.000 ns ; 14.157 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[2] ; FB_AD[18] ; MAIN_CLK ;
-; -13.028 ns ; 1.000 ns ; 14.028 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; FB_AD[27] ; MAIN_CLK ;
-; -13.015 ns ; 1.000 ns ; 14.015 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADR_I[2] ; FB_AD[27] ; MAIN_CLK ;
-; -12.999 ns ; 1.000 ns ; 13.999 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_B[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.921 ns ; 1.000 ns ; 13.921 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.886 ns ; 1.000 ns ; 13.886 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[11] ; FB_AD[27] ; MAIN_CLK ;
-; -12.876 ns ; 1.000 ns ; 13.876 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[11] ; FB_AD[27] ; MAIN_CLK ;
-; -12.861 ns ; 1.000 ns ; 13.861 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADR_I[1] ; FB_AD[27] ; MAIN_CLK ;
-; -12.846 ns ; 1.000 ns ; 13.846 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; FB_AD[27] ; MAIN_CLK ;
-; -12.836 ns ; 1.000 ns ; 13.836 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[18] ; FB_AD[18] ; MAIN_CLK ;
-; -12.823 ns ; 1.000 ns ; 13.823 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_D[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.817 ns ; 1.000 ns ; 13.817 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADR_I[0] ; FB_AD[27] ; MAIN_CLK ;
-; -12.784 ns ; 1.000 ns ; 13.784 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; FB_AD[27] ; MAIN_CLK ;
-; -12.732 ns ; 1.000 ns ; 13.732 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_D[5] ; FB_AD[7] ; MAIN_CLK ;
-; -12.620 ns ; 1.000 ns ; 13.620 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[11] ; FB_AD[27] ; MAIN_CLK ;
-; -12.567 ns ; 1.000 ns ; 13.567 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|ADR_I[3] ; FB_AD[27] ; MAIN_CLK ;
-; -12.434 ns ; 1.000 ns ; 13.434 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[7] ; FB_AD[7] ; MAIN_CLK ;
-; -12.425 ns ; 1.000 ns ; 13.425 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; FB_AD[7] ; MAIN_CLK ;
-; -12.404 ns ; 1.000 ns ; 13.404 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC ; FB_AD[8] ; MAIN_CLK ;
-; -12.403 ns ; 1.000 ns ; 13.403 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[7] ; FB_AD[7] ; MAIN_CLK ;
-; -12.361 ns ; 1.000 ns ; 13.361 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[7] ; FB_AD[23] ; MAIN_CLK ;
-; -12.361 ns ; 1.000 ns ; 13.361 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[11] ; FB_AD[27] ; MAIN_CLK ;
-; -12.302 ns ; 1.000 ns ; 13.302 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDCR[4] ; FB_AD[7] ; MAIN_CLK ;
-; -12.301 ns ; 1.000 ns ; 13.301 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[27] ; FB_AD[27] ; MAIN_CLK ;
-; -12.300 ns ; 1.000 ns ; 13.300 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_A[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.286 ns ; 1.000 ns ; 13.286 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[18] ; FB_AD[18] ; MAIN_CLK ;
-; -12.285 ns ; 1.000 ns ; 13.285 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TCDCR[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.283 ns ; 1.000 ns ; 13.283 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|INTRQ ; FB_AD[7] ; CLK33M ;
-; -12.260 ns ; 1.000 ns ; 13.260 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[7] ; FB_AD[7] ; MAIN_CLK ;
-; -12.241 ns ; 1.000 ns ; 13.241 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_A[5] ; FB_AD[7] ; MAIN_CLK ;
-; -12.219 ns ; 1.000 ns ; 13.219 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TACR[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.211 ns ; 1.000 ns ; 13.211 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.205 ns ; 1.000 ns ; 13.205 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; FB_AD[27] ; MAIN_CLK ;
-; -12.200 ns ; 1.000 ns ; 13.200 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[7] ; FB_AD[7] ; MAIN_CLK ;
-; -12.186 ns ; 1.000 ns ; 13.186 ns ; interrupt_handler:nobody|WERTE[2][0] ; FB_AD[18] ; MAIN_CLK ;
-; -12.182 ns ; 1.000 ns ; 13.182 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[22] ; FB_AD[22] ; MAIN_CLK ;
-; -12.177 ns ; 1.000 ns ; 13.177 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; FB_AD[18] ; MAIN_CLK ;
-; -12.175 ns ; 1.000 ns ; 13.175 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_C[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.173 ns ; 1.000 ns ; 13.173 ns ; interrupt_handler:nobody|RTC_ADR[0] ; FB_AD[17] ; MAIN_CLK ;
-; -12.166 ns ; 1.000 ns ; 13.166 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[18] ; FB_AD[18] ; MAIN_CLK ;
-; -12.158 ns ; 1.000 ns ; 13.158 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.157 ns ; 1.000 ns ; 13.157 ns ; interrupt_handler:nobody|RTC_ADR[1] ; FB_AD[17] ; MAIN_CLK ;
-; -12.082 ns ; 1.000 ns ; 13.082 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TBCR[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.055 ns ; 1.000 ns ; 13.055 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[21] ; FB_AD[21] ; MAIN_CLK ;
-; -12.052 ns ; 1.000 ns ; 13.052 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[1] ; FB_AD[17] ; MAIN_CLK ;
-; -12.039 ns ; 1.000 ns ; 13.039 ns ; interrupt_handler:nobody|ACP_CONF[28] ; FB_AD[7] ; MAIN_CLK ;
-; -12.038 ns ; 1.000 ns ; 13.038 ns ; interrupt_handler:nobody|RTC_ADR[3] ; FB_AD[17] ; MAIN_CLK ;
-; -12.022 ns ; 1.000 ns ; 13.022 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_C[5] ; FB_AD[7] ; MAIN_CLK ;
-; -12.008 ns ; 1.000 ns ; 13.008 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\NOISEGENERATOR:N_SHFT[16] ; YM_QB ; MAIN_CLK ;
-; -12.005 ns ; 1.000 ns ; 13.005 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_DOUT[2] ; FB_AD[18] ; MAIN_CLK ;
-; -12.004 ns ; 1.000 ns ; 13.004 ns ; interrupt_handler:nobody|WERTE[2][62] ; FB_AD[18] ; MAIN_CLK ;
-; -11.984 ns ; 1.000 ns ; 12.984 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; FB_AD[27] ; MAIN_CLK ;
-; -11.978 ns ; 1.000 ns ; 12.978 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[1] ; YM_QB ; MAIN_CLK ;
-; -11.968 ns ; 1.000 ns ; 12.968 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[27] ; FB_AD[27] ; MAIN_CLK ;
-; -11.957 ns ; 1.000 ns ; 12.957 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; FB_AD[7] ; MAIN_CLK ;
-; -11.946 ns ; 1.000 ns ; 12.946 ns ; interrupt_handler:nobody|WERTE[2][42] ; FB_AD[18] ; MAIN_CLK ;
-; -11.939 ns ; 1.000 ns ; 12.939 ns ; interrupt_handler:nobody|RTC_ADR[2] ; FB_AD[17] ; MAIN_CLK ;
-; -11.938 ns ; 1.000 ns ; 12.938 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[4] ; YM_QB ; MAIN_CLK ;
-; -11.937 ns ; 1.000 ns ; 12.937 ns ; interrupt_handler:nobody|WERTE[2][10] ; FB_AD[18] ; MAIN_CLK ;
-; -11.935 ns ; 1.000 ns ; 12.935 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC ; FB_AD[9] ; MAIN_CLK ;
-; -11.933 ns ; 1.000 ns ; 12.933 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FB_AD[18] ; MAIN_CLK ;
-; -11.924 ns ; 1.000 ns ; 12.924 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC ; FB_AD[26] ; MAIN_CLK ;
-; -11.922 ns ; 1.000 ns ; 12.922 ns ; interrupt_handler:nobody|WERTE[2][58] ; FB_AD[18] ; MAIN_CLK ;
-; -11.900 ns ; 1.000 ns ; 12.900 ns ; interrupt_handler:nobody|RTC_ADR[4] ; FB_AD[17] ; MAIN_CLK ;
-; -11.874 ns ; 1.000 ns ; 12.874 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[1] ; FB_AD[17] ; MAIN_CLK ;
-; -11.871 ns ; 1.000 ns ; 12.871 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; FB_AD[20] ; MAIN_CLK ;
-; -11.867 ns ; 1.000 ns ; 12.867 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[2] ; FB_AD[18] ; MAIN_CLK ;
-; -11.859 ns ; 1.000 ns ; 12.859 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; FB_AD[7] ; MAIN_CLK ;
-; -11.857 ns ; 1.000 ns ; 12.857 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[4] ; FB_AD[20] ; MAIN_CLK ;
-; -11.845 ns ; 1.000 ns ; 12.845 ns ; interrupt_handler:nobody|RTC_ADR[5] ; FB_AD[17] ; MAIN_CLK ;
-; -11.842 ns ; 1.000 ns ; 12.842 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[20] ; FB_AD[20] ; MAIN_CLK ;
-; -11.834 ns ; 1.000 ns ; 12.834 ns ; interrupt_handler:nobody|RTC_ADR[2] ; FB_AD[20] ; MAIN_CLK ;
-; -11.831 ns ; 1.000 ns ; 12.831 ns ; interrupt_handler:nobody|WERTE[2][4] ; FB_AD[18] ; MAIN_CLK ;
-; -11.813 ns ; 1.000 ns ; 12.813 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[18] ; FB_AD[18] ; MAIN_CLK ;
-; -11.794 ns ; 1.000 ns ; 12.794 ns ; interrupt_handler:nobody|WERTE[2][43] ; FB_AD[18] ; MAIN_CLK ;
-; -11.787 ns ; 1.000 ns ; 12.787 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FB_AD[18] ; MAIN_CLK ;
-; -11.775 ns ; 1.000 ns ; 12.775 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S2 ; FB_AD[7] ; MAIN_CLK ;
-; -11.774 ns ; 1.000 ns ; 12.774 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[18] ; FB_AD[27] ; MAIN_CLK ;
-; -11.769 ns ; 1.000 ns ; 12.769 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; FB_AD[18] ; MAIN_CLK ;
-; -11.762 ns ; 1.000 ns ; 12.762 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[4] ; FB_AD[20] ; MAIN_CLK ;
-; -11.751 ns ; 1.000 ns ; 12.751 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[5] ; YM_QC ; MAIN_CLK ;
-; -11.747 ns ; 1.000 ns ; 12.747 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[7] ; FB_AD[23] ; MAIN_CLK ;
-; -11.746 ns ; 1.000 ns ; 12.746 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[27] ; FB_AD[27] ; MAIN_CLK ;
-; -11.736 ns ; 1.000 ns ; 12.736 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; FB_AD[7] ; MAIN_CLK ;
-; -11.727 ns ; 1.000 ns ; 12.727 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[7] ; FB_AD[23] ; MAIN_CLK ;
-; -11.725 ns ; 1.000 ns ; 12.725 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_STATE.VECTOR_OUT ; FB_AD[7] ; MAIN_CLK ;
-; -11.724 ns ; 1.000 ns ; 12.724 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[2] ; YM_QC ; MAIN_CLK ;
-; -11.721 ns ; 1.000 ns ; 12.721 ns ; interrupt_handler:nobody|WERTE[5][8] ; FB_AD[21] ; MAIN_CLK ;
-; -11.717 ns ; 1.000 ns ; 12.717 ns ; interrupt_handler:nobody|RTC_ADR[1] ; FB_AD[23] ; MAIN_CLK ;
-; -11.710 ns ; 1.000 ns ; 12.710 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_D[7] ; FB_AD[9] ; MAIN_CLK ;
-; -11.709 ns ; 1.000 ns ; 12.709 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; FB_AD[18] ; MAIN_CLK ;
-; -11.708 ns ; 1.000 ns ; 12.708 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IPRB[5] ; FB_AD[7] ; MAIN_CLK ;
-; -11.700 ns ; 1.000 ns ; 12.700 ns ; interrupt_handler:nobody|WERTE[2][2] ; FB_AD[18] ; MAIN_CLK ;
-; -11.694 ns ; 1.000 ns ; 12.694 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC ; FB_AD[28] ; MAIN_CLK ;
-; -11.693 ns ; 1.000 ns ; 12.693 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[6] ; FB_AD[9] ; MAIN_CLK ;
-; -11.692 ns ; 1.000 ns ; 12.692 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S0 ; FB_AD[18] ; MAIN_CLK ;
-; -11.680 ns ; 1.000 ns ; 12.680 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[1] ; FB_AD[17] ; MAIN_CLK ;
-; -11.675 ns ; 1.000 ns ; 12.675 ns ; interrupt_handler:nobody|RTC_ADR[0] ; FB_AD[23] ; MAIN_CLK ;
-; -11.673 ns ; 1.000 ns ; 12.673 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_B[5] ; FB_AD[7] ; MAIN_CLK ;
-; -11.659 ns ; 1.000 ns ; 12.659 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[7] ; FB_AD[23] ; MAIN_CLK ;
-; -11.649 ns ; 1.000 ns ; 12.649 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[7] ; FB_AD[23] ; MAIN_CLK ;
-; -11.648 ns ; 1.000 ns ; 12.648 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; FB_AD[25] ; MAIN_CLK ;
-; -11.646 ns ; 1.000 ns ; 12.646 ns ; interrupt_handler:nobody|RTC_ADR[3] ; FB_AD[20] ; MAIN_CLK ;
-; -11.640 ns ; 1.000 ns ; 12.640 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[7] ; FB_AD[23] ; MAIN_CLK ;
-; -11.633 ns ; 1.000 ns ; 12.633 ns ; interrupt_handler:nobody|WERTE[2][38] ; FB_AD[18] ; MAIN_CLK ;
-; -11.631 ns ; 1.000 ns ; 12.631 ns ; interrupt_handler:nobody|RTC_ADR[2] ; FB_AD[19] ; MAIN_CLK ;
-; -11.628 ns ; 1.000 ns ; 12.628 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[1] ; FB_AD[17] ; MAIN_CLK ;
-; -11.628 ns ; 1.000 ns ; 12.628 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19] ; FB_AD[27] ; MAIN_CLK ;
-; -11.627 ns ; 1.000 ns ; 12.627 ns ; interrupt_handler:nobody|WERTE[2][63] ; FB_AD[18] ; MAIN_CLK ;
-; -11.620 ns ; 1.000 ns ; 12.620 ns ; interrupt_handler:nobody|WERTE[2][61] ; FB_AD[18] ; MAIN_CLK ;
-; -11.620 ns ; 1.000 ns ; 12.620 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[11] ; FB_AD[18] ; MAIN_CLK ;
-; -11.619 ns ; 1.000 ns ; 12.619 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|VOL_ENV[0] ; YM_QB ; MAIN_CLK ;
-; -11.618 ns ; 1.000 ns ; 12.618 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; FB_AD[18] ; MAIN_CLK ;
-; -11.616 ns ; 1.000 ns ; 12.616 ns ; interrupt_handler:nobody|RTC_ADR[1] ; FB_AD[20] ; MAIN_CLK ;
-; -11.616 ns ; 1.000 ns ; 12.616 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[9] ; FB_AD[25] ; MAIN_CLK ;
-; -11.608 ns ; 1.000 ns ; 12.608 ns ; interrupt_handler:nobody|RTC_ADR[3] ; FB_AD[19] ; MAIN_CLK ;
-; -11.607 ns ; 1.000 ns ; 12.607 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; FB_AD[21] ; MAIN_CLK ;
-; -11.595 ns ; 1.000 ns ; 12.595 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; FB_AD[27] ; MAIN_CLK ;
-; -11.592 ns ; 1.000 ns ; 12.592 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[19] ; FB_AD[20] ; MAIN_CLK ;
-; -11.592 ns ; 1.000 ns ; 12.592 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; FB_AD[18] ; MAIN_CLK ;
-; -11.589 ns ; 1.000 ns ; 12.589 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[3] ; YM_QA ; MAIN_CLK ;
-; -11.588 ns ; 1.000 ns ; 12.588 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[2] ; FB_AD[18] ; MAIN_CLK ;
-; -11.588 ns ; 1.000 ns ; 12.588 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[16] ; FB_AD[18] ; MAIN_CLK ;
-; -11.583 ns ; 1.000 ns ; 12.583 ns ; interrupt_handler:nobody|WERTE[2][57] ; FB_AD[18] ; MAIN_CLK ;
-; -11.582 ns ; 1.000 ns ; 12.582 ns ; interrupt_handler:nobody|RTC_ADR[0] ; FB_AD[22] ; MAIN_CLK ;
-; -11.579 ns ; 1.000 ns ; 12.579 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\NOISEGENERATOR:N_SHFT[16] ; YM_QA ; MAIN_CLK ;
-; -11.578 ns ; 1.000 ns ; 12.578 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[5] ; FB_AD[21] ; MAIN_CLK ;
-; -11.576 ns ; 1.000 ns ; 12.576 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_D[7] ; FB_AD[23] ; MAIN_CLK ;
-; -11.576 ns ; 1.000 ns ; 12.576 ns ; interrupt_handler:nobody|RTC_ADR[3] ; FB_AD[22] ; MAIN_CLK ;
-; -11.567 ns ; 1.000 ns ; 12.567 ns ; interrupt_handler:nobody|RTC_ADR[1] ; FB_AD[22] ; MAIN_CLK ;
-; -11.559 ns ; 1.000 ns ; 12.559 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|DMA_MODUS[6] ; FB_AD[23] ; MAIN_CLK ;
-; -11.552 ns ; 1.000 ns ; 12.552 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|\NOISEGENERATOR:N_SHFT[16] ; YM_QC ; MAIN_CLK ;
-; -11.550 ns ; 1.000 ns ; 12.550 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[17] ; FB_AD[27] ; MAIN_CLK ;
-; -11.545 ns ; 1.000 ns ; 12.545 ns ; interrupt_handler:nobody|WERTE[2][31] ; FB_AD[18] ; MAIN_CLK ;
-; -11.544 ns ; 1.000 ns ; 12.544 ns ; interrupt_handler:nobody|WERTE[2][6] ; FB_AD[18] ; MAIN_CLK ;
-; -11.543 ns ; 1.000 ns ; 12.543 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[2] ; FB_AD[18] ; MAIN_CLK ;
-; -11.542 ns ; 1.000 ns ; 12.542 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[2] ; FB_AD[18] ; MAIN_CLK ;
-; -11.541 ns ; 1.000 ns ; 12.541 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_CS ; FB_AD[23] ; MAIN_CLK ;
-; -11.540 ns ; 1.000 ns ; 12.540 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_TIMERS:I_TIMERS|TIMER_R_D[4] ; FB_AD[20] ; MAIN_CLK ;
-; -11.540 ns ; 1.000 ns ; 12.540 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[5] ; FB_AD[21] ; MAIN_CLK ;
-; -11.537 ns ; 1.000 ns ; 12.537 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[3] ; FB_AD[3] ; MAIN_CLK ;
-; -11.531 ns ; 1.000 ns ; 12.531 ns ; interrupt_handler:nobody|WERTE[2][45] ; FB_AD[18] ; MAIN_CLK ;
-; -11.527 ns ; 1.000 ns ; 12.527 ns ; interrupt_handler:nobody|WERTE[2][7] ; FB_AD[18] ; MAIN_CLK ;
-; -11.527 ns ; 1.000 ns ; 12.527 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[9] ; FB_AD[25] ; MAIN_CLK ;
-; -11.526 ns ; 1.000 ns ; 12.526 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[4] ; FB_AD[20] ; MAIN_CLK ;
-; -11.526 ns ; 1.000 ns ; 12.526 ns ; interrupt_handler:nobody|RTC_ADR[3] ; FB_AD[23] ; MAIN_CLK ;
-; -11.526 ns ; 1.000 ns ; 12.526 ns ; interrupt_handler:nobody|RTC_ADR[4] ; FB_AD[23] ; MAIN_CLK ;
-; -11.508 ns ; 1.000 ns ; 12.508 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|LEVEL_C[3] ; FB_AD[27] ; MAIN_CLK ;
-; -11.507 ns ; 1.000 ns ; 12.507 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[7] ; FB_AD[18] ; MAIN_CLK ;
-; -11.505 ns ; 1.000 ns ; 12.505 ns ; interrupt_handler:nobody|RTC_ADR[2] ; FB_AD[23] ; MAIN_CLK ;
-; -11.504 ns ; 1.000 ns ; 12.504 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[27] ; FB_AD[27] ; MAIN_CLK ;
-; -11.502 ns ; 1.000 ns ; 12.502 ns ; interrupt_handler:nobody|WERTE[2][60] ; FB_AD[18] ; MAIN_CLK ;
-; -11.502 ns ; 1.000 ns ; 12.502 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[10] ; FB_AD[26] ; MAIN_CLK ;
-; -11.495 ns ; 1.000 ns ; 12.495 ns ; interrupt_handler:nobody|WERTE[2][53] ; FB_AD[18] ; MAIN_CLK ;
-; -11.492 ns ; 1.000 ns ; 12.492 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[8] ; FB_AD[18] ; MAIN_CLK ;
-; -11.488 ns ; 1.000 ns ; 12.488 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[3] ; FB_AD[3] ; MAIN_CLK ;
-; -11.487 ns ; 1.000 ns ; 12.487 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; FB_AD[7] ; MAIN_CLK ;
-; -11.480 ns ; 1.000 ns ; 12.480 ns ; interrupt_handler:nobody|RTC_ADR[5] ; FB_AD[23] ; MAIN_CLK ;
-; -11.480 ns ; 1.000 ns ; 12.480 ns ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[5] ; FB_AD[21] ; MAIN_CLK ;
-; -11.479 ns ; 1.000 ns ; 12.479 ns ; interrupt_handler:nobody|WERTE[2][36] ; FB_AD[18] ; MAIN_CLK ;
-; -11.478 ns ; 1.000 ns ; 12.478 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|VOL_ENV[2] ; YM_QB ; MAIN_CLK ;
-; -11.470 ns ; 1.000 ns ; 12.470 ns ; interrupt_handler:nobody|WERTE[2][15] ; FB_AD[18] ; MAIN_CLK ;
-; -11.461 ns ; 1.000 ns ; 12.461 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[11] ; FB_AD[27] ; MAIN_CLK ;
-; -11.460 ns ; 1.000 ns ; 12.460 ns ; interrupt_handler:nobody|WERTE[2][8] ; FB_AD[18] ; MAIN_CLK ;
-; -11.459 ns ; 1.000 ns ; 12.459 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[12] ; FB_AD[27] ; MAIN_CLK ;
-; -11.455 ns ; 1.000 ns ; 12.455 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|CTRL_REG[0] ; YM_QA ; MAIN_CLK ;
-; -11.455 ns ; 1.000 ns ; 12.455 ns ; interrupt_handler:nobody|RTC_ADR[4] ; FB_AD[22] ; MAIN_CLK ;
-; -11.451 ns ; 1.000 ns ; 12.451 ns ; interrupt_handler:nobody|WERTE[2][50] ; FB_AD[18] ; MAIN_CLK ;
-; -11.447 ns ; 1.000 ns ; 12.447 ns ; interrupt_handler:nobody|WERTE[2][52] ; FB_AD[18] ; MAIN_CLK ;
-; -11.444 ns ; 1.000 ns ; 12.444 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[5] ; FB_AD[27] ; MAIN_CLK ;
-; -11.443 ns ; 1.000 ns ; 12.443 ns ; interrupt_handler:nobody|RTC_ADR[0] ; FB_AD[20] ; MAIN_CLK ;
-; -11.441 ns ; 1.000 ns ; 12.441 ns ; lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[13] ; FB_AD[18] ; MAIN_CLK ;
-; -11.435 ns ; 1.000 ns ; 12.435 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S3 ; FB_AD[18] ; MAIN_CLK ;
-; -11.433 ns ; 1.000 ns ; 12.433 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF2149IP_TOP_SOC:I_SOUND|WF2149IP_WAVE:I_PSG_WAVE|VOL_ENV[4] ; YM_QB ; MAIN_CLK ;
-; -11.432 ns ; 1.000 ns ; 12.432 ns ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|IMRB[5] ; FB_AD[7] ; MAIN_CLK ;
-; -11.431 ns ; 1.000 ns ; 12.431 ns ; Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|FR_S1 ; FB_AD[20] ; MAIN_CLK ;
-; -11.429 ns ; 1.000 ns ; 12.429 ns ; interrupt_handler:nobody|WERTE[2][55] ; FB_AD[18] ; MAIN_CLK ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------+-----------+------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------+
-; tpd ;
-+-----------------------------------------+-----------------------------------------------------+-----------------+----------+-----------+
-; Slack ; Required P2P Time ; Actual P2P Time ; From ; To ;
-+-----------------------------------------+-----------------------------------------------------+-----------------+----------+-----------+
-; -11.944 ns ; 1.000 ns ; 12.944 ns ; nFB_CS1 ; FB_AD[18] ;
-; -11.849 ns ; 1.000 ns ; 12.849 ns ; FB_SIZE0 ; FB_AD[27] ;
-; -11.785 ns ; 1.000 ns ; 12.785 ns ; nFB_CS1 ; FB_AD[27] ;
-; -11.694 ns ; 1.000 ns ; 12.694 ns ; nFB_CS1 ; FB_AD[7] ;
-; -11.672 ns ; 1.000 ns ; 12.672 ns ; FB_SIZE1 ; FB_AD[27] ;
-; -11.625 ns ; 1.000 ns ; 12.625 ns ; nFB_WR ; FB_AD[7] ;
-; -11.514 ns ; 1.000 ns ; 12.514 ns ; FB_SIZE0 ; FB_AD[18] ;
-; -11.464 ns ; 1.000 ns ; 12.464 ns ; IDE_INT ; FB_AD[7] ;
-; -11.450 ns ; 1.000 ns ; 12.450 ns ; SRD[11] ; FB_AD[27] ;
-; -11.438 ns ; 1.000 ns ; 12.438 ns ; nFB_OE ; FB_AD[27] ;
-; -11.420 ns ; 1.000 ns ; 12.420 ns ; nFB_CS2 ; FB_AD[27] ;
-; -11.399 ns ; 1.000 ns ; 12.399 ns ; nFB_WR ; FB_AD[27] ;
-; -11.376 ns ; 1.000 ns ; 12.376 ns ; nFB_WR ; FB_AD[18] ;
-; -11.337 ns ; 1.000 ns ; 12.337 ns ; FB_SIZE1 ; FB_AD[18] ;
-; -11.243 ns ; 1.000 ns ; 12.243 ns ; nFB_CS2 ; FB_AD[18] ;
-; -10.918 ns ; 1.000 ns ; 11.918 ns ; nFB_CS1 ; FB_AD[20] ;
-; -10.824 ns ; 1.000 ns ; 11.824 ns ; nFB_CS2 ; FB_AD[7] ;
-; -10.814 ns ; 1.000 ns ; 11.814 ns ; FB_SIZE0 ; FB_AD[7] ;
-; -10.798 ns ; 1.000 ns ; 11.798 ns ; nFB_OE ; FB_AD[7] ;
-; -10.779 ns ; 1.000 ns ; 11.779 ns ; CTS ; FB_AD[18] ;
-; -10.758 ns ; 1.000 ns ; 11.758 ns ; FB_SIZE1 ; FB_AD[7] ;
-; -10.658 ns ; 1.000 ns ; 11.658 ns ; MAIN_CLK ; FB_AD[27] ;
-; -10.631 ns ; 1.000 ns ; 11.631 ns ; nFB_OE ; FB_AD[18] ;
-; -10.578 ns ; 1.000 ns ; 11.578 ns ; MAIN_CLK ; FB_AD[7] ;
-; -10.573 ns ; 1.000 ns ; 11.573 ns ; nFB_CS2 ; FB_AD[20] ;
-; -10.561 ns ; 1.000 ns ; 11.561 ns ; nFB_CS1 ; FB_AD[6] ;
-; -10.549 ns ; 1.000 ns ; 11.549 ns ; FB_SIZE0 ; FB_AD[20] ;
-; -10.543 ns ; 1.000 ns ; 11.543 ns ; nFB_CS1 ; FB_AD[9] ;
-; -10.529 ns ; 1.000 ns ; 11.529 ns ; FB_SIZE0 ; FB_AD[23] ;
-; -10.521 ns ; 1.000 ns ; 11.521 ns ; nFB_CS1 ; FB_AD[23] ;
-; -10.471 ns ; 1.000 ns ; 11.471 ns ; FB_SIZE1 ; FB_AD[20] ;
-; -10.451 ns ; 1.000 ns ; 11.451 ns ; FB_SIZE1 ; FB_AD[23] ;
-; -10.425 ns ; 1.000 ns ; 11.425 ns ; nFB_WR ; FB_AD[9] ;
-; -10.420 ns ; 1.000 ns ; 11.420 ns ; nFB_CS1 ; FB_AD[17] ;
-; -10.415 ns ; 1.000 ns ; 11.415 ns ; nFB_CS1 ; FB_AD[25] ;
-; -10.412 ns ; 1.000 ns ; 11.412 ns ; nFB_CS1 ; FB_AD[21] ;
-; -10.370 ns ; 1.000 ns ; 11.370 ns ; nFB_OE ; FB_AD[20] ;
-; -10.364 ns ; 1.000 ns ; 11.364 ns ; nFB_WR ; FB_AD[25] ;
-; -10.362 ns ; 1.000 ns ; 11.362 ns ; nFB_CS1 ; FB_AD[26] ;
-; -10.361 ns ; 1.000 ns ; 11.361 ns ; nFB_WR ; FB_AD[20] ;
-; -10.335 ns ; 1.000 ns ; 11.335 ns ; nFB_CS2 ; FB_AD[23] ;
-; -10.318 ns ; 1.000 ns ; 11.318 ns ; nFB_CS2 ; FB_AD[21] ;
-; -10.317 ns ; 1.000 ns ; 11.317 ns ; nFB_WR ; FB_AD[22] ;
-; -10.312 ns ; 1.000 ns ; 11.312 ns ; nFB_CS1 ; FB_AD[22] ;
-; -10.311 ns ; 1.000 ns ; 11.311 ns ; nFB_WR ; FB_AD[26] ;
-; -10.291 ns ; 1.000 ns ; 11.291 ns ; nFB_WR ; FB_AD[23] ;
-; -10.278 ns ; 1.000 ns ; 11.278 ns ; FB_SIZE0 ; FB_AD[17] ;
-; -10.277 ns ; 1.000 ns ; 11.277 ns ; MAIN_CLK ; FB_AD[18] ;
-; -10.221 ns ; 1.000 ns ; 11.221 ns ; FB_SIZE0 ; FB_AD[29] ;
-; -10.220 ns ; 1.000 ns ; 11.220 ns ; nFB_CS2 ; FB_AD[22] ;
-; -10.178 ns ; 1.000 ns ; 11.178 ns ; FB_SIZE0 ; FB_AD[19] ;
-; -10.146 ns ; 1.000 ns ; 11.146 ns ; FB_SIZE0 ; FB_AD[31] ;
-; -10.136 ns ; 1.000 ns ; 11.136 ns ; nFB_CS1 ; FB_AD[24] ;
-; -10.123 ns ; 1.000 ns ; 11.123 ns ; nFB_CS1 ; FB_AD[19] ;
-; -10.101 ns ; 1.000 ns ; 11.101 ns ; FB_SIZE1 ; FB_AD[17] ;
-; -10.085 ns ; 1.000 ns ; 11.085 ns ; nFB_WR ; FB_AD[24] ;
-; -10.081 ns ; 1.000 ns ; 11.081 ns ; nFB_CS1 ; FB_AD[16] ;
-; -10.077 ns ; 1.000 ns ; 11.077 ns ; nFB_CS2 ; FB_AD[19] ;
-; -10.077 ns ; 1.000 ns ; 11.077 ns ; FB_SIZE0 ; FB_AD[21] ;
-; -10.076 ns ; 1.000 ns ; 11.076 ns ; FB_SIZE1 ; FB_AD[19] ;
-; -10.074 ns ; 1.000 ns ; 11.074 ns ; SRD[9] ; FB_AD[25] ;
-; -10.070 ns ; 1.000 ns ; 11.070 ns ; nFB_CS1 ; FB_AD[29] ;
-; -10.061 ns ; 1.000 ns ; 11.061 ns ; nFB_OE ; FB_AD[21] ;
-; -10.060 ns ; 1.000 ns ; 11.060 ns ; nFB_WR ; FB_AD[21] ;
-; -10.051 ns ; 1.000 ns ; 11.051 ns ; nFB_WR ; FB_AD[19] ;
-; -10.044 ns ; 1.000 ns ; 11.044 ns ; FB_SIZE1 ; FB_AD[29] ;
-; -10.041 ns ; 1.000 ns ; 11.041 ns ; FB_SIZE0 ; FB_AD[30] ;
-; -10.021 ns ; 1.000 ns ; 11.021 ns ; FB_SIZE1 ; FB_AD[21] ;
-; -10.019 ns ; 1.000 ns ; 11.019 ns ; nFB_WR ; FB_AD[29] ;
-; -10.004 ns ; 1.000 ns ; 11.004 ns ; nFB_WR ; FB_AD[6] ;
-; -9.969 ns ; 1.000 ns ; 10.969 ns ; FB_SIZE1 ; FB_AD[31] ;
-; -9.951 ns ; 1.000 ns ; 10.951 ns ; FB_SIZE0 ; FB_AD[22] ;
-; -9.938 ns ; 1.000 ns ; 10.938 ns ; nFB_CS2 ; FB_AD[26] ;
-; -9.918 ns ; 1.000 ns ; 10.918 ns ; nFB_CS1 ; FB_AD[31] ;
-; -9.914 ns ; 1.000 ns ; 10.914 ns ; nFB_CS2 ; FB_AD[17] ;
-; -9.903 ns ; 1.000 ns ; 10.903 ns ; FB_SIZE0 ; FB_AD[25] ;
-; -9.899 ns ; 1.000 ns ; 10.899 ns ; IDE_INT ; FB_AD[21] ;
-; -9.876 ns ; 1.000 ns ; 10.876 ns ; nFB_CS2 ; FB_AD[31] ;
-; -9.864 ns ; 1.000 ns ; 10.864 ns ; FB_SIZE1 ; FB_AD[30] ;
-; -9.835 ns ; 1.000 ns ; 10.835 ns ; LP_D[3] ; FB_AD[27] ;
-; -9.823 ns ; 1.000 ns ; 10.823 ns ; nFB_WR ; FB_AD[17] ;
-; -9.820 ns ; 1.000 ns ; 10.820 ns ; nFB_CS2 ; FB_AD[30] ;
-; -9.813 ns ; 1.000 ns ; 10.813 ns ; MAIN_CLK ; FB_AD[20] ;
-; -9.802 ns ; 1.000 ns ; 10.802 ns ; nFB_CS2 ; FB_AD[25] ;
-; -9.801 ns ; 1.000 ns ; 10.801 ns ; FB_SIZE1 ; FB_AD[25] ;
-; -9.792 ns ; 1.000 ns ; 10.792 ns ; nFB_CS2 ; FB_AD[29] ;
-; -9.791 ns ; 1.000 ns ; 10.791 ns ; nFB_OE ; FB_AD[25] ;
-; -9.778 ns ; 1.000 ns ; 10.778 ns ; FB_SIZE1 ; FB_AD[22] ;
-; -9.770 ns ; 1.000 ns ; 10.770 ns ; nFB_OE ; FB_AD[23] ;
-; -9.763 ns ; 1.000 ns ; 10.763 ns ; nFB_CS1 ; FB_AD[2] ;
-; -9.750 ns ; 1.000 ns ; 10.750 ns ; nFB_WR ; FB_AD[31] ;
-; -9.729 ns ; 1.000 ns ; 10.729 ns ; FB_SIZE0 ; FB_AD[9] ;
-; -9.729 ns ; 1.000 ns ; 10.729 ns ; nFB_CS1 ; FB_AD[30] ;
-; -9.701 ns ; 1.000 ns ; 10.701 ns ; MAIN_CLK ; FB_AD[21] ;
-; -9.699 ns ; 1.000 ns ; 10.699 ns ; FB_SIZE0 ; FB_AD[24] ;
-; -9.692 ns ; 1.000 ns ; 10.692 ns ; nFB_OE ; FB_AD[22] ;
-; -9.685 ns ; 1.000 ns ; 10.685 ns ; nFB_OE ; FB_AD[31] ;
-; -9.684 ns ; 1.000 ns ; 10.684 ns ; nFB_OE ; FB_AD[19] ;
-; -9.671 ns ; 1.000 ns ; 10.671 ns ; nFB_OE ; FB_AD[17] ;
-; -9.634 ns ; 1.000 ns ; 10.634 ns ; nFB_CS2 ; FB_AD[24] ;
-; -9.630 ns ; 1.000 ns ; 10.630 ns ; SRD[2] ; FB_AD[18] ;
-; -9.629 ns ; 1.000 ns ; 10.629 ns ; nFB_WR ; FB_AD[30] ;
-; -9.628 ns ; 1.000 ns ; 10.628 ns ; nFB_CS2 ; FB_AD[9] ;
-; -9.627 ns ; 1.000 ns ; 10.627 ns ; FB_SIZE1 ; FB_AD[9] ;
-; -9.600 ns ; 1.000 ns ; 10.600 ns ; nFB_CS1 ; FB_AD[28] ;
-; -9.597 ns ; 1.000 ns ; 10.597 ns ; FB_SIZE1 ; FB_AD[24] ;
-; -9.593 ns ; 1.000 ns ; 10.593 ns ; nFB_WR ; FB_AD[16] ;
-; -9.574 ns ; 1.000 ns ; 10.574 ns ; FB_SIZE0 ; FB_AD[28] ;
-; -9.572 ns ; 1.000 ns ; 10.572 ns ; DCD ; FB_AD[17] ;
-; -9.565 ns ; 1.000 ns ; 10.565 ns ; nFB_OE ; FB_AD[24] ;
-; -9.559 ns ; 1.000 ns ; 10.559 ns ; nFB_WR ; FB_AD[8] ;
-; -9.554 ns ; 1.000 ns ; 10.554 ns ; nFB_CS1 ; FB_AD[8] ;
-; -9.521 ns ; 1.000 ns ; 10.521 ns ; nFB_CS1 ; FB_AD[3] ;
-; -9.491 ns ; 1.000 ns ; 10.491 ns ; nFB_WR ; FB_AD[28] ;
-; -9.477 ns ; 1.000 ns ; 10.477 ns ; nFB_CS2 ; FB_AD[3] ;
-; -9.455 ns ; 1.000 ns ; 10.455 ns ; FB_SIZE0 ; FB_AD[26] ;
-; -9.418 ns ; 1.000 ns ; 10.418 ns ; RI ; FB_AD[22] ;
-; -9.410 ns ; 1.000 ns ; 10.410 ns ; nFB_CS1 ; FB_AD[5] ;
-; -9.398 ns ; 1.000 ns ; 10.398 ns ; MAIN_CLK ; FB_AD[26] ;
-; -9.397 ns ; 1.000 ns ; 10.397 ns ; FB_SIZE1 ; FB_AD[28] ;
-; -9.394 ns ; 1.000 ns ; 10.394 ns ; SRD[8] ; FB_AD[24] ;
-; -9.381 ns ; 1.000 ns ; 10.381 ns ; nFB_OE ; FB_AD[26] ;
-; -9.380 ns ; 1.000 ns ; 10.380 ns ; nFB_CS2 ; FB_AD[11] ;
-; -9.371 ns ; 1.000 ns ; 10.371 ns ; FB_SIZE0 ; FB_AD[4] ;
-; -9.370 ns ; 1.000 ns ; 10.370 ns ; nFB_WR ; FB_AD[5] ;
-; -9.355 ns ; 1.000 ns ; 10.355 ns ; nFB_OE ; FB_AD[4] ;
-; -9.344 ns ; 1.000 ns ; 10.344 ns ; nFB_CS2 ; FB_AD[5] ;
-; -9.333 ns ; 1.000 ns ; 10.333 ns ; FB_SIZE0 ; FB_AD[16] ;
-; -9.328 ns ; 1.000 ns ; 10.328 ns ; FB_SIZE0 ; FB_AD[2] ;
-; -9.315 ns ; 1.000 ns ; 10.315 ns ; FB_SIZE1 ; FB_AD[4] ;
-; -9.312 ns ; 1.000 ns ; 10.312 ns ; FB_SIZE0 ; FB_AD[3] ;
-; -9.312 ns ; 1.000 ns ; 10.312 ns ; nFB_OE ; FB_AD[2] ;
-; -9.309 ns ; 1.000 ns ; 10.309 ns ; MAIN_CLK ; FB_AD[22] ;
-; -9.305 ns ; 1.000 ns ; 10.305 ns ; MAIN_CLK ; FB_AD[25] ;
-; -9.296 ns ; 1.000 ns ; 10.296 ns ; nFB_OE ; FB_AD[3] ;
-; -9.278 ns ; 1.000 ns ; 10.278 ns ; FB_SIZE1 ; FB_AD[26] ;
-; -9.275 ns ; 1.000 ns ; 10.275 ns ; nFB_WR ; FB_AD[2] ;
-; -9.273 ns ; 1.000 ns ; 10.273 ns ; nFB_CS1 ; nFB_TA ;
-; -9.272 ns ; 1.000 ns ; 10.272 ns ; FB_SIZE1 ; FB_AD[2] ;
-; -9.271 ns ; 1.000 ns ; 10.271 ns ; nFB_CS2 ; FB_AD[16] ;
-; -9.262 ns ; 1.000 ns ; 10.262 ns ; nFB_OE ; FB_AD[28] ;
-; -9.256 ns ; 1.000 ns ; 10.256 ns ; FB_SIZE1 ; FB_AD[3] ;
-; -9.245 ns ; 1.000 ns ; 10.245 ns ; nFB_CS2 ; FB_AD[2] ;
-; -9.231 ns ; 1.000 ns ; 10.231 ns ; CLK33M ; VB[7] ;
-; -9.210 ns ; 1.000 ns ; 10.210 ns ; nFB_CS2 ; FB_AD[4] ;
-; -9.203 ns ; 1.000 ns ; 10.203 ns ; nFB_OE ; FB_AD[9] ;
-; -9.201 ns ; 1.000 ns ; 10.201 ns ; nFB_CS2 ; FB_AD[8] ;
-; -9.199 ns ; 1.000 ns ; 10.199 ns ; MAIN_CLK ; FB_AD[31] ;
-; -9.198 ns ; 1.000 ns ; 10.198 ns ; CLK33M ; VSYNC_PAD ;
-; -9.193 ns ; 1.000 ns ; 10.193 ns ; CLK33M ; VR[6] ;
-; -9.191 ns ; 1.000 ns ; 10.191 ns ; CLK33M ; VG[3] ;
-; -9.176 ns ; 1.000 ns ; 10.176 ns ; nFB_CS1 ; FB_AD[4] ;
-; -9.168 ns ; 1.000 ns ; 10.168 ns ; LP_D[7] ; FB_AD[31] ;
-; -9.156 ns ; 1.000 ns ; 10.156 ns ; FB_SIZE1 ; FB_AD[16] ;
-; -9.145 ns ; 1.000 ns ; 10.145 ns ; MAIN_CLK ; FB_AD[23] ;
-; -9.145 ns ; 1.000 ns ; 10.145 ns ; nFB_CS2 ; FB_AD[28] ;
-; -9.112 ns ; 1.000 ns ; 10.112 ns ; nFB_WR ; FB_AD[3] ;
-; -9.099 ns ; 1.000 ns ; 10.099 ns ; MAIN_CLK ; FB_AD[19] ;
-; -9.089 ns ; 1.000 ns ; 10.089 ns ; nFB_OE ; FB_AD[5] ;
-; -9.088 ns ; 1.000 ns ; 10.088 ns ; SRD[5] ; FB_AD[21] ;
-; -9.081 ns ; 1.000 ns ; 10.081 ns ; nFB_OE ; FB_AD[16] ;
-; -9.079 ns ; 1.000 ns ; 10.079 ns ; MAIN_CLK ; FB_AD[24] ;
-; -9.047 ns ; 1.000 ns ; 10.047 ns ; nFB_CS2 ; FB_AD[10] ;
-; -9.019 ns ; 1.000 ns ; 10.019 ns ; nFB_CS2 ; FB_AD[13] ;
-; -9.004 ns ; 1.000 ns ; 10.004 ns ; FB_SIZE0 ; FB_AD[8] ;
-; -8.984 ns ; 1.000 ns ; 9.984 ns ; LP_D[5] ; FB_AD[29] ;
-; -8.935 ns ; 1.000 ns ; 9.935 ns ; SRD[4] ; FB_AD[20] ;
-; -8.933 ns ; 1.000 ns ; 9.933 ns ; nFB_OE ; FB_AD[30] ;
-; -8.927 ns ; 1.000 ns ; 9.927 ns ; SRD[10] ; FB_AD[26] ;
-; -8.926 ns ; 1.000 ns ; 9.926 ns ; nFB_OE ; FB_AD[8] ;
-; -8.924 ns ; 1.000 ns ; 9.924 ns ; nFB_CS2 ; FB_AD[6] ;
-; -8.921 ns ; 1.000 ns ; 9.921 ns ; nFB_WR ; FB_AD[4] ;
-; -8.916 ns ; 1.000 ns ; 9.916 ns ; LP_D[6] ; FB_AD[30] ;
-; -8.909 ns ; 1.000 ns ; 9.909 ns ; nFB_CS2 ; FB_AD[15] ;
-; -8.902 ns ; 1.000 ns ; 9.902 ns ; FB_SIZE1 ; FB_AD[8] ;
-; -8.896 ns ; 1.000 ns ; 9.896 ns ; FB_SIZE0 ; FB_AD[5] ;
-; -8.876 ns ; 1.000 ns ; 9.876 ns ; nFB_CS2 ; FB_AD[14] ;
-; -8.873 ns ; 1.000 ns ; 9.873 ns ; LP_BUSY ; FB_AD[16] ;
-; -8.869 ns ; 1.000 ns ; 9.869 ns ; MAIN_CLK ; FB_AD[4] ;
-; -8.864 ns ; 1.000 ns ; 9.864 ns ; nFB_OE ; FB_AD[29] ;
-; -8.852 ns ; 1.000 ns ; 9.852 ns ; nFB_CS2 ; FB_AD[12] ;
-; -8.840 ns ; 1.000 ns ; 9.840 ns ; FB_SIZE1 ; FB_AD[5] ;
-; -8.826 ns ; 1.000 ns ; 9.826 ns ; MAIN_CLK ; FB_AD[2] ;
-; -8.819 ns ; 1.000 ns ; 9.819 ns ; DCD ; FB_AD[3] ;
-; -8.810 ns ; 1.000 ns ; 9.810 ns ; MAIN_CLK ; FB_AD[3] ;
-; -8.804 ns ; 1.000 ns ; 9.804 ns ; nFB_OE ; FB_AD[13] ;
-; -8.803 ns ; 1.000 ns ; 9.803 ns ; SRD[7] ; FB_AD[23] ;
-; -8.780 ns ; 1.000 ns ; 9.780 ns ; nFB_CS2 ; FB_AD[1] ;
-; -8.776 ns ; 1.000 ns ; 9.776 ns ; MAIN_CLK ; FB_AD[28] ;
-; -8.715 ns ; 1.000 ns ; 9.715 ns ; FB_SIZE0 ; FB_AD[12] ;
-; -8.715 ns ; 1.000 ns ; 9.715 ns ; FB_SIZE0 ; FB_AD[11] ;
-; -8.699 ns ; 1.000 ns ; 9.699 ns ; FB_SIZE0 ; BA[0] ;
-; -8.699 ns ; 1.000 ns ; 9.699 ns ; nFB_OE ; FB_AD[12] ;
-; -8.699 ns ; 1.000 ns ; 9.699 ns ; nFB_OE ; FB_AD[11] ;
-; -8.672 ns ; 1.000 ns ; 9.672 ns ; FB_SIZE0 ; FB_AD[6] ;
-; -8.660 ns ; 1.000 ns ; 9.660 ns ; RI ; FB_AD[8] ;
-; -8.659 ns ; 1.000 ns ; 9.659 ns ; FB_SIZE1 ; FB_AD[12] ;
-; -8.659 ns ; 1.000 ns ; 9.659 ns ; FB_SIZE1 ; FB_AD[11] ;
-; -8.656 ns ; 1.000 ns ; 9.656 ns ; nFB_OE ; FB_AD[6] ;
-; -8.651 ns ; 1.000 ns ; 9.651 ns ; FB_SIZE0 ; FB_AD[0] ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+-----------------+----------+-----------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; th ;
-+-----------------------------------------+-----------------------------------------------------+-----------+-----------+-----------------------------------------------------------------------------------------------------------------------------------------------+----------+
-; Minimum Slack ; Required th ; Actual th ; From ; To ; To Clock ;
-+-----------------------------------------+-----------------------------------------------------+-----------+-----------+-----------------------------------------------------------------------------------------------------------------------------------------------+----------+
-; -0.401 ns ; 1.000 ns ; 1.401 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[9] ; MAIN_CLK ;
-; -0.386 ns ; 1.000 ns ; 1.386 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[9] ; MAIN_CLK ;
-; -0.383 ns ; 1.000 ns ; 1.383 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[5] ; MAIN_CLK ;
-; -0.383 ns ; 1.000 ns ; 1.383 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[21] ; MAIN_CLK ;
-; -0.370 ns ; 1.000 ns ; 1.370 ns ; CTS ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_SRC_EDGE[2] ; MAIN_CLK ;
-; -0.339 ns ; 1.000 ns ; 1.339 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[2] ; MAIN_CLK ;
-; -0.333 ns ; 1.000 ns ; 1.333 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[22] ; MAIN_CLK ;
-; -0.328 ns ; 1.000 ns ; 1.328 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[9] ; MAIN_CLK ;
-; -0.325 ns ; 1.000 ns ; 1.325 ns ; FB_AD[27] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[11] ; MAIN_CLK ;
-; -0.325 ns ; 1.000 ns ; 1.325 ns ; RI ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|INT_SRC_EDGE[14] ; MAIN_CLK ;
-; -0.321 ns ; 1.000 ns ; 1.321 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[5] ; MAIN_CLK ;
-; -0.320 ns ; 1.000 ns ; 1.320 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[25] ; MAIN_CLK ;
-; -0.310 ns ; 1.000 ns ; 1.310 ns ; FB_AD[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[5] ; MAIN_CLK ;
-; -0.302 ns ; 1.000 ns ; 1.302 ns ; FB_AD[27] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[11] ; MAIN_CLK ;
-; -0.302 ns ; 1.000 ns ; 1.302 ns ; CTS ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|\EDGE_ENA:LOCK[2] ; MAIN_CLK ;
-; -0.293 ns ; 1.000 ns ; 1.293 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[2] ; MAIN_CLK ;
-; -0.285 ns ; 1.000 ns ; 1.285 ns ; FB_AD[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[6] ; MAIN_CLK ;
-; -0.283 ns ; 1.000 ns ; 1.283 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[9] ; MAIN_CLK ;
-; -0.275 ns ; 1.000 ns ; 1.275 ns ; FB_AD[17] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[17] ; MAIN_CLK ;
-; -0.272 ns ; 1.000 ns ; 1.272 ns ; FB_AD[24] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[8] ; MAIN_CLK ;
-; -0.269 ns ; 1.000 ns ; 1.269 ns ; FB_AD[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[4] ; MAIN_CLK ;
-; -0.265 ns ; 1.000 ns ; 1.265 ns ; FB_AD[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[4] ; MAIN_CLK ;
-; -0.252 ns ; 1.000 ns ; 1.252 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[3] ; MAIN_CLK ;
-; -0.247 ns ; 1.000 ns ; 1.247 ns ; FB_AD[24] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[8] ; MAIN_CLK ;
-; -0.246 ns ; 1.000 ns ; 1.246 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[26] ; MAIN_CLK ;
-; -0.245 ns ; 1.000 ns ; 1.245 ns ; FB_AD[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[23] ; MAIN_CLK ;
-; -0.238 ns ; 1.000 ns ; 1.238 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[16] ; MAIN_CLK ;
-; -0.235 ns ; 1.000 ns ; 1.235 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[3] ; MAIN_CLK ;
-; -0.235 ns ; 1.000 ns ; 1.235 ns ; FB_AD[24] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[8] ; MAIN_CLK ;
-; -0.227 ns ; 1.000 ns ; 1.227 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[18] ; MAIN_CLK ;
-; -0.226 ns ; 1.000 ns ; 1.226 ns ; FB_AD[10] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[10] ; MAIN_CLK ;
-; -0.224 ns ; 1.000 ns ; 1.224 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[18] ; MAIN_CLK ;
-; -0.223 ns ; 1.000 ns ; 1.223 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[0] ; MAIN_CLK ;
-; -0.222 ns ; 1.000 ns ; 1.222 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[0] ; MAIN_CLK ;
-; -0.216 ns ; 1.000 ns ; 1.216 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[10] ; MAIN_CLK ;
-; -0.208 ns ; 1.000 ns ; 1.208 ns ; FB_AD[24] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[8] ; MAIN_CLK ;
-; -0.202 ns ; 1.000 ns ; 1.202 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[22] ; MAIN_CLK ;
-; -0.197 ns ; 1.000 ns ; 1.197 ns ; FB_AD[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[9] ; MAIN_CLK ;
-; -0.194 ns ; 1.000 ns ; 1.194 ns ; FB_AD[15] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[15] ; MAIN_CLK ;
-; -0.191 ns ; 1.000 ns ; 1.191 ns ; FB_AD[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[5] ; MAIN_CLK ;
-; -0.189 ns ; 1.000 ns ; 1.189 ns ; FB_AD[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[6] ; MAIN_CLK ;
-; -0.187 ns ; 1.000 ns ; 1.187 ns ; FB_AD[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[1] ; MAIN_CLK ;
-; -0.181 ns ; 1.000 ns ; 1.181 ns ; FB_AD[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[4] ; MAIN_CLK ;
-; -0.179 ns ; 1.000 ns ; 1.179 ns ; FB_AD[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[3] ; MAIN_CLK ;
-; -0.173 ns ; 1.000 ns ; 1.173 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[18] ; MAIN_CLK ;
-; -0.172 ns ; 1.000 ns ; 1.172 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[0] ; MAIN_CLK ;
-; -0.166 ns ; 1.000 ns ; 1.166 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[10] ; MAIN_CLK ;
-; -0.165 ns ; 1.000 ns ; 1.165 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[10] ; MAIN_CLK ;
-; -0.162 ns ; 1.000 ns ; 1.162 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[6] ; MAIN_CLK ;
-; -0.159 ns ; 1.000 ns ; 1.159 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[19] ; MAIN_CLK ;
-; -0.159 ns ; 1.000 ns ; 1.159 ns ; FB_AD[27] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[27] ; MAIN_CLK ;
-; -0.154 ns ; 1.000 ns ; 1.154 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[19] ; MAIN_CLK ;
-; -0.151 ns ; 1.000 ns ; 1.151 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[9] ; MAIN_CLK ;
-; -0.149 ns ; 1.000 ns ; 1.149 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[26] ; MAIN_CLK ;
-; -0.146 ns ; 1.000 ns ; 1.146 ns ; FB_AD[17] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[1] ; MAIN_CLK ;
-; -0.145 ns ; 1.000 ns ; 1.145 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[5] ; MAIN_CLK ;
-; -0.142 ns ; 1.000 ns ; 1.142 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[9] ; MAIN_CLK ;
-; -0.141 ns ; 1.000 ns ; 1.141 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[10] ; MAIN_CLK ;
-; -0.140 ns ; 1.000 ns ; 1.140 ns ; FB_AD[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[4] ; MAIN_CLK ;
-; -0.137 ns ; 1.000 ns ; 1.137 ns ; FB_AD[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[3] ; MAIN_CLK ;
-; -0.134 ns ; 1.000 ns ; 1.134 ns ; FB_AD[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[7] ; MAIN_CLK ;
-; -0.130 ns ; 1.000 ns ; 1.130 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[22] ; MAIN_CLK ;
-; -0.130 ns ; 1.000 ns ; 1.130 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[10] ; MAIN_CLK ;
-; -0.125 ns ; 1.000 ns ; 1.125 ns ; FB_AD[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[7] ; MAIN_CLK ;
-; -0.121 ns ; 1.000 ns ; 1.121 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[0] ; MAIN_CLK ;
-; -0.121 ns ; 1.000 ns ; 1.121 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[2] ; MAIN_CLK ;
-; -0.113 ns ; 1.000 ns ; 1.113 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[5] ; MAIN_CLK ;
-; -0.109 ns ; 1.000 ns ; 1.109 ns ; FB_AD[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[7] ; MAIN_CLK ;
-; -0.108 ns ; 1.000 ns ; 1.108 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[2] ; MAIN_CLK ;
-; -0.099 ns ; 1.000 ns ; 1.099 ns ; FB_AD[10] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[10] ; MAIN_CLK ;
-; -0.094 ns ; 1.000 ns ; 1.094 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[19] ; MAIN_CLK ;
-; -0.092 ns ; 1.000 ns ; 1.092 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[9] ; MAIN_CLK ;
-; -0.090 ns ; 1.000 ns ; 1.090 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[10] ; MAIN_CLK ;
-; -0.089 ns ; 1.000 ns ; 1.089 ns ; FB_AD[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[23] ; MAIN_CLK ;
-; -0.087 ns ; 1.000 ns ; 1.087 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[3] ; MAIN_CLK ;
-; -0.086 ns ; 1.000 ns ; 1.086 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[5] ; MAIN_CLK ;
-; -0.085 ns ; 1.000 ns ; 1.085 ns ; FB_AD[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[9] ; MAIN_CLK ;
-; -0.081 ns ; 1.000 ns ; 1.081 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0~porta_datain_reg0 ; MAIN_CLK ;
-; -0.079 ns ; 1.000 ns ; 1.079 ns ; FB_AD[24] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[24] ; MAIN_CLK ;
-; -0.078 ns ; 1.000 ns ; 1.078 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[9] ; MAIN_CLK ;
-; -0.077 ns ; 1.000 ns ; 1.077 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[9] ; MAIN_CLK ;
-; -0.075 ns ; 1.000 ns ; 1.075 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[2] ; MAIN_CLK ;
-; -0.074 ns ; 1.000 ns ; 1.074 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[21] ; MAIN_CLK ;
-; -0.070 ns ; 1.000 ns ; 1.070 ns ; FB_AD[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[1] ; MAIN_CLK ;
-; -0.070 ns ; 1.000 ns ; 1.070 ns ; FB_AD[14] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[14] ; MAIN_CLK ;
-; -0.068 ns ; 1.000 ns ; 1.068 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[5] ; MAIN_CLK ;
-; -0.068 ns ; 1.000 ns ; 1.068 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0~porta_datain_reg0 ; MAIN_CLK ;
-; -0.065 ns ; 1.000 ns ; 1.065 ns ; FB_AD[14] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[14] ; MAIN_CLK ;
-; -0.064 ns ; 1.000 ns ; 1.064 ns ; FB_AD[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[7] ; MAIN_CLK ;
-; -0.064 ns ; 1.000 ns ; 1.064 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[10] ; MAIN_CLK ;
-; -0.062 ns ; 1.000 ns ; 1.062 ns ; FB_AD[27] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[27] ; MAIN_CLK ;
-; -0.059 ns ; 1.000 ns ; 1.059 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[3] ; MAIN_CLK ;
-; -0.057 ns ; 1.000 ns ; 1.057 ns ; FB_AD[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[4] ; MAIN_CLK ;
-; -0.055 ns ; 1.000 ns ; 1.055 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[18] ; MAIN_CLK ;
-; -0.055 ns ; 1.000 ns ; 1.055 ns ; FB_AD[6] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[6] ; MAIN_CLK ;
-; -0.055 ns ; 1.000 ns ; 1.055 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[25] ; MAIN_CLK ;
-; -0.053 ns ; 1.000 ns ; 1.053 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[9] ; MAIN_CLK ;
-; -0.047 ns ; 1.000 ns ; 1.047 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[3] ; MAIN_CLK ;
-; -0.047 ns ; 1.000 ns ; 1.047 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[9] ; MAIN_CLK ;
-; -0.046 ns ; 1.000 ns ; 1.046 ns ; FB_AD[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[7] ; MAIN_CLK ;
-; -0.042 ns ; 1.000 ns ; 1.042 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[18] ; MAIN_CLK ;
-; -0.042 ns ; 1.000 ns ; 1.042 ns ; FB_AD[24] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[8] ; MAIN_CLK ;
-; -0.039 ns ; 1.000 ns ; 1.039 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[21] ; MAIN_CLK ;
-; -0.037 ns ; 1.000 ns ; 1.037 ns ; FB_AD[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[7] ; MAIN_CLK ;
-; -0.037 ns ; 1.000 ns ; 1.037 ns ; FB_AD[4] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[4] ; MAIN_CLK ;
-; -0.035 ns ; 1.000 ns ; 1.035 ns ; FB_AD[14] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[14] ; MAIN_CLK ;
-; -0.033 ns ; 1.000 ns ; 1.033 ns ; FB_AD[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[20] ; MAIN_CLK ;
-; -0.028 ns ; 1.000 ns ; 1.028 ns ; FB_AD[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[4] ; MAIN_CLK ;
-; -0.026 ns ; 1.000 ns ; 1.026 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[2] ; MAIN_CLK ;
-; -0.022 ns ; 1.000 ns ; 1.022 ns ; FB_AD[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[0] ; MAIN_CLK ;
-; -0.018 ns ; 1.000 ns ; 1.018 ns ; FB_AD[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[7] ; MAIN_CLK ;
-; -0.018 ns ; 1.000 ns ; 1.018 ns ; FB_AD[12] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[12] ; MAIN_CLK ;
-; -0.017 ns ; 1.000 ns ; 1.017 ns ; FB_AD[17] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[17] ; MAIN_CLK ;
-; -0.017 ns ; 1.000 ns ; 1.017 ns ; FB_AD[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[7] ; MAIN_CLK ;
-; -0.011 ns ; 1.000 ns ; 1.011 ns ; FB_AD[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[3] ; MAIN_CLK ;
-; -0.010 ns ; 1.000 ns ; 1.010 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[3] ; MAIN_CLK ;
-; -0.004 ns ; 1.000 ns ; 1.004 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[3] ; MAIN_CLK ;
-; 0.007 ns ; 1.000 ns ; 0.993 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[2] ; MAIN_CLK ;
-; 0.008 ns ; 1.000 ns ; 0.992 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[25] ; MAIN_CLK ;
-; 0.009 ns ; 1.000 ns ; 0.991 ns ; FB_AD[10] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[10] ; MAIN_CLK ;
-; 0.009 ns ; 1.000 ns ; 0.991 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VSS[10] ; MAIN_CLK ;
-; 0.010 ns ; 1.000 ns ; 0.990 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[25] ; MAIN_CLK ;
-; 0.015 ns ; 1.000 ns ; 0.985 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[2] ; MAIN_CLK ;
-; 0.018 ns ; 1.000 ns ; 0.982 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[2] ; MAIN_CLK ;
-; 0.021 ns ; 1.000 ns ; 0.979 ns ; FB_AD[1] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[1] ; MAIN_CLK ;
-; 0.022 ns ; 1.000 ns ; 0.978 ns ; FB_AD[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[2] ; MAIN_CLK ;
-; 0.027 ns ; 1.000 ns ; 0.973 ns ; FB_AD[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[7] ; MAIN_CLK ;
-; 0.033 ns ; 1.000 ns ; 0.967 ns ; FB_AD[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[2] ; MAIN_CLK ;
-; 0.036 ns ; 1.000 ns ; 0.964 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[6] ; MAIN_CLK ;
-; 0.042 ns ; 1.000 ns ; 0.958 ns ; FB_AD[24] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[8] ; MAIN_CLK ;
-; 0.044 ns ; 1.000 ns ; 0.956 ns ; FB_AD[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[0] ; MAIN_CLK ;
-; 0.045 ns ; 1.000 ns ; 0.955 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[22] ; MAIN_CLK ;
-; 0.045 ns ; 1.000 ns ; 0.955 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[10] ; MAIN_CLK ;
-; 0.046 ns ; 1.000 ns ; 0.954 ns ; FB_AD[14] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[14] ; MAIN_CLK ;
-; 0.047 ns ; 1.000 ns ; 0.953 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[3] ; MAIN_CLK ;
-; 0.049 ns ; 1.000 ns ; 0.951 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[6] ; MAIN_CLK ;
-; 0.049 ns ; 1.000 ns ; 0.951 ns ; VD[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[14] ; MAIN_CLK ;
-; 0.049 ns ; 1.000 ns ; 0.951 ns ; VD[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[5] ; MAIN_CLK ;
-; 0.049 ns ; 1.000 ns ; 0.951 ns ; VD[5] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[5] ; MAIN_CLK ;
-; 0.050 ns ; 1.000 ns ; 0.950 ns ; VD[14] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[14] ; MAIN_CLK ;
-; 0.050 ns ; 1.000 ns ; 0.950 ns ; RI ; FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|\EDGE_ENA:LOCK[14] ; MAIN_CLK ;
-; 0.054 ns ; 1.000 ns ; 0.946 ns ; FB_AD[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[3] ; MAIN_CLK ;
-; 0.054 ns ; 1.000 ns ; 0.946 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBB[2] ; MAIN_CLK ;
-; 0.055 ns ; 1.000 ns ; 0.945 ns ; FB_AD[29] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[29] ; MAIN_CLK ;
-; 0.055 ns ; 1.000 ns ; 0.945 ns ; VD[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[4] ; MAIN_CLK ;
-; 0.057 ns ; 1.000 ns ; 0.943 ns ; VD[4] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[4] ; MAIN_CLK ;
-; 0.064 ns ; 1.000 ns ; 0.936 ns ; FB_AD[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[20] ; MAIN_CLK ;
-; 0.078 ns ; 1.000 ns ; 0.922 ns ; FB_AD[18] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VR_FRQ[2] ; MAIN_CLK ;
-; 0.079 ns ; 1.000 ns ; 0.921 ns ; FB_AD[19] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[3] ; MAIN_CLK ;
-; 0.079 ns ; 1.000 ns ; 0.921 ns ; VD[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[8] ; MAIN_CLK ;
-; 0.079 ns ; 1.000 ns ; 0.921 ns ; VD[8] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[8] ; MAIN_CLK ;
-; 0.081 ns ; 1.000 ns ; 0.919 ns ; VD[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[7] ; MAIN_CLK ;
-; 0.082 ns ; 1.000 ns ; 0.918 ns ; VD[7] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[7] ; MAIN_CLK ;
-; 0.091 ns ; 1.000 ns ; 0.909 ns ; FB_AD[17] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB[1] ; MAIN_CLK ;
-; 0.098 ns ; 1.000 ns ; 0.902 ns ; FB_AD[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[3] ; MAIN_CLK ;
-; 0.106 ns ; 1.000 ns ; 0.894 ns ; FB_AD[25] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[9] ; MAIN_CLK ;
-; 0.107 ns ; 1.000 ns ; 0.893 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[16] ; MAIN_CLK ;
-; 0.109 ns ; 1.000 ns ; 0.891 ns ; FB_AD[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[0] ; MAIN_CLK ;
-; 0.110 ns ; 1.000 ns ; 0.890 ns ; FB_AD[27] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[27] ; MAIN_CLK ;
-; 0.114 ns ; 1.000 ns ; 0.886 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0~porta_datain_reg0 ; MAIN_CLK ;
-; 0.119 ns ; 1.000 ns ; 0.881 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[21] ; MAIN_CLK ;
-; 0.125 ns ; 1.000 ns ; 0.875 ns ; FB_AD[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[4] ; MAIN_CLK ;
-; 0.125 ns ; 1.000 ns ; 0.875 ns ; FB_AD[5] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[5] ; MAIN_CLK ;
-; 0.128 ns ; 1.000 ns ; 0.872 ns ; FB_AD[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HL[2] ; MAIN_CLK ;
-; 0.131 ns ; 1.000 ns ; 0.869 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[21] ; MAIN_CLK ;
-; 0.131 ns ; 1.000 ns ; 0.869 ns ; FB_AD[29] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[29] ; MAIN_CLK ;
-; 0.132 ns ; 1.000 ns ; 0.868 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0~porta_datain_reg0 ; MAIN_CLK ;
-; 0.133 ns ; 1.000 ns ; 0.867 ns ; FB_AD[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[8] ; MAIN_CLK ;
-; 0.136 ns ; 1.000 ns ; 0.864 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VBE[0] ; MAIN_CLK ;
-; 0.148 ns ; 1.000 ns ; 0.852 ns ; FB_AD[9] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VH[9] ; MAIN_CLK ;
-; 0.149 ns ; 1.000 ns ; 0.851 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[6] ; MAIN_CLK ;
-; 0.151 ns ; 1.000 ns ; 0.849 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HSS[0] ; MAIN_CLK ;
-; 0.151 ns ; 1.000 ns ; 0.849 ns ; FB_AD[2] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[2] ; MAIN_CLK ;
-; 0.158 ns ; 1.000 ns ; 0.842 ns ; FB_AD[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[7] ; MAIN_CLK ;
-; 0.159 ns ; 1.000 ns ; 0.841 ns ; FB_AD[23] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[7] ; MAIN_CLK ;
-; 0.159 ns ; 1.000 ns ; 0.841 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[22] ; MAIN_CLK ;
-; 0.161 ns ; 1.000 ns ; 0.839 ns ; FB_AD[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[4] ; MAIN_CLK ;
-; 0.163 ns ; 1.000 ns ; 0.837 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[0] ; MAIN_CLK ;
-; 0.168 ns ; 1.000 ns ; 0.832 ns ; FB_AD[7] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[7] ; MAIN_CLK ;
-; 0.170 ns ; 1.000 ns ; 0.830 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ram_block1a0~porta_datain_reg0 ; MAIN_CLK ;
-; 0.170 ns ; 1.000 ns ; 0.830 ns ; FB_AD[22] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDE[6] ; MAIN_CLK ;
-; 0.172 ns ; 1.000 ns ; 0.828 ns ; FB_AD[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[8] ; MAIN_CLK ;
-; 0.178 ns ; 1.000 ns ; 0.822 ns ; FB_AD[10] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[10] ; MAIN_CLK ;
-; 0.180 ns ; 1.000 ns ; 0.820 ns ; FB_AD[10] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[10] ; MAIN_CLK ;
-; 0.181 ns ; 1.000 ns ; 0.819 ns ; FB_AD[17] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[1] ; MAIN_CLK ;
-; 0.186 ns ; 1.000 ns ; 0.814 ns ; FB_AD[0] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[0] ; MAIN_CLK ;
-; 0.188 ns ; 1.000 ns ; 0.812 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|FALCON_SHIFT_MODE[0] ; MAIN_CLK ;
-; 0.191 ns ; 1.000 ns ; 0.809 ns ; FB_AD[26] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[26] ; MAIN_CLK ;
-; 0.195 ns ; 1.000 ns ; 0.805 ns ; FB_AD[23] ; Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ram_block1a0~porta_datain_reg0 ; MAIN_CLK ;
-; 0.198 ns ; 1.000 ns ; 0.802 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBB[5] ; MAIN_CLK ;
-; 0.201 ns ; 1.000 ns ; 0.799 ns ; FB_AD[8] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_VL[8] ; MAIN_CLK ;
-; 0.202 ns ; 1.000 ns ; 0.798 ns ; FB_AD[17] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HHT[1] ; MAIN_CLK ;
-; 0.209 ns ; 1.000 ns ; 0.791 ns ; FB_AD[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VFT[4] ; MAIN_CLK ;
-; 0.213 ns ; 1.000 ns ; 0.787 ns ; FB_AD[24] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ST_SHIFT_MODE[0] ; MAIN_CLK ;
-; 0.216 ns ; 1.000 ns ; 0.784 ns ; FB_AD[20] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCR[20] ; MAIN_CLK ;
-; 0.220 ns ; 1.000 ns ; 0.780 ns ; VD[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[26] ; MAIN_CLK ;
-; 0.221 ns ; 1.000 ns ; 0.779 ns ; VD[26] ; Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_h[26] ; MAIN_CLK ;
-; 0.228 ns ; 1.000 ns ; 0.772 ns ; FB_AD[16] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VDB[0] ; MAIN_CLK ;
-; 0.228 ns ; 1.000 ns ; 0.772 ns ; FB_AD[21] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDE[5] ; MAIN_CLK ;
-; 0.233 ns ; 1.000 ns ; 0.767 ns ; FB_AD[3] ; Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ATARI_HH[3] ; MAIN_CLK ;
-; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ;
-+-----------------------------------------+-----------------------------------------------------+-----------+-----------+-----------------------------------------------------------------------------------------------------------------------------------------------+----------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Board Trace Model Assignments ;
-+---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+
-; Pin ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ;
-+---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+
-; CLK24M576 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LP_STR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; CLK25M ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nACSI_ACK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nACSI_RESET ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nACSI_CS ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ACSI_DIR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ACSI_A1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSCSI_ACK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSCSI_ATN ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SCSI_DIR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; MIDI_OLR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; MIDI_TLR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; TxD ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; RTS ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; DTR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; AMKB_TX ; 3.3-V LVCMOS ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IDE_RES ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nIDE_CS0 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nIDE_CS1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nIDE_WR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nIDE_RD ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nCF_CS0 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nCF_CS1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nROM3 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nROM4 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nRP_UDS ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nRP_LDS ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSDSEL ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nWR_GATE ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nWR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; YM_QA ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; YM_QB ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; YM_QC ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SD_CLK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; DSA_D ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nVWE ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nVCAS ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nVRAS ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nVCS ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nPD_VGA ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; TIN0 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSRCS ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSRBLE ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSRBHE ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSRWE ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nDREQ1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LED_FPGA_OK ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSROE ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VCKE ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nFB_TA ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nDDR_CLK ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; DDR_CLK ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VSYNC_PAD ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; HSYNC_PAD ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nBLANK_PAD ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; PIXEL_CLK_PAD ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSYNC ; 3.0-V LVCMOS ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nMOT_ON ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSTEP_DIR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSTEP ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; CLKUSB ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LPDIR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; BA[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; BA[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nIRQ[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nIRQ[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nIRQ[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nIRQ[4] ; 3.0-V LVCMOS ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nIRQ[3] ; 3.0-V LVCMOS ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nIRQ[2] ; 3.0-V LVCMOS ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[12] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[11] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[10] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[9] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[8] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VA[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VB[7] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VB[6] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VB[5] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VB[4] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VB[3] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VB[2] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VB[1] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VB[0] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VDM[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VDM[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VDM[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VDM[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VG[7] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VG[6] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VG[5] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VG[4] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VG[3] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VG[2] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VG[1] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VG[0] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VR[7] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VR[6] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VR[5] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VR[4] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VR[3] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VR[2] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VR[1] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VR[0] ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[31] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[30] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[29] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[28] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[27] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[26] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[25] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[24] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[23] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[22] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[21] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[20] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[19] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[18] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[17] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[16] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[15] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[14] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[13] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[12] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[11] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[10] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[9] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[8] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; FB_AD[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[31] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[30] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[29] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[28] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[27] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[26] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[25] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[24] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[23] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[22] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[21] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[20] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[19] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[18] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[17] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[16] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[15] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[14] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[13] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[12] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[11] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[10] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[9] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[8] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VD[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VDQS[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VDQS[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VDQS[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; VDQS[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[17] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[16] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[15] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[14] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[13] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[12] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[11] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[10] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[9] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[8] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; IO[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[15] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[14] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[13] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[12] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[11] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[10] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[9] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[8] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SRD[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SCSI_PAR ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSCSI_SEL ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSCSI_BUSY ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; nSCSI_RST ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SD_CD_DATA3 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SD_CMD_D1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ACSI_D[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ACSI_D[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ACSI_D[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ACSI_D[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ACSI_D[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ACSI_D[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ACSI_D[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ACSI_D[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LP_D[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LP_D[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LP_D[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LP_D[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LP_D[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LP_D[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LP_D[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; LP_D[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SCSI_D[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SCSI_D[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SCSI_D[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SCSI_D[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SCSI_D[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SCSI_D[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SCSI_D[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; SCSI_D[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-; ~ALTERA_nCEO~ ; 3.0-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ;
-+---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+
-
-
-+----------------------------------------------------------------------------+
-; Input Transition Times ;
-+-------------------------+--------------+-----------------+-----------------+
-; Pin ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
-+-------------------------+--------------+-----------------+-----------------+
-; nFB_BURST ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nACSI_DRQ ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nACSI_INT ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nSCSI_DRQ ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nSCSI_MSG ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nDCHG ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SD_DATA0 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SD_DATA1 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SD_DATA2 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SD_CARD_DEDECT ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SD_WP ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nDACK0 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; WP_CF_CARD ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nSCSI_C_D ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nSCSI_I_O ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nFB_CS3 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; TOUT0 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nMASTER ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[31] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[30] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[29] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[28] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[27] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[26] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[25] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[24] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[23] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[22] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[21] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[20] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[19] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[18] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[17] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[16] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[15] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[14] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[13] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[12] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[11] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[10] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[9] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[8] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_AD[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; VD[31] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[30] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[29] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[28] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[27] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[26] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[25] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[24] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[23] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[22] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[21] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[20] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[19] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[18] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[17] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[16] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[15] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[14] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[13] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[12] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[11] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[10] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[9] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[8] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[7] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[6] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[5] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[4] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[3] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[2] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[1] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VD[0] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VDQS[3] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VDQS[2] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VDQS[1] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; VDQS[0] ; 2.5 V ; 2000 ps ; 2000 ps ;
-; IO[17] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[16] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[15] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[14] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[13] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[12] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[11] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[10] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[9] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[8] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IO[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[15] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[14] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[13] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[12] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[11] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[10] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[9] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[8] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SRD[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SCSI_PAR ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nSCSI_SEL ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nSCSI_BUSY ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nSCSI_RST ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SD_CD_DATA3 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SD_CMD_D1 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ACSI_D[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ACSI_D[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ACSI_D[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ACSI_D[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ACSI_D[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ACSI_D[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ACSI_D[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ACSI_D[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; LP_D[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; LP_D[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; LP_D[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; LP_D[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; LP_D[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; LP_D[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; LP_D[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; LP_D[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SCSI_D[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SCSI_D[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SCSI_D[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SCSI_D[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SCSI_D[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SCSI_D[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SCSI_D[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; SCSI_D[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nRSTO_MCF ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nFB_WR ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nFB_CS1 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_SIZE1 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_SIZE0 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; FB_ALE ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nFB_CS2 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; MAIN_CLK ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nDACK1 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nFB_OE ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IDE_RDY ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; CLK33M ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; HD_DD ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nINDEX ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; RxD ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nWP ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; LP_BUSY ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; DCD ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; CTS ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; TRACK00 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; IDE_INT ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; RI ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nPCI_INTD ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nPCI_INTC ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nPCI_INTB ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nPCI_INTA ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; DVI_INT ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; E0_INT ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; PIC_INT ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; PIC_AMKB_RX ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; MIDI_IN ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; nRD_DATA ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; AMKB_RX ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ~ALTERA_ASDO_DATA1~ ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ~ALTERA_FLASH_nCE_nCSO~ ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ~ALTERA_DCLK~ ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ~ALTERA_DATA0~ ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
-; ~ALTERA_DEV_OE~ ; 2.5 V ; 2000 ps ; 2000 ps ;
-; ~ALTERA_DEV_CLRn~ ; 2.5 V ; 2000 ps ; 2000 ps ;
-+-------------------------+--------------+-----------------+-----------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Slow Corner Signal Integrity Metrics ;
-+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
-+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; CLK24M576 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; LP_STR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; CLK25M ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0394 V ; 0.292 V ; 0.188 V ; 9.15e-010 s ; 8.35e-010 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0394 V ; 0.292 V ; 0.188 V ; 9.15e-010 s ; 8.35e-010 s ; No ; Yes ;
-; nACSI_ACK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nACSI_RESET ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nACSI_CS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; ACSI_DIR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; ACSI_A1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nSCSI_ACK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nSCSI_ATN ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; SCSI_DIR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; MIDI_OLR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ;
-; MIDI_TLR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; TxD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; RTS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; DTR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; AMKB_TX ; 3.3-V LVCMOS ; 0 s ; 0 s ; 3.08 V ; 3.36e-006 V ; 3.09 V ; -0.013 V ; 0.103 V ; 0.224 V ; 1.59e-009 s ; 1.71e-009 s ; Yes ; Yes ; 3.08 V ; 3.36e-006 V ; 3.09 V ; -0.013 V ; 0.103 V ; 0.224 V ; 1.59e-009 s ; 1.71e-009 s ; Yes ; Yes ;
-; IDE_RES ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ;
-; nIDE_CS0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nIDE_CS1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nIDE_WR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nIDE_RD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nCF_CS0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nCF_CS1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nROM3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nROM4 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nRP_UDS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nRP_LDS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0394 V ; 0.292 V ; 0.188 V ; 9.15e-010 s ; 8.35e-010 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0394 V ; 0.292 V ; 0.188 V ; 9.15e-010 s ; 8.35e-010 s ; No ; Yes ;
-; nSDSEL ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; nWR_GATE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; nWR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; YM_QA ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; YM_QB ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; YM_QC ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SD_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; DSA_D ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; nVWE ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; nVCAS ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; nVRAS ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; nVCS ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.37 V ; -0.00683 V ; 0.081 V ; 0.016 V ; 4.14e-010 s ; 5.19e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.37 V ; -0.00683 V ; 0.081 V ; 0.016 V ; 4.14e-010 s ; 5.19e-010 s ; Yes ; Yes ;
-; nPD_VGA ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; TIN0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ;
-; nSRCS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; nSRBLE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; nSRBHE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; nSRWE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; nDREQ1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; LED_FPGA_OK ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.97e-006 V ; 2.34 V ; -0.00258 V ; 0.168 V ; 0.069 V ; 1.53e-009 s ; 1.92e-009 s ; No ; Yes ; 2.32 V ; 1.97e-006 V ; 2.34 V ; -0.00258 V ; 0.168 V ; 0.069 V ; 1.53e-009 s ; 1.92e-009 s ; No ; Yes ;
-; nSROE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; VCKE ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; nFB_TA ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nDDR_CLK ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; DDR_CLK ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VSYNC_PAD ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.81 V ; -0.00874 V ; 0.219 V ; 0.11 V ; 1.91e-009 s ; 2.08e-009 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.81 V ; -0.00874 V ; 0.219 V ; 0.11 V ; 1.91e-009 s ; 2.08e-009 s ; Yes ; Yes ;
-; HSYNC_PAD ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; nBLANK_PAD ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; PIXEL_CLK_PAD ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; nSYNC ; 3.0-V LVCMOS ; 0 s ; 0 s ; 2.8 V ; 6.97e-007 V ; 2.86 V ; -0.0234 V ; 0.145 V ; 0.061 V ; 4.67e-010 s ; 4.98e-010 s ; Yes ; Yes ; 2.8 V ; 6.97e-007 V ; 2.86 V ; -0.0234 V ; 0.145 V ; 0.061 V ; 4.67e-010 s ; 4.98e-010 s ; Yes ; Yes ;
-; nMOT_ON ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; nSTEP_DIR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; nSTEP ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; CLKUSB ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; LPDIR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; BA[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; BA[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.33 V ; -0.00279 V ; 0.14 V ; 0.06 V ; 2.15e-009 s ; 2.83e-009 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.33 V ; -0.00279 V ; 0.14 V ; 0.06 V ; 2.15e-009 s ; 2.83e-009 s ; Yes ; Yes ;
-; nIRQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nIRQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nIRQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ;
-; nIRQ[4] ; 3.0-V LVCMOS ; 0 s ; 0 s ; 2.8 V ; 1.1e-006 V ; 2.84 V ; -0.0267 V ; 0.263 V ; 0.124 V ; 7.35e-010 s ; 8.02e-010 s ; Yes ; Yes ; 2.8 V ; 1.1e-006 V ; 2.84 V ; -0.0267 V ; 0.263 V ; 0.124 V ; 7.35e-010 s ; 8.02e-010 s ; Yes ; Yes ;
-; nIRQ[3] ; 3.0-V LVCMOS ; 0 s ; 0 s ; 2.8 V ; 1.1e-006 V ; 2.84 V ; -0.0267 V ; 0.263 V ; 0.124 V ; 7.35e-010 s ; 8.02e-010 s ; Yes ; Yes ; 2.8 V ; 1.1e-006 V ; 2.84 V ; -0.0267 V ; 0.263 V ; 0.124 V ; 7.35e-010 s ; 8.02e-010 s ; Yes ; Yes ;
-; nIRQ[2] ; 3.0-V LVCMOS ; 0 s ; 0 s ; 2.8 V ; 1.1e-006 V ; 2.84 V ; -0.0267 V ; 0.263 V ; 0.124 V ; 7.35e-010 s ; 8.02e-010 s ; Yes ; Yes ; 2.8 V ; 1.1e-006 V ; 2.84 V ; -0.0267 V ; 0.263 V ; 0.124 V ; 7.35e-010 s ; 8.02e-010 s ; Yes ; Yes ;
-; VA[12] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.33 V ; -0.00282 V ; 0.119 V ; 0.046 V ; 2.08e-009 s ; 2.71e-009 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.33 V ; -0.00282 V ; 0.119 V ; 0.046 V ; 2.08e-009 s ; 2.71e-009 s ; Yes ; Yes ;
-; VA[11] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VA[10] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VA[9] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VA[8] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VA[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VA[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VA[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VA[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VA[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VA[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VA[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VA[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.37 V ; -0.00683 V ; 0.081 V ; 0.016 V ; 4.14e-010 s ; 5.19e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.37 V ; -0.00683 V ; 0.081 V ; 0.016 V ; 4.14e-010 s ; 5.19e-010 s ; Yes ; Yes ;
-; VB[7] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.81 V ; -0.00874 V ; 0.219 V ; 0.11 V ; 1.91e-009 s ; 2.08e-009 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.81 V ; -0.00874 V ; 0.219 V ; 0.11 V ; 1.91e-009 s ; 2.08e-009 s ; Yes ; Yes ;
-; VB[6] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VB[5] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VB[4] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VB[3] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VB[2] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VB[1] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VB[0] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VDM[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.37 V ; -0.00683 V ; 0.081 V ; 0.016 V ; 4.14e-010 s ; 5.19e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.37 V ; -0.00683 V ; 0.081 V ; 0.016 V ; 4.14e-010 s ; 5.19e-010 s ; Yes ; Yes ;
-; VDM[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VDM[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.33 V ; -0.00282 V ; 0.119 V ; 0.046 V ; 2.08e-009 s ; 2.71e-009 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.33 V ; -0.00282 V ; 0.119 V ; 0.046 V ; 2.08e-009 s ; 2.71e-009 s ; Yes ; Yes ;
-; VDM[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VG[7] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VG[6] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VG[5] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VG[4] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VG[3] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.81 V ; -0.00874 V ; 0.219 V ; 0.11 V ; 1.91e-009 s ; 2.08e-009 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.81 V ; -0.00874 V ; 0.219 V ; 0.11 V ; 1.91e-009 s ; 2.08e-009 s ; Yes ; Yes ;
-; VG[2] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VG[1] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VG[0] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VR[7] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VR[6] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.81 V ; -0.00874 V ; 0.219 V ; 0.11 V ; 1.91e-009 s ; 2.08e-009 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.81 V ; -0.00874 V ; 0.219 V ; 0.11 V ; 1.91e-009 s ; 2.08e-009 s ; Yes ; Yes ;
-; VR[5] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VR[4] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VR[3] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VR[2] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VR[1] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; VR[0] ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ; 2.8 V ; 6.88e-007 V ; 2.86 V ; -0.0441 V ; 0.132 V ; 0.083 V ; 4.56e-010 s ; 4.87e-010 s ; Yes ; Yes ;
-; FB_AD[31] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[30] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[29] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[28] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[27] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; FB_AD[26] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[25] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[24] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[23] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[22] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[21] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[20] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; FB_AD[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; FB_AD[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; FB_AD[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; VD[31] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[30] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.33 V ; -0.00282 V ; 0.119 V ; 0.046 V ; 2.08e-009 s ; 2.71e-009 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.33 V ; -0.00282 V ; 0.119 V ; 0.046 V ; 2.08e-009 s ; 2.71e-009 s ; Yes ; Yes ;
-; VD[29] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[28] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[27] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[26] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[25] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[24] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[23] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[22] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.33 V ; -0.00282 V ; 0.119 V ; 0.046 V ; 2.08e-009 s ; 2.71e-009 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.33 V ; -0.00282 V ; 0.119 V ; 0.046 V ; 2.08e-009 s ; 2.71e-009 s ; Yes ; Yes ;
-; VD[21] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[20] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[19] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[18] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[17] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[16] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VD[15] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[14] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[13] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.33 V ; -0.00279 V ; 0.14 V ; 0.06 V ; 2.15e-009 s ; 2.83e-009 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.33 V ; -0.00279 V ; 0.14 V ; 0.06 V ; 2.15e-009 s ; 2.83e-009 s ; Yes ; Yes ;
-; VD[12] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[11] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[10] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.37 V ; -0.00683 V ; 0.081 V ; 0.016 V ; 4.14e-010 s ; 5.19e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.37 V ; -0.00683 V ; 0.081 V ; 0.016 V ; 4.14e-010 s ; 5.19e-010 s ; Yes ; Yes ;
-; VD[9] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[8] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.33 V ; -0.00279 V ; 0.14 V ; 0.06 V ; 2.15e-009 s ; 2.83e-009 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.33 V ; -0.00279 V ; 0.14 V ; 0.06 V ; 2.15e-009 s ; 2.83e-009 s ; Yes ; Yes ;
-; VD[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VD[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VDQS[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VDQS[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ; 2.32 V ; 6.14e-007 V ; 2.36 V ; -0.00551 V ; 0.142 V ; 0.014 V ; 4.9e-010 s ; 6.6e-010 s ; Yes ; Yes ;
-; VDQS[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; VDQS[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ; 2.32 V ; 9.13e-007 V ; 2.36 V ; -0.00797 V ; 0.096 V ; 0.016 V ; 2.7e-010 s ; 3.71e-010 s ; Yes ; Yes ;
-; IO[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; IO[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; IO[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; IO[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; SRD[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SRD[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; SCSI_PAR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nSCSI_SEL ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nSCSI_BUSY ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; nSCSI_RST ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; SD_CD_DATA3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SD_CMD_D1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; ACSI_D[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; ACSI_D[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ;
-; ACSI_D[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; ACSI_D[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; ACSI_D[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; ACSI_D[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; ACSI_D[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.08 V ; -0.0041 V ; 0.274 V ; 0.267 V ; 5.67e-009 s ; 4.62e-009 s ; No ; Yes ;
-; ACSI_D[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; LP_D[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; LP_D[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; LP_D[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; LP_D[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ; 3.08 V ; 3.08e-006 V ; 3.08 V ; -0.00548 V ; 0.305 V ; 0.267 V ; 5.3e-009 s ; 4.39e-009 s ; Yes ; Yes ;
-; LP_D[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; LP_D[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; LP_D[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; LP_D[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ; 3.08 V ; 3.08e-006 V ; 3.13 V ; -0.0541 V ; 0.237 V ; 0.168 V ; 6.67e-010 s ; 6.12e-010 s ; No ; No ;
-; SCSI_D[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; SCSI_D[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; SCSI_D[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; SCSI_D[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; SCSI_D[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; SCSI_D[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; SCSI_D[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; SCSI_D[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ; 3.08 V ; 2.06e-006 V ; 3.12 V ; -0.0308 V ; 0.224 V ; 0.218 V ; 1.32e-009 s ; 1.07e-009 s ; No ; Yes ;
-; ~ALTERA_nCEO~ ; 3.0-V LVTTL ; 0 s ; 0 s ; 2.8 V ; 1.43e-006 V ; 2.84 V ; -0.0141 V ; 0.183 V ; 0.066 V ; 8.84e-010 s ; 1.02e-009 s ; No ; Yes ; 2.8 V ; 1.43e-006 V ; 2.84 V ; -0.0141 V ; 0.183 V ; 0.066 V ; 8.84e-010 s ; 1.02e-009 s ; No ; Yes ;
-+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fast Corner Signal Integrity Metrics ;
-+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
-+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; CLK24M576 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; LP_STR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; CLK25M ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.57 V ; -0.0649 V ; 0.332 V ; 0.165 V ; 6.78e-010 s ; 6.19e-010 s ; No ; Yes ; 3.46 V ; 1.29e-007 V ; 3.57 V ; -0.0649 V ; 0.332 V ; 0.165 V ; 6.78e-010 s ; 6.19e-010 s ; No ; Yes ;
-; nACSI_ACK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nACSI_RESET ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nACSI_CS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; ACSI_DIR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; ACSI_A1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nSCSI_ACK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nSCSI_ATN ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; SCSI_DIR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; MIDI_OLR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ;
-; MIDI_TLR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; TxD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; RTS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; DTR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; AMKB_TX ; 3.3-V LVCMOS ; 0 s ; 0 s ; 3.46 V ; 2.1e-007 V ; 3.5 V ; -0.042 V ; 0.297 V ; 0.24 V ; 1.12e-009 s ; 1.29e-009 s ; No ; No ; 3.46 V ; 2.1e-007 V ; 3.5 V ; -0.042 V ; 0.297 V ; 0.24 V ; 1.12e-009 s ; 1.29e-009 s ; No ; No ;
-; IDE_RES ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ;
-; nIDE_CS0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nIDE_CS1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nIDE_WR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nIDE_RD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nCF_CS0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nCF_CS1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nROM3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nROM4 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nRP_UDS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nRP_LDS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.57 V ; -0.0649 V ; 0.332 V ; 0.165 V ; 6.78e-010 s ; 6.19e-010 s ; No ; Yes ; 3.46 V ; 1.29e-007 V ; 3.57 V ; -0.0649 V ; 0.332 V ; 0.165 V ; 6.78e-010 s ; 6.19e-010 s ; No ; Yes ;
-; nSDSEL ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; nWR_GATE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; nWR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; YM_QA ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; YM_QB ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; YM_QC ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SD_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; DSA_D ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; nVWE ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; nVCAS ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; nVRAS ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; nVCS ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.73 V ; -0.0168 V ; 0.137 V ; 0.024 V ; 2.65e-010 s ; 3.37e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.73 V ; -0.0168 V ; 0.137 V ; 0.024 V ; 2.65e-010 s ; 3.37e-010 s ; Yes ; Yes ;
-; nPD_VGA ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; TIN0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ;
-; nSRCS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; nSRBLE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; nSRBHE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; nSRWE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; nDREQ1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; LED_FPGA_OK ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 7.2e-008 V ; 2.68 V ; -0.0147 V ; 0.295 V ; 0.167 V ; 9.36e-010 s ; 1.3e-009 s ; No ; Yes ; 2.62 V ; 7.2e-008 V ; 2.68 V ; -0.0147 V ; 0.295 V ; 0.167 V ; 9.36e-010 s ; 1.3e-009 s ; No ; Yes ;
-; nSROE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; VCKE ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; nFB_TA ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nDDR_CLK ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; DDR_CLK ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VSYNC_PAD ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.19 V ; -0.0203 V ; 0.22 V ; 0.194 V ; 1.43e-009 s ; 1.59e-009 s ; No ; Yes ; 3.15 V ; 3.57e-008 V ; 3.19 V ; -0.0203 V ; 0.22 V ; 0.194 V ; 1.43e-009 s ; 1.59e-009 s ; No ; Yes ;
-; HSYNC_PAD ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; nBLANK_PAD ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; PIXEL_CLK_PAD ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; nSYNC ; 3.0-V LVCMOS ; 0 s ; 0 s ; 3.15 V ; 3.66e-008 V ; 3.29 V ; -0.0256 V ; 0.236 V ; 0.049 V ; 2.86e-010 s ; 3.59e-010 s ; Yes ; Yes ; 3.15 V ; 3.66e-008 V ; 3.29 V ; -0.0256 V ; 0.236 V ; 0.049 V ; 2.86e-010 s ; 3.59e-010 s ; Yes ; Yes ;
-; nMOT_ON ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; nSTEP_DIR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; nSTEP ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; CLKUSB ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; LPDIR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; BA[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; BA[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.65 V ; -0.00959 V ; 0.236 V ; 0.105 V ; 1.48e-009 s ; 2e-009 s ; No ; Yes ; 2.62 V ; 2.33e-008 V ; 2.65 V ; -0.00959 V ; 0.236 V ; 0.105 V ; 1.48e-009 s ; 2e-009 s ; No ; Yes ;
-; nIRQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nIRQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nIRQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ;
-; nIRQ[4] ; 3.0-V LVCMOS ; 0 s ; 0 s ; 3.15 V ; 5.7e-008 V ; 3.25 V ; -0.0382 V ; 0.318 V ; 0.098 V ; 5.02e-010 s ; 5.55e-010 s ; No ; Yes ; 3.15 V ; 5.7e-008 V ; 3.25 V ; -0.0382 V ; 0.318 V ; 0.098 V ; 5.02e-010 s ; 5.55e-010 s ; No ; Yes ;
-; nIRQ[3] ; 3.0-V LVCMOS ; 0 s ; 0 s ; 3.15 V ; 5.7e-008 V ; 3.25 V ; -0.0382 V ; 0.318 V ; 0.098 V ; 5.02e-010 s ; 5.55e-010 s ; No ; Yes ; 3.15 V ; 5.7e-008 V ; 3.25 V ; -0.0382 V ; 0.318 V ; 0.098 V ; 5.02e-010 s ; 5.55e-010 s ; No ; Yes ;
-; nIRQ[2] ; 3.0-V LVCMOS ; 0 s ; 0 s ; 3.15 V ; 5.7e-008 V ; 3.25 V ; -0.0382 V ; 0.318 V ; 0.098 V ; 5.02e-010 s ; 5.55e-010 s ; No ; Yes ; 3.15 V ; 5.7e-008 V ; 3.25 V ; -0.0382 V ; 0.318 V ; 0.098 V ; 5.02e-010 s ; 5.55e-010 s ; No ; Yes ;
-; VA[12] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.65 V ; -0.00976 V ; 0.206 V ; 0.133 V ; 1.45e-009 s ; 1.89e-009 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.65 V ; -0.00976 V ; 0.206 V ; 0.133 V ; 1.45e-009 s ; 1.89e-009 s ; No ; Yes ;
-; VA[11] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VA[10] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VA[9] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VA[8] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VA[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VA[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VA[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VA[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VA[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VA[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VA[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VA[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.73 V ; -0.0168 V ; 0.137 V ; 0.024 V ; 2.65e-010 s ; 3.37e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.73 V ; -0.0168 V ; 0.137 V ; 0.024 V ; 2.65e-010 s ; 3.37e-010 s ; Yes ; Yes ;
-; VB[7] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.19 V ; -0.0203 V ; 0.22 V ; 0.194 V ; 1.43e-009 s ; 1.59e-009 s ; No ; Yes ; 3.15 V ; 3.57e-008 V ; 3.19 V ; -0.0203 V ; 0.22 V ; 0.194 V ; 1.43e-009 s ; 1.59e-009 s ; No ; Yes ;
-; VB[6] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VB[5] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VB[4] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VB[3] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VB[2] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VB[1] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VB[0] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VDM[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.73 V ; -0.0168 V ; 0.137 V ; 0.024 V ; 2.65e-010 s ; 3.37e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.73 V ; -0.0168 V ; 0.137 V ; 0.024 V ; 2.65e-010 s ; 3.37e-010 s ; Yes ; Yes ;
-; VDM[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VDM[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.65 V ; -0.00976 V ; 0.206 V ; 0.133 V ; 1.45e-009 s ; 1.89e-009 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.65 V ; -0.00976 V ; 0.206 V ; 0.133 V ; 1.45e-009 s ; 1.89e-009 s ; No ; Yes ;
-; VDM[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VG[7] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VG[6] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VG[5] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VG[4] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VG[3] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.19 V ; -0.0203 V ; 0.22 V ; 0.194 V ; 1.43e-009 s ; 1.59e-009 s ; No ; Yes ; 3.15 V ; 3.57e-008 V ; 3.19 V ; -0.0203 V ; 0.22 V ; 0.194 V ; 1.43e-009 s ; 1.59e-009 s ; No ; Yes ;
-; VG[2] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VG[1] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VG[0] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VR[7] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VR[6] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.19 V ; -0.0203 V ; 0.22 V ; 0.194 V ; 1.43e-009 s ; 1.59e-009 s ; No ; Yes ; 3.15 V ; 3.57e-008 V ; 3.19 V ; -0.0203 V ; 0.22 V ; 0.194 V ; 1.43e-009 s ; 1.59e-009 s ; No ; Yes ;
-; VR[5] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VR[4] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VR[3] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VR[2] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VR[1] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; VR[0] ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ; 3.15 V ; 3.57e-008 V ; 3.27 V ; -0.0618 V ; 0.21 V ; 0.097 V ; 2.81e-010 s ; 3.83e-010 s ; Yes ; Yes ;
-; FB_AD[31] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[30] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[29] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[28] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[27] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; FB_AD[26] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[25] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[24] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[23] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[22] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[21] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[20] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; FB_AD[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; FB_AD[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; FB_AD[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; VD[31] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[30] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.65 V ; -0.00976 V ; 0.206 V ; 0.133 V ; 1.45e-009 s ; 1.89e-009 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.65 V ; -0.00976 V ; 0.206 V ; 0.133 V ; 1.45e-009 s ; 1.89e-009 s ; No ; Yes ;
-; VD[29] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[28] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[27] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[26] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[25] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[24] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[23] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[22] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.65 V ; -0.00976 V ; 0.206 V ; 0.133 V ; 1.45e-009 s ; 1.89e-009 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.65 V ; -0.00976 V ; 0.206 V ; 0.133 V ; 1.45e-009 s ; 1.89e-009 s ; No ; Yes ;
-; VD[21] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[20] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[19] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[18] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[17] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[16] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VD[15] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[14] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[13] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.65 V ; -0.00959 V ; 0.236 V ; 0.105 V ; 1.48e-009 s ; 2e-009 s ; No ; Yes ; 2.62 V ; 2.33e-008 V ; 2.65 V ; -0.00959 V ; 0.236 V ; 0.105 V ; 1.48e-009 s ; 2e-009 s ; No ; Yes ;
-; VD[12] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[11] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[10] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.73 V ; -0.0168 V ; 0.137 V ; 0.024 V ; 2.65e-010 s ; 3.37e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.73 V ; -0.0168 V ; 0.137 V ; 0.024 V ; 2.65e-010 s ; 3.37e-010 s ; Yes ; Yes ;
-; VD[9] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[8] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.65 V ; -0.00959 V ; 0.236 V ; 0.105 V ; 1.48e-009 s ; 2e-009 s ; No ; Yes ; 2.62 V ; 2.33e-008 V ; 2.65 V ; -0.00959 V ; 0.236 V ; 0.105 V ; 1.48e-009 s ; 2e-009 s ; No ; Yes ;
-; VD[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VD[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VDQS[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VDQS[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ; 2.62 V ; 2.33e-008 V ; 2.72 V ; -0.00806 V ; 0.218 V ; 0.013 V ; 2.92e-010 s ; 4.58e-010 s ; Yes ; Yes ;
-; VDQS[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; VDQS[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ; 2.62 V ; 3.47e-008 V ; 2.83 V ; -0.0265 V ; 0.321 V ; 0.029 V ; 1.21e-010 s ; 2.36e-010 s ; No ; Yes ;
-; IO[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; IO[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; IO[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; IO[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; SRD[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SRD[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; SCSI_PAR ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nSCSI_SEL ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nSCSI_BUSY ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; nSCSI_RST ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; SD_CD_DATA3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SD_CMD_D1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; ACSI_D[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; ACSI_D[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ;
-; ACSI_D[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; ACSI_D[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; ACSI_D[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; ACSI_D[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; ACSI_D[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.48 V ; -0.0136 V ; 0.352 V ; 0.347 V ; 4.12e-009 s ; 3.35e-009 s ; No ; No ;
-; ACSI_D[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; LP_D[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; LP_D[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; LP_D[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; LP_D[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ; 3.46 V ; 1.9e-007 V ; 3.48 V ; -0.0145 V ; 0.362 V ; 0.287 V ; 3.89e-009 s ; 3.26e-009 s ; No ; No ;
-; LP_D[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; LP_D[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; LP_D[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; LP_D[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ; 3.46 V ; 1.9e-007 V ; 3.59 V ; -0.0877 V ; 0.332 V ; 0.187 V ; 4.6e-010 s ; 4.2e-010 s ; No ; Yes ;
-; SCSI_D[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; SCSI_D[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; SCSI_D[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; SCSI_D[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; SCSI_D[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; SCSI_D[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; SCSI_D[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; SCSI_D[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ; 3.46 V ; 1.29e-007 V ; 3.55 V ; -0.053 V ; 0.341 V ; 0.351 V ; 9.04e-010 s ; 7.28e-010 s ; No ; No ;
-; ~ALTERA_nCEO~ ; 3.0-V LVTTL ; 0 s ; 0 s ; 3.15 V ; 7.44e-008 V ; 3.24 V ; -0.0384 V ; 0.38 V ; 0.235 V ; 5.22e-010 s ; 7e-010 s ; No ; Yes ; 3.15 V ; 7.44e-008 V ; 3.24 V ; -0.0384 V ; 0.38 V ; 0.235 V ; 5.22e-010 s ; 7e-010 s ; No ; Yes ;
-+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Ignored Timing Assignments ;
-+-----------------+----------+-----------------+------------------------------------------------------------------+-------------+------------------------------------------------------------------------------------------------------------+
-; Option ; Setting ; From ; To ; Entity Name ; Help ;
-+-----------------+----------+-----------------+------------------------------------------------------------------+-------------+------------------------------------------------------------------------------------------------------------+
-; Cut Timing Path ; On ; delayed_wrptr_g ; rs_dgwp|dffpipe15|dffe16a ; dcfifo_8fi1 ; Node named delayed_wrptr_g removed during synthesis ;
-; Clock Settings ; fast ; ; DDRCLK ; ; Node named DDRCLK removed during synthesis ;
-; Clock Settings ; fast ; ; DDRCLK[0] ; ; Node named DDRCLK[0] removed during synthesis ;
-; Clock Settings ; fast ; ; DDRCLK[1] ; ; Node named DDRCLK[1] removed during synthesis ;
-; Clock Settings ; fast ; ; DDRCLK[2] ; ; Node named DDRCLK[2] removed during synthesis ;
-; Clock Settings ; fast ; ; DDRCLK[3] ; ; Node named DDRCLK[3] removed during synthesis ;
-; Clock Settings ; fast ; ; Video:Fredi_Aschwanden|DDRCLK ; ; Node named Video:Fredi_Aschwanden|DDRCLK removed during synthesis ;
-; Clock Settings ; fast ; ; Video:Fredi_Aschwanden|DDRCLK[0] ; ; Node named Video:Fredi_Aschwanden|DDRCLK[0] removed during synthesis ;
-; Clock Settings ; fast ; ; Video:Fredi_Aschwanden|DDRCLK[1] ; ; Node named Video:Fredi_Aschwanden|DDRCLK[1] removed during synthesis ;
-; Clock Settings ; fast ; ; Video:Fredi_Aschwanden|DDRCLK[2] ; ; Node named Video:Fredi_Aschwanden|DDRCLK[2] removed during synthesis ;
-; Clock Settings ; fast ; ; Video:Fredi_Aschwanden|DDRCLK[3] ; ; Node named Video:Fredi_Aschwanden|DDRCLK[3] removed during synthesis ;
-; Clock Settings ; fast ; ; Video:Fredi_Aschwanden|DDR_CTR_BLITTER:DDR_CTR_BLITTER|DDRCLK ; ; No element named Video:Fredi_Aschwanden|DDR_CTR_BLITTER:DDR_CTR_BLITTER|DDRCLK was found in the netlist ;
-; Clock Settings ; fast ; ; Video:Fredi_Aschwanden|DDR_CTR_BLITTER:DDR_CTR_BLITTER|DDRCLK[0] ; ; No element named Video:Fredi_Aschwanden|DDR_CTR_BLITTER:DDR_CTR_BLITTER|DDRCLK[0] was found in the netlist ;
-; Clock Settings ; fast ; ; Video:Fredi_Aschwanden|DDR_CTR_BLITTER:DDR_CTR_BLITTER|DDRCLK[1] ; ; No element named Video:Fredi_Aschwanden|DDR_CTR_BLITTER:DDR_CTR_BLITTER|DDRCLK[1] was found in the netlist ;
-; Clock Settings ; fast ; ; Video:Fredi_Aschwanden|DDR_CTR_BLITTER:DDR_CTR_BLITTER|DDRCLK[2] ; ; No element named Video:Fredi_Aschwanden|DDR_CTR_BLITTER:DDR_CTR_BLITTER|DDRCLK[2] was found in the netlist ;
-; Clock Settings ; fast ; ; Video:Fredi_Aschwanden|DDR_CTR_BLITTER:DDR_CTR_BLITTER|DDRCLK[3] ; ; No element named Video:Fredi_Aschwanden|DDR_CTR_BLITTER:DDR_CTR_BLITTER|DDRCLK[3] was found in the netlist ;
-; Maximum Delay ; 5 ns ; VD ; FB_AD ; ; No timing path applicable to specified source and destination ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; BA[0] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[3] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[7] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[1] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[16] ; VA[2] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[12] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[22] ; VA[8] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[0] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[8] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[10] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[17] ; VA[3] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[5] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[9] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[1] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[9] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[1] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[7] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[18] ; nVRAS ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[18] ; VA[4] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[6] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[10] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[2] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[24] ; VA[10] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[10] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[2] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[8] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[0] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[7] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[15] ; VA[1] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; BA[0] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[11] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[3] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[25] ; VA[11] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; BA[0] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[11] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[3] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[5] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; nVRAS ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; nVRAS ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[8] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[0] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; BA[1] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[12] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[4] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; BA[1] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[12] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[4] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[6] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[19] ; VA[5] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[23] ; VA[9] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[9] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[1] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[5] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[5] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; BA[0] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[11] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[3] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; nVRAS ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[10] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[2] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[14] ; VA[0] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[6] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[26] ; VA[12] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[6] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; BA[1] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[12] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[4] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[21] ; VA[7] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[11] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[7] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[9] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; nVRAS ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[20] ; VA[6] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; BA[1] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[13] ; VA[4] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[12] ; VA[8] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[30] ; VA[0] ; ; Assignment is illegal for node and/or path ;
-; MAX_DELAY ; 5.000 ns ; FB_AD[31] ; VA[2] ; ; Assignment is illegal for node and/or path ;
-+-----------------+----------+-----------------+------------------------------------------------------------------+-------------+------------------------------------------------------------------------------------------------------------+
-
-
-+--------------------------+
-; Timing Analyzer Messages ;
-+--------------------------+
-Info: *******************************************************************
-Info: Running Quartus II Classic Timing Analyzer
- Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
- Info: Processing started: Wed Dec 15 02:25:14 2010
-Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off firebeei1 -c firebee1 --timing_analysis_only
-Warning: Timing Analysis is analyzing one or more combinational loops as latches
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[31]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[30]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[29]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[28]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[27]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[26]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[25]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[24]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[23]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[22]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[21]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[20]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[19]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[18]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[17]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[16]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[15]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[14]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[13]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[12]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[11]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[10]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[9]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[8]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[7]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[6]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[5]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[4]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[3]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[2]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[1]" is a latch
- Warning: Node "Video:Fredi_Aschwanden|lpm_latch0:inst27|lpm_latch:lpm_latch_component|latches[0]" is a latch
-Warning: Clock latency analysis for PLL offsets is supported for the current device family, but is not enabled
-Warning: Clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3]" frequency requirement of 47.96 MHz overrides "Cyclone III" PLL "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" input frequency requirement of 48.0 MHz
-Warning: Clock Setting "fast" is unassigned
-Warning: PLL "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" input frequency requirement of 0.5 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[1]" input frequency requirement of 2.46 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[2]" input frequency requirement of 24.57 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" input frequency requirement of 2.0 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" input frequency requirement of 15.99 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" input frequency requirement of 24.98 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3]" input frequency requirement of 47.96 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" input frequency requirement of 132.01 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" input frequency requirement of 132.01 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]" input frequency requirement of 132.01 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]" input frequency requirement of 132.01 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" input frequency requirement of 66.0 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: PLL "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" input frequency requirement of 95.92 MHz overrides default required fmax of 33.33 MHz -- Slack information will be reported
-Warning: Found 38 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
- Info: Detected ripple clock "interrupt_handler:nobody|INT_ENA[3]" as buffer
- Info: Detected ripple clock "interrupt_handler:nobody|INT_ENA[1]" as buffer
- Info: Detected ripple clock "interrupt_handler:nobody|INT_ENA[4]" as buffer
- Info: Detected ripple clock "interrupt_handler:nobody|INT_ENA[2]" as buffer
- Info: Detected ripple clock "interrupt_handler:nobody|INT_ENA[5]" as buffer
- Info: Detected gated clock "interrupt_handler:nobody|INT_LATCH[3]~23" as buffer
- Info: Detected gated clock "interrupt_handler:nobody|INT_LATCH[1]~25" as buffer
- Info: Detected gated clock "interrupt_handler:nobody|INT_LATCH[4]~22" as buffer
- Info: Detected gated clock "interrupt_handler:nobody|INT_LATCH[2]~24" as buffer
- Info: Detected ripple clock "interrupt_handler:nobody|INT_ENA[0]" as buffer
- Info: Detected ripple clock "interrupt_handler:nobody|INT_ENA[6]" as buffer
- Info: Detected ripple clock "interrupt_handler:nobody|INT_ENA[9]" as buffer
- Info: Detected ripple clock "interrupt_handler:nobody|INT_ENA[8]" as buffer
- Info: Detected gated clock "interrupt_handler:nobody|INT_LATCH[5]~21" as buffer
- Info: Detected gated clock "interrupt_handler:nobody|INT_LATCH[0]~26" as buffer
- Info: Detected gated clock "interrupt_handler:nobody|INT_LATCH[6]~20" as buffer
- Info: Detected gated clock "interrupt_handler:nobody|INT_LATCH[9]~18" as buffer
- Info: Detected gated clock "interrupt_handler:nobody|INT_LATCH[8]~19" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|HSYNC" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VMD[2]" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[0]" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[8]" as buffer
- Info: Detected gated clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~31" as buffer
- Info: Detected gated clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~30" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLK17M" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLK13M" as buffer
- Info: Detected gated clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~2" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[2]" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[7]" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[6]" as buffer
- Info: Detected gated clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~0" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0]" as buffer
- Info: Detected ripple clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[9]" as buffer
- Info: Detected gated clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~4" as buffer
- Info: Detected gated clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~3" as buffer
- Info: Detected gated clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|_~29" as buffer
- Info: Detected gated clock "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~1" as buffer
-Info: Found timing assignments -- calculating delays
-Info: Slack time is 1.997 us for clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" between source register "lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0]" and destination register "lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17]"
- Info: Fmax is 362.45 MHz (period= 2.759 ns)
- Info: + Largest register to register requirement is 1999.813 ns
- Info: + Setup relationship between source and destination is 1999.998 ns
- Info: + Latch edge is 1990.420 ns
- Info: Clock period of Destination clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" is 1999.998 ns with offset of -9.578 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is -9.578 ns
- Info: Clock period of Source clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" is 1999.998 ns with offset of -9.578 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is -0.001 ns
- Info: + Shortest clock path from clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" to destination register is 3.531 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_3; Fanout = 1; CLK Node = 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]'
- Info: 2: + IC(1.914 ns) + CELL(0.000 ns) = 1.914 ns; Loc. = CLKCTRL_G14; Fanout = 52; COMB Node = 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.083 ns) + CELL(0.534 ns) = 3.531 ns; Loc. = FF_X65_Y15_N27; Fanout = 2; REG Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17]'
- Info: Total cell delay = 0.534 ns ( 15.12 % )
- Info: Total interconnect delay = 2.997 ns ( 84.88 % )
- Info: - Longest clock path from clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" to source register is 3.532 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_3; Fanout = 1; CLK Node = 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]'
- Info: 2: + IC(1.914 ns) + CELL(0.000 ns) = 1.914 ns; Loc. = CLKCTRL_G14; Fanout = 52; COMB Node = 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.084 ns) + CELL(0.534 ns) = 3.532 ns; Loc. = FF_X65_Y16_N15; Fanout = 2; REG Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0]'
- Info: Total cell delay = 0.534 ns ( 15.12 % )
- Info: Total interconnect delay = 2.998 ns ( 84.88 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Longest register to register delay is 2.574 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X65_Y16_N15; Fanout = 2; REG Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0]'
- Info: 2: + IC(0.325 ns) + CELL(0.446 ns) = 0.771 ns; Loc. = LCCOMB_X65_Y16_N14; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita0~COUT'
- Info: 3: + IC(0.000 ns) + CELL(0.058 ns) = 0.829 ns; Loc. = LCCOMB_X65_Y16_N16; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita1~COUT'
- Info: 4: + IC(0.000 ns) + CELL(0.058 ns) = 0.887 ns; Loc. = LCCOMB_X65_Y16_N18; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita2~COUT'
- Info: 5: + IC(0.000 ns) + CELL(0.058 ns) = 0.945 ns; Loc. = LCCOMB_X65_Y16_N20; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita3~COUT'
- Info: 6: + IC(0.000 ns) + CELL(0.058 ns) = 1.003 ns; Loc. = LCCOMB_X65_Y16_N22; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita4~COUT'
- Info: 7: + IC(0.000 ns) + CELL(0.058 ns) = 1.061 ns; Loc. = LCCOMB_X65_Y16_N24; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita5~COUT'
- Info: 8: + IC(0.000 ns) + CELL(0.058 ns) = 1.119 ns; Loc. = LCCOMB_X65_Y16_N26; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita6~COUT'
- Info: 9: + IC(0.000 ns) + CELL(0.058 ns) = 1.177 ns; Loc. = LCCOMB_X65_Y16_N28; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita7~COUT'
- Info: 10: + IC(0.000 ns) + CELL(0.058 ns) = 1.235 ns; Loc. = LCCOMB_X65_Y16_N30; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita8~COUT'
- Info: 11: + IC(0.000 ns) + CELL(0.058 ns) = 1.293 ns; Loc. = LCCOMB_X65_Y15_N0; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita9~COUT'
- Info: 12: + IC(0.000 ns) + CELL(0.058 ns) = 1.351 ns; Loc. = LCCOMB_X65_Y15_N2; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita10~COUT'
- Info: 13: + IC(0.000 ns) + CELL(0.058 ns) = 1.409 ns; Loc. = LCCOMB_X65_Y15_N4; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita11~COUT'
- Info: 14: + IC(0.000 ns) + CELL(0.058 ns) = 1.467 ns; Loc. = LCCOMB_X65_Y15_N6; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita12~COUT'
- Info: 15: + IC(0.000 ns) + CELL(0.058 ns) = 1.525 ns; Loc. = LCCOMB_X65_Y15_N8; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita13~COUT'
- Info: 16: + IC(0.000 ns) + CELL(0.058 ns) = 1.583 ns; Loc. = LCCOMB_X65_Y15_N10; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita14~COUT'
- Info: 17: + IC(0.000 ns) + CELL(0.058 ns) = 1.641 ns; Loc. = LCCOMB_X65_Y15_N12; Fanout = 2; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita15~COUT'
- Info: 18: + IC(0.000 ns) + CELL(0.058 ns) = 1.699 ns; Loc. = LCCOMB_X65_Y15_N14; Fanout = 1; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita16~COUT'
- Info: 19: + IC(0.000 ns) + CELL(0.455 ns) = 2.154 ns; Loc. = LCCOMB_X65_Y15_N16; Fanout = 1; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita17'
- Info: 20: + IC(0.199 ns) + CELL(0.130 ns) = 2.483 ns; Loc. = LCCOMB_X65_Y15_N26; Fanout = 1; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17]~feeder'
- Info: 21: + IC(0.000 ns) + CELL(0.091 ns) = 2.574 ns; Loc. = FF_X65_Y15_N27; Fanout = 2; REG Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17]'
- Info: Total cell delay = 2.050 ns ( 79.64 % )
- Info: Total interconnect delay = 0.524 ns ( 20.36 % )
-Info: No valid register-to-register data paths exist for clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[1]"
-Info: No valid register-to-register data paths exist for clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[2]"
-Info: Slack time is 498.663 ns for clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" between source register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]" and destination register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0]"
- Info: Fmax is restricted to 500.0 MHz due to tcl and tch limits
- Info: + Largest register to register requirement is 500.232 ns
- Info: + Setup relationship between source and destination is 500.416 ns
- Info: + Latch edge is 498.552 ns
- Info: Clock period of Destination clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" is 500.416 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is -1.864 ns
- Info: Clock period of Source clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" is 500.416 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is 0.000 ns
- Info: + Shortest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" to destination register is 3.522 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G16; Fanout = 7; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.079 ns) + CELL(0.534 ns) = 3.522 ns; Loc. = FF_X1_Y10_N3; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0]'
- Info: Total cell delay = 0.534 ns ( 15.16 % )
- Info: Total interconnect delay = 2.988 ns ( 84.84 % )
- Info: - Longest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" to source register is 3.522 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G16; Fanout = 7; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.079 ns) + CELL(0.534 ns) = 3.522 ns; Loc. = FF_X1_Y10_N11; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]'
- Info: Total cell delay = 0.534 ns ( 15.16 % )
- Info: Total interconnect delay = 2.988 ns ( 84.84 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Longest register to register delay is 1.569 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X1_Y10_N11; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]'
- Info: 2: + IC(0.344 ns) + CELL(0.376 ns) = 0.720 ns; Loc. = LCCOMB_X1_Y10_N14; Fanout = 5; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[3]~13'
- Info: 3: + IC(0.240 ns) + CELL(0.609 ns) = 1.569 ns; Loc. = FF_X1_Y10_N3; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0]'
- Info: Total cell delay = 0.985 ns ( 62.78 % )
- Info: Total interconnect delay = 0.584 ns ( 37.22 % )
-Info: Slack time is 28.59 ns for clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" between source register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|RD_In" and destination register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\EDGEDETECT:LOCK"
- Info: Fmax is 186.15 MHz (period= 5.372 ns)
- Info: + Largest register to register requirement is 31.135 ns
- Info: + Setup relationship between source and destination is 31.276 ns
- Info: + Latch edge is 60.688 ns
- Info: Clock period of Destination clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" is 62.552 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is 29.412 ns
- Info: Clock period of Source clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" is 62.552 ns with inverted offset of 29.412 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is 0.020 ns
- Info: + Shortest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" to destination register is 3.508 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G17; Fanout = 595; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]~clkctrl'
- Info: 3: + IC(1.065 ns) + CELL(0.534 ns) = 3.508 ns; Loc. = FF_X30_Y32_N3; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\EDGEDETECT:LOCK'
- Info: Total cell delay = 0.534 ns ( 15.22 % )
- Info: Total interconnect delay = 2.974 ns ( 84.78 % )
- Info: - Longest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" to source register is 3.488 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G17; Fanout = 595; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]~clkctrl'
- Info: 3: + IC(1.131 ns) + CELL(0.448 ns) = 3.488 ns; Loc. = FF_X59_Y43_N10; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|RD_In'
- Info: Total cell delay = 0.448 ns ( 12.84 % )
- Info: Total interconnect delay = 3.040 ns ( 87.16 % )
- Info: - Micro clock to output delay of source is 0.176 ns
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Longest register to register delay is 2.545 ns
- Info: 1: + IC(0.000 ns) + CELL(0.418 ns) = 0.418 ns; Loc. = FF_X59_Y43_N10; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|RD_In'
- Info: 2: + IC(1.655 ns) + CELL(0.381 ns) = 2.454 ns; Loc. = LCCOMB_X30_Y32_N2; Fanout = 1; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\EDGEDETECT:LOCK~0'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 2.545 ns; Loc. = FF_X30_Y32_N3; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\EDGEDETECT:LOCK'
- Info: Total cell delay = 0.890 ns ( 34.97 % )
- Info: Total interconnect delay = 1.655 ns ( 65.03 % )
-Info: Slack time is -4.615 ns for clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" between source memory "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0" and destination register "Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]"
- Info: + Largest memory to register requirement is -0.928 ns
- Info: + Setup relationship between source and destination is 0.145 ns
- Info: + Latch edge is 0.221 ns
- Info: Clock period of Destination clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" is 40.033 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is 0.076 ns
- Info: Clock period of Source clock "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" is 10.425 ns with offset of -2.843 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is -0.862 ns
- Info: + Shortest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" to destination register is 7.507 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G18; Fanout = 4; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]~clkctrl'
- Info: 3: + IC(1.472 ns) + CELL(0.307 ns) = 3.688 ns; Loc. = LCCOMB_X26_Y18_N8; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~3'
- Info: 4: + IC(0.203 ns) + CELL(0.243 ns) = 4.134 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 5: + IC(1.732 ns) + CELL(0.000 ns) = 5.866 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 6: + IC(1.107 ns) + CELL(0.534 ns) = 7.507 ns; Loc. = FF_X41_Y18_N15; Fanout = 4; REG Node = 'Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]'
- Info: Total cell delay = 1.084 ns ( 14.44 % )
- Info: Total interconnect delay = 6.423 ns ( 85.56 % )
- Info: - Longest clock path from clock "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" to source memory is 8.369 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_2; Fanout = 1; CLK Node = 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]'
- Info: 2: + IC(1.881 ns) + CELL(0.000 ns) = 1.881 ns; Loc. = CLKCTRL_G8; Fanout = 1; COMB Node = 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.469 ns) + CELL(0.342 ns) = 3.692 ns; Loc. = LCCOMB_X22_Y18_N24; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~1'
- Info: 4: + IC(0.650 ns) + CELL(0.367 ns) = 4.709 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 5: + IC(1.732 ns) + CELL(0.000 ns) = 6.441 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 6: + IC(1.112 ns) + CELL(0.816 ns) = 8.369 ns; Loc. = M9K_X40_Y20_N0; Fanout = 36; MEM Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0'
- Info: Total cell delay = 1.525 ns ( 18.22 % )
- Info: Total interconnect delay = 6.844 ns ( 81.78 % )
- Info: - Micro clock to output delay of source is 0.226 ns
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Longest memory to register delay is 3.687 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M9K_X40_Y20_N0; Fanout = 36; MEM Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0'
- Info: 2: + IC(0.000 ns) + CELL(2.479 ns) = 2.479 ns; Loc. = M9K_X40_Y20_N0; Fanout = 1; MEM Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|q_b[35]'
- Info: 3: + IC(0.987 ns) + CELL(0.130 ns) = 3.596 ns; Loc. = LCCOMB_X41_Y18_N14; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|result_node[35]~67'
- Info: 4: + IC(0.000 ns) + CELL(0.091 ns) = 3.687 ns; Loc. = FF_X41_Y18_N15; Fanout = 4; REG Node = 'Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]'
- Info: Total cell delay = 2.700 ns ( 73.23 % )
- Info: Total interconnect delay = 0.987 ns ( 26.77 % )
-Warning: Can't achieve timing requirement Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]' along 3741 path(s). See Report window for details.
-Info: No valid register-to-register data paths exist for clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[3]"
-Info: Slack time is -2.673 ns for clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" between source pin "FB_ALE" and destination register "Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC"
- Info: + Largest pin to register requirement is 0.814 ns
- Info: + Setup relationship between source and destination is 1.262 ns
- Info: + Latch edge is 3.955 ns
- Info: Clock period of Destination clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" is 7.575 ns with offset of -3.620 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is 2.693 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]" is 7.575 ns with offset of 2.693 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is 3.537 ns
- Info: + Shortest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" to destination register is 3.537 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G3; Fanout = 707; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.102 ns) + CELL(0.534 ns) = 3.537 ns; Loc. = FF_X25_Y6_N21; Fanout = 6; REG Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC'
- Info: Total cell delay = 0.534 ns ( 15.10 % )
- Info: Total interconnect delay = 3.003 ns ( 84.90 % )
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Max Input delay of pin is 4.0 ns
- Info: - Longest pin to register delay is 3.487 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_R7; Fanout = 1; PIN Node = 'FB_ALE'
- Info: 2: + IC(0.000 ns) + CELL(0.941 ns) = 0.941 ns; Loc. = IOIBUF_X0_Y2_N1; Fanout = 33; COMB Node = 'FB_ALE~input'
- Info: 3: + IC(1.144 ns) + CELL(0.130 ns) = 2.215 ns; Loc. = LCCOMB_X22_Y6_N18; Fanout = 18; COMB Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|_~5'
- Info: 4: + IC(0.241 ns) + CELL(0.130 ns) = 2.586 ns; Loc. = LCCOMB_X22_Y6_N24; Fanout = 19; COMB Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|VA_S[10]~0'
- Info: 5: + IC(0.680 ns) + CELL(0.130 ns) = 3.396 ns; Loc. = LCCOMB_X25_Y6_N20; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC~1'
- Info: 6: + IC(0.000 ns) + CELL(0.091 ns) = 3.487 ns; Loc. = FF_X25_Y6_N21; Fanout = 6; REG Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC'
- Info: Total cell delay = 1.422 ns ( 40.78 % )
- Info: Total interconnect delay = 2.065 ns ( 59.22 % )
-Warning: Can't achieve timing requirement Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]' along 86 path(s). See Report window for details.
-Info: Slack time is 2.965 ns for clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" between source register "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[6]" and destination register "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[6]"
- Info: Fmax is restricted to 500.0 MHz due to tcl and tch limits
- Info: + Largest register to register requirement is 3.604 ns
- Info: + Setup relationship between source and destination is 3.788 ns
- Info: + Latch edge is 6.481 ns
- Info: Clock period of Destination clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" is 7.575 ns with offset of -1.094 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is 2.693 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" is 7.575 ns with inverted offset of 2.693 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is 0.000 ns
- Info: + Shortest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" to destination register is 3.531 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G1; Fanout = 96; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]~clkctrl'
- Info: 3: + IC(1.096 ns) + CELL(0.534 ns) = 3.531 ns; Loc. = FF_X66_Y12_N3; Fanout = 2; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[6]'
- Info: Total cell delay = 0.534 ns ( 15.12 % )
- Info: Total interconnect delay = 2.997 ns ( 84.88 % )
- Info: - Longest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" to source register is 3.531 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G1; Fanout = 96; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]~clkctrl'
- Info: 3: + IC(1.096 ns) + CELL(0.534 ns) = 3.531 ns; Loc. = FF_X66_Y12_N27; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[6]'
- Info: Total cell delay = 0.534 ns ( 15.12 % )
- Info: Total interconnect delay = 2.997 ns ( 84.88 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Longest register to register delay is 0.639 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X66_Y12_N27; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[6]'
- Info: 2: + IC(0.297 ns) + CELL(0.342 ns) = 0.639 ns; Loc. = FF_X66_Y12_N3; Fanout = 2; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[6]'
- Info: Total cell delay = 0.342 ns ( 53.52 % )
- Info: Total interconnect delay = 0.297 ns ( 46.48 % )
-Info: Slack time is 5.299 ns for clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]" between source register "Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[3]" and destination register "Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3]"
- Info: + Largest register to register requirement is 6.118 ns
- Info: + Setup relationship between source and destination is 6.313 ns
- Info: + Latch edge is 10.268 ns
- Info: Clock period of Destination clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]" is 7.575 ns with offset of 2.693 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is 3.955 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" is 7.575 ns with offset of -3.620 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is -0.011 ns
- Info: + Shortest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]" to destination register is 3.532 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G0; Fanout = 5; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]~clkctrl'
- Info: 3: + IC(1.097 ns) + CELL(0.534 ns) = 3.532 ns; Loc. = FF_X28_Y12_N29; Fanout = 4; REG Node = 'Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3]'
- Info: Total cell delay = 0.534 ns ( 15.12 % )
- Info: Total interconnect delay = 2.998 ns ( 84.88 % )
- Info: - Longest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" to source register is 3.543 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G3; Fanout = 707; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.108 ns) + CELL(0.534 ns) = 3.543 ns; Loc. = FF_X25_Y12_N27; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[3]'
- Info: Total cell delay = 0.534 ns ( 15.07 % )
- Info: Total interconnect delay = 3.009 ns ( 84.93 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Longest register to register delay is 0.819 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X25_Y12_N27; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[3]'
- Info: 2: + IC(0.598 ns) + CELL(0.130 ns) = 0.728 ns; Loc. = LCCOMB_X28_Y12_N28; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3]~feeder'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 0.819 ns; Loc. = FF_X28_Y12_N29; Fanout = 4; REG Node = 'Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3]'
- Info: Total cell delay = 0.221 ns ( 26.98 % )
- Info: Total interconnect delay = 0.598 ns ( 73.02 % )
-Info: Slack time is 1.672 ns for clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]" between source register "Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2]" and destination register "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFHI"
- Info: + Largest register to register requirement is 5.308 ns
- Info: + Setup relationship between source and destination is 5.999 ns
- Info: + Latch edge is 8.690 ns
- Info: Clock period of Destination clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]" is 7.575 ns with offset of 1.115 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is 2.691 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" is 15.151 ns with offset of -4.884 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is -0.064 ns
- Info: + Shortest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]" to destination register is 3.487 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G2; Fanout = 113; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]~clkctrl'
- Info: 3: + IC(1.098 ns) + CELL(0.488 ns) = 3.487 ns; Loc. = DDIOOUTCELL_X67_Y14_N11; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFHI'
- Info: Total cell delay = 0.488 ns ( 13.99 % )
- Info: Total interconnect delay = 2.999 ns ( 86.01 % )
- Info: - Longest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" to source register is 3.551 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G4; Fanout = 189; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]~clkctrl'
- Info: 3: + IC(1.116 ns) + CELL(0.534 ns) = 3.551 ns; Loc. = FF_X22_Y2_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2]'
- Info: Total cell delay = 0.534 ns ( 15.04 % )
- Info: Total interconnect delay = 3.017 ns ( 84.96 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: - Micro setup delay of destination is 0.428 ns
- Info: - Longest register to register delay is 3.636 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X22_Y2_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2]'
- Info: 2: + IC(0.330 ns) + CELL(0.367 ns) = 0.697 ns; Loc. = LCCOMB_X22_Y2_N14; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|lpm_mux5:inst22|lpm_mux:lpm_mux_component|mux_58e:auto_generated|result_node[34]~59'
- Info: 3: + IC(2.591 ns) + CELL(0.348 ns) = 3.636 ns; Loc. = DDIOOUTCELL_X67_Y14_N11; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFHI'
- Info: Total cell delay = 0.715 ns ( 19.66 % )
- Info: Total interconnect delay = 2.921 ns ( 80.34 % )
-Info: Slack time is -1.712 ns for clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" between source pin "FB_ALE" and destination register "Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ"
- Info: + Largest pin to register requirement is 1.118 ns
- Info: + Setup relationship between source and destination is 1.576 ns
- Info: + Latch edge is 2.691 ns
- Info: Clock period of Destination clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" is 15.151 ns with offset of -4.884 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is 1.115 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]" is 7.575 ns with offset of 1.115 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is 3.527 ns
- Info: + Shortest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" to destination register is 3.527 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G4; Fanout = 189; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]~clkctrl'
- Info: 3: + IC(1.092 ns) + CELL(0.534 ns) = 3.527 ns; Loc. = FF_X21_Y6_N19; Fanout = 19; REG Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ'
- Info: Total cell delay = 0.534 ns ( 15.14 % )
- Info: Total interconnect delay = 2.993 ns ( 84.86 % )
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Max Input delay of pin is 4.0 ns
- Info: - Longest pin to register delay is 2.830 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_R7; Fanout = 1; PIN Node = 'FB_ALE'
- Info: 2: + IC(0.000 ns) + CELL(0.941 ns) = 0.941 ns; Loc. = IOIBUF_X0_Y2_N1; Fanout = 33; COMB Node = 'FB_ALE~input'
- Info: 3: + IC(1.138 ns) + CELL(0.130 ns) = 2.209 ns; Loc. = LCCOMB_X22_Y6_N4; Fanout = 7; COMB Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|DDR_SEL'
- Info: 4: + IC(0.400 ns) + CELL(0.130 ns) = 2.739 ns; Loc. = LCCOMB_X21_Y6_N18; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ~2'
- Info: 5: + IC(0.000 ns) + CELL(0.091 ns) = 2.830 ns; Loc. = FF_X21_Y6_N19; Fanout = 19; REG Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ'
- Info: Total cell delay = 1.292 ns ( 45.65 % )
- Info: Total interconnect delay = 1.538 ns ( 54.35 % )
-Warning: Can't achieve timing requirement Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]' along 29 path(s). See Report window for details.
-Info: Slack time is -4.294 ns for clock "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" between source memory "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0" and destination register "Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]"
- Info: + Largest memory to register requirement is -0.607 ns
- Info: + Setup relationship between source and destination is 0.272 ns
- Info: + Latch edge is 0.493 ns
- Info: Clock period of Destination clock "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" is 10.425 ns with offset of -2.843 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is 0.221 ns
- Info: Clock period of Source clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" is 40.033 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is -0.668 ns
- Info: + Shortest clock path from clock "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" to destination register is 8.082 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_2; Fanout = 1; CLK Node = 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]'
- Info: 2: + IC(1.881 ns) + CELL(0.000 ns) = 1.881 ns; Loc. = CLKCTRL_G8; Fanout = 1; COMB Node = 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.469 ns) + CELL(0.342 ns) = 3.692 ns; Loc. = LCCOMB_X22_Y18_N24; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~1'
- Info: 4: + IC(0.650 ns) + CELL(0.367 ns) = 4.709 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 5: + IC(1.732 ns) + CELL(0.000 ns) = 6.441 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 6: + IC(1.107 ns) + CELL(0.534 ns) = 8.082 ns; Loc. = FF_X41_Y18_N15; Fanout = 4; REG Node = 'Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]'
- Info: Total cell delay = 1.243 ns ( 15.38 % )
- Info: Total interconnect delay = 6.839 ns ( 84.62 % )
- Info: - Longest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" to source memory is 8.750 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G18; Fanout = 4; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]~clkctrl'
- Info: 3: + IC(1.466 ns) + CELL(0.367 ns) = 3.742 ns; Loc. = LCCOMB_X22_Y18_N0; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~0'
- Info: 4: + IC(0.201 ns) + CELL(0.130 ns) = 4.073 ns; Loc. = LCCOMB_X22_Y18_N24; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~1'
- Info: 5: + IC(0.650 ns) + CELL(0.367 ns) = 5.090 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 6: + IC(1.732 ns) + CELL(0.000 ns) = 6.822 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 7: + IC(1.112 ns) + CELL(0.816 ns) = 8.750 ns; Loc. = M9K_X40_Y20_N0; Fanout = 36; MEM Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0'
- Info: Total cell delay = 1.680 ns ( 19.20 % )
- Info: Total interconnect delay = 7.070 ns ( 80.80 % )
- Info: - Micro clock to output delay of source is 0.226 ns
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Longest memory to register delay is 3.687 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M9K_X40_Y20_N0; Fanout = 36; MEM Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0'
- Info: 2: + IC(0.000 ns) + CELL(2.479 ns) = 2.479 ns; Loc. = M9K_X40_Y20_N0; Fanout = 1; MEM Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|q_b[35]'
- Info: 3: + IC(0.987 ns) + CELL(0.130 ns) = 3.596 ns; Loc. = LCCOMB_X41_Y18_N14; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|result_node[35]~67'
- Info: 4: + IC(0.000 ns) + CELL(0.091 ns) = 3.687 ns; Loc. = FF_X41_Y18_N15; Fanout = 4; REG Node = 'Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]'
- Info: Total cell delay = 2.700 ns ( 73.23 % )
- Info: Total interconnect delay = 0.987 ns ( 26.77 % )
-Warning: Can't achieve timing requirement Clock Setup: 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]' along 3741 path(s). See Report window for details.
-Info: Slack time is -5.966 ns for clock "CLK33M" between source memory "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0" and destination register "Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]"
- Info: + Largest memory to register requirement is -2.279 ns
- Info: + Setup relationship between source and destination is 0.196 ns
- Info: + Latch edge is 0.278 ns
- Info: Clock period of Destination clock "CLK33M" is 30.303 ns with offset of 0.000 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is 0.082 ns
- Info: Clock period of Source clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" is 40.033 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is -2.264 ns
- Info: + Shortest clock path from clock "CLK33M" to destination register is 6.486 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AB12; Fanout = 1; CLK Node = 'CLK33M'
- Info: 2: + IC(0.000 ns) + CELL(0.918 ns) = 0.918 ns; Loc. = IOIBUF_X36_Y0_N1; Fanout = 8; COMB Node = 'CLK33M~input'
- Info: 3: + IC(1.438 ns) + CELL(0.311 ns) = 2.667 ns; Loc. = LCCOMB_X26_Y18_N8; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~3'
- Info: 4: + IC(0.203 ns) + CELL(0.243 ns) = 3.113 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 5: + IC(1.732 ns) + CELL(0.000 ns) = 4.845 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 6: + IC(1.107 ns) + CELL(0.534 ns) = 6.486 ns; Loc. = FF_X41_Y18_N15; Fanout = 4; REG Node = 'Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]'
- Info: Total cell delay = 2.006 ns ( 30.93 % )
- Info: Total interconnect delay = 4.480 ns ( 69.07 % )
- Info: - Longest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" to source memory is 8.750 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G18; Fanout = 4; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]~clkctrl'
- Info: 3: + IC(1.466 ns) + CELL(0.367 ns) = 3.742 ns; Loc. = LCCOMB_X22_Y18_N0; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~0'
- Info: 4: + IC(0.201 ns) + CELL(0.130 ns) = 4.073 ns; Loc. = LCCOMB_X22_Y18_N24; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~1'
- Info: 5: + IC(0.650 ns) + CELL(0.367 ns) = 5.090 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 6: + IC(1.732 ns) + CELL(0.000 ns) = 6.822 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 7: + IC(1.112 ns) + CELL(0.816 ns) = 8.750 ns; Loc. = M9K_X40_Y20_N0; Fanout = 36; MEM Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0'
- Info: Total cell delay = 1.680 ns ( 19.20 % )
- Info: Total interconnect delay = 7.070 ns ( 80.80 % )
- Info: - Micro clock to output delay of source is 0.226 ns
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Longest memory to register delay is 3.687 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M9K_X40_Y20_N0; Fanout = 36; MEM Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0'
- Info: 2: + IC(0.000 ns) + CELL(2.479 ns) = 2.479 ns; Loc. = M9K_X40_Y20_N0; Fanout = 1; MEM Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|q_b[35]'
- Info: 3: + IC(0.987 ns) + CELL(0.130 ns) = 3.596 ns; Loc. = LCCOMB_X41_Y18_N14; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|result_node[35]~67'
- Info: 4: + IC(0.000 ns) + CELL(0.091 ns) = 3.687 ns; Loc. = FF_X41_Y18_N15; Fanout = 4; REG Node = 'Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]'
- Info: Total cell delay = 2.700 ns ( 73.23 % )
- Info: Total interconnect delay = 0.987 ns ( 26.77 % )
-Warning: Can't achieve timing requirement Clock Setup: 'CLK33M' along 3741 path(s). See Report window for details.
-Info: Slack time is -4.261 ns for clock "MAIN_CLK" between source pin "FB_ALE" and destination register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a7"
- Info: + Largest pin to register requirement is 0.057 ns
- Info: + Setup relationship between source and destination is 1.094 ns
- Info: + Latch edge is 7.575 ns
- Info: Clock period of Destination clock "MAIN_CLK" is 30.303 ns with offset of 0.000 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: - Launch edge is 6.481 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" is 7.575 ns with offset of -1.094 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: + Largest clock skew is 2.948 ns
- Info: + Shortest clock path from clock "MAIN_CLK" to destination register is 2.948 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_G2; Fanout = 1; CLK Node = 'MAIN_CLK'
- Info: 2: + IC(0.000 ns) + CELL(0.981 ns) = 0.981 ns; Loc. = IOIBUF_X0_Y21_N1; Fanout = 2380; COMB Node = 'MAIN_CLK~input'
- Info: 3: + IC(1.433 ns) + CELL(0.534 ns) = 2.948 ns; Loc. = FF_X22_Y7_N17; Fanout = 5; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a7'
- Info: Total cell delay = 1.515 ns ( 51.39 % )
- Info: Total interconnect delay = 1.433 ns ( 48.61 % )
- Info: - Micro setup delay of destination is -0.015 ns
- Info: - Max Input delay of pin is 4.0 ns
- Info: - Longest pin to register delay is 4.318 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_R7; Fanout = 1; PIN Node = 'FB_ALE'
- Info: 2: + IC(0.000 ns) + CELL(0.941 ns) = 0.941 ns; Loc. = IOIBUF_X0_Y2_N1; Fanout = 33; COMB Node = 'FB_ALE~input'
- Info: 3: + IC(1.524 ns) + CELL(0.130 ns) = 2.595 ns; Loc. = LCCOMB_X23_Y7_N20; Fanout = 2; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FCF_APH~2'
- Info: 4: + IC(0.212 ns) + CELL(0.130 ns) = 2.937 ns; Loc. = LCCOMB_X23_Y7_N18; Fanout = 52; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|valid_rdreq~1'
- Info: 5: + IC(0.445 ns) + CELL(0.130 ns) = 3.512 ns; Loc. = LCCOMB_X22_Y7_N0; Fanout = 4; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|_~2'
- Info: 6: + IC(0.235 ns) + CELL(0.130 ns) = 3.877 ns; Loc. = LCCOMB_X22_Y7_N28; Fanout = 3; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|_~4'
- Info: 7: + IC(0.220 ns) + CELL(0.130 ns) = 4.227 ns; Loc. = LCCOMB_X22_Y7_N16; Fanout = 1; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a7~0'
- Info: 8: + IC(0.000 ns) + CELL(0.091 ns) = 4.318 ns; Loc. = FF_X22_Y7_N17; Fanout = 5; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a7'
- Info: Total cell delay = 1.682 ns ( 38.95 % )
- Info: Total interconnect delay = 2.636 ns ( 61.05 % )
-Warning: Can't achieve timing requirement Clock Setup: 'MAIN_CLK' along 27347 path(s). See Report window for details.
-Info: Minimum slack time is 825 ps for clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" between source register "lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10]" and destination register "lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10]"
- Info: + Shortest register to register delay is 0.783 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X65_Y15_N3; Fanout = 2; REG Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10]'
- Info: 2: + IC(0.323 ns) + CELL(0.369 ns) = 0.692 ns; Loc. = LCCOMB_X65_Y15_N2; Fanout = 1; COMB Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_comb_bita10'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 0.783 ns; Loc. = FF_X65_Y15_N3; Fanout = 2; REG Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10]'
- Info: Total cell delay = 0.460 ns ( 58.75 % )
- Info: Total interconnect delay = 0.323 ns ( 41.25 % )
- Info: - Smallest register to register requirement is -0.042 ns
- Info: + Hold relationship between source and destination is 0.000 ns
- Info: + Latch edge is -9.578 ns
- Info: Clock period of Destination clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" is 1999.998 ns with offset of -9.578 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is -9.578 ns
- Info: Clock period of Source clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" is 1999.998 ns with offset of -9.578 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is 0.000 ns
- Info: + Longest clock path from clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" to destination register is 3.531 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_3; Fanout = 1; CLK Node = 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]'
- Info: 2: + IC(1.914 ns) + CELL(0.000 ns) = 1.914 ns; Loc. = CLKCTRL_G14; Fanout = 52; COMB Node = 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.083 ns) + CELL(0.534 ns) = 3.531 ns; Loc. = FF_X65_Y15_N3; Fanout = 2; REG Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10]'
- Info: Total cell delay = 0.534 ns ( 15.12 % )
- Info: Total interconnect delay = 2.997 ns ( 84.88 % )
- Info: - Shortest clock path from clock "altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]" to source register is 3.531 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_3; Fanout = 1; CLK Node = 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]'
- Info: 2: + IC(1.914 ns) + CELL(0.000 ns) = 1.914 ns; Loc. = CLKCTRL_G14; Fanout = 52; COMB Node = 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.083 ns) + CELL(0.534 ns) = 3.531 ns; Loc. = FF_X65_Y15_N3; Fanout = 2; REG Node = 'lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10]'
- Info: Total cell delay = 0.534 ns ( 15.12 % )
- Info: Total interconnect delay = 2.997 ns ( 84.88 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.157 ns
-Info: Minimum slack time is 564 ps for clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" between source register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]" and destination register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]"
- Info: + Shortest register to register delay is 0.522 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X1_Y10_N11; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]'
- Info: 2: + IC(0.301 ns) + CELL(0.130 ns) = 0.431 ns; Loc. = LCCOMB_X1_Y10_N10; Fanout = 1; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]~14'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 0.522 ns; Loc. = FF_X1_Y10_N11; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]'
- Info: Total cell delay = 0.221 ns ( 42.34 % )
- Info: Total interconnect delay = 0.301 ns ( 57.66 % )
- Info: - Smallest register to register requirement is -0.042 ns
- Info: + Hold relationship between source and destination is 0.000 ns
- Info: + Latch edge is -1.864 ns
- Info: Clock period of Destination clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" is 500.416 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is -1.864 ns
- Info: Clock period of Source clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" is 500.416 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is 0.000 ns
- Info: + Longest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" to destination register is 3.522 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G16; Fanout = 7; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.079 ns) + CELL(0.534 ns) = 3.522 ns; Loc. = FF_X1_Y10_N11; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]'
- Info: Total cell delay = 0.534 ns ( 15.16 % )
- Info: Total interconnect delay = 2.988 ns ( 84.84 % )
- Info: - Shortest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]" to source register is 3.522 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G16; Fanout = 7; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.079 ns) + CELL(0.534 ns) = 3.522 ns; Loc. = FF_X1_Y10_N11; Fanout = 2; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]'
- Info: Total cell delay = 0.534 ns ( 15.16 % )
- Info: Total interconnect delay = 2.988 ns ( 84.84 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.157 ns
-Info: Minimum slack time is 502 ps for clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" between source register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1" and destination register "FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1"
- Info: + Shortest register to register delay is 0.460 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X34_Y28_N5; Fanout = 1; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1'
- Info: 2: + IC(0.000 ns) + CELL(0.369 ns) = 0.369 ns; Loc. = LCCOMB_X34_Y28_N4; Fanout = 2; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|Selector77~1'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 0.460 ns; Loc. = FF_X34_Y28_N5; Fanout = 1; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1'
- Info: Total cell delay = 0.460 ns ( 100.00 % )
- Info: - Smallest register to register requirement is -0.042 ns
- Info: + Hold relationship between source and destination is 0.000 ns
- Info: + Latch edge is -1.864 ns
- Info: Clock period of Destination clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" is 62.552 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is -1.864 ns
- Info: Clock period of Source clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" is 62.552 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is 0.000 ns
- Info: + Longest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" to destination register is 3.526 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G17; Fanout = 595; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]~clkctrl'
- Info: 3: + IC(1.083 ns) + CELL(0.534 ns) = 3.526 ns; Loc. = FF_X34_Y28_N5; Fanout = 1; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1'
- Info: Total cell delay = 0.534 ns ( 15.14 % )
- Info: Total interconnect delay = 2.992 ns ( 84.86 % )
- Info: - Shortest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]" to source register is 3.526 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G17; Fanout = 595; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]~clkctrl'
- Info: 3: + IC(1.083 ns) + CELL(0.534 ns) = 3.526 ns; Loc. = FF_X34_Y28_N5; Fanout = 1; REG Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1'
- Info: Total cell delay = 0.534 ns ( 15.14 % )
- Info: Total interconnect delay = 2.992 ns ( 84.86 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.157 ns
-Info: Minimum slack time is -454 ps for clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" between source register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]" and destination register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]"
- Info: + Shortest register to register delay is 0.460 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: 2: + IC(0.000 ns) + CELL(0.369 ns) = 0.369 ns; Loc. = LCCOMB_X37_Y20_N12; Fanout = 5; COMB Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|ram_read_address[6]~6'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 0.460 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: Total cell delay = 0.460 ns ( 100.00 % )
- Info: - Smallest register to register requirement is 0.914 ns
- Info: + Hold relationship between source and destination is 0.000 ns
- Info: + Latch edge is -1.864 ns
- Info: Clock period of Destination clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" is 40.033 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is -1.864 ns
- Info: Clock period of Source clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" is 40.033 ns with offset of -1.864 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is 0.956 ns
- Info: + Longest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" to destination register is 8.469 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G18; Fanout = 4; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]~clkctrl'
- Info: 3: + IC(1.466 ns) + CELL(0.367 ns) = 3.742 ns; Loc. = LCCOMB_X22_Y18_N0; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~0'
- Info: 4: + IC(0.201 ns) + CELL(0.130 ns) = 4.073 ns; Loc. = LCCOMB_X22_Y18_N24; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~1'
- Info: 5: + IC(0.650 ns) + CELL(0.367 ns) = 5.090 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 6: + IC(1.732 ns) + CELL(0.000 ns) = 6.822 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 7: + IC(1.113 ns) + CELL(0.534 ns) = 8.469 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: Total cell delay = 1.398 ns ( 16.51 % )
- Info: Total interconnect delay = 7.071 ns ( 83.49 % )
- Info: - Shortest clock path from clock "altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]" to source register is 7.513 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]'
- Info: 2: + IC(1.909 ns) + CELL(0.000 ns) = 1.909 ns; Loc. = CLKCTRL_G18; Fanout = 4; COMB Node = 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]~clkctrl'
- Info: 3: + IC(1.472 ns) + CELL(0.307 ns) = 3.688 ns; Loc. = LCCOMB_X26_Y18_N8; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~3'
- Info: 4: + IC(0.203 ns) + CELL(0.243 ns) = 4.134 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 5: + IC(1.732 ns) + CELL(0.000 ns) = 5.866 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 6: + IC(1.113 ns) + CELL(0.534 ns) = 7.513 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: Total cell delay = 1.084 ns ( 14.43 % )
- Info: Total interconnect delay = 6.429 ns ( 85.57 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.157 ns
-Warning: Can't achieve minimum setup and hold requirement altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2] along 26 path(s). See Report window for details.
-Info: Minimum slack time is 502 ps for clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" between source register "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6]" and destination register "Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6]"
- Info: + Shortest register to register delay is 0.460 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X45_Y15_N13; Fanout = 14; REG Node = 'Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6]'
- Info: 2: + IC(0.000 ns) + CELL(0.369 ns) = 0.369 ns; Loc. = LCCOMB_X45_Y15_N12; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6]~3'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 0.460 ns; Loc. = FF_X45_Y15_N13; Fanout = 14; REG Node = 'Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6]'
- Info: Total cell delay = 0.460 ns ( 100.00 % )
- Info: - Smallest register to register requirement is -0.042 ns
- Info: + Hold relationship between source and destination is 0.000 ns
- Info: + Latch edge is -3.620 ns
- Info: Clock period of Destination clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" is 7.575 ns with offset of -3.620 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is -3.620 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" is 7.575 ns with offset of -3.620 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is 0.000 ns
- Info: + Longest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" to destination register is 3.559 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G3; Fanout = 707; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.124 ns) + CELL(0.534 ns) = 3.559 ns; Loc. = FF_X45_Y15_N13; Fanout = 14; REG Node = 'Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6]'
- Info: Total cell delay = 0.534 ns ( 15.00 % )
- Info: Total interconnect delay = 3.025 ns ( 85.00 % )
- Info: - Shortest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" to source register is 3.559 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G3; Fanout = 707; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.124 ns) + CELL(0.534 ns) = 3.559 ns; Loc. = FF_X45_Y15_N13; Fanout = 14; REG Node = 'Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|a_graycounter_njc:wrptr_gp|counter13a[6]'
- Info: Total cell delay = 0.534 ns ( 15.00 % )
- Info: Total interconnect delay = 3.025 ns ( 85.00 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.157 ns
-Info: Minimum slack time is 4.336 ns for clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" between source register "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[2]" and destination register "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[2]"
- Info: + Shortest register to register delay is 0.507 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X66_Y14_N29; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[2]'
- Info: 2: + IC(0.286 ns) + CELL(0.130 ns) = 0.416 ns; Loc. = LCCOMB_X66_Y14_N30; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[2]~feeder'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 0.507 ns; Loc. = FF_X66_Y14_N31; Fanout = 2; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[2]'
- Info: Total cell delay = 0.221 ns ( 43.59 % )
- Info: Total interconnect delay = 0.286 ns ( 56.41 % )
- Info: - Smallest register to register requirement is -3.829 ns
- Info: + Hold relationship between source and destination is -3.787 ns
- Info: + Latch edge is -1.094 ns
- Info: Clock period of Destination clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" is 7.575 ns with offset of -1.094 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is 2.693 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" is 7.575 ns with inverted offset of 2.693 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is 0.000 ns
- Info: + Longest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" to destination register is 3.538 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G1; Fanout = 96; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]~clkctrl'
- Info: 3: + IC(1.103 ns) + CELL(0.534 ns) = 3.538 ns; Loc. = FF_X66_Y14_N31; Fanout = 2; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[2]'
- Info: Total cell delay = 0.534 ns ( 15.09 % )
- Info: Total interconnect delay = 3.004 ns ( 84.91 % )
- Info: - Shortest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]" to source register is 3.538 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G1; Fanout = 96; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]~clkctrl'
- Info: 3: + IC(1.103 ns) + CELL(0.534 ns) = 3.538 ns; Loc. = FF_X66_Y14_N29; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[2]'
- Info: Total cell delay = 0.534 ns ( 15.09 % )
- Info: Total interconnect delay = 3.004 ns ( 84.91 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.157 ns
-Info: Minimum slack time is 1.825 ns for clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]" between source register "Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[6]" and destination register "Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[6]"
- Info: + Shortest register to register delay is 0.508 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X25_Y12_N19; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[6]'
- Info: 2: + IC(0.287 ns) + CELL(0.130 ns) = 0.417 ns; Loc. = LCCOMB_X25_Y12_N6; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[6]~feeder'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 0.508 ns; Loc. = FF_X25_Y12_N7; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[6]'
- Info: Total cell delay = 0.221 ns ( 43.50 % )
- Info: Total interconnect delay = 0.287 ns ( 56.50 % )
- Info: - Smallest register to register requirement is -1.317 ns
- Info: + Hold relationship between source and destination is -1.262 ns
- Info: + Latch edge is 2.693 ns
- Info: Clock period of Destination clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]" is 7.575 ns with offset of 2.693 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is 3.955 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" is 7.575 ns with offset of -3.620 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is -0.013 ns
- Info: + Longest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]" to destination register is 3.530 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G0; Fanout = 5; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]~clkctrl'
- Info: 3: + IC(1.095 ns) + CELL(0.534 ns) = 3.530 ns; Loc. = FF_X25_Y12_N7; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[6]'
- Info: Total cell delay = 0.534 ns ( 15.13 % )
- Info: Total interconnect delay = 2.996 ns ( 84.87 % )
- Info: - Shortest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]" to source register is 3.543 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G3; Fanout = 707; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.108 ns) + CELL(0.534 ns) = 3.543 ns; Loc. = FF_X25_Y12_N19; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[6]'
- Info: Total cell delay = 0.534 ns ( 15.07 % )
- Info: Total interconnect delay = 3.009 ns ( 84.93 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.157 ns
-Info: Minimum slack time is 3.263 ns for clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]" between source register "Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29]" and destination register "Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFLO"
- Info: + Shortest register to register delay is 1.570 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X34_Y2_N1; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29]'
- Info: 2: + IC(0.000 ns) + CELL(0.369 ns) = 0.369 ns; Loc. = LCCOMB_X34_Y2_N0; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|lpm_mux5:inst22|lpm_mux:lpm_mux_component|mux_58e:auto_generated|result_node[29]~4'
- Info: 3: + IC(0.737 ns) + CELL(0.464 ns) = 1.570 ns; Loc. = DDIOOUTCELL_X38_Y0_N25; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFLO'
- Info: Total cell delay = 0.833 ns ( 53.06 % )
- Info: Total interconnect delay = 0.737 ns ( 46.94 % )
- Info: - Smallest register to register requirement is -1.693 ns
- Info: + Hold relationship between source and destination is -1.576 ns
- Info: + Latch edge is 1.115 ns
- Info: Clock period of Destination clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]" is 7.575 ns with offset of 1.115 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is 2.691 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" is 15.151 ns with offset of -4.884 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is -0.019 ns
- Info: + Longest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]" to destination register is 3.543 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G2; Fanout = 113; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]~clkctrl'
- Info: 3: + IC(1.154 ns) + CELL(0.488 ns) = 3.543 ns; Loc. = DDIOOUTCELL_X38_Y0_N25; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFLO'
- Info: Total cell delay = 0.488 ns ( 13.77 % )
- Info: Total interconnect delay = 3.055 ns ( 86.23 % )
- Info: - Shortest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" to source register is 3.562 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G4; Fanout = 189; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]~clkctrl'
- Info: 3: + IC(1.127 ns) + CELL(0.534 ns) = 3.562 ns; Loc. = FF_X34_Y2_N1; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29]'
- Info: Total cell delay = 0.534 ns ( 14.99 % )
- Info: Total interconnect delay = 3.028 ns ( 85.01 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.101 ns
-Info: Minimum slack time is 2.664 ns for clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" between source pin "FB_ALE" and destination register "lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2]"
- Info: + Shortest pin to register delay is 2.216 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_R7; Fanout = 1; PIN Node = 'FB_ALE'
- Info: 2: + IC(0.000 ns) + CELL(0.941 ns) = 0.941 ns; Loc. = IOIBUF_X0_Y2_N1; Fanout = 33; COMB Node = 'FB_ALE~input'
- Info: 3: + IC(0.929 ns) + CELL(0.346 ns) = 2.216 ns; Loc. = FF_X7_Y0_N31; Fanout = 120; REG Node = 'lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2]'
- Info: Total cell delay = 1.287 ns ( 58.08 % )
- Info: Total interconnect delay = 0.929 ns ( 41.92 % )
- Info: - Smallest pin to register requirement is -0.448 ns
- Info: + Hold relationship between source and destination is 0.000 ns
- Info: + Latch edge is -4.884 ns
- Info: Clock period of Destination clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" is 15.151 ns with offset of -4.884 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is -4.884 ns
- Info: Clock period of Source clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" is 15.151 ns with offset of -4.884 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is 3.500 ns
- Info: + Longest clock path from clock "altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]" to destination register is 3.500 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]'
- Info: 2: + IC(1.901 ns) + CELL(0.000 ns) = 1.901 ns; Loc. = CLKCTRL_G4; Fanout = 189; COMB Node = 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]~clkctrl'
- Info: 3: + IC(1.151 ns) + CELL(0.448 ns) = 3.500 ns; Loc. = FF_X7_Y0_N31; Fanout = 120; REG Node = 'lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2]'
- Info: Total cell delay = 0.448 ns ( 12.80 % )
- Info: Total interconnect delay = 3.052 ns ( 87.20 % )
- Info: + Micro hold delay of destination is 0.052 ns
- Info: - Min Input delay of pin is 4.0 ns
-Info: Minimum slack time is 502 ps for clock "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" between source register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]" and destination register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]"
- Info: + Shortest register to register delay is 0.460 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: 2: + IC(0.000 ns) + CELL(0.369 ns) = 0.369 ns; Loc. = LCCOMB_X37_Y20_N12; Fanout = 5; COMB Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|ram_read_address[6]~6'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 0.460 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: Total cell delay = 0.460 ns ( 100.00 % )
- Info: - Smallest register to register requirement is -0.042 ns
- Info: + Hold relationship between source and destination is 0.000 ns
- Info: + Latch edge is -2.843 ns
- Info: Clock period of Destination clock "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" is 10.425 ns with offset of -2.843 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is -2.843 ns
- Info: Clock period of Source clock "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" is 10.425 ns with offset of -2.843 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is 0.000 ns
- Info: + Longest clock path from clock "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" to destination register is 8.088 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_2; Fanout = 1; CLK Node = 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]'
- Info: 2: + IC(1.881 ns) + CELL(0.000 ns) = 1.881 ns; Loc. = CLKCTRL_G8; Fanout = 1; COMB Node = 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.469 ns) + CELL(0.342 ns) = 3.692 ns; Loc. = LCCOMB_X22_Y18_N24; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~1'
- Info: 4: + IC(0.650 ns) + CELL(0.367 ns) = 4.709 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 5: + IC(1.732 ns) + CELL(0.000 ns) = 6.441 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 6: + IC(1.113 ns) + CELL(0.534 ns) = 8.088 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: Total cell delay = 1.243 ns ( 15.37 % )
- Info: Total interconnect delay = 6.845 ns ( 84.63 % )
- Info: - Shortest clock path from clock "altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]" to source register is 8.088 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_2; Fanout = 1; CLK Node = 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]'
- Info: 2: + IC(1.881 ns) + CELL(0.000 ns) = 1.881 ns; Loc. = CLKCTRL_G8; Fanout = 1; COMB Node = 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]~clkctrl'
- Info: 3: + IC(1.469 ns) + CELL(0.342 ns) = 3.692 ns; Loc. = LCCOMB_X22_Y18_N24; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~1'
- Info: 4: + IC(0.650 ns) + CELL(0.367 ns) = 4.709 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 5: + IC(1.732 ns) + CELL(0.000 ns) = 6.441 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 6: + IC(1.113 ns) + CELL(0.534 ns) = 8.088 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: Total cell delay = 1.243 ns ( 15.37 % )
- Info: Total interconnect delay = 6.845 ns ( 84.63 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.157 ns
-Info: Minimum slack time is -687 ps for clock "CLK33M" between source register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]" and destination register "Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]"
- Info: + Shortest register to register delay is 0.460 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: 2: + IC(0.000 ns) + CELL(0.369 ns) = 0.369 ns; Loc. = LCCOMB_X37_Y20_N12; Fanout = 5; COMB Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|ram_read_address[6]~6'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 0.460 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: Total cell delay = 0.460 ns ( 100.00 % )
- Info: - Smallest register to register requirement is 1.147 ns
- Info: + Hold relationship between source and destination is 0.000 ns
- Info: + Latch edge is 0.000 ns
- Info: Clock period of Destination clock "CLK33M" is 30.303 ns with offset of 0.000 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is 0.000 ns
- Info: Clock period of Source clock "CLK33M" is 30.303 ns with offset of 0.000 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is 1.189 ns
- Info: + Longest clock path from clock "CLK33M" to destination register is 7.681 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AB12; Fanout = 1; CLK Node = 'CLK33M'
- Info: 2: + IC(0.000 ns) + CELL(0.918 ns) = 0.918 ns; Loc. = IOIBUF_X36_Y0_N1; Fanout = 8; COMB Node = 'CLK33M~input'
- Info: 3: + IC(1.161 ns) + CELL(0.733 ns) = 2.812 ns; Loc. = FF_X33_Y18_N25; Fanout = 2; REG Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLK17M'
- Info: 4: + IC(0.852 ns) + CELL(0.311 ns) = 3.975 ns; Loc. = LCCOMB_X26_Y18_N0; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~4'
- Info: 5: + IC(0.197 ns) + CELL(0.130 ns) = 4.302 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 6: + IC(1.732 ns) + CELL(0.000 ns) = 6.034 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 7: + IC(1.113 ns) + CELL(0.534 ns) = 7.681 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: Total cell delay = 2.626 ns ( 34.19 % )
- Info: Total interconnect delay = 5.055 ns ( 65.81 % )
- Info: - Shortest clock path from clock "CLK33M" to source register is 6.492 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AB12; Fanout = 1; CLK Node = 'CLK33M'
- Info: 2: + IC(0.000 ns) + CELL(0.918 ns) = 0.918 ns; Loc. = IOIBUF_X36_Y0_N1; Fanout = 8; COMB Node = 'CLK33M~input'
- Info: 3: + IC(1.438 ns) + CELL(0.311 ns) = 2.667 ns; Loc. = LCCOMB_X26_Y18_N8; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~3'
- Info: 4: + IC(0.203 ns) + CELL(0.243 ns) = 3.113 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 5: + IC(1.732 ns) + CELL(0.000 ns) = 4.845 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 6: + IC(1.113 ns) + CELL(0.534 ns) = 6.492 ns; Loc. = FF_X37_Y20_N13; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]'
- Info: Total cell delay = 2.006 ns ( 30.90 % )
- Info: Total interconnect delay = 4.486 ns ( 69.10 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.157 ns
-Warning: Can't achieve minimum setup and hold requirement CLK33M along 26 path(s). See Report window for details.
-Info: Minimum slack time is -3.786 ns for clock "MAIN_CLK" between source register "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[6]" and destination register "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[1][0]"
- Info: + Shortest register to register delay is 1.930 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X26_Y18_N19; Fanout = 2; REG Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[6]'
- Info: 2: + IC(1.597 ns) + CELL(0.242 ns) = 1.839 ns; Loc. = LCCOMB_X34_Y15_N4; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[1][0]~1'
- Info: 3: + IC(0.000 ns) + CELL(0.091 ns) = 1.930 ns; Loc. = FF_X34_Y15_N5; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[1][0]'
- Info: Total cell delay = 0.333 ns ( 17.25 % )
- Info: Total interconnect delay = 1.597 ns ( 82.75 % )
- Info: - Smallest register to register requirement is 5.716 ns
- Info: + Hold relationship between source and destination is 0.000 ns
- Info: + Latch edge is 0.000 ns
- Info: Clock period of Destination clock "MAIN_CLK" is 30.303 ns with offset of 0.000 ns and duty cycle of 50
- Info: Multicycle Setup factor for Destination register is 1
- Info: Multicycle Hold factor for Destination register is 1
- Info: - Launch edge is 0.000 ns
- Info: Clock period of Source clock "MAIN_CLK" is 30.303 ns with offset of 0.000 ns and duty cycle of 50
- Info: Multicycle Setup factor for Source register is 1
- Info: Multicycle Hold factor for Source register is 1
- Info: + Smallest clock skew is 5.758 ns
- Info: + Longest clock path from clock "MAIN_CLK" to destination register is 8.630 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_G2; Fanout = 1; CLK Node = 'MAIN_CLK'
- Info: 2: + IC(0.000 ns) + CELL(0.981 ns) = 0.981 ns; Loc. = IOIBUF_X0_Y21_N1; Fanout = 2380; COMB Node = 'MAIN_CLK~input'
- Info: 3: + IC(1.360 ns) + CELL(0.733 ns) = 3.074 ns; Loc. = FF_X28_Y18_N31; Fanout = 208; REG Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0]'
- Info: 4: + IC(0.922 ns) + CELL(0.243 ns) = 4.239 ns; Loc. = LCCOMB_X22_Y18_N24; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~1'
- Info: 5: + IC(0.650 ns) + CELL(0.367 ns) = 5.256 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 6: + IC(1.732 ns) + CELL(0.000 ns) = 6.988 ns; Loc. = CLKCTRL_G6; Fanout = 1105; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~clkctrl'
- Info: 7: + IC(1.108 ns) + CELL(0.534 ns) = 8.630 ns; Loc. = FF_X34_Y15_N5; Fanout = 1; REG Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[1][0]'
- Info: Total cell delay = 2.858 ns ( 33.12 % )
- Info: Total interconnect delay = 5.772 ns ( 66.88 % )
- Info: - Shortest clock path from clock "MAIN_CLK" to source register is 2.872 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_G2; Fanout = 1; CLK Node = 'MAIN_CLK'
- Info: 2: + IC(0.000 ns) + CELL(0.981 ns) = 0.981 ns; Loc. = IOIBUF_X0_Y21_N1; Fanout = 2380; COMB Node = 'MAIN_CLK~input'
- Info: 3: + IC(1.357 ns) + CELL(0.534 ns) = 2.872 ns; Loc. = FF_X26_Y18_N19; Fanout = 2; REG Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[6]'
- Info: Total cell delay = 1.515 ns ( 52.75 % )
- Info: Total interconnect delay = 1.357 ns ( 47.25 % )
- Info: - Micro clock to output delay of source is 0.199 ns
- Info: + Micro hold delay of destination is 0.157 ns
-Warning: Can't achieve minimum setup and hold requirement MAIN_CLK along 108 path(s). See Report window for details.
-Warning: Can't achieve timing requirement tsu along 6867 path(s). See Report window for details.
-Info: Slack time is -4.528 ns for clock "MAIN_CLK" between source clock "MAIN_CLK" and destination register "altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|idle_state"
- Info: + tsu requirement for source pin and destination register is 1.000 ns
- Info: - tsu from clock to input pin is 5.528 ns
- Info: + Longest clock to register delay is 8.706 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_G2; Fanout = 1; CLK Node = 'MAIN_CLK'
- Info: 2: + IC(0.000 ns) + CELL(0.981 ns) = 0.981 ns; Loc. = IOIBUF_X0_Y21_N1; Fanout = 2380; COMB Node = 'MAIN_CLK~input'
- Info: 3: + IC(4.109 ns) + CELL(0.869 ns) = 5.959 ns; Loc. = PLL_2; Fanout = 4; COMB Node = 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|scandone'
- Info: 4: + IC(1.722 ns) + CELL(0.130 ns) = 7.811 ns; Loc. = LCCOMB_X21_Y26_N18; Fanout = 1; COMB Node = 'altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|idle_state~0'
- Info: 5: + IC(0.198 ns) + CELL(0.130 ns) = 8.139 ns; Loc. = LCCOMB_X21_Y26_N28; Fanout = 1; COMB Node = 'altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|idle_state~1'
- Info: 6: + IC(0.346 ns) + CELL(0.130 ns) = 8.615 ns; Loc. = LCCOMB_X22_Y26_N16; Fanout = 1; COMB Node = 'altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|idle_state~2'
- Info: 7: + IC(0.000 ns) + CELL(0.091 ns) = 8.706 ns; Loc. = FF_X22_Y26_N17; Fanout = 8; REG Node = 'altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|idle_state'
- Info: Total cell delay = 2.331 ns ( 26.77 % )
- Info: Total interconnect delay = 6.375 ns ( 73.23 % )
- Info: + Micro setup delay of destination is -0.015 ns
- Info: - Shortest clock path from clock "MAIN_CLK" to destination register is 3.163 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_G2; Fanout = 1; CLK Node = 'MAIN_CLK'
- Info: 2: + IC(0.000 ns) + CELL(0.981 ns) = 0.981 ns; Loc. = IOIBUF_X0_Y21_N1; Fanout = 2380; COMB Node = 'MAIN_CLK~input'
- Info: 3: + IC(1.648 ns) + CELL(0.534 ns) = 3.163 ns; Loc. = FF_X22_Y26_N17; Fanout = 8; REG Node = 'altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|idle_state'
- Info: Total cell delay = 1.515 ns ( 47.90 % )
- Info: Total interconnect delay = 1.648 ns ( 52.10 % )
-Warning: Can't achieve timing requirement tco along 4976 path(s). See Report window for details.
-Info: Slack time is -14.84 ns for clock "MAIN_CLK" between source register "interrupt_handler:nobody|INT_LATCH[8]" and destination pin "nIRQ[5]"
- Info: + tco requirement for source register and destination pin is 1.000 ns
- Info: - tco from clock to output pin is 15.840 ns
- Info: + Longest clock path from clock "MAIN_CLK" to source register is 9.460 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_G2; Fanout = 1; CLK Node = 'MAIN_CLK'
- Info: 2: + IC(0.000 ns) + CELL(0.981 ns) = 0.981 ns; Loc. = IOIBUF_X0_Y21_N1; Fanout = 2380; COMB Node = 'MAIN_CLK~input'
- Info: 3: + IC(1.360 ns) + CELL(0.733 ns) = 3.074 ns; Loc. = FF_X28_Y18_N31; Fanout = 208; REG Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[0]'
- Info: 4: + IC(0.922 ns) + CELL(0.243 ns) = 4.239 ns; Loc. = LCCOMB_X22_Y18_N24; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK~1'
- Info: 5: + IC(0.650 ns) + CELL(0.367 ns) = 5.256 ns; Loc. = LCCOMB_X26_Y18_N4; Fanout = 3; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|PIXEL_CLK'
- Info: 6: + IC(1.232 ns) + CELL(0.733 ns) = 7.221 ns; Loc. = FF_X18_Y15_N21; Fanout = 5; REG Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VSYNC'
- Info: 7: + IC(0.716 ns) + CELL(0.308 ns) = 8.245 ns; Loc. = LCCOMB_X15_Y15_N6; Fanout = 1; COMB Node = 'interrupt_handler:nobody|INT_LATCH[8]~19'
- Info: 8: + IC(0.681 ns) + CELL(0.534 ns) = 9.460 ns; Loc. = FF_X16_Y12_N5; Fanout = 3; REG Node = 'interrupt_handler:nobody|INT_LATCH[8]'
- Info: Total cell delay = 3.899 ns ( 41.22 % )
- Info: Total interconnect delay = 5.561 ns ( 58.78 % )
- Info: + Micro clock to output delay of source is 0.199 ns
- Info: + Longest register to pin delay is 6.181 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X16_Y12_N5; Fanout = 3; REG Node = 'interrupt_handler:nobody|INT_LATCH[8]'
- Info: 2: + IC(0.325 ns) + CELL(0.241 ns) = 0.566 ns; Loc. = LCCOMB_X16_Y12_N20; Fanout = 1; COMB Node = 'interrupt_handler:nobody|_~17'
- Info: 3: + IC(0.198 ns) + CELL(0.130 ns) = 0.894 ns; Loc. = LCCOMB_X16_Y12_N22; Fanout = 1; COMB Node = 'interrupt_handler:nobody|nIRQ[5]'
- Info: 4: + IC(1.158 ns) + CELL(4.129 ns) = 6.181 ns; Loc. = IOOBUF_X0_Y12_N16; Fanout = 1; COMB Node = 'nIRQ[5]~output'
- Info: 5: + IC(0.000 ns) + CELL(0.000 ns) = 6.181 ns; Loc. = PIN_P5; Fanout = 0; PIN Node = 'nIRQ[5]'
- Info: Total cell delay = 4.500 ns ( 72.80 % )
- Info: Total interconnect delay = 1.681 ns ( 27.20 % )
-Info: Slack time is -11.944 ns between source pin "nFB_CS1" and destination pin "FB_AD[18]"
- Info: + Longest pin to pin requirement is 1.000 ns
- Info: - Longest pin to pin delay is 12.944 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_T8; Fanout = 1; PIN Node = 'nFB_CS1'
- Info: 2: + IC(0.000 ns) + CELL(0.918 ns) = 0.918 ns; Loc. = IOIBUF_X14_Y0_N29; Fanout = 59; COMB Node = 'nFB_CS1~input'
- Info: 3: + IC(1.591 ns) + CELL(0.241 ns) = 2.750 ns; Loc. = LCCOMB_X27_Y14_N12; Fanout = 68; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE_CS~1'
- Info: 4: + IC(0.915 ns) + CELL(0.130 ns) = 3.795 ns; Loc. = LCCOMB_X29_Y10_N14; Fanout = 12; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HDB_CS'
- Info: 5: + IC(0.302 ns) + CELL(0.342 ns) = 4.439 ns; Loc. = LCCOMB_X29_Y10_N18; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component|dout[2]~44'
- Info: 6: + IC(0.648 ns) + CELL(0.243 ns) = 5.330 ns; Loc. = LCCOMB_X30_Y13_N24; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component|dout[2]~48'
- Info: 7: + IC(0.807 ns) + CELL(0.243 ns) = 6.380 ns; Loc. = LCCOMB_X28_Y12_N12; Fanout = 1; COMB Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_bustri_WORD:$00000|lpm_bustri:lpm_bustri_component|dout[2]~55'
- Info: 8: + IC(0.200 ns) + CELL(0.130 ns) = 6.710 ns; Loc. = LCCOMB_X28_Y12_N30; Fanout = 1; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~180_RESYN4_BDD5'
- Info: 9: + IC(1.088 ns) + CELL(0.242 ns) = 8.040 ns; Loc. = LCCOMB_X21_Y14_N4; Fanout = 1; COMB Node = 'FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|FB_AD[18]~180'
- Info: 10: + IC(0.876 ns) + CELL(4.028 ns) = 12.944 ns; Loc. = IOOBUF_X20_Y0_N23; Fanout = 1; COMB Node = 'FB_AD[18]~output'
- Info: 11: + IC(0.000 ns) + CELL(0.000 ns) = 12.944 ns; Loc. = PIN_V9; Fanout = 0; PIN Node = 'FB_AD[18]'
- Info: Total cell delay = 6.517 ns ( 50.35 % )
- Info: Total interconnect delay = 6.427 ns ( 49.65 % )
-Warning: Can't achieve timing requirement tpd along 514 path(s). See Report window for details.
-Warning: Can't achieve timing requirement th along 117 path(s). See Report window for details.
-Info: Minimum slack time is -401 ps for clock "MAIN_CLK" between source pin "FB_AD[25]" and destination register "Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[9]"
- Info: + th requirement for source pin and destination register is 1.000 ns
- Info: - th from clock to input pin is 1.401 ns
- Info: + Longest clock path from clock "MAIN_CLK" to destination register is 4.679 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_G2; Fanout = 1; CLK Node = 'MAIN_CLK'
- Info: 2: + IC(0.000 ns) + CELL(0.981 ns) = 0.981 ns; Loc. = IOIBUF_X0_Y21_N1; Fanout = 2380; COMB Node = 'MAIN_CLK~input'
- Info: 3: + IC(3.164 ns) + CELL(0.534 ns) = 4.679 ns; Loc. = FF_X30_Y10_N5; Fanout = 4; REG Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[9]'
- Info: Total cell delay = 1.515 ns ( 32.38 % )
- Info: Total interconnect delay = 3.164 ns ( 67.62 % )
- Info: + Micro hold delay of destination is 0.157 ns
- Info: - Shortest pin to register delay is 3.435 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AA9; Fanout = 1; PIN Node = 'FB_AD[25]'
- Info: 2: + IC(0.000 ns) + CELL(0.918 ns) = 0.918 ns; Loc. = IOIBUF_X27_Y0_N8; Fanout = 59; COMB Node = 'FB_AD[25]~input'
- Info: 3: + IC(2.175 ns) + CELL(0.342 ns) = 3.435 ns; Loc. = FF_X30_Y10_N5; Fanout = 4; REG Node = 'Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[9]'
- Info: Total cell delay = 1.260 ns ( 36.68 % )
- Info: Total interconnect delay = 2.175 ns ( 63.32 % )
-Critical Warning: Timing requirements for slow timing model timing analysis were not met. See Report window for details.
-Warning: Found invalid timing assignments -- see Ignored Timing Assignments report for details
-Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 65 warnings
- Info: Peak virtual memory: 238 megabytes
- Info: Processing ended: Wed Dec 15 02:25:23 2010
- Info: Elapsed time: 00:00:09
- Info: Total CPU time (on all processors): 00:00:11
-
-
diff --git a/FPGA_by_Fredi/firebee1.tan.summary b/FPGA_by_Fredi/firebee1.tan.summary
index 219f117..2b4b381 100644
--- a/FPGA_by_Fredi/firebee1.tan.summary
+++ b/FPGA_by_Fredi/firebee1.tan.summary
@@ -3,203 +3,183 @@ Timing Analyzer Summary
--------------------------------------------------------------------------------------
Type : Worst-case tsu
-Slack : -4.528 ns
+Slack : -10.339 ns
Required Time : 1.000 ns
-Actual Time : 5.528 ns
-From : MAIN_CLK
-To : altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|idle_state
+Actual Time : 11.339 ns
+From : FB_SIZE1
+To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|MR2[2]
From Clock : --
To Clock : MAIN_CLK
-Failed Paths : 6867
+Failed Paths : 10192
Type : Worst-case tco
-Slack : -14.840 ns
+Slack : -14.371 ns
Required Time : 1.000 ns
-Actual Time : 15.840 ns
-From : interrupt_handler:nobody|INT_LATCH[8]
-To : nIRQ[5]
+Actual Time : 15.371 ns
+From : interrupt_handler:nobody|RTC_ADR[0]
+To : FB_AD[18]
From Clock : MAIN_CLK
To Clock : --
-Failed Paths : 4976
+Failed Paths : 5354
Type : Worst-case tpd
-Slack : -11.944 ns
+Slack : -13.264 ns
Required Time : 1.000 ns
-Actual Time : 12.944 ns
+Actual Time : 14.264 ns
From : nFB_CS1
To : FB_AD[18]
From Clock : --
To Clock : --
-Failed Paths : 514
+Failed Paths : 538
Type : Worst-case th
-Slack : -0.401 ns
+Slack : -0.110 ns
Required Time : 1.000 ns
-Actual Time : 1.401 ns
-From : FB_AD[25]
-To : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_HBE[9]
+Actual Time : 1.110 ns
+From : VD[31]
+To : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[31]
From Clock : --
To Clock : MAIN_CLK
-Failed Paths : 117
+Failed Paths : 2
-Type : Clock Setup: 'CLK33M'
-Slack : -5.966 ns
-Required Time : 33.00 MHz ( period = 30.303 ns )
+Type : Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[0]'
+Slack : -7.918 ns
+Required Time : 25.00 MHz ( period = 39.999 ns )
Actual Time : N/A
-From : Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0
-To : Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]
-From Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]
-To Clock : CLK33M
-Failed Paths : 3741
-
-Type : Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]'
-Slack : -4.615 ns
-Required Time : 24.98 MHz ( period = 40.033 ns )
-Actual Time : N/A
-From : Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0
-To : Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]
-From Clock : altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]
-To Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]
-Failed Paths : 3741
+From : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[6]
+To : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_OFF
+From Clock : MAIN_CLK
+To Clock : altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[0]
+Failed Paths : 4748
Type : Clock Setup: 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]'
-Slack : -4.294 ns
-Required Time : 95.92 MHz ( period = 10.425 ns )
+Slack : -6.799 ns
+Required Time : 96.01 MHz ( period = 10.416 ns )
Actual Time : N/A
-From : Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ram_block1a1~portb_address_reg0
-To : Video:Fredi_Aschwanden|lpm_muxDZ:inst62|lpm_mux:lpm_mux_component|mux_dcf:auto_generated|external_latency_ffsa[35]
-From Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]
+From : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[6]
+To : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|DPO_OFF
+From Clock : MAIN_CLK
To Clock : altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]
-Failed Paths : 3741
+Failed Paths : 4694
Type : Clock Setup: 'MAIN_CLK'
-Slack : -4.261 ns
+Slack : -5.955 ns
Required Time : 33.00 MHz ( period = 30.303 ns )
Actual Time : N/A
-From : FB_ALE
-To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|a_graycounter_k47:rdptr_g1p|counter5a7
-From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]
+From : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|nBLANK
+To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF68901IP_TOP_SOC:I_MFP|WF68901IP_INTERRUPTS:I_INTERRUPTS|\EDGE_ENA:LOCK[3]
+From Clock : altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[0]
To Clock : MAIN_CLK
-Failed Paths : 27347
+Failed Paths : 41276
Type : Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]'
-Slack : -2.673 ns
+Slack : -5.567 ns
Required Time : 132.01 MHz ( period = 7.575 ns )
Actual Time : N/A
-From : FB_ALE
-To : Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|BUS_CYC
-From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]
+From : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CLR_FIFO
+To : Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CLR_FIFO_SYNC
+From Clock : altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[0]
To Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]
-Failed Paths : 86
+Failed Paths : 129
+
+Type : Clock Setup: 'altpll1:inst|altpll:altpll_component|altpll_d4m2:auto_generated|clk[1]'
+Slack : -4.614 ns
+Required Time : 16.00 MHz ( period = 62.499 ns )
+Actual Time : N/A
+From : lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[19]
+To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF5380_TOP_SOC:I_SCSI|WF5380_REGISTERS:I_REGISTERS|ICR[4]
+From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]
+To Clock : altpll1:inst|altpll:altpll_component|altpll_d4m2:auto_generated|clk[1]
+Failed Paths : 2882
Type : Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]'
-Slack : -1.712 ns
+Slack : -3.520 ns
Required Time : 66.00 MHz ( period = 15.151 ns )
Actual Time : N/A
From : FB_ALE
-To : Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ
-From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]
+To : lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2]
+From Clock : altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[0]
To Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]
Failed Paths : 29
Type : Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]'
-Slack : 1.672 ns
+Slack : 2.410 ns
Required Time : 132.01 MHz ( period = 7.575 ns )
Actual Time : N/A
-From : Video:Fredi_Aschwanden|lpm_ff0:inst13|lpm_ff:lpm_ff_component|dffs[2]
-To : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[2]~DFFHI
-From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]
+From : Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_DDR_WR
+To : Video:Fredi_Aschwanden|inst90~_Duplicate_2
+From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]
To Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]
Failed Paths : 0
Type : Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]'
-Slack : 2.965 ns
+Slack : 2.966 ns
Required Time : 132.01 MHz ( period = 7.575 ns )
Actual Time : Restricted to 500.00 MHz ( period = 2.000 ns )
-From : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[6]
-To : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[6]
+From : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[29]
+To : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[29]
From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]
To Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]
Failed Paths : 0
Type : Clock Setup: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]'
-Slack : 5.299 ns
+Slack : 5.144 ns
Required Time : 132.01 MHz ( period = 7.575 ns )
Actual Time : N/A
-From : Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[3]
-To : Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[3]
+From : Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[4]
+To : Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[4]
From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]
To Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]
Failed Paths : 0
-Type : Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]'
-Slack : 28.590 ns
-Required Time : 15.99 MHz ( period = 62.552 ns )
-Actual Time : 186.15 MHz ( period = 5.372 ns )
-From : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|RD_In
-To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_DIGITAL_PLL:I_DIGITAL_PLL|\EDGEDETECT:LOCK
-From Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]
-To Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]
-Failed Paths : 0
-
-Type : Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]'
-Slack : 498.663 ns
-Required Time : 2.00 MHz ( period = 500.416 ns )
-Actual Time : Restricted to 500.00 MHz ( period = 2.000 ns )
-From : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]
-To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0]
-From Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]
-To Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]
-Failed Paths : 0
-
-Type : Clock Setup: 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]'
-Slack : 1997.239 ns
+Type : Clock Setup: 'altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[2]'
+Slack : 26.171 ns
Required Time : 0.50 MHz ( period = 1999.998 ns )
-Actual Time : 362.45 MHz ( period = 2.759 ns )
-From : lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[0]
-To : lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[17]
-From Clock : altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]
-To Clock : altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]
+Actual Time : N/A
+From : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF6850IP_TOP_SOC:I_ACIA_KEYBOARD|WF6850IP_TRANSMIT:I_UART_TRANSMIT|SHIFT_REG[0]
+To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_TX
+From Clock : MAIN_CLK
+To Clock : altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[2]
Failed Paths : 0
Type : Clock Hold: 'MAIN_CLK'
-Slack : -3.786 ns
+Slack : -3.299 ns
Required Time : 33.00 MHz ( period = 30.303 ns )
Actual Time : N/A
-From : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VDL_VCT[6]
-To : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|VERZ[1][0]
+From : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|ACP_VCTR[6]
+To : Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|CCSEL[2]
From Clock : MAIN_CLK
To Clock : MAIN_CLK
-Failed Paths : 108
+Failed Paths : 529
-Type : Clock Hold: 'CLK33M'
-Slack : -0.687 ns
-Required Time : 33.00 MHz ( period = 30.303 ns )
+Type : Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[0]'
+Slack : -0.640 ns
+Required Time : 25.00 MHz ( period = 39.999 ns )
Actual Time : N/A
From : Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]
To : Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]
-From Clock : CLK33M
-To Clock : CLK33M
-Failed Paths : 26
+From Clock : altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[0]
+To Clock : altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[0]
+Failed Paths : 33
-Type : Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]'
-Slack : -0.454 ns
-Required Time : 24.98 MHz ( period = 40.033 ns )
+Type : Clock Hold: 'altpll1:inst|altpll:altpll_component|altpll_d4m2:auto_generated|clk[1]'
+Slack : 0.453 ns
+Required Time : 16.00 MHz ( period = 62.499 ns )
Actual Time : N/A
-From : Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]
-To : Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]
-From Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]
-To Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[2]
-Failed Paths : 26
+From : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|wrptr_g[6]
+To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|ram_block11a0~porta_address_reg0
+From Clock : altpll1:inst|altpll:altpll_component|altpll_d4m2:auto_generated|clk[1]
+To Clock : altpll1:inst|altpll:altpll_component|altpll_d4m2:auto_generated|clk[1]
+Failed Paths : 0
-Type : Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]'
+Type : Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[2]'
Slack : 0.502 ns
-Required Time : 15.99 MHz ( period = 62.552 ns )
+Required Time : 0.50 MHz ( period = 1999.998 ns )
Actual Time : N/A
-From : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1
-To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_CONTROL:I_CONTROL|WG~_Duplicate_1
-From Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]
-To Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[1]
+From : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0]
+To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[0]
+From Clock : altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[2]
+To Clock : altpll3:inst13|altpll:altpll_component|altpll_qks2:auto_generated|clk[2]
Failed Paths : 0
Type : Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]'
@@ -214,7 +194,7 @@ Failed Paths : 0
Type : Clock Hold: 'altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]'
Slack : 0.502 ns
-Required Time : 95.92 MHz ( period = 10.425 ns )
+Required Time : 96.01 MHz ( period = 10.416 ns )
Actual Time : N/A
From : Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]
To : Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|low_addressa[6]
@@ -222,62 +202,42 @@ From Clock : altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generat
To Clock : altpll4:inst22|altpll:altpll_component|altpll_c6j2:auto_generated|clk[0]
Failed Paths : 0
-Type : Clock Hold: 'altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]'
-Slack : 0.564 ns
-Required Time : 2.00 MHz ( period = 500.416 ns )
-Actual Time : N/A
-From : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]
-To : FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|AMKB_REG[4]
-From Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]
-To Clock : altpll3:inst13|altpll:altpll_component|altpll_41p2:auto_generated|clk[0]
-Failed Paths : 0
-
-Type : Clock Hold: 'altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]'
-Slack : 0.825 ns
-Required Time : 0.50 MHz ( period = 1999.998 ns )
-Actual Time : N/A
-From : lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10]
-To : lpm_counter0:inst18|lpm_counter:lpm_counter_component|cntr_mph:auto_generated|counter_reg_bit[10]
-From Clock : altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]
-To Clock : altpll1:inst|altpll:altpll_component|altpll_pul2:auto_generated|clk[0]
-Failed Paths : 0
-
-Type : Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]'
-Slack : 1.825 ns
-Required Time : 132.01 MHz ( period = 7.575 ns )
-Actual Time : N/A
-From : Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[6]
-To : Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[6]
-From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]
-To Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]
-Failed Paths : 0
-
Type : Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]'
-Slack : 2.664 ns
+Slack : 1.775 ns
Required Time : 66.00 MHz ( period = 15.151 ns )
Actual Time : N/A
-From : FB_ALE
-To : lpm_ff0:inst1|lpm_ff:lpm_ff_component|dffs[2]
+From : Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ
+To : Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|CPU_REQ
From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]
To Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]
Failed Paths : 0
-Type : Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]'
-Slack : 3.263 ns
+Type : Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]'
+Slack : 1.829 ns
Required Time : 132.01 MHz ( period = 7.575 ns )
Actual Time : N/A
-From : Video:Fredi_Aschwanden|lpm_ff0:inst14|lpm_ff:lpm_ff_component|dffs[29]
-To : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[29]~DFFLO
-From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[4]
+From : Video:Fredi_Aschwanden|DDR_CTR:DDR_CTR|SR_VDMP[7]
+To : Video:Fredi_Aschwanden|lpm_ff5:inst97|lpm_ff:lpm_ff_component|dffs[7]
+From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[0]
+To Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[2]
+Failed Paths : 0
+
+Type : Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]'
+Slack : 2.585 ns
+Required Time : 132.01 MHz ( period = 7.575 ns )
+Actual Time : N/A
+From : Video:Fredi_Aschwanden|inst90~_Duplicate_4
+To : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|ddio_outa[30]~DFFHI
+From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]
To Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[3]
Failed Paths : 0
Type : Clock Hold: 'altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]'
-Slack : 4.336 ns
+Slack : 4.335 ns
Required Time : 132.01 MHz ( period = 7.575 ns )
Actual Time : N/A
-From : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[2]
-To : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[2]
+From : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_cell_l[12]
+To : Video:Fredi_Aschwanden|altddio_bidir0:inst1|altddio_bidir:altddio_bidir_component|ddio_bidir_3jl:auto_generated|input_latch_l[12]
From Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]
To Clock : altpll2:inst12|altpll:altpll_component|altpll_isv2:auto_generated|clk[1]
Failed Paths : 0
@@ -290,7 +250,7 @@ From :
To :
From Clock :
To Clock :
-Failed Paths : 51319
+Failed Paths : 70406
--------------------------------------------------------------------------------------
diff --git a/FPGA_by_Fredi/firebeei1.qws b/FPGA_by_Fredi/firebeei1.qws
deleted file mode 100644
index 89bdcec..0000000
--- a/FPGA_by_Fredi/firebeei1.qws
+++ /dev/null
@@ -1,27 +0,0 @@
-[ProjectWorkspace]
-ptn_Child1=Frames
-[ProjectWorkspace.Frames]
-ptn_Child1=ChildFrames
-[ProjectWorkspace.Frames.ChildFrames]
-ptn_Child1=Document-0
-ptn_Child2=Document-1
-ptn_Child3=Document-2
-ptn_Child4=Document-3
-[ProjectWorkspace.Frames.ChildFrames.Document-0]
-ptn_Child1=ViewFrame-0
-[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0]
-DocPathName=firebee1.bdf
-DocumentCLSID={7b19e8f2-2bbe-11d1-a082-0020affa5bde}
-IsChildFrameDetached=False
-IsActiveChildFrame=False
-ptn_Child1=StateMap
-[ProjectWorkspace.Frames.ChildFrames.Document-1]
-ptn_Child1=ViewFrame-0
-[ProjectWorkspace.Frames.ChildFrames.Document-1.ViewFrame-0]
-DocPathName=FalconIO_SDCard_IDE_CF/FalconIO_SDCard_IDE_CF.vhd
-DocumentCLSID={ca385d57-a4c7-11d1-a098-0020affa43f2}
-IsChildFrameDetached=False
-IsActiveChildFrame=False
-ptn_Child1=StateMap
-[ProjectWorkspace.Frames.ChildFrames.Document-1.ViewFrame-0.StateMap]
-AFC_IN_REPORT=False
diff --git a/FPGA_by_Fredi/incremental_db/README b/FPGA_by_Fredi/incremental_db/README
new file mode 100644
index 0000000..6191fbe
--- /dev/null
+++ b/FPGA_by_Fredi/incremental_db/README
@@ -0,0 +1,11 @@
+This folder contains data for incremental compilation.
+
+The compiled_partitions sub-folder contains previous compilation results for each partition.
+As long as this folder is preserved, incremental compilation results from earlier compiles
+can be re-used. To perform a clean compilation from source files for all partitions, both
+the db and incremental_db folder should be removed.
+
+The imported_partitions sub-folder contains the last imported QXP for each imported partition.
+As long as this folder is preserved, imported partitions will be automatically re-imported
+when the db or incremental_db/compiled_partitions folders are removed.
+
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.cdb b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.cdb
new file mode 100644
index 0000000..02d4502
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.cdb differ
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.dfp b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.dfp
new file mode 100644
index 0000000..b1c67d6
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.dfp differ
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.hdb b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.hdb
new file mode 100644
index 0000000..541ae5c
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.hdb differ
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.kpt b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.kpt
new file mode 100644
index 0000000..8376a16
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.kpt differ
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.logdb b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.logdb
new file mode 100644
index 0000000..4107b3a
--- /dev/null
+++ b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.logdb
@@ -0,0 +1,5 @@
+v1
+DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_12|mult_aat:auto_generated|mac_out2,
+DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_6|mult_aat:auto_generated|mac_out2,
+DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14|mult_cat:auto_generated|mac_out2,
+PORT_SWAPPING,PORT_SWAPPING_FINISHED,Video:Fredi_Aschwanden|VIDEO_MOD_MUX_CLUTCTR:VIDEO_MOD_MUX_CLUTCTR|lpm_mult:op_14|mult_cat:auto_generated|mac_mult1,
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.rcfdb b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.rcfdb
new file mode 100644
index 0000000..15c6a52
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.rcfdb differ
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.re.rcfdb b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.re.rcfdb
new file mode 100644
index 0000000..bbf2af5
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.cmp.re.rcfdb differ
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.cdb b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.cdb
new file mode 100644
index 0000000..29a8f19
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.cdb differ
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.dpi b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.dpi
new file mode 100644
index 0000000..aac72df
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.dpi differ
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.hdb b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.hdb
new file mode 100644
index 0000000..ad6bbe3
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.hdb differ
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.kpt b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.kpt
new file mode 100644
index 0000000..e2f7cf7
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.map.kpt differ
diff --git a/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.merge_hb.atm b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.merge_hb.atm
new file mode 100644
index 0000000..54a965d
Binary files /dev/null and b/FPGA_by_Fredi/incremental_db/compiled_partitions/firebee1.root_partition.merge_hb.atm differ
diff --git a/FPGA_by_Fredi/lpm_counter1.bsf b/FPGA_by_Fredi/lpm_counter1.bsf
new file mode 100644
index 0000000..1d5fb86
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_counter1.bsf
@@ -0,0 +1,56 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 1991-2010 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Altera Program License
+Subscription Agreement, Altera MegaCore Function License
+Agreement, or other applicable license agreement, including,
+without limitation, that your use is for the sole purpose of
+programming logic devices manufactured by Altera and sold by
+Altera or its authorized distributors. Please refer to the
+applicable agreement for further details.
+*/
+(header "symbol" (version "1.1"))
+(symbol
+ (rect 0 0 144 80)
+ (text "lpm_counter1" (rect 23 2 138 21)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 61 31 76)(font "Arial" ))
+ (port
+ (pt 0 32)
+ (input)
+ (text "clock" (rect 0 0 36 16)(font "Arial" (font_size 8)))
+ (text "clock" (rect 26 24 57 40)(font "Arial" (font_size 8)))
+ (line (pt 0 32)(pt 16 32)(line_width 1))
+ )
+ (port
+ (pt 144 40)
+ (output)
+ (text "q[11..0]" (rect 0 0 51 16)(font "Arial" (font_size 8)))
+ (text "q[11..0]" (rect 81 32 125 48)(font "Arial" (font_size 8)))
+ (line (pt 144 40)(pt 128 40)(line_width 3))
+ )
+ (port
+ (pt 144 56)
+ (output)
+ (text "cout" (rect 0 0 29 16)(font "Arial" (font_size 8)))
+ (text "cout" (rect 100 48 125 64)(font "Arial" (font_size 8)))
+ (line (pt 144 56)(pt 128 56)(line_width 1))
+ )
+ (drawing
+ (text "up counter" (rect 70 18 122 32)(font "Arial" ))
+ (line (pt 16 16)(pt 128 16)(line_width 1))
+ (line (pt 128 16)(pt 128 64)(line_width 1))
+ (line (pt 128 64)(pt 16 64)(line_width 1))
+ (line (pt 16 64)(pt 16 16)(line_width 1))
+ (line (pt 16 26)(pt 22 32)(line_width 1))
+ (line (pt 22 32)(pt 16 38)(line_width 1))
+ )
+)
diff --git a/FPGA_by_Fredi/lpm_counter1.cmp b/FPGA_by_Fredi/lpm_counter1.cmp
new file mode 100644
index 0000000..2e72417
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_counter1.cmp
@@ -0,0 +1,23 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+component lpm_counter1
+ PORT
+ (
+ clock : IN STD_LOGIC ;
+ cout : OUT STD_LOGIC ;
+ q : OUT STD_LOGIC_VECTOR (11 DOWNTO 0)
+ );
+end component;
diff --git a/FPGA_by_Fredi/lpm_counter1.inc b/FPGA_by_Fredi/lpm_counter1.inc
new file mode 100644
index 0000000..59d19df
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_counter1.inc
@@ -0,0 +1,24 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+FUNCTION lpm_counter1
+(
+ clock
+)
+
+RETURNS (
+ cout,
+ q[11..0]
+);
diff --git a/FPGA_by_Fredi/lpm_counter1.qip b/FPGA_by_Fredi/lpm_counter1.qip
new file mode 100644
index 0000000..2bcc1a0
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_counter1.qip
@@ -0,0 +1,6 @@
+set_global_assignment -name IP_TOOL_NAME "LPM_COUNTER"
+set_global_assignment -name IP_TOOL_VERSION "9.1"
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_counter1.tdf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_counter1.bsf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_counter1.inc"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_counter1.cmp"]
diff --git a/FPGA_by_Fredi/lpm_counter1.tdf b/FPGA_by_Fredi/lpm_counter1.tdf
new file mode 100644
index 0000000..46924c3
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_counter1.tdf
@@ -0,0 +1,103 @@
+-- megafunction wizard: %LPM_COUNTER%
+-- GENERATION: STANDARD
+-- VERSION: WM1.0
+-- MODULE: lpm_counter
+
+-- ============================================================
+-- File Name: lpm_counter1.tdf
+-- Megafunction Name(s):
+-- lpm_counter
+--
+-- Simulation Library Files(s):
+-- lpm
+-- ============================================================
+-- ************************************************************
+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+--
+-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
+-- ************************************************************
+
+
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+INCLUDE "lpm_counter.inc";
+
+
+
+SUBDESIGN lpm_counter1
+(
+ clock : INPUT;
+ cout : OUTPUT;
+ q[11..0] : OUTPUT;
+)
+
+VARIABLE
+
+ lpm_counter_component : lpm_counter WITH (
+ LPM_DIRECTION = "UP",
+ LPM_PORT_UPDOWN = "PORT_UNUSED",
+ LPM_TYPE = "LPM_COUNTER",
+ LPM_WIDTH = 12
+ );
+
+BEGIN
+
+ cout = lpm_counter_component.cout;
+ q[11..0] = lpm_counter_component.q[11..0];
+ lpm_counter_component.clock = clock;
+END;
+
+
+
+-- ============================================================
+-- CNX file retrieval info
+-- ============================================================
+-- Retrieval info: PRIVATE: ACLR NUMERIC "0"
+-- Retrieval info: PRIVATE: ALOAD NUMERIC "0"
+-- Retrieval info: PRIVATE: ASET NUMERIC "0"
+-- Retrieval info: PRIVATE: ASET_ALL1 NUMERIC "1"
+-- Retrieval info: PRIVATE: CLK_EN NUMERIC "0"
+-- Retrieval info: PRIVATE: CNT_EN NUMERIC "0"
+-- Retrieval info: PRIVATE: CarryIn NUMERIC "0"
+-- Retrieval info: PRIVATE: CarryOut NUMERIC "1"
+-- Retrieval info: PRIVATE: Direction NUMERIC "0"
+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: PRIVATE: ModulusCounter NUMERIC "0"
+-- Retrieval info: PRIVATE: ModulusValue NUMERIC "0"
+-- Retrieval info: PRIVATE: SCLR NUMERIC "0"
+-- Retrieval info: PRIVATE: SLOAD NUMERIC "0"
+-- Retrieval info: PRIVATE: SSET NUMERIC "0"
+-- Retrieval info: PRIVATE: SSET_ALL1 NUMERIC "1"
+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+-- Retrieval info: PRIVATE: nBit NUMERIC "12"
+-- Retrieval info: CONSTANT: LPM_DIRECTION STRING "UP"
+-- Retrieval info: CONSTANT: LPM_PORT_UPDOWN STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_COUNTER"
+-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "12"
+-- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock
+-- Retrieval info: USED_PORT: cout 0 0 0 0 OUTPUT NODEFVAL cout
+-- Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL q[11..0]
+-- Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0
+-- Retrieval info: CONNECT: q 0 0 12 0 @q 0 0 12 0
+-- Retrieval info: CONNECT: cout 0 0 0 0 @cout 0 0 0 0
+-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_counter1.tdf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_counter1.inc TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_counter1.cmp TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_counter1.bsf TRUE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_counter1_inst.tdf FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_counter1_waveforms.html TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_counter1_wave*.jpg FALSE
+-- Retrieval info: LIB_FILE: lpm
diff --git a/FPGA_by_Fredi/lpm_counter1_wave0.jpg b/FPGA_by_Fredi/lpm_counter1_wave0.jpg
new file mode 100644
index 0000000..8298f97
Binary files /dev/null and b/FPGA_by_Fredi/lpm_counter1_wave0.jpg differ
diff --git a/FPGA_by_Fredi/lpm_counter1_waveforms.html b/FPGA_by_Fredi/lpm_counter1_waveforms.html
index cea3320..a353967 100644
--- a/FPGA_by_Fredi/lpm_counter1_waveforms.html
+++ b/FPGA_by_Fredi/lpm_counter1_waveforms.html
@@ -1,16 +1,13 @@
-Sample Waveforms for lpm_counter1.vhd
+Sample Waveforms for "lpm_counter1.tdf"
-Sample behavioral waveforms for design file lpm_counter1.vhd
-The following waveforms show the behavior of lpm_counter megafunction for the chosen set of parameters in design lpm_counter1.vhd. The design lpm_counter1.vhd is a 4 bit up modulus 8 counter.
+Sample behavioral waveforms for design file "lpm_counter1.tdf"
+The following waveforms show the behavior of lpm_counter megafunction for the chosen set of parameters in design "lpm_counter1.tdf". The design "lpm_counter1.tdf" is a 12 bit up counter.
Fig. 1 : Wave showing counter operation.
-
-
-Fig. 2 : Wave showing counter cout and/or modulus operation.
-The counter counts till the modulus value 7.
+The output port cout will be asserted at the completion of count sequence. The ports cin and cout are used to chain multiple counters together.
diff --git a/FPGA_by_Fredi/lpm_mux0.bsf b/FPGA_by_Fredi/lpm_mux0.bsf
new file mode 100644
index 0000000..ae881bd
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_mux0.bsf
@@ -0,0 +1,1838 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 1991-2010 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Altera Program License
+Subscription Agreement, Altera MegaCore Function License
+Agreement, or other applicable license agreement, including,
+without limitation, that your use is for the sole purpose of
+programming logic devices manufactured by Altera and sold by
+Altera or its authorized distributors. Please refer to the
+applicable agreement for further details.
+*/
+(header "symbol" (version "1.1"))
+(symbol
+ (rect 0 0 200 4144)
+ (text "lpm_mux0" (rect 76 3 160 22)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 4125 31 4140)(font "Arial" ))
+ (port
+ (pt 0 40)
+ (input)
+ (text "data255x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data255x[127..0]" (rect 4 24 101 40)(font "Arial" (font_size 8)))
+ (line (pt 0 40)(pt 104 40)(line_width 3))
+ )
+ (port
+ (pt 0 56)
+ (input)
+ (text "data254x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data254x[127..0]" (rect 4 40 101 56)(font "Arial" (font_size 8)))
+ (line (pt 0 56)(pt 104 56)(line_width 3))
+ )
+ (port
+ (pt 0 72)
+ (input)
+ (text "data253x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data253x[127..0]" (rect 4 56 101 72)(font "Arial" (font_size 8)))
+ (line (pt 0 72)(pt 104 72)(line_width 3))
+ )
+ (port
+ (pt 0 88)
+ (input)
+ (text "data252x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data252x[127..0]" (rect 4 72 101 88)(font "Arial" (font_size 8)))
+ (line (pt 0 88)(pt 104 88)(line_width 3))
+ )
+ (port
+ (pt 0 104)
+ (input)
+ (text "data251x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data251x[127..0]" (rect 4 88 101 104)(font "Arial" (font_size 8)))
+ (line (pt 0 104)(pt 104 104)(line_width 3))
+ )
+ (port
+ (pt 0 120)
+ (input)
+ (text "data250x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data250x[127..0]" (rect 4 104 101 120)(font "Arial" (font_size 8)))
+ (line (pt 0 120)(pt 104 120)(line_width 3))
+ )
+ (port
+ (pt 0 136)
+ (input)
+ (text "data249x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data249x[127..0]" (rect 4 120 101 136)(font "Arial" (font_size 8)))
+ (line (pt 0 136)(pt 104 136)(line_width 3))
+ )
+ (port
+ (pt 0 152)
+ (input)
+ (text "data248x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data248x[127..0]" (rect 4 136 101 152)(font "Arial" (font_size 8)))
+ (line (pt 0 152)(pt 104 152)(line_width 3))
+ )
+ (port
+ (pt 0 168)
+ (input)
+ (text "data247x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data247x[127..0]" (rect 4 152 101 168)(font "Arial" (font_size 8)))
+ (line (pt 0 168)(pt 104 168)(line_width 3))
+ )
+ (port
+ (pt 0 184)
+ (input)
+ (text "data246x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data246x[127..0]" (rect 4 168 101 184)(font "Arial" (font_size 8)))
+ (line (pt 0 184)(pt 104 184)(line_width 3))
+ )
+ (port
+ (pt 0 200)
+ (input)
+ (text "data245x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data245x[127..0]" (rect 4 184 101 200)(font "Arial" (font_size 8)))
+ (line (pt 0 200)(pt 104 200)(line_width 3))
+ )
+ (port
+ (pt 0 216)
+ (input)
+ (text "data244x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data244x[127..0]" (rect 4 200 101 216)(font "Arial" (font_size 8)))
+ (line (pt 0 216)(pt 104 216)(line_width 3))
+ )
+ (port
+ (pt 0 232)
+ (input)
+ (text "data243x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data243x[127..0]" (rect 4 216 101 232)(font "Arial" (font_size 8)))
+ (line (pt 0 232)(pt 104 232)(line_width 3))
+ )
+ (port
+ (pt 0 248)
+ (input)
+ (text "data242x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data242x[127..0]" (rect 4 232 101 248)(font "Arial" (font_size 8)))
+ (line (pt 0 248)(pt 104 248)(line_width 3))
+ )
+ (port
+ (pt 0 264)
+ (input)
+ (text "data241x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data241x[127..0]" (rect 4 248 101 264)(font "Arial" (font_size 8)))
+ (line (pt 0 264)(pt 104 264)(line_width 3))
+ )
+ (port
+ (pt 0 280)
+ (input)
+ (text "data240x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data240x[127..0]" (rect 4 264 101 280)(font "Arial" (font_size 8)))
+ (line (pt 0 280)(pt 104 280)(line_width 3))
+ )
+ (port
+ (pt 0 296)
+ (input)
+ (text "data239x[127..0]" (rect 0 0 114 16)(font "Arial" (font_size 8)))
+ (text "data239x[127..0]" (rect 4 280 101 296)(font "Arial" (font_size 8)))
+ (line (pt 0 296)(pt 104 296)(line_width 3))
+ )
+ (port
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+ (line (pt 0 3848)(pt 104 3848)(line_width 3))
+ )
+ (port
+ (pt 0 3864)
+ (input)
+ (text "data16x[127..0]" (rect 0 0 106 16)(font "Arial" (font_size 8)))
+ (text "data16x[127..0]" (rect 4 3848 94 3864)(font "Arial" (font_size 8)))
+ (line (pt 0 3864)(pt 104 3864)(line_width 3))
+ )
+ (port
+ (pt 0 3880)
+ (input)
+ (text "data15x[127..0]" (rect 0 0 106 16)(font "Arial" (font_size 8)))
+ (text "data15x[127..0]" (rect 4 3864 94 3880)(font "Arial" (font_size 8)))
+ (line (pt 0 3880)(pt 104 3880)(line_width 3))
+ )
+ (port
+ (pt 0 3896)
+ (input)
+ (text "data14x[127..0]" (rect 0 0 106 16)(font "Arial" (font_size 8)))
+ (text "data14x[127..0]" (rect 4 3880 94 3896)(font "Arial" (font_size 8)))
+ (line (pt 0 3896)(pt 104 3896)(line_width 3))
+ )
+ (port
+ (pt 0 3912)
+ (input)
+ (text "data13x[127..0]" (rect 0 0 106 16)(font "Arial" (font_size 8)))
+ (text "data13x[127..0]" (rect 4 3896 94 3912)(font "Arial" (font_size 8)))
+ (line (pt 0 3912)(pt 104 3912)(line_width 3))
+ )
+ (port
+ (pt 0 3928)
+ (input)
+ (text "data12x[127..0]" (rect 0 0 106 16)(font "Arial" (font_size 8)))
+ (text "data12x[127..0]" (rect 4 3912 94 3928)(font "Arial" (font_size 8)))
+ (line (pt 0 3928)(pt 104 3928)(line_width 3))
+ )
+ (port
+ (pt 0 3944)
+ (input)
+ (text "data11x[127..0]" (rect 0 0 106 16)(font "Arial" (font_size 8)))
+ (text "data11x[127..0]" (rect 4 3928 94 3944)(font "Arial" (font_size 8)))
+ (line (pt 0 3944)(pt 104 3944)(line_width 3))
+ )
+ (port
+ (pt 0 3960)
+ (input)
+ (text "data10x[127..0]" (rect 0 0 106 16)(font "Arial" (font_size 8)))
+ (text "data10x[127..0]" (rect 4 3944 94 3960)(font "Arial" (font_size 8)))
+ (line (pt 0 3960)(pt 104 3960)(line_width 3))
+ )
+ (port
+ (pt 0 3976)
+ (input)
+ (text "data9x[127..0]" (rect 0 0 97 16)(font "Arial" (font_size 8)))
+ (text "data9x[127..0]" (rect 4 3960 87 3976)(font "Arial" (font_size 8)))
+ (line (pt 0 3976)(pt 104 3976)(line_width 3))
+ )
+ (port
+ (pt 0 3992)
+ (input)
+ (text "data8x[127..0]" (rect 0 0 97 16)(font "Arial" (font_size 8)))
+ (text "data8x[127..0]" (rect 4 3976 87 3992)(font "Arial" (font_size 8)))
+ (line (pt 0 3992)(pt 104 3992)(line_width 3))
+ )
+ (port
+ (pt 0 4008)
+ (input)
+ (text "data7x[127..0]" (rect 0 0 97 16)(font "Arial" (font_size 8)))
+ (text "data7x[127..0]" (rect 4 3992 87 4008)(font "Arial" (font_size 8)))
+ (line (pt 0 4008)(pt 104 4008)(line_width 3))
+ )
+ (port
+ (pt 0 4024)
+ (input)
+ (text "data6x[127..0]" (rect 0 0 97 16)(font "Arial" (font_size 8)))
+ (text "data6x[127..0]" (rect 4 4008 87 4024)(font "Arial" (font_size 8)))
+ (line (pt 0 4024)(pt 104 4024)(line_width 3))
+ )
+ (port
+ (pt 0 4040)
+ (input)
+ (text "data5x[127..0]" (rect 0 0 97 16)(font "Arial" (font_size 8)))
+ (text "data5x[127..0]" (rect 4 4024 87 4040)(font "Arial" (font_size 8)))
+ (line (pt 0 4040)(pt 104 4040)(line_width 3))
+ )
+ (port
+ (pt 0 4056)
+ (input)
+ (text "data4x[127..0]" (rect 0 0 97 16)(font "Arial" (font_size 8)))
+ (text "data4x[127..0]" (rect 4 4040 87 4056)(font "Arial" (font_size 8)))
+ (line (pt 0 4056)(pt 104 4056)(line_width 3))
+ )
+ (port
+ (pt 0 4072)
+ (input)
+ (text "data3x[127..0]" (rect 0 0 97 16)(font "Arial" (font_size 8)))
+ (text "data3x[127..0]" (rect 4 4056 87 4072)(font "Arial" (font_size 8)))
+ (line (pt 0 4072)(pt 104 4072)(line_width 3))
+ )
+ (port
+ (pt 0 4088)
+ (input)
+ (text "data2x[127..0]" (rect 0 0 97 16)(font "Arial" (font_size 8)))
+ (text "data2x[127..0]" (rect 4 4072 87 4088)(font "Arial" (font_size 8)))
+ (line (pt 0 4088)(pt 104 4088)(line_width 3))
+ )
+ (port
+ (pt 0 4104)
+ (input)
+ (text "data1x[127..0]" (rect 0 0 97 16)(font "Arial" (font_size 8)))
+ (text "data1x[127..0]" (rect 4 4088 87 4104)(font "Arial" (font_size 8)))
+ (line (pt 0 4104)(pt 104 4104)(line_width 3))
+ )
+ (port
+ (pt 0 4120)
+ (input)
+ (text "data0x[127..0]" (rect 0 0 97 16)(font "Arial" (font_size 8)))
+ (text "data0x[127..0]" (rect 4 4104 87 4120)(font "Arial" (font_size 8)))
+ (line (pt 0 4120)(pt 104 4120)(line_width 3))
+ )
+ (port
+ (pt 112 4144)
+ (input)
+ (text "sel[7..0]" (rect 0 0 55 16)(font "Arial" (font_size 8)))
+ (text "sel[7..0]" (rect 116 4128 163 4144)(font "Arial" (font_size 8)))
+ (line (pt 112 4144)(pt 112 4132)(line_width 3))
+ )
+ (port
+ (pt 200 2080)
+ (output)
+ (text "result[127..0]" (rect 0 0 89 16)(font "Arial" (font_size 8)))
+ (text "result[127..0]" (rect 121 2064 197 2080)(font "Arial" (font_size 8)))
+ (line (pt 200 2080)(pt 120 2080)(line_width 3))
+ )
+ (drawing
+ (line (pt 104 24)(pt 104 4136)(line_width 1))
+ (line (pt 120 32)(pt 120 4128)(line_width 1))
+ (line (pt 104 24)(pt 120 32)(line_width 1))
+ (line (pt 104 4136)(pt 120 4128)(line_width 1))
+ )
+)
diff --git a/FPGA_by_Fredi/lpm_mux0.cmp b/FPGA_by_Fredi/lpm_mux0.cmp
new file mode 100644
index 0000000..a2d329f
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_mux0.cmp
@@ -0,0 +1,278 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+component lpm_mux0
+ PORT
+ (
+ data0x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data100x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data101x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data102x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data103x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data104x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data105x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data106x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data107x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data108x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data109x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data10x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data110x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data111x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data112x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data113x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data114x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data115x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data116x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data117x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data118x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data119x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data11x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data120x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data121x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data122x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data123x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data124x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data125x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data126x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data127x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data128x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data129x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data12x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data130x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data131x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data132x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data133x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data134x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data135x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data136x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data137x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data138x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data139x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data13x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data140x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data141x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data142x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data143x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data144x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data145x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data146x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data147x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data148x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data149x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data14x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data150x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data151x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data152x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data153x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data154x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data155x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data156x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data157x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data158x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data159x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data15x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data160x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data161x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data162x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data163x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data164x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data165x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data166x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data167x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data168x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data169x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data16x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data170x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data171x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data172x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data173x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data174x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data175x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data176x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data177x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data178x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data179x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data17x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data180x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data181x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data182x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data183x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data184x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data185x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data186x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data187x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data188x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data189x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data18x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data190x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data191x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data192x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data193x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data194x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data195x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data196x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data197x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data198x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data199x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data19x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data1x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data200x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data201x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data202x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data203x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data204x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data205x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data206x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data207x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data208x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data209x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data20x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data210x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data211x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data212x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data213x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data214x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data215x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data216x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data217x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data218x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data219x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data21x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data220x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data221x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data222x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data223x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data224x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data225x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data226x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data227x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data228x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data229x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data22x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data230x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data231x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data232x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data233x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data234x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data235x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data236x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data237x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data238x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data239x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data23x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data240x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data241x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data242x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data243x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data244x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data245x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data246x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data247x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data248x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data249x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data24x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data250x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data251x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data252x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data253x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data254x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data255x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data25x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data26x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data27x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data28x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data29x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data2x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data30x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data31x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data32x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data33x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data34x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data35x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data36x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data37x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data38x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data39x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data3x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data40x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data41x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data42x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data43x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data44x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data45x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data46x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data47x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data48x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data49x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data4x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data50x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data51x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data52x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data53x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data54x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data55x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data56x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data57x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data58x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data59x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data5x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data60x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data61x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data62x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data63x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data64x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data65x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data66x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data67x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data68x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data69x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data6x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data70x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data71x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data72x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data73x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data74x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data75x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data76x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data77x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data78x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data79x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data7x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data80x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data81x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data82x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data83x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data84x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data85x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data86x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data87x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data88x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data89x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data8x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data90x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data91x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data92x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data93x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data94x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data95x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data96x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data97x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data98x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data99x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ data9x : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
+ sel : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
+ result : OUT STD_LOGIC_VECTOR (127 DOWNTO 0)
+ );
+end component;
diff --git a/FPGA_by_Fredi/lpm_mux0.inc b/FPGA_by_Fredi/lpm_mux0.inc
new file mode 100644
index 0000000..f79ebc5
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_mux0.inc
@@ -0,0 +1,279 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+FUNCTION lpm_mux0
+(
+ data0x[127..0],
+ data100x[127..0],
+ data101x[127..0],
+ data102x[127..0],
+ data103x[127..0],
+ data104x[127..0],
+ data105x[127..0],
+ data106x[127..0],
+ data107x[127..0],
+ data108x[127..0],
+ data109x[127..0],
+ data10x[127..0],
+ data110x[127..0],
+ data111x[127..0],
+ data112x[127..0],
+ data113x[127..0],
+ data114x[127..0],
+ data115x[127..0],
+ data116x[127..0],
+ data117x[127..0],
+ data118x[127..0],
+ data119x[127..0],
+ data11x[127..0],
+ data120x[127..0],
+ data121x[127..0],
+ data122x[127..0],
+ data123x[127..0],
+ data124x[127..0],
+ data125x[127..0],
+ data126x[127..0],
+ data127x[127..0],
+ data128x[127..0],
+ data129x[127..0],
+ data12x[127..0],
+ data130x[127..0],
+ data131x[127..0],
+ data132x[127..0],
+ data133x[127..0],
+ data134x[127..0],
+ data135x[127..0],
+ data136x[127..0],
+ data137x[127..0],
+ data138x[127..0],
+ data139x[127..0],
+ data13x[127..0],
+ data140x[127..0],
+ data141x[127..0],
+ data142x[127..0],
+ data143x[127..0],
+ data144x[127..0],
+ data145x[127..0],
+ data146x[127..0],
+ data147x[127..0],
+ data148x[127..0],
+ data149x[127..0],
+ data14x[127..0],
+ data150x[127..0],
+ data151x[127..0],
+ data152x[127..0],
+ data153x[127..0],
+ data154x[127..0],
+ data155x[127..0],
+ data156x[127..0],
+ data157x[127..0],
+ data158x[127..0],
+ data159x[127..0],
+ data15x[127..0],
+ data160x[127..0],
+ data161x[127..0],
+ data162x[127..0],
+ data163x[127..0],
+ data164x[127..0],
+ data165x[127..0],
+ data166x[127..0],
+ data167x[127..0],
+ data168x[127..0],
+ data169x[127..0],
+ data16x[127..0],
+ data170x[127..0],
+ data171x[127..0],
+ data172x[127..0],
+ data173x[127..0],
+ data174x[127..0],
+ data175x[127..0],
+ data176x[127..0],
+ data177x[127..0],
+ data178x[127..0],
+ data179x[127..0],
+ data17x[127..0],
+ data180x[127..0],
+ data181x[127..0],
+ data182x[127..0],
+ data183x[127..0],
+ data184x[127..0],
+ data185x[127..0],
+ data186x[127..0],
+ data187x[127..0],
+ data188x[127..0],
+ data189x[127..0],
+ data18x[127..0],
+ data190x[127..0],
+ data191x[127..0],
+ data192x[127..0],
+ data193x[127..0],
+ data194x[127..0],
+ data195x[127..0],
+ data196x[127..0],
+ data197x[127..0],
+ data198x[127..0],
+ data199x[127..0],
+ data19x[127..0],
+ data1x[127..0],
+ data200x[127..0],
+ data201x[127..0],
+ data202x[127..0],
+ data203x[127..0],
+ data204x[127..0],
+ data205x[127..0],
+ data206x[127..0],
+ data207x[127..0],
+ data208x[127..0],
+ data209x[127..0],
+ data20x[127..0],
+ data210x[127..0],
+ data211x[127..0],
+ data212x[127..0],
+ data213x[127..0],
+ data214x[127..0],
+ data215x[127..0],
+ data216x[127..0],
+ data217x[127..0],
+ data218x[127..0],
+ data219x[127..0],
+ data21x[127..0],
+ data220x[127..0],
+ data221x[127..0],
+ data222x[127..0],
+ data223x[127..0],
+ data224x[127..0],
+ data225x[127..0],
+ data226x[127..0],
+ data227x[127..0],
+ data228x[127..0],
+ data229x[127..0],
+ data22x[127..0],
+ data230x[127..0],
+ data231x[127..0],
+ data232x[127..0],
+ data233x[127..0],
+ data234x[127..0],
+ data235x[127..0],
+ data236x[127..0],
+ data237x[127..0],
+ data238x[127..0],
+ data239x[127..0],
+ data23x[127..0],
+ data240x[127..0],
+ data241x[127..0],
+ data242x[127..0],
+ data243x[127..0],
+ data244x[127..0],
+ data245x[127..0],
+ data246x[127..0],
+ data247x[127..0],
+ data248x[127..0],
+ data249x[127..0],
+ data24x[127..0],
+ data250x[127..0],
+ data251x[127..0],
+ data252x[127..0],
+ data253x[127..0],
+ data254x[127..0],
+ data255x[127..0],
+ data25x[127..0],
+ data26x[127..0],
+ data27x[127..0],
+ data28x[127..0],
+ data29x[127..0],
+ data2x[127..0],
+ data30x[127..0],
+ data31x[127..0],
+ data32x[127..0],
+ data33x[127..0],
+ data34x[127..0],
+ data35x[127..0],
+ data36x[127..0],
+ data37x[127..0],
+ data38x[127..0],
+ data39x[127..0],
+ data3x[127..0],
+ data40x[127..0],
+ data41x[127..0],
+ data42x[127..0],
+ data43x[127..0],
+ data44x[127..0],
+ data45x[127..0],
+ data46x[127..0],
+ data47x[127..0],
+ data48x[127..0],
+ data49x[127..0],
+ data4x[127..0],
+ data50x[127..0],
+ data51x[127..0],
+ data52x[127..0],
+ data53x[127..0],
+ data54x[127..0],
+ data55x[127..0],
+ data56x[127..0],
+ data57x[127..0],
+ data58x[127..0],
+ data59x[127..0],
+ data5x[127..0],
+ data60x[127..0],
+ data61x[127..0],
+ data62x[127..0],
+ data63x[127..0],
+ data64x[127..0],
+ data65x[127..0],
+ data66x[127..0],
+ data67x[127..0],
+ data68x[127..0],
+ data69x[127..0],
+ data6x[127..0],
+ data70x[127..0],
+ data71x[127..0],
+ data72x[127..0],
+ data73x[127..0],
+ data74x[127..0],
+ data75x[127..0],
+ data76x[127..0],
+ data77x[127..0],
+ data78x[127..0],
+ data79x[127..0],
+ data7x[127..0],
+ data80x[127..0],
+ data81x[127..0],
+ data82x[127..0],
+ data83x[127..0],
+ data84x[127..0],
+ data85x[127..0],
+ data86x[127..0],
+ data87x[127..0],
+ data88x[127..0],
+ data89x[127..0],
+ data8x[127..0],
+ data90x[127..0],
+ data91x[127..0],
+ data92x[127..0],
+ data93x[127..0],
+ data94x[127..0],
+ data95x[127..0],
+ data96x[127..0],
+ data97x[127..0],
+ data98x[127..0],
+ data99x[127..0],
+ data9x[127..0],
+ sel[7..0]
+)
+
+RETURNS (
+ result[127..0]
+);
diff --git a/FPGA_by_Fredi/lpm_mux0.qip b/FPGA_by_Fredi/lpm_mux0.qip
new file mode 100644
index 0000000..b46f6a0
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_mux0.qip
@@ -0,0 +1,6 @@
+set_global_assignment -name IP_TOOL_NAME "LPM_MUX"
+set_global_assignment -name IP_TOOL_VERSION "9.1"
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_mux0.tdf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_mux0.bsf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_mux0.inc"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_mux0.cmp"]
diff --git a/FPGA_by_Fredi/lpm_mux0.tdf b/FPGA_by_Fredi/lpm_mux0.tdf
new file mode 100644
index 0000000..9bd3bed
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_mux0.tdf
@@ -0,0 +1,1105 @@
+-- megafunction wizard: %LPM_MUX%
+-- GENERATION: STANDARD
+-- VERSION: WM1.0
+-- MODULE: lpm_mux
+
+-- ============================================================
+-- File Name: lpm_mux0.tdf
+-- Megafunction Name(s):
+-- lpm_mux
+--
+-- Simulation Library Files(s):
+-- lpm
+-- ============================================================
+-- ************************************************************
+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+--
+-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
+-- ************************************************************
+
+
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+INCLUDE "lpm_mux.inc";
+
+
+
+SUBDESIGN lpm_mux0
+(
+ data0x[127..0] : INPUT;
+ data100x[127..0] : INPUT;
+ data101x[127..0] : INPUT;
+ data102x[127..0] : INPUT;
+ data103x[127..0] : INPUT;
+ data104x[127..0] : INPUT;
+ data105x[127..0] : INPUT;
+ data106x[127..0] : INPUT;
+ data107x[127..0] : INPUT;
+ data108x[127..0] : INPUT;
+ data109x[127..0] : INPUT;
+ data10x[127..0] : INPUT;
+ data110x[127..0] : INPUT;
+ data111x[127..0] : INPUT;
+ data112x[127..0] : INPUT;
+ data113x[127..0] : INPUT;
+ data114x[127..0] : INPUT;
+ data115x[127..0] : INPUT;
+ data116x[127..0] : INPUT;
+ data117x[127..0] : INPUT;
+ data118x[127..0] : INPUT;
+ data119x[127..0] : INPUT;
+ data11x[127..0] : INPUT;
+ data120x[127..0] : INPUT;
+ data121x[127..0] : INPUT;
+ data122x[127..0] : INPUT;
+ data123x[127..0] : INPUT;
+ data124x[127..0] : INPUT;
+ data125x[127..0] : INPUT;
+ data126x[127..0] : INPUT;
+ data127x[127..0] : INPUT;
+ data128x[127..0] : INPUT;
+ data129x[127..0] : INPUT;
+ data12x[127..0] : INPUT;
+ data130x[127..0] : INPUT;
+ data131x[127..0] : INPUT;
+ data132x[127..0] : INPUT;
+ data133x[127..0] : INPUT;
+ data134x[127..0] : INPUT;
+ data135x[127..0] : INPUT;
+ data136x[127..0] : INPUT;
+ data137x[127..0] : INPUT;
+ data138x[127..0] : INPUT;
+ data139x[127..0] : INPUT;
+ data13x[127..0] : INPUT;
+ data140x[127..0] : INPUT;
+ data141x[127..0] : INPUT;
+ data142x[127..0] : INPUT;
+ data143x[127..0] : INPUT;
+ data144x[127..0] : INPUT;
+ data145x[127..0] : INPUT;
+ data146x[127..0] : INPUT;
+ data147x[127..0] : INPUT;
+ data148x[127..0] : INPUT;
+ data149x[127..0] : INPUT;
+ data14x[127..0] : INPUT;
+ data150x[127..0] : INPUT;
+ data151x[127..0] : INPUT;
+ data152x[127..0] : INPUT;
+ data153x[127..0] : INPUT;
+ data154x[127..0] : INPUT;
+ data155x[127..0] : INPUT;
+ data156x[127..0] : INPUT;
+ data157x[127..0] : INPUT;
+ data158x[127..0] : INPUT;
+ data159x[127..0] : INPUT;
+ data15x[127..0] : INPUT;
+ data160x[127..0] : INPUT;
+ data161x[127..0] : INPUT;
+ data162x[127..0] : INPUT;
+ data163x[127..0] : INPUT;
+ data164x[127..0] : INPUT;
+ data165x[127..0] : INPUT;
+ data166x[127..0] : INPUT;
+ data167x[127..0] : INPUT;
+ data168x[127..0] : INPUT;
+ data169x[127..0] : INPUT;
+ data16x[127..0] : INPUT;
+ data170x[127..0] : INPUT;
+ data171x[127..0] : INPUT;
+ data172x[127..0] : INPUT;
+ data173x[127..0] : INPUT;
+ data174x[127..0] : INPUT;
+ data175x[127..0] : INPUT;
+ data176x[127..0] : INPUT;
+ data177x[127..0] : INPUT;
+ data178x[127..0] : INPUT;
+ data179x[127..0] : INPUT;
+ data17x[127..0] : INPUT;
+ data180x[127..0] : INPUT;
+ data181x[127..0] : INPUT;
+ data182x[127..0] : INPUT;
+ data183x[127..0] : INPUT;
+ data184x[127..0] : INPUT;
+ data185x[127..0] : INPUT;
+ data186x[127..0] : INPUT;
+ data187x[127..0] : INPUT;
+ data188x[127..0] : INPUT;
+ data189x[127..0] : INPUT;
+ data18x[127..0] : INPUT;
+ data190x[127..0] : INPUT;
+ data191x[127..0] : INPUT;
+ data192x[127..0] : INPUT;
+ data193x[127..0] : INPUT;
+ data194x[127..0] : INPUT;
+ data195x[127..0] : INPUT;
+ data196x[127..0] : INPUT;
+ data197x[127..0] : INPUT;
+ data198x[127..0] : INPUT;
+ data199x[127..0] : INPUT;
+ data19x[127..0] : INPUT;
+ data1x[127..0] : INPUT;
+ data200x[127..0] : INPUT;
+ data201x[127..0] : INPUT;
+ data202x[127..0] : INPUT;
+ data203x[127..0] : INPUT;
+ data204x[127..0] : INPUT;
+ data205x[127..0] : INPUT;
+ data206x[127..0] : INPUT;
+ data207x[127..0] : INPUT;
+ data208x[127..0] : INPUT;
+ data209x[127..0] : INPUT;
+ data20x[127..0] : INPUT;
+ data210x[127..0] : INPUT;
+ data211x[127..0] : INPUT;
+ data212x[127..0] : INPUT;
+ data213x[127..0] : INPUT;
+ data214x[127..0] : INPUT;
+ data215x[127..0] : INPUT;
+ data216x[127..0] : INPUT;
+ data217x[127..0] : INPUT;
+ data218x[127..0] : INPUT;
+ data219x[127..0] : INPUT;
+ data21x[127..0] : INPUT;
+ data220x[127..0] : INPUT;
+ data221x[127..0] : INPUT;
+ data222x[127..0] : INPUT;
+ data223x[127..0] : INPUT;
+ data224x[127..0] : INPUT;
+ data225x[127..0] : INPUT;
+ data226x[127..0] : INPUT;
+ data227x[127..0] : INPUT;
+ data228x[127..0] : INPUT;
+ data229x[127..0] : INPUT;
+ data22x[127..0] : INPUT;
+ data230x[127..0] : INPUT;
+ data231x[127..0] : INPUT;
+ data232x[127..0] : INPUT;
+ data233x[127..0] : INPUT;
+ data234x[127..0] : INPUT;
+ data235x[127..0] : INPUT;
+ data236x[127..0] : INPUT;
+ data237x[127..0] : INPUT;
+ data238x[127..0] : INPUT;
+ data239x[127..0] : INPUT;
+ data23x[127..0] : INPUT;
+ data240x[127..0] : INPUT;
+ data241x[127..0] : INPUT;
+ data242x[127..0] : INPUT;
+ data243x[127..0] : INPUT;
+ data244x[127..0] : INPUT;
+ data245x[127..0] : INPUT;
+ data246x[127..0] : INPUT;
+ data247x[127..0] : INPUT;
+ data248x[127..0] : INPUT;
+ data249x[127..0] : INPUT;
+ data24x[127..0] : INPUT;
+ data250x[127..0] : INPUT;
+ data251x[127..0] : INPUT;
+ data252x[127..0] : INPUT;
+ data253x[127..0] : INPUT;
+ data254x[127..0] : INPUT;
+ data255x[127..0] : INPUT;
+ data25x[127..0] : INPUT;
+ data26x[127..0] : INPUT;
+ data27x[127..0] : INPUT;
+ data28x[127..0] : INPUT;
+ data29x[127..0] : INPUT;
+ data2x[127..0] : INPUT;
+ data30x[127..0] : INPUT;
+ data31x[127..0] : INPUT;
+ data32x[127..0] : INPUT;
+ data33x[127..0] : INPUT;
+ data34x[127..0] : INPUT;
+ data35x[127..0] : INPUT;
+ data36x[127..0] : INPUT;
+ data37x[127..0] : INPUT;
+ data38x[127..0] : INPUT;
+ data39x[127..0] : INPUT;
+ data3x[127..0] : INPUT;
+ data40x[127..0] : INPUT;
+ data41x[127..0] : INPUT;
+ data42x[127..0] : INPUT;
+ data43x[127..0] : INPUT;
+ data44x[127..0] : INPUT;
+ data45x[127..0] : INPUT;
+ data46x[127..0] : INPUT;
+ data47x[127..0] : INPUT;
+ data48x[127..0] : INPUT;
+ data49x[127..0] : INPUT;
+ data4x[127..0] : INPUT;
+ data50x[127..0] : INPUT;
+ data51x[127..0] : INPUT;
+ data52x[127..0] : INPUT;
+ data53x[127..0] : INPUT;
+ data54x[127..0] : INPUT;
+ data55x[127..0] : INPUT;
+ data56x[127..0] : INPUT;
+ data57x[127..0] : INPUT;
+ data58x[127..0] : INPUT;
+ data59x[127..0] : INPUT;
+ data5x[127..0] : INPUT;
+ data60x[127..0] : INPUT;
+ data61x[127..0] : INPUT;
+ data62x[127..0] : INPUT;
+ data63x[127..0] : INPUT;
+ data64x[127..0] : INPUT;
+ data65x[127..0] : INPUT;
+ data66x[127..0] : INPUT;
+ data67x[127..0] : INPUT;
+ data68x[127..0] : INPUT;
+ data69x[127..0] : INPUT;
+ data6x[127..0] : INPUT;
+ data70x[127..0] : INPUT;
+ data71x[127..0] : INPUT;
+ data72x[127..0] : INPUT;
+ data73x[127..0] : INPUT;
+ data74x[127..0] : INPUT;
+ data75x[127..0] : INPUT;
+ data76x[127..0] : INPUT;
+ data77x[127..0] : INPUT;
+ data78x[127..0] : INPUT;
+ data79x[127..0] : INPUT;
+ data7x[127..0] : INPUT;
+ data80x[127..0] : INPUT;
+ data81x[127..0] : INPUT;
+ data82x[127..0] : INPUT;
+ data83x[127..0] : INPUT;
+ data84x[127..0] : INPUT;
+ data85x[127..0] : INPUT;
+ data86x[127..0] : INPUT;
+ data87x[127..0] : INPUT;
+ data88x[127..0] : INPUT;
+ data89x[127..0] : INPUT;
+ data8x[127..0] : INPUT;
+ data90x[127..0] : INPUT;
+ data91x[127..0] : INPUT;
+ data92x[127..0] : INPUT;
+ data93x[127..0] : INPUT;
+ data94x[127..0] : INPUT;
+ data95x[127..0] : INPUT;
+ data96x[127..0] : INPUT;
+ data97x[127..0] : INPUT;
+ data98x[127..0] : INPUT;
+ data99x[127..0] : INPUT;
+ data9x[127..0] : INPUT;
+ sel[7..0] : INPUT;
+ result[127..0] : OUTPUT;
+)
+
+VARIABLE
+
+ lpm_mux_component : lpm_mux WITH (
+ LPM_SIZE = 256,
+ LPM_TYPE = "LPM_MUX",
+ LPM_WIDTH = 128,
+ LPM_WIDTHS = 8
+ );
+
+BEGIN
+
+ result[127..0] = lpm_mux_component.result[127..0];
+ lpm_mux_component.sel[7..0] = sel[7..0];
+ lpm_mux_component.data[255..255][127..0] = data255x[127..0];
+ lpm_mux_component.data[254..254][127..0] = data254x[127..0];
+ lpm_mux_component.data[253..253][127..0] = data253x[127..0];
+ lpm_mux_component.data[252..252][127..0] = data252x[127..0];
+ lpm_mux_component.data[251..251][127..0] = data251x[127..0];
+ lpm_mux_component.data[250..250][127..0] = data250x[127..0];
+ lpm_mux_component.data[249..249][127..0] = data249x[127..0];
+ lpm_mux_component.data[248..248][127..0] = data248x[127..0];
+ lpm_mux_component.data[247..247][127..0] = data247x[127..0];
+ lpm_mux_component.data[246..246][127..0] = data246x[127..0];
+ lpm_mux_component.data[245..245][127..0] = data245x[127..0];
+ lpm_mux_component.data[244..244][127..0] = data244x[127..0];
+ lpm_mux_component.data[243..243][127..0] = data243x[127..0];
+ lpm_mux_component.data[242..242][127..0] = data242x[127..0];
+ lpm_mux_component.data[241..241][127..0] = data241x[127..0];
+ lpm_mux_component.data[240..240][127..0] = data240x[127..0];
+ lpm_mux_component.data[239..239][127..0] = data239x[127..0];
+ lpm_mux_component.data[238..238][127..0] = data238x[127..0];
+ lpm_mux_component.data[237..237][127..0] = data237x[127..0];
+ lpm_mux_component.data[236..236][127..0] = data236x[127..0];
+ lpm_mux_component.data[235..235][127..0] = data235x[127..0];
+ lpm_mux_component.data[234..234][127..0] = data234x[127..0];
+ lpm_mux_component.data[233..233][127..0] = data233x[127..0];
+ lpm_mux_component.data[232..232][127..0] = data232x[127..0];
+ lpm_mux_component.data[231..231][127..0] = data231x[127..0];
+ lpm_mux_component.data[230..230][127..0] = data230x[127..0];
+ lpm_mux_component.data[229..229][127..0] = data229x[127..0];
+ lpm_mux_component.data[228..228][127..0] = data228x[127..0];
+ lpm_mux_component.data[227..227][127..0] = data227x[127..0];
+ lpm_mux_component.data[226..226][127..0] = data226x[127..0];
+ lpm_mux_component.data[225..225][127..0] = data225x[127..0];
+ lpm_mux_component.data[224..224][127..0] = data224x[127..0];
+ lpm_mux_component.data[223..223][127..0] = data223x[127..0];
+ lpm_mux_component.data[222..222][127..0] = data222x[127..0];
+ lpm_mux_component.data[221..221][127..0] = data221x[127..0];
+ lpm_mux_component.data[220..220][127..0] = data220x[127..0];
+ lpm_mux_component.data[219..219][127..0] = data219x[127..0];
+ lpm_mux_component.data[218..218][127..0] = data218x[127..0];
+ lpm_mux_component.data[217..217][127..0] = data217x[127..0];
+ lpm_mux_component.data[216..216][127..0] = data216x[127..0];
+ lpm_mux_component.data[215..215][127..0] = data215x[127..0];
+ lpm_mux_component.data[214..214][127..0] = data214x[127..0];
+ lpm_mux_component.data[213..213][127..0] = data213x[127..0];
+ lpm_mux_component.data[212..212][127..0] = data212x[127..0];
+ lpm_mux_component.data[211..211][127..0] = data211x[127..0];
+ lpm_mux_component.data[210..210][127..0] = data210x[127..0];
+ lpm_mux_component.data[209..209][127..0] = data209x[127..0];
+ lpm_mux_component.data[208..208][127..0] = data208x[127..0];
+ lpm_mux_component.data[207..207][127..0] = data207x[127..0];
+ lpm_mux_component.data[206..206][127..0] = data206x[127..0];
+ lpm_mux_component.data[205..205][127..0] = data205x[127..0];
+ lpm_mux_component.data[204..204][127..0] = data204x[127..0];
+ lpm_mux_component.data[203..203][127..0] = data203x[127..0];
+ lpm_mux_component.data[202..202][127..0] = data202x[127..0];
+ lpm_mux_component.data[201..201][127..0] = data201x[127..0];
+ lpm_mux_component.data[200..200][127..0] = data200x[127..0];
+ lpm_mux_component.data[199..199][127..0] = data199x[127..0];
+ lpm_mux_component.data[198..198][127..0] = data198x[127..0];
+ lpm_mux_component.data[197..197][127..0] = data197x[127..0];
+ lpm_mux_component.data[196..196][127..0] = data196x[127..0];
+ lpm_mux_component.data[195..195][127..0] = data195x[127..0];
+ lpm_mux_component.data[194..194][127..0] = data194x[127..0];
+ lpm_mux_component.data[193..193][127..0] = data193x[127..0];
+ lpm_mux_component.data[192..192][127..0] = data192x[127..0];
+ lpm_mux_component.data[191..191][127..0] = data191x[127..0];
+ lpm_mux_component.data[190..190][127..0] = data190x[127..0];
+ lpm_mux_component.data[189..189][127..0] = data189x[127..0];
+ lpm_mux_component.data[188..188][127..0] = data188x[127..0];
+ lpm_mux_component.data[187..187][127..0] = data187x[127..0];
+ lpm_mux_component.data[186..186][127..0] = data186x[127..0];
+ lpm_mux_component.data[185..185][127..0] = data185x[127..0];
+ lpm_mux_component.data[184..184][127..0] = data184x[127..0];
+ lpm_mux_component.data[183..183][127..0] = data183x[127..0];
+ lpm_mux_component.data[182..182][127..0] = data182x[127..0];
+ lpm_mux_component.data[181..181][127..0] = data181x[127..0];
+ lpm_mux_component.data[180..180][127..0] = data180x[127..0];
+ lpm_mux_component.data[179..179][127..0] = data179x[127..0];
+ lpm_mux_component.data[178..178][127..0] = data178x[127..0];
+ lpm_mux_component.data[177..177][127..0] = data177x[127..0];
+ lpm_mux_component.data[176..176][127..0] = data176x[127..0];
+ lpm_mux_component.data[175..175][127..0] = data175x[127..0];
+ lpm_mux_component.data[174..174][127..0] = data174x[127..0];
+ lpm_mux_component.data[173..173][127..0] = data173x[127..0];
+ lpm_mux_component.data[172..172][127..0] = data172x[127..0];
+ lpm_mux_component.data[171..171][127..0] = data171x[127..0];
+ lpm_mux_component.data[170..170][127..0] = data170x[127..0];
+ lpm_mux_component.data[169..169][127..0] = data169x[127..0];
+ lpm_mux_component.data[168..168][127..0] = data168x[127..0];
+ lpm_mux_component.data[167..167][127..0] = data167x[127..0];
+ lpm_mux_component.data[166..166][127..0] = data166x[127..0];
+ lpm_mux_component.data[165..165][127..0] = data165x[127..0];
+ lpm_mux_component.data[164..164][127..0] = data164x[127..0];
+ lpm_mux_component.data[163..163][127..0] = data163x[127..0];
+ lpm_mux_component.data[162..162][127..0] = data162x[127..0];
+ lpm_mux_component.data[161..161][127..0] = data161x[127..0];
+ lpm_mux_component.data[160..160][127..0] = data160x[127..0];
+ lpm_mux_component.data[159..159][127..0] = data159x[127..0];
+ lpm_mux_component.data[158..158][127..0] = data158x[127..0];
+ lpm_mux_component.data[157..157][127..0] = data157x[127..0];
+ lpm_mux_component.data[156..156][127..0] = data156x[127..0];
+ lpm_mux_component.data[155..155][127..0] = data155x[127..0];
+ lpm_mux_component.data[154..154][127..0] = data154x[127..0];
+ lpm_mux_component.data[153..153][127..0] = data153x[127..0];
+ lpm_mux_component.data[152..152][127..0] = data152x[127..0];
+ lpm_mux_component.data[151..151][127..0] = data151x[127..0];
+ lpm_mux_component.data[150..150][127..0] = data150x[127..0];
+ lpm_mux_component.data[149..149][127..0] = data149x[127..0];
+ lpm_mux_component.data[148..148][127..0] = data148x[127..0];
+ lpm_mux_component.data[147..147][127..0] = data147x[127..0];
+ lpm_mux_component.data[146..146][127..0] = data146x[127..0];
+ lpm_mux_component.data[145..145][127..0] = data145x[127..0];
+ lpm_mux_component.data[144..144][127..0] = data144x[127..0];
+ lpm_mux_component.data[143..143][127..0] = data143x[127..0];
+ lpm_mux_component.data[142..142][127..0] = data142x[127..0];
+ lpm_mux_component.data[141..141][127..0] = data141x[127..0];
+ lpm_mux_component.data[140..140][127..0] = data140x[127..0];
+ lpm_mux_component.data[139..139][127..0] = data139x[127..0];
+ lpm_mux_component.data[138..138][127..0] = data138x[127..0];
+ lpm_mux_component.data[137..137][127..0] = data137x[127..0];
+ lpm_mux_component.data[136..136][127..0] = data136x[127..0];
+ lpm_mux_component.data[135..135][127..0] = data135x[127..0];
+ lpm_mux_component.data[134..134][127..0] = data134x[127..0];
+ lpm_mux_component.data[133..133][127..0] = data133x[127..0];
+ lpm_mux_component.data[132..132][127..0] = data132x[127..0];
+ lpm_mux_component.data[131..131][127..0] = data131x[127..0];
+ lpm_mux_component.data[130..130][127..0] = data130x[127..0];
+ lpm_mux_component.data[129..129][127..0] = data129x[127..0];
+ lpm_mux_component.data[128..128][127..0] = data128x[127..0];
+ lpm_mux_component.data[127..127][127..0] = data127x[127..0];
+ lpm_mux_component.data[126..126][127..0] = data126x[127..0];
+ lpm_mux_component.data[125..125][127..0] = data125x[127..0];
+ lpm_mux_component.data[124..124][127..0] = data124x[127..0];
+ lpm_mux_component.data[123..123][127..0] = data123x[127..0];
+ lpm_mux_component.data[122..122][127..0] = data122x[127..0];
+ lpm_mux_component.data[121..121][127..0] = data121x[127..0];
+ lpm_mux_component.data[120..120][127..0] = data120x[127..0];
+ lpm_mux_component.data[119..119][127..0] = data119x[127..0];
+ lpm_mux_component.data[118..118][127..0] = data118x[127..0];
+ lpm_mux_component.data[117..117][127..0] = data117x[127..0];
+ lpm_mux_component.data[116..116][127..0] = data116x[127..0];
+ lpm_mux_component.data[115..115][127..0] = data115x[127..0];
+ lpm_mux_component.data[114..114][127..0] = data114x[127..0];
+ lpm_mux_component.data[113..113][127..0] = data113x[127..0];
+ lpm_mux_component.data[112..112][127..0] = data112x[127..0];
+ lpm_mux_component.data[111..111][127..0] = data111x[127..0];
+ lpm_mux_component.data[110..110][127..0] = data110x[127..0];
+ lpm_mux_component.data[109..109][127..0] = data109x[127..0];
+ lpm_mux_component.data[108..108][127..0] = data108x[127..0];
+ lpm_mux_component.data[107..107][127..0] = data107x[127..0];
+ lpm_mux_component.data[106..106][127..0] = data106x[127..0];
+ lpm_mux_component.data[105..105][127..0] = data105x[127..0];
+ lpm_mux_component.data[104..104][127..0] = data104x[127..0];
+ lpm_mux_component.data[103..103][127..0] = data103x[127..0];
+ lpm_mux_component.data[102..102][127..0] = data102x[127..0];
+ lpm_mux_component.data[101..101][127..0] = data101x[127..0];
+ lpm_mux_component.data[100..100][127..0] = data100x[127..0];
+ lpm_mux_component.data[99..99][127..0] = data99x[127..0];
+ lpm_mux_component.data[98..98][127..0] = data98x[127..0];
+ lpm_mux_component.data[97..97][127..0] = data97x[127..0];
+ lpm_mux_component.data[96..96][127..0] = data96x[127..0];
+ lpm_mux_component.data[95..95][127..0] = data95x[127..0];
+ lpm_mux_component.data[94..94][127..0] = data94x[127..0];
+ lpm_mux_component.data[93..93][127..0] = data93x[127..0];
+ lpm_mux_component.data[92..92][127..0] = data92x[127..0];
+ lpm_mux_component.data[91..91][127..0] = data91x[127..0];
+ lpm_mux_component.data[90..90][127..0] = data90x[127..0];
+ lpm_mux_component.data[89..89][127..0] = data89x[127..0];
+ lpm_mux_component.data[88..88][127..0] = data88x[127..0];
+ lpm_mux_component.data[87..87][127..0] = data87x[127..0];
+ lpm_mux_component.data[86..86][127..0] = data86x[127..0];
+ lpm_mux_component.data[85..85][127..0] = data85x[127..0];
+ lpm_mux_component.data[84..84][127..0] = data84x[127..0];
+ lpm_mux_component.data[83..83][127..0] = data83x[127..0];
+ lpm_mux_component.data[82..82][127..0] = data82x[127..0];
+ lpm_mux_component.data[81..81][127..0] = data81x[127..0];
+ lpm_mux_component.data[80..80][127..0] = data80x[127..0];
+ lpm_mux_component.data[79..79][127..0] = data79x[127..0];
+ lpm_mux_component.data[78..78][127..0] = data78x[127..0];
+ lpm_mux_component.data[77..77][127..0] = data77x[127..0];
+ lpm_mux_component.data[76..76][127..0] = data76x[127..0];
+ lpm_mux_component.data[75..75][127..0] = data75x[127..0];
+ lpm_mux_component.data[74..74][127..0] = data74x[127..0];
+ lpm_mux_component.data[73..73][127..0] = data73x[127..0];
+ lpm_mux_component.data[72..72][127..0] = data72x[127..0];
+ lpm_mux_component.data[71..71][127..0] = data71x[127..0];
+ lpm_mux_component.data[70..70][127..0] = data70x[127..0];
+ lpm_mux_component.data[69..69][127..0] = data69x[127..0];
+ lpm_mux_component.data[68..68][127..0] = data68x[127..0];
+ lpm_mux_component.data[67..67][127..0] = data67x[127..0];
+ lpm_mux_component.data[66..66][127..0] = data66x[127..0];
+ lpm_mux_component.data[65..65][127..0] = data65x[127..0];
+ lpm_mux_component.data[64..64][127..0] = data64x[127..0];
+ lpm_mux_component.data[63..63][127..0] = data63x[127..0];
+ lpm_mux_component.data[62..62][127..0] = data62x[127..0];
+ lpm_mux_component.data[61..61][127..0] = data61x[127..0];
+ lpm_mux_component.data[60..60][127..0] = data60x[127..0];
+ lpm_mux_component.data[59..59][127..0] = data59x[127..0];
+ lpm_mux_component.data[58..58][127..0] = data58x[127..0];
+ lpm_mux_component.data[57..57][127..0] = data57x[127..0];
+ lpm_mux_component.data[56..56][127..0] = data56x[127..0];
+ lpm_mux_component.data[55..55][127..0] = data55x[127..0];
+ lpm_mux_component.data[54..54][127..0] = data54x[127..0];
+ lpm_mux_component.data[53..53][127..0] = data53x[127..0];
+ lpm_mux_component.data[52..52][127..0] = data52x[127..0];
+ lpm_mux_component.data[51..51][127..0] = data51x[127..0];
+ lpm_mux_component.data[50..50][127..0] = data50x[127..0];
+ lpm_mux_component.data[49..49][127..0] = data49x[127..0];
+ lpm_mux_component.data[48..48][127..0] = data48x[127..0];
+ lpm_mux_component.data[47..47][127..0] = data47x[127..0];
+ lpm_mux_component.data[46..46][127..0] = data46x[127..0];
+ lpm_mux_component.data[45..45][127..0] = data45x[127..0];
+ lpm_mux_component.data[44..44][127..0] = data44x[127..0];
+ lpm_mux_component.data[43..43][127..0] = data43x[127..0];
+ lpm_mux_component.data[42..42][127..0] = data42x[127..0];
+ lpm_mux_component.data[41..41][127..0] = data41x[127..0];
+ lpm_mux_component.data[40..40][127..0] = data40x[127..0];
+ lpm_mux_component.data[39..39][127..0] = data39x[127..0];
+ lpm_mux_component.data[38..38][127..0] = data38x[127..0];
+ lpm_mux_component.data[37..37][127..0] = data37x[127..0];
+ lpm_mux_component.data[36..36][127..0] = data36x[127..0];
+ lpm_mux_component.data[35..35][127..0] = data35x[127..0];
+ lpm_mux_component.data[34..34][127..0] = data34x[127..0];
+ lpm_mux_component.data[33..33][127..0] = data33x[127..0];
+ lpm_mux_component.data[32..32][127..0] = data32x[127..0];
+ lpm_mux_component.data[31..31][127..0] = data31x[127..0];
+ lpm_mux_component.data[30..30][127..0] = data30x[127..0];
+ lpm_mux_component.data[29..29][127..0] = data29x[127..0];
+ lpm_mux_component.data[28..28][127..0] = data28x[127..0];
+ lpm_mux_component.data[27..27][127..0] = data27x[127..0];
+ lpm_mux_component.data[26..26][127..0] = data26x[127..0];
+ lpm_mux_component.data[25..25][127..0] = data25x[127..0];
+ lpm_mux_component.data[24..24][127..0] = data24x[127..0];
+ lpm_mux_component.data[23..23][127..0] = data23x[127..0];
+ lpm_mux_component.data[22..22][127..0] = data22x[127..0];
+ lpm_mux_component.data[21..21][127..0] = data21x[127..0];
+ lpm_mux_component.data[20..20][127..0] = data20x[127..0];
+ lpm_mux_component.data[19..19][127..0] = data19x[127..0];
+ lpm_mux_component.data[18..18][127..0] = data18x[127..0];
+ lpm_mux_component.data[17..17][127..0] = data17x[127..0];
+ lpm_mux_component.data[16..16][127..0] = data16x[127..0];
+ lpm_mux_component.data[15..15][127..0] = data15x[127..0];
+ lpm_mux_component.data[14..14][127..0] = data14x[127..0];
+ lpm_mux_component.data[13..13][127..0] = data13x[127..0];
+ lpm_mux_component.data[12..12][127..0] = data12x[127..0];
+ lpm_mux_component.data[11..11][127..0] = data11x[127..0];
+ lpm_mux_component.data[10..10][127..0] = data10x[127..0];
+ lpm_mux_component.data[9..9][127..0] = data9x[127..0];
+ lpm_mux_component.data[8..8][127..0] = data8x[127..0];
+ lpm_mux_component.data[7..7][127..0] = data7x[127..0];
+ lpm_mux_component.data[6..6][127..0] = data6x[127..0];
+ lpm_mux_component.data[5..5][127..0] = data5x[127..0];
+ lpm_mux_component.data[4..4][127..0] = data4x[127..0];
+ lpm_mux_component.data[3..3][127..0] = data3x[127..0];
+ lpm_mux_component.data[2..2][127..0] = data2x[127..0];
+ lpm_mux_component.data[1..1][127..0] = data1x[127..0];
+ lpm_mux_component.data[0..0][127..0] = data0x[127..0];
+END;
+
+
+
+-- ============================================================
+-- CNX file retrieval info
+-- ============================================================
+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+-- Retrieval info: CONSTANT: LPM_SIZE NUMERIC "256"
+-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_MUX"
+-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "128"
+-- Retrieval info: CONSTANT: LPM_WIDTHS NUMERIC "8"
+-- Retrieval info: USED_PORT: data0x 0 0 128 0 INPUT NODEFVAL data0x[127..0]
+-- Retrieval info: USED_PORT: data100x 0 0 128 0 INPUT NODEFVAL data100x[127..0]
+-- Retrieval info: USED_PORT: data101x 0 0 128 0 INPUT NODEFVAL data101x[127..0]
+-- Retrieval info: USED_PORT: data102x 0 0 128 0 INPUT NODEFVAL data102x[127..0]
+-- Retrieval info: USED_PORT: data103x 0 0 128 0 INPUT NODEFVAL data103x[127..0]
+-- Retrieval info: USED_PORT: data104x 0 0 128 0 INPUT NODEFVAL data104x[127..0]
+-- Retrieval info: USED_PORT: data105x 0 0 128 0 INPUT NODEFVAL data105x[127..0]
+-- Retrieval info: USED_PORT: data106x 0 0 128 0 INPUT NODEFVAL data106x[127..0]
+-- Retrieval info: USED_PORT: data107x 0 0 128 0 INPUT NODEFVAL data107x[127..0]
+-- Retrieval info: USED_PORT: data108x 0 0 128 0 INPUT NODEFVAL data108x[127..0]
+-- Retrieval info: USED_PORT: data109x 0 0 128 0 INPUT NODEFVAL data109x[127..0]
+-- Retrieval info: USED_PORT: data10x 0 0 128 0 INPUT NODEFVAL data10x[127..0]
+-- Retrieval info: USED_PORT: data110x 0 0 128 0 INPUT NODEFVAL data110x[127..0]
+-- Retrieval info: USED_PORT: data111x 0 0 128 0 INPUT NODEFVAL data111x[127..0]
+-- Retrieval info: USED_PORT: data112x 0 0 128 0 INPUT NODEFVAL data112x[127..0]
+-- Retrieval info: USED_PORT: data113x 0 0 128 0 INPUT NODEFVAL data113x[127..0]
+-- Retrieval info: USED_PORT: data114x 0 0 128 0 INPUT NODEFVAL data114x[127..0]
+-- Retrieval info: USED_PORT: data115x 0 0 128 0 INPUT NODEFVAL data115x[127..0]
+-- Retrieval info: USED_PORT: data116x 0 0 128 0 INPUT NODEFVAL data116x[127..0]
+-- Retrieval info: USED_PORT: data117x 0 0 128 0 INPUT NODEFVAL data117x[127..0]
+-- Retrieval info: USED_PORT: data118x 0 0 128 0 INPUT NODEFVAL data118x[127..0]
+-- Retrieval info: USED_PORT: data119x 0 0 128 0 INPUT NODEFVAL data119x[127..0]
+-- Retrieval info: USED_PORT: data11x 0 0 128 0 INPUT NODEFVAL data11x[127..0]
+-- Retrieval info: USED_PORT: data120x 0 0 128 0 INPUT NODEFVAL data120x[127..0]
+-- Retrieval info: USED_PORT: data121x 0 0 128 0 INPUT NODEFVAL data121x[127..0]
+-- Retrieval info: USED_PORT: data122x 0 0 128 0 INPUT NODEFVAL data122x[127..0]
+-- Retrieval info: USED_PORT: data123x 0 0 128 0 INPUT NODEFVAL data123x[127..0]
+-- Retrieval info: USED_PORT: data124x 0 0 128 0 INPUT NODEFVAL data124x[127..0]
+-- Retrieval info: USED_PORT: data125x 0 0 128 0 INPUT NODEFVAL data125x[127..0]
+-- Retrieval info: USED_PORT: data126x 0 0 128 0 INPUT NODEFVAL data126x[127..0]
+-- Retrieval info: USED_PORT: data127x 0 0 128 0 INPUT NODEFVAL data127x[127..0]
+-- Retrieval info: USED_PORT: data128x 0 0 128 0 INPUT NODEFVAL data128x[127..0]
+-- Retrieval info: USED_PORT: data129x 0 0 128 0 INPUT NODEFVAL data129x[127..0]
+-- Retrieval info: USED_PORT: data12x 0 0 128 0 INPUT NODEFVAL data12x[127..0]
+-- Retrieval info: USED_PORT: data130x 0 0 128 0 INPUT NODEFVAL data130x[127..0]
+-- Retrieval info: USED_PORT: data131x 0 0 128 0 INPUT NODEFVAL data131x[127..0]
+-- Retrieval info: USED_PORT: data132x 0 0 128 0 INPUT NODEFVAL data132x[127..0]
+-- Retrieval info: USED_PORT: data133x 0 0 128 0 INPUT NODEFVAL data133x[127..0]
+-- Retrieval info: USED_PORT: data134x 0 0 128 0 INPUT NODEFVAL data134x[127..0]
+-- Retrieval info: USED_PORT: data135x 0 0 128 0 INPUT NODEFVAL data135x[127..0]
+-- Retrieval info: USED_PORT: data136x 0 0 128 0 INPUT NODEFVAL data136x[127..0]
+-- Retrieval info: USED_PORT: data137x 0 0 128 0 INPUT NODEFVAL data137x[127..0]
+-- Retrieval info: USED_PORT: data138x 0 0 128 0 INPUT NODEFVAL data138x[127..0]
+-- Retrieval info: USED_PORT: data139x 0 0 128 0 INPUT NODEFVAL data139x[127..0]
+-- Retrieval info: USED_PORT: data13x 0 0 128 0 INPUT NODEFVAL data13x[127..0]
+-- Retrieval info: USED_PORT: data140x 0 0 128 0 INPUT NODEFVAL data140x[127..0]
+-- Retrieval info: USED_PORT: data141x 0 0 128 0 INPUT NODEFVAL data141x[127..0]
+-- Retrieval info: USED_PORT: data142x 0 0 128 0 INPUT NODEFVAL data142x[127..0]
+-- Retrieval info: USED_PORT: data143x 0 0 128 0 INPUT NODEFVAL data143x[127..0]
+-- Retrieval info: USED_PORT: data144x 0 0 128 0 INPUT NODEFVAL data144x[127..0]
+-- Retrieval info: USED_PORT: data145x 0 0 128 0 INPUT NODEFVAL data145x[127..0]
+-- Retrieval info: USED_PORT: data146x 0 0 128 0 INPUT NODEFVAL data146x[127..0]
+-- Retrieval info: USED_PORT: data147x 0 0 128 0 INPUT NODEFVAL data147x[127..0]
+-- Retrieval info: USED_PORT: data148x 0 0 128 0 INPUT NODEFVAL data148x[127..0]
+-- Retrieval info: USED_PORT: data149x 0 0 128 0 INPUT NODEFVAL data149x[127..0]
+-- Retrieval info: USED_PORT: data14x 0 0 128 0 INPUT NODEFVAL data14x[127..0]
+-- Retrieval info: USED_PORT: data150x 0 0 128 0 INPUT NODEFVAL data150x[127..0]
+-- Retrieval info: USED_PORT: data151x 0 0 128 0 INPUT NODEFVAL data151x[127..0]
+-- Retrieval info: USED_PORT: data152x 0 0 128 0 INPUT NODEFVAL data152x[127..0]
+-- Retrieval info: USED_PORT: data153x 0 0 128 0 INPUT NODEFVAL data153x[127..0]
+-- Retrieval info: USED_PORT: data154x 0 0 128 0 INPUT NODEFVAL data154x[127..0]
+-- Retrieval info: USED_PORT: data155x 0 0 128 0 INPUT NODEFVAL data155x[127..0]
+-- Retrieval info: USED_PORT: data156x 0 0 128 0 INPUT NODEFVAL data156x[127..0]
+-- Retrieval info: USED_PORT: data157x 0 0 128 0 INPUT NODEFVAL data157x[127..0]
+-- Retrieval info: USED_PORT: data158x 0 0 128 0 INPUT NODEFVAL data158x[127..0]
+-- Retrieval info: USED_PORT: data159x 0 0 128 0 INPUT NODEFVAL data159x[127..0]
+-- Retrieval info: USED_PORT: data15x 0 0 128 0 INPUT NODEFVAL data15x[127..0]
+-- Retrieval info: USED_PORT: data160x 0 0 128 0 INPUT NODEFVAL data160x[127..0]
+-- Retrieval info: USED_PORT: data161x 0 0 128 0 INPUT NODEFVAL data161x[127..0]
+-- Retrieval info: USED_PORT: data162x 0 0 128 0 INPUT NODEFVAL data162x[127..0]
+-- Retrieval info: USED_PORT: data163x 0 0 128 0 INPUT NODEFVAL data163x[127..0]
+-- Retrieval info: USED_PORT: data164x 0 0 128 0 INPUT NODEFVAL data164x[127..0]
+-- Retrieval info: USED_PORT: data165x 0 0 128 0 INPUT NODEFVAL data165x[127..0]
+-- Retrieval info: USED_PORT: data166x 0 0 128 0 INPUT NODEFVAL data166x[127..0]
+-- Retrieval info: USED_PORT: data167x 0 0 128 0 INPUT NODEFVAL data167x[127..0]
+-- Retrieval info: USED_PORT: data168x 0 0 128 0 INPUT NODEFVAL data168x[127..0]
+-- Retrieval info: USED_PORT: data169x 0 0 128 0 INPUT NODEFVAL data169x[127..0]
+-- Retrieval info: USED_PORT: data16x 0 0 128 0 INPUT NODEFVAL data16x[127..0]
+-- Retrieval info: USED_PORT: data170x 0 0 128 0 INPUT NODEFVAL data170x[127..0]
+-- Retrieval info: USED_PORT: data171x 0 0 128 0 INPUT NODEFVAL data171x[127..0]
+-- Retrieval info: USED_PORT: data172x 0 0 128 0 INPUT NODEFVAL data172x[127..0]
+-- Retrieval info: USED_PORT: data173x 0 0 128 0 INPUT NODEFVAL data173x[127..0]
+-- Retrieval info: USED_PORT: data174x 0 0 128 0 INPUT NODEFVAL data174x[127..0]
+-- Retrieval info: USED_PORT: data175x 0 0 128 0 INPUT NODEFVAL data175x[127..0]
+-- Retrieval info: USED_PORT: data176x 0 0 128 0 INPUT NODEFVAL data176x[127..0]
+-- Retrieval info: USED_PORT: data177x 0 0 128 0 INPUT NODEFVAL data177x[127..0]
+-- Retrieval info: USED_PORT: data178x 0 0 128 0 INPUT NODEFVAL data178x[127..0]
+-- Retrieval info: USED_PORT: data179x 0 0 128 0 INPUT NODEFVAL data179x[127..0]
+-- Retrieval info: USED_PORT: data17x 0 0 128 0 INPUT NODEFVAL data17x[127..0]
+-- Retrieval info: USED_PORT: data180x 0 0 128 0 INPUT NODEFVAL data180x[127..0]
+-- Retrieval info: USED_PORT: data181x 0 0 128 0 INPUT NODEFVAL data181x[127..0]
+-- Retrieval info: USED_PORT: data182x 0 0 128 0 INPUT NODEFVAL data182x[127..0]
+-- Retrieval info: USED_PORT: data183x 0 0 128 0 INPUT NODEFVAL data183x[127..0]
+-- Retrieval info: USED_PORT: data184x 0 0 128 0 INPUT NODEFVAL data184x[127..0]
+-- Retrieval info: USED_PORT: data185x 0 0 128 0 INPUT NODEFVAL data185x[127..0]
+-- Retrieval info: USED_PORT: data186x 0 0 128 0 INPUT NODEFVAL data186x[127..0]
+-- Retrieval info: USED_PORT: data187x 0 0 128 0 INPUT NODEFVAL data187x[127..0]
+-- Retrieval info: USED_PORT: data188x 0 0 128 0 INPUT NODEFVAL data188x[127..0]
+-- Retrieval info: USED_PORT: data189x 0 0 128 0 INPUT NODEFVAL data189x[127..0]
+-- Retrieval info: USED_PORT: data18x 0 0 128 0 INPUT NODEFVAL data18x[127..0]
+-- Retrieval info: USED_PORT: data190x 0 0 128 0 INPUT NODEFVAL data190x[127..0]
+-- Retrieval info: USED_PORT: data191x 0 0 128 0 INPUT NODEFVAL data191x[127..0]
+-- Retrieval info: USED_PORT: data192x 0 0 128 0 INPUT NODEFVAL data192x[127..0]
+-- Retrieval info: USED_PORT: data193x 0 0 128 0 INPUT NODEFVAL data193x[127..0]
+-- Retrieval info: USED_PORT: data194x 0 0 128 0 INPUT NODEFVAL data194x[127..0]
+-- Retrieval info: USED_PORT: data195x 0 0 128 0 INPUT NODEFVAL data195x[127..0]
+-- Retrieval info: USED_PORT: data196x 0 0 128 0 INPUT NODEFVAL data196x[127..0]
+-- Retrieval info: USED_PORT: data197x 0 0 128 0 INPUT NODEFVAL data197x[127..0]
+-- Retrieval info: USED_PORT: data198x 0 0 128 0 INPUT NODEFVAL data198x[127..0]
+-- Retrieval info: USED_PORT: data199x 0 0 128 0 INPUT NODEFVAL data199x[127..0]
+-- Retrieval info: USED_PORT: data19x 0 0 128 0 INPUT NODEFVAL data19x[127..0]
+-- Retrieval info: USED_PORT: data1x 0 0 128 0 INPUT NODEFVAL data1x[127..0]
+-- Retrieval info: USED_PORT: data200x 0 0 128 0 INPUT NODEFVAL data200x[127..0]
+-- Retrieval info: USED_PORT: data201x 0 0 128 0 INPUT NODEFVAL data201x[127..0]
+-- Retrieval info: USED_PORT: data202x 0 0 128 0 INPUT NODEFVAL data202x[127..0]
+-- Retrieval info: USED_PORT: data203x 0 0 128 0 INPUT NODEFVAL data203x[127..0]
+-- Retrieval info: USED_PORT: data204x 0 0 128 0 INPUT NODEFVAL data204x[127..0]
+-- Retrieval info: USED_PORT: data205x 0 0 128 0 INPUT NODEFVAL data205x[127..0]
+-- Retrieval info: USED_PORT: data206x 0 0 128 0 INPUT NODEFVAL data206x[127..0]
+-- Retrieval info: USED_PORT: data207x 0 0 128 0 INPUT NODEFVAL data207x[127..0]
+-- Retrieval info: USED_PORT: data208x 0 0 128 0 INPUT NODEFVAL data208x[127..0]
+-- Retrieval info: USED_PORT: data209x 0 0 128 0 INPUT NODEFVAL data209x[127..0]
+-- Retrieval info: USED_PORT: data20x 0 0 128 0 INPUT NODEFVAL data20x[127..0]
+-- Retrieval info: USED_PORT: data210x 0 0 128 0 INPUT NODEFVAL data210x[127..0]
+-- Retrieval info: USED_PORT: data211x 0 0 128 0 INPUT NODEFVAL data211x[127..0]
+-- Retrieval info: USED_PORT: data212x 0 0 128 0 INPUT NODEFVAL data212x[127..0]
+-- Retrieval info: USED_PORT: data213x 0 0 128 0 INPUT NODEFVAL data213x[127..0]
+-- Retrieval info: USED_PORT: data214x 0 0 128 0 INPUT NODEFVAL data214x[127..0]
+-- Retrieval info: USED_PORT: data215x 0 0 128 0 INPUT NODEFVAL data215x[127..0]
+-- Retrieval info: USED_PORT: data216x 0 0 128 0 INPUT NODEFVAL data216x[127..0]
+-- Retrieval info: USED_PORT: data217x 0 0 128 0 INPUT NODEFVAL data217x[127..0]
+-- Retrieval info: USED_PORT: data218x 0 0 128 0 INPUT NODEFVAL data218x[127..0]
+-- Retrieval info: USED_PORT: data219x 0 0 128 0 INPUT NODEFVAL data219x[127..0]
+-- Retrieval info: USED_PORT: data21x 0 0 128 0 INPUT NODEFVAL data21x[127..0]
+-- Retrieval info: USED_PORT: data220x 0 0 128 0 INPUT NODEFVAL data220x[127..0]
+-- Retrieval info: USED_PORT: data221x 0 0 128 0 INPUT NODEFVAL data221x[127..0]
+-- Retrieval info: USED_PORT: data222x 0 0 128 0 INPUT NODEFVAL data222x[127..0]
+-- Retrieval info: USED_PORT: data223x 0 0 128 0 INPUT NODEFVAL data223x[127..0]
+-- Retrieval info: USED_PORT: data224x 0 0 128 0 INPUT NODEFVAL data224x[127..0]
+-- Retrieval info: USED_PORT: data225x 0 0 128 0 INPUT NODEFVAL data225x[127..0]
+-- Retrieval info: USED_PORT: data226x 0 0 128 0 INPUT NODEFVAL data226x[127..0]
+-- Retrieval info: USED_PORT: data227x 0 0 128 0 INPUT NODEFVAL data227x[127..0]
+-- Retrieval info: USED_PORT: data228x 0 0 128 0 INPUT NODEFVAL data228x[127..0]
+-- Retrieval info: USED_PORT: data229x 0 0 128 0 INPUT NODEFVAL data229x[127..0]
+-- Retrieval info: USED_PORT: data22x 0 0 128 0 INPUT NODEFVAL data22x[127..0]
+-- Retrieval info: USED_PORT: data230x 0 0 128 0 INPUT NODEFVAL data230x[127..0]
+-- Retrieval info: USED_PORT: data231x 0 0 128 0 INPUT NODEFVAL data231x[127..0]
+-- Retrieval info: USED_PORT: data232x 0 0 128 0 INPUT NODEFVAL data232x[127..0]
+-- Retrieval info: USED_PORT: data233x 0 0 128 0 INPUT NODEFVAL data233x[127..0]
+-- Retrieval info: USED_PORT: data234x 0 0 128 0 INPUT NODEFVAL data234x[127..0]
+-- Retrieval info: USED_PORT: data235x 0 0 128 0 INPUT NODEFVAL data235x[127..0]
+-- Retrieval info: USED_PORT: data236x 0 0 128 0 INPUT NODEFVAL data236x[127..0]
+-- Retrieval info: USED_PORT: data237x 0 0 128 0 INPUT NODEFVAL data237x[127..0]
+-- Retrieval info: USED_PORT: data238x 0 0 128 0 INPUT NODEFVAL data238x[127..0]
+-- Retrieval info: USED_PORT: data239x 0 0 128 0 INPUT NODEFVAL data239x[127..0]
+-- Retrieval info: USED_PORT: data23x 0 0 128 0 INPUT NODEFVAL data23x[127..0]
+-- Retrieval info: USED_PORT: data240x 0 0 128 0 INPUT NODEFVAL data240x[127..0]
+-- Retrieval info: USED_PORT: data241x 0 0 128 0 INPUT NODEFVAL data241x[127..0]
+-- Retrieval info: USED_PORT: data242x 0 0 128 0 INPUT NODEFVAL data242x[127..0]
+-- Retrieval info: USED_PORT: data243x 0 0 128 0 INPUT NODEFVAL data243x[127..0]
+-- Retrieval info: USED_PORT: data244x 0 0 128 0 INPUT NODEFVAL data244x[127..0]
+-- Retrieval info: USED_PORT: data245x 0 0 128 0 INPUT NODEFVAL data245x[127..0]
+-- Retrieval info: USED_PORT: data246x 0 0 128 0 INPUT NODEFVAL data246x[127..0]
+-- Retrieval info: USED_PORT: data247x 0 0 128 0 INPUT NODEFVAL data247x[127..0]
+-- Retrieval info: USED_PORT: data248x 0 0 128 0 INPUT NODEFVAL data248x[127..0]
+-- Retrieval info: USED_PORT: data249x 0 0 128 0 INPUT NODEFVAL data249x[127..0]
+-- Retrieval info: USED_PORT: data24x 0 0 128 0 INPUT NODEFVAL data24x[127..0]
+-- Retrieval info: USED_PORT: data250x 0 0 128 0 INPUT NODEFVAL data250x[127..0]
+-- Retrieval info: USED_PORT: data251x 0 0 128 0 INPUT NODEFVAL data251x[127..0]
+-- Retrieval info: USED_PORT: data252x 0 0 128 0 INPUT NODEFVAL data252x[127..0]
+-- Retrieval info: USED_PORT: data253x 0 0 128 0 INPUT NODEFVAL data253x[127..0]
+-- Retrieval info: USED_PORT: data254x 0 0 128 0 INPUT NODEFVAL data254x[127..0]
+-- Retrieval info: USED_PORT: data255x 0 0 128 0 INPUT NODEFVAL data255x[127..0]
+-- Retrieval info: USED_PORT: data25x 0 0 128 0 INPUT NODEFVAL data25x[127..0]
+-- Retrieval info: USED_PORT: data26x 0 0 128 0 INPUT NODEFVAL data26x[127..0]
+-- Retrieval info: USED_PORT: data27x 0 0 128 0 INPUT NODEFVAL data27x[127..0]
+-- Retrieval info: USED_PORT: data28x 0 0 128 0 INPUT NODEFVAL data28x[127..0]
+-- Retrieval info: USED_PORT: data29x 0 0 128 0 INPUT NODEFVAL data29x[127..0]
+-- Retrieval info: USED_PORT: data2x 0 0 128 0 INPUT NODEFVAL data2x[127..0]
+-- Retrieval info: USED_PORT: data30x 0 0 128 0 INPUT NODEFVAL data30x[127..0]
+-- Retrieval info: USED_PORT: data31x 0 0 128 0 INPUT NODEFVAL data31x[127..0]
+-- Retrieval info: USED_PORT: data32x 0 0 128 0 INPUT NODEFVAL data32x[127..0]
+-- Retrieval info: USED_PORT: data33x 0 0 128 0 INPUT NODEFVAL data33x[127..0]
+-- Retrieval info: USED_PORT: data34x 0 0 128 0 INPUT NODEFVAL data34x[127..0]
+-- Retrieval info: USED_PORT: data35x 0 0 128 0 INPUT NODEFVAL data35x[127..0]
+-- Retrieval info: USED_PORT: data36x 0 0 128 0 INPUT NODEFVAL data36x[127..0]
+-- Retrieval info: USED_PORT: data37x 0 0 128 0 INPUT NODEFVAL data37x[127..0]
+-- Retrieval info: USED_PORT: data38x 0 0 128 0 INPUT NODEFVAL data38x[127..0]
+-- Retrieval info: USED_PORT: data39x 0 0 128 0 INPUT NODEFVAL data39x[127..0]
+-- Retrieval info: USED_PORT: data3x 0 0 128 0 INPUT NODEFVAL data3x[127..0]
+-- Retrieval info: USED_PORT: data40x 0 0 128 0 INPUT NODEFVAL data40x[127..0]
+-- Retrieval info: USED_PORT: data41x 0 0 128 0 INPUT NODEFVAL data41x[127..0]
+-- Retrieval info: USED_PORT: data42x 0 0 128 0 INPUT NODEFVAL data42x[127..0]
+-- Retrieval info: USED_PORT: data43x 0 0 128 0 INPUT NODEFVAL data43x[127..0]
+-- Retrieval info: USED_PORT: data44x 0 0 128 0 INPUT NODEFVAL data44x[127..0]
+-- Retrieval info: USED_PORT: data45x 0 0 128 0 INPUT NODEFVAL data45x[127..0]
+-- Retrieval info: USED_PORT: data46x 0 0 128 0 INPUT NODEFVAL data46x[127..0]
+-- Retrieval info: USED_PORT: data47x 0 0 128 0 INPUT NODEFVAL data47x[127..0]
+-- Retrieval info: USED_PORT: data48x 0 0 128 0 INPUT NODEFVAL data48x[127..0]
+-- Retrieval info: USED_PORT: data49x 0 0 128 0 INPUT NODEFVAL data49x[127..0]
+-- Retrieval info: USED_PORT: data4x 0 0 128 0 INPUT NODEFVAL data4x[127..0]
+-- Retrieval info: USED_PORT: data50x 0 0 128 0 INPUT NODEFVAL data50x[127..0]
+-- Retrieval info: USED_PORT: data51x 0 0 128 0 INPUT NODEFVAL data51x[127..0]
+-- Retrieval info: USED_PORT: data52x 0 0 128 0 INPUT NODEFVAL data52x[127..0]
+-- Retrieval info: USED_PORT: data53x 0 0 128 0 INPUT NODEFVAL data53x[127..0]
+-- Retrieval info: USED_PORT: data54x 0 0 128 0 INPUT NODEFVAL data54x[127..0]
+-- Retrieval info: USED_PORT: data55x 0 0 128 0 INPUT NODEFVAL data55x[127..0]
+-- Retrieval info: USED_PORT: data56x 0 0 128 0 INPUT NODEFVAL data56x[127..0]
+-- Retrieval info: USED_PORT: data57x 0 0 128 0 INPUT NODEFVAL data57x[127..0]
+-- Retrieval info: USED_PORT: data58x 0 0 128 0 INPUT NODEFVAL data58x[127..0]
+-- Retrieval info: USED_PORT: data59x 0 0 128 0 INPUT NODEFVAL data59x[127..0]
+-- Retrieval info: USED_PORT: data5x 0 0 128 0 INPUT NODEFVAL data5x[127..0]
+-- Retrieval info: USED_PORT: data60x 0 0 128 0 INPUT NODEFVAL data60x[127..0]
+-- Retrieval info: USED_PORT: data61x 0 0 128 0 INPUT NODEFVAL data61x[127..0]
+-- Retrieval info: USED_PORT: data62x 0 0 128 0 INPUT NODEFVAL data62x[127..0]
+-- Retrieval info: USED_PORT: data63x 0 0 128 0 INPUT NODEFVAL data63x[127..0]
+-- Retrieval info: USED_PORT: data64x 0 0 128 0 INPUT NODEFVAL data64x[127..0]
+-- Retrieval info: USED_PORT: data65x 0 0 128 0 INPUT NODEFVAL data65x[127..0]
+-- Retrieval info: USED_PORT: data66x 0 0 128 0 INPUT NODEFVAL data66x[127..0]
+-- Retrieval info: USED_PORT: data67x 0 0 128 0 INPUT NODEFVAL data67x[127..0]
+-- Retrieval info: USED_PORT: data68x 0 0 128 0 INPUT NODEFVAL data68x[127..0]
+-- Retrieval info: USED_PORT: data69x 0 0 128 0 INPUT NODEFVAL data69x[127..0]
+-- Retrieval info: USED_PORT: data6x 0 0 128 0 INPUT NODEFVAL data6x[127..0]
+-- Retrieval info: USED_PORT: data70x 0 0 128 0 INPUT NODEFVAL data70x[127..0]
+-- Retrieval info: USED_PORT: data71x 0 0 128 0 INPUT NODEFVAL data71x[127..0]
+-- Retrieval info: USED_PORT: data72x 0 0 128 0 INPUT NODEFVAL data72x[127..0]
+-- Retrieval info: USED_PORT: data73x 0 0 128 0 INPUT NODEFVAL data73x[127..0]
+-- Retrieval info: USED_PORT: data74x 0 0 128 0 INPUT NODEFVAL data74x[127..0]
+-- Retrieval info: USED_PORT: data75x 0 0 128 0 INPUT NODEFVAL data75x[127..0]
+-- Retrieval info: USED_PORT: data76x 0 0 128 0 INPUT NODEFVAL data76x[127..0]
+-- Retrieval info: USED_PORT: data77x 0 0 128 0 INPUT NODEFVAL data77x[127..0]
+-- Retrieval info: USED_PORT: data78x 0 0 128 0 INPUT NODEFVAL data78x[127..0]
+-- Retrieval info: USED_PORT: data79x 0 0 128 0 INPUT NODEFVAL data79x[127..0]
+-- Retrieval info: USED_PORT: data7x 0 0 128 0 INPUT NODEFVAL data7x[127..0]
+-- Retrieval info: USED_PORT: data80x 0 0 128 0 INPUT NODEFVAL data80x[127..0]
+-- Retrieval info: USED_PORT: data81x 0 0 128 0 INPUT NODEFVAL data81x[127..0]
+-- Retrieval info: USED_PORT: data82x 0 0 128 0 INPUT NODEFVAL data82x[127..0]
+-- Retrieval info: USED_PORT: data83x 0 0 128 0 INPUT NODEFVAL data83x[127..0]
+-- Retrieval info: USED_PORT: data84x 0 0 128 0 INPUT NODEFVAL data84x[127..0]
+-- Retrieval info: USED_PORT: data85x 0 0 128 0 INPUT NODEFVAL data85x[127..0]
+-- Retrieval info: USED_PORT: data86x 0 0 128 0 INPUT NODEFVAL data86x[127..0]
+-- Retrieval info: USED_PORT: data87x 0 0 128 0 INPUT NODEFVAL data87x[127..0]
+-- Retrieval info: USED_PORT: data88x 0 0 128 0 INPUT NODEFVAL data88x[127..0]
+-- Retrieval info: USED_PORT: data89x 0 0 128 0 INPUT NODEFVAL data89x[127..0]
+-- Retrieval info: USED_PORT: data8x 0 0 128 0 INPUT NODEFVAL data8x[127..0]
+-- Retrieval info: USED_PORT: data90x 0 0 128 0 INPUT NODEFVAL data90x[127..0]
+-- Retrieval info: USED_PORT: data91x 0 0 128 0 INPUT NODEFVAL data91x[127..0]
+-- Retrieval info: USED_PORT: data92x 0 0 128 0 INPUT NODEFVAL data92x[127..0]
+-- Retrieval info: USED_PORT: data93x 0 0 128 0 INPUT NODEFVAL data93x[127..0]
+-- Retrieval info: USED_PORT: data94x 0 0 128 0 INPUT NODEFVAL data94x[127..0]
+-- Retrieval info: USED_PORT: data95x 0 0 128 0 INPUT NODEFVAL data95x[127..0]
+-- Retrieval info: USED_PORT: data96x 0 0 128 0 INPUT NODEFVAL data96x[127..0]
+-- Retrieval info: USED_PORT: data97x 0 0 128 0 INPUT NODEFVAL data97x[127..0]
+-- Retrieval info: USED_PORT: data98x 0 0 128 0 INPUT NODEFVAL data98x[127..0]
+-- Retrieval info: USED_PORT: data99x 0 0 128 0 INPUT NODEFVAL data99x[127..0]
+-- Retrieval info: USED_PORT: data9x 0 0 128 0 INPUT NODEFVAL data9x[127..0]
+-- Retrieval info: USED_PORT: result 0 0 128 0 OUTPUT NODEFVAL result[127..0]
+-- Retrieval info: USED_PORT: sel 0 0 8 0 INPUT NODEFVAL sel[7..0]
+-- Retrieval info: CONNECT: result 0 0 128 0 @result 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 255 128 0 data255x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 254 128 0 data254x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 253 128 0 data253x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 252 128 0 data252x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 251 128 0 data251x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 250 128 0 data250x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 249 128 0 data249x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 248 128 0 data248x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 247 128 0 data247x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 246 128 0 data246x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 245 128 0 data245x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 244 128 0 data244x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 243 128 0 data243x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 242 128 0 data242x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 241 128 0 data241x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 240 128 0 data240x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 239 128 0 data239x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 238 128 0 data238x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 237 128 0 data237x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 236 128 0 data236x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 235 128 0 data235x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 234 128 0 data234x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 233 128 0 data233x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 232 128 0 data232x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 231 128 0 data231x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 230 128 0 data230x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 229 128 0 data229x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 228 128 0 data228x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 227 128 0 data227x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 226 128 0 data226x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 225 128 0 data225x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 224 128 0 data224x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 223 128 0 data223x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 222 128 0 data222x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 221 128 0 data221x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 220 128 0 data220x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 219 128 0 data219x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 218 128 0 data218x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 217 128 0 data217x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 216 128 0 data216x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 215 128 0 data215x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 214 128 0 data214x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 213 128 0 data213x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 212 128 0 data212x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 211 128 0 data211x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 210 128 0 data210x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 209 128 0 data209x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 208 128 0 data208x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 207 128 0 data207x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 206 128 0 data206x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 205 128 0 data205x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 204 128 0 data204x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 203 128 0 data203x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 202 128 0 data202x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 201 128 0 data201x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 200 128 0 data200x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 199 128 0 data199x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 198 128 0 data198x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 197 128 0 data197x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 196 128 0 data196x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 195 128 0 data195x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 194 128 0 data194x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 193 128 0 data193x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 192 128 0 data192x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 191 128 0 data191x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 190 128 0 data190x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 189 128 0 data189x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 188 128 0 data188x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 187 128 0 data187x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 186 128 0 data186x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 185 128 0 data185x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 184 128 0 data184x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 183 128 0 data183x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 182 128 0 data182x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 181 128 0 data181x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 180 128 0 data180x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 179 128 0 data179x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 178 128 0 data178x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 177 128 0 data177x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 176 128 0 data176x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 175 128 0 data175x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 174 128 0 data174x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 173 128 0 data173x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 172 128 0 data172x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 171 128 0 data171x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 170 128 0 data170x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 169 128 0 data169x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 168 128 0 data168x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 167 128 0 data167x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 166 128 0 data166x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 165 128 0 data165x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 164 128 0 data164x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 163 128 0 data163x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 162 128 0 data162x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 161 128 0 data161x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 160 128 0 data160x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 159 128 0 data159x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 158 128 0 data158x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 157 128 0 data157x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 156 128 0 data156x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 155 128 0 data155x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 154 128 0 data154x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 153 128 0 data153x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 152 128 0 data152x 0 0 128 0
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+-- Retrieval info: CONNECT: @data 1 150 128 0 data150x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 149 128 0 data149x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 148 128 0 data148x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 147 128 0 data147x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 146 128 0 data146x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 145 128 0 data145x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 144 128 0 data144x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 143 128 0 data143x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 142 128 0 data142x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 141 128 0 data141x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 140 128 0 data140x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 139 128 0 data139x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 138 128 0 data138x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 137 128 0 data137x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 136 128 0 data136x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 135 128 0 data135x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 134 128 0 data134x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 133 128 0 data133x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 132 128 0 data132x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 131 128 0 data131x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 130 128 0 data130x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 129 128 0 data129x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 128 128 0 data128x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 127 128 0 data127x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 126 128 0 data126x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 125 128 0 data125x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 124 128 0 data124x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 123 128 0 data123x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 122 128 0 data122x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 121 128 0 data121x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 120 128 0 data120x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 119 128 0 data119x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 118 128 0 data118x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 117 128 0 data117x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 116 128 0 data116x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 115 128 0 data115x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 114 128 0 data114x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 113 128 0 data113x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 112 128 0 data112x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 111 128 0 data111x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 110 128 0 data110x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 109 128 0 data109x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 108 128 0 data108x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 107 128 0 data107x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 106 128 0 data106x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 105 128 0 data105x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 104 128 0 data104x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 103 128 0 data103x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 102 128 0 data102x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 101 128 0 data101x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 100 128 0 data100x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 99 128 0 data99x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 98 128 0 data98x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 97 128 0 data97x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 96 128 0 data96x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 95 128 0 data95x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 94 128 0 data94x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 93 128 0 data93x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 92 128 0 data92x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 91 128 0 data91x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 90 128 0 data90x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 89 128 0 data89x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 88 128 0 data88x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 87 128 0 data87x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 86 128 0 data86x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 85 128 0 data85x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 84 128 0 data84x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 83 128 0 data83x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 82 128 0 data82x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 81 128 0 data81x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 80 128 0 data80x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 79 128 0 data79x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 78 128 0 data78x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 77 128 0 data77x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 76 128 0 data76x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 75 128 0 data75x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 74 128 0 data74x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 73 128 0 data73x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 72 128 0 data72x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 71 128 0 data71x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 70 128 0 data70x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 69 128 0 data69x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 68 128 0 data68x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 67 128 0 data67x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 66 128 0 data66x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 65 128 0 data65x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 64 128 0 data64x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 63 128 0 data63x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 62 128 0 data62x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 61 128 0 data61x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 60 128 0 data60x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 59 128 0 data59x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 58 128 0 data58x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 57 128 0 data57x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 56 128 0 data56x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 55 128 0 data55x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 54 128 0 data54x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 53 128 0 data53x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 52 128 0 data52x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 51 128 0 data51x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 50 128 0 data50x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 49 128 0 data49x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 48 128 0 data48x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 47 128 0 data47x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 46 128 0 data46x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 45 128 0 data45x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 44 128 0 data44x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 43 128 0 data43x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 42 128 0 data42x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 41 128 0 data41x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 40 128 0 data40x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 39 128 0 data39x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 38 128 0 data38x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 37 128 0 data37x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 36 128 0 data36x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 35 128 0 data35x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 34 128 0 data34x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 33 128 0 data33x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 32 128 0 data32x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 31 128 0 data31x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 30 128 0 data30x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 29 128 0 data29x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 28 128 0 data28x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 27 128 0 data27x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 26 128 0 data26x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 25 128 0 data25x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 24 128 0 data24x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 23 128 0 data23x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 22 128 0 data22x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 21 128 0 data21x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 20 128 0 data20x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 19 128 0 data19x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 18 128 0 data18x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 17 128 0 data17x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 16 128 0 data16x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 15 128 0 data15x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 14 128 0 data14x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 13 128 0 data13x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 12 128 0 data12x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 11 128 0 data11x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 10 128 0 data10x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 9 128 0 data9x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 8 128 0 data8x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 7 128 0 data7x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 6 128 0 data6x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 5 128 0 data5x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 4 128 0 data4x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 3 128 0 data3x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 2 128 0 data2x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 1 128 0 data1x 0 0 128 0
+-- Retrieval info: CONNECT: @data 1 0 128 0 data0x 0 0 128 0
+-- Retrieval info: CONNECT: @sel 0 0 8 0 sel 0 0 8 0
+-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mux0.tdf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mux0.inc TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mux0.cmp TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mux0.bsf TRUE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mux0_inst.tdf FALSE
+-- Retrieval info: LIB_FILE: lpm
diff --git a/FPGA_by_Fredi/lpm_shiftreg0.bsf b/FPGA_by_Fredi/lpm_shiftreg0.bsf
new file mode 100644
index 0000000..7bc8450
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_shiftreg0.bsf
@@ -0,0 +1,56 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 1991-2010 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Altera Program License
+Subscription Agreement, Altera MegaCore Function License
+Agreement, or other applicable license agreement, including,
+without limitation, that your use is for the sole purpose of
+programming logic devices manufactured by Altera and sold by
+Altera or its authorized distributors. Please refer to the
+applicable agreement for further details.
+*/
+(header "symbol" (version "1.1"))
+(symbol
+ (rect 0 0 144 80)
+ (text "lpm_shiftreg0" (rect 24 2 138 21)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 61 31 76)(font "Arial" ))
+ (port
+ (pt 0 32)
+ (input)
+ (text "clock" (rect 0 0 36 16)(font "Arial" (font_size 8)))
+ (text "clock" (rect 26 24 57 40)(font "Arial" (font_size 8)))
+ (line (pt 0 32)(pt 16 32)(line_width 1))
+ )
+ (port
+ (pt 0 48)
+ (input)
+ (text "shiftin" (rect 0 0 40 16)(font "Arial" (font_size 8)))
+ (text "shiftin" (rect 20 40 54 56)(font "Arial" (font_size 8)))
+ (line (pt 0 48)(pt 16 48)(line_width 1))
+ )
+ (port
+ (pt 144 48)
+ (output)
+ (text "shiftout" (rect 0 0 49 16)(font "Arial" (font_size 8)))
+ (text "shiftout" (rect 83 40 125 56)(font "Arial" (font_size 8)))
+ (line (pt 144 48)(pt 128 48)(line_width 1))
+ )
+ (drawing
+ (text "left shift" (rect 86 18 125 32)(font "Arial" ))
+ (line (pt 16 16)(pt 128 16)(line_width 1))
+ (line (pt 128 16)(pt 128 64)(line_width 1))
+ (line (pt 128 64)(pt 16 64)(line_width 1))
+ (line (pt 16 64)(pt 16 16)(line_width 1))
+ (line (pt 16 26)(pt 22 32)(line_width 1))
+ (line (pt 22 32)(pt 16 38)(line_width 1))
+ )
+)
diff --git a/FPGA_by_Fredi/lpm_shiftreg0.cmp b/FPGA_by_Fredi/lpm_shiftreg0.cmp
new file mode 100644
index 0000000..011be2b
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_shiftreg0.cmp
@@ -0,0 +1,23 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+component lpm_shiftreg0
+ PORT
+ (
+ clock : IN STD_LOGIC ;
+ shiftin : IN STD_LOGIC ;
+ shiftout : OUT STD_LOGIC
+ );
+end component;
diff --git a/FPGA_by_Fredi/lpm_shiftreg0.inc b/FPGA_by_Fredi/lpm_shiftreg0.inc
new file mode 100644
index 0000000..765230e
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_shiftreg0.inc
@@ -0,0 +1,24 @@
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+FUNCTION lpm_shiftreg0
+(
+ clock,
+ shiftin
+)
+
+RETURNS (
+ shiftout
+);
diff --git a/FPGA_by_Fredi/lpm_shiftreg0.qip b/FPGA_by_Fredi/lpm_shiftreg0.qip
new file mode 100644
index 0000000..7fd6c84
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_shiftreg0.qip
@@ -0,0 +1,6 @@
+set_global_assignment -name IP_TOOL_NAME "LPM_SHIFTREG"
+set_global_assignment -name IP_TOOL_VERSION "9.1"
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_shiftreg0.tdf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_shiftreg0.bsf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_shiftreg0.inc"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_shiftreg0.cmp"]
diff --git a/FPGA_by_Fredi/lpm_shiftreg0.tdf b/FPGA_by_Fredi/lpm_shiftreg0.tdf
new file mode 100644
index 0000000..0c8820c
--- /dev/null
+++ b/FPGA_by_Fredi/lpm_shiftreg0.tdf
@@ -0,0 +1,98 @@
+-- megafunction wizard: %LPM_SHIFTREG%
+-- GENERATION: STANDARD
+-- VERSION: WM1.0
+-- MODULE: lpm_shiftreg
+
+-- ============================================================
+-- File Name: lpm_shiftreg0.tdf
+-- Megafunction Name(s):
+-- lpm_shiftreg
+--
+-- Simulation Library Files(s):
+-- lpm
+-- ============================================================
+-- ************************************************************
+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+--
+-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
+-- ************************************************************
+
+
+--Copyright (C) 1991-2010 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+INCLUDE "lpm_shiftreg.inc";
+
+
+
+SUBDESIGN lpm_shiftreg0
+(
+ clock : INPUT;
+ shiftin : INPUT;
+ shiftout : OUTPUT;
+)
+
+VARIABLE
+
+ lpm_shiftreg_component : lpm_shiftreg WITH (
+ LPM_DIRECTION = "LEFT",
+ LPM_TYPE = "LPM_SHIFTREG",
+ LPM_WIDTH = 16
+ );
+
+BEGIN
+
+ shiftout = lpm_shiftreg_component.shiftout;
+ lpm_shiftreg_component.clock = clock;
+ lpm_shiftreg_component.shiftin = shiftin;
+END;
+
+
+
+-- ============================================================
+-- CNX file retrieval info
+-- ============================================================
+-- Retrieval info: PRIVATE: ACLR NUMERIC "0"
+-- Retrieval info: PRIVATE: ALOAD NUMERIC "0"
+-- Retrieval info: PRIVATE: ASET NUMERIC "0"
+-- Retrieval info: PRIVATE: ASET_ALL1 NUMERIC "1"
+-- Retrieval info: PRIVATE: CLK_EN NUMERIC "0"
+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: PRIVATE: LeftShift NUMERIC "1"
+-- Retrieval info: PRIVATE: ParallelDataInput NUMERIC "0"
+-- Retrieval info: PRIVATE: Q_OUT NUMERIC "0"
+-- Retrieval info: PRIVATE: SCLR NUMERIC "0"
+-- Retrieval info: PRIVATE: SLOAD NUMERIC "0"
+-- Retrieval info: PRIVATE: SSET NUMERIC "0"
+-- Retrieval info: PRIVATE: SSET_ALL1 NUMERIC "1"
+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+-- Retrieval info: PRIVATE: SerialShiftInput NUMERIC "1"
+-- Retrieval info: PRIVATE: SerialShiftOutput NUMERIC "1"
+-- Retrieval info: PRIVATE: nBit NUMERIC "16"
+-- Retrieval info: CONSTANT: LPM_DIRECTION STRING "LEFT"
+-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_SHIFTREG"
+-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16"
+-- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock
+-- Retrieval info: USED_PORT: shiftin 0 0 0 0 INPUT NODEFVAL shiftin
+-- Retrieval info: USED_PORT: shiftout 0 0 0 0 OUTPUT NODEFVAL shiftout
+-- Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0
+-- Retrieval info: CONNECT: @shiftin 0 0 0 0 shiftin 0 0 0 0
+-- Retrieval info: CONNECT: shiftout 0 0 0 0 @shiftout 0 0 0 0
+-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_shiftreg0.tdf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_shiftreg0.inc TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_shiftreg0.cmp TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_shiftreg0.bsf TRUE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_shiftreg0_inst.tdf FALSE
+-- Retrieval info: LIB_FILE: lpm
diff --git a/FPGA_by_Fredi/undo_redo.txt b/FPGA_by_Fredi/undo_redo.txt
index e69de29..0a0000b 100644
--- a/FPGA_by_Fredi/undo_redo.txt
+++ b/FPGA_by_Fredi/undo_redo.txt
@@ -0,0 +1,27 @@
+GED
+
+ Undo Commands
+ 1. Properties
+ 2. Move
+ 3. Delete
+ 4. Delete
+ 5. Insert Node
+ 6. Insert Symbol
+ 7. Delete
+ 8. Move
+ 9. Move
+ 10. Paste
+ 11. Delete
+ 12. Insert Symbol
+ 13. Move
+ 14. Paste
+ 15. Delete
+ 16. Delete
+
+
+RPW
+
+ Undo Commands
+ 1. ||Compilation Report||Flow Summary
+
+