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remove unused generated signals

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Markus Fröschle
2016-01-13 16:43:54 +00:00
parent 97a48bf636
commit 4ed4616156
1 changed files with 0 additions and 3 deletions
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FPGA_Quartus_13.1/Video/video.vhd
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@@ -802,9 +802,6 @@ ARCHITECTURE rtl OF video IS
SIGNAL SYNTHESIZED_WIRE_52 : std_logic;
SIGNAL SYNTHESIZED_WIRE_53 : std_logic;
SIGNAL SYNTHESIZED_WIRE_54 : std_logic;
SIGNAL SYNTHESIZED_WIRE_55 : std_logic;
SIGNAL SYNTHESIZED_WIRE_56 : std_logic;
SIGNAL SYNTHESIZED_WIRE_57 : std_logic;
SIGNAL SYNTHESIZED_WIRE_65 : std_logic_vector(23 DOWNTO 0);
SIGNAL GDFX_TEMP_SIGNAL_16 : std_logic_vector(7 DOWNTO 0);