70 lines
2.5 KiB
C
70 lines
2.5 KiB
C
/* Coldfire C Header File
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* Copyright Freescale Semiconductor Inc
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* All rights reserved.
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*
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* 2008/05/23 Revision: 0.81
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*
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* (c) Copyright UNIS, a.s. 1997-2008
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* UNIS, a.s.
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* Jundrovska 33
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* 624 00 Brno
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* Czech Republic
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* http : www.processorexpert.com
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* mail : info@processorexpert.com
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*/
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#ifndef __MCF5475_I2C_H__
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#define __MCF5475_I2C_H__
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/*********************************************************************
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*
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* I2C Module (I2C)
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*
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_I2C_I2ADR (*(volatile uint8_t *)(&_MBAR[0x8F00]))
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#define MCF_I2C_I2FDR (*(volatile uint8_t *)(&_MBAR[0x8F04]))
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#define MCF_I2C_I2CR (*(volatile uint8_t *)(&_MBAR[0x8F08]))
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#define MCF_I2C_I2SR (*(volatile uint8_t *)(&_MBAR[0x8F0C]))
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#define MCF_I2C_I2DR (*(volatile uint8_t *)(&_MBAR[0x8F10]))
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#define MCF_I2C_I2ICR (*(volatile uint8_t *)(&_MBAR[0x8F20]))
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/* Bit definitions and macros for MCF_I2C_I2ADR */
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#define MCF_I2C_I2ADR_ADR(x) (((x)&0x7F)<<0x1)
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/* Bit definitions and macros for MCF_I2C_I2FDR */
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#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F)<<0)
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/* Bit definitions and macros for MCF_I2C_I2CR */
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#define MCF_I2C_I2CR_RSTA (0x4)
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#define MCF_I2C_I2CR_TXAK (0x8)
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#define MCF_I2C_I2CR_MTX (0x10)
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#define MCF_I2C_I2CR_MSTA (0x20)
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#define MCF_I2C_I2CR_IIEN (0x40)
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#define MCF_I2C_I2CR_IEN (0x80)
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/* Bit definitions and macros for MCF_I2C_I2SR */
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#define MCF_I2C_I2SR_RXAK (0x1)
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#define MCF_I2C_I2SR_IIF (0x2)
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#define MCF_I2C_I2SR_SRW (0x4)
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#define MCF_I2C_I2SR_IAL (0x10)
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#define MCF_I2C_I2SR_IBB (0x20)
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#define MCF_I2C_I2SR_IAAS (0x40)
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#define MCF_I2C_I2SR_ICF (0x80)
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/* Bit definitions and macros for MCF_I2C_I2DR */
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#define MCF_I2C_I2DR_DATA(x) (((x)&0xFF)<<0)
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/* Bit definitions and macros for MCF_I2C_I2ICR */
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#define MCF_I2C_I2ICR_IE (0x1)
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#define MCF_I2C_I2ICR_RE (0x2)
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#define MCF_I2C_I2ICR_TE (0x4)
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#define MCF_I2C_I2ICR_BNBE (0x8)
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#endif /* __MCF5475_I2C_H__ */
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