101 lines
4.6 KiB
C
101 lines
4.6 KiB
C
/* Coldfire C Header File
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* Copyright Freescale Semiconductor Inc
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* All rights reserved.
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*
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* 2008/05/23 Revision: 0.81
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*
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* (c) Copyright UNIS, a.s. 1997-2008
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* UNIS, a.s.
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* Jundrovska 33
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* 624 00 Brno
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* Czech Republic
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* http : www.processorexpert.com
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* mail : info@processorexpert.com
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*/
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#ifndef __MCF5475_GPT_H__
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#define __MCF5475_GPT_H__
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/*********************************************************************
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*
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* General Purpose Timers (GPT)
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*
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_GPT0_GMS (*(volatile uint32_t*)(&_MBAR[0x800]))
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#define MCF_GPT0_GCIR (*(volatile uint32_t*)(&_MBAR[0x804]))
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#define MCF_GPT0_GPWM (*(volatile uint32_t*)(&_MBAR[0x808]))
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#define MCF_GPT0_GSR (*(volatile uint32_t*)(&_MBAR[0x80C]))
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#define MCF_GPT1_GMS (*(volatile uint32_t*)(&_MBAR[0x810]))
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#define MCF_GPT1_GCIR (*(volatile uint32_t*)(&_MBAR[0x814]))
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#define MCF_GPT1_GPWM (*(volatile uint32_t*)(&_MBAR[0x818]))
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#define MCF_GPT1_GSR (*(volatile uint32_t*)(&_MBAR[0x81C]))
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#define MCF_GPT2_GMS (*(volatile uint32_t*)(&_MBAR[0x820]))
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#define MCF_GPT2_GCIR (*(volatile uint32_t*)(&_MBAR[0x824]))
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#define MCF_GPT2_GPWM (*(volatile uint32_t*)(&_MBAR[0x828]))
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#define MCF_GPT2_GSR (*(volatile uint32_t*)(&_MBAR[0x82C]))
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#define MCF_GPT3_GMS (*(volatile uint32_t*)(&_MBAR[0x830]))
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#define MCF_GPT3_GCIR (*(volatile uint32_t*)(&_MBAR[0x834]))
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#define MCF_GPT3_GPWM (*(volatile uint32_t*)(&_MBAR[0x838]))
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#define MCF_GPT3_GSR (*(volatile uint32_t*)(&_MBAR[0x83C]))
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#define MCF_GPT_GMS(x) (*(volatile uint32_t*)(&_MBAR[0x800 + ((x)*0x10)]))
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#define MCF_GPT_GCIR(x) (*(volatile uint32_t*)(&_MBAR[0x804 + ((x)*0x10)]))
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#define MCF_GPT_GPWM(x) (*(volatile uint32_t*)(&_MBAR[0x808 + ((x)*0x10)]))
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#define MCF_GPT_GSR(x) (*(volatile uint32_t*)(&_MBAR[0x80C + ((x)*0x10)]))
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/* Bit definitions and macros for MCF_GPT_GMS */
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#define MCF_GPT_GMS_TMS(x) (((x)&0x7)<<0)
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#define MCF_GPT_GMS_TMS_DISABLE (0)
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#define MCF_GPT_GMS_TMS_INCAPT (0x1)
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#define MCF_GPT_GMS_TMS_OUTCAPT (0x2)
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#define MCF_GPT_GMS_TMS_PWM (0x3)
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#define MCF_GPT_GMS_TMS_GPIO (0x4)
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#define MCF_GPT_GMS_GPIO(x) (((x)&0x3)<<0x4)
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#define MCF_GPT_GMS_GPIO_INPUT (0)
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#define MCF_GPT_GMS_GPIO_OUTLO (0x20)
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#define MCF_GPT_GMS_GPIO_OUTHI (0x30)
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#define MCF_GPT_GMS_IEN (0x100)
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#define MCF_GPT_GMS_OD (0x200)
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#define MCF_GPT_GMS_SC (0x400)
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#define MCF_GPT_GMS_CE (0x1000)
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#define MCF_GPT_GMS_WDEN (0x8000)
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#define MCF_GPT_GMS_ICT(x) (((x)&0x3)<<0x10)
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#define MCF_GPT_GMS_ICT_ANY (0)
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#define MCF_GPT_GMS_ICT_RISE (0x10000)
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#define MCF_GPT_GMS_ICT_FALL (0x20000)
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#define MCF_GPT_GMS_ICT_PULSE (0x30000)
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#define MCF_GPT_GMS_OCT(x) (((x)&0x3)<<0x14)
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#define MCF_GPT_GMS_OCT_FRCLOW (0)
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#define MCF_GPT_GMS_OCT_PULSEHI (0x100000)
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#define MCF_GPT_GMS_OCT_PULSELO (0x200000)
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#define MCF_GPT_GMS_OCT_TOGGLE (0x300000)
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#define MCF_GPT_GMS_OCPW(x) (((x)&0xFF)<<0x18)
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/* Bit definitions and macros for MCF_GPT_GCIR */
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#define MCF_GPT_GCIR_CNT(x) (((x)&0xFFFF)<<0)
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#define MCF_GPT_GCIR_PRE(x) (((x)&0xFFFF)<<0x10)
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/* Bit definitions and macros for MCF_GPT_GPWM */
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#define MCF_GPT_GPWM_LOAD (0x1)
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#define MCF_GPT_GPWM_PWMOP (0x100)
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#define MCF_GPT_GPWM_WIDTH(x) (((x)&0xFFFF)<<0x10)
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/* Bit definitions and macros for MCF_GPT_GSR */
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#define MCF_GPT_GSR_CAPT (0x1)
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#define MCF_GPT_GSR_COMP (0x2)
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#define MCF_GPT_GSR_PWMP (0x4)
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#define MCF_GPT_GSR_TEXP (0x8)
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#define MCF_GPT_GSR_PIN (0x100)
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#define MCF_GPT_GSR_OVF(x) (((x)&0x7)<<0xC)
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#define MCF_GPT_GSR_CAPTURE(x) (((x)&0xFFFF)<<0x10)
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#endif /* __MCF5475_GPT_H__ */
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