renamed FCLK_xxx macros to SPICLK_xxx

This commit is contained in:
Markus Fröschle
2012-12-16 06:42:13 +00:00
parent 52a4dab4dd
commit f283de018e

View File

@@ -54,7 +54,7 @@
#endif
#define FCLK_FAST() { MCF_DSPI_DCTAR0 = MCF_DSPI_DCTAR_TRSZ(0b111) | /* transfer size = 8 bit */ \
#define SPICLK_FAST() { MCF_DSPI_DCTAR0 = MCF_DSPI_DCTAR_TRSZ(0b111) | /* transfer size = 8 bit */ \
MCF_DSPI_DCTAR_PCSSCK(0b01) | /* 3 clock DSPICS to DSPISCK delay prescaler */ \
MCF_DSPI_DCTAR_PASC_3CLK | /* 3 clock DSPISCK to DSPICS negation prescaler */ \
MCF_DSPI_DCTAR_PDT_3CLK | /* 3 clock delay between DSPICS assertions prescaler */ \
@@ -63,7 +63,7 @@
MCF_DSPI_DCTAR_DT(0b1001) | /* 1024 */ \
MCF_DSPI_DCTAR_BR(0b0000); }
#define FCLK_SLOW() { MCF_DSPI_DCTAR0 = MCF_DSPI_DCTAR_TRSZ(0b111) | /* transfer size = 8 bit */ \
#define SPICLK_SLOW() { MCF_DSPI_DCTAR0 = MCF_DSPI_DCTAR_TRSZ(0b111) | /* transfer size = 8 bit */ \
MCF_DSPI_DCTAR_PCSSCK(0b01) | /* 3 clock DSPICS to DSPISCK delay prescaler */ \
MCF_DSPI_DCTAR_PASC_3CLK | /* 3 clock DSPISCK to DSPICS negation prescaler */ \
MCF_DSPI_DCTAR_PDT_3CLK | /* 3 clock delay between DSPICS assertions prescaler */ \
@@ -392,7 +392,7 @@ DSTATUS disk_initialize(uint8_t drv)
if (Stat & STA_NODISK) return Stat; /* Is card existing in the socket? */
FCLK_SLOW();
SPICLK_SLOW();
for (n = 10; n; n--) xchg_spi(0xFF); /* Send 80 dummy clocks */
ty = 0;
@@ -423,7 +423,7 @@ DSTATUS disk_initialize(uint8_t drv)
deselect();
if (ty) { /* OK */
FCLK_FAST(); /* Set fast clock */
SPICLK_FAST(); /* Set fast clock */
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */
} else { /* Failed */
power_off();