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This commit is contained in:
Markus
2017-12-25 10:17:23 +01:00
committed by GitHub
parent 7b95647613
commit c6de494f33
100 changed files with 66174 additions and 0 deletions
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77
flash_scripts/flash_firebee_fpga.bdm Normal file
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#!/usr/local/bin/bdmctrl -D2
#
# firebee board initialization for bdmctrl
#
open $1
#reset
# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
write 0xFF000500 0xE0000000 4
write 0xFF000508 0x00001180 4
write 0xFF000504 0x007F0001 4
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
flash 0xe0000000
# flash-plugin (target-based flashing) does not work yet
#flash-plugin 0x10000000 0x4000 flash29.plugin
# Erase flash from 0xE0700000 to 0xE07FFFFF (reserved space for FPGA)
#
# Caution: sector offset numbers need to be the ones from the x16 address range
# column and they vary in size - needs to be exactly as in the data sheet (p. 9)
#
# contrary to documentation, it seems we need to erase-wait after each sector
erase 0xe0000000 0x380000
erase-wait 0xe0000000
erase 0xe0000000 0x388000
erase-wait 0xe0000000
erase 0xe0000000 0x390000
erase-wait 0xe0000000
erase 0xe0000000 0x398000
erase-wait 0xe0000000
erase 0xe0000000 0x3A0000
erase-wait 0xe0000000
erase 0xe0000000 0x3A0000
erase-wait 0xe0000000
erase 0xe0000000 0x3A8000
erase-wait 0xe0000000
erase 0xe0000000 0x3B0000
erase-wait 0xe0000000
erase 0xe0000000 0x3B8000
erase-wait 0xe0000000
erase 0xe0000000 0x3C0000
erase-wait 0xe0000000
erase 0xe0000000 0x3C8000
erase-wait 0xe0000000
erase 0xe0000000 0x3D0000
erase-wait 0xe0000000
erase 0xe0000000 0x3D8000
erase-wait 0xe0000000
erase 0xe0000000 0x3E0000
erase-wait 0xe0000000
erase 0xe0000000 0x3E8000
erase-wait 0xe0000000
erase 0xe0000000 0x3F0000
erase-wait 0xe0000000
erase 0xe0000000 0x3F8000
erase-wait 0xe0000000
erase 0xe0000000 0x3F9000
erase-wait 0xe0000000
erase 0xe0000000 0x3FA000
erase-wait 0xe0000000
erase 0xe0000000 0x3FB000
erase-wait 0xe0000000
erase 0xe0000000 0x3FC000
erase-wait 0xe0000000
erase 0xe0000000 0x3FD000
erase-wait 0xe0000000
erase 0xe0000000 0x3FE000
erase-wait 0xe0000000
erase 0xe0000000 0x3FF000
erase-wait 0xe0000000
wait
load -v FPGA.elf