refactored assembler routines from exceptions.S into mmu.c (access exception handler). Seems to be better, but still hang.
This commit is contained in:
Markus Fröschle
4
.gdbinit
4
.gdbinit
@@ -1,7 +1,7 @@
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#set disassemble-next-line on
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define tr
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#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
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target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
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target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
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#target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
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#target dbug /dev/ttyS0
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#monitor bdm-reset
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end
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3
Makefile
3
Makefile
@@ -32,6 +32,7 @@ NATIVECC=gcc
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INCLUDE=-Iinclude
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CFLAGS=-mcpu=5474 \
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-Wall \
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-g \
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-Os \
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-fomit-frame-pointer \
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-ffreestanding \
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@@ -246,7 +247,7 @@ define EX_TEMPLATE
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$(1)_MAPFILE=$(1)/$$(basename $$(FLASH_EXEC)).map
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$(1)/$$(FLASH_EXEC): $(1)/$(LIBBAS) $(LDCSRC)
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$(CPP) $(INCLUDE) -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDCFILE)
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$(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE) --cref -T $(1)/$$(LDCFILE) -o $$@
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$(LD) -g --oformat $$(FORMAT) -Map $$($(1)_MAPFILE) --cref -T $(1)/$$(LDCFILE) -o $$@
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ifeq ($(COMPILE_ELF),Y)
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$(OBJCOPY) -O srec $$@ $$(basename $$@).s19
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else
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@@ -391,14 +391,10 @@ reset_vector:
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// cannot use the supervisor stack in here. Therefore we first switch to a safe stack
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// (RAMBAR0, the processor internal SRAM)
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access_exception:
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// no point in disabling interrupts within an exception handler
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// move.w #0x2700,sr // disable interrupt
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// save current SSP
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move.l sp,__SUP_SP // defined in linker script: top of SRAM0
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lea __SUP_SP - 4,sp // now we can savely use the stack
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lea __SUP_SP - 4,sp // now we can savely use this as stack
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// save gcc scratch registers, others will be handled by called function
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lea -4*4(sp),sp
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@@ -407,32 +403,20 @@ access_exception:
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move.l __SUP_SP,a0 // original stack pointer
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move.l 4(a0),-(sp) // format status word
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move.l (a0),-(sp) // program counter at access error
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move.l (a0),-(sp) // format status word
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move.l 4(a0),-(sp) // program counter at access error
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jsr _access_exception
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jsr _access_exception // note the undescore
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lea 2*4(sp),sp // adjust stack
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tst.l d0 // handled?
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bne bus_error
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beq bus_error // no
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movem.l (sp),d0-d1/a0-a1 // restore scratch registers
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lea 4*4(sp),sp
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move.l (sp)+,a0
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move.l (sp)+,d0
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move.l __SUP_SP,sp
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bra bus_error // everything else is a classic bus error
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movem.l (sp),d0-d1/a0-a2 // restore gcc scratch registers
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lea 5*4(sp),sp
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// revert stack trickery
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move.l (sp)+,a0
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move.l (sp)+,d0
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move.l __SUP_SP,sp
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@@ -440,10 +424,11 @@ access_exception:
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bus_error:
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movem.l (sp),d0-d1/a0-a1 // restore scratch registers
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lea 4*4(sp),sp
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// revert stack trickery
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move.l (sp)+,a0
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move.l (sp)+,d0 // restore register
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move.l __SUP_SP,sp // restore original stack
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bra std_exc_vec
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19
sys/mmu.c
19
sys/mmu.c
@@ -60,12 +60,12 @@
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#error "unknown machine!"
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#endif /* MACHINE_FIREBEE */
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//#define DEBUG_MMU
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#ifdef DEBUG_MMU
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#define DBG_MMU
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#ifdef DBG_MMU
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#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg);} while(0)
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#else
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#define dbg(format, arg...) do {;} while (0)
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#endif /* DEBUG_MMU */
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#endif /* DBG_MMU */
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/*
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* set ASID register
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@@ -404,12 +404,14 @@ bool access_exception(uint32_t pc, uint32_t format_status)
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int fault_status;
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uint32_t fault_address;
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bool is_tlb_miss = false; /* assume access error is not a TLB miss */
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extern uint8_t __FASTRAM_END[];
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uint32_t FASTRAM_END = (uint32_t) &__FASTRAM_END[0];
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extern uint8_t _FASTRAM_END[];
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uint32_t FASTRAM_END = (uint32_t) &_FASTRAM_END[0];
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fault_status = (((format_status & 0xc000000) >> 26) |
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fault_status = (((format_status & 0xc000000) >> 24) |
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((format_status & 0x30000) >> 16));
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dbg("%s: pc=%p, format_status = %p, fault_status = 0x%x\r\n", __FUNCTION__, pc, format_status, fault_status);
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/*
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* determine if access fault was caused by a TLB miss
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*/
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@@ -419,6 +421,7 @@ bool access_exception(uint32_t pc, uint32_t format_status)
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case 0x6: /* TLB miss on extension word of instruction fetch */
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case 0xa: /* TLB miss on data write */
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case 0xe: /* TLB miss on data read or read-modify-write */
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dbg("%s: access fault because of TLB miss at %p\r\n", __FUNCTION__, pc);
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is_tlb_miss = true;
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break;
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@@ -449,13 +452,13 @@ bool access_exception(uint32_t pc, uint32_t format_status)
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}
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}
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}
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return is_tlb_miss;
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return false;
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}
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void mmutr_miss(uint32_t address)
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{
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dbg("MMU TLB MISS at 0x%08x\r\n", address);
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dbg("MMU TLB MISS accessing 0x%08x\r\n", address);
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flush_and_invalidate_caches();
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/* add missed page to TLB */
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