corrected FPGA copy loop
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@@ -83,7 +83,7 @@ void init_fpga(void)
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MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
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MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
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MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
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MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
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}
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}
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} while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) || (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END));
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} while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) && (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END));
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if (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END)
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if (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END)
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{
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{
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